From b4f092ec74d85d4e5567ebb45e1bd0dec20f0e02 Mon Sep 17 00:00:00 2001 From: Wini-Buh Date: Sat, 29 May 2021 21:23:39 +0200 Subject: Adaptations for Renesas CCRX toolchain and Rx72N controller performed --- src/common/tusb_compiler.h | 92 ++++++++++++++++++++++++++++++++++++++++++++-- src/common/tusb_types.h | 39 +++++++++++++++++++- 2 files changed, 125 insertions(+), 6 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 679060b20..508bb126e 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -48,6 +48,8 @@ #define TU_VERIFY_STATIC _Static_assert #elif defined (__cplusplus) && __cplusplus >= 201103L #define TU_VERIFY_STATIC static_assert +#elif defined(__CCRX__) + #define TU_VERIFY_STATIC(const_expr, _mess) typedef char TU_XSTRCAT(Line, __LINE__)[(const_expr) ? 1 : 0]; #else #define TU_VERIFY_STATIC(const_expr, _mess) enum { TU_XSTRCAT(_verify_static_, _TU_COUNTER_) = 1/(!!(const_expr)) } #endif @@ -62,6 +64,9 @@ // Compiler porting with Attribute and Endian //--------------------------------------------------------------------+ +// define the standard definition of this macro to construct a "weak" function name +#define MAKE_WEAK_FUNC(func_name) func_name + // TODO refactor since __attribute__ is supported across many compiler #if defined(__GNUC__) #define TU_ATTR_ALIGNED(Bytes) __attribute__ ((aligned(Bytes))) @@ -73,9 +78,17 @@ #define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused #define TU_ATTR_USED __attribute__ ((used)) // Function/Variable is meant to be used + #define TU_PACK_STRUCT_BEGIN + #define TU_PACK_STRUCT_END + + #define TU_BIT_FIELD_ORDER_BEGIN + #define TU_BIT_FIELD_ORDER_END + // Endian conversion use well-known host to network (big endian) naming #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ #define TU_BYTE_ORDER TU_LITTLE_ENDIAN + #define TU_ENDIAN_LITTLE_BEGIN + #define TU_ENDIAN_LITTLE_END #else #define TU_BYTE_ORDER TU_BIG_ENDIAN #endif @@ -123,6 +136,77 @@ #define TU_BSWAP16(u16) (__iar_builtin_REV16(u16)) #define TU_BSWAP32(u32) (__iar_builtin_REV(u32)) + +#elif defined(__CCRX__) + #define TU_ATTR_ALIGNED(Bytes) + #define TU_ATTR_SECTION(sec_name) + #define TU_ATTR_PACKED + #define TU_ATTR_WEAK + #define TU_ATTR_ALWAYS_INLINE + #define TU_ATTR_DEPRECATED(mess) + #define TU_ATTR_UNUSED + #define TU_ATTR_USED + + #define TU_PACK_STRUCT_BEGIN _Pragma("pack") + #define TU_PACK_STRUCT_END _Pragma("packoption") + + #define TU_BIT_FIELD_ORDER_BEGIN _Pragma("bit_order right") + #define TU_BIT_FIELD_ORDER_END _Pragma("bit_order") + + // Endian conversion use well-known host to network (big endian) naming + #if defined(__LIT) + #define TU_BYTE_ORDER TU_LITTLE_ENDIAN + #define TU_ENDIAN_LITTLE_BEGIN + #define TU_ENDIAN_LITTLE_END + #else + #define TU_BYTE_ORDER TU_BIG_ENDIAN + #define TU_ENDIAN_LITTLE_BEGIN _Pragma("endian little") + #define TU_ENDIAN_LITTLE_END _Pragma("endian") + #endif + + #define TU_BSWAP16(u16) ((unsigned short)_builtin_revw((unsigned long)u16)) + #define TU_BSWAP32(u32) (_builtin_revl(u32)) + + /* activate the "aligned" emulation, because this toolchain does not know + the aligned attribute (or something similar yet) */ + #define TU_HAS_NO_ATTR_ALIGNED + + /* activate the "weak" function emulation, because this toolchain does not + know the weak attribute (or something similar yet) */ + #define TU_HAS_NO_ATTR_WEAK + + // make sure to define away the standard definition of this macro + #undef MAKE_WEAK_FUNC + // Helper macro to construct a "weak" function name + #define MAKE_WEAK_FUNC(func_name) weak_ ## func_name + + #if defined(TU_HAS_NO_ATTR_WEAK) + // "Weak function" emulation defined in cdc_device.h + #define ADD_WEAK_FUNC_TUD_CDC_RX_CB 0 + #define ADD_WEAK_FUNC_TUD_CDC_RX_WANTED_CB 0 + #define ADD_WEAK_FUNC_TUD_CDC_TX_COMPLETE_CB 0 + #define ADD_WEAK_FUNC_TUD_CDC_LINE_STATE_CB 0 + #define ADD_WEAK_FUNC_TUD_CDC_LINE_CODING_CB 0 + #define ADD_WEAK_FUNC_TUD_CDC_SEND_BREAK_CB 0 + + // "Weak function" emulation defined in usbd_pvt.h + #define ADD_WEAK_FUNC_USBD_APP_DRIVER_GET_CB 0 + + // "Weak function" emulation defined in usbd.h + #define ADD_WEAK_FUNC_TUD_DESCRIPTOR_BOS_CB 0 + #define ADD_WEAK_FUNC_TUD_DESCRIPTOR_DEVICE_QUALIFIER_CB 0 + #define ADD_WEAK_FUNC_TUD_MOUNT_CB 0 + #define ADD_WEAK_FUNC_TUD_UMOUNT_CB 0 + #define ADD_WEAK_FUNC_TUD_SUSPEND_CB 0 + #define ADD_WEAK_FUNC_TUD_RESUME_CB 0 + #define ADD_WEAK_FUNC_TUD_VENDOR_CONTROL_XFER_CB 0 + + // "Weak function" emulation defined in dcd.h + #define ADD_WEAK_FUNC_DCD_EDPT0_STATUS_COMPLETE 0 + #define ADD_WEAK_FUNC_DCD_EDPT_CLOSE 0 + #define ADD_WEAK_FUNC_DCD_EDPT_XFER_FIFO 0 + #endif + #else #error "Compiler attribute porting is required" #endif @@ -149,11 +233,11 @@ #define tu_htonl(u32) (u32) #define tu_ntohl(u32) (u32) - #define tu_htole16(u16) (tu_bswap16(u16)) - #define tu_le16toh(u16) (tu_bswap16(u16)) + #define tu_htole16(u16) (TU_BSWAP16(u16)) + #define tu_le16toh(u16) (TU_BSWAP16(u16)) - #define tu_htole32(u32) (tu_bswap32(u32)) - #define tu_le32toh(u32) (tu_bswap32(u32)) + #define tu_htole32(u32) (TU_BSWAP32(u32)) + #define tu_le32toh(u32) (TU_BSWAP32(u32)) #else #error Byte order is undefined diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index ec58a3181..b20ea2974 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -263,6 +263,7 @@ enum //--------------------------------------------------------------------+ /// USB Device Descriptor +TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. @@ -283,10 +284,12 @@ typedef struct TU_ATTR_PACKED uint8_t bNumConfigurations ; ///< Number of possible configurations. } tusb_desc_device_t; +TU_PACK_STRUCT_END TU_VERIFY_STATIC( sizeof(tusb_desc_device_t) == 18, "size is not correct"); // USB Binary Device Object Store (BOS) Descriptor +TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes @@ -294,8 +297,10 @@ typedef struct TU_ATTR_PACKED uint16_t wTotalLength ; ///< Total length of data returned for this descriptor uint8_t bNumDeviceCaps ; ///< Number of device capability descriptors in the BOS } tusb_desc_bos_t; +TU_PACK_STRUCT_END /// USB Configuration Descriptor +TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes @@ -308,10 +313,10 @@ typedef struct TU_ATTR_PACKED uint8_t bmAttributes ; ///< Configuration characteristics \n D7: Reserved (set to one)\n D6: Self-powered \n D5: Remote Wakeup \n D4...0: Reserved (reset to zero) \n D7 is reserved and must be set to one for historical reasons. \n A device configuration that uses power from the bus and a local source reports a non-zero value in bMaxPower to indicate the amount of bus power required and sets D6. The actual power source at runtime may be determined using the GetStatus(DEVICE) request (see USB 2.0 spec Section 9.4.5). \n If a device configuration supports remote wakeup, D5 is set to one. uint8_t bMaxPower ; ///< Maximum power consumption of the USB device from the bus in this specific configuration when the device is fully operational. Expressed in 2 mA units (i.e., 50 = 100 mA). } tusb_desc_configuration_t; - -TU_VERIFY_STATIC( sizeof(tusb_desc_configuration_t) == 9, "size is not correct"); +TU_PACK_STRUCT_END /// USB Interface Descriptor +TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes @@ -325,8 +330,10 @@ typedef struct TU_ATTR_PACKED uint8_t bInterfaceProtocol ; ///< Protocol code (assigned by the USB). \n These codes are qualified by the value of the bInterfaceClass and the bInterfaceSubClass fields. If an interface supports class-specific requests, this code identifies the protocols that the device uses as defined by the specification of the device class. \li If this field is reset to zero, the device does not use a class-specific protocol on this interface. \li If this field is set to FFH, the device uses a vendor-specific protocol for this interface. uint8_t iInterface ; ///< Index of string descriptor describing this interface } tusb_desc_interface_t; +TU_PACK_STRUCT_END /// USB Endpoint Descriptor +TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes @@ -334,23 +341,32 @@ typedef struct TU_ATTR_PACKED uint8_t bEndpointAddress ; ///< The address of the endpoint on the USB device described by this descriptor. The address is encoded as follows: \n Bit 3...0: The endpoint number \n Bit 6...4: Reserved, reset to zero \n Bit 7: Direction, ignored for control endpoints 0 = OUT endpoint 1 = IN endpoint. + TU_BIT_FIELD_ORDER_BEGIN struct TU_ATTR_PACKED { uint8_t xfer : 2; uint8_t sync : 2; uint8_t usage : 2; uint8_t : 2; } bmAttributes ; ///< This field describes the endpoint's attributes when it is configured using the bConfigurationValue. \n Bits 1..0: Transfer Type \n- 00 = Control \n- 01 = Isochronous \n- 10 = Bulk \n- 11 = Interrupt \n If not an isochronous endpoint, bits 5..2 are reserved and must be set to zero. If isochronous, they are defined as follows: \n Bits 3..2: Synchronization Type \n- 00 = No Synchronization \n- 01 = Asynchronous \n- 10 = Adaptive \n- 11 = Synchronous \n Bits 5..4: Usage Type \n- 00 = Data endpoint \n- 01 = Feedback endpoint \n- 10 = Implicit feedback Data endpoint \n- 11 = Reserved \n Refer to Chapter 5 of USB 2.0 specification for more information. \n All other bits are reserved and must be reset to zero. Reserved bits must be ignored by the host. + TU_BIT_FIELD_ORDER_END struct TU_ATTR_PACKED { +#if defined(__CCRX__) + //FIXME the original defined bit field has a problem with the CCRX toolchain, so only a size field is defined + uint16_t size; +#else uint16_t size : 11; ///< Maximum packet size this endpoint is capable of sending or receiving when this configuration is selected. \n For isochronous endpoints, this value is used to reserve the bus time in the schedule, required for the per-(micro)frame data payloads. The pipe may, on an ongoing basis, actually use less bandwidth than that reserved. The device reports, if necessary, the actual bandwidth used via its normal, non-USB defined mechanisms. \n For all endpoints, bits 10..0 specify the maximum packet size (in bytes). \n For high-speed isochronous and interrupt endpoints: \n Bits 12..11 specify the number of additional transaction opportunities per microframe: \n- 00 = None (1 transaction per microframe) \n- 01 = 1 additional (2 per microframe) \n- 10 = 2 additional (3 per microframe) \n- 11 = Reserved \n Bits 15..13 are reserved and must be set to zero. uint16_t hs_period_mult : 2; uint16_t TU_RESERVED : 3; +#endif }wMaxPacketSize; uint8_t bInterval ; ///< Interval for polling endpoint for data transfers. Expressed in frames or microframes depending on the device operating speed (i.e., either 1 millisecond or 125 us units). \n- For full-/high-speed isochronous endpoints, this value must be in the range from 1 to 16. The bInterval value is used as the exponent for a \f$ 2^(bInterval-1) \f$ value; e.g., a bInterval of 4 means a period of 8 (\f$ 2^(4-1) \f$). \n- For full-/low-speed interrupt endpoints, the value of this field may be from 1 to 255. \n- For high-speed interrupt endpoints, the bInterval value is used as the exponent for a \f$ 2^(bInterval-1) \f$ value; e.g., a bInterval of 4 means a period of 8 (\f$ 2^(4-1) \f$) . This value must be from 1 to 16. \n- For high-speed bulk/control OUT endpoints, the bInterval must specify the maximum NAK rate of the endpoint. A value of 0 indicates the endpoint never NAKs. Other values indicate at most 1 NAK each bInterval number of microframes. This value must be in the range from 0 to 255. \n Refer to Chapter 5 of USB 2.0 specification for more information. } tusb_desc_endpoint_t; +TU_PACK_STRUCT_END /// USB Other Speed Configuration Descriptor +TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of descriptor @@ -363,8 +379,10 @@ typedef struct TU_ATTR_PACKED uint8_t bmAttributes ; ///< Same as Configuration descriptor uint8_t bMaxPower ; ///< Same as Configuration descriptor } tusb_desc_other_speed_t; +TU_PACK_STRUCT_END /// USB Device Qualifier Descriptor +TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of descriptor @@ -378,8 +396,10 @@ typedef struct TU_ATTR_PACKED uint8_t bNumConfigurations ; ///< Number of Other-speed Configurations uint8_t bReserved ; ///< Reserved for future use, must be zero } tusb_desc_device_qualifier_t; +TU_PACK_STRUCT_END /// USB Interface Association Descriptor (IAD ECN) +TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of descriptor @@ -394,16 +414,20 @@ typedef struct TU_ATTR_PACKED uint8_t iFunction ; ///< Index of the string descriptor describing the interface association. } tusb_desc_interface_assoc_t; +TU_PACK_STRUCT_END // USB String Descriptor +TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes uint8_t bDescriptorType ; ///< Descriptor Type uint16_t unicode_string[]; } tusb_desc_string_t; +TU_PACK_STRUCT_END // USB Binary Device Object Store (BOS) +TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength; @@ -413,8 +437,10 @@ typedef struct TU_ATTR_PACKED uint8_t PlatformCapabilityUUID[16]; uint8_t CapabilityData[]; } tusb_desc_bos_platform_t; +TU_PACK_STRUCT_END // USB WebuSB URL Descriptor +TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength; @@ -422,14 +448,17 @@ typedef struct TU_ATTR_PACKED uint8_t bScheme; char url[]; } tusb_desc_webusb_url_t; +TU_PACK_STRUCT_END // DFU Functional Descriptor +TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; union { + TU_BIT_FIELD_ORDER_BEGIN struct TU_ATTR_PACKED { uint8_t bitCanDnload : 1; uint8_t bitCanUpload : 1; @@ -437,6 +466,7 @@ typedef struct TU_ATTR_PACKED uint8_t bitWillDetach : 1; uint8_t reserved : 4; } bmAttributes; + TU_BIT_FIELD_ORDER_END uint8_t bAttributes; }; @@ -445,17 +475,21 @@ typedef struct TU_ATTR_PACKED uint16_t wTransferSize; uint16_t bcdDFUVersion; } tusb_desc_dfu_functional_t; +TU_PACK_STRUCT_END /*------------------------------------------------------------------*/ /* Types *------------------------------------------------------------------*/ +TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED{ union { + TU_BIT_FIELD_ORDER_BEGIN struct TU_ATTR_PACKED { uint8_t recipient : 5; ///< Recipient type tusb_request_recipient_t. uint8_t type : 2; ///< Request type tusb_request_type_t. uint8_t direction : 1; ///< Direction type. tusb_dir_t } bmRequestType_bit; + TU_BIT_FIELD_ORDER_END uint8_t bmRequestType; }; @@ -465,6 +499,7 @@ typedef struct TU_ATTR_PACKED{ uint16_t wIndex; uint16_t wLength; } tusb_control_request_t; +TU_PACK_STRUCT_END TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct"); -- cgit v1.3.1 From d81a37d1bed3e9a905a1472eaafe2f750892eaac Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 9 Jun 2021 12:10:44 +0700 Subject: fix enum overflow with msp430 --- src/common/tusb_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 3350ed86c..889ad7b25 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -51,7 +51,7 @@ #define U32_TO_U8S_BE(u32) TU_U32_BYTE3(u32), TU_U32_BYTE2(u32), TU_U32_BYTE1(u32), TU_U32_BYTE0(u32) #define U32_TO_U8S_LE(u32) TU_U32_BYTE0(u32), TU_U32_BYTE1(u32), TU_U32_BYTE2(u32), TU_U32_BYTE3(u32) -#define TU_BIT(n) (1U << (n)) +#define TU_BIT(n) (1UL << (n)) //--------------------------------------------------------------------+ // Includes -- cgit v1.3.1 From 572d986a0260543ada22592e3f2216a152ac632d Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 11 Jun 2021 17:14:22 +0700 Subject: improve usbh --- examples/host/cdc_msc_hid/src/hid_app.c | 12 +++++- src/class/hid/hid_host.c | 10 ----- src/common/tusb_common.h | 4 +- src/host/usbh.c | 74 ++++++++++++++++++--------------- src/host/usbh_control.c | 4 +- 5 files changed, 54 insertions(+), 50 deletions(-) (limited to 'src/common') diff --git a/examples/host/cdc_msc_hid/src/hid_app.c b/examples/host/cdc_msc_hid/src/hid_app.c index 23ab12404..817646dab 100644 --- a/examples/host/cdc_msc_hid/src/hid_app.c +++ b/examples/host/cdc_msc_hid/src/hid_app.c @@ -30,7 +30,8 @@ // MACRO TYPEDEF CONSTANT ENUM DECLARATION //--------------------------------------------------------------------+ -// If your host terminal support ansi escape code, it can be use to simulate mouse cursor +// If your host terminal support ansi escape code such as TeraTerm +// it can be use to simulate mouse cursor movement within terminal #define USE_ANSI_ESCAPE 0 #define MAX_REPORT 4 @@ -113,6 +114,13 @@ void tuh_hid_report_received_cb(uint8_t dev_addr, uint8_t instance, uint8_t cons return; } + // For complete list of Usage Page & Usage checkout src/class/hid/hid.h. For examples: + // - Keyboard : Desktop, Keyboard + // - Mouse : Desktop, Mouse + // - Gamepad : Desktop, Gamepad + // - Consumer Control (Media Key) : Consumer, Consumer Control + // - System Control (Power key) : Desktop, System Control + // - Generic (vendor) : 0xFFxx, xx if ( rpt_info->usage_page == HID_USAGE_PAGE_DESKTOP ) { switch (rpt_info->usage) @@ -164,7 +172,7 @@ static void process_kbd_report(hid_keyboard_report_t const *report) }else { // not existed in previous report means the current key is pressed - bool const is_shift = report->modifier & (KEYBOARD_MODIFIER_LEFTSHIFT | KEYBOARD_MODIFIER_RIGHTSHIFT); + bool const is_shift = report->modifier & (KEYBOARD_MODIFIER_LEFTSHIFT | KEYBOARD_MODIFIER_RIGHTSHIFT); uint8_t ch = keycode2ascii[report->keycode[i]][is_shift ? 1 : 0]; putchar(ch); if ( ch == '\r' ) putchar('\n'); // added new line for enter key diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index cde5e23a5..a227c2a86 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -37,16 +37,6 @@ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ -/* - "KEYBOARD" : in_len=8 , out_len=1, usage_page=0x01, usage=0x06 # Generic Desktop, Keyboard - "MOUSE" : in_len=4 , out_len=0, usage_page=0x01, usage=0x02 # Generic Desktop, Mouse - "CONSUMER" : in_len=2 , out_len=0, usage_page=0x0C, usage=0x01 # Consumer, Consumer Control - "SYS_CONTROL" : in_len=1 , out_len=0, usage_page=0x01, usage=0x80 # Generic Desktop, Sys Control - "GAMEPAD" : in_len=6 , out_len=0, usage_page=0x01, usage=0x05 # Generic Desktop, Game Pad - "DIGITIZER" : in_len=5 , out_len=0, usage_page=0x0D, usage=0x02 # Digitizers, Pen - "XAC_COMPATIBLE_GAMEPAD" : in_len=3 , out_len=0, usage_page=0x01, usage=0x05 # Generic Desktop, Game Pad - "RAW" : in_len=64, out_len=0, usage_page=0xFFAF, usage=0xAF # Vendor 0xFFAF "Adafruit", 0xAF - */ typedef struct { uint8_t itf_num; diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 889ad7b25..fe5bf5f41 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -317,8 +317,8 @@ void tu_print_var(uint8_t const* buf, uint32_t bufsize) #define TU_LOG1 tu_printf #define TU_LOG1_MEM tu_print_mem #define TU_LOG1_VAR(_x) tu_print_var((uint8_t const*)(_x), sizeof(*(_x))) -#define TU_LOG1_INT(_x) tu_printf(#_x " = %ld\n", (uint32_t) (_x) ) -#define TU_LOG1_HEX(_x) tu_printf(#_x " = %lX\n", (uint32_t) (_x) ) +#define TU_LOG1_INT(_x) tu_printf(#_x " = %ld\r\n", (uint32_t) (_x) ) +#define TU_LOG1_HEX(_x) tu_printf(#_x " = %lX\r\n", (uint32_t) (_x) ) // Log Level 2: Warn #if CFG_TUSB_DEBUG >= 2 diff --git a/src/host/usbh.c b/src/host/usbh.c index 59246a663..81b9e84af 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -795,6 +795,8 @@ static bool enum_get_addr0_device_desc_complete(uint8_t dev_addr, tusb_control_r return false; } + TU_ASSERT(tu_desc_type(_usbh_ctrl_buf) == TUSB_DESC_DEVICE); + // Reset device again before Set Address TU_LOG2("Port reset \r\n"); @@ -938,7 +940,7 @@ static bool enum_get_config_desc_complete(uint8_t dev_addr, tusb_control_request // Parse configuration & set up drivers // Driver open aren't allowed to make any usb transfer yet - parse_configuration_descriptor(dev_addr, (tusb_desc_configuration_t*) _usbh_ctrl_buf); + TU_ASSERT( parse_configuration_descriptor(dev_addr, (tusb_desc_configuration_t*) _usbh_ctrl_buf) ); TU_LOG2("Set Configuration = %d\r\n", CONFIG_NUM); tusb_control_request_t const new_request = @@ -988,49 +990,53 @@ static bool parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configura // parse each interfaces while( p_desc < _usbh_ctrl_buf + desc_cfg->wTotalLength ) { - // skip until we see interface descriptor - if ( TUSB_DESC_INTERFACE != tu_desc_type(p_desc) ) + tusb_desc_interface_assoc_t const * desc_itf_assoc = NULL; + + // Class will always starts with Interface Association (if any) and then Interface descriptor + if ( TUSB_DESC_INTERFACE_ASSOCIATION == tu_desc_type(p_desc) ) { - p_desc = tu_desc_next(p_desc); // skip the descriptor, increase by the descriptor's length - }else + desc_itf_assoc = (tusb_desc_interface_assoc_t const *) p_desc; + p_desc = tu_desc_next(p_desc); // next to Interface + } + + TU_ASSERT( TUSB_DESC_INTERFACE == tu_desc_type(p_desc) ); + + tusb_desc_interface_t const* desc_itf = (tusb_desc_interface_t const*) p_desc; + + // Check if class is supported + uint8_t drv_id; + for (drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) { - tusb_desc_interface_t const* desc_itf = (tusb_desc_interface_t const*) p_desc; + if ( usbh_class_drivers[drv_id].class_code == desc_itf->bInterfaceClass ) break; + } - // Check if class is supported - uint8_t drv_id; - for (drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) - { - if ( usbh_class_drivers[drv_id].class_code == desc_itf->bInterfaceClass ) break; - } + if( drv_id >= USBH_CLASS_DRIVER_COUNT ) + { + // skip unsupported class + p_desc = tu_desc_next(p_desc); + } + else + { + usbh_class_driver_t const * driver = &usbh_class_drivers[drv_id]; - if( drv_id >= USBH_CLASS_DRIVER_COUNT ) + // Interface number must not be used already TODO alternate interface + TU_ASSERT( dev->itf2drv[desc_itf->bInterfaceNumber] == 0xff ); + dev->itf2drv[desc_itf->bInterfaceNumber] = drv_id; + + if (desc_itf->bInterfaceClass == TUSB_CLASS_HUB && dev->hub_addr != 0) { - // skip unsupported class + // TODO Attach hub to Hub is not currently supported + // skip this interface p_desc = tu_desc_next(p_desc); } else { - usbh_class_driver_t const * driver = &usbh_class_drivers[drv_id]; - - // Interface number must not be used already TODO alternate interface - TU_ASSERT( dev->itf2drv[desc_itf->bInterfaceNumber] == 0xff ); - dev->itf2drv[desc_itf->bInterfaceNumber] = drv_id; + TU_LOG2("%s open\r\n", driver->name); - if (desc_itf->bInterfaceClass == TUSB_CLASS_HUB && dev->hub_addr != 0) - { - // TODO Attach hub to Hub is not currently supported - // skip this interface - p_desc = tu_desc_next(p_desc); - } - else - { - TU_LOG2("%s open\r\n", driver->name); - - uint16_t itf_len = 0; - TU_ASSERT( driver->open(dev->rhport, dev_addr, desc_itf, &itf_len) ); - TU_ASSERT( itf_len >= sizeof(tusb_desc_interface_t) ); - p_desc += itf_len; - } + uint16_t itf_len = 0; + TU_ASSERT( driver->open(dev->rhport, dev_addr, desc_itf, &itf_len) ); + TU_ASSERT( itf_len >= sizeof(tusb_desc_interface_t) ); + p_desc += itf_len; } } } diff --git a/src/host/usbh_control.c b/src/host/usbh_control.c index aa82f14ba..91dbdfe99 100644 --- a/src/host/usbh_control.c +++ b/src/host/usbh_control.c @@ -68,7 +68,7 @@ bool tuh_control_xfer (uint8_t dev_addr, tusb_control_request_t const* request, _ctrl_xfer.stage = STAGE_SETUP; _ctrl_xfer.complete_cb = complete_cb; - TU_LOG2("Send Setup to address %u: ", dev_addr); + TU_LOG2("Control Setup (addr = %u): ", dev_addr); TU_LOG2_VAR(request); TU_LOG2("\r\n"); @@ -119,7 +119,7 @@ bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t resu if (request->wLength) { - TU_LOG2("Control data:\r\n"); + TU_LOG2("Control data (addr = %u):\r\n", dev_addr); TU_LOG2_MEM(_ctrl_xfer.buffer, request->wLength, 2); } -- cgit v1.3.1 From 1c23462b43f47685cf0051568f4bfea5de37d563 Mon Sep 17 00:00:00 2001 From: Wini-Buh Date: Fri, 11 Jun 2021 22:25:36 +0200 Subject: weak atrribute work around removed from CCRX_Port --- src/class/cdc/cdc.h | 54 ++++++++++++----------------- src/class/cdc/cdc_device.c | 23 ++++--------- src/class/cdc/cdc_device.h | 57 ------------------------------- src/common/tusb_compiler.h | 39 --------------------- src/common/tusb_types.h | 42 ++++++----------------- src/device/dcd.h | 30 ---------------- src/device/usbd.c | 61 +++++++++++++-------------------- src/device/usbd.h | 66 ------------------------------------ src/device/usbd_control.c | 6 +--- src/device/usbd_pvt.h | 12 ------- src/portable/renesas/usba/dcd_usba.c | 33 ++++++------------ 11 files changed, 74 insertions(+), 349 deletions(-) (limited to 'src/common') diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h index e5af9fc0c..f59690835 100644 --- a/src/class/cdc/cdc.h +++ b/src/class/cdc/cdc.h @@ -215,8 +215,9 @@ typedef enum // Class Specific Functional Descriptor (Communication Interface) //--------------------------------------------------------------------+ +TU_PACK_STRUCT_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) + /// Header Functional Descriptor (Communication Interface) -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. @@ -224,10 +225,8 @@ typedef struct TU_ATTR_PACKED uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUNC_DESC_ uint16_t bcdCDC ; ///< CDC release number in Binary-Coded Decimal }cdc_desc_func_header_t; -TU_PACK_STRUCT_END /// Union Functional Descriptor (Communication Interface) -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. @@ -236,7 +235,8 @@ typedef struct TU_ATTR_PACKED uint8_t bControlInterface ; ///< Interface number of Communication Interface uint8_t bSubordinateInterface ; ///< Array of Interface number of Data Interface }cdc_desc_func_union_t; -TU_PACK_STRUCT_END + +TU_PACK_STRUCT_END // End of definition of packed structs (used by the CCRX toolchain) #define cdc_desc_func_union_n_t(no_slave)\ TU_PACK_STRUCT_BEGIN \ @@ -249,8 +249,10 @@ TU_PACK_STRUCT_END } \ TU_PACK_STRUCT_END + +TU_PACK_STRUCT_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) + /// Country Selection Functional Descriptor (Communication Interface) -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. @@ -259,7 +261,8 @@ typedef struct TU_ATTR_PACKED uint8_t iCountryCodeRelDate ; ///< Index of a string giving the release date for the implemented ISO 3166 Country Codes. uint16_t wCountryCode ; ///< Country code in the format as defined in [ISO3166], release date as specified inoffset 3 for the first supported country. }cdc_desc_func_country_selection_t; -TU_PACK_STRUCT_END + +TU_PACK_STRUCT_END // End of definition of packed structs (used by the CCRX toolchain) #define cdc_desc_func_country_selection_n_t(no_country) \ TU_PACK_STRUCT_BEGIN \ @@ -276,29 +279,28 @@ TU_PACK_STRUCT_END // PUBLIC SWITCHED TELEPHONE NETWORK (PSTN) SUBCLASS //--------------------------------------------------------------------+ +TU_PACK_STRUCT_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) + /// \brief Call Management Functional Descriptor /// \details This functional descriptor describes the processing of calls for the Communications Class interface. -TU_PACK_STRUCT_BEGIN +TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. uint8_t bDescriptorType ; ///< Descriptor Type, must be Class-Specific uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUCN_DESC_ - TU_BIT_FIELD_ORDER_BEGIN struct { uint8_t handle_call : 1; ///< 0 - Device sends/receives call management information only over the Communications Class interface. 1 - Device can send/receive call management information over a Data Class interface. uint8_t send_recv_call : 1; ///< 0 - Device does not handle call management itself. 1 - Device handles call management itself. uint8_t TU_RESERVED : 6; } bmCapabilities; - TU_BIT_FIELD_ORDER_END uint8_t bDataInterface; }cdc_desc_func_call_management_t; -TU_PACK_STRUCT_END +TU_BIT_FIELD_ORDER_END -TU_PACK_STRUCT_BEGIN TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { @@ -309,13 +311,11 @@ typedef struct TU_ATTR_PACKED uint8_t TU_RESERVED : 4; }cdc_acm_capability_t; TU_BIT_FIELD_ORDER_END -TU_PACK_STRUCT_END TU_VERIFY_STATIC(sizeof(cdc_acm_capability_t) == 1, "mostly problem with compiler"); /// \brief Abstract Control Management Functional Descriptor /// \details This functional descriptor describes the commands supported by by the Communications Class interface with SubClass code of \ref CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. @@ -323,31 +323,27 @@ typedef struct TU_ATTR_PACKED uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUCN_DESC_ cdc_acm_capability_t bmCapabilities ; }cdc_desc_func_acm_t; -TU_PACK_STRUCT_END /// \brief Direct Line Management Functional Descriptor /// \details This functional descriptor describes the commands supported by the Communications Class interface with SubClass code of \ref CDC_FUNC_DESC_DIRECT_LINE_MANAGEMENT -TU_PACK_STRUCT_BEGIN +TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. uint8_t bDescriptorType ; ///< Descriptor Type, must be Class-Specific uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUCN_DESC_ - TU_BIT_FIELD_ORDER_BEGIN struct { uint8_t require_pulse_setup : 1; ///< Device requires extra Pulse_Setup request during pulse dialing sequence to disengage holding circuit. uint8_t support_aux_request : 1; ///< Device supports the request combination of Set_Aux_Line_State, Ring_Aux_Jack, and notification Aux_Jack_Hook_State. uint8_t support_pulse_request : 1; ///< Device supports the request combination of Pulse_Setup, Send_Pulse, and Set_Pulse_Time. uint8_t TU_RESERVED : 5; } bmCapabilities; - TU_BIT_FIELD_ORDER_END }cdc_desc_func_direct_line_management_t; -TU_PACK_STRUCT_END +TU_BIT_FIELD_ORDER_END /// \brief Telephone Ringer Functional Descriptor /// \details The Telephone Ringer functional descriptor describes the ringer capabilities supported by the Communications Class interface, /// with the SubClass code of \ref CDC_COMM_SUBCLASS_TELEPHONE_CONTROL_MODEL -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. @@ -356,38 +352,34 @@ typedef struct TU_ATTR_PACKED uint8_t bRingerVolSteps ; uint8_t bNumRingerPatterns ; }cdc_desc_func_telephone_ringer_t; -TU_PACK_STRUCT_END /// \brief Telephone Operational Modes Functional Descriptor /// \details The Telephone Operational Modes functional descriptor describes the operational modes supported by /// the Communications Class interface, with the SubClass code of \ref CDC_COMM_SUBCLASS_TELEPHONE_CONTROL_MODEL -TU_PACK_STRUCT_BEGIN +TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. uint8_t bDescriptorType ; ///< Descriptor Type, must be Class-Specific uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUCN_DESC_ - TU_BIT_FIELD_ORDER_BEGIN struct { uint8_t simple_mode : 1; uint8_t standalone_mode : 1; uint8_t computer_centric_mode : 1; uint8_t TU_RESERVED : 5; } bmCapabilities; - TU_BIT_FIELD_ORDER_END }cdc_desc_func_telephone_operational_modes_t; -TU_PACK_STRUCT_END +TU_BIT_FIELD_ORDER_END /// \brief Telephone Call and Line State Reporting Capabilities Descriptor /// \details The Telephone Call and Line State Reporting Capabilities functional descriptor describes the abilities of a /// telephone device to report optional call and line states. -TU_PACK_STRUCT_BEGIN +TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. uint8_t bDescriptorType ; ///< Descriptor Type, must be Class-Specific uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUCN_DESC_ - TU_BIT_FIELD_ORDER_BEGIN struct { uint32_t interrupted_dialtone : 1; ///< 0 : Reports only dialtone (does not differentiate between normal and interrupted dialtone). 1 : Reports interrupted dialtone in addition to normal dialtone uint32_t ringback_busy_fastbusy : 1; ///< 0 : Reports only dialing state. 1 : Reports ringback, busy, and fast busy states. @@ -397,9 +389,8 @@ typedef struct TU_ATTR_PACKED uint32_t line_state_change : 1; ///< 0 : Does not support line state change notification. 1 : Does support line state change notification uint32_t TU_RESERVED : 26; } bmCapabilities; - TU_BIT_FIELD_ORDER_END }cdc_desc_func_telephone_call_state_reporting_capabilities_t; -TU_PACK_STRUCT_END +TU_BIT_FIELD_ORDER_END static inline uint8_t cdc_functional_desc_typeof(uint8_t const * p_desc) { @@ -409,7 +400,6 @@ static inline uint8_t cdc_functional_desc_typeof(uint8_t const * p_desc) //--------------------------------------------------------------------+ // Requests //--------------------------------------------------------------------+ -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint32_t bit_rate; @@ -417,11 +407,9 @@ typedef struct TU_ATTR_PACKED uint8_t parity; ///< 0: None - 1: Odd - 2: Even - 3: Mark - 4: Space uint8_t data_bits; ///< can be 5, 6, 7, 8 or 16 } cdc_line_coding_t; -TU_PACK_STRUCT_END TU_VERIFY_STATIC(sizeof(cdc_line_coding_t) == 7, "size is not correct"); -TU_PACK_STRUCT_BEGIN TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { @@ -430,7 +418,9 @@ typedef struct TU_ATTR_PACKED uint16_t : 14; } cdc_line_control_state_t; TU_BIT_FIELD_ORDER_END -TU_PACK_STRUCT_END + +TU_PACK_STRUCT_END // End of definition of packed structs (used by the CCRX toolchain) + TU_VERIFY_STATIC(sizeof(cdc_line_control_state_t) == 2, "size is not correct"); diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c index 57bb804a8..cac811c45 100644 --- a/src/class/cdc/cdc_device.c +++ b/src/class/cdc/cdc_device.c @@ -33,15 +33,6 @@ #include "cdc_device.h" -#if defined(TU_HAS_NO_ATTR_WEAK) -static void (*const MAKE_WEAK_FUNC(tud_cdc_rx_cb))(uint8_t) = TUD_CDC_RX_CB; -static void (*const MAKE_WEAK_FUNC(tud_cdc_rx_wanted_cb))(uint8_t, char) = TUD_CDC_RX_WANTED_CB; -static void (*const MAKE_WEAK_FUNC(tud_cdc_tx_complete_cb))(uint8_t) = TUD_CDC_TX_COMPLETE_CB; -static void (*const MAKE_WEAK_FUNC(tud_cdc_line_state_cb))(uint8_t, bool, bool) = TUD_CDC_LINE_STATE_CB; -static void (*const MAKE_WEAK_FUNC(tud_cdc_line_coding_cb))(uint8_t, cdc_line_coding_t const*) = TUD_CDC_LINE_CODING_CB; -static void (*const MAKE_WEAK_FUNC(tud_cdc_send_break_cb))(uint8_t, uint16_t) = TUD_CDC_SEND_BREAK_CB; -#endif - //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ @@ -370,7 +361,7 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t } else if ( stage == CONTROL_STAGE_ACK) { - if ( MAKE_WEAK_FUNC(tud_cdc_line_coding_cb) ) MAKE_WEAK_FUNC(tud_cdc_line_coding_cb)(itf, &p_cdc->line_coding); + if ( tud_cdc_line_coding_cb ) tud_cdc_line_coding_cb(itf, &p_cdc->line_coding); } break; @@ -405,7 +396,7 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t TU_LOG2(" Set Control Line State: DTR = %d, RTS = %d\r\n", dtr, rts); // Invoke callback - if ( MAKE_WEAK_FUNC(tud_cdc_line_state_cb) ) MAKE_WEAK_FUNC(tud_cdc_line_state_cb)(itf, dtr, rts); + if ( tud_cdc_line_state_cb ) tud_cdc_line_state_cb(itf, dtr, rts); } break; case CDC_REQUEST_SEND_BREAK: @@ -416,7 +407,7 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t else if (stage == CONTROL_STAGE_ACK) { TU_LOG2(" Send Break\r\n"); - if ( MAKE_WEAK_FUNC(tud_cdc_send_break_cb) ) MAKE_WEAK_FUNC(tud_cdc_send_break_cb)(itf, request->wValue); + if ( tud_cdc_send_break_cb ) tud_cdc_send_break_cb(itf, request->wValue); } break; @@ -447,19 +438,19 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_ tu_fifo_write_n(&p_cdc->rx_ff, &p_cdc->epout_buf, xferred_bytes); // Check for wanted char and invoke callback if needed - if ( MAKE_WEAK_FUNC(tud_cdc_rx_wanted_cb) && (((signed char) p_cdc->wanted_char) != -1) ) + if ( tud_cdc_rx_wanted_cb && (((signed char) p_cdc->wanted_char) != -1) ) { for ( uint32_t i = 0; i < xferred_bytes; i++ ) { if ( (p_cdc->wanted_char == p_cdc->epout_buf[i]) && !tu_fifo_empty(&p_cdc->rx_ff) ) { - MAKE_WEAK_FUNC(tud_cdc_rx_wanted_cb)(itf, p_cdc->wanted_char); + tud_cdc_rx_wanted_cb(itf, p_cdc->wanted_char); } } } // invoke receive callback (if there is still data) - if (MAKE_WEAK_FUNC(tud_cdc_rx_cb) && !tu_fifo_empty(&p_cdc->rx_ff) ) MAKE_WEAK_FUNC(tud_cdc_rx_cb)(itf); + if (tud_cdc_rx_cb && !tu_fifo_empty(&p_cdc->rx_ff) ) tud_cdc_rx_cb(itf); // prepare for OUT transaction _prep_out_transaction(p_cdc); @@ -471,7 +462,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_ if ( ep_addr == p_cdc->ep_in ) { // invoke transmit callback to possibly refill tx fifo - if ( MAKE_WEAK_FUNC(tud_cdc_tx_complete_cb) ) MAKE_WEAK_FUNC(tud_cdc_tx_complete_cb)(itf); + if ( tud_cdc_tx_complete_cb ) tud_cdc_tx_complete_cb(itf); if ( 0 == tud_cdc_n_write_flush(itf) ) { diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h index 389516883..7ff757add 100644 --- a/src/class/cdc/cdc_device.h +++ b/src/class/cdc/cdc_device.h @@ -129,7 +129,6 @@ static inline bool tud_cdc_write_clear (void); // Application Callback API (weak is optional) //--------------------------------------------------------------------+ -#if !defined(TU_HAS_NO_ATTR_WEAK) // Invoked when received new data TU_ATTR_WEAK void tud_cdc_rx_cb(uint8_t itf); @@ -148,62 +147,6 @@ TU_ATTR_WEAK void tud_cdc_line_coding_cb(uint8_t itf, cdc_line_coding_t const* p // Invoked when received send break TU_ATTR_WEAK void tud_cdc_send_break_cb(uint8_t itf, uint16_t duration_ms); -#else - #if ADD_WEAK_FUNC_TUD_CDC_RX_CB - #define TUD_CDC_RX_CB tud_cdc_rx_cb - #endif - #ifndef TUD_CDC_RX_CB - #define TUD_CDC_RX_CB NULL - #else - extern void TUD_CDC_RX_CB(uint8_t itf); - #endif - - #if ADD_WEAK_FUNC_TUD_CDC_RX_WANTED_CB - #define TUD_CDC_RX_WANTED_CB tud_cdc_rx_wanted_cb - #endif - #ifndef TUD_CDC_RX_WANTED_CB - #define TUD_CDC_RX_WANTED_CB NULL - #else - extern void TUD_CDC_RX_WANTED_CB(uint8_t itf, char wanted_char); - #endif - - #if ADD_WEAK_FUNC_TUD_CDC_TX_COMPLETE_CB - #define TUD_CDC_TX_COMPLETE_CB tud_cdc_tx_complete_cb - #endif - #ifndef TUD_CDC_TX_COMPLETE_CB - #define TUD_CDC_TX_COMPLETE_CB NULL - #else - extern void TUD_CDC_TX_COMPLETE_CB(uint8_t itf); - #endif - - #if ADD_WEAK_FUNC_TUD_CDC_LINE_STATE_CB - #define TUD_CDC_LINE_STATE_CB tud_cdc_line_state_cb - #endif - #ifndef TUD_CDC_LINE_STATE_CB - #define TUD_CDC_LINE_STATE_CB NULL - #else - extern void TUD_CDC_LINE_STATE_CB(uint8_t itf, bool dtr, bool rts); - #endif - - #if ADD_WEAK_FUNC_TUD_CDC_LINE_CODING_CB - #define TUD_CDC_LINE_CODING_CB tud_cdc_line_coding_cb - #endif - #ifndef TUD_CDC_LINE_CODING_CB - #define TUD_CDC_LINE_CODING_CB NULL - #else - extern void TUD_CDC_LINE_CODING_CB(uint8_t itf, cdc_line_coding_t const* p_line_coding); - #endif - - #if ADD_WEAK_FUNC_TUD_CDC_SEND_BREAK_CB - #define TUD_CDC_SEND_BREAK_CB tud_cdc_send_break_cb - #endif - #ifndef TUD_CDC_SEND_BREAK_CB - #define TUD_CDC_SEND_BREAK_CB NULL - #else - extern void TUD_CDC_SEND_BREAK_CB(uint8_t itf, uint16_t duration_ms); - #endif -#endif - //--------------------------------------------------------------------+ // Inline Functions //--------------------------------------------------------------------+ diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 508bb126e..f77cf94ee 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -64,9 +64,6 @@ // Compiler porting with Attribute and Endian //--------------------------------------------------------------------+ -// define the standard definition of this macro to construct a "weak" function name -#define MAKE_WEAK_FUNC(func_name) func_name - // TODO refactor since __attribute__ is supported across many compiler #if defined(__GNUC__) #define TU_ATTR_ALIGNED(Bytes) __attribute__ ((aligned(Bytes))) @@ -171,42 +168,6 @@ the aligned attribute (or something similar yet) */ #define TU_HAS_NO_ATTR_ALIGNED - /* activate the "weak" function emulation, because this toolchain does not - know the weak attribute (or something similar yet) */ - #define TU_HAS_NO_ATTR_WEAK - - // make sure to define away the standard definition of this macro - #undef MAKE_WEAK_FUNC - // Helper macro to construct a "weak" function name - #define MAKE_WEAK_FUNC(func_name) weak_ ## func_name - - #if defined(TU_HAS_NO_ATTR_WEAK) - // "Weak function" emulation defined in cdc_device.h - #define ADD_WEAK_FUNC_TUD_CDC_RX_CB 0 - #define ADD_WEAK_FUNC_TUD_CDC_RX_WANTED_CB 0 - #define ADD_WEAK_FUNC_TUD_CDC_TX_COMPLETE_CB 0 - #define ADD_WEAK_FUNC_TUD_CDC_LINE_STATE_CB 0 - #define ADD_WEAK_FUNC_TUD_CDC_LINE_CODING_CB 0 - #define ADD_WEAK_FUNC_TUD_CDC_SEND_BREAK_CB 0 - - // "Weak function" emulation defined in usbd_pvt.h - #define ADD_WEAK_FUNC_USBD_APP_DRIVER_GET_CB 0 - - // "Weak function" emulation defined in usbd.h - #define ADD_WEAK_FUNC_TUD_DESCRIPTOR_BOS_CB 0 - #define ADD_WEAK_FUNC_TUD_DESCRIPTOR_DEVICE_QUALIFIER_CB 0 - #define ADD_WEAK_FUNC_TUD_MOUNT_CB 0 - #define ADD_WEAK_FUNC_TUD_UMOUNT_CB 0 - #define ADD_WEAK_FUNC_TUD_SUSPEND_CB 0 - #define ADD_WEAK_FUNC_TUD_RESUME_CB 0 - #define ADD_WEAK_FUNC_TUD_VENDOR_CONTROL_XFER_CB 0 - - // "Weak function" emulation defined in dcd.h - #define ADD_WEAK_FUNC_DCD_EDPT0_STATUS_COMPLETE 0 - #define ADD_WEAK_FUNC_DCD_EDPT_CLOSE 0 - #define ADD_WEAK_FUNC_DCD_EDPT_XFER_FIFO 0 - #endif - #else #error "Compiler attribute porting is required" #endif diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index b20ea2974..a8a4d21e5 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -262,8 +262,9 @@ enum // USB Descriptors //--------------------------------------------------------------------+ +TU_PACK_STRUCT_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) + /// USB Device Descriptor -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. @@ -284,12 +285,10 @@ typedef struct TU_ATTR_PACKED uint8_t bNumConfigurations ; ///< Number of possible configurations. } tusb_desc_device_t; -TU_PACK_STRUCT_END TU_VERIFY_STATIC( sizeof(tusb_desc_device_t) == 18, "size is not correct"); // USB Binary Device Object Store (BOS) Descriptor -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes @@ -297,10 +296,8 @@ typedef struct TU_ATTR_PACKED uint16_t wTotalLength ; ///< Total length of data returned for this descriptor uint8_t bNumDeviceCaps ; ///< Number of device capability descriptors in the BOS } tusb_desc_bos_t; -TU_PACK_STRUCT_END /// USB Configuration Descriptor -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes @@ -313,10 +310,8 @@ typedef struct TU_ATTR_PACKED uint8_t bmAttributes ; ///< Configuration characteristics \n D7: Reserved (set to one)\n D6: Self-powered \n D5: Remote Wakeup \n D4...0: Reserved (reset to zero) \n D7 is reserved and must be set to one for historical reasons. \n A device configuration that uses power from the bus and a local source reports a non-zero value in bMaxPower to indicate the amount of bus power required and sets D6. The actual power source at runtime may be determined using the GetStatus(DEVICE) request (see USB 2.0 spec Section 9.4.5). \n If a device configuration supports remote wakeup, D5 is set to one. uint8_t bMaxPower ; ///< Maximum power consumption of the USB device from the bus in this specific configuration when the device is fully operational. Expressed in 2 mA units (i.e., 50 = 100 mA). } tusb_desc_configuration_t; -TU_PACK_STRUCT_END /// USB Interface Descriptor -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes @@ -330,10 +325,9 @@ typedef struct TU_ATTR_PACKED uint8_t bInterfaceProtocol ; ///< Protocol code (assigned by the USB). \n These codes are qualified by the value of the bInterfaceClass and the bInterfaceSubClass fields. If an interface supports class-specific requests, this code identifies the protocols that the device uses as defined by the specification of the device class. \li If this field is reset to zero, the device does not use a class-specific protocol on this interface. \li If this field is set to FFH, the device uses a vendor-specific protocol for this interface. uint8_t iInterface ; ///< Index of string descriptor describing this interface } tusb_desc_interface_t; -TU_PACK_STRUCT_END /// USB Endpoint Descriptor -TU_PACK_STRUCT_BEGIN +TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes @@ -341,14 +335,12 @@ typedef struct TU_ATTR_PACKED uint8_t bEndpointAddress ; ///< The address of the endpoint on the USB device described by this descriptor. The address is encoded as follows: \n Bit 3...0: The endpoint number \n Bit 6...4: Reserved, reset to zero \n Bit 7: Direction, ignored for control endpoints 0 = OUT endpoint 1 = IN endpoint. - TU_BIT_FIELD_ORDER_BEGIN struct TU_ATTR_PACKED { uint8_t xfer : 2; uint8_t sync : 2; uint8_t usage : 2; uint8_t : 2; } bmAttributes ; ///< This field describes the endpoint's attributes when it is configured using the bConfigurationValue. \n Bits 1..0: Transfer Type \n- 00 = Control \n- 01 = Isochronous \n- 10 = Bulk \n- 11 = Interrupt \n If not an isochronous endpoint, bits 5..2 are reserved and must be set to zero. If isochronous, they are defined as follows: \n Bits 3..2: Synchronization Type \n- 00 = No Synchronization \n- 01 = Asynchronous \n- 10 = Adaptive \n- 11 = Synchronous \n Bits 5..4: Usage Type \n- 00 = Data endpoint \n- 01 = Feedback endpoint \n- 10 = Implicit feedback Data endpoint \n- 11 = Reserved \n Refer to Chapter 5 of USB 2.0 specification for more information. \n All other bits are reserved and must be reset to zero. Reserved bits must be ignored by the host. - TU_BIT_FIELD_ORDER_END struct TU_ATTR_PACKED { #if defined(__CCRX__) @@ -363,10 +355,9 @@ typedef struct TU_ATTR_PACKED uint8_t bInterval ; ///< Interval for polling endpoint for data transfers. Expressed in frames or microframes depending on the device operating speed (i.e., either 1 millisecond or 125 us units). \n- For full-/high-speed isochronous endpoints, this value must be in the range from 1 to 16. The bInterval value is used as the exponent for a \f$ 2^(bInterval-1) \f$ value; e.g., a bInterval of 4 means a period of 8 (\f$ 2^(4-1) \f$). \n- For full-/low-speed interrupt endpoints, the value of this field may be from 1 to 255. \n- For high-speed interrupt endpoints, the bInterval value is used as the exponent for a \f$ 2^(bInterval-1) \f$ value; e.g., a bInterval of 4 means a period of 8 (\f$ 2^(4-1) \f$) . This value must be from 1 to 16. \n- For high-speed bulk/control OUT endpoints, the bInterval must specify the maximum NAK rate of the endpoint. A value of 0 indicates the endpoint never NAKs. Other values indicate at most 1 NAK each bInterval number of microframes. This value must be in the range from 0 to 255. \n Refer to Chapter 5 of USB 2.0 specification for more information. } tusb_desc_endpoint_t; -TU_PACK_STRUCT_END +TU_BIT_FIELD_ORDER_END /// USB Other Speed Configuration Descriptor -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of descriptor @@ -379,10 +370,8 @@ typedef struct TU_ATTR_PACKED uint8_t bmAttributes ; ///< Same as Configuration descriptor uint8_t bMaxPower ; ///< Same as Configuration descriptor } tusb_desc_other_speed_t; -TU_PACK_STRUCT_END /// USB Device Qualifier Descriptor -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of descriptor @@ -396,10 +385,8 @@ typedef struct TU_ATTR_PACKED uint8_t bNumConfigurations ; ///< Number of Other-speed Configurations uint8_t bReserved ; ///< Reserved for future use, must be zero } tusb_desc_device_qualifier_t; -TU_PACK_STRUCT_END /// USB Interface Association Descriptor (IAD ECN) -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of descriptor @@ -414,20 +401,16 @@ typedef struct TU_ATTR_PACKED uint8_t iFunction ; ///< Index of the string descriptor describing the interface association. } tusb_desc_interface_assoc_t; -TU_PACK_STRUCT_END // USB String Descriptor -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes uint8_t bDescriptorType ; ///< Descriptor Type uint16_t unicode_string[]; } tusb_desc_string_t; -TU_PACK_STRUCT_END // USB Binary Device Object Store (BOS) -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength; @@ -437,10 +420,8 @@ typedef struct TU_ATTR_PACKED uint8_t PlatformCapabilityUUID[16]; uint8_t CapabilityData[]; } tusb_desc_bos_platform_t; -TU_PACK_STRUCT_END // USB WebuSB URL Descriptor -TU_PACK_STRUCT_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength; @@ -448,17 +429,15 @@ typedef struct TU_ATTR_PACKED uint8_t bScheme; char url[]; } tusb_desc_webusb_url_t; -TU_PACK_STRUCT_END // DFU Functional Descriptor -TU_PACK_STRUCT_BEGIN +TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; union { - TU_BIT_FIELD_ORDER_BEGIN struct TU_ATTR_PACKED { uint8_t bitCanDnload : 1; uint8_t bitCanUpload : 1; @@ -466,7 +445,6 @@ typedef struct TU_ATTR_PACKED uint8_t bitWillDetach : 1; uint8_t reserved : 4; } bmAttributes; - TU_BIT_FIELD_ORDER_END uint8_t bAttributes; }; @@ -475,21 +453,19 @@ typedef struct TU_ATTR_PACKED uint16_t wTransferSize; uint16_t bcdDFUVersion; } tusb_desc_dfu_functional_t; -TU_PACK_STRUCT_END +TU_BIT_FIELD_ORDER_END /*------------------------------------------------------------------*/ /* Types *------------------------------------------------------------------*/ -TU_PACK_STRUCT_BEGIN +TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED{ union { - TU_BIT_FIELD_ORDER_BEGIN struct TU_ATTR_PACKED { uint8_t recipient : 5; ///< Recipient type tusb_request_recipient_t. uint8_t type : 2; ///< Request type tusb_request_type_t. uint8_t direction : 1; ///< Direction type. tusb_dir_t } bmRequestType_bit; - TU_BIT_FIELD_ORDER_END uint8_t bmRequestType; }; @@ -499,7 +475,9 @@ typedef struct TU_ATTR_PACKED{ uint16_t wIndex; uint16_t wLength; } tusb_control_request_t; -TU_PACK_STRUCT_END +TU_BIT_FIELD_ORDER_END + +TU_PACK_STRUCT_END // End of definition of packed structs (used by the CCRX toolchain) TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct"); diff --git a/src/device/dcd.h b/src/device/dcd.h index d68f9baa7..25cfafc4b 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -117,7 +117,6 @@ void dcd_disconnect(uint8_t rhport) TU_ATTR_WEAK; // Endpoint API //--------------------------------------------------------------------+ -#if !defined(TU_HAS_NO_ATTR_WEAK) // Invoked when a control transfer's status stage is complete. // May help DCD to prepare for next control transfer, this API is optional. void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * request) TU_ATTR_WEAK; @@ -130,35 +129,6 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) TU_ATTR_WEAK; // This API is optional, may be useful for register-based for transferring data. bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes) TU_ATTR_WEAK; -#else - #if ADD_WEAK_FUNC_DCD_EDPT0_STATUS_COMPLETE - #define DCD_EDPT0_STATUS_COMPLETE dcd_edpt0_status_complete - #endif - #ifndef DCD_EDPT0_STATUS_COMPLETE - #define DCD_EDPT0_STATUS_COMPLETE NULL - #else - extern void DCD_EDPT0_STATUS_COMPLETE(uint8_t rhport, tusb_control_request_t const * request); - #endif - - #if ADD_WEAK_FUNC_DCD_EDPT_CLOSE - #define DCD_EDPT_CLOSE dcd_edpt_close - #endif - #ifndef DCD_EDPT_CLOSE - #define DCD_EDPT_CLOSE NULL - #else - extern void DCD_EDPT_CLOSE(uint8_t rhport, uint8_t ep_addr); - #endif - - #if ADD_WEAK_FUNC_DCD_EDPT_XFER_FIFO - #define DCD_EDPT_XFER_FIFO dcd_edpt_xfer_fifo - #endif - #ifndef DCD_EDPT_XFER_FIFO - #define DCD_EDPT_XFER_FIFO NULL - #else - extern void DCD_EDPT_XFER_FIFO(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes); - #endif -#endif - // Configure endpoint's registers according to descriptor bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc); diff --git a/src/device/usbd.c b/src/device/usbd.c index 389ba4a4e..49c9279bf 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -33,19 +33,6 @@ #include "device/usbd_pvt.h" #include "device/dcd.h" -#if defined(TU_HAS_NO_ATTR_WEAK) -static uint8_t const* (*const MAKE_WEAK_FUNC(tud_descriptor_bos_cb))(void) = TUD_DESCRIPTOR_BOS_CB; -static uint8_t const* (*const MAKE_WEAK_FUNC(tud_descriptor_device_qualifier_cb))(void) = TUD_DESCRIPTOR_DEVICE_QUALIFIER_CB; -static void (*const MAKE_WEAK_FUNC(tud_mount_cb))(void) = TUD_MOUNT_CB; -static void (*const MAKE_WEAK_FUNC(tud_umount_cb))(void) = TUD_UMOUNT_CB; -static void (*const MAKE_WEAK_FUNC(tud_suspend_cb))(_Bool) = TUD_SUSPEND_CB; -static void (*const MAKE_WEAK_FUNC(tud_resume_cb))(void) = TUD_RESUME_CB; -static _Bool (*const MAKE_WEAK_FUNC(tud_vendor_control_xfer_cb))(uint8_t, uint8_t, tusb_control_request_t const *) = TUD_RESUME_CB; -static usbd_class_driver_t const* (*const MAKE_WEAK_FUNC(usbd_app_driver_get_cb))(uint8_t*) = USBD_APP_DRIVER_GET_CB; -static bool (*const MAKE_WEAK_FUNC(dcd_edpt_xfer_fifo))(uint8_t, uint8_t, tu_fifo_t *, uint16_t) = DCD_EDPT_XFER_FIFO; -static void (*const MAKE_WEAK_FUNC(dcd_edpt_close))(uint8_t, uint8_t) = DCD_EDPT_CLOSE; -#endif - #ifndef CFG_TUD_TASK_QUEUE_SZ #define CFG_TUD_TASK_QUEUE_SZ 16 #endif @@ -61,10 +48,11 @@ static void (*const MAKE_WEAK_FUNC(dcd_edpt_close))(uint8_t, uint8_t) = DCD_EDPT // Invalid driver ID in itf2drv[] ep2drv[][] mapping enum { DRVID_INVALID = 0xFFu }; +TU_PACK_STRUCT_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) + +TU_BIT_FIELD_ORDER_BEGIN typedef struct { - TU_PACK_STRUCT_BEGIN - TU_BIT_FIELD_ORDER_BEGIN struct TU_ATTR_PACKED { volatile uint8_t connected : 1; @@ -75,8 +63,6 @@ typedef struct uint8_t remote_wakeup_support : 1; // configuration descriptor's attribute uint8_t self_powered : 1; // configuration descriptor's attribute }; - TU_BIT_FIELD_ORDER_END - TU_PACK_STRUCT_END volatile uint8_t cfg_num; // current active configuration (0x00 is not configured) uint8_t speed; @@ -84,8 +70,6 @@ typedef struct uint8_t itf2drv[16]; // map interface number to driver (0xff is invalid) uint8_t ep2drv[CFG_TUD_EP_MAX][2]; // map endpoint to driver ( 0xff is invalid ) - TU_PACK_STRUCT_BEGIN - TU_BIT_FIELD_ORDER_BEGIN struct TU_ATTR_PACKED { volatile bool busy : 1; @@ -94,10 +78,11 @@ typedef struct // TODO merge ep2drv here, 4-bit should be sufficient }ep_status[CFG_TUD_EP_MAX][2]; - TU_BIT_FIELD_ORDER_END - TU_PACK_STRUCT_END }usbd_device_t; +TU_BIT_FIELD_ORDER_END + +TU_PACK_STRUCT_END // End of definition of packed structs (used by the CCRX toolchain) static usbd_device_t _usbd_dev; @@ -257,7 +242,7 @@ static uint8_t _app_driver_count = 0; static inline usbd_class_driver_t const * get_driver(uint8_t drvid) { // Application drivers - if ( MAKE_WEAK_FUNC(usbd_app_driver_get_cb) ) + if ( usbd_app_driver_get_cb ) { if ( drvid < _app_driver_count ) return &_app_driver[drvid]; drvid -= _app_driver_count; @@ -429,9 +414,9 @@ bool tud_init (uint8_t rhport) TU_ASSERT(_usbd_q); // Get application driver if available - if ( MAKE_WEAK_FUNC(usbd_app_driver_get_cb) ) + if ( usbd_app_driver_get_cb ) { - _app_driver = MAKE_WEAK_FUNC(usbd_app_driver_get_cb)(&_app_driver_count); + _app_driver = usbd_app_driver_get_cb(&_app_driver_count); } // Init class drivers @@ -522,7 +507,7 @@ void tud_task (void) usbd_reset(event.rhport); // invoke callback - if (MAKE_WEAK_FUNC(tud_umount_cb)) MAKE_WEAK_FUNC(tud_umount_cb)(); + if (tud_umount_cb) tud_umount_cb(); break; case DCD_EVENT_SETUP_RECEIVED: @@ -578,12 +563,12 @@ void tud_task (void) case DCD_EVENT_SUSPEND: TU_LOG2("\r\n"); - if (MAKE_WEAK_FUNC(tud_suspend_cb)) MAKE_WEAK_FUNC(tud_suspend_cb)(_usbd_dev.remote_wakeup_en); + if (tud_suspend_cb) tud_suspend_cb(_usbd_dev.remote_wakeup_en); break; case DCD_EVENT_RESUME: TU_LOG2("\r\n"); - if (MAKE_WEAK_FUNC(tud_resume_cb)) MAKE_WEAK_FUNC(tud_resume_cb)(); + if (tud_resume_cb) tud_resume_cb(); break; case DCD_EVENT_SOF: @@ -630,10 +615,10 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const // Vendor request if ( p_request->bmRequestType_bit.type == TUSB_REQ_TYPE_VENDOR ) { - TU_VERIFY(MAKE_WEAK_FUNC(tud_vendor_control_xfer_cb)); + TU_VERIFY(tud_vendor_control_xfer_cb); - usbd_control_set_complete_callback(MAKE_WEAK_FUNC(tud_vendor_control_xfer_cb)); - return MAKE_WEAK_FUNC(tud_vendor_control_xfer_cb)(rhport, CONTROL_STAGE_SETUP, p_request); + usbd_control_set_complete_callback(tud_vendor_control_xfer_cb); + return tud_vendor_control_xfer_cb(rhport, CONTROL_STAGE_SETUP, p_request); } #if CFG_TUSB_DEBUG >= 2 @@ -913,7 +898,7 @@ static bool process_set_config(uint8_t rhport, uint8_t cfg_num) } // invoke callback - if (MAKE_WEAK_FUNC(tud_mount_cb)) MAKE_WEAK_FUNC(tud_mount_cb)(); + if (tud_mount_cb) tud_mount_cb(); return true; } @@ -970,9 +955,9 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const TU_LOG2(" BOS\r\n"); // requested by host if USB > 2.0 ( i.e 2.1 or 3.x ) - if (!MAKE_WEAK_FUNC(tud_descriptor_bos_cb)) return false; + if (!tud_descriptor_bos_cb) return false; - tusb_desc_bos_t const* desc_bos = (tusb_desc_bos_t const*)MAKE_WEAK_FUNC(tud_descriptor_bos_cb)(); + tusb_desc_bos_t const* desc_bos = (tusb_desc_bos_t const*)tud_descriptor_bos_cb(); uint16_t total_len; // Use offsetof to avoid pointer to the odd/misaligned address @@ -1016,9 +1001,9 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const // Host sends this request to ask why our device with USB BCD from 2.0 // but is running at Full/Low Speed. If not highspeed capable stall this request, // otherwise return the descriptor that could work in highspeed mode - if (MAKE_WEAK_FUNC(tud_descriptor_device_qualifier_cb)) + if (tud_descriptor_device_qualifier_cb) { - uint8_t const* desc_qualifier = MAKE_WEAK_FUNC(tud_descriptor_device_qualifier_cb)(); + uint8_t const* desc_qualifier = tud_descriptor_device_qualifier_cb(); TU_ASSERT(desc_qualifier); // first byte of descriptor is its size @@ -1306,7 +1291,7 @@ bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16 // and usbd task can preempt and clear the busy _usbd_dev.ep_status[epnum][dir].busy = true; - if (MAKE_WEAK_FUNC(dcd_edpt_xfer_fifo)(rhport, ep_addr, ff, total_bytes)) + if (dcd_edpt_xfer_fifo(rhport, ep_addr, ff, total_bytes)) { TU_LOG2("OK\r\n"); return true; @@ -1369,10 +1354,10 @@ bool usbd_edpt_stalled(uint8_t rhport, uint8_t ep_addr) */ void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr) { - TU_ASSERT(MAKE_WEAK_FUNC(dcd_edpt_close), /**/); + TU_ASSERT(dcd_edpt_close, /**/); TU_LOG2(" CLOSING Endpoint: 0x%02X\r\n", ep_addr); - MAKE_WEAK_FUNC(dcd_edpt_close(rhport, ep_addr)); + dcd_edpt_close(rhport, ep_addr); return; } diff --git a/src/device/usbd.h b/src/device/usbd.h index 67f1e2913..57c80fed1 100644 --- a/src/device/usbd.h +++ b/src/device/usbd.h @@ -111,7 +111,6 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index); // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid); -#if !defined(TU_HAS_NO_ATTR_WEAK) // Invoked when received GET BOS DESCRIPTOR request // Application return pointer to descriptor TU_ATTR_WEAK uint8_t const * tud_descriptor_bos_cb(void); @@ -136,71 +135,6 @@ TU_ATTR_WEAK void tud_resume_cb(void); // Invoked when received control request with VENDOR TYPE TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request); -#else - #if ADD_WEAK_FUNC_TUD_DESCRIPTOR_BOS_CB - #define TUD_DESCRIPTOR_BOS_CB tud_descriptor_bos_cb - #endif - #ifndef TUD_DESCRIPTOR_BOS_CB - #define TUD_DESCRIPTOR_BOS_CB NULL - #else - extern uint8_t const* TUD_DESCRIPTOR_BOS_CB(void); - #endif - - #if ADD_WEAK_FUNC_TUD_DESCRIPTOR_DEVICE_QUALIFIER_CB - #define TUD_DESCRIPTOR_DEVICE_QUALIFIER_CB tud_descriptor_device_qualifier_cb - #endif - #ifndef TUD_DESCRIPTOR_DEVICE_QUALIFIER_CB - #define TUD_DESCRIPTOR_DEVICE_QUALIFIER_CB NULL - #else - extern uint8_t const* TUD_DESCRIPTOR_DEVICE_QUALIFIER_CB(void); - #endif - - #if ADD_WEAK_FUNC_TUD_MOUNT_CB - #define TUD_MOUNT_CB tud_mount_cb - #endif - #ifndef TUD_MOUNT_CB - #define TUD_MOUNT_CB NULL - #else - extern void TUD_MOUNT_CB(void); - #endif - - #if ADD_WEAK_FUNC_TUD_UMOUNT_CB - #define TUD_UMOUNT_CB tud_umount_cb - #endif - #ifndef TUD_UMOUNT_CB - #define TUD_UMOUNT_CB NULL - #else - extern void TUD_UMOUNT_CB(void); - #endif - - #if ADD_WEAK_FUNC_TUD_SUSPEND_CB - #define TUD_SUSPEND_CB tud_suspend_cb - #endif - #ifndef TUD_SUSPEND_CB - #define TUD_SUSPEND_CB NULL - #else - extern void TUD_SUSPEND_CB(bool remote_wakeup_en); - #endif - - #if ADD_WEAK_FUNC_TUD_RESUME_CB - #define TUD_RESUME_CB tud_resume_cb - #endif - #ifndef TUD_RESUME_CB - #define TUD_RESUME_CB NULL - #else - extern void TUD_RESUME_CB(void); - #endif - - #if ADD_WEAK_FUNC_TUD_VENDOR_CONTROL_XFER_CB - #define TUD_VENDOR_CONTROL_XFER_CB tud_vendor_control_xfer_cb - #endif - #ifndef TUD_VENDOR_CONTROL_XFER_CB - #define TUD_VENDOR_CONTROL_XFER_CB NULL - #else - extern bool TUD_VENDOR_CONTROL_XFER_CB(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request); - #endif -#endif - //--------------------------------------------------------------------+ // Binary Device Object Store (BOS) Descriptor Templates //--------------------------------------------------------------------+ diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c index 76f999f86..b3bab2e32 100644 --- a/src/device/usbd_control.c +++ b/src/device/usbd_control.c @@ -36,10 +36,6 @@ extern void usbd_driver_print_control_complete_name(usbd_control_xfer_cb_t callback); #endif -#if defined(TU_HAS_NO_ATTR_WEAK) -static void (*const MAKE_WEAK_FUNC(dcd_edpt0_status_complete))(uint8_t, tusb_control_request_t const *) = DCD_EDPT0_STATUS_COMPLETE; -#endif - enum { EDPT_CTRL_OUT = 0x00, @@ -184,7 +180,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result TU_ASSERT(0 == xferred_bytes); // invoke optional dcd hook if available - if (MAKE_WEAK_FUNC(dcd_edpt0_status_complete)) MAKE_WEAK_FUNC(dcd_edpt0_status_complete)(rhport, &_ctrl_xfer.request); + if (dcd_edpt0_status_complete) dcd_edpt0_status_complete(rhport, &_ctrl_xfer.request); if (_ctrl_xfer.complete_cb) { diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h index c814353ae..bb2267d40 100644 --- a/src/device/usbd_pvt.h +++ b/src/device/usbd_pvt.h @@ -51,22 +51,10 @@ typedef struct void (* sof ) (uint8_t rhport); /* optional */ } usbd_class_driver_t; -#if !defined(TU_HAS_NO_ATTR_WEAK) // Invoked when initializing device stack to get additional class drivers. // Can optionally implemented by application to extend/overwrite class driver support. // Note: The drivers array must be accessible at all time when stack is active usbd_class_driver_t const* usbd_app_driver_get_cb(uint8_t* driver_count) TU_ATTR_WEAK; -#else - #if ADD_WEAK_FUNC_USBD_APP_DRIVER_GET_CB - #define USBD_APP_DRIVER_GET_CB usbd_app_driver_get_cb - #endif - #ifndef USBD_APP_DRIVER_GET_CB - #define USBD_APP_DRIVER_GET_CB NULL - #else - extern usbd_class_driver_t const* USBD_APP_DRIVER_GET_CB(uint8_t* driver_count); - #endif -#endif - typedef bool (*usbd_control_xfer_cb_t)(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request); diff --git a/src/portable/renesas/usba/dcd_usba.c b/src/portable/renesas/usba/dcd_usba.c index 0e7881383..13fc50ae5 100644 --- a/src/portable/renesas/usba/dcd_usba.c +++ b/src/portable/renesas/usba/dcd_usba.c @@ -90,45 +90,47 @@ #define FIFO_REQ_CLR (1u) #define FIFO_COMPLETE (1u<<1) +TU_BIT_FIELD_ORDER_BEGIN typedef struct { union { - TU_BIT_FIELD_ORDER_BEGIN struct { uint16_t : 8; uint16_t TRCLR: 1; uint16_t TRENB: 1; uint16_t : 0; }; - TU_BIT_FIELD_ORDER_END uint16_t TRE; }; uint16_t TRN; } reg_pipetre_t; +TU_BIT_FIELD_ORDER_END +TU_BIT_FIELD_ORDER_BEGIN typedef union { - TU_BIT_FIELD_ORDER_BEGIN struct { volatile uint16_t u8: 8; volatile uint16_t : 0; }; - TU_BIT_FIELD_ORDER_END volatile uint16_t u16; } hw_fifo_t; +TU_BIT_FIELD_ORDER_END -TU_PACK_STRUCT_BEGIN +TU_PACK_STRUCT_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) + +TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uintptr_t addr; /* the start address of a transfer data buffer */ uint16_t length; /* the number of bytes in the buffer */ uint16_t remaining; /* the number of bytes remaining in the buffer */ - TU_BIT_FIELD_ORDER_BEGIN struct { uint32_t ep : 8; /* an assigned endpoint address */ uint32_t : 0; }; - TU_BIT_FIELD_ORDER_END } pipe_state_t; -TU_PACK_STRUCT_END +TU_BIT_FIELD_ORDER_END + +TU_PACK_STRUCT_END // End of definition of packed structs (used by the CCRX toolchain) typedef struct { @@ -259,12 +261,6 @@ static int fifo_write(volatile void *fifo, pipe_state_t* pipe, unsigned mps) hw_fifo_t *reg = (hw_fifo_t*)fifo; uintptr_t addr = pipe->addr + pipe->length - rem; - if (addr & 1u) { - /* addr is not 2-byte aligned */ - reg->u8 = *(const uint8_t *)addr; - ++addr; - --len; - } while (len >= 2) { reg->u16 = *(const uint16_t *)addr; addr += 2; @@ -306,17 +302,10 @@ static void process_setup_packet(uint8_t rhport) uint16_t setup_packet[4]; if (0 == (USB0.INTSTS0.WORD & USB_IS0_VALID)) return; USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR; - setup_packet[0] = USB0.USBREQ.WORD; + setup_packet[0] = tu_le16toh(USB0.USBREQ.WORD); setup_packet[1] = USB0.USBVAL; setup_packet[2] = USB0.USBINDX; setup_packet[3] = USB0.USBLENG; -#if TU_BYTE_ORDER==TU_BIG_ENDIAN - #if defined(__CCRX__) - setup_packet[0] = tu_le16toh(setup_packet[0]); - #else - //FIXME needs to implemented for other tool chains - #endif -#endif USB0.INTSTS0.WORD = ~USB_IS0_VALID; dcd_event_setup_received(rhport, (const uint8_t*)&setup_packet[0], true); } -- cgit v1.3.1 From a4ad064e638679a7c8759a2c30ed555bd93e524b Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 12 Jun 2021 14:20:09 +0700 Subject: increase example CFG_TUH_HID from 2 to 4 --- examples/host/cdc_msc_hid/src/tusb_config.h | 2 +- src/common/tusb_verify.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/common') diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index 8253964c0..531bb2c30 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -76,7 +76,7 @@ #define CFG_TUH_HUB 1 #define CFG_TUH_CDC 1 -#define CFG_TUH_HID 2 +#define CFG_TUH_HID 4 #define CFG_TUH_MSC 1 #define CFG_TUH_VENDOR 0 diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index 542809899..56ba8bcd1 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -75,7 +75,7 @@ #if CFG_TUSB_DEBUG #include #define _MESS_ERR(_err) tu_printf("%s %d: failed, error = %s\r\n", __func__, __LINE__, tusb_strerr[_err]) - #define _MESS_FAILED() tu_printf("%s %d: assert failed\r\n", __func__, __LINE__) + #define _MESS_FAILED() tu_printf("%s %d: ASSERT FAILED\r\n", __func__, __LINE__) #else #define _MESS_ERR(_err) do {} while (0) #define _MESS_FAILED() do {} while (0) -- cgit v1.3.1 From f38c460433abc0c557f2035c7205b4f36bcbc677 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 13 Jun 2021 17:19:14 +0700 Subject: fix ep tx with double buffered --- src/common/tusb_common.h | 2 +- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 54 ++++++++++++---------------- src/portable/raspberrypi/rp2040/rp2040_usb.c | 11 +++--- 3 files changed, 28 insertions(+), 39 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index fe5bf5f41..8490daad7 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -123,7 +123,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align4k (uint32_t value) { retur TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_offset4k(uint32_t value) { return (value & 0xFFFUL); } //------------- Mathematics -------------// -TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_abs(int32_t value) { return (uint32_t)((value < 0) ? (-value) : value); } +TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_div_ceil(uint32_t v, uint32_t d) { return (v + d -1)/d; } /// inclusive range checking TODO remove TU_ATTR_ALWAYS_INLINE static inline bool tu_within(uint32_t lower, uint32_t value, uint32_t upper) diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index 63e129e53..4f70d60cc 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -64,40 +64,30 @@ static struct hw_endpoint *hw_endpoint_get_by_addr(uint8_t ep_addr) static void _hw_endpoint_alloc(struct hw_endpoint *ep) { - uint16_t size = tu_min16(64, ep->wMaxPacketSize); + // size must be multiple of 64 + uint16_t size = tu_div_ceil(ep->wMaxPacketSize, 64) * 64u; - // Assumes single buffered for now - ep->hw_data_buf = next_buffer_ptr; - next_buffer_ptr += size; + // double buffered for non-ISO endpoint + if ( ep->transfer_type != TUSB_XFER_ISOCHRONOUS ) size *= 2u; - // Bits 0-5 are ignored by the controller so make sure these are 0 - if ((uintptr_t)next_buffer_ptr & 0b111111u) - { - // Round up to the next 64 - uint32_t fixptr = (uintptr_t)next_buffer_ptr; - fixptr &= ~0b111111u; - fixptr += 64; - pico_info("Rounding non 64 byte boundary buffer up from %x to %x\n", (uintptr_t)next_buffer_ptr, fixptr); - next_buffer_ptr = (uint8_t*)fixptr; - } - assert(((uintptr_t)next_buffer_ptr & 0b111111u) == 0); - uint dpram_offset = hw_data_offset(ep->hw_data_buf); - assert(hw_data_offset(next_buffer_ptr) <= USB_DPRAM_MAX); - - pico_info("Alloced %d bytes at offset 0x%x (0x%p) for ep %d %s\n", - size, - dpram_offset, - ep->hw_data_buf, - tu_edpt_number(ep->ep_addr), - ep_dir_string[tu_edpt_dir(ep->ep_addr)]); - - // Fill in endpoint control register with buffer offset - uint32_t reg = EP_CTRL_ENABLE_BITS - | EP_CTRL_INTERRUPT_PER_BUFFER - | (ep->transfer_type << EP_CTRL_BUFFER_TYPE_LSB) - | dpram_offset; - - *ep->endpoint_control = reg; + ep->hw_data_buf = next_buffer_ptr; + next_buffer_ptr += size; + + assert(((uintptr_t )next_buffer_ptr & 0b111111u) == 0); + uint dpram_offset = hw_data_offset(ep->hw_data_buf); + assert(hw_data_offset(next_buffer_ptr) <= USB_DPRAM_MAX); + + pico_info("Alloced %d bytes at offset 0x%x (0x%p) for ep %d %s\n", + size, + dpram_offset, + ep->hw_data_buf, + tu_edpt_number(ep->ep_addr), + ep_dir_string[tu_edpt_dir(ep->ep_addr)]); + + // Fill in endpoint control register with buffer offset + uint32_t const reg = EP_CTRL_ENABLE_BITS | (ep->transfer_type << EP_CTRL_BUFFER_TYPE_LSB) | dpram_offset; + + *ep->endpoint_control = reg; } static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t ep_addr, uint16_t wMaxPacketSize, uint8_t transfer_type) diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index de3a83be9..f8d36e5eb 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -108,7 +108,8 @@ void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_m *ep->buffer_control = value; } -static uint32_t compute_buffer_control(struct hw_endpoint *ep, uint8_t buf_id) +// prepare buffer, return buffer control +static uint32_t prepare_ep_buffer(struct hw_endpoint *ep, uint8_t buf_id) { uint16_t const buflen = tu_min16(ep->remaining_len, ep->wMaxPacketSize); ep->remaining_len -= buflen; @@ -122,14 +123,13 @@ static uint32_t compute_buffer_control(struct hw_endpoint *ep, uint8_t buf_id) if ( !ep->rx ) { // Copy data from user buffer to hw buffer - memcpy(ep->hw_data_buf, ep->user_buf, buflen); + memcpy(ep->hw_data_buf + buf_id*64, ep->user_buf, buflen); ep->user_buf += buflen; // Mark as full buf_ctrl |= USB_BUF_CTRL_FULL; } -#if TUSB_OPT_HOST_ENABLED // Is this the last buffer? Only really matters for host mode. Will trigger // the trans complete irq but also stop it polling. We only really care about // trans complete for setup packets being sent @@ -137,7 +137,6 @@ static uint32_t compute_buffer_control(struct hw_endpoint *ep, uint8_t buf_id) { buf_ctrl |= USB_BUF_CTRL_LAST; } -#endif if (buf_id) buf_ctrl = buf_ctrl << 16; @@ -150,14 +149,14 @@ static void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep) uint32_t ep_ctrl = *ep->endpoint_control; // always compute buffer 0 - uint32_t buf_ctrl = compute_buffer_control(ep, 0); + uint32_t buf_ctrl = prepare_ep_buffer(ep, 0); if(ep->remaining_len) { // Use buffer 1 (double buffered) if there is still data // TODO: Isochronous for buffer1 bit-field is different than CBI (control bulk, interrupt) - buf_ctrl |= compute_buffer_control(ep, 1); + buf_ctrl |= prepare_ep_buffer(ep, 1); // Set endpoint control double buffered bit if needed ep_ctrl &= ~EP_CTRL_INTERRUPT_PER_BUFFER; -- cgit v1.3.1 From 82618d2d5f15d0f8dd9631dec3807964a1281782 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 18 Jun 2021 17:18:11 +0700 Subject: fix build with mm32 board --- .../device/cdc_msc_freertos/src/FreeRTOSConfig.h | 5 + .../hid_composite_freertos/src/FreeRTOSConfig.h | 4 + hw/bsp/board_mcu.h | 2 + hw/bsp/mm32/boards/mm32f327x_mb39/board.mk | 8 + hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld | 163 +++++++++++++++++++ hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c | 172 +++++++++++++++++++++ hw/bsp/mm32/family.mk | 36 +++++ hw/bsp/mm32/mm32f327x/flash.ld | 163 ------------------- hw/bsp/mm32/mm32f327x/mm32f327x_mb39.c | 161 ------------------- src/class/cdc/cdc_device.h | 6 +- src/class/vendor/vendor_device.h | 8 +- src/common/tusb_common.h | 32 ++-- src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c | 2 +- 13 files changed, 414 insertions(+), 348 deletions(-) create mode 100644 hw/bsp/mm32/boards/mm32f327x_mb39/board.mk create mode 100644 hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld create mode 100644 hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c create mode 100644 hw/bsp/mm32/family.mk delete mode 100644 hw/bsp/mm32/mm32f327x/flash.ld delete mode 100644 hw/bsp/mm32/mm32f327x/mm32f327x_mb39.c (limited to 'src/common') diff --git a/examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h b/examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h index b76d59706..c9f553f64 100644 --- a/examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h +++ b/examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h @@ -45,7 +45,12 @@ // Include MCU header #include "bsp/board_mcu.h" +// TODO fix later +#if CFG_TUSB_MCU == OPT_MCU_MM32F327X +extern u32 SystemCoreClock; +#else extern uint32_t SystemCoreClock; +#endif /* Cortex M23/M33 port configuration. */ #define configENABLE_MPU 0 diff --git a/examples/device/hid_composite_freertos/src/FreeRTOSConfig.h b/examples/device/hid_composite_freertos/src/FreeRTOSConfig.h index b76d59706..99c5bc328 100644 --- a/examples/device/hid_composite_freertos/src/FreeRTOSConfig.h +++ b/examples/device/hid_composite_freertos/src/FreeRTOSConfig.h @@ -45,7 +45,11 @@ // Include MCU header #include "bsp/board_mcu.h" +#if CFG_TUSB_MCU == OPT_MCU_MM32F327X +extern u32 SystemCoreClock; +#else extern uint32_t SystemCoreClock; +#endif /* Cortex M23/M33 port configuration. */ #define configENABLE_MPU 0 diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index 1a659c410..c9d143bd7 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -130,6 +130,8 @@ #elif CFG_TUSB_MCU == OPT_MCU_RX63X // no header needed +#elif CFG_TUSB_MCU == OPT_MCU_MM32F327X + #include "mm32_device.h" #else #error "Missing MCU header" #endif diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/board.mk b/hw/bsp/mm32/boards/mm32f327x_mb39/board.mk new file mode 100644 index 000000000..b7663926f --- /dev/null +++ b/hw/bsp/mm32/boards/mm32f327x_mb39/board.mk @@ -0,0 +1,8 @@ +LD_FILE = $(BOARD_PATH)/flash.ld +SRC_S += $(SDK_DIR)/mm32f327x/MM32F327x/Source/GCC_StartAsm/startup_mm32m3ux_u_gcc.S + +# For flash-jlink target +#JLINK_DEVICE = stm32f411ve + +# flash target using on-board stlink +#flash: flash-jlink diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld b/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld new file mode 100644 index 000000000..d96d6e43d --- /dev/null +++ b/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld @@ -0,0 +1,163 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020 MM32 SE TEAM + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x2001FFFF; /* end of RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c new file mode 100644 index 000000000..cff7bc15e --- /dev/null +++ b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c @@ -0,0 +1,172 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020 MM32 SE TEAM + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "mm32_device.h" +#include "hal_conf.h" +#include "tusb.h" +#include "../board.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void OTG_FS_IRQHandler (void) +{ + tud_int_handler(0); + +} +void USB_DeviceClockInit (void) +{ + /* Select USBCLK source */ + // RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div1); + RCC->CFGR &= ~(0x3 << 22); + RCC->CFGR |= (0x1 << 22); + + /* Enable USB clock */ + RCC->AHB2ENR |= 0x1 << 7; +} +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM DECLARATION +//--------------------------------------------------------------------+ +// LED + +void board_led_write (bool state); +extern u32 SystemCoreClock; +const int baudrate = 115200; + +void board_init (void) +{ +// usb clock + USB_DeviceClockInit(); + + if ( SysTick_Config(SystemCoreClock / 1000) ) + { + while ( 1 ) + ; + } + NVIC_SetPriority(SysTick_IRQn, 0x0); + + // LED + GPIO_InitTypeDef GPIO_InitStruct; + RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE); + GPIO_StructInit(&GPIO_InitStruct); + GPIO_PinAFConfig(GPIOA, GPIO_PinSource15, GPIO_AF_15); //Disable JTDI AF to AF15 + + GPIO_InitStruct.GPIO_Pin = GPIO_Pin_15; + GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_Init(GPIOA, &GPIO_InitStruct); + + board_led_write(true); + + // UART + UART_InitTypeDef UART_InitStruct; + + RCC_APB2PeriphClockCmd(RCC_APB2ENR_UART1, ENABLE); //enableUART1,GPIOAclock + RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE); // + //UART initialset + + GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_7); + GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_7); + + UART_StructInit(&UART_InitStruct); + UART_InitStruct.UART_BaudRate = baudrate; + UART_InitStruct.UART_WordLength = UART_WordLength_8b; + UART_InitStruct.UART_StopBits = UART_StopBits_1; //one stopbit + UART_InitStruct.UART_Parity = UART_Parity_No; //none odd-even verify bit + UART_InitStruct.UART_HardwareFlowControl = UART_HardwareFlowControl_None; //No hardware flow control + UART_InitStruct.UART_Mode = UART_Mode_Rx | UART_Mode_Tx; // receive and sent mode + + UART_Init(UART1, &UART_InitStruct); //initial uart 1 + UART_Cmd(UART1, ENABLE); //enable uart 1 + + //UART1_TX GPIOA.9 + GPIO_StructInit(&GPIO_InitStruct); + GPIO_InitStruct.GPIO_Pin = GPIO_Pin_9; + GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOA, &GPIO_InitStruct); + + //UART1_RX GPIOA.10 + GPIO_InitStruct.GPIO_Pin = GPIO_Pin_5; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPU; + GPIO_Init(GPIOA, &GPIO_InitStruct); + +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write (bool state) +{ + state ? (GPIO_ResetBits(GPIOA, GPIO_Pin_15)) : (GPIO_SetBits(GPIOA, GPIO_Pin_15)); +} + +uint32_t board_button_read (void) +{ + return 0; +} + +int board_uart_read (uint8_t *buf, int len) +{ + (void) buf; + (void) len; + return 0; +} + +int board_uart_write (void const *buf, int len) +{ + const char *buff = buf; + while ( len ) + { + while ( (UART1->CSR & UART_IT_TXIEN) == 0 ) + ; //The loop is sent until it is finished + UART1->TDR = (*buff & 0xFF); + buff++; + len--; + } + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler (void) +{ + system_ticks++; +} + +uint32_t board_millis (void) +{ + return system_ticks; +} +#endif + +// Required by __libc_init_array in startup code if we are compiling using +// -nostdlib/-nostartfiles. +void _init(void) +{ + +} diff --git a/hw/bsp/mm32/family.mk b/hw/bsp/mm32/family.mk new file mode 100644 index 000000000..3273ff870 --- /dev/null +++ b/hw/bsp/mm32/family.mk @@ -0,0 +1,36 @@ +UF2_FAMILY_ID = 0x0 +SDK_DIR = hw/mcu/mindmotion/mm32sdk +DEPS_SUBMODULES += lib/CMSIS_5 $(SDK_DIR) + +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m3 \ + -mfloat-abi=soft \ + -nostdlib -nostartfiles \ + -DCFG_TUSB_MCU=OPT_MCU_MM32F327X + +# suppress warning caused by vendor mcu driver +CFLAGS += -Wno-error=unused-parameter -Wno-error=maybe-uninitialized + +SRC_C += \ + src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c \ + $(SDK_DIR)/mm32f327x/MM32F327x/Source/system_mm32f327x.c \ + $(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Src/hal_gpio.c \ + $(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Src/hal_rcc.c \ + $(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Src/hal_uart.c \ + +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ + $(TOP)/$(SDK_DIR)/mm32f327x/MM32F327x/Include \ + $(TOP)/$(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Inc + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM3 + +# flash target using on-board +flash: flash-jlink diff --git a/hw/bsp/mm32/mm32f327x/flash.ld b/hw/bsp/mm32/mm32f327x/flash.ld deleted file mode 100644 index d96d6e43d..000000000 --- a/hw/bsp/mm32/mm32f327x/flash.ld +++ /dev/null @@ -1,163 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2020 MM32 SE TEAM - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -/* Entry Point */ -ENTRY(Reset_Handler) - -/* Highest address of the user mode stack */ -_estack = 0x2001FFFF; /* end of RAM */ - -/* Generate a link error if heap and stack don't fit into RAM */ -_Min_Heap_Size = 0x200; /* required amount of heap */ -_Min_Stack_Size = 0x400; /* required amount of stack */ - -/* Specify the memory areas */ -MEMORY -{ -FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K -RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K -} - -/* Define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } >FLASH - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.glue_7) /* glue arm to thumb code */ - *(.glue_7t) /* glue thumb to arm code */ - *(.eh_frame) - - KEEP (*(.init)) - KEEP (*(.fini)) - - . = ALIGN(4); - _etext = .; /* define a global symbols at end of code */ - } >FLASH - - /* Constant data goes into FLASH */ - .rodata : - { - . = ALIGN(4); - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - . = ALIGN(4); - } >FLASH - - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH - .ARM : { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } >FLASH - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array*)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >FLASH - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array*)) - PROVIDE_HIDDEN (__init_array_end = .); - } >FLASH - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(SORT(.fini_array.*))) - KEEP (*(.fini_array*)) - PROVIDE_HIDDEN (__fini_array_end = .); - } >FLASH - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end */ - } >RAM AT> FLASH - - - /* Uninitialized data section */ - . = ALIGN(4); - .bss : - { - /* This is used by the startup in order to initialize the .bss secion */ - _sbss = .; /* define a global symbol at bss start */ - __bss_start__ = _sbss; - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end */ - __bss_end__ = _ebss; - } >RAM - - /* User_heap_stack section, used to check that there is enough RAM left */ - ._user_heap_stack : - { - . = ALIGN(8); - PROVIDE ( end = . ); - PROVIDE ( _end = . ); - . = . + _Min_Heap_Size; - . = . + _Min_Stack_Size; - . = ALIGN(8); - } >RAM - - - - /* Remove information from the standard libraries */ - /DISCARD/ : - { - libc.a ( * ) - libm.a ( * ) - libgcc.a ( * ) - } - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/hw/bsp/mm32/mm32f327x/mm32f327x_mb39.c b/hw/bsp/mm32/mm32f327x/mm32f327x_mb39.c deleted file mode 100644 index 39b264b70..000000000 --- a/hw/bsp/mm32/mm32f327x/mm32f327x_mb39.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2020 MM32 SE TEAM - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "mm32_device.h" -#include "hal_conf.h" -#include "tusb.h" -#include "../board.h" - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void OTG_FS_IRQHandler(void) -{ - dcd_int_handler(TUD_OPT_RHPORT); - -} -void USB_DeviceClockInit(void) -{ - /* Select USBCLK source */ - // RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div1); - RCC->CFGR &= ~(0x3 << 22); - RCC->CFGR |= (0x1 << 22); - - /* Enable USB clock */ - RCC->AHB2ENR |= 0x1 << 7; -} -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM DECLARATION -//--------------------------------------------------------------------+ -// LED - -void board_led_write(bool state); -extern u32 SystemCoreClock; -const int baudrate = 115200; - -void board_init(void) -{ -// usb clock - USB_DeviceClockInit(); - - if (SysTick_Config(SystemCoreClock / 1000)) { - while (1); - } - NVIC_SetPriority(SysTick_IRQn, 0x0); - - // LED - GPIO_InitTypeDef GPIO_InitStruct; - RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE); - GPIO_StructInit(&GPIO_InitStruct); - GPIO_PinAFConfig(GPIOA, GPIO_PinSource15, GPIO_AF_15); //Disable JTDI AF to AF15 - - GPIO_InitStruct.GPIO_Pin = GPIO_Pin_15; - GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStruct.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_Init(GPIOA, &GPIO_InitStruct); - - board_led_write(true); - - // UART - UART_InitTypeDef UART_InitStruct; - - RCC_APB2PeriphClockCmd(RCC_APB2ENR_UART1, ENABLE); //enableUART1,GPIOAclock - RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE); // - //UART initialset - - GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_7); - GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_7); - - - UART_StructInit(&UART_InitStruct); - UART_InitStruct.UART_BaudRate = baudrate; - UART_InitStruct.UART_WordLength = UART_WordLength_8b; - UART_InitStruct.UART_StopBits = UART_StopBits_1;//one stopbit - UART_InitStruct.UART_Parity = UART_Parity_No;//none odd-even verify bit - UART_InitStruct.UART_HardwareFlowControl = UART_HardwareFlowControl_None;//No hardware flow control - UART_InitStruct.UART_Mode = UART_Mode_Rx | UART_Mode_Tx; // receive and sent mode - - UART_Init(UART1, &UART_InitStruct); //initial uart 1 - UART_Cmd(UART1, ENABLE); //enable uart 1 - - //UART1_TX GPIOA.9 - GPIO_StructInit(&GPIO_InitStruct); - GPIO_InitStruct.GPIO_Pin = GPIO_Pin_9; - GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(GPIOA, &GPIO_InitStruct); - - //UART1_RX GPIOA.10 - GPIO_InitStruct.GPIO_Pin = GPIO_Pin_5; - GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPU; - GPIO_Init(GPIOA, &GPIO_InitStruct); - -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - state ? (GPIO_ResetBits(GPIOA,GPIO_Pin_15)):(GPIO_SetBits(GPIOA,GPIO_Pin_15)); -} - -uint32_t board_button_read(void) -{ - return 0; -} - -int board_uart_read(uint8_t* buf, int len) -{ - (void) buf; (void) len; - return 0; -} - -int board_uart_write(void const * buf, int len) -{ - const char *buff = buf; - while(len){ - while((UART1->CSR & UART_IT_TXIEN) == 0); //The loop is sent until it is finished - UART1->TDR = (*buff & 0xFF); - buff++; - len--; - } - return len; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h index 7ff757add..72e29705a 100644 --- a/src/class/cdc/cdc_device.h +++ b/src/class/cdc/cdc_device.h @@ -82,7 +82,7 @@ int32_t tud_cdc_n_read_char (uint8_t itf); void tud_cdc_n_read_flush (uint8_t itf); // Get a byte from FIFO at the specified position without removing it -bool tud_cdc_n_peek (uint8_t itf, uint8_t* u8); +bool tud_cdc_n_peek (uint8_t itf, uint8_t* uv8); // Write bytes to TX FIFO, data may remain in the FIFO for a while uint32_t tud_cdc_n_write (uint8_t itf, void const* buffer, uint32_t bufsize); @@ -206,9 +206,9 @@ static inline void tud_cdc_read_flush (void) tud_cdc_n_read_flush(0); } -static inline bool tud_cdc_peek (uint8_t* u8) +static inline bool tud_cdc_peek (uint8_t* uv8) { - return tud_cdc_n_peek(0, u8); + return tud_cdc_n_peek(0, uv8); } static inline uint32_t tud_cdc_write_char (char ch) diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h index 6d9c784c0..b54194271 100644 --- a/src/class/vendor/vendor_device.h +++ b/src/class/vendor/vendor_device.h @@ -44,7 +44,7 @@ bool tud_vendor_n_mounted (uint8_t itf); uint32_t tud_vendor_n_available (uint8_t itf); uint32_t tud_vendor_n_read (uint8_t itf, void* buffer, uint32_t bufsize); -bool tud_vendor_n_peek (uint8_t itf, uint8_t* u8); +bool tud_vendor_n_peek (uint8_t itf, uint8_t* uv8); uint32_t tud_vendor_n_write (uint8_t itf, void const* buffer, uint32_t bufsize); uint32_t tud_vendor_n_write_available (uint8_t itf); @@ -58,7 +58,7 @@ uint32_t tud_vendor_n_write_str (uint8_t itf, char const* str); static inline bool tud_vendor_mounted (void); static inline uint32_t tud_vendor_available (void); static inline uint32_t tud_vendor_read (void* buffer, uint32_t bufsize); -static inline bool tud_vendor_peek (uint8_t* u8); +static inline bool tud_vendor_peek (uint8_t* uv8); static inline uint32_t tud_vendor_write (void const* buffer, uint32_t bufsize); static inline uint32_t tud_vendor_write_str (char const* str); static inline uint32_t tud_vendor_write_available (void); @@ -94,9 +94,9 @@ static inline uint32_t tud_vendor_read (void* buffer, uint32_t bufsize) return tud_vendor_n_read(0, buffer, bufsize); } -static inline bool tud_vendor_peek (uint8_t* u8) +static inline bool tud_vendor_peek (uint8_t* uv8) { - return tud_vendor_n_peek(0, u8); + return tud_vendor_n_peek(0, uv8); } static inline uint32_t tud_vendor_write (void const* buffer, uint32_t bufsize) diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 889ad7b25..ece5d800a 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -38,18 +38,18 @@ #define TU_MIN(_x, _y) ( ( (_x) < (_y) ) ? (_x) : (_y) ) #define TU_MAX(_x, _y) ( ( (_x) > (_y) ) ? (_x) : (_y) ) -#define TU_U16_HIGH(u16) ((uint8_t) (((u16) >> 8) & 0x00ff)) -#define TU_U16_LOW(u16) ((uint8_t) ((u16) & 0x00ff)) -#define U16_TO_U8S_BE(u16) TU_U16_HIGH(u16), TU_U16_LOW(u16) -#define U16_TO_U8S_LE(u16) TU_U16_LOW(u16), TU_U16_HIGH(u16) +#define TU_U16_HIGH(_u16) ((uint8_t) (((_u16) >> 8) & 0x00ff)) +#define TU_U16_LOW(_u16) ((uint8_t) ((_u16) & 0x00ff)) +#define U16_TO_U8S_BE(_u16) TU_U16_HIGH(_u16), TU_U16_LOW(_u16) +#define U16_TO_U8S_LE(_u16) TU_U16_LOW(_u16), TU_U16_HIGH(_u16) -#define TU_U32_BYTE3(u32) ((uint8_t) ((((uint32_t) u32) >> 24) & 0x000000ff)) // MSB -#define TU_U32_BYTE2(u32) ((uint8_t) ((((uint32_t) u32) >> 16) & 0x000000ff)) -#define TU_U32_BYTE1(u32) ((uint8_t) ((((uint32_t) u32) >> 8) & 0x000000ff)) -#define TU_U32_BYTE0(u32) ((uint8_t) (((uint32_t) u32) & 0x000000ff)) // LSB +#define TU_U32_BYTE3(_u32) ((uint8_t) ((((uint32_t) _u32) >> 24) & 0x000000ff)) // MSB +#define TU_U32_BYTE2(_u32) ((uint8_t) ((((uint32_t) _u32) >> 16) & 0x000000ff)) +#define TU_U32_BYTE1(_u32) ((uint8_t) ((((uint32_t) _u32) >> 8) & 0x000000ff)) +#define TU_U32_BYTE0(_u32) ((uint8_t) (((uint32_t) _u32) & 0x000000ff)) // LSB -#define U32_TO_U8S_BE(u32) TU_U32_BYTE3(u32), TU_U32_BYTE2(u32), TU_U32_BYTE1(u32), TU_U32_BYTE0(u32) -#define U32_TO_U8S_LE(u32) TU_U32_BYTE0(u32), TU_U32_BYTE1(u32), TU_U32_BYTE2(u32), TU_U32_BYTE3(u32) +#define U32_TO_U8S_BE(_u32) TU_U32_BYTE3(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE0(_u32) +#define U32_TO_U8S_LE(_u32) TU_U32_BYTE0(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE3(_u32) #define TU_BIT(n) (1UL << (n)) @@ -88,13 +88,13 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u16(uint8_t high, uint8_t low) return (uint16_t) ((((uint16_t) high) << 8) | low); } -TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte3(uint32_t u32) { return TU_U32_BYTE3(u32); } -TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte2(uint32_t u32) { return TU_U32_BYTE2(u32); } -TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte1(uint32_t u32) { return TU_U32_BYTE1(u32); } -TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte0(uint32_t u32) { return TU_U32_BYTE0(u32); } +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte3(uint32_t uv32) { return TU_U32_BYTE3(uv32); } +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte2(uint32_t uv32) { return TU_U32_BYTE2(uv32); } +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte1(uint32_t uv32) { return TU_U32_BYTE1(uv32); } +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte0(uint32_t uv32) { return TU_U32_BYTE0(uv32); } -TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_high(uint16_t u16) { return TU_U16_HIGH(u16); } -TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_low (uint16_t u16) { return TU_U16_LOW(u16); } +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_high(uint16_t uv16) { return TU_U16_HIGH(uv16); } +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_low (uint16_t uv16) { return TU_U16_LOW(uv16); } //------------- Bits -------------// TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_bit_set (uint32_t value, uint8_t pos) { return value | TU_BIT(pos); } diff --git a/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c b/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c index 59a40dc68..31b1f7080 100644 --- a/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c +++ b/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c @@ -283,7 +283,7 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr) /* Response with status first before changing device address */ dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); } -extern u32 SystemCoreClock ; +extern u32 SystemCoreClock; void dcd_remote_wakeup(uint8_t rhport) { (void) rhport; -- cgit v1.3.1 From 76336a67a05ee4b6676a438578819a48cb0f0420 Mon Sep 17 00:00:00 2001 From: Ned Konz Date: Fri, 18 Jun 2021 14:50:55 -0700 Subject: Changed order of struct initializer to avoid compiler error --- src/common/tusb_fifo.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h index cf299269d..de2ae163d 100644 --- a/src/common/tusb_fifo.h +++ b/src/common/tusb_fifo.h @@ -86,8 +86,8 @@ typedef struct .depth = _depth, \ .item_size = sizeof(_type), \ .overwritable = _overwritable, \ - .max_pointer_idx = 2*(_depth)-1, \ .non_used_index_space = UINT16_MAX - (2*(_depth)-1), \ + .max_pointer_idx = 2*(_depth)-1, \ } #define TU_FIFO_DEF(_name, _depth, _type, _overwritable) \ -- cgit v1.3.1 From 51c6444e1d8be85d5f4c8b4ebf7e48db7f589bc2 Mon Sep 17 00:00:00 2001 From: Wini-Buh Date: Tue, 22 Jun 2021 23:49:24 +0200 Subject: final clean up --- src/common/tusb_compiler.h | 10 ---------- src/device/usbd.c | 4 ++-- src/device/usbd_control.c | 10 +--------- src/osal/osal_freertos.h | 25 ------------------------- src/portable/renesas/usba/dcd_usba.c | 11 +---------- 5 files changed, 4 insertions(+), 56 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index f77cf94ee..538daa171 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -84,8 +84,6 @@ // Endian conversion use well-known host to network (big endian) naming #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ #define TU_BYTE_ORDER TU_LITTLE_ENDIAN - #define TU_ENDIAN_LITTLE_BEGIN - #define TU_ENDIAN_LITTLE_END #else #define TU_BYTE_ORDER TU_BIG_ENDIAN #endif @@ -153,21 +151,13 @@ // Endian conversion use well-known host to network (big endian) naming #if defined(__LIT) #define TU_BYTE_ORDER TU_LITTLE_ENDIAN - #define TU_ENDIAN_LITTLE_BEGIN - #define TU_ENDIAN_LITTLE_END #else #define TU_BYTE_ORDER TU_BIG_ENDIAN - #define TU_ENDIAN_LITTLE_BEGIN _Pragma("endian little") - #define TU_ENDIAN_LITTLE_END _Pragma("endian") #endif #define TU_BSWAP16(u16) ((unsigned short)_builtin_revw((unsigned long)u16)) #define TU_BSWAP32(u32) (_builtin_revl(u32)) - /* activate the "aligned" emulation, because this toolchain does not know - the aligned attribute (or something similar yet) */ - #define TU_HAS_NO_ATTR_ALIGNED - #else #error "Compiler attribute porting is required" #endif diff --git a/src/device/usbd.c b/src/device/usbd.c index cedca540e..00ec29c9a 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -1156,14 +1156,14 @@ void usbd_defer_func(osal_task_func_t func, void* param, bool in_isr) bool usbd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep) { - TU_LOG2(" Open EP %02X with Size = %u\r\n", desc_ep->bEndpointAddress, desc_ep->wMaxPacketSize.size); + TU_LOG2(" Open EP %02X with Size = %u\r\n", desc_ep->bEndpointAddress, tu_le16toh(desc_ep->wMaxPacketSize.size)); switch (desc_ep->bmAttributes.xfer) { case TUSB_XFER_ISOCHRONOUS: { uint16_t const max_epsize = (_usbd_dev.speed == TUSB_SPEED_HIGH ? 1024 : 1023); - TU_ASSERT(desc_ep->wMaxPacketSize.size <= max_epsize); + TU_ASSERT(tu_le16toh(desc_ep->wMaxPacketSize.size) <= max_epsize); } break; diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c index b3bab2e32..5483406e5 100644 --- a/src/device/usbd_control.c +++ b/src/device/usbd_control.c @@ -55,17 +55,9 @@ typedef struct static usbd_control_xfer_t _ctrl_xfer; -#if defined(TU_HAS_NO_ATTR_ALIGNED) -// Helper union to overcome the lack of the alignment attribute/pragma -static union { - uint16_t : (sizeof(uint16_t) * 8); // Alignment of at least the size of the used type - uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE]; -} Align_usbd_ctrl_buf_; -static uint8_t *_usbd_ctrl_buf = (uint8_t*)&Align_usbd_ctrl_buf_; -#else CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE]; -#endif + //--------------------------------------------------------------------+ // Application API diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h index ec33b317d..66070c273 100644 --- a/src/osal/osal_freertos.h +++ b/src/osal/osal_freertos.h @@ -51,7 +51,6 @@ static inline void osal_task_delay(uint32_t msec) typedef StaticSemaphore_t osal_semaphore_def_t; typedef SemaphoreHandle_t osal_semaphore_t; -#if (configSUPPORT_STATIC_ALLOCATION == 1) //FIXME Only static API supported static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef) { return xSemaphoreCreateBinaryStatic(semdef); @@ -77,7 +76,6 @@ static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) return res != 0; } } -#endif static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec) { @@ -98,12 +96,7 @@ typedef SemaphoreHandle_t osal_mutex_t; static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) { -#if (configSUPPORT_STATIC_ALLOCATION == 0) //FIXME Only static API supported - (void)mdef; - return xSemaphoreCreateMutex(); -#else return xSemaphoreCreateMutexStatic(mdef); -#endif } static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec) @@ -138,11 +131,7 @@ typedef QueueHandle_t osal_queue_t; static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) { -#if defined(__Tx36V5_Maincard__) - return xQueueCreate(qdef->depth, qdef->item_sz); -#else return xQueueCreateStatic(qdef->depth, qdef->item_sz, (uint8_t*) qdef->buf, &qdef->sq); -#endif } static inline bool osal_queue_receive(osal_queue_t qhdl, void* data) @@ -150,19 +139,6 @@ static inline bool osal_queue_receive(osal_queue_t qhdl, void* data) return xQueueReceive(qhdl, data, portMAX_DELAY); } -#if defined(__Tx36V5_Maincard__) -extern BaseType_t UsbTaskWoken; -static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr) -{ - if (!in_isr) { - return(xQueueSendToBack(qhdl, data, OSAL_TIMEOUT_WAIT_FOREVER)); - - } else { - BaseType_t res = xQueueSendToBackFromISR(qhdl, data, &UsbTaskWoken); - return(res != 0); - } -} -#else static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr) { if ( !in_isr ) @@ -183,7 +159,6 @@ static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in return res != 0; } } -#endif static inline bool osal_queue_empty(osal_queue_t qhdl) { diff --git a/src/portable/renesas/usba/dcd_usba.c b/src/portable/renesas/usba/dcd_usba.c index 13fc50ae5..51729de06 100644 --- a/src/portable/renesas/usba/dcd_usba.c +++ b/src/portable/renesas/usba/dcd_usba.c @@ -518,22 +518,13 @@ static void process_set_address(uint8_t rhport) { const uint32_t addr = USB0.USBADDR.BIT.USBADDR; if (!addr) return; -#if defined(__CCRX__) - tusb_control_request_t setup_packet; - setup_packet.bmRequestType = 0; - setup_packet.bRequest = 5; - setup_packet.wValue = addr; - setup_packet.wIndex = 0; - setup_packet.wLength = 0; -#else const tusb_control_request_t setup_packet = { - .bmRequestType = 0, + .bmRequestType = { 0 }, /* Note: CCRX needs the braces over this struct member */ .bRequest = 5, .wValue = addr, .wIndex = 0, .wLength = 0, }; -#endif dcd_event_setup_received(rhport, (const uint8_t*)&setup_packet, true); } -- cgit v1.3.1 From 3eec011a7c7f7c81954a417b9683eded91ad86e5 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 29 Jun 2021 17:28:35 +0700 Subject: add tud_vendor_control_request_cb() to poisoned list --- src/common/tusb_compiler.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/common') diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 679060b20..f755e13f4 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -83,6 +83,10 @@ #define TU_BSWAP16(u16) (__builtin_bswap16(u16)) #define TU_BSWAP32(u32) (__builtin_bswap32(u32)) + // List of obsolete callback function that is renamed and should not be defined. + // Put it here since only gcc support this pragma + #pragma GCC poison tud_vendor_control_request_cb + #elif defined(__TI_COMPILER_VERSION__) #define TU_ATTR_ALIGNED(Bytes) __attribute__ ((aligned(Bytes))) #define TU_ATTR_SECTION(sec_name) __attribute__ ((section(#sec_name))) -- cgit v1.3.1 From 2b2549b57316033e544e3261334e3e20224563ce Mon Sep 17 00:00:00 2001 From: Mengsk Date: Wed, 30 Jun 2021 16:50:32 +0200 Subject: Fix fifo overflow correction. --- src/common/tusb_fifo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 1eb886aa1..1229201b8 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -342,7 +342,7 @@ static uint16_t backward_pointer(tu_fifo_t* f, uint16_t p, uint16_t offset) // We limit the index space of p such that a correct wrap around happens // Check for a wrap around or if we are in unused index space - This has to be checked first!! // We are exploiting the wrap around to the correct index - if ((p < p - offset) || (p - offset > f->max_pointer_idx)) + if ((p < (uint16_t)(p - offset)) || ((uint16_t)(p - offset) > f->max_pointer_idx)) { p = (p - offset) - f->non_used_index_space; } -- cgit v1.3.1 From 7321972380b7bf74557293ba975e912f2941ae02 Mon Sep 17 00:00:00 2001 From: MasterPhi Date: Wed, 30 Jun 2021 20:26:27 +0200 Subject: Force unsigned compare on advance_pointer. --- src/common/tusb_fifo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 1229201b8..73217cf75 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -325,7 +325,7 @@ static uint16_t advance_pointer(tu_fifo_t* f, uint16_t p, uint16_t offset) // We are exploiting the wrap around to the correct index // TODO warning: assuming signed overflow does not occur when assuming that (X + c) < X is always false [-Wstrict-overflow] - if ((p > p + offset) || (p + offset > f->max_pointer_idx)) + if ((p > (uint16_t)(p + offset)) || ((uint16_t)(p + offset) > f->max_pointer_idx)) { p = (p + offset) + f->non_used_index_space; } -- cgit v1.3.1 From 137dff620bc5890afdf59a61cebe355fc6999f12 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 13 Jul 2021 20:24:12 +0700 Subject: add option to silent a driver log --- src/class/msc/msc_device.c | 20 ++++++++++++-------- src/common/tusb_common.h | 18 +++++++++++++----- src/common/tusb_compiler.h | 12 ++++++++---- src/common/tusb_fifo.h | 2 +- 4 files changed, 34 insertions(+), 18 deletions(-) (limited to 'src/common') diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index 7f13b4891..014e8b69e 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -37,6 +37,10 @@ //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ + +// Can be selectively disabled to reduce logging when troubleshooting other driver +#define MSC_DEBUG 2 + enum { MSC_STAGE_CMD = 0, @@ -99,7 +103,7 @@ static inline uint16_t rdwr10_get_blockcount(uint8_t const command[]) //--------------------------------------------------------------------+ #if CFG_TUSB_DEBUG >= 2 -static tu_lookup_entry_t const _msc_scsi_cmd_lookup[] = +TU_ATTR_UNUSED static tu_lookup_entry_t const _msc_scsi_cmd_lookup[] = { { .key = SCSI_CMD_TEST_UNIT_READY , .data = "Test Unit Ready" }, { .key = SCSI_CMD_INQUIRY , .data = "Inquiry" }, @@ -114,7 +118,7 @@ static tu_lookup_entry_t const _msc_scsi_cmd_lookup[] = { .key = SCSI_CMD_WRITE_10 , .data = "Write10" } }; -static tu_lookup_table_t const _msc_scsi_cmd_table = +TU_ATTR_UNUSED static tu_lookup_table_t const _msc_scsi_cmd_table = { .count = TU_ARRAY_SIZE(_msc_scsi_cmd_lookup), .items = _msc_scsi_cmd_lookup @@ -232,8 +236,8 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t TU_ASSERT( event == XFER_RESULT_SUCCESS && xferred_bytes == sizeof(msc_cbw_t) && p_cbw->signature == MSC_CBW_SIGNATURE ); - TU_LOG2(" SCSI Command: %s\r\n", tu_lookup_find(&_msc_scsi_cmd_table, p_cbw->command[0])); - // TU_LOG2_MEM(p_cbw, xferred_bytes, 2); + TU_LOG(MSC_DEBUG, " SCSI Command: %s\r\n", tu_lookup_find(&_msc_scsi_cmd_table, p_cbw->command[0])); + // TU_LOG_MEM(MSC_DEBUG, p_cbw, xferred_bytes, 2); p_csw->signature = MSC_CSW_SIGNATURE; p_csw->tag = p_cbw->tag; @@ -305,8 +309,8 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t break; case MSC_STAGE_DATA: - TU_LOG2(" SCSI Data\r\n"); - //TU_LOG2_MEM(_mscd_buf, xferred_bytes, 2); + TU_LOG(MSC_DEBUG, " SCSI Data\r\n"); + //TU_LOG_MEM(MSC_DEBUG, _mscd_buf, xferred_bytes, 2); // OUT transfer, invoke callback if needed if ( !tu_bit_test(p_cbw->dir, 7) ) @@ -402,8 +406,8 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t // Wait for the Status phase to complete if( (ep_addr == p_msc->ep_in) && (xferred_bytes == sizeof(msc_csw_t)) ) { - TU_LOG2(" SCSI Status: %u\r\n", p_csw->status); - // TU_LOG2_MEM(p_csw, xferred_bytes, 2); + TU_LOG(MSC_DEBUG, " SCSI Status: %u\r\n", p_csw->status); + // TU_LOG_MEM(MSC_DEBUG, p_csw, xferred_bytes, 2); // Invoke complete callback if defined // Note: There is racing issue with samd51 + qspi flash testing with arduino diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 8490daad7..c8a66a879 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -305,11 +305,11 @@ void tu_print_var(uint8_t const* buf, uint32_t bufsize) } // Log with Level -#define TU_LOG(n, ...) TU_LOG##n(__VA_ARGS__) -#define TU_LOG_MEM(n, ...) TU_LOG##n##_MEM(__VA_ARGS__) -#define TU_LOG_VAR(n, ...) TU_LOG##n##_VAR(__VA_ARGS__) -#define TU_LOG_INT(n, ...) TU_LOG##n##_INT(__VA_ARGS__) -#define TU_LOG_HEX(n, ...) TU_LOG##n##_HEX(__VA_ARGS__) +#define TU_LOG(n, ...) TU_XSTRCAT(TU_LOG, n)(__VA_ARGS__) +#define TU_LOG_MEM(n, ...) TU_XSTRCAT3(TU_LOG, n, _MEM)(__VA_ARGS__) +#define TU_LOG_VAR(n, ...) TU_XSTRCAT3(TU_LOG, n, _VAR)(__VA_ARGS__) +#define TU_LOG_INT(n, ...) TU_XSTRCAT3(TU_LOG, n, _INT)(__VA_ARGS__) +#define TU_LOG_HEX(n, ...) TU_XSTRCAT3(TU_LOG, n, _HEX)(__VA_ARGS__) #define TU_LOG_LOCATION() tu_printf("%s: %d:\r\n", __PRETTY_FUNCTION__, __LINE__) #define TU_LOG_FAILED() tu_printf("%s: %d: Failed\r\n", __PRETTY_FUNCTION__, __LINE__) @@ -373,6 +373,14 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3 #endif // TODO replace all TU_LOGn with TU_LOG(n) + +#define TU_LOG0(...) +#define TU_LOG0_MEM(...) +#define TU_LOG0_VAR(...) +#define TU_LOG0_INT(...) +#define TU_LOG0_HEX(...) + + #ifndef TU_LOG1 #define TU_LOG1(...) #define TU_LOG1_MEM(...) diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index f755e13f4..0dd9ba016 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -32,10 +32,14 @@ #ifndef _TUSB_COMPILER_H_ #define _TUSB_COMPILER_H_ -#define TU_STRING(x) #x ///< stringify without expand -#define TU_XSTRING(x) TU_STRING(x) ///< expand then stringify -#define TU_STRCAT(a, b) a##b ///< concat without expand -#define TU_XSTRCAT(a, b) TU_STRCAT(a, b) ///< expand then concat +#define TU_STRING(x) #x ///< stringify without expand +#define TU_XSTRING(x) TU_STRING(x) ///< expand then stringify + +#define TU_STRCAT(a, b) a##b ///< concat without expand +#define TU_STRCAT3(a, b, c) a##b##c ///< concat without expand + +#define TU_XSTRCAT(a, b) TU_STRCAT(a, b) ///< expand then concat +#define TU_XSTRCAT3(a, b, c) TU_STRCAT3(a, b, c) ///< expand then concat 3 tokens #if defined __COUNTER__ && __COUNTER__ != __COUNTER__ #define _TU_COUNTER_ __COUNTER__ diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h index de2ae163d..18db289a1 100644 --- a/src/common/tusb_fifo.h +++ b/src/common/tusb_fifo.h @@ -120,9 +120,9 @@ bool tu_fifo_peek (tu_fifo_t* f, void * p_buffer); uint16_t tu_fifo_peek_n (tu_fifo_t* f, void * p_buffer, uint16_t n); uint16_t tu_fifo_count (tu_fifo_t* f); +uint16_t tu_fifo_remaining (tu_fifo_t* f); bool tu_fifo_empty (tu_fifo_t* f); bool tu_fifo_full (tu_fifo_t* f); -uint16_t tu_fifo_remaining (tu_fifo_t* f); bool tu_fifo_overflowed (tu_fifo_t* f); void tu_fifo_correct_read_pointer (tu_fifo_t* f); -- cgit v1.3.1 From 95ded08e3b96b77bbbb1e11e7f0043fb86b7316f Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 14 Jul 2021 16:42:12 +0700 Subject: simplify upload request --- src/class/dfu/dfu.h | 8 ++--- src/class/dfu/dfu_device.c | 88 ++++++++++++++++++++-------------------------- src/common/tusb_types.h | 2 +- 3 files changed, 43 insertions(+), 55 deletions(-) (limited to 'src/common') diff --git a/src/class/dfu/dfu.h b/src/class/dfu/dfu.h index 18de3bf99..88f2f3529 100644 --- a/src/class/dfu/dfu.h +++ b/src/class/dfu/dfu.h @@ -95,10 +95,10 @@ typedef enum { DFU_STATUS_ERRSTALLEDPKT = 0x0F, } dfu_device_status_t; -#define DFU_FUNC_ATTR_CAN_DOWNLOAD_BITMASK (1 << 0) -#define DFU_FUNC_ATTR_CAN_UPLOAD_BITMASK (1 << 1) -#define DFU_FUNC_ATTR_MANIFESTATION_TOLERANT_BITMASK (1 << 2) -#define DFU_FUNC_ATTR_WILL_DETACH_BITMASK (1 << 3) +#define DFU_FUNC_ATTR_CAN_DOWNLOAD_BITMASK (1u << 0) +#define DFU_FUNC_ATTR_CAN_UPLOAD_BITMASK (1u << 1) +#define DFU_FUNC_ATTR_MANIFESTATION_TOLERANT_BITMASK (1u << 2) +#define DFU_FUNC_ATTR_WILL_DETACH_BITMASK (1u << 3) // DFU Status Request Payload typedef struct TU_ATTR_PACKED diff --git a/src/class/dfu/dfu_device.c b/src/class/dfu/dfu_device.c index 7b2f920d2..376feb053 100644 --- a/src/class/dfu/dfu_device.c +++ b/src/class/dfu/dfu_device.c @@ -58,7 +58,6 @@ CFG_TUSB_MEM_SECTION static dfu_state_ctx_t _dfu_ctx; static void dfu_req_dnload_setup(uint8_t rhport, tusb_control_request_t const * request); static void dfu_req_getstatus_reply(uint8_t rhport, tusb_control_request_t const * request); -static uint16_t dfu_req_upload(uint8_t rhport, tusb_control_request_t const * request, uint16_t block_num, uint16_t wLength); static void dfu_req_dnload_reply(uint8_t rhport, tusb_control_request_t const * request); static bool dfu_state_machine(uint8_t rhport, tusb_control_request_t const * request); @@ -218,37 +217,60 @@ bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_reque if ( request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD ) { // Standard request include GET/SET_INTERFACE - switch (request->bRequest ) + switch ( request->bRequest ) { case TUSB_REQ_SET_INTERFACE: - // Switch Alt interface and Re-initalize state machine - _dfu_ctx.alt_num = (uint8_t) request->wValue; - _dfu_ctx.state = DFU_IDLE; - _dfu_ctx.status = DFU_STATUS_OK; - _dfu_ctx.blk_transfer_in_proc = false; + if ( stage == CONTROL_STAGE_SETUP ) + { + // Switch Alt interface and Re-initalize state machine + _dfu_ctx.alt_num = (uint8_t) request->wValue; + _dfu_ctx.state = DFU_IDLE; + _dfu_ctx.status = DFU_STATUS_OK; + _dfu_ctx.blk_transfer_in_proc = false; - return tud_control_status(rhport, request); + return tud_control_status(rhport, request); + } break; case TUSB_REQ_GET_INTERFACE: - return tud_control_xfer(rhport, request, &_dfu_ctx.alt_num, 1); + if(stage == CONTROL_STAGE_SETUP) + { + return tud_control_xfer(rhport, request, &_dfu_ctx.alt_num, 1); + } break; // unsupported request default: return false; } } - else if (request->bmRequestType_bit.type == TUSB_REQ_TYPE_CLASS) + else if ( request->bmRequestType_bit.type == TUSB_REQ_TYPE_CLASS ) { // Class request - switch (request->bRequest) + switch ( request->bRequest ) { case DFU_REQUEST_DETACH: - { - tud_control_status(rhport, request); - if (tud_dfu_detach_cb) tud_dfu_detach_cb(); - break; - } + if ( stage == CONTROL_STAGE_SETUP ) + { + tud_control_status(rhport, request); + } + else if ( stage == CONTROL_STAGE_ACK ) + { + if (tud_dfu_detach_cb) tud_dfu_detach_cb(); + } + break; + + case DFU_REQUEST_UPLOAD: + if ( stage == CONTROL_STAGE_SETUP ) + { + TU_VERIFY(_dfu_ctx.attrs & DFU_FUNC_ATTR_CAN_UPLOAD_BITMASK); + TU_VERIFY(tud_dfu_upload_cb); + TU_VERIFY(request->wLength <= CFG_TUD_DFU_TRANSFER_BUFFER_SIZE); + + uint16_t const xfer_len = tud_dfu_upload_cb(_dfu_ctx.alt_num, request->wValue, _dfu_ctx.transfer_buf, request->wLength); + + tud_control_xfer(rhport, request, _dfu_ctx.transfer_buf, xfer_len); + } + break; case DFU_REQUEST_DNLOAD: { @@ -262,7 +284,6 @@ bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_reque } } // fallthrough - case DFU_REQUEST_UPLOAD: case DFU_REQUEST_GETSTATUS: case DFU_REQUEST_CLRSTATUS: case DFU_REQUEST_GETSTATE: @@ -290,18 +311,6 @@ bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_reque return true; } -static uint16_t dfu_req_upload(uint8_t rhport, tusb_control_request_t const * request, uint16_t block_num, uint16_t wLength) -{ - TU_VERIFY( wLength <= CFG_TUD_DFU_TRANSFER_BUFFER_SIZE, 0); - uint16_t retval = 0; - if (tud_dfu_upload_cb) - { - tud_dfu_upload_cb(_dfu_ctx.alt_num, block_num, (uint8_t *)_dfu_ctx.transfer_buf, wLength); - } - tud_control_xfer(rhport, request, _dfu_ctx.transfer_buf, retval); - return retval; -} - static void dfu_req_getstatus_reply(uint8_t rhport, tusb_control_request_t const * request) { uint32_t timeout = 0; @@ -382,18 +391,6 @@ static bool dfu_state_machine(uint8_t rhport, tusb_control_request_t const * req } break; - case DFU_REQUEST_UPLOAD: - { - if( ((_dfu_ctx.attrs & DFU_FUNC_ATTR_CAN_UPLOAD_BITMASK) != 0) ) - { - _dfu_ctx.state = DFU_UPLOAD_IDLE; - dfu_req_upload(rhport, request, request->wValue, request->wLength); - } else { - _dfu_ctx.state = DFU_ERROR; - } - } - break; - case DFU_REQUEST_GETSTATUS: dfu_req_getstatus_reply(rhport, request); break; @@ -567,15 +564,6 @@ static bool dfu_state_machine(uint8_t rhport, tusb_control_request_t const * req { switch (request->bRequest) { - case DFU_REQUEST_UPLOAD: - { - if (dfu_req_upload(rhport, request, request->wValue, request->wLength) != request->wLength) - { - _dfu_ctx.state = DFU_IDLE; - } - } - break; - case DFU_REQUEST_GETSTATUS: dfu_req_getstatus_reply(rhport, request); break; diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index ec58a3181..fc1035e2c 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -449,7 +449,7 @@ typedef struct TU_ATTR_PACKED /*------------------------------------------------------------------*/ /* Types *------------------------------------------------------------------*/ -typedef struct TU_ATTR_PACKED{ +typedef struct TU_ATTR_PACKED TU_ATTR_ALIGNED(4) { union { struct TU_ATTR_PACKED { uint8_t recipient : 5; ///< Recipient type tusb_request_recipient_t. -- cgit v1.3.1 From daca9e520bce0b4eb5882c5692986ec5c513f319 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 15 Jul 2021 20:47:50 +0700 Subject: wrap up DFU update --- examples/device/dfu/src/main.c | 95 +++++--- examples/device/dfu/src/tusb_config.h | 2 +- examples/device/dfu/src/usb_descriptors.c | 4 +- src/class/dfu/dfu.h | 47 ++-- src/class/dfu/dfu_device.c | 393 +++++++++++++++++++----------- src/class/dfu/dfu_device.h | 68 +++--- src/class/dfu/dfu_rt_device.c | 6 +- src/common/tusb_types.h | 2 +- src/device/usbd.c | 2 +- src/tusb_option.h | 4 - 10 files changed, 368 insertions(+), 255 deletions(-) (limited to 'src/common') diff --git a/examples/device/dfu/src/main.c b/examples/device/dfu/src/main.c index 2c114c5a2..1621a330b 100644 --- a/examples/device/dfu/src/main.c +++ b/examples/device/dfu/src/main.c @@ -26,7 +26,7 @@ /* * After device is enumerated in dfu mode run the following commands * - * To transfer firmware from host to device: + * To transfer firmware from host to device (best to test with text file) * * $ dfu-util -d cafe -a 0 -D [filename] * $ dfu-util -d cafe -a 1 -D [filename] @@ -45,22 +45,21 @@ #include "bsp/board.h" #include "tusb.h" - //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF PROTYPES //--------------------------------------------------------------------+ -#ifndef DFU_VERBOSE -#define DFU_VERBOSE 0 -#endif +const char* upload_image[2]= +{ + "Hello world from TinyUSB DFU! - Partition 0", + "Hello world from TinyUSB DFU! - Partition 1" +}; /* Blink pattern - * - 1000 ms : device should reboot * - 250 ms : device not mounted * - 1000 ms : device mounted * - 2500 ms : device is suspended */ enum { - BLINK_DFU_MODE = 100, BLINK_NOT_MOUNTED = 250, BLINK_MOUNTED = 1000, BLINK_SUSPENDED = 2500, @@ -118,65 +117,87 @@ void tud_resume_cb(void) } //--------------------------------------------------------------------+ -// Class callbacks +// DFU callbacks +// Note: alt is used as the partition number, in order to support multiple partitions like FLASH, EEPROM, etc. //--------------------------------------------------------------------+ -bool tud_dfu_firmware_valid_check_cb(uint8_t alt) -{ - (void) alt; - printf(" Firmware check\r\n"); - return true; -} -uint32_t tud_dfu_get_status_cb(uint8_t alt, uint8_t state) +// Invoked right before tud_dfu_download_cb() (state=DFU_DNBUSY) or tud_dfu_manifest_cb() (state=DFU_MANIFEST) +// Application return timeout in milliseconds (bwPollTimeout) for the next download/manifest operation. +// During this period, USB host won't try to communicate with us. +uint32_t tud_dfu_get_timeout_cb(uint8_t alt, uint8_t state) { - // For example Alt1 (EEPROM) is slow, add 2000ms timeout if ( state == DFU_DNBUSY ) { - if (alt == 1) return 2000; + // For this example + // - Atl0 Flash is fast : 1 ms + // - Alt1 EEPROM is slow: 100 ms + return (alt == 0) ? 1 : 100; } + else if (state == DFU_MANIFEST) + { + // since we don't buffer entire image and do any flashing in manifest stage + return 0; + } + return 0; } -void tud_dfu_download_cb(uint8_t alt, uint16_t wBlockNum, uint8_t* data, uint16_t length) +// Invoked when received DFU_DNLOAD (wLength>0) following by DFU_GETSTATUS (state=DFU_DNBUSY) requests +// This callback could be returned before flashing op is complete (async). +// Once finished flashing, application must call tud_dfu_finish_flashing() +void tud_dfu_download_cb(uint8_t alt, uint16_t wBlockNum, uint8_t const* data, uint16_t length) { (void) data; - printf("Received Alt %u BlockNum %u of length %u\r\n", alt, wBlockNum, length); + printf("\r\nReceived Alt %u BlockNum %u of length %u\r\n", alt, wBlockNum, length); -#if DFU_VERBOSE for(uint16_t i=0; ibAttributes; - // CFG_TUD_DFU_TRANSFER_BUFFER_SIZE has to be set to the buffer size used in TUD_DFU_DESCRIPTOR + // CFG_TUD_DFU_TRANSFER_BUFSIZE has to be set to the buffer size used in TUD_DFU_DESCRIPTOR uint16_t const transfer_size = tu_le16toh( tu_unaligned_read16(&func_desc->wTransferSize) ); - TU_ASSERT(transfer_size <= CFG_TUD_DFU_TRANSFER_BUFFER_SIZE, drv_len); + TU_ASSERT(transfer_size <= CFG_TUD_DFU_TRANSFER_BUFSIZE, drv_len); return drv_len; } @@ -216,11 +201,10 @@ uint16_t dfu_moded_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, // return false to stall control endpoint (e.g unsupported request) bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request) { - // nothing to do with DATA stage - if ( stage == CONTROL_STAGE_DATA ) return true; - TU_VERIFY(request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_INTERFACE); + TU_LOG2(" DFU State : %s, Status: %s\r\n", tu_lookup_find(&_dfu_state_table, _dfu_ctx.state), tu_lookup_find(&_dfu_status_table, _dfu_ctx.status)); + if ( request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD ) { // Standard request include GET/SET_INTERFACE @@ -229,8 +213,8 @@ bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_reque case TUSB_REQ_SET_INTERFACE: if ( stage == CONTROL_STAGE_SETUP ) { - // Switch Alt interface and Re-initalize state machine - _dfu_ctx.alt_num = (uint8_t) request->wValue; + // Switch Alt interface and reset state machine + _dfu_ctx.alt = (uint8_t) request->wValue; reset_state(); return tud_control_status(rhport, request); } @@ -239,7 +223,7 @@ bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_reque case TUSB_REQ_GET_INTERFACE: if(stage == CONTROL_STAGE_SETUP) { - return tud_control_xfer(rhport, request, &_dfu_ctx.alt_num, 1); + return tud_control_xfer(rhport, request, &_dfu_ctx.alt, 1); } break; @@ -249,6 +233,8 @@ bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_reque } else if ( request->bmRequestType_bit.type == TUSB_REQ_TYPE_CLASS ) { + TU_LOG2(" DFU Request: %s\r\n", tu_lookup_find(&_dfu_request_table, request->bRequest)); + // Class request switch ( request->bRequest ) { @@ -259,73 +245,97 @@ bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_reque } else if ( stage == CONTROL_STAGE_ACK ) { - if (tud_dfu_detach_cb) tud_dfu_detach_cb(); + if ( tud_dfu_detach_cb ) tud_dfu_detach_cb(); } break; - case DFU_REQUEST_ABORT: + case DFU_REQUEST_CLRSTATUS: if ( stage == CONTROL_STAGE_SETUP ) { - if (tud_dfu_abort_cb) tud_dfu_abort_cb(_dfu_ctx.alt_num); - reset_state(); tud_control_status(rhport, request); } break; - case DFU_REQUEST_CLRSTATUS: + case DFU_REQUEST_GETSTATE: if ( stage == CONTROL_STAGE_SETUP ) { - reset_state(); - tud_control_status(rhport, request); + tud_control_xfer(rhport, request, &_dfu_ctx.state, 1); } break; - case DFU_REQUEST_GETSTATE: + case DFU_REQUEST_ABORT: if ( stage == CONTROL_STAGE_SETUP ) { - tud_control_xfer(rhport, request, &_dfu_ctx.state, 1); + reset_state(); + tud_control_status(rhport, request); + } + else if ( stage == CONTROL_STAGE_ACK ) + { + if ( tud_dfu_abort_cb ) tud_dfu_abort_cb(_dfu_ctx.alt); } break; case DFU_REQUEST_UPLOAD: if ( stage == CONTROL_STAGE_SETUP ) { - TU_VERIFY(_dfu_ctx.attrs & DFU_FUNC_ATTR_CAN_UPLOAD_BITMASK); + TU_VERIFY(_dfu_ctx.attrs & DFU_ATTR_CAN_UPLOAD); TU_VERIFY(tud_dfu_upload_cb); - TU_VERIFY(request->wLength <= CFG_TUD_DFU_TRANSFER_BUFFER_SIZE); + TU_VERIFY(request->wLength <= CFG_TUD_DFU_TRANSFER_BUFSIZE); - uint16_t const xfer_len = tud_dfu_upload_cb(_dfu_ctx.alt_num, request->wValue, _dfu_ctx.transfer_buf, request->wLength); + uint16_t const xfer_len = tud_dfu_upload_cb(_dfu_ctx.alt, request->wValue, _dfu_ctx.transfer_buf, request->wLength); - tud_control_xfer(rhport, request, _dfu_ctx.transfer_buf, xfer_len); + return tud_control_xfer(rhport, request, _dfu_ctx.transfer_buf, xfer_len); } break; case DFU_REQUEST_DNLOAD: - { - if ( (stage == CONTROL_STAGE_ACK) - && ((_dfu_ctx.attrs & DFU_FUNC_ATTR_CAN_DOWNLOAD_BITMASK) != 0) - && (_dfu_ctx.state == DFU_DNLOAD_SYNC)) + if ( stage == CONTROL_STAGE_SETUP ) { - _dfu_ctx.block = request->wValue; + TU_VERIFY(_dfu_ctx.attrs & DFU_ATTR_CAN_DOWNLOAD); + TU_VERIFY(_dfu_ctx.state == DFU_IDLE || _dfu_ctx.state == DFU_DNLOAD_IDLE); + TU_VERIFY(request->wLength <= CFG_TUD_DFU_TRANSFER_BUFSIZE); + + // set to true for both download and manifest + _dfu_ctx.flashing_in_progress = true; + + // save block and length for flashing + _dfu_ctx.block = request->wValue; _dfu_ctx.length = request->wLength; - return true; + + if ( request->wLength ) + { + // Download with payload -> transition to DOWNLOAD SYNC + _dfu_ctx.state = DFU_DNLOAD_SYNC; + return tud_control_xfer(rhport, request, _dfu_ctx.transfer_buf, request->wLength); + } + else + { + // Download is complete -> transition to MANIFEST SYNC + _dfu_ctx.state = DFU_MANIFEST_SYNC; + return tud_control_status(rhport, request); + } } - } - // fallthrough - case DFU_REQUEST_GETSTATUS: + break; - { - if(stage == CONTROL_STAGE_SETUP) + case DFU_REQUEST_GETSTATUS: + switch ( _dfu_ctx.state ) { - return dfu_state_machine(rhport, request); + case DFU_DNLOAD_SYNC: + return process_download_get_status(rhport, stage, request); + break; + + case DFU_MANIFEST_SYNC: + return process_manifest_get_status(rhport, stage, request); + break; + + default: + if ( stage == CONTROL_STAGE_SETUP ) return reply_getstatus(rhport, request, _dfu_ctx.state, _dfu_ctx.status, 0); + break; } - } break; - default: - return false; // stall unsupported request - break; + default: return false; // stall unsupported request } }else { @@ -335,32 +345,130 @@ bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_reque return true; } -static void dfu_req_getstatus_reply(uint8_t rhport, tusb_control_request_t const * request) +void tud_dfu_finish_flashing(uint8_t status) +{ + _dfu_ctx.flashing_in_progress = false; + + if ( status == DFU_STATUS_OK ) + { + if (_dfu_ctx.state == DFU_DNBUSY) + { + _dfu_ctx.state = DFU_DNLOAD_SYNC; + } + else if (_dfu_ctx.state == DFU_MANIFEST) + { + _dfu_ctx.state = (_dfu_ctx.attrs & DFU_ATTR_MANIFESTATION_TOLERANT) + ? DFU_MANIFEST_SYNC : DFU_MANIFEST_WAIT_RESET; + } + } + else + { + // failed while flashing, move to dfuError + _dfu_ctx.state = DFU_ERROR; + _dfu_ctx.status = status; + } +} + +static bool process_download_get_status(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request) +{ + if ( stage == CONTROL_STAGE_SETUP ) + { + // only transition to next state on CONTROL_STAGE_ACK + dfu_state_t next_state; + uint32_t timeout; + + if ( _dfu_ctx.flashing_in_progress ) + { + next_state = DFU_DNBUSY; + timeout = tud_dfu_get_timeout_cb(_dfu_ctx.alt, (uint8_t) next_state); + } + else + { + next_state = DFU_DNLOAD_IDLE; + timeout = 0; + } + + return reply_getstatus(rhport, request, next_state, _dfu_ctx.status, timeout); + } + else if ( stage == CONTROL_STAGE_ACK ) + { + if ( _dfu_ctx.flashing_in_progress ) + { + _dfu_ctx.state = DFU_DNBUSY; + tud_dfu_download_cb(_dfu_ctx.alt, _dfu_ctx.block, _dfu_ctx.transfer_buf, _dfu_ctx.length); + }else + { + _dfu_ctx.state = DFU_DNLOAD_IDLE; + } + } + + return true; +} + +static bool process_manifest_get_status(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request) { - uint32_t timeout = 0; - if ( tud_dfu_get_status_cb ) + if ( stage == CONTROL_STAGE_SETUP ) { - timeout = tud_dfu_get_status_cb(_dfu_ctx.alt_num, _dfu_ctx.state); + // only transition to next state on CONTROL_STAGE_ACK + dfu_state_t next_state; + uint32_t timeout; + + if ( _dfu_ctx.flashing_in_progress ) + { + next_state = DFU_MANIFEST; + timeout = tud_dfu_get_timeout_cb(_dfu_ctx.alt, next_state); + } + else + { + next_state = DFU_IDLE; + timeout = 0; + } + + return reply_getstatus(rhport, request, next_state, _dfu_ctx.status, timeout); + } + else if ( stage == CONTROL_STAGE_ACK ) + { + if ( _dfu_ctx.flashing_in_progress ) + { + _dfu_ctx.state = DFU_MANIFEST; + tud_dfu_manifest_cb(_dfu_ctx.alt); + } + else + { + _dfu_ctx.state = DFU_IDLE; + } } - dfu_status_req_payload_t resp; - resp.bStatus = _dfu_ctx.status; + return true; +} + +static bool reply_getstatus(uint8_t rhport, tusb_control_request_t const * request, dfu_state_t state, dfu_status_t status, uint32_t timeout) +{ + dfu_status_response_t resp; + resp.bStatus = (uint8_t) status; resp.bwPollTimeout[0] = TU_U32_BYTE0(timeout); resp.bwPollTimeout[1] = TU_U32_BYTE1(timeout); resp.bwPollTimeout[2] = TU_U32_BYTE2(timeout); - resp.bState = _dfu_ctx.state; - resp.iString = 0; + resp.bState = (uint8_t) state; + resp.iString = 0; - tud_control_xfer(rhport, request, &resp, sizeof(dfu_status_req_payload_t)); + return tud_control_xfer(rhport, request, &resp, sizeof(dfu_status_response_t)); } + +#if 0 + +static void dfu_req_dnload_setup(uint8_t rhport, tusb_control_request_t const * request); +static void dfu_req_dnload_reply(uint8_t rhport, tusb_control_request_t const * request); +static bool dfu_state_machine(uint8_t rhport, tusb_control_request_t const * request); + static void dfu_req_dnload_setup(uint8_t rhport, tusb_control_request_t const * request) { // TODO: add "zero" copy mode so the buffer we read into can be provided by the user // if they wish, there still will be the internal control buffer copy to this buffer // but this mode would provide zero copy from the class driver to the application - TU_VERIFY( request->wLength <= CFG_TUD_DFU_TRANSFER_BUFFER_SIZE, ); + TU_VERIFY( request->wLength <= CFG_TUD_DFU_TRANSFER_BUFSIZE, ); // setup for data phase tud_control_xfer(rhport, request, _dfu_ctx.transfer_buf, request->wLength); } @@ -368,21 +476,9 @@ static void dfu_req_dnload_setup(uint8_t rhport, tusb_control_request_t const * static void dfu_req_dnload_reply(uint8_t rhport, tusb_control_request_t const * request) { (void) rhport; - TU_VERIFY( request->wLength <= CFG_TUD_DFU_TRANSFER_BUFFER_SIZE, ); - tud_dfu_download_cb(_dfu_ctx.alt_num,_dfu_ctx.block, (uint8_t *)_dfu_ctx.transfer_buf, _dfu_ctx.length); - _dfu_ctx.blk_transfer_in_proc = false; -} - -void tud_dfu_download_complete(void) -{ - if (_dfu_ctx.state == DFU_DNBUSY) - { - _dfu_ctx.state = DFU_DNLOAD_SYNC; - } else if (_dfu_ctx.state == DFU_MANIFEST) - { - _dfu_ctx.state = ((_dfu_ctx.attrs & DFU_FUNC_ATTR_MANIFESTATION_TOLERANT_BITMASK) == 0) - ? DFU_MANIFEST_WAIT_RESET : DFU_MANIFEST_SYNC; - } + TU_VERIFY( request->wLength <= CFG_TUD_DFU_TRANSFER_BUFSIZE, ); + tud_dfu_download_cb(_dfu_ctx.alt,_dfu_ctx.block, (uint8_t *)_dfu_ctx.transfer_buf, _dfu_ctx.length); + _dfu_ctx.flashing_in_progress = false; } static bool dfu_state_machine(uint8_t rhport, tusb_control_request_t const * request) @@ -398,11 +494,11 @@ static bool dfu_state_machine(uint8_t rhport, tusb_control_request_t const * req { case DFU_REQUEST_DNLOAD: { - if( ((_dfu_ctx.attrs & DFU_FUNC_ATTR_CAN_DOWNLOAD_BITMASK) != 0) + if( ((_dfu_ctx.attrs & DFU_ATTR_CAN_DOWNLOAD) != 0) && (request->wLength > 0) ) { _dfu_ctx.state = DFU_DNLOAD_SYNC; - _dfu_ctx.blk_transfer_in_proc = true; + _dfu_ctx.flashing_in_progress = true; dfu_req_dnload_setup(rhport, request); } else { _dfu_ctx.state = DFU_ERROR; @@ -411,7 +507,7 @@ static bool dfu_state_machine(uint8_t rhport, tusb_control_request_t const * req break; case DFU_REQUEST_GETSTATUS: - dfu_req_getstatus_reply(rhport, request); + reply_getstatus(rhport, request); break; default: @@ -428,14 +524,14 @@ static bool dfu_state_machine(uint8_t rhport, tusb_control_request_t const * req { case DFU_REQUEST_GETSTATUS: { - if ( _dfu_ctx.blk_transfer_in_proc ) + if ( _dfu_ctx.flashing_in_progress ) { _dfu_ctx.state = DFU_DNBUSY; - dfu_req_getstatus_reply(rhport, request); + reply_getstatus(rhport, request); dfu_req_dnload_reply(rhport, request); } else { _dfu_ctx.state = DFU_DNLOAD_IDLE; - dfu_req_getstatus_reply(rhport, request); + reply_getstatus(rhport, request); } } break; @@ -466,14 +562,14 @@ static bool dfu_state_machine(uint8_t rhport, tusb_control_request_t const * req { case DFU_REQUEST_DNLOAD: { - if( ((_dfu_ctx.attrs & DFU_FUNC_ATTR_CAN_DOWNLOAD_BITMASK) != 0) + if( ((_dfu_ctx.attrs & DFU_ATTR_CAN_DOWNLOAD) != 0) && (request->wLength > 0) ) { _dfu_ctx.state = DFU_DNLOAD_SYNC; - _dfu_ctx.blk_transfer_in_proc = true; + _dfu_ctx.flashing_in_progress = true; dfu_req_dnload_setup(rhport, request); } else { - if ( tud_dfu_device_data_done_check_cb(_dfu_ctx.alt_num) ) + if ( tud_dfu_download_complete_cb(_dfu_ctx.alt) ) { _dfu_ctx.state = DFU_MANIFEST_SYNC; tud_control_status(rhport, request); @@ -486,7 +582,7 @@ static bool dfu_state_machine(uint8_t rhport, tusb_control_request_t const * req break; case DFU_REQUEST_GETSTATUS: - dfu_req_getstatus_reply(rhport, request); + reply_getstatus(rhport, request); break; default: @@ -503,17 +599,17 @@ static bool dfu_state_machine(uint8_t rhport, tusb_control_request_t const * req { case DFU_REQUEST_GETSTATUS: { - if ((_dfu_ctx.attrs & DFU_FUNC_ATTR_MANIFESTATION_TOLERANT_BITMASK) == 0) + if ((_dfu_ctx.attrs & DFU_ATTR_MANIFESTATION_TOLERANT) == 0) { _dfu_ctx.state = DFU_MANIFEST; - dfu_req_getstatus_reply(rhport, request); + reply_getstatus(rhport, request); } else { - if ( tud_dfu_firmware_valid_check_cb(_dfu_ctx.alt_num) ) + if ( tud_dfu_manifest_cb(_dfu_ctx.alt) ) { _dfu_ctx.state = DFU_IDLE; } - dfu_req_getstatus_reply(rhport, request); + reply_getstatus(rhport, request); } } break; @@ -556,7 +652,7 @@ static bool dfu_state_machine(uint8_t rhport, tusb_control_request_t const * req switch (request->bRequest) { case DFU_REQUEST_GETSTATUS: - dfu_req_getstatus_reply(rhport, request); + reply_getstatus(rhport, request); break; default: @@ -571,7 +667,7 @@ static bool dfu_state_machine(uint8_t rhport, tusb_control_request_t const * req switch (request->bRequest) { case DFU_REQUEST_GETSTATUS: - dfu_req_getstatus_reply(rhport, request); + reply_getstatus(rhport, request); break; default: @@ -590,5 +686,6 @@ static bool dfu_state_machine(uint8_t rhport, tusb_control_request_t const * req return true; } +#endif #endif diff --git a/src/class/dfu/dfu_device.h b/src/class/dfu/dfu_device.h index d5d464f3b..2d398aada 100644 --- a/src/class/dfu/dfu_device.h +++ b/src/class/dfu/dfu_device.h @@ -37,53 +37,51 @@ // Class Driver Default Configure & Validation //--------------------------------------------------------------------+ -#if !defined(CFG_TUD_DFU_TRANSFER_BUFFER_SIZE) - #error "CFG_TUD_DFU_TRANSFER_BUFFER_SIZE must be defined, it has to be set to the buffer size used in TUD_DFU_DESCRIPTOR" +#if !defined(CFG_TUD_DFU_TRANSFER_BUFSIZE) + #error "CFG_TUD_DFU_TRANSFER_BUFSIZE must be defined, it has to be set to the buffer size used in TUD_DFU_DESCRIPTOR" #endif +//--------------------------------------------------------------------+ +// Application API +//--------------------------------------------------------------------+ + +// Must be called when the application is done with flashing started by +// tud_dfu_download_cb() and tud_dfu_manifest_cb(). +// status is DFU_STATUS_OK if successful, any other error status will cause state to enter dfuError +void tud_dfu_finish_flashing(uint8_t status); + //--------------------------------------------------------------------+ // Application Callback API (weak is optional) //--------------------------------------------------------------------+ -// Invoked during DFU_MANIFEST_SYNC get status request to check if firmware is valid -// alt is used as the partition number, in order to support multiple partitions like FLASH, EEPROM, etc. -bool tud_dfu_firmware_valid_check_cb(uint8_t alt); - -// Invoked when a DFU_GETSTATUS request is received -// Return the bwPollTimeout value for host's response, useful for slow Flash in order to make host wait longer -// alt is used as the partition number, in order to support multiple partitions like FLASH, EEPROM, etc. -TU_ATTR_WEAK uint32_t tud_dfu_get_status_cb(uint8_t alt, uint8_t state); - -// Invoked when a DFU_DNLOAD request is received -// alt is used as the partition number, in order to support multiple partitions like FLASH, EEPROM, etc. -// This callback takes the wBlockNum chunk of length length and provides it -// to the application at the data pointer. This data is only valid for this -// call, so the app must use it not or copy it. -void tud_dfu_download_cb(uint8_t alt, uint16_t wBlockNum, uint8_t* data, uint16_t length); - -// Must be called when the application is done using the last block of data -// provided by tud_dfu_download_cb -void tud_dfu_download_complete(void); - -// Invoked during the last DFU_DNLOAD request, signifying that the host believes -// it is done transmitting data. -// alt is used as the partition number, in order to support multiple partitions like FLASH, EEPROM, etc. -// Return true if the application agrees there is no more data -// Return false if the device disagrees, which will stall the pipe, and the Host -// should initiate a recovery procedure -bool tud_dfu_device_data_done_check_cb(uint8_t alt); -// Invoked when the Host has terminated a download or upload transfer -TU_ATTR_WEAK void tud_dfu_abort_cb(uint8_t alt); +// Note: alt is used as the partition number, in order to support multiple partitions like FLASH, EEPROM, etc. -// Invoked when a DFU_UPLOAD request is received -// alt is used as the partition number, in order to support multiple partitions like FLASH, EEPROM, etc. -// This callback must populate data with up to length bytes -// Return the number of bytes to write +// Invoked right before tud_dfu_download_cb() (state=DFU_DNBUSY) or tud_dfu_manifest_cb() (state=DFU_MANIFEST) +// Application return timeout in milliseconds (bwPollTimeout) for the next download/manifest operation. +// During this period, USB host won't try to communicate with us. +uint32_t tud_dfu_get_timeout_cb(uint8_t alt, uint8_t state); + +// Invoked when received DFU_DNLOAD (wLength>0) following by DFU_GETSTATUS (state=DFU_DNBUSY) requests +// This callback could be returned before flashing op is complete (async). +// Once finished flashing, application must call tud_dfu_finish_flashing() +void tud_dfu_download_cb (uint8_t alt, uint16_t block_num, uint8_t const *data, uint16_t length); + +// Invoked when download process is complete, received DFU_DNLOAD (wLength=0) following by DFU_GETSTATUS (state=Manifest) +// Application can do checksum, or actual flashing if buffered entire image previously. +// Once finished flashing, application must call tud_dfu_finish_flashing() +void tud_dfu_manifest_cb(uint8_t alt); + +// Invoked when received DFU_UPLOAD request +// Application must populate data with up to length bytes and +// Return the number of written bytes TU_ATTR_WEAK uint16_t tud_dfu_upload_cb(uint8_t alt, uint16_t block_num, uint8_t* data, uint16_t length); // Invoked when a DFU_DETACH request is received TU_ATTR_WEAK void tud_dfu_detach_cb(void); +// Invoked when the Host has terminated a download or upload transfer +TU_ATTR_WEAK void tud_dfu_abort_cb(uint8_t alt); + //--------------------------------------------------------------------+ // Internal Class Driver API //--------------------------------------------------------------------+ diff --git a/src/class/dfu/dfu_rt_device.c b/src/class/dfu/dfu_rt_device.c index 07e6f30f3..afee2aa1f 100644 --- a/src/class/dfu/dfu_rt_device.c +++ b/src/class/dfu/dfu_rt_device.c @@ -108,10 +108,10 @@ bool dfu_rtd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request case DFU_REQUEST_GETSTATUS: { TU_LOG2(" DFU RT Request: GETSTATUS\r\n"); - dfu_status_req_payload_t resp; + dfu_status_response_t resp; // Status = OK, Poll timeout is ignored during RT, State = APP_IDLE, IString = 0 - memset(&resp, 0x00, sizeof(dfu_status_req_payload_t)); - tud_control_xfer(rhport, request, &resp, sizeof(dfu_status_req_payload_t)); + memset(&resp, 0x00, sizeof(dfu_status_response_t)); + tud_control_xfer(rhport, request, &resp, sizeof(dfu_status_response_t)); } break; diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index fc1035e2c..eab67ebd5 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -449,7 +449,7 @@ typedef struct TU_ATTR_PACKED /*------------------------------------------------------------------*/ /* Types *------------------------------------------------------------------*/ -typedef struct TU_ATTR_PACKED TU_ATTR_ALIGNED(4) { +typedef struct TU_ATTR_PACKED { union { struct TU_ATTR_PACKED { uint8_t recipient : 5; ///< Recipient type tusb_request_recipient_t. diff --git a/src/device/usbd.c b/src/device/usbd.c index af4fd58c4..cf9af783d 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -190,7 +190,7 @@ static usbd_class_driver_t const _usbd_driver[] = #if CFG_TUD_DFU_MODE { - DRIVER_NAME("DFU-MODE") + DRIVER_NAME("DFU") .init = dfu_moded_init, .reset = dfu_moded_reset, .open = dfu_moded_open, diff --git a/src/tusb_option.h b/src/tusb_option.h index bf7591dcf..4351d9486 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -253,10 +253,6 @@ #define CFG_TUD_DFU_MODE 0 #endif -#ifndef CFG_TUD_DFU_TRANSFER_BUFFER_SIZE - #define CFG_TUD_DFU_TRANSFER_BUFFER_SIZE 64 -#endif - #ifndef CFG_TUD_NET #define CFG_TUD_NET 0 #endif -- cgit v1.3.1 From 4e50ceba48c15206543fe662f098a98152ef4235 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 22 Jul 2021 17:07:39 +0700 Subject: rename packed begin/end --- src/class/cdc/cdc.h | 20 ++++++++++---------- src/common/tusb_compiler.h | 8 ++++---- src/common/tusb_types.h | 4 ++-- src/portable/renesas/usba/dcd_usba.c | 4 ++-- 4 files changed, 18 insertions(+), 18 deletions(-) (limited to 'src/common') diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h index f59690835..7a06711be 100644 --- a/src/class/cdc/cdc.h +++ b/src/class/cdc/cdc.h @@ -215,7 +215,7 @@ typedef enum // Class Specific Functional Descriptor (Communication Interface) //--------------------------------------------------------------------+ -TU_PACK_STRUCT_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) +TU_ATTR_PACKED_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) /// Header Functional Descriptor (Communication Interface) typedef struct TU_ATTR_PACKED @@ -236,10 +236,10 @@ typedef struct TU_ATTR_PACKED uint8_t bSubordinateInterface ; ///< Array of Interface number of Data Interface }cdc_desc_func_union_t; -TU_PACK_STRUCT_END // End of definition of packed structs (used by the CCRX toolchain) +TU_ATTR_PACKED_END // End of definition of packed structs (used by the CCRX toolchain) #define cdc_desc_func_union_n_t(no_slave)\ - TU_PACK_STRUCT_BEGIN \ + TU_ATTR_PACKED_BEGIN \ struct TU_ATTR_PACKED { \ uint8_t bLength ;\ uint8_t bDescriptorType ;\ @@ -247,10 +247,10 @@ TU_PACK_STRUCT_END // End of definition of packed structs (used by the CCRX too uint8_t bControlInterface ;\ uint8_t bSubordinateInterface[no_slave] ;\ } \ -TU_PACK_STRUCT_END +TU_ATTR_PACKED_END -TU_PACK_STRUCT_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) +TU_ATTR_PACKED_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) /// Country Selection Functional Descriptor (Communication Interface) typedef struct TU_ATTR_PACKED @@ -262,10 +262,10 @@ typedef struct TU_ATTR_PACKED uint16_t wCountryCode ; ///< Country code in the format as defined in [ISO3166], release date as specified inoffset 3 for the first supported country. }cdc_desc_func_country_selection_t; -TU_PACK_STRUCT_END // End of definition of packed structs (used by the CCRX toolchain) +TU_ATTR_PACKED_END // End of definition of packed structs (used by the CCRX toolchain) #define cdc_desc_func_country_selection_n_t(no_country) \ - TU_PACK_STRUCT_BEGIN \ + TU_ATTR_PACKED_BEGIN \ struct TU_ATTR_PACKED { \ uint8_t bLength ;\ uint8_t bDescriptorType ;\ @@ -273,13 +273,13 @@ TU_PACK_STRUCT_END // End of definition of packed structs (used by the CCRX too uint8_t iCountryCodeRelDate ;\ uint16_t wCountryCode[no_country] ;\ } \ -TU_PACK_STRUCT_END +TU_ATTR_PACKED_END //--------------------------------------------------------------------+ // PUBLIC SWITCHED TELEPHONE NETWORK (PSTN) SUBCLASS //--------------------------------------------------------------------+ -TU_PACK_STRUCT_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) +TU_ATTR_PACKED_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) /// \brief Call Management Functional Descriptor /// \details This functional descriptor describes the processing of calls for the Communications Class interface. @@ -419,7 +419,7 @@ typedef struct TU_ATTR_PACKED } cdc_line_control_state_t; TU_BIT_FIELD_ORDER_END -TU_PACK_STRUCT_END // End of definition of packed structs (used by the CCRX toolchain) +TU_ATTR_PACKED_END // End of definition of packed structs (used by the CCRX toolchain) TU_VERIFY_STATIC(sizeof(cdc_line_control_state_t) == 2, "size is not correct"); diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 6fdd08032..1f3128e0e 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -79,8 +79,8 @@ #define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused #define TU_ATTR_USED __attribute__ ((used)) // Function/Variable is meant to be used - #define TU_PACK_STRUCT_BEGIN - #define TU_PACK_STRUCT_END + #define TU_ATTR_PACKED_BEGIN + #define TU_ATTR_PACKED_END #define TU_BIT_FIELD_ORDER_BEGIN #define TU_BIT_FIELD_ORDER_END @@ -150,8 +150,8 @@ #define TU_ATTR_UNUSED #define TU_ATTR_USED - #define TU_PACK_STRUCT_BEGIN _Pragma("pack") - #define TU_PACK_STRUCT_END _Pragma("packoption") + #define TU_ATTR_PACKED_BEGIN _Pragma("pack") + #define TU_ATTR_PACKED_END _Pragma("packoption") #define TU_BIT_FIELD_ORDER_BEGIN _Pragma("bit_order right") #define TU_BIT_FIELD_ORDER_END _Pragma("bit_order") diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index f34eb3075..34395365e 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -262,7 +262,7 @@ enum // USB Descriptors //--------------------------------------------------------------------+ -TU_PACK_STRUCT_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) +TU_ATTR_PACKED_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) /// USB Device Descriptor typedef struct TU_ATTR_PACKED @@ -479,7 +479,7 @@ typedef struct TU_ATTR_PACKED{ } tusb_control_request_t; TU_BIT_FIELD_ORDER_END -TU_PACK_STRUCT_END // End of definition of packed structs (used by the CCRX toolchain) +TU_ATTR_PACKED_END // End of definition of packed structs (used by the CCRX toolchain) TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct"); diff --git a/src/portable/renesas/usba/dcd_usba.c b/src/portable/renesas/usba/dcd_usba.c index 67b92dc89..0c206fdd0 100644 --- a/src/portable/renesas/usba/dcd_usba.c +++ b/src/portable/renesas/usba/dcd_usba.c @@ -120,7 +120,7 @@ typedef union { } hw_fifo_t; TU_BIT_FIELD_ORDER_END -TU_PACK_STRUCT_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) +TU_ATTR_PACKED_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED @@ -135,7 +135,7 @@ typedef struct TU_ATTR_PACKED } pipe_state_t; TU_BIT_FIELD_ORDER_END -TU_PACK_STRUCT_END // End of definition of packed structs (used by the CCRX toolchain) +TU_ATTR_PACKED_END // End of definition of packed structs (used by the CCRX toolchain) typedef struct { -- cgit v1.3.1 From c4da1abb1eaa7aff432535878ada519d02382419 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 22 Jul 2021 17:24:59 +0700 Subject: rename bit filed order clean up packed/bit order begin end --- src/class/cdc/cdc.h | 41 +++++++----------------------------- src/common/tusb_compiler.h | 8 +++---- src/common/tusb_types.h | 24 +++++++++------------ src/portable/renesas/usba/dcd_usba.c | 12 +++++------ 4 files changed, 28 insertions(+), 57 deletions(-) (limited to 'src/common') diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h index 7a06711be..6042cefe3 100644 --- a/src/class/cdc/cdc.h +++ b/src/class/cdc/cdc.h @@ -215,7 +215,9 @@ typedef enum // Class Specific Functional Descriptor (Communication Interface) //--------------------------------------------------------------------+ -TU_ATTR_PACKED_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) +// Start of all packed definitions for compiler without per-type packed +TU_ATTR_PACKED_BEGIN +TU_ATTR_BIT_FIELD_ORDER_BEGIN /// Header Functional Descriptor (Communication Interface) typedef struct TU_ATTR_PACKED @@ -236,10 +238,7 @@ typedef struct TU_ATTR_PACKED uint8_t bSubordinateInterface ; ///< Array of Interface number of Data Interface }cdc_desc_func_union_t; -TU_ATTR_PACKED_END // End of definition of packed structs (used by the CCRX toolchain) - #define cdc_desc_func_union_n_t(no_slave)\ - TU_ATTR_PACKED_BEGIN \ struct TU_ATTR_PACKED { \ uint8_t bLength ;\ uint8_t bDescriptorType ;\ @@ -247,10 +246,6 @@ TU_ATTR_PACKED_END // End of definition of packed structs (used by the CCRX too uint8_t bControlInterface ;\ uint8_t bSubordinateInterface[no_slave] ;\ } \ -TU_ATTR_PACKED_END - - -TU_ATTR_PACKED_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) /// Country Selection Functional Descriptor (Communication Interface) typedef struct TU_ATTR_PACKED @@ -262,10 +257,7 @@ typedef struct TU_ATTR_PACKED uint16_t wCountryCode ; ///< Country code in the format as defined in [ISO3166], release date as specified inoffset 3 for the first supported country. }cdc_desc_func_country_selection_t; -TU_ATTR_PACKED_END // End of definition of packed structs (used by the CCRX toolchain) - #define cdc_desc_func_country_selection_n_t(no_country) \ - TU_ATTR_PACKED_BEGIN \ struct TU_ATTR_PACKED { \ uint8_t bLength ;\ uint8_t bDescriptorType ;\ @@ -273,17 +265,13 @@ TU_ATTR_PACKED_END // End of definition of packed structs (used by the CCRX too uint8_t iCountryCodeRelDate ;\ uint16_t wCountryCode[no_country] ;\ } \ -TU_ATTR_PACKED_END //--------------------------------------------------------------------+ // PUBLIC SWITCHED TELEPHONE NETWORK (PSTN) SUBCLASS //--------------------------------------------------------------------+ -TU_ATTR_PACKED_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) - /// \brief Call Management Functional Descriptor /// \details This functional descriptor describes the processing of calls for the Communications Class interface. -TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. @@ -298,10 +286,7 @@ typedef struct TU_ATTR_PACKED uint8_t bDataInterface; }cdc_desc_func_call_management_t; -TU_BIT_FIELD_ORDER_END - -TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uint8_t support_comm_request : 1; ///< Device supports the request combination of Set_Comm_Feature, Clear_Comm_Feature, and Get_Comm_Feature. @@ -310,12 +295,11 @@ typedef struct TU_ATTR_PACKED uint8_t support_notification_network_connection : 1; ///< Device supports the notification Network_Connection. uint8_t TU_RESERVED : 4; }cdc_acm_capability_t; -TU_BIT_FIELD_ORDER_END TU_VERIFY_STATIC(sizeof(cdc_acm_capability_t) == 1, "mostly problem with compiler"); -/// \brief Abstract Control Management Functional Descriptor -/// \details This functional descriptor describes the commands supported by by the Communications Class interface with SubClass code of \ref CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL +/// Abstract Control Management Functional Descriptor +/// This functional descriptor describes the commands supported by by the Communications Class interface with SubClass code of \ref CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. @@ -326,7 +310,6 @@ typedef struct TU_ATTR_PACKED /// \brief Direct Line Management Functional Descriptor /// \details This functional descriptor describes the commands supported by the Communications Class interface with SubClass code of \ref CDC_FUNC_DESC_DIRECT_LINE_MANAGEMENT -TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. @@ -339,7 +322,6 @@ typedef struct TU_ATTR_PACKED uint8_t TU_RESERVED : 5; } bmCapabilities; }cdc_desc_func_direct_line_management_t; -TU_BIT_FIELD_ORDER_END /// \brief Telephone Ringer Functional Descriptor /// \details The Telephone Ringer functional descriptor describes the ringer capabilities supported by the Communications Class interface, @@ -356,7 +338,6 @@ typedef struct TU_ATTR_PACKED /// \brief Telephone Operational Modes Functional Descriptor /// \details The Telephone Operational Modes functional descriptor describes the operational modes supported by /// the Communications Class interface, with the SubClass code of \ref CDC_COMM_SUBCLASS_TELEPHONE_CONTROL_MODEL -TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. @@ -369,12 +350,10 @@ typedef struct TU_ATTR_PACKED uint8_t TU_RESERVED : 5; } bmCapabilities; }cdc_desc_func_telephone_operational_modes_t; -TU_BIT_FIELD_ORDER_END /// \brief Telephone Call and Line State Reporting Capabilities Descriptor /// \details The Telephone Call and Line State Reporting Capabilities functional descriptor describes the abilities of a /// telephone device to report optional call and line states. -TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. @@ -390,8 +369,8 @@ typedef struct TU_ATTR_PACKED uint32_t TU_RESERVED : 26; } bmCapabilities; }cdc_desc_func_telephone_call_state_reporting_capabilities_t; -TU_BIT_FIELD_ORDER_END +// TODO remove static inline uint8_t cdc_functional_desc_typeof(uint8_t const * p_desc) { return p_desc[2]; @@ -410,21 +389,17 @@ typedef struct TU_ATTR_PACKED TU_VERIFY_STATIC(sizeof(cdc_line_coding_t) == 7, "size is not correct"); -TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uint16_t dte_is_present : 1; ///< Indicates to DCE if DTE is presentor not. This signal corresponds to V.24 signal 108/2 and RS-232 signal DTR. uint16_t half_duplex_carrier_control : 1; uint16_t : 14; } cdc_line_control_state_t; -TU_BIT_FIELD_ORDER_END - -TU_ATTR_PACKED_END // End of definition of packed structs (used by the CCRX toolchain) - TU_VERIFY_STATIC(sizeof(cdc_line_control_state_t) == 2, "size is not correct"); -/** @} */ +TU_ATTR_PACKED_END // End of all packed definitions +TU_ATTR_BIT_FIELD_ORDER_END #ifdef __cplusplus } diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 1f3128e0e..820782d65 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -82,8 +82,8 @@ #define TU_ATTR_PACKED_BEGIN #define TU_ATTR_PACKED_END - #define TU_BIT_FIELD_ORDER_BEGIN - #define TU_BIT_FIELD_ORDER_END + #define TU_ATTR_BIT_FIELD_ORDER_BEGIN + #define TU_ATTR_BIT_FIELD_ORDER_END // Endian conversion use well-known host to network (big endian) naming #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ @@ -153,8 +153,8 @@ #define TU_ATTR_PACKED_BEGIN _Pragma("pack") #define TU_ATTR_PACKED_END _Pragma("packoption") - #define TU_BIT_FIELD_ORDER_BEGIN _Pragma("bit_order right") - #define TU_BIT_FIELD_ORDER_END _Pragma("bit_order") + #define TU_ATTR_BIT_FIELD_ORDER_BEGIN _Pragma("bit_order right") + #define TU_ATTR_BIT_FIELD_ORDER_END _Pragma("bit_order") // Endian conversion use well-known host to network (big endian) naming #if defined(__LIT) diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 34395365e..d23c6b2dd 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -262,7 +262,9 @@ enum // USB Descriptors //--------------------------------------------------------------------+ -TU_ATTR_PACKED_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) +// Start of all packed definitions for compiler without per-type packed +TU_ATTR_PACKED_BEGIN +TU_ATTR_BIT_FIELD_ORDER_BEGIN /// USB Device Descriptor typedef struct TU_ATTR_PACKED @@ -297,6 +299,8 @@ typedef struct TU_ATTR_PACKED uint8_t bNumDeviceCaps ; ///< Number of device capability descriptors in the BOS } tusb_desc_bos_t; +TU_VERIFY_STATIC( sizeof(tusb_desc_bos_t) == 5, "size is not correct"); + /// USB Configuration Descriptor typedef struct TU_ATTR_PACKED { @@ -328,8 +332,9 @@ typedef struct TU_ATTR_PACKED uint8_t iInterface ; ///< Index of string descriptor describing this interface } tusb_desc_interface_t; +TU_VERIFY_STATIC( sizeof(tusb_desc_interface_t) == 9, "size is not correct"); + /// USB Endpoint Descriptor -TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes @@ -357,7 +362,6 @@ typedef struct TU_ATTR_PACKED uint8_t bInterval ; ///< Interval for polling endpoint for data transfers. Expressed in frames or microframes depending on the device operating speed (i.e., either 1 millisecond or 125 us units). \n- For full-/high-speed isochronous endpoints, this value must be in the range from 1 to 16. The bInterval value is used as the exponent for a \f$ 2^(bInterval-1) \f$ value; e.g., a bInterval of 4 means a period of 8 (\f$ 2^(4-1) \f$). \n- For full-/low-speed interrupt endpoints, the value of this field may be from 1 to 255. \n- For high-speed interrupt endpoints, the bInterval value is used as the exponent for a \f$ 2^(bInterval-1) \f$ value; e.g., a bInterval of 4 means a period of 8 (\f$ 2^(4-1) \f$) . This value must be from 1 to 16. \n- For high-speed bulk/control OUT endpoints, the bInterval must specify the maximum NAK rate of the endpoint. A value of 0 indicates the endpoint never NAKs. Other values indicate at most 1 NAK each bInterval number of microframes. This value must be in the range from 0 to 255. \n Refer to Chapter 5 of USB 2.0 specification for more information. } tusb_desc_endpoint_t; -TU_BIT_FIELD_ORDER_END /// USB Other Speed Configuration Descriptor typedef struct TU_ATTR_PACKED @@ -433,7 +437,6 @@ typedef struct TU_ATTR_PACKED } tusb_desc_webusb_url_t; // DFU Functional Descriptor -TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength; @@ -455,12 +458,10 @@ typedef struct TU_ATTR_PACKED uint16_t wTransferSize; uint16_t bcdDFUVersion; } tusb_desc_dfu_functional_t; -TU_BIT_FIELD_ORDER_END /*------------------------------------------------------------------*/ /* Types *------------------------------------------------------------------*/ -TU_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED{ union { struct TU_ATTR_PACKED { @@ -477,17 +478,12 @@ typedef struct TU_ATTR_PACKED{ uint16_t wIndex; uint16_t wLength; } tusb_control_request_t; -TU_BIT_FIELD_ORDER_END - -TU_ATTR_PACKED_END // End of definition of packed structs (used by the CCRX toolchain) TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct"); -// TODO move to somewhere suitable -static inline uint8_t bm_request_type(uint8_t direction, uint8_t type, uint8_t recipient) -{ - return ((uint8_t) (direction << 7)) | ((uint8_t) (type << 5)) | (recipient); -} + +TU_ATTR_PACKED_END // End of all packed definitions +TU_ATTR_BIT_FIELD_ORDER_END //--------------------------------------------------------------------+ // Endpoint helper diff --git a/src/portable/renesas/usba/dcd_usba.c b/src/portable/renesas/usba/dcd_usba.c index 0c206fdd0..f68f97458 100644 --- a/src/portable/renesas/usba/dcd_usba.c +++ b/src/portable/renesas/usba/dcd_usba.c @@ -95,7 +95,7 @@ #define FIFO_REQ_CLR (1u) #define FIFO_COMPLETE (1u<<1) -TU_BIT_FIELD_ORDER_BEGIN +TU_ATTR_BIT_FIELD_ORDER_BEGIN typedef struct { union { struct { @@ -108,9 +108,9 @@ typedef struct { }; uint16_t TRN; } reg_pipetre_t; -TU_BIT_FIELD_ORDER_END +TU_ATTR_BIT_FIELD_ORDER_END -TU_BIT_FIELD_ORDER_BEGIN +TU_ATTR_BIT_FIELD_ORDER_BEGIN typedef union { struct { volatile uint16_t u8: 8; @@ -118,11 +118,11 @@ typedef union { }; volatile uint16_t u16; } hw_fifo_t; -TU_BIT_FIELD_ORDER_END +TU_ATTR_BIT_FIELD_ORDER_END TU_ATTR_PACKED_BEGIN // Start of definition of packed structs (used by the CCRX toolchain) -TU_BIT_FIELD_ORDER_BEGIN +TU_ATTR_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uintptr_t addr; /* the start address of a transfer data buffer */ @@ -133,7 +133,7 @@ typedef struct TU_ATTR_PACKED uint32_t : 0; }; } pipe_state_t; -TU_BIT_FIELD_ORDER_END +TU_ATTR_BIT_FIELD_ORDER_END TU_ATTR_PACKED_END // End of definition of packed structs (used by the CCRX toolchain) -- cgit v1.3.1 From 15112fdbba8cf4e9ad0d99fafd8b40f07f29fb6d Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 22 Jul 2021 22:10:48 +0700 Subject: clean up compiler --- src/class/cdc/cdc.h | 4 ++-- src/common/tusb_compiler.h | 18 +++++++++++++----- src/portable/renesas/usba/dcd_usba.c | 20 ++++---------------- 3 files changed, 19 insertions(+), 23 deletions(-) (limited to 'src/common') diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h index 6042cefe3..5df47f70b 100644 --- a/src/class/cdc/cdc.h +++ b/src/class/cdc/cdc.h @@ -245,7 +245,7 @@ typedef struct TU_ATTR_PACKED uint8_t bDescriptorSubType ;\ uint8_t bControlInterface ;\ uint8_t bSubordinateInterface[no_slave] ;\ -} \ +} /// Country Selection Functional Descriptor (Communication Interface) typedef struct TU_ATTR_PACKED @@ -264,7 +264,7 @@ typedef struct TU_ATTR_PACKED uint8_t bDescriptorSubType ;\ uint8_t iCountryCodeRelDate ;\ uint16_t wCountryCode[no_country] ;\ -} \ +} //--------------------------------------------------------------------+ // PUBLIC SWITCHED TELEPHONE NETWORK (PSTN) SUBCLASS diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 820782d65..d3adbbc2d 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -81,7 +81,6 @@ #define TU_ATTR_PACKED_BEGIN #define TU_ATTR_PACKED_END - #define TU_ATTR_BIT_FIELD_ORDER_BEGIN #define TU_ATTR_BIT_FIELD_ORDER_END @@ -109,6 +108,11 @@ #define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused #define TU_ATTR_USED __attribute__ ((used)) + #define TU_ATTR_PACKED_BEGIN + #define TU_ATTR_PACKED_END + #define TU_ATTR_BIT_FIELD_ORDER_BEGIN + #define TU_ATTR_BIT_FIELD_ORDER_END + // __BYTE_ORDER is defined in the TI ARM compiler, but not MSP430 (which is little endian) #if ((__BYTE_ORDER__) == (__ORDER_LITTLE_ENDIAN__)) || defined(__MSP430__) #define TU_BYTE_ORDER TU_LITTLE_ENDIAN @@ -130,6 +134,11 @@ #define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused #define TU_ATTR_USED __attribute__ ((used)) // Function/Variable is meant to be used + #define TU_ATTR_PACKED_BEGIN + #define TU_ATTR_PACKED_END + #define TU_ATTR_BIT_FIELD_ORDER_BEGIN + #define TU_ATTR_BIT_FIELD_ORDER_END + // Endian conversion use well-known host to network (big endian) naming #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ #define TU_BYTE_ORDER TU_LITTLE_ENDIAN @@ -150,11 +159,10 @@ #define TU_ATTR_UNUSED #define TU_ATTR_USED - #define TU_ATTR_PACKED_BEGIN _Pragma("pack") - #define TU_ATTR_PACKED_END _Pragma("packoption") - + #define TU_ATTR_PACKED_BEGIN _Pragma("pack") + #define TU_ATTR_PACKED_END _Pragma("packoption") #define TU_ATTR_BIT_FIELD_ORDER_BEGIN _Pragma("bit_order right") - #define TU_ATTR_BIT_FIELD_ORDER_END _Pragma("bit_order") + #define TU_ATTR_BIT_FIELD_ORDER_END _Pragma("bit_order") // Endian conversion use well-known host to network (big endian) naming #if defined(__LIT) diff --git a/src/portable/renesas/usba/dcd_usba.c b/src/portable/renesas/usba/dcd_usba.c index 0b78a6e46..c7eb6e15e 100644 --- a/src/portable/renesas/usba/dcd_usba.c +++ b/src/portable/renesas/usba/dcd_usba.c @@ -334,11 +334,7 @@ static bool process_edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, pipe_state_t *pipe = &_dcd.pipe[0]; /* configure fifo direction and access unit settings */ if (ep_addr) { /* IN, 2 bytes */ -#if TU_BYTE_ORDER == TU_BIG_ENDIAN - USB0.CFIFOSEL.WORD = USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | USB_FIFOSEL_BIGEND; -#else - USB0.CFIFOSEL.WORD = USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16; -#endif + USB0.CFIFOSEL.WORD = USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); while (!(USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX)) ; } else { /* OUT, a byte */ USB0.CFIFOSEL.WORD = USB_FIFOSEL_MBW_8; @@ -413,11 +409,7 @@ static bool process_pipe_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, USB0.PIPESEL.WORD = num; const unsigned mps = USB0.PIPEMAXP.WORD; if (dir) { /* IN */ -#if TU_BYTE_ORDER == TU_BIG_ENDIAN - USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_16 | USB_FIFOSEL_BIGEND; -#else - USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_16; -#endif + USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0); while (USB0.D0FIFOSEL.BIT.CURPIPE != num) ; int r = fifo_write((void*)&USB0.D0FIFO.WORD, pipe, mps); if (r) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL; @@ -442,11 +434,7 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num) { pipe_state_t *pipe = &_dcd.pipe[num]; if (tu_edpt_dir(pipe->ep)) { /* IN */ -#if TU_BYTE_ORDER == TU_BIG_ENDIAN - select_pipe(num, USB_FIFOSEL_MBW_16 | USB_FIFOSEL_BIGEND); -#else - select_pipe(num, USB_FIFOSEL_MBW_16); -#endif + select_pipe(num, USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0)); const unsigned mps = USB0.PIPEMAXP.WORD; unsigned rem = pipe->remaining; rem -= TU_MIN(rem, mps); @@ -527,7 +515,7 @@ static void process_set_address(uint8_t rhport) #else .bmRequestType = 0, #endif - .bRequest = 5, + .bRequest = TUSB_REQ_SET_ADDRESS, .wValue = addr, .wIndex = 0, .wLength = 0, -- cgit v1.3.1 From 98e4ba6a12f8ce2b060635dc01f68676b047ce25 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 2 Aug 2021 18:55:12 +0700 Subject: correct midi available with already stream read --- src/class/midi/midi_device.c | 7 ++++++- src/common/tusb_fifo.c | 2 -- 2 files changed, 6 insertions(+), 3 deletions(-) (limited to 'src/common') diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c index c39e03976..9d9619132 100644 --- a/src/class/midi/midi_device.c +++ b/src/class/midi/midi_device.c @@ -122,7 +122,12 @@ static void _prep_out_transaction (midid_interface_t* p_midi) uint32_t tud_midi_n_available(uint8_t itf, uint8_t cable_num) { (void) cable_num; - return tu_fifo_count(&_midid_itf[itf].rx_ff); + + midid_interface_t const* midi = &_midid_itf[itf]; + midid_stream_t const* stream = &midi->stream_read; + + // when using with packet API stream total & index are both zero + return tu_fifo_count(&midi->rx_ff) + (stream->total - stream->index); } uint32_t tud_midi_n_stream_read(uint8_t itf, uint8_t cable_num, void* buffer, uint32_t bufsize) diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 73217cf75..11b8fc5f3 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -323,8 +323,6 @@ static uint16_t advance_pointer(tu_fifo_t* f, uint16_t p, uint16_t offset) // We limit the index space of p such that a correct wrap around happens // Check for a wrap around or if we are in unused index space - This has to be checked first!! // We are exploiting the wrap around to the correct index - - // TODO warning: assuming signed overflow does not occur when assuming that (X + c) < X is always false [-Wstrict-overflow] if ((p > (uint16_t)(p + offset)) || ((uint16_t)(p + offset) > f->max_pointer_idx)) { p = (p + offset) + f->non_used_index_space; -- cgit v1.3.1 From 1cef2b6a42d93704847c1a6ab82617e5baf04f4a Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 20 Aug 2021 18:01:10 +0700 Subject: extra common edpt helper for device and host stack tu_edpt_validate() and tu_edpt_bind_driver() --- src/common/tusb_common.h | 14 ++ src/device/usbd.c | 58 +------- src/host/usbh.c | 338 ++++++++++++++++++++++++-------------------- src/host/usbh_classdriver.h | 2 + src/tusb.c | 62 ++++++++ 5 files changed, 265 insertions(+), 209 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index c8a66a879..302e75277 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -73,6 +73,20 @@ #include "tusb_error.h" // TODO remove #include "tusb_timeout.h" // TODO remove +//--------------------------------------------------------------------+ +// Internal Helper used by Host and Device Stack +//--------------------------------------------------------------------+ + +// Check if endpoint descriptor is valid per USB specs +bool tu_edpt_validate(tusb_desc_endpoint_t const * desc_ep, tusb_speed_t speed); + +// Bind all endpoint of a interface descriptor to class driver +void tu_edpt_bind_driver(uint8_t ep2drv[][2], tusb_desc_interface_t const* p_desc, uint16_t desc_len, uint8_t driver_id); + +//--------------------------------------------------------------------+ +// Internal Inline Functions +//--------------------------------------------------------------------+ + //------------- Mem -------------// #define tu_memclr(buffer, size) memset((buffer), 0, (size)) #define tu_varclr(_var) tu_memclr(_var, sizeof(*(_var))) diff --git a/src/device/usbd.c b/src/device/usbd.c index 8b4f4e7e3..23f174dab 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -274,7 +274,6 @@ static osal_mutex_t _usbd_mutex; //--------------------------------------------------------------------+ // Prototypes //--------------------------------------------------------------------+ -static void mark_interface_endpoint(uint8_t ep2drv[][2], uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id); static bool process_control_request(uint8_t rhport, tusb_control_request_t const * p_request); static bool process_set_config(uint8_t rhport, uint8_t cfg_num); static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const * p_request); @@ -901,7 +900,8 @@ static bool process_set_config(uint8_t rhport, uint8_t cfg_num) } } - mark_interface_endpoint(_usbd_dev.ep2drv, p_desc, drv_len, drv_id); // TODO refactor + // bind all endpoints for this driver + tu_edpt_bind_driver(_usbd_dev.ep2drv, desc_itf, drv_len, drv_id); p_desc += drv_len; // next interface @@ -919,25 +919,6 @@ static bool process_set_config(uint8_t rhport, uint8_t cfg_num) return true; } -// Helper marking endpoint of interface belongs to class driver -static void mark_interface_endpoint(uint8_t ep2drv[][2], uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id) -{ - uint16_t len = 0; - - while( len < desc_len ) - { - if ( TUSB_DESC_ENDPOINT == tu_desc_type(p_desc) ) - { - uint8_t const ep_addr = ((tusb_desc_endpoint_t const*) p_desc)->bEndpointAddress; - - ep2drv[tu_edpt_number(ep_addr)][tu_edpt_dir(ep_addr)] = driver_id; - } - - len = (uint16_t)(len + tu_desc_len(p_desc)); - p_desc = tu_desc_next(p_desc); - } -} - // return descriptor's buffer and update desc_len static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const * p_request) { @@ -1177,41 +1158,8 @@ void usbd_defer_func(osal_task_func_t func, void* param, bool in_isr) bool usbd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep) { - uint16_t const max_packet_size = tu_le16toh(desc_ep->wMaxPacketSize.size); - - TU_LOG2(" Open EP %02X with Size = %u\r\n", desc_ep->bEndpointAddress, max_packet_size); TU_ASSERT(tu_edpt_number(desc_ep->bEndpointAddress) < CFG_TUD_ENDPPOINT_MAX); - - switch (desc_ep->bmAttributes.xfer) - { - case TUSB_XFER_ISOCHRONOUS: - { - uint16_t const spec_size = (_usbd_dev.speed == TUSB_SPEED_HIGH ? 1024 : 1023); - TU_ASSERT(max_packet_size <= spec_size); - } - break; - - case TUSB_XFER_BULK: - if (_usbd_dev.speed == TUSB_SPEED_HIGH) - { - // Bulk highspeed must be EXACTLY 512 - TU_ASSERT(max_packet_size == 512); - }else - { - // TODO Bulk fullspeed can only be 8, 16, 32, 64 - TU_ASSERT(max_packet_size <= 64); - } - break; - - case TUSB_XFER_INTERRUPT: - { - uint16_t const spec_size = (_usbd_dev.speed == TUSB_SPEED_HIGH ? 1024 : 64); - TU_ASSERT(max_packet_size <= spec_size); - } - break; - - default: return false; - } + TU_ASSERT(tu_edpt_validate(desc_ep, (tusb_speed_t) _usbd_dev.speed)); return dcd_edpt_open(rhport, desc_ep); } diff --git a/src/host/usbh.c b/src/host/usbh.c index 93621c42a..36c2ea7c8 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -28,16 +28,23 @@ #if TUSB_OPT_HOST_ENABLED -#ifndef CFG_TUH_TASK_QUEUE_SZ -#define CFG_TUH_TASK_QUEUE_SZ 16 -#endif - #include "tusb.h" #include "host/usbh.h" #include "host/usbh_classdriver.h" #include "hub.h" #include "usbh_hcd.h" +//--------------------------------------------------------------------+ +// USBH Configuration +//--------------------------------------------------------------------+ + +#ifndef CFG_TUH_TASK_QUEUE_SZ +#define CFG_TUH_TASK_QUEUE_SZ 16 +#endif + +// Debug level of USBD +#define USBH_DBG_LVL 2 + //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ @@ -135,6 +142,7 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t _usbh_ctrl_buf[CFG_TUH_EN //------------- Helper Function Prototypes -------------// static bool enum_new_device(hcd_event_t* event); static void process_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t hub_port); +static bool usbh_edpt_control_open(uint8_t dev_addr, uint8_t max_packet_size); // from usbh_control.c extern bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes); @@ -314,151 +322,6 @@ uint8_t* usbh_get_enum_buf(void) return _usbh_ctrl_buf; } -//--------------------------------------------------------------------+ -// Endpoint API -//--------------------------------------------------------------------+ - -// TODO has some duplication code with device, refactor later -bool usbh_edpt_claim(uint8_t dev_addr, uint8_t ep_addr) -{ - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - usbh_device_t* dev = &_usbh_devices[dev_addr]; - -#if CFG_TUSB_OS != OPT_OS_NONE - // pre-check to help reducing mutex lock - TU_VERIFY((dev->ep_status[epnum][dir].busy == 0) && (dev->ep_status[epnum][dir].claimed == 0)); - osal_mutex_lock(dev->mutex, OSAL_TIMEOUT_WAIT_FOREVER); -#endif - - // can only claim the endpoint if it is not busy and not claimed yet. - bool const ret = (dev->ep_status[epnum][dir].busy == 0) && (dev->ep_status[epnum][dir].claimed == 0); - if (ret) - { - dev->ep_status[epnum][dir].claimed = 1; - } - -#if CFG_TUSB_OS != OPT_OS_NONE - osal_mutex_unlock(dev->mutex); -#endif - - return ret; -} - -// TODO has some duplication code with device, refactor later -bool usbh_edpt_release(uint8_t dev_addr, uint8_t ep_addr) -{ - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - usbh_device_t* dev = &_usbh_devices[dev_addr]; - -#if CFG_TUSB_OS != OPT_OS_NONE - osal_mutex_lock(dev->mutex, OSAL_TIMEOUT_WAIT_FOREVER); -#endif - - // can only release the endpoint if it is claimed and not busy - bool const ret = (dev->ep_status[epnum][dir].busy == 0) && (dev->ep_status[epnum][dir].claimed == 1); - if (ret) - { - dev->ep_status[epnum][dir].claimed = 0; - } - -#if CFG_TUSB_OS != OPT_OS_NONE - osal_mutex_unlock(dev->mutex); -#endif - - return ret; -} - -// TODO has some duplication code with device, refactor later -bool usbh_edpt_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) -{ - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - usbh_device_t* dev = &_usbh_devices[dev_addr]; - - TU_LOG2(" Queue EP %02X with %u bytes ... ", ep_addr, total_bytes); - - // Attempt to transfer on a busy endpoint, sound like an race condition ! - TU_ASSERT(dev->ep_status[epnum][dir].busy == 0); - - // Set busy first since the actual transfer can be complete before hcd_edpt_xfer() - // could return and USBH task can preempt and clear the busy - dev->ep_status[epnum][dir].busy = true; - - if ( hcd_edpt_xfer(dev->rhport, dev_addr, ep_addr, buffer, total_bytes) ) - { - TU_LOG2("OK\r\n"); - return true; - }else - { - // HCD error, mark endpoint as ready to allow next transfer - dev->ep_status[epnum][dir].busy = false; - dev->ep_status[epnum][dir].claimed = 0; - TU_LOG2("failed\r\n"); - TU_BREAKPOINT(); - return false; - } -} - -bool usbh_edpt_control_open(uint8_t dev_addr, uint8_t max_packet_size) -{ - TU_LOG2("Open EP Control with Size = %u\r\n", max_packet_size); - - tusb_desc_endpoint_t ep0_desc = - { - .bLength = sizeof(tusb_desc_endpoint_t), - .bDescriptorType = TUSB_DESC_ENDPOINT, - .bEndpointAddress = 0, - .bmAttributes = { .xfer = TUSB_XFER_CONTROL }, - .wMaxPacketSize = { .size = max_packet_size }, - .bInterval = 0 - }; - - return hcd_edpt_open(_usbh_devices[dev_addr].rhport, dev_addr, &ep0_desc); -} - -bool usbh_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep) -{ - TU_LOG2(" Open EP %02X with Size = %u\r\n", desc_ep->bEndpointAddress, desc_ep->wMaxPacketSize.size); - - bool ret = hcd_edpt_open(rhport, dev_addr, desc_ep); - - if (ret) - { - usbh_device_t* dev = &_usbh_devices[dev_addr]; - - // new endpoints belongs to latest interface (last valid value) - // TODO FIXME not true with ISO - uint8_t drvid = 0xff; - for(uint8_t i=0; i < sizeof(dev->itf2drv); i++) - { - if ( dev->itf2drv[i] == 0xff ) break; - drvid = dev->itf2drv[i]; - } - TU_ASSERT(drvid < USBH_CLASS_DRIVER_COUNT); - - uint8_t const ep_addr = desc_ep->bEndpointAddress; - dev->ep2drv[tu_edpt_number(ep_addr)][tu_edpt_dir(ep_addr)] = drvid; - } - - return ret; -} - -bool usbh_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) -{ - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - usbh_device_t* dev = &_usbh_devices[dev_addr]; - - return dev->ep_status[epnum][dir].busy; -} - - //--------------------------------------------------------------------+ // HCD Event Handler //--------------------------------------------------------------------+ @@ -841,7 +704,7 @@ static bool enum_set_address_complete(uint8_t dev_addr, tusb_control_request_t c dev0->state = TUSB_DEVICE_STATE_UNPLUG; // open control pipe for new address - TU_ASSERT ( usbh_edpt_control_open(new_addr, new_dev->ep0_packet_size) ); + TU_ASSERT( usbh_edpt_control_open(new_addr, new_dev->ep0_packet_size) ); // Get full device descriptor TU_LOG2("Get Device Descriptor\r\n"); @@ -981,6 +844,34 @@ static bool enum_set_config_complete(uint8_t dev_addr, tusb_control_request_t co return true; } +// Get total length of n interface (depending on IAD) +static uint16_t get_interface_length(tusb_desc_interface_t const* desc_itf, uint8_t itf_count, uint16_t max_len) +{ + uint8_t const* p_desc = (uint8_t const*) desc_itf; + uint16_t len = 0; + + while (itf_count--) + { + // Next on interface desc + len += tu_desc_len(desc_itf); + p_desc = tu_desc_next(p_desc); + + while (len < max_len) + { + // return on IAD regardless of itf count + if ( tu_desc_type(p_desc) == TUSB_DESC_INTERFACE_ASSOCIATION ) return len; + + if ( (tu_desc_type(p_desc) == TUSB_DESC_INTERFACE) && + ((tusb_desc_interface_t const*) p_desc)->bAlternateSetting == 0 ) break; + + len += tu_desc_len(p_desc); + p_desc = tu_desc_next(p_desc); + } + } + + return len; +} + static bool parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configuration_t const* desc_cfg) { usbh_device_t* dev = &_usbh_devices[dev_addr]; @@ -992,20 +883,25 @@ static bool parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configura while( p_desc < desc_end ) { // TODO Do we need to use IAD - // tusb_desc_interface_assoc_t const * desc_itf_assoc = NULL; + tusb_desc_interface_assoc_t const * desc_iad = NULL; // Class will always starts with Interface Association (if any) and then Interface descriptor if ( TUSB_DESC_INTERFACE_ASSOCIATION == tu_desc_type(p_desc) ) { - // desc_itf_assoc = (tusb_desc_interface_assoc_t const *) p_desc; + desc_iad = (tusb_desc_interface_assoc_t const *) p_desc; p_desc = tu_desc_next(p_desc); } + TU_LOG_INT(2, p_desc - (uint8_t*) desc_cfg); + TU_LOG_INT(2, tu_desc_type(p_desc)); TU_ASSERT( TUSB_DESC_INTERFACE == tu_desc_type(p_desc) ); tusb_desc_interface_t const* desc_itf = (tusb_desc_interface_t const*) p_desc; uint16_t const remaining_len = desc_end-p_desc; + uint16_t const drv_len = get_interface_length(desc_itf, desc_iad ? desc_iad->bInterfaceCount : 1, remaining_len); + TU_ASSERT(drv_len); + // Check if class is supported TODO drop class_code uint8_t drv_id; for (drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) @@ -1015,8 +911,11 @@ static bool parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configura if( drv_id >= USBH_CLASS_DRIVER_COUNT ) { - // skip unsupported class - p_desc = tu_desc_next(p_desc); + TU_LOG(USBH_DBG_LVL, "Interface %u: class = %u subclass = %u protocol = %u is not supported\r\n", + desc_itf->bInterfaceNumber, desc_itf->bInterfaceClass, desc_itf->bInterfaceSubClass, desc_itf->bInterfaceProtocol); + + // skip unsupported class until next Interface or IAD descriptor + p_desc += drv_len; } else { @@ -1038,6 +937,10 @@ static bool parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configura uint16_t const itf_len = driver->open(dev->rhport, dev_addr, desc_itf, remaining_len); TU_ASSERT( sizeof(tusb_desc_interface_t) <= itf_len && itf_len <= remaining_len); + + // bind all endpoints for this driver + tu_edpt_bind_driver(dev->ep2drv, desc_itf, drv_len, drv_id); + p_desc += itf_len; } } @@ -1046,4 +949,131 @@ static bool parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configura return true; } +//--------------------------------------------------------------------+ +// Endpoint API +//--------------------------------------------------------------------+ + +// TODO has some duplication code with device, refactor later +bool usbh_edpt_claim(uint8_t dev_addr, uint8_t ep_addr) +{ + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); + + usbh_device_t* dev = &_usbh_devices[dev_addr]; + +#if CFG_TUSB_OS != OPT_OS_NONE + // pre-check to help reducing mutex lock + TU_VERIFY((dev->ep_status[epnum][dir].busy == 0) && (dev->ep_status[epnum][dir].claimed == 0)); + osal_mutex_lock(dev->mutex, OSAL_TIMEOUT_WAIT_FOREVER); +#endif + + // can only claim the endpoint if it is not busy and not claimed yet. + bool const ret = (dev->ep_status[epnum][dir].busy == 0) && (dev->ep_status[epnum][dir].claimed == 0); + if (ret) + { + dev->ep_status[epnum][dir].claimed = 1; + } + +#if CFG_TUSB_OS != OPT_OS_NONE + osal_mutex_unlock(dev->mutex); +#endif + + return ret; +} + +// TODO has some duplication code with device, refactor later +bool usbh_edpt_release(uint8_t dev_addr, uint8_t ep_addr) +{ + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); + + usbh_device_t* dev = &_usbh_devices[dev_addr]; + +#if CFG_TUSB_OS != OPT_OS_NONE + osal_mutex_lock(dev->mutex, OSAL_TIMEOUT_WAIT_FOREVER); +#endif + + // can only release the endpoint if it is claimed and not busy + bool const ret = (dev->ep_status[epnum][dir].busy == 0) && (dev->ep_status[epnum][dir].claimed == 1); + if (ret) + { + dev->ep_status[epnum][dir].claimed = 0; + } + +#if CFG_TUSB_OS != OPT_OS_NONE + osal_mutex_unlock(dev->mutex); +#endif + + return ret; +} + +// TODO has some duplication code with device, refactor later +bool usbh_edpt_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) +{ + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); + + usbh_device_t* dev = &_usbh_devices[dev_addr]; + + TU_LOG2(" Queue EP %02X with %u bytes ... ", ep_addr, total_bytes); + + // Attempt to transfer on a busy endpoint, sound like an race condition ! + TU_ASSERT(dev->ep_status[epnum][dir].busy == 0); + + // Set busy first since the actual transfer can be complete before hcd_edpt_xfer() + // could return and USBH task can preempt and clear the busy + dev->ep_status[epnum][dir].busy = true; + + if ( hcd_edpt_xfer(dev->rhport, dev_addr, ep_addr, buffer, total_bytes) ) + { + TU_LOG2("OK\r\n"); + return true; + }else + { + // HCD error, mark endpoint as ready to allow next transfer + dev->ep_status[epnum][dir].busy = false; + dev->ep_status[epnum][dir].claimed = 0; + TU_LOG2("failed\r\n"); + TU_BREAKPOINT(); + return false; + } +} + +static bool usbh_edpt_control_open(uint8_t dev_addr, uint8_t max_packet_size) +{ + TU_LOG2("Open EP Control with Size = %u\r\n", max_packet_size); + + tusb_desc_endpoint_t ep0_desc = + { + .bLength = sizeof(tusb_desc_endpoint_t), + .bDescriptorType = TUSB_DESC_ENDPOINT, + .bEndpointAddress = 0, + .bmAttributes = { .xfer = TUSB_XFER_CONTROL }, + .wMaxPacketSize = { .size = max_packet_size }, + .bInterval = 0 + }; + + return hcd_edpt_open(_usbh_devices[dev_addr].rhport, dev_addr, &ep0_desc); +} + +bool usbh_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep) +{ + usbh_device_t* dev = &_usbh_devices[dev_addr]; + TU_ASSERT(tu_edpt_validate(desc_ep, (tusb_speed_t) dev->speed)); + + return hcd_edpt_open(rhport, dev_addr, desc_ep); +} + +bool usbh_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) +{ + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); + + usbh_device_t* dev = &_usbh_devices[dev_addr]; + + return dev->ep_status[epnum][dir].busy; +} + + + #endif diff --git a/src/host/usbh_classdriver.h b/src/host/usbh_classdriver.h index 0736fefa1..b05a33580 100644 --- a/src/host/usbh_classdriver.h +++ b/src/host/usbh_classdriver.h @@ -73,6 +73,8 @@ bool usbh_edpt_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_ // If caller does not make any transfer, it must release endpoint for others. bool usbh_edpt_claim(uint8_t dev_addr, uint8_t ep_addr); +bool usbh_edpt_release(uint8_t dev_addr, uint8_t ep_addr); + // Check if endpoint transferring is complete bool usbh_edpt_busy(uint8_t dev_addr, uint8_t ep_addr); diff --git a/src/tusb.c b/src/tusb.c index 0350fa1de..260a6506f 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -63,6 +63,68 @@ bool tusb_inited(void) return ret; } +//--------------------------------------------------------------------+ +// Internal Helper for both Host and Device stack +//--------------------------------------------------------------------+ + +bool tu_edpt_validate(tusb_desc_endpoint_t const * desc_ep, tusb_speed_t speed) +{ + uint16_t const max_packet_size = tu_le16toh(desc_ep->wMaxPacketSize.size); + TU_LOG2(" Open EP %02X with Size = %u\r\n", desc_ep->bEndpointAddress, max_packet_size); + + switch (desc_ep->bmAttributes.xfer) + { + case TUSB_XFER_ISOCHRONOUS: + { + uint16_t const spec_size = (speed == TUSB_SPEED_HIGH ? 1024 : 1023); + TU_ASSERT(max_packet_size <= spec_size); + } + break; + + case TUSB_XFER_BULK: + if (speed == TUSB_SPEED_HIGH) + { + // Bulk highspeed must be EXACTLY 512 + TU_ASSERT(max_packet_size == 512); + }else + { + // TODO Bulk fullspeed can only be 8, 16, 32, 64 + TU_ASSERT(max_packet_size <= 64); + } + break; + + case TUSB_XFER_INTERRUPT: + { + uint16_t const spec_size = (speed == TUSB_SPEED_HIGH ? 1024 : 64); + TU_ASSERT(max_packet_size <= spec_size); + } + break; + + default: return false; + } + + return true; +} + +void tu_edpt_bind_driver(uint8_t ep2drv[][2], tusb_desc_interface_t const* desc_itf, uint16_t desc_len, uint8_t driver_id) +{ + uint8_t const* p_desc = (uint8_t const*) desc_itf; + uint16_t len = 0; + + while( len < desc_len ) + { + if ( TUSB_DESC_ENDPOINT == tu_desc_type(p_desc) ) + { + uint8_t const ep_addr = ((tusb_desc_endpoint_t const*) p_desc)->bEndpointAddress; + + ep2drv[tu_edpt_number(ep_addr)][tu_edpt_dir(ep_addr)] = driver_id; + } + + len = (uint16_t)(len + tu_desc_len(p_desc)); + p_desc = tu_desc_next(p_desc); + } +} + /*------------------------------------------------------------------*/ /* Debug *------------------------------------------------------------------*/ -- cgit v1.3.1 From 97703587d9f306f01a9435c1515a585f1b8d0975 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 20 Aug 2021 19:08:38 +0700 Subject: improve host configuration parsing - remove driver class code binding - fully support IAD - auto calculate total length for interface descriptor for driver --- src/common/tusb_common.h | 3 + src/host/usbh.c | 131 +++++++++++++++++++------------------------- src/host/usbh_classdriver.h | 2 - src/host/usbh_hcd.h | 4 +- src/tusb.c | 30 ++++++++++ 5 files changed, 91 insertions(+), 79 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 302e75277..c2356ffee 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -83,6 +83,9 @@ bool tu_edpt_validate(tusb_desc_endpoint_t const * desc_ep, tusb_speed_t speed); // Bind all endpoint of a interface descriptor to class driver void tu_edpt_bind_driver(uint8_t ep2drv[][2], tusb_desc_interface_t const* p_desc, uint16_t desc_len, uint8_t driver_id); +// Calculate total length of n interfaces (depending on IAD) +uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, uint8_t itf_count, uint16_t max_len); + //--------------------------------------------------------------------+ // Internal Inline Functions //--------------------------------------------------------------------+ diff --git a/src/host/usbh.c b/src/host/usbh.c index 979fc5065..662ce2673 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -48,6 +48,10 @@ //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ + +// Invalid driver ID in itf2drv[] ep2drv[][] mapping +enum { DRVID_INVALID = 0xFFu }; + #if CFG_TUSB_DEBUG >= 2 #define DRIVER_NAME(_name) .name = _name, #else @@ -59,7 +63,6 @@ static usbh_class_driver_t const usbh_class_drivers[] = #if CFG_TUH_CDC { DRIVER_NAME("CDC") - .class_code = TUSB_CLASS_CDC, .init = cdch_init, .open = cdch_open, .set_config = cdch_set_config, @@ -71,7 +74,6 @@ static usbh_class_driver_t const usbh_class_drivers[] = #if CFG_TUH_MSC { DRIVER_NAME("MSC") - .class_code = TUSB_CLASS_MSC, .init = msch_init, .open = msch_open, .set_config = msch_set_config, @@ -83,7 +85,6 @@ static usbh_class_driver_t const usbh_class_drivers[] = #if CFG_TUH_HID { DRIVER_NAME("HID") - .class_code = TUSB_CLASS_HID, .init = hidh_init, .open = hidh_open, .set_config = hidh_set_config, @@ -95,7 +96,6 @@ static usbh_class_driver_t const usbh_class_drivers[] = #if CFG_TUH_HUB { DRIVER_NAME("HUB") - .class_code = TUSB_CLASS_HUB, .init = hub_init, .open = hub_open, .set_config = hub_set_config, @@ -107,7 +107,6 @@ static usbh_class_driver_t const usbh_class_drivers[] = #if CFG_TUH_VENDOR { DRIVER_NAME("VENDOR") - .class_code = TUSB_CLASS_VENDOR_SPECIFIC, .init = cush_init, .open = cush_open_subtask, .xfer_cb = cush_isr, @@ -203,8 +202,8 @@ bool tuh_init(uint8_t rhport) TU_ASSERT(dev->mutex); #endif - memset(dev->itf2drv, 0xff, sizeof(dev->itf2drv)); // invalid mapping - memset(dev->ep2drv , 0xff, sizeof(dev->ep2drv )); // invalid mapping + memset(dev->itf2drv, DRVID_INVALID, sizeof(dev->itf2drv)); // invalid mapping + memset(dev->ep2drv , DRVID_INVALID, sizeof(dev->ep2drv )); // invalid mapping } // Class drivers init @@ -336,7 +335,6 @@ void hcd_event_handler(hcd_event_t const* event, bool in_isr) } } -// interrupt caused by a TD (with IOC=1) in pipe of class class_code void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, uint32_t xferred_bytes, xfer_result_t result, bool in_isr) { hcd_event_t event = @@ -409,8 +407,8 @@ void process_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t hub_port usbh_class_drivers[drv_id].close(dev_addr); } - memset(dev->itf2drv, 0xff, sizeof(dev->itf2drv)); // invalid mapping - memset(dev->ep2drv , 0xff, sizeof(dev->ep2drv )); // invalid mapping + memset(dev->itf2drv, DRVID_INVALID, sizeof(dev->itf2drv)); // invalid mapping + memset(dev->ep2drv , DRVID_INVALID, sizeof(dev->ep2drv )); // invalid mapping hcd_device_close(rhport, dev_addr); @@ -439,7 +437,7 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num) { // continue with next valid interface uint8_t const drv_id = dev->itf2drv[itf_num]; - if (drv_id != 0xff) + if (drv_id != DRVID_INVALID) { usbh_class_driver_t const * driver = &usbh_class_drivers[drv_id]; TU_LOG2("%s set config: itf = %u\r\n", driver->name, itf_num); @@ -835,43 +833,15 @@ static bool enum_set_config_complete(uint8_t dev_addr, tusb_control_request_t co dev->configured = 1; dev->state = TUSB_DEVICE_STATE_CONFIGURED; - // Start the Set Configuration process for interfaces (itf = 0xff) + // Start the Set Configuration process for interfaces (itf = DRVID_INVALID) // Since driver can perform control transfer within its set_config, this is done asynchronously. // The process continue with next interface when class driver complete its sequence with usbh_driver_set_config_complete() - // TODO use separated API instead of usig 0xff - usbh_driver_set_config_complete(dev_addr, 0xff); + // TODO use separated API instead of using DRVID_INVALID + usbh_driver_set_config_complete(dev_addr, DRVID_INVALID); return true; } -// Get total length of n interface (depending on IAD) -static uint16_t get_interface_length(tusb_desc_interface_t const* desc_itf, uint8_t itf_count, uint16_t max_len) -{ - uint8_t const* p_desc = (uint8_t const*) desc_itf; - uint16_t len = 0; - - while (itf_count--) - { - // Next on interface desc - len += tu_desc_len(desc_itf); - p_desc = tu_desc_next(p_desc); - - while (len < max_len) - { - // return on IAD regardless of itf count - if ( tu_desc_type(p_desc) == TUSB_DESC_INTERFACE_ASSOCIATION ) return len; - - if ( (tu_desc_type(p_desc) == TUSB_DESC_INTERFACE) && - ((tusb_desc_interface_t const*) p_desc)->bAlternateSetting == 0 ) break; - - len += tu_desc_len(p_desc); - p_desc = tu_desc_next(p_desc); - } - } - - return len; -} - static bool parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configuration_t const* desc_cfg) { usbh_device_t* dev = &_usbh_devices[dev_addr]; @@ -895,53 +865,64 @@ static bool parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configura TU_ASSERT( TUSB_DESC_INTERFACE == tu_desc_type(p_desc) ); tusb_desc_interface_t const* desc_itf = (tusb_desc_interface_t const*) p_desc; - uint16_t const remaining_len = desc_end-p_desc; - uint16_t const drv_len = get_interface_length(desc_itf, desc_iad ? desc_iad->bInterfaceCount : 1, remaining_len); - TU_ASSERT(drv_len); + // Interface number must not be used already + TU_ASSERT( dev->itf2drv[desc_itf->bInterfaceNumber] == DRVID_INVALID ); - // Check if class is supported TODO drop class_code - uint8_t drv_id; - for (drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) - { - if ( usbh_class_drivers[drv_id].class_code == desc_itf->bInterfaceClass ) break; - } + uint16_t const drv_len = tu_desc_get_interface_total_len(desc_itf, desc_iad ? desc_iad->bInterfaceCount : 1, desc_end-p_desc); + TU_ASSERT(drv_len); - if( drv_id >= USBH_CLASS_DRIVER_COUNT ) + if (desc_itf->bInterfaceClass == TUSB_CLASS_HUB && dev->hub_addr != 0) { - TU_LOG(USBH_DBG_LVL, "Interface %u: class = %u subclass = %u protocol = %u is not supported\r\n", - desc_itf->bInterfaceNumber, desc_itf->bInterfaceClass, desc_itf->bInterfaceSubClass, desc_itf->bInterfaceProtocol); - - // skip unsupported class until next Interface or IAD descriptor - p_desc += drv_len; + // TODO Attach hub to Hub is not currently supported + // skip this interface + TU_LOG(USBH_DBG_LVL, "Only 1 level of HUB is supported\r\n"); } else { - usbh_class_driver_t const * driver = &usbh_class_drivers[drv_id]; + // Find driver for this interface + uint8_t drv_id; + for (drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) + { + usbh_class_driver_t const * driver = &usbh_class_drivers[drv_id]; - // Interface number must not be used already TODO alternate interface - TU_ASSERT( dev->itf2drv[desc_itf->bInterfaceNumber] == 0xff ); - dev->itf2drv[desc_itf->bInterfaceNumber] = drv_id; + if ( driver->open(dev->rhport, dev_addr, desc_itf, drv_len) ) + { + // open successfully + TU_LOG2("%s opened\r\n", driver->name); - if (desc_itf->bInterfaceClass == TUSB_CLASS_HUB && dev->hub_addr != 0) - { - // TODO Attach hub to Hub is not currently supported - // skip this interface - p_desc = tu_desc_next(p_desc); - } - else - { - TU_LOG2("%s open\r\n", driver->name); + // bind interface to found driver + dev->itf2drv[desc_itf->bInterfaceNumber] = drv_id; + + // If using IAD, bind all interfaces to the same driver + if (desc_iad) + { + // IAD's first interface number and class should match with opened interface + TU_ASSERT(desc_iad->bFirstInterface == desc_itf->bInterfaceNumber && + desc_iad->bFunctionClass == desc_itf->bInterfaceClass); + + for(uint8_t i=1; ibInterfaceCount; i++) + { + dev->itf2drv[desc_itf->bInterfaceNumber+i] = drv_id; + } + } - uint16_t const itf_len = driver->open(dev->rhport, dev_addr, desc_itf, remaining_len); - TU_ASSERT( sizeof(tusb_desc_interface_t) <= itf_len && itf_len <= remaining_len); + // bind all endpoints to found driver + tu_edpt_bind_driver(dev->ep2drv, desc_itf, drv_len, drv_id); - // bind all endpoints for this driver - tu_edpt_bind_driver(dev->ep2drv, desc_itf, drv_len, drv_id); + break; // exit driver find loop + } + } - p_desc += itf_len; + if( drv_id >= USBH_CLASS_DRIVER_COUNT ) + { + TU_LOG(USBH_DBG_LVL, "Interface %u: class = %u subclass = %u protocol = %u is not supported\r\n", + desc_itf->bInterfaceNumber, desc_itf->bInterfaceClass, desc_itf->bInterfaceSubClass, desc_itf->bInterfaceProtocol); } } + + // next Interface or IAD descriptor + p_desc += drv_len; } return true; diff --git a/src/host/usbh_classdriver.h b/src/host/usbh_classdriver.h index b05a33580..fccb30253 100644 --- a/src/host/usbh_classdriver.h +++ b/src/host/usbh_classdriver.h @@ -43,8 +43,6 @@ typedef struct { char const* name; #endif - uint8_t class_code; - void (* const init )(void); uint16_t (* const open )(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const * itf_desc, uint16_t max_len); bool (* const set_config )(uint8_t dev_addr, uint8_t itf_num); diff --git a/src/host/usbh_hcd.h b/src/host/usbh_hcd.h index b3856d6b7..450b3e447 100644 --- a/src/host/usbh_hcd.h +++ b/src/host/usbh_hcd.h @@ -73,9 +73,9 @@ typedef struct { uint8_t suspended : 1; }; - volatile uint8_t state; // device state, value from enum tusbh_device_state_t + volatile uint8_t state; // device state, value from enum tusbh_device_state_t - uint8_t itf2drv[16]; // map interface number to driver (0xff is invalid) + uint8_t itf2drv[16]; // map interface number to driver (0xff is invalid) uint8_t ep2drv[CFG_TUH_EP_MAX][2]; // map endpoint to driver ( 0xff is invalid ) struct TU_ATTR_PACKED diff --git a/src/tusb.c b/src/tusb.c index 260a6506f..1fc775399 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -125,6 +125,36 @@ void tu_edpt_bind_driver(uint8_t ep2drv[][2], tusb_desc_interface_t const* desc_ } } +uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, uint8_t itf_count, uint16_t max_len) +{ + uint8_t const* p_desc = (uint8_t const*) desc_itf; + uint16_t len = 0; + + while (itf_count--) + { + // Next on interface desc + len += tu_desc_len(desc_itf); + p_desc = tu_desc_next(p_desc); + + while (len < max_len) + { + // return on IAD regardless of itf count + if ( tu_desc_type(p_desc) == TUSB_DESC_INTERFACE_ASSOCIATION ) return len; + + if ( (tu_desc_type(p_desc) == TUSB_DESC_INTERFACE) && + ((tusb_desc_interface_t const*) p_desc)->bAlternateSetting == 0 ) + { + break; + } + + len += tu_desc_len(p_desc); + p_desc = tu_desc_next(p_desc); + } + } + + return len; +} + /*------------------------------------------------------------------*/ /* Debug *------------------------------------------------------------------*/ -- cgit v1.3.1 From 9394de6ae74cf01ba8c8f1dab57dbbdfad6d6407 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 27 Aug 2021 12:38:41 +0700 Subject: update msc driver to pass MSC BOT error recovery compliant test --- examples/device/cdc_msc/src/msc_disk.c | 11 ++ examples/device/msc_dual_lun/src/msc_disk_dual.c | 11 ++ src/class/msc/msc_device.c | 137 +++++++++++++++++------ src/class/msc/msc_device.h | 2 +- src/common/tusb_common.h | 7 +- src/device/usbd.c | 7 +- 6 files changed, 136 insertions(+), 39 deletions(-) (limited to 'src/common') diff --git a/examples/device/cdc_msc/src/msc_disk.c b/examples/device/cdc_msc/src/msc_disk.c index 503baace9..32f2563cb 100644 --- a/examples/device/cdc_msc/src/msc_disk.c +++ b/examples/device/cdc_msc/src/msc_disk.c @@ -194,6 +194,17 @@ int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buff return bufsize; } +bool tud_msc_is_writable_cb (uint8_t lun) +{ + (void) lun; + +#ifdef CFG_EXAMPLE_MSC_READONLY + return false; +#else + return true; +#endif +} + // Callback invoked when received WRITE10 command. // Process data in buffer to disk's storage and return number of written bytes int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize) diff --git a/examples/device/msc_dual_lun/src/msc_disk_dual.c b/examples/device/msc_dual_lun/src/msc_disk_dual.c index 2ab050da8..cc7dfae0e 100644 --- a/examples/device/msc_dual_lun/src/msc_disk_dual.c +++ b/examples/device/msc_dual_lun/src/msc_disk_dual.c @@ -274,6 +274,17 @@ int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buff return bufsize; } +bool tud_msc_is_writable_cb (uint8_t lun) +{ + (void) lun; + +#ifdef CFG_EXAMPLE_MSC_READONLY + return false; +#else + return true; +#endif +} + // Callback invoked when received WRITE10 command. // Process data in buffer to disk's storage and return number of written bytes int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize) diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index 014e8b69e..9e3689d84 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -46,7 +46,8 @@ enum MSC_STAGE_CMD = 0, MSC_STAGE_DATA, MSC_STAGE_STATUS, - MSC_STAGE_STATUS_SENT + MSC_STAGE_STATUS_SENT, + MSC_STAGE_NEED_RESET, }; typedef struct @@ -174,35 +175,91 @@ uint16_t mscd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint1 TU_ASSERT( usbd_open_edpt_pair(rhport, tu_desc_next(itf_desc), 2, TUSB_XFER_BULK, &p_msc->ep_out, &p_msc->ep_in), 0 ); // Prepare for Command Block Wrapper - if ( !usbd_edpt_xfer(rhport, p_msc->ep_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cbw_t)) ) - { - TU_LOG_FAILED(); - TU_BREAKPOINT(); - } + TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cbw_t)), drv_len); return drv_len; } +static void process_bot_reset(mscd_interface_t* p_msc) +{ + p_msc->stage = MSC_STAGE_CMD; + p_msc->total_len = 0; + p_msc->xferred_len = 0; + + p_msc->sense_key = 0; + p_msc->add_sense_code = 0; + p_msc->add_sense_qualifier = 0; +} + + // Invoked when a control transfer occurred on an interface of this class // Driver response accordingly to the request and the transfer stage (setup/data/ack) // return false to stall control endpoint (e.g unsupported request) -bool mscd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * p_request) +bool mscd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request) { // nothing to do with DATA & ACK stage if (stage != CONTROL_STAGE_SETUP) return true; - // Handle class request only - TU_VERIFY(p_request->bmRequestType_bit.type == TUSB_REQ_TYPE_CLASS); + mscd_interface_t* p_msc = &_mscd_itf; + + // Clear Endpoint Feature (stall) for recovery + if ( TUSB_REQ_TYPE_STANDARD == request->bmRequestType_bit.type && + TUSB_REQ_RCPT_ENDPOINT == request->bmRequestType_bit.recipient && + TUSB_REQ_CLEAR_FEATURE == request->bRequest && + TUSB_REQ_FEATURE_EDPT_HALT == request->wValue ) + { + uint8_t const ep_addr = tu_u16_low(request->wIndex); + + if ( p_msc->stage == MSC_STAGE_NEED_RESET ) + { + // reset recovery is required to recover from this stage + // Clear Stall request cannot resolve this -> continue to stall endpoint + usbd_edpt_stall(rhport, ep_addr); + } + else + { + if ( ep_addr == p_msc->ep_in ) + { + if ( p_msc->stage == MSC_STAGE_STATUS ) + { + // resume sending SCSI status if we are in this stage previously before stalled + p_msc->stage = MSC_STAGE_STATUS_SENT; + TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_in , (uint8_t*) &p_msc->csw, sizeof(msc_csw_t)) ); + } + } + else if ( ep_addr == p_msc->ep_out ) + { + if ( p_msc->stage == MSC_STAGE_CMD ) + { + // part of reset recovery (probably due to invalid CBW) -> prepare for new command + TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cbw_t)) ); + } + } + } + + return true; + } + + // From this point only handle class request only + TU_VERIFY(request->bmRequestType_bit.type == TUSB_REQ_TYPE_CLASS); - switch ( p_request->bRequest ) + switch ( request->bRequest ) { case MSC_REQ_RESET: - // TODO: Actually reset interface. - tud_control_status(rhport, p_request); + TU_LOG(MSC_DEBUG, " MSC BOT Reset\r\n"); + TU_VERIFY(request->wValue == 0 && request->wLength == 0); + + // driver state reset + process_bot_reset(p_msc); + + tud_control_status(rhport, request); break; case MSC_REQ_GET_MAX_LUN: { + TU_LOG(MSC_DEBUG, " MSC Get Max Lun\r\n"); + TU_VERIFY(request->wValue == 0 && request->wLength == 1); + uint8_t maxlun = 1; if (tud_msc_get_maxlun_cb) maxlun = tud_msc_get_maxlun_cb(); TU_VERIFY(maxlun); @@ -210,7 +267,7 @@ bool mscd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t // MAX LUN is minus 1 by specs maxlun--; - tud_control_xfer(rhport, p_request, &maxlun, 1); + tud_control_xfer(rhport, request, &maxlun, 1); } break; @@ -222,6 +279,8 @@ bool mscd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) { + (void) event; + mscd_interface_t* p_msc = &_mscd_itf; msc_cbw_t const * p_cbw = &p_msc->cbw; msc_csw_t * p_csw = &p_msc->csw; @@ -233,11 +292,20 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t // Complete IN while waiting for CMD is usually Status of previous SCSI op, ignore it if(ep_addr != p_msc->ep_out) return true; - TU_ASSERT( event == XFER_RESULT_SUCCESS && - xferred_bytes == sizeof(msc_cbw_t) && p_cbw->signature == MSC_CBW_SIGNATURE ); + if ( !(xferred_bytes == sizeof(msc_cbw_t) && p_cbw->signature == MSC_CBW_SIGNATURE) ) + { + // BOT 6.6.1 If CBW is not valid stall both endpoints until reset recovery + p_msc->stage = MSC_STAGE_NEED_RESET; + + // invalid CBW stall both endpoints + usbd_edpt_stall(rhport, p_msc->ep_in); + usbd_edpt_stall(rhport, p_msc->ep_out); + + return false; + } TU_LOG(MSC_DEBUG, " SCSI Command: %s\r\n", tu_lookup_find(&_msc_scsi_cmd_table, p_cbw->command[0])); - // TU_LOG_MEM(MSC_DEBUG, p_cbw, xferred_bytes, 2); + //TU_LOG_MEM(MSC_DEBUG, p_cbw, xferred_bytes, 2); p_csw->signature = MSC_CSW_SIGNATURE; p_csw->tag = p_cbw->tag; @@ -440,15 +508,8 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t if ( p_msc->stage == MSC_STAGE_STATUS ) { - // Either endpoints is stalled, need to wait until it is cleared by host - if ( usbd_edpt_stalled(rhport, p_msc->ep_in) || usbd_edpt_stalled(rhport, p_msc->ep_out) ) - { - // simulate an transfer complete with adjusted parameters --> this driver callback will fired again - // and response with status phase after halted endpoints are cleared. - // note: use ep_out to prevent confusing with STATUS complete - dcd_event_xfer_complete(rhport, p_msc->ep_out, 0, XFER_RESULT_SUCCESS, false); - } - else + // skip status if epin is currently stalled, will do it when received Clear Stall request + if ( !usbd_edpt_stalled(rhport, p_msc->ep_in) ) { // Move to Status Sent stage p_msc->stage = MSC_STAGE_STATUS_SENT; @@ -600,9 +661,11 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ }; bool writable = true; - if (tud_msc_is_writable_cb) { - writable = tud_msc_is_writable_cb(lun); + if ( tud_msc_is_writable_cb ) + { + writable = tud_msc_is_writable_cb(lun); } + mode_resp.write_protected = !writable; resplen = sizeof(mode_resp); @@ -660,7 +723,8 @@ static void proc_read10_cmd(uint8_t rhport, mscd_interface_t* p_msc) if ( nbytes < 0 ) { - // negative means error -> pipe is stalled & status in CSW set to failed + // negative means error -> endpoint is stalled & status in CSW set to failed + p_msc->stage = MSC_STAGE_STATUS; p_csw->data_residue = p_cbw->total_bytes - p_msc->xferred_len; p_csw->status = MSC_CSW_STATUS_FAILED; @@ -682,15 +746,22 @@ static void proc_write10_cmd(uint8_t rhport, mscd_interface_t* p_msc) { msc_cbw_t const * p_cbw = &p_msc->cbw; bool writable = true; - if (tud_msc_is_writable_cb) { + + if ( tud_msc_is_writable_cb ) + { writable = tud_msc_is_writable_cb(p_cbw->lun); } - if (!writable) { - msc_csw_t* p_csw = &p_msc->csw; + + if ( !writable ) + { + // Not writable, complete this SCSI op with error + msc_csw_t *p_csw = &p_msc->csw; + + p_msc->stage = MSC_STAGE_STATUS; + p_csw->status = MSC_CSW_STATUS_FAILED; p_csw->data_residue = p_cbw->total_bytes; - p_csw->status = MSC_CSW_STATUS_FAILED; - tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_DATA_PROTECT, 0x27, 0x00); // Sense = Write protected + tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_DATA_PROTECT, 0x27, 0x00); // Sense = Write protected usbd_edpt_stall(rhport, p_msc->ep_out); return; } diff --git a/src/class/msc/msc_device.h b/src/class/msc/msc_device.h index 8f90ef4ad..d32694340 100644 --- a/src/class/msc/msc_device.h +++ b/src/class/msc/msc_device.h @@ -140,7 +140,7 @@ TU_ATTR_WEAK void tud_msc_write10_complete_cb(uint8_t lun); // Invoked when command in tud_msc_scsi_cb is complete TU_ATTR_WEAK void tud_msc_scsi_complete_cb(uint8_t lun, uint8_t const scsi_cmd[16]); -// Hook to make a mass storage device read-only. TODO remove +// Invoked to check if device is writable as part of SCSI WRITE10 TU_ATTR_WEAK bool tud_msc_is_writable_cb(uint8_t lun); //--------------------------------------------------------------------+ diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index c2356ffee..1452e0105 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -369,12 +369,17 @@ typedef struct static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key) { + static char not_found[10]; + for(uint16_t i=0; icount; i++) { if (p_table->items[i].key == key) return p_table->items[i].data; } - return NULL; + // not found return the key value in hex + sprintf(not_found, "0x%08lX", key); + + return not_found; } #endif // CFG_TUSB_DEBUG diff --git a/src/device/usbd.c b/src/device/usbd.c index b2babb7a0..7cd8fad42 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -695,7 +695,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const if ( _usbd_dev.cfg_num ) { // already configured: need to clear all endpoints and driver first - TU_LOG(USBD_DBG, "Clear current config (%u) before switching\r\n", _usbd_dev.cfg_num); + TU_LOG(USBD_DBG, " Clear current Configuration (%u) before switching\r\n", _usbd_dev.cfg_num); // close all non-control endpoints, cancel all pending transfers if any dcd_edpt_close_all(rhport); @@ -1333,7 +1333,7 @@ bool usbd_edpt_busy(uint8_t rhport, uint8_t ep_addr) void usbd_edpt_stall(uint8_t rhport, uint8_t ep_addr) { - TU_LOG(USBD_DBG, " Stall EP %02X", ep_addr); + TU_LOG(USBD_DBG, " Stall EP %02X\r\n", ep_addr); uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const dir = tu_edpt_dir(ep_addr); @@ -1345,12 +1345,11 @@ void usbd_edpt_stall(uint8_t rhport, uint8_t ep_addr) void usbd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { - TU_LOG(USBD_DBG, " Clear Stall EP %02X", ep_addr); + TU_LOG(USBD_DBG, " Clear Stall EP %02X\r\n", ep_addr); uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const dir = tu_edpt_dir(ep_addr); - dcd_edpt_clear_stall(rhport, ep_addr); _usbd_dev.ep_status[epnum][dir].stalled = false; _usbd_dev.ep_status[epnum][dir].busy = false; -- cgit v1.3.1 From fc889ece74626f49a08898039102f0a9bf2b85a1 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 1 Sep 2021 16:52:27 +0700 Subject: rp2040 correct ep set/clear stall - stall will remove pending (not complete) transfer. Correct reset data toggle when clear stall. - remove buf ctrl debug code --- src/common/tusb_common.h | 3 ++ src/device/dcd.h | 2 +- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 29 +++++++--------- src/portable/raspberrypi/rp2040/hcd_rp2040.c | 3 +- src/portable/raspberrypi/rp2040/rp2040_usb.c | 11 +++--- src/portable/raspberrypi/rp2040/rp2040_usb.h | 51 ---------------------------- 6 files changed, 22 insertions(+), 77 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 1452e0105..687f980be 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -110,6 +110,9 @@ TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte2(uint32_t u32) { return TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte1(uint32_t u32) { return TU_U32_BYTE1(u32); } TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte0(uint32_t u32) { return TU_U32_BYTE0(u32); } +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u32_high16(uint32_t u32) { return (uint16_t) (u32 >> 16); } +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u32_low16 (uint32_t u32) { return (uint16_t) (u32 & 0x0000ffffu); } + TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_high(uint16_t u16) { return TU_U16_HIGH(u16); } TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_low (uint16_t u16) { return TU_U16_LOW(u16); } diff --git a/src/device/dcd.h b/src/device/dcd.h index 8d042bbde..d43a0dd9a 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -153,7 +153,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer // This API is optional, may be useful for register-based for transferring data. bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes) TU_ATTR_WEAK; -// Stall endpoint +// Stall endpoint, any queuing transfer should be removed from endpoint void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr); // clear stall, data toggle is also reset to DATA0 diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index 0cd3e97de..42ffaf883 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -145,8 +145,7 @@ static void hw_endpoint_init(uint8_t ep_addr, uint16_t wMaxPacketSize, uint8_t t if ( num == 0 ) { - // EP0 has no endpoint control register because - // the buffer offsets are fixed + // EP0 has no endpoint control register because the buffer offsets are fixed ep->endpoint_control = NULL; // Buffer offset is fixed (also double buffered) @@ -178,7 +177,7 @@ static void hw_endpoint_xfer(uint8_t ep_addr, uint8_t *buffer, uint16_t total_by static void hw_handle_buff_status(void) { uint32_t remaining_buffers = usb_hw->buf_status; - pico_trace("buf_status 0x%08x\n", remaining_buffers); + pico_trace("buf_status = 0x%08x\n", remaining_buffers); uint bit = 1u; for (uint i = 0; remaining_buffers && i < USB_MAX_ENDPOINTS * 2; i++) { @@ -186,8 +185,10 @@ static void hw_handle_buff_status(void) { // clear this in advance usb_hw_clear->buf_status = bit; + // IN transfer for even i, OUT transfer for odd i struct hw_endpoint *ep = hw_endpoint_get_by_num(i >> 1u, !(i & 1u)); + // Continue xfer bool done = hw_endpoint_xfer_continue(ep); if (done) @@ -325,7 +326,6 @@ static void dcd_rp2040_irq(void) void dcd_init (uint8_t rhport) { - pico_trace("dcd_init %d\n", rhport); assert(rhport == 0); // Reset hardware to default state @@ -370,7 +370,6 @@ void dcd_int_disable(uint8_t rhport) void dcd_set_address (uint8_t rhport, uint8_t dev_addr) { - pico_trace("dcd_set_address %d %d\n", rhport, dev_addr); assert(rhport == 0); // Can't set device address in hardware until status xfer has complete @@ -412,7 +411,6 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * re request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD && request->bRequest == TUSB_REQ_SET_ADDRESS ) { - pico_trace("Set HW address %d\n", request->wValue); usb_hw->dev_addr_ctrl = (uint8_t) request->wValue; } @@ -429,7 +427,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) void dcd_edpt_close_all (uint8_t rhport) { (void) rhport; - // TODO implement dcd_edpt_close_all() + // reset_all_endpoints(); TODO double check endpoint control } bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) @@ -441,8 +439,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) { - pico_trace("dcd_edpt_stall %02x\n", ep_addr); - assert(rhport == 0); + (void) rhport; if ( tu_edpt_number(ep_addr) == 0 ) { @@ -452,22 +449,22 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) struct hw_endpoint *ep = hw_endpoint_get_by_addr(ep_addr); - // TODO check with double buffered - _hw_endpoint_buffer_control_set_mask32(ep, USB_BUF_CTRL_STALL); + // stall and clear current pending buffer + // may need to use EP_ABORT + _hw_endpoint_buffer_control_set_value32(ep, USB_BUF_CTRL_STALL); } void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { - pico_trace("dcd_edpt_clear_stall %02x\n", ep_addr); - assert(rhport == 0); + (void) rhport; if (tu_edpt_number(ep_addr)) { struct hw_endpoint *ep = hw_endpoint_get_by_addr(ep_addr); - // clear stall also reset toggle to DATA0 - // TODO check with double buffered - _hw_endpoint_buffer_control_clear_mask32(ep, USB_BUF_CTRL_STALL | USB_BUF_CTRL_DATA1_PID); + // clear stall also reset toggle to DATA0, ready for next transfer + ep->next_pid = 0; + _hw_endpoint_buffer_control_clear_mask32(ep, USB_BUF_CTRL_STALL); } } diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index e51dfac2b..5e5bb4906 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -201,7 +201,6 @@ static void hcd_rp2040_irq(void) { handled |= USB_INTS_BUFF_STATUS_BITS; TU_LOG(2, "Buffer complete\n"); - // print_bufctrl32(*epx.buffer_control); hw_handle_buff_status(); } @@ -231,7 +230,7 @@ static void hcd_rp2040_irq(void) if (status & USB_INTS_ERROR_DATA_SEQ_BITS) { usb_hw_clear->sie_status = USB_SIE_STATUS_DATA_SEQ_ERROR_BITS; - print_bufctrl32(*epx.buffer_control); + TU_LOG(3, " Seq Error: [0] = 0x%04u [1] = 0x%04x\r\n", tu_u32_low16(*epx.buffer_control), tu_u32_high16(*epx.buffer_control)); panic("Data Seq Error \n"); } diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index 43554d28b..f9b4d9b17 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -67,7 +67,6 @@ void rp2040_usb_init(void) void hw_endpoint_reset_transfer(struct hw_endpoint *ep) { - ep->stalled = false; ep->active = false; ep->remaining_len = 0; ep->xferred_len = 0; @@ -171,8 +170,7 @@ static void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep) *ep->endpoint_control = ep_ctrl; - TU_LOG(3, "Prepare Buffer Control:\r\n"); - print_bufctrl32(buf_ctrl); + TU_LOG(3, " Prepare BufCtrl: [0] = 0x%04u [1] = 0x%04x\r\n", tu_u32_low16(buf_ctrl), tu_u32_high16(buf_ctrl)); // Finally, write to buffer_control which will trigger the transfer // the next time the controller polls this dpram address @@ -231,7 +229,7 @@ static uint16_t sync_ep_buffer(struct hw_endpoint *ep, uint8_t buf_id) // Short packet if (xferred_bytes < ep->wMaxPacketSize) { - pico_trace("Short rx transfer on buffer %d with %u bytes\n", buf_id, xferred_bytes); + pico_trace(" Short packet on buffer %d with %u bytes\n", buf_id, xferred_bytes); // Reduce total length as this is last packet ep->remaining_len = 0; } @@ -245,8 +243,7 @@ static void _hw_endpoint_xfer_sync (struct hw_endpoint *ep) // after a buff status interrupt uint32_t buf_ctrl = _hw_endpoint_buffer_control_get_value32(ep); - TU_LOG(3, "_hw_endpoint_xfer_sync:\r\n"); - print_bufctrl32(buf_ctrl); + TU_LOG(3, " Sync BufCtrl: [0] = 0x%04u [1] = 0x%04x\r\n", tu_u32_low16(buf_ctrl), tu_u32_high16(buf_ctrl)); // always sync buffer 0 uint16_t buf0_bytes = sync_ep_buffer(ep, 0); @@ -284,7 +281,7 @@ static void _hw_endpoint_xfer_sync (struct hw_endpoint *ep) usb_hw->abort &= ~TU_BIT(ep_id); TU_LOG(3, "----SHORT PACKET buffer0 on EP %02X:\r\n", ep->ep_addr); - print_bufctrl32(buf_ctrl); + TU_LOG(3, " BufCtrl: [0] = 0x%04u [1] = 0x%04x\r\n", tu_u32_low16(buf_ctrl), tu_u32_high16(buf_ctrl)); #endif } } diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.h b/src/portable/raspberrypi/rp2040/rp2040_usb.h index 5570a731a..b7bb51d1e 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.h +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.h @@ -42,9 +42,6 @@ struct hw_endpoint // Buffer pointer in usb dpram uint8_t *hw_data_buf; - // Have we been stalled TODO remove later - bool stalled; - // Current transfer information bool active; uint16_t remaining_len; @@ -96,52 +93,4 @@ static inline uintptr_t hw_data_offset(uint8_t *buf) extern const char *ep_dir_string[]; -typedef union TU_ATTR_PACKED -{ - uint16_t u16; - struct TU_ATTR_PACKED - { - uint16_t xfer_len : 10; - uint16_t available : 1; - uint16_t stall : 1; - uint16_t reset_bufsel : 1; - uint16_t data_toggle : 1; - uint16_t last_buf : 1; - uint16_t full : 1; - }; -} rp2040_buffer_control_t; - -TU_VERIFY_STATIC(sizeof(rp2040_buffer_control_t) == 2, "size is not correct"); - -#if CFG_TUSB_DEBUG >= 3 -static inline void print_bufctrl16(uint32_t u16) -{ - rp2040_buffer_control_t bufctrl = { - .u16 = u16 - }; - - TU_LOG(3, "len = %u, available = %u, full = %u, last = %u, stall = %u, reset = %u, toggle = %u\r\n", - bufctrl.xfer_len, bufctrl.available, bufctrl.full, bufctrl.last_buf, bufctrl.stall, bufctrl.reset_bufsel, bufctrl.data_toggle); -} - -static inline void print_bufctrl32(uint32_t u32) -{ - uint16_t u16; - - u16 = u32 >> 16; - TU_LOG(3, " Buffer Control 1 0x%x: ", u16); - print_bufctrl16(u16); - - u16 = u32 & 0x0000ffff; - TU_LOG(3, " Buffer Control 0 0x%x: ", u16); - print_bufctrl16(u16); -} - -#else - -#define print_bufctrl16(u16) -#define print_bufctrl32(u32) - -#endif - #endif -- cgit v1.3.1 From f81368174b613f4168ddb0e2ec1822c8dbc31d59 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 9 Sep 2021 14:34:03 +0700 Subject: add other speed descriptor callback tud_descriptor_other_speed_configuration_cb() example implement tud_descriptor_device_qualifier_cb() and tud_descriptor_other_speed_configuration_cb() on high speed device to fully compliant to usbcv --- .../device/cdc_dual_ports/src/usb_descriptors.c | 48 ++++++++++- examples/device/cdc_msc/src/usb_descriptors.c | 92 +++++++++++++++++----- .../device/cdc_msc_freertos/src/usb_descriptors.c | 63 +++++++++++++-- .../device/hid_composite/src/usb_descriptors.c | 57 +++++++++++++- .../hid_composite_freertos/src/usb_descriptors.c | 55 ++++++++++++- src/common/tusb_types.h | 5 +- src/device/usbd.c | 40 +++++----- src/device/usbd.h | 9 ++- 8 files changed, 315 insertions(+), 54 deletions(-) (limited to 'src/common') diff --git a/examples/device/cdc_dual_ports/src/usb_descriptors.c b/examples/device/cdc_dual_ports/src/usb_descriptors.c index 02ccbcc9e..aa400d486 100644 --- a/examples/device/cdc_dual_ports/src/usb_descriptors.c +++ b/examples/device/cdc_dual_ports/src/usb_descriptors.c @@ -35,6 +35,9 @@ #define USB_PID (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \ _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) ) +#define USB_VID 0xCafe +#define USB_BCD 0x0200 + //--------------------------------------------------------------------+ // Device Descriptors //--------------------------------------------------------------------+ @@ -42,7 +45,7 @@ tusb_desc_device_t const desc_device = { .bLength = sizeof(tusb_desc_device_t), .bDescriptorType = TUSB_DESC_DEVICE, - .bcdUSB = 0x0200, + .bcdUSB = USB_BCD, // Use Interface Association Descriptor (IAD) for CDC // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1) @@ -51,7 +54,7 @@ tusb_desc_device_t const desc_device = .bDeviceProtocol = MISC_PROTOCOL_IAD, .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE, - .idVendor = 0xCafe, + .idVendor = USB_VID, .idProduct = USB_PID, .bcdDevice = 0x0100, @@ -128,6 +131,8 @@ uint8_t const desc_fs_configuration[] = }; #if TUD_OPT_HIGH_SPEED +// Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration + uint8_t const desc_hs_configuration[] = { // Config number, interface count, string index, total length, attribute, power in mA @@ -139,7 +144,44 @@ uint8_t const desc_hs_configuration[] = // 2nd CDC: Interface number, string index, EP notification address and size, EP data address (out, in) and size. TUD_CDC_DESCRIPTOR(ITF_NUM_CDC_1, 4, EPNUM_CDC_1_NOTIF, 8, EPNUM_CDC_1_OUT, EPNUM_CDC_1_IN, 512), }; -#endif + +// device qualifier is mostly similar to device descriptor since we don't change configuration based on speed +tusb_desc_device_qualifier_t const desc_device_qualifier = +{ + .bLength = sizeof(tusb_desc_device_t), + .bDescriptorType = TUSB_DESC_DEVICE, + .bcdUSB = USB_BCD, + + .bDeviceClass = TUSB_CLASS_MISC, + .bDeviceSubClass = MISC_SUBCLASS_COMMON, + .bDeviceProtocol = MISC_PROTOCOL_IAD, + + .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE, + .bNumConfigurations = 0x01, + .bReserved = 0x00 +}; + +// Invoked when received GET DEVICE QUALIFIER DESCRIPTOR request +// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete. +// device_qualifier descriptor describes information about a high-speed capable device that would +// change if the device were operating at the other speed. If not highspeed capable stall this request. +uint8_t const* tud_descriptor_device_qualifier_cb(void) +{ + return (uint8_t const*) &desc_device_qualifier; +} + +// Invoked when received GET OTHER SEED CONFIGURATION DESCRIPTOR request +// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete +// Configuration descriptor in the other speed e.g if high speed then this is for full speed and vice versa +uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index) +{ + (void) index; // for multiple configurations + + // if link speed is high return fullspeed config, and vice versa + return (tud_speed_get() == TUSB_SPEED_HIGH) ? desc_fs_configuration : desc_hs_configuration; +} + +#endif // highspeed // Invoked when received GET CONFIGURATION DESCRIPTOR // Application return pointer to descriptor diff --git a/examples/device/cdc_msc/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c index 3cf1eaf91..34537b8f0 100644 --- a/examples/device/cdc_msc/src/usb_descriptors.c +++ b/examples/device/cdc_msc/src/usb_descriptors.c @@ -35,32 +35,35 @@ #define USB_PID (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \ _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) ) +#define USB_VID 0xCafe +#define USB_BCD 0x0200 + //--------------------------------------------------------------------+ // Device Descriptors //--------------------------------------------------------------------+ tusb_desc_device_t const desc_device = { - .bLength = sizeof(tusb_desc_device_t), - .bDescriptorType = TUSB_DESC_DEVICE, - .bcdUSB = 0x0200, + .bLength = sizeof(tusb_desc_device_t), + .bDescriptorType = TUSB_DESC_DEVICE, + .bcdUSB = USB_BCD, - // Use Interface Association Descriptor (IAD) for CDC - // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1) - .bDeviceClass = TUSB_CLASS_MISC, - .bDeviceSubClass = MISC_SUBCLASS_COMMON, - .bDeviceProtocol = MISC_PROTOCOL_IAD, + // Use Interface Association Descriptor (IAD) for CDC + // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1) + .bDeviceClass = TUSB_CLASS_MISC, + .bDeviceSubClass = MISC_SUBCLASS_COMMON, + .bDeviceProtocol = MISC_PROTOCOL_IAD, - .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE, + .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE, - .idVendor = 0xCafe, - .idProduct = USB_PID, - .bcdDevice = 0x0100, + .idVendor = USB_VID, + .idProduct = USB_PID, + .bcdDevice = 0x0100, - .iManufacturer = 0x01, - .iProduct = 0x02, - .iSerialNumber = 0x03, + .iManufacturer = 0x01, + .iProduct = 0x02, + .iSerialNumber = 0x03, - .bNumConfigurations = 0x01 + .bNumConfigurations = 0x01 }; // Invoked when received GET DEVICE DESCRIPTOR @@ -82,8 +85,6 @@ enum ITF_NUM_TOTAL }; -#define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_CDC_DESC_LEN + TUD_MSC_DESC_LEN) - #if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In, 5 Bulk etc ... @@ -126,6 +127,9 @@ enum #endif +#define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_CDC_DESC_LEN + TUD_MSC_DESC_LEN) + +// full speed configuration uint8_t const desc_fs_configuration[] = { // Config number, interface count, string index, total length, attribute, power in mA @@ -139,6 +143,9 @@ uint8_t const desc_fs_configuration[] = }; #if TUD_OPT_HIGH_SPEED +// Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration + +// high speed configuration uint8_t const desc_hs_configuration[] = { // Config number, interface count, string index, total length, attribute, power in mA @@ -150,7 +157,54 @@ uint8_t const desc_hs_configuration[] = // Interface number, string index, EP Out & EP In address, EP size TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 5, EPNUM_MSC_OUT, EPNUM_MSC_IN, 512), }; -#endif + +// other speed configuration +uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN]; + +// device qualifier is mostly similar to device descriptor since we don't change configuration based on speed +tusb_desc_device_qualifier_t const desc_device_qualifier = +{ + .bLength = sizeof(tusb_desc_device_qualifier_t), + .bDescriptorType = TUSB_DESC_DEVICE_QUALIFIER, + .bcdUSB = USB_BCD, + + .bDeviceClass = TUSB_CLASS_MISC, + .bDeviceSubClass = MISC_SUBCLASS_COMMON, + .bDeviceProtocol = MISC_PROTOCOL_IAD, + + .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE, + .bNumConfigurations = 0x01, + .bReserved = 0x00 +}; + +// Invoked when received GET DEVICE QUALIFIER DESCRIPTOR request +// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete. +// device_qualifier descriptor describes information about a high-speed capable device that would +// change if the device were operating at the other speed. If not highspeed capable stall this request. +uint8_t const* tud_descriptor_device_qualifier_cb(void) +{ + return (uint8_t const*) &desc_device_qualifier; +} + +// Invoked when received GET OTHER SEED CONFIGURATION DESCRIPTOR request +// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete +// Configuration descriptor in the other speed e.g if high speed then this is for full speed and vice versa +uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index) +{ + (void) index; // for multiple configurations + + // if link speed is high return fullspeed config, and vice versa + // Note: the descriptor type is OHER_SPEED_CONFIG instead of CONFIG + memcpy(desc_other_speed_config, + (tud_speed_get() == TUSB_SPEED_HIGH) ? desc_fs_configuration : desc_hs_configuration, + CONFIG_TOTAL_LEN); + + desc_other_speed_config[1] = TUSB_DESC_OTHER_SPEED_CONFIG; + + return desc_other_speed_config; +} + +#endif // highspeed // Invoked when received GET CONFIGURATION DESCRIPTOR diff --git a/examples/device/cdc_msc_freertos/src/usb_descriptors.c b/examples/device/cdc_msc_freertos/src/usb_descriptors.c index c8dbcd415..f3ff305f8 100644 --- a/examples/device/cdc_msc_freertos/src/usb_descriptors.c +++ b/examples/device/cdc_msc_freertos/src/usb_descriptors.c @@ -35,6 +35,9 @@ #define USB_PID (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \ _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) ) +#define USB_VID 0xCafe +#define USB_BCD 0x0200 + //--------------------------------------------------------------------+ // Device Descriptors //--------------------------------------------------------------------+ @@ -42,7 +45,7 @@ tusb_desc_device_t const desc_device = { .bLength = sizeof(tusb_desc_device_t), .bDescriptorType = TUSB_DESC_DEVICE, - .bcdUSB = 0x0200, + .bcdUSB = USB_BCD, // Use Interface Association Descriptor (IAD) for CDC // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1) @@ -52,7 +55,7 @@ tusb_desc_device_t const desc_device = .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE, - .idVendor = 0xCafe, + .idVendor = USB_VID, .idProduct = USB_PID, .bcdDevice = 0x0100, @@ -82,8 +85,6 @@ enum ITF_NUM_TOTAL }; -#define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_CDC_DESC_LEN + TUD_MSC_DESC_LEN) - #if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In, 5 Bulk etc ... @@ -114,6 +115,8 @@ enum #endif +#define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_CDC_DESC_LEN + TUD_MSC_DESC_LEN) + uint8_t const desc_fs_configuration[] = { // Config number, interface count, string index, total length, attribute, power in mA @@ -127,6 +130,9 @@ uint8_t const desc_fs_configuration[] = }; #if TUD_OPT_HIGH_SPEED +// Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration + +// high speed configuration uint8_t const desc_hs_configuration[] = { // Config number, interface count, string index, total length, attribute, power in mA @@ -138,7 +144,54 @@ uint8_t const desc_hs_configuration[] = // Interface number, string index, EP Out & EP In address, EP size TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 5, EPNUM_MSC_OUT, EPNUM_MSC_IN, 512), }; -#endif + +// other speed configuration +uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN]; + +// device qualifier is mostly similar to device descriptor since we don't change configuration based on speed +tusb_desc_device_qualifier_t const desc_device_qualifier = +{ + .bLength = sizeof(tusb_desc_device_qualifier_t), + .bDescriptorType = TUSB_DESC_DEVICE_QUALIFIER, + .bcdUSB = USB_BCD, + + .bDeviceClass = TUSB_CLASS_MISC, + .bDeviceSubClass = MISC_SUBCLASS_COMMON, + .bDeviceProtocol = MISC_PROTOCOL_IAD, + + .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE, + .bNumConfigurations = 0x01, + .bReserved = 0x00 +}; + +// Invoked when received GET DEVICE QUALIFIER DESCRIPTOR request +// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete. +// device_qualifier descriptor describes information about a high-speed capable device that would +// change if the device were operating at the other speed. If not highspeed capable stall this request. +uint8_t const* tud_descriptor_device_qualifier_cb(void) +{ + return (uint8_t const*) &desc_device_qualifier; +} + +// Invoked when received GET OTHER SEED CONFIGURATION DESCRIPTOR request +// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete +// Configuration descriptor in the other speed e.g if high speed then this is for full speed and vice versa +uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index) +{ + (void) index; // for multiple configurations + + // if link speed is high return fullspeed config, and vice versa + // Note: the descriptor type is OHER_SPEED_CONFIG instead of CONFIG + memcpy(desc_other_speed_config, + (tud_speed_get() == TUSB_SPEED_HIGH) ? desc_fs_configuration : desc_hs_configuration, + CONFIG_TOTAL_LEN); + + desc_other_speed_config[1] = TUSB_DESC_OTHER_SPEED_CONFIG; + + return desc_other_speed_config; +} + +#endif // highspeed // Invoked when received GET CONFIGURATION DESCRIPTOR // Application return pointer to descriptor diff --git a/examples/device/hid_composite/src/usb_descriptors.c b/examples/device/hid_composite/src/usb_descriptors.c index b9a6e7292..e760b20ba 100644 --- a/examples/device/hid_composite/src/usb_descriptors.c +++ b/examples/device/hid_composite/src/usb_descriptors.c @@ -36,6 +36,9 @@ #define USB_PID (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \ _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) ) +#define USB_VID 0xCafe +#define USB_BCD 0x0200 + //--------------------------------------------------------------------+ // Device Descriptors //--------------------------------------------------------------------+ @@ -43,13 +46,13 @@ tusb_desc_device_t const desc_device = { .bLength = sizeof(tusb_desc_device_t), .bDescriptorType = TUSB_DESC_DEVICE, - .bcdUSB = 0x0200, + .bcdUSB = USB_BCD, .bDeviceClass = 0x00, .bDeviceSubClass = 0x00, .bDeviceProtocol = 0x00, .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE, - .idVendor = 0xCafe, + .idVendor = USB_VID, .idProduct = USB_PID, .bcdDevice = 0x0100, @@ -111,12 +114,62 @@ uint8_t const desc_configuration[] = TUD_HID_DESCRIPTOR(ITF_NUM_HID, 0, HID_ITF_PROTOCOL_NONE, sizeof(desc_hid_report), EPNUM_HID, CFG_TUD_HID_EP_BUFSIZE, 5) }; +#if TUD_OPT_HIGH_SPEED +// Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration + +// other speed configuration +uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN]; + +// device qualifier is mostly similar to device descriptor since we don't change configuration based on speed +tusb_desc_device_qualifier_t const desc_device_qualifier = +{ + .bLength = sizeof(tusb_desc_device_qualifier_t), + .bDescriptorType = TUSB_DESC_DEVICE_QUALIFIER, + .bcdUSB = USB_BCD, + + .bDeviceClass = 0x00, + .bDeviceSubClass = 0x00, + .bDeviceProtocol = 0x00, + + .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE, + .bNumConfigurations = 0x01, + .bReserved = 0x00 +}; + +// Invoked when received GET DEVICE QUALIFIER DESCRIPTOR request +// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete. +// device_qualifier descriptor describes information about a high-speed capable device that would +// change if the device were operating at the other speed. If not highspeed capable stall this request. +uint8_t const* tud_descriptor_device_qualifier_cb(void) +{ + return (uint8_t const*) &desc_device_qualifier; +} + +// Invoked when received GET OTHER SEED CONFIGURATION DESCRIPTOR request +// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete +// Configuration descriptor in the other speed e.g if high speed then this is for full speed and vice versa +uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index) +{ + (void) index; // for multiple configurations + + // other speed config is basically configuration with type = OHER_SPEED_CONFIG + memcpy(desc_other_speed_config, desc_configuration, CONFIG_TOTAL_LEN); + desc_other_speed_config[1] = TUSB_DESC_OTHER_SPEED_CONFIG; + + // this example use the same configuration for both high and full speed mode + return desc_other_speed_config; +} + +#endif // highspeed + // Invoked when received GET CONFIGURATION DESCRIPTOR // Application return pointer to descriptor // Descriptor contents must exist long enough for transfer to complete uint8_t const * tud_descriptor_configuration_cb(uint8_t index) { (void) index; // for multiple configurations + + // This example use the same configuration for both high and full speed mode return desc_configuration; } diff --git a/examples/device/hid_composite_freertos/src/usb_descriptors.c b/examples/device/hid_composite_freertos/src/usb_descriptors.c index b9a6e7292..791813fdf 100644 --- a/examples/device/hid_composite_freertos/src/usb_descriptors.c +++ b/examples/device/hid_composite_freertos/src/usb_descriptors.c @@ -36,6 +36,9 @@ #define USB_PID (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \ _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) ) +#define USB_VID 0xCafe +#define USB_BCD 0x0200 + //--------------------------------------------------------------------+ // Device Descriptors //--------------------------------------------------------------------+ @@ -43,13 +46,13 @@ tusb_desc_device_t const desc_device = { .bLength = sizeof(tusb_desc_device_t), .bDescriptorType = TUSB_DESC_DEVICE, - .bcdUSB = 0x0200, + .bcdUSB = USB_BCD, .bDeviceClass = 0x00, .bDeviceSubClass = 0x00, .bDeviceProtocol = 0x00, .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE, - .idVendor = 0xCafe, + .idVendor = USB_VID, .idProduct = USB_PID, .bcdDevice = 0x0100, @@ -111,6 +114,54 @@ uint8_t const desc_configuration[] = TUD_HID_DESCRIPTOR(ITF_NUM_HID, 0, HID_ITF_PROTOCOL_NONE, sizeof(desc_hid_report), EPNUM_HID, CFG_TUD_HID_EP_BUFSIZE, 5) }; +#if TUD_OPT_HIGH_SPEED +// Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration + +// other speed configuration +uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN]; + +// device qualifier is mostly similar to device descriptor since we don't change configuration based on speed +tusb_desc_device_qualifier_t const desc_device_qualifier = +{ + .bLength = sizeof(tusb_desc_device_qualifier_t), + .bDescriptorType = TUSB_DESC_DEVICE_QUALIFIER, + .bcdUSB = USB_BCD, + + .bDeviceClass = 0x00, + .bDeviceSubClass = 0x00, + .bDeviceProtocol = 0x00, + + .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE, + .bNumConfigurations = 0x01, + .bReserved = 0x00 +}; + +// Invoked when received GET DEVICE QUALIFIER DESCRIPTOR request +// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete. +// device_qualifier descriptor describes information about a high-speed capable device that would +// change if the device were operating at the other speed. If not highspeed capable stall this request. +uint8_t const* tud_descriptor_device_qualifier_cb(void) +{ + return (uint8_t const*) &desc_device_qualifier; +} + +// Invoked when received GET OTHER SEED CONFIGURATION DESCRIPTOR request +// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete +// Configuration descriptor in the other speed e.g if high speed then this is for full speed and vice versa +uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index) +{ + (void) index; // for multiple configurations + + // other speed config is basically configuration with type = OHER_SPEED_CONFIG + memcpy(desc_other_speed_config, desc_configuration, CONFIG_TOTAL_LEN); + desc_other_speed_config[1] = TUSB_DESC_OTHER_SPEED_CONFIG; + + // this example use the same configuration for both high and full speed mode + return desc_other_speed_config; +} + +#endif // highspeed + // Invoked when received GET CONFIGURATION DESCRIPTOR // Application return pointer to descriptor // Descriptor contents must exist long enough for transfer to complete diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index d23c6b2dd..f26983a74 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -372,7 +372,7 @@ typedef struct TU_ATTR_PACKED uint8_t bNumInterfaces ; ///< Number of interfaces supported by this speed configuration uint8_t bConfigurationValue ; ///< Value to use to select configuration - uint8_t IConfiguration ; ///< Index of string descriptor + uint8_t iConfiguration ; ///< Index of string descriptor uint8_t bmAttributes ; ///< Same as Configuration descriptor uint8_t bMaxPower ; ///< Same as Configuration descriptor } tusb_desc_other_speed_t; @@ -387,11 +387,14 @@ typedef struct TU_ATTR_PACKED uint8_t bDeviceClass ; ///< Class Code uint8_t bDeviceSubClass ; ///< SubClass Code uint8_t bDeviceProtocol ; ///< Protocol Code + uint8_t bMaxPacketSize0 ; ///< Maximum packet size for other speed uint8_t bNumConfigurations ; ///< Number of Other-speed Configurations uint8_t bReserved ; ///< Reserved for future use, must be zero } tusb_desc_device_qualifier_t; +TU_VERIFY_STATIC( sizeof(tusb_desc_device_qualifier_t) == 10, "size is not correct"); + /// USB Interface Association Descriptor (IAD ECN) typedef struct TU_ATTR_PACKED { diff --git a/src/device/usbd.c b/src/device/usbd.c index a52ea9afe..58b3a5701 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -1002,10 +1002,22 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const break; case TUSB_DESC_CONFIGURATION: + case TUSB_DESC_OTHER_SPEED_CONFIG: { - TU_LOG2(" Configuration[%u]\r\n", desc_index); + tusb_desc_configuration_t const* desc_config; + + if ( desc_type == TUSB_DESC_CONFIGURATION ) + { + TU_LOG2(" Configuration[%u]\r\n", desc_index); + desc_config = (tusb_desc_configuration_t const*) tud_descriptor_configuration_cb(desc_index); + }else + { + // Host only request this after getting Device Qualifier descriptor + TU_LOG2(" Other Speed Configuration\r\n"); + TU_VERIFY( tud_descriptor_other_speed_configuration_cb ); + desc_config = (tusb_desc_configuration_t const*) tud_descriptor_other_speed_configuration_cb(desc_index); + } - tusb_desc_configuration_t const* desc_config = (tusb_desc_configuration_t const*) tud_descriptor_configuration_cb(desc_index); TU_ASSERT(desc_config); // Use offsetof to avoid pointer to the odd/misaligned address @@ -1031,27 +1043,13 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const case TUSB_DESC_DEVICE_QUALIFIER: TU_LOG2(" Device Qualifier\r\n"); - // Host sends this request to ask why our device with USB BCD from 2.0 - // but is running at Full/Low Speed. If not highspeed capable stall this request, - // otherwise return the descriptor that could work in highspeed mode - if ( tud_descriptor_device_qualifier_cb ) - { - uint8_t const* desc_qualifier = tud_descriptor_device_qualifier_cb(); - TU_ASSERT(desc_qualifier); + TU_VERIFY( tud_descriptor_device_qualifier_cb ); - // first byte of descriptor is its size - return tud_control_xfer(rhport, p_request, (void*) desc_qualifier, desc_qualifier[0]); - }else - { - return false; - } - break; + uint8_t const* desc_qualifier = tud_descriptor_device_qualifier_cb(); + TU_VERIFY(desc_qualifier); - case TUSB_DESC_OTHER_SPEED_CONFIG: - TU_LOG2(" Other Speed Configuration\r\n"); - - // After Device Qualifier descriptor is received host will ask for this descriptor - return false; // not supported + // first byte of descriptor is its size + return tud_control_xfer(rhport, p_request, (void*) desc_qualifier, desc_qualifier[0]); break; default: return false; diff --git a/src/device/usbd.h b/src/device/usbd.h index 9becf2d0d..638d93094 100644 --- a/src/device/usbd.h +++ b/src/device/usbd.h @@ -113,9 +113,16 @@ uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid); TU_ATTR_WEAK uint8_t const * tud_descriptor_bos_cb(void); // Invoked when received GET DEVICE QUALIFIER DESCRIPTOR request -// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete +// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete. +// device_qualifier descriptor describes information about a high-speed capable device that would +// change if the device were operating at the other speed. If not highspeed capable stall this request. TU_ATTR_WEAK uint8_t const* tud_descriptor_device_qualifier_cb(void); +// Invoked when received GET OTHER SEED CONFIGURATION DESCRIPTOR request +// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete +// Configuration descriptor in the other speed e.g if high speed then this is for full speed and vice versa +TU_ATTR_WEAK uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index); + // Invoked when device is mounted (configured) TU_ATTR_WEAK void tud_mount_cb(void); -- cgit v1.3.1 From ad8c0ee8182f6c6120bf8124dbdcd2883f285f8f Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 9 Sep 2021 20:26:03 +0700 Subject: nxp tdi: enhance qhd using DCD_ATTR_ENDPOINT_MAX --- src/common/tusb_common.h | 2 +- .../nxp/transdimension/dcd_transdimension.c | 87 +++++++++++----------- 2 files changed, 44 insertions(+), 45 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 687f980be..d0cc41285 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -372,7 +372,7 @@ typedef struct static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key) { - static char not_found[10]; + static char not_found[11]; for(uint16_t i=0; icount; i++) { diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c index 4a8205162..35f824112 100644 --- a/src/portable/nxp/transdimension/dcd_transdimension.c +++ b/src/portable/nxp/transdimension/dcd_transdimension.c @@ -145,10 +145,6 @@ typedef struct }dcd_controller_t; #if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX - // Each endpoint with direction (IN/OUT) occupies a queue head - // Therefore QHD_MAX is 2 x max endpoint count - #define QHD_MAX (8*2) - static const dcd_controller_t _dcd_controller[] = { // RT1010 and RT1020 only has 1 USB controller @@ -161,8 +157,6 @@ typedef struct }; #else - #define QHD_MAX (6*2) - static const dcd_controller_t _dcd_controller[] = { { .regs = (dcd_registers_t*) LPC_USB0_BASE, .irqnum = USB0_IRQn, .ep_count = 6 }, @@ -174,8 +168,10 @@ typedef struct typedef struct { // Must be at 2K alignment - dcd_qhd_t qhd[QHD_MAX] TU_ATTR_ALIGNED(64); - dcd_qtd_t qtd[QHD_MAX] TU_ATTR_ALIGNED(32); // for portability, TinyUSB only queue 1 TD for each Qhd + // Each endpoint with direction (IN/OUT) occupies a queue head + // for portability, TinyUSB only queue 1 TD for each Qhd + dcd_qhd_t qhd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64); + dcd_qtd_t qtd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32); }dcd_data_t; CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048) @@ -217,11 +213,11 @@ static void bus_reset(uint8_t rhport) tu_memclr(&_dcd_data, sizeof(dcd_data_t)); //------------- Set up Control Endpoints (0 OUT, 1 IN) -------------// - _dcd_data.qhd[0].zero_length_termination = _dcd_data.qhd[1].zero_length_termination = 1; - _dcd_data.qhd[0].max_package_size = _dcd_data.qhd[1].max_package_size = CFG_TUD_ENDPOINT0_SIZE; - _dcd_data.qhd[0].qtd_overlay.next = _dcd_data.qhd[1].qtd_overlay.next = QTD_NEXT_INVALID; + _dcd_data.qhd[0][0].zero_length_termination = _dcd_data.qhd[0][1].zero_length_termination = 1; + _dcd_data.qhd[0][0].max_package_size = _dcd_data.qhd[0][1].max_package_size = CFG_TUD_ENDPOINT0_SIZE; + _dcd_data.qhd[0][0].qtd_overlay.next = _dcd_data.qhd[0][1].qtd_overlay.next = QTD_NEXT_INVALID; - _dcd_data.qhd[0].int_on_setup = 1; // OUT only + _dcd_data.qhd[0][0].int_on_setup = 1; // OUT only } void dcd_init(uint8_t rhport) @@ -291,11 +287,6 @@ void dcd_disconnect(uint8_t rhport) //--------------------------------------------------------------------+ // HELPER //--------------------------------------------------------------------+ -// index to bit position in register -static inline uint8_t ep_idx2bit(uint8_t ep_idx) -{ - return ep_idx/2 + ( (ep_idx%2) ? 16 : 0); -} static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes) { @@ -325,12 +316,15 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; dcd_reg->ENDPTCTRL[epnum] |= ENDPTCTRL_STALL << (dir ? 16 : 0); + + // flush to abort any primed buffer + dcd_reg->ENDPTFLUSH = TU_BIT(epnum + (dir ? 16 : 0)); } void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); // data toggle also need to be reset dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; @@ -343,15 +337,14 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) // TODO not support ISO yet TU_VERIFY ( p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS); - uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress); - uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress); - uint8_t const ep_idx = 2*epnum + dir; + uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress); + uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress); // Must not exceed max endpoint number TU_ASSERT( epnum < _dcd_controller[rhport].ep_count ); //------------- Prepare Queue Head -------------// - dcd_qhd_t * p_qhd = &_dcd_data.qhd[ep_idx]; + dcd_qhd_t * p_qhd = &_dcd_data.qhd[epnum][dir]; tu_memclr(p_qhd, sizeof(dcd_qhd_t)); p_qhd->zero_length_termination = 1; @@ -378,7 +371,6 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const dir = tu_edpt_dir(ep_addr); - uint8_t const ep_idx = 2*epnum + dir; if ( epnum == 0 ) { @@ -387,8 +379,8 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t while(dcd_reg->ENDPTSETUPSTAT & TU_BIT(0)) {} } - dcd_qhd_t * p_qhd = &_dcd_data.qhd[ep_idx]; - dcd_qtd_t * p_qtd = &_dcd_data.qtd[ep_idx]; + dcd_qhd_t * p_qhd = &_dcd_data.qhd[epnum][dir]; + dcd_qtd_t * p_qtd = &_dcd_data.qtd[epnum][dir]; // Force the CPU to flush the buffer. We increase the size by 32 because the call aligns the // address to 32-byte boundaries. @@ -403,7 +395,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t)); // start transfer - dcd_reg->ENDPTPRIME = TU_BIT( ep_idx2bit(ep_idx) ) ; + dcd_reg->ENDPTPRIME = TU_BIT(epnum + (dir ? 16 : 0)); return true; } @@ -411,6 +403,18 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t //--------------------------------------------------------------------+ // ISR //--------------------------------------------------------------------+ + +static void process_edpt_complete_isr(uint8_t rhport, uint8_t ep_num, uint8_t dir) +{ + dcd_qtd_t * p_qtd = &_dcd_data.qtd[ep_num][dir]; + + uint8_t result = p_qtd->halted ? XFER_RESULT_STALLED : + ( p_qtd->xact_err || p_qtd->buffer_err ) ? XFER_RESULT_FAILED : XFER_RESULT_SUCCESS; + + // only number of bytes in the IOC qtd + dcd_event_xfer_complete(rhport, tu_edpt_addr(ep_num, dir), p_qtd->expected_bytes - p_qtd->total_bytes, result, true); +} + void dcd_int_handler(uint8_t rhport) { dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; @@ -481,26 +485,24 @@ void dcd_int_handler(uint8_t rhport) { //------------- Set up Received -------------// // 23.10.10.2 Operational model for setup transfers - dcd_reg->ENDPTSETUPSTAT = dcd_reg->ENDPTSETUPSTAT;// acknowledge + dcd_reg->ENDPTSETUPSTAT = dcd_reg->ENDPTSETUPSTAT; - dcd_event_setup_received(rhport, (uint8_t*) &_dcd_data.qhd[0].setup_request, true); + dcd_event_setup_received(rhport, (uint8_t*) &_dcd_data.qhd[0][0].setup_request, true); + } + + // 23.10.12.3 Failed QTD also get ENDPTCOMPLETE set + if (int_status & INTR_ERROR) + { + TU_LOG_HEX(1, int_status); + TU_LOG_HEX(1, edpt_complete); } if ( edpt_complete ) { - for(uint8_t ep_idx = 0; ep_idx < QHD_MAX; ep_idx++) + for(uint8_t ep_num = 0; ep_num < DCD_ATTR_ENDPOINT_MAX; ep_num++) { - if ( tu_bit_test(edpt_complete, ep_idx2bit(ep_idx)) ) - { - // 23.10.12.3 Failed QTD also get ENDPTCOMPLETE set - dcd_qtd_t * p_qtd = &_dcd_data.qtd[ep_idx]; - - uint8_t result = p_qtd->halted ? XFER_RESULT_STALLED : - ( p_qtd->xact_err ||p_qtd->buffer_err ) ? XFER_RESULT_FAILED : XFER_RESULT_SUCCESS; - - uint8_t const ep_addr = (ep_idx/2) | ( (ep_idx & 0x01) ? TUSB_DIR_IN_MASK : 0 ); - dcd_event_xfer_complete(rhport, ep_addr, p_qtd->expected_bytes - p_qtd->total_bytes, result, true); // only number of bytes in the IOC qtd - } + if ( tu_bit_test(edpt_complete, ep_num) ) process_edpt_complete_isr(rhport, ep_num, TUSB_DIR_OUT); + if ( tu_bit_test(edpt_complete, ep_num+16) ) process_edpt_complete_isr(rhport, ep_num, TUSB_DIR_IN); } } } @@ -509,9 +511,6 @@ void dcd_int_handler(uint8_t rhport) { dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); } - - if (int_status & INTR_NAK) {} - if (int_status & INTR_ERROR) TU_ASSERT(false, ); } #endif -- cgit v1.3.1 From cdc63459ebf5bd979d1e98253abd3d75693dcdaf Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 13 Sep 2021 16:49:38 +0700 Subject: esp32sx implement dcd_remote_wakeup(), fully compliance to chapter9 test suite --- .../hid_composite_freertos/src/tusb_config.h | 5 ++-- src/common/tusb_common.h | 2 +- src/portable/espressif/esp32sx/dcd_esp32sx.c | 33 +++++++++++++--------- 3 files changed, 23 insertions(+), 17 deletions(-) (limited to 'src/common') diff --git a/examples/device/hid_composite_freertos/src/tusb_config.h b/examples/device/hid_composite_freertos/src/tusb_config.h index 4b0458ef0..4fbccc294 100644 --- a/examples/device/hid_composite_freertos/src/tusb_config.h +++ b/examples/device/hid_composite_freertos/src/tusb_config.h @@ -67,8 +67,9 @@ // This examples use FreeRTOS #define CFG_TUSB_OS OPT_OS_FREERTOS -// CFG_TUSB_DEBUG is defined by compiler in DEBUG build -// #define CFG_TUSB_DEBUG 0 +#ifndef CFG_TUSB_DEBUG +#define CFG_TUSB_DEBUG 0 +#endif /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. * Tinyusb use follows macros to declare transferring memory so that they can be put diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index d0cc41285..1899b35cc 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -380,7 +380,7 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3 } // not found return the key value in hex - sprintf(not_found, "0x%08lX", key); + sprintf(not_found, "0x%08lX", (unsigned long) key); return not_found; } diff --git a/src/portable/espressif/esp32sx/dcd_esp32sx.c b/src/portable/espressif/esp32sx/dcd_esp32sx.c index 541f7d586..cfbbab233 100644 --- a/src/portable/espressif/esp32sx/dcd_esp32sx.c +++ b/src/portable/espressif/esp32sx/dcd_esp32sx.c @@ -42,10 +42,6 @@ #include "device/dcd.h" -// Since TinyUSB doesn't use SOF for now, and this interrupt too often (1ms interval) -// We disable SOF for now until needed later on -#define USE_SOF 0 - // Max number of bi-directional endpoints including EP0 // Note: ESP32S2 specs say there are only up to 5 IN active endpoints include EP0 // We should probably prohibit enabling Endpoint IN > 4 (not done yet) @@ -194,9 +190,6 @@ void dcd_init(uint8_t rhport) USB0.gintsts = ~0U; //clear pending ints USB0.gintmsk = USB_OTGINTMSK_M | USB_MODEMISMSK_M | - #if USE_SOF - USB_SOFMSK_M | - #endif USB_RXFLVIMSK_M | USB_ERLYSUSPMSK_M | USB_USBSUSPMSK_M | @@ -221,8 +214,17 @@ void dcd_remote_wakeup(uint8_t rhport) { (void)rhport; - // TODO must manually clear this bit after 1-15 ms - // USB0.DCTL |= USB_RMTWKUPSIG_M; + // set remote wakeup + USB0.dctl |= USB_RMTWKUPSIG_M; + + // enable SOF to detect bus resume + USB0.gintsts = USB_SOF_M; + USB0.gintmsk |= USB_SOFMSK_M; + + // Per specs: remote wakeup signal bit must be clear within 1-15ms + vTaskDelay(pdMS_TO_TICKS(1)); + + USB0.dctl &= ~USB_RMTWKUPSIG_M; } // connect by enabling internal pull-up resistor on D+/D- @@ -731,8 +733,8 @@ static void _dcd_int_handler(void* arg) (void) arg; uint8_t const rhport = 0; - const uint32_t int_status = USB0.gintsts; - //const uint32_t int_msk = USB0.gintmsk; + const uint32_t int_msk = USB0.gintmsk; + const uint32_t int_status = USB0.gintsts & int_msk; if (int_status & USB_USBRST_M) { // start of reset @@ -785,12 +787,15 @@ static void _dcd_int_handler(void* arg) USB0.gotgint = otg_int; } -#if USE_SOF if (int_status & USB_SOF_M) { USB0.gintsts = USB_SOF_M; - dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); // do nothing actually + + // Disable SOF interrupt since currently only used for remote wakeup detection + USB0.gintmsk &= ~USB_SOFMSK_M; + + dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); } -#endif + if (int_status & USB_RXFLVI_M) { // RXFLVL bit is read-only -- cgit v1.3.1 From 73872a5df04a8939d5f71509788c659e38efcecd Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 25 Sep 2021 16:16:55 +0700 Subject: add CFG_TUSB_OS_INC_PATH for os include path useful for freertos/ prefix with esp IDF --- examples/device/cdc_msc_freertos/Makefile | 8 +- .../device/cdc_msc_freertos/src/CMakeLists.txt | 2 - .../device/cdc_msc_freertos/src/FreeRTOSConfig.h | 182 -------------------- .../src/FreeRTOSConfig/FreeRTOSConfig.h | 186 +++++++++++++++++++++ examples/device/cdc_msc_freertos/src/main.c | 16 +- examples/device/cdc_msc_freertos/src/tusb_config.h | 5 + examples/device/hid_boot_interface/Makefile | 2 +- examples/device/hid_composite_freertos/Makefile | 7 +- .../hid_composite_freertos/src/CMakeLists.txt | 2 - .../hid_composite_freertos/src/FreeRTOSConfig.h | 182 -------------------- .../src/FreeRTOSConfig/FreeRTOSConfig.h | 186 +++++++++++++++++++++ examples/device/hid_composite_freertos/src/main.c | 17 +- .../hid_composite_freertos/src/tusb_config.h | 6 + hw/bsp/esp32s2/boards/CMakeLists.txt | 2 - src/common/tusb_compiler.h | 3 + src/osal/osal_freertos.h | 8 +- src/tusb_option.h | 6 + 17 files changed, 428 insertions(+), 392 deletions(-) delete mode 100644 examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h create mode 100644 examples/device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h delete mode 100644 examples/device/hid_composite_freertos/src/FreeRTOSConfig.h create mode 100644 examples/device/hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h (limited to 'src/common') diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile index 86bacd2d4..677dcac9c 100644 --- a/examples/device/cdc_msc_freertos/Makefile +++ b/examples/device/cdc_msc_freertos/Makefile @@ -7,12 +7,18 @@ FREERTOS_SRC = lib/FreeRTOS-Kernel INC += \ src \ + src/FreeRTOSConfig \ $(TOP)/hw \ $(TOP)/$(FREERTOS_SRC)/include \ $(TOP)/$(FREERTOS_SRC)/portable/GCC/$(FREERTOS_PORT) # Example source -EXAMPLE_SOURCE += $(wildcard src/*.c) +EXAMPLE_SOURCE = \ + src/freertos_hook.c \ + src/main.c \ + src/msc_disk.c \ + src/usb_descriptors.c + SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE)) # FreeRTOS source, all files in port folder diff --git a/examples/device/cdc_msc_freertos/src/CMakeLists.txt b/examples/device/cdc_msc_freertos/src/CMakeLists.txt index 6b188fd30..c0a665fa0 100644 --- a/examples/device/cdc_msc_freertos/src/CMakeLists.txt +++ b/examples/device/cdc_msc_freertos/src/CMakeLists.txt @@ -8,9 +8,7 @@ if(EXISTS ${board_cmake}) include(${board_cmake}) endif() -idf_component_get_property( FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PATH) target_include_directories(${COMPONENT_TARGET} PUBLIC - "${FREERTOS_ORIG_INCLUDE_PATH}" "${TOP}/hw" "${TOP}/src" ) diff --git a/examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h b/examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h deleted file mode 100644 index 568b27a18..000000000 --- a/examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h +++ /dev/null @@ -1,182 +0,0 @@ -/* - * FreeRTOS Kernel V10.0.0 - * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. If you wish to use our Amazon - * FreeRTOS name, please do so in a fair use way that does not cause confusion. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos - * - * 1 tab == 4 spaces! - */ - - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. - * - * See http://www.freertos.org/a00110.html. - *----------------------------------------------------------*/ - -// Include MCU header -#include "bsp/board_mcu.h" - -extern uint32_t SystemCoreClock; - -/* Cortex M23/M33 port configuration. */ -#define configENABLE_MPU 0 -#define configENABLE_FPU 1 -#define configENABLE_TRUSTZONE 0 -#define configMINIMAL_SECURE_STACK_SIZE ( 1024 ) - -#define configUSE_PREEMPTION 1 -#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 -#define configCPU_CLOCK_HZ SystemCoreClock -#define configTICK_RATE_HZ ( 1000 ) -#define configMAX_PRIORITIES ( 5 ) -#define configMINIMAL_STACK_SIZE ( 128 ) -#define configTOTAL_HEAP_SIZE ( 0*1024 ) // dynamic is not used -#define configMAX_TASK_NAME_LEN 16 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 1 -#define configUSE_MUTEXES 1 -#define configUSE_RECURSIVE_MUTEXES 1 -#define configUSE_COUNTING_SEMAPHORES 1 -#define configQUEUE_REGISTRY_SIZE 2 -#define configUSE_QUEUE_SETS 0 -#define configUSE_TIME_SLICING 0 -#define configUSE_NEWLIB_REENTRANT 0 -#define configENABLE_BACKWARD_COMPATIBILITY 1 -#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 - -#define configSUPPORT_STATIC_ALLOCATION 1 -#define configSUPPORT_DYNAMIC_ALLOCATION 0 - -/* Hook function related definitions. */ -#define configUSE_IDLE_HOOK 0 -#define configUSE_TICK_HOOK 0 -#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning -#define configCHECK_FOR_STACK_OVERFLOW 2 - -/* Run time and task stats gathering related definitions. */ -#define configGENERATE_RUN_TIME_STATS 0 -#define configUSE_TRACE_FACILITY 1 // legacy trace -#define configUSE_STATS_FORMATTING_FUNCTIONS 0 - -/* Co-routine definitions. */ -#define configUSE_CO_ROUTINES 0 -#define configMAX_CO_ROUTINE_PRIORITIES 2 - -/* Software timer related definitions. */ -#define configUSE_TIMERS 1 -#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2) -#define configTIMER_QUEUE_LENGTH 32 -#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE - -/* Optional functions - most linkers will remove unused functions anyway. */ -#define INCLUDE_vTaskPrioritySet 0 -#define INCLUDE_uxTaskPriorityGet 0 -#define INCLUDE_vTaskDelete 0 -#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY -#define INCLUDE_xResumeFromISR 0 -#define INCLUDE_vTaskDelayUntil 1 -#define INCLUDE_vTaskDelay 1 -#define INCLUDE_xTaskGetSchedulerState 0 -#define INCLUDE_xTaskGetCurrentTaskHandle 0 -#define INCLUDE_uxTaskGetStackHighWaterMark 0 -#define INCLUDE_xTaskGetIdleTaskHandle 0 -#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 -#define INCLUDE_pcTaskGetTaskName 0 -#define INCLUDE_eTaskGetState 0 -#define INCLUDE_xEventGroupSetBitFromISR 0 -#define INCLUDE_xTimerPendFunctionCall 0 - -/* Define to trap errors during development. */ -// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7 -#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) - #define configASSERT(_exp) \ - do {\ - if ( !(_exp) ) { \ - volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ - if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \ - taskDISABLE_INTERRUPTS(); \ - __asm("BKPT #0\n"); \ - }\ - }\ - } while(0) -#else - #define configASSERT( x ) -#endif - -#ifdef __RX__ -/* Renesas RX series */ -#define vSoftwareInterruptISR INT_Excep_ICU_SWINT -#define vTickISR INT_Excep_CMT0_CMI0 -#define configPERIPHERAL_CLOCK_HZ (configCPU_CLOCK_HZ/2) -#define configKERNEL_INTERRUPT_PRIORITY 1 -#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 - -#else - -/* FreeRTOS hooks to NVIC vectors */ -#define xPortPendSVHandler PendSV_Handler -#define xPortSysTickHandler SysTick_Handler -#define vPortSVCHandler SVC_Handler - -//--------------------------------------------------------------------+ -// Interrupt nesting behavior configuration. -//--------------------------------------------------------------------+ -#if defined(__NVIC_PRIO_BITS) - // For Cortex-M specific: __NVIC_PRIO_BITS is defined in core_cmx.h - #define configPRIO_BITS __NVIC_PRIO_BITS -#elif defined(__ECLIC_INTCTLBITS) - // RISC-V Bumblebee core from nuclei - #define configPRIO_BITS __ECLIC_INTCTLBITS -#else - #error "FreeRTOS configPRIO_BITS to be defined" -#endif - -/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ -#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<DHCSR */ \ + if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \ + taskDISABLE_INTERRUPTS(); \ + __asm("BKPT #0\n"); \ + }\ + }\ + } while(0) +#else + #define configASSERT( x ) +#endif + +#ifdef __RX__ +/* Renesas RX series */ +#define vSoftwareInterruptISR INT_Excep_ICU_SWINT +#define vTickISR INT_Excep_CMT0_CMI0 +#define configPERIPHERAL_CLOCK_HZ (configCPU_CLOCK_HZ/2) +#define configKERNEL_INTERRUPT_PRIORITY 1 +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + +#else + +/* FreeRTOS hooks to NVIC vectors */ +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler +#define vPortSVCHandler SVC_Handler + +//--------------------------------------------------------------------+ +// Interrupt nesting behavior configuration. +//--------------------------------------------------------------------+ +#if defined(__NVIC_PRIO_BITS) + // For Cortex-M specific: __NVIC_PRIO_BITS is defined in core_cmx.h + #define configPRIO_BITS __NVIC_PRIO_BITS +#elif defined(__ECLIC_INTCTLBITS) + // RISC-V Bumblebee core from nuclei + #define configPRIO_BITS __ECLIC_INTCTLBITS +#else + #error "FreeRTOS configPRIO_BITS to be defined" +#endif + +/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1< #include -#include "FreeRTOS.h" -#include "task.h" -#include "timers.h" -#include "queue.h" -#include "semphr.h" - #include "bsp/board.h" #include "tusb.h" +// FreeRTOS headers, MCUs such as esp32sx requires "freertos/" prefix in include path. +// CFG_TUSB_OS_INC_PATH should be defined accordingly. +#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,FreeRTOS.h) +#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,semphr.h) +#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,queue.h) +#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,task.h) +#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,timers.h) + //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF PROTYPES //--------------------------------------------------------------------+ @@ -95,7 +97,7 @@ int main(void) (void) xTaskCreateStatic( cdc_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, cdc_stack, &cdc_taskdef); // skip starting scheduler (and return) for ESP32-S2 or ESP32-S3 -#if CFG_TUSB_MCU != OPT_MCU_ESP32S2 && CFG_TUSB_MCU != OPT_MCU_ESP32S3 +#if !( TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3) ) vTaskStartScheduler(); #endif diff --git a/examples/device/cdc_msc_freertos/src/tusb_config.h b/examples/device/cdc_msc_freertos/src/tusb_config.h index ff5438349..d4bbdee48 100644 --- a/examples/device/cdc_msc_freertos/src/tusb_config.h +++ b/examples/device/cdc_msc_freertos/src/tusb_config.h @@ -67,6 +67,11 @@ // This examples use FreeRTOS #define CFG_TUSB_OS OPT_OS_FREERTOS +// Espressif IDF requires "freertos/" prefix in include path +#if TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3) + #define CFG_TUSB_OS_INC_PATH freertos/ +#endif + // can be defined by compiler in DEBUG build #ifndef CFG_TUSB_DEBUG #define CFG_TUSB_DEBUG 0 diff --git a/examples/device/hid_boot_interface/Makefile b/examples/device/hid_boot_interface/Makefile index 138c27846..c6a9c5b21 100644 --- a/examples/device/hid_boot_interface/Makefile +++ b/examples/device/hid_boot_interface/Makefile @@ -6,7 +6,7 @@ INC += \ $(TOP)/hw \ # Example source -EXAMPLE_SOURCE += \ +EXAMPLE_SOURCE = \ src/main.c \ src/usb_descriptors.c diff --git a/examples/device/hid_composite_freertos/Makefile b/examples/device/hid_composite_freertos/Makefile index 1c1959590..256db3d8c 100644 --- a/examples/device/hid_composite_freertos/Makefile +++ b/examples/device/hid_composite_freertos/Makefile @@ -7,12 +7,17 @@ FREERTOS_SRC = lib/FreeRTOS-Kernel INC += \ src \ + src/FreeRTOSConfig \ $(TOP)/hw \ $(TOP)/$(FREERTOS_SRC)/include \ $(TOP)/$(FREERTOS_SRC)/portable/GCC/$(FREERTOS_PORT) # Example source -EXAMPLE_SOURCE += $(wildcard src/*.c) +EXAMPLE_SOURCE = \ + src/freertos_hook.c \ + src/main.c \ + src/usb_descriptors.c + SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE)) # FreeRTOS source, all files in port folder diff --git a/examples/device/hid_composite_freertos/src/CMakeLists.txt b/examples/device/hid_composite_freertos/src/CMakeLists.txt index 6d4a3c1e2..a2a4fc9b1 100644 --- a/examples/device/hid_composite_freertos/src/CMakeLists.txt +++ b/examples/device/hid_composite_freertos/src/CMakeLists.txt @@ -8,9 +8,7 @@ if(EXISTS ${board_cmake}) include(${board_cmake}) endif() -idf_component_get_property( FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PATH) target_include_directories(${COMPONENT_TARGET} PUBLIC - "${FREERTOS_ORIG_INCLUDE_PATH}" "${TOP}/hw" "${TOP}/src" ) diff --git a/examples/device/hid_composite_freertos/src/FreeRTOSConfig.h b/examples/device/hid_composite_freertos/src/FreeRTOSConfig.h deleted file mode 100644 index 568b27a18..000000000 --- a/examples/device/hid_composite_freertos/src/FreeRTOSConfig.h +++ /dev/null @@ -1,182 +0,0 @@ -/* - * FreeRTOS Kernel V10.0.0 - * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. If you wish to use our Amazon - * FreeRTOS name, please do so in a fair use way that does not cause confusion. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos - * - * 1 tab == 4 spaces! - */ - - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. - * - * See http://www.freertos.org/a00110.html. - *----------------------------------------------------------*/ - -// Include MCU header -#include "bsp/board_mcu.h" - -extern uint32_t SystemCoreClock; - -/* Cortex M23/M33 port configuration. */ -#define configENABLE_MPU 0 -#define configENABLE_FPU 1 -#define configENABLE_TRUSTZONE 0 -#define configMINIMAL_SECURE_STACK_SIZE ( 1024 ) - -#define configUSE_PREEMPTION 1 -#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 -#define configCPU_CLOCK_HZ SystemCoreClock -#define configTICK_RATE_HZ ( 1000 ) -#define configMAX_PRIORITIES ( 5 ) -#define configMINIMAL_STACK_SIZE ( 128 ) -#define configTOTAL_HEAP_SIZE ( 0*1024 ) // dynamic is not used -#define configMAX_TASK_NAME_LEN 16 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 1 -#define configUSE_MUTEXES 1 -#define configUSE_RECURSIVE_MUTEXES 1 -#define configUSE_COUNTING_SEMAPHORES 1 -#define configQUEUE_REGISTRY_SIZE 2 -#define configUSE_QUEUE_SETS 0 -#define configUSE_TIME_SLICING 0 -#define configUSE_NEWLIB_REENTRANT 0 -#define configENABLE_BACKWARD_COMPATIBILITY 1 -#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 - -#define configSUPPORT_STATIC_ALLOCATION 1 -#define configSUPPORT_DYNAMIC_ALLOCATION 0 - -/* Hook function related definitions. */ -#define configUSE_IDLE_HOOK 0 -#define configUSE_TICK_HOOK 0 -#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning -#define configCHECK_FOR_STACK_OVERFLOW 2 - -/* Run time and task stats gathering related definitions. */ -#define configGENERATE_RUN_TIME_STATS 0 -#define configUSE_TRACE_FACILITY 1 // legacy trace -#define configUSE_STATS_FORMATTING_FUNCTIONS 0 - -/* Co-routine definitions. */ -#define configUSE_CO_ROUTINES 0 -#define configMAX_CO_ROUTINE_PRIORITIES 2 - -/* Software timer related definitions. */ -#define configUSE_TIMERS 1 -#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2) -#define configTIMER_QUEUE_LENGTH 32 -#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE - -/* Optional functions - most linkers will remove unused functions anyway. */ -#define INCLUDE_vTaskPrioritySet 0 -#define INCLUDE_uxTaskPriorityGet 0 -#define INCLUDE_vTaskDelete 0 -#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY -#define INCLUDE_xResumeFromISR 0 -#define INCLUDE_vTaskDelayUntil 1 -#define INCLUDE_vTaskDelay 1 -#define INCLUDE_xTaskGetSchedulerState 0 -#define INCLUDE_xTaskGetCurrentTaskHandle 0 -#define INCLUDE_uxTaskGetStackHighWaterMark 0 -#define INCLUDE_xTaskGetIdleTaskHandle 0 -#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 -#define INCLUDE_pcTaskGetTaskName 0 -#define INCLUDE_eTaskGetState 0 -#define INCLUDE_xEventGroupSetBitFromISR 0 -#define INCLUDE_xTimerPendFunctionCall 0 - -/* Define to trap errors during development. */ -// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7 -#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) - #define configASSERT(_exp) \ - do {\ - if ( !(_exp) ) { \ - volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ - if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \ - taskDISABLE_INTERRUPTS(); \ - __asm("BKPT #0\n"); \ - }\ - }\ - } while(0) -#else - #define configASSERT( x ) -#endif - -#ifdef __RX__ -/* Renesas RX series */ -#define vSoftwareInterruptISR INT_Excep_ICU_SWINT -#define vTickISR INT_Excep_CMT0_CMI0 -#define configPERIPHERAL_CLOCK_HZ (configCPU_CLOCK_HZ/2) -#define configKERNEL_INTERRUPT_PRIORITY 1 -#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 - -#else - -/* FreeRTOS hooks to NVIC vectors */ -#define xPortPendSVHandler PendSV_Handler -#define xPortSysTickHandler SysTick_Handler -#define vPortSVCHandler SVC_Handler - -//--------------------------------------------------------------------+ -// Interrupt nesting behavior configuration. -//--------------------------------------------------------------------+ -#if defined(__NVIC_PRIO_BITS) - // For Cortex-M specific: __NVIC_PRIO_BITS is defined in core_cmx.h - #define configPRIO_BITS __NVIC_PRIO_BITS -#elif defined(__ECLIC_INTCTLBITS) - // RISC-V Bumblebee core from nuclei - #define configPRIO_BITS __ECLIC_INTCTLBITS -#else - #error "FreeRTOS configPRIO_BITS to be defined" -#endif - -/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ -#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<DHCSR */ \ + if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \ + taskDISABLE_INTERRUPTS(); \ + __asm("BKPT #0\n"); \ + }\ + }\ + } while(0) +#else + #define configASSERT( x ) +#endif + +#ifdef __RX__ +/* Renesas RX series */ +#define vSoftwareInterruptISR INT_Excep_ICU_SWINT +#define vTickISR INT_Excep_CMT0_CMI0 +#define configPERIPHERAL_CLOCK_HZ (configCPU_CLOCK_HZ/2) +#define configKERNEL_INTERRUPT_PRIORITY 1 +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4 + +#else + +/* FreeRTOS hooks to NVIC vectors */ +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler +#define vPortSVCHandler SVC_Handler + +//--------------------------------------------------------------------+ +// Interrupt nesting behavior configuration. +//--------------------------------------------------------------------+ +#if defined(__NVIC_PRIO_BITS) + // For Cortex-M specific: __NVIC_PRIO_BITS is defined in core_cmx.h + #define configPRIO_BITS __NVIC_PRIO_BITS +#elif defined(__ECLIC_INTCTLBITS) + // RISC-V Bumblebee core from nuclei + #define configPRIO_BITS __ECLIC_INTCTLBITS +#else + #error "FreeRTOS configPRIO_BITS to be defined" +#endif + +/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1< #include -#include "FreeRTOS.h" -#include "task.h" -#include "timers.h" -#include "queue.h" -#include "semphr.h" - #include "bsp/board.h" #include "tusb.h" - #include "usb_descriptors.h" +// FreeRTOS headers, MCUs such as esp32sx requires "freertos/" prefix in include path. +// CFG_TUSB_OS_INC_PATH should be defined accordingly. +#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,FreeRTOS.h) +#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,semphr.h) +#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,queue.h) +#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,task.h) +#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,timers.h) + //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF PROTYPES //--------------------------------------------------------------------+ @@ -96,7 +97,7 @@ int main(void) (void) xTaskCreateStatic( hid_task, "hid", HID_STACK_SZIE, NULL, configMAX_PRIORITIES-2, hid_stack, &hid_taskdef); // skip starting scheduler (and return) for ESP32-S2 or ESP32-S3 -#if CFG_TUSB_MCU != OPT_MCU_ESP32S2 && CFG_TUSB_MCU != OPT_MCU_ESP32S3 +#if !( TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3) ) vTaskStartScheduler(); #endif diff --git a/examples/device/hid_composite_freertos/src/tusb_config.h b/examples/device/hid_composite_freertos/src/tusb_config.h index 4fbccc294..b061dce3f 100644 --- a/examples/device/hid_composite_freertos/src/tusb_config.h +++ b/examples/device/hid_composite_freertos/src/tusb_config.h @@ -67,6 +67,12 @@ // This examples use FreeRTOS #define CFG_TUSB_OS OPT_OS_FREERTOS +// Espressif IDF requires "freertos/" prefix in include path +#if TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3) + #define CFG_TUSB_OS_INC_PATH freertos/ +#endif + + #ifndef CFG_TUSB_DEBUG #define CFG_TUSB_DEBUG 0 #endif diff --git a/hw/bsp/esp32s2/boards/CMakeLists.txt b/hw/bsp/esp32s2/boards/CMakeLists.txt index 71753012b..c3c687a70 100644 --- a/hw/bsp/esp32s2/boards/CMakeLists.txt +++ b/hw/bsp/esp32s2/boards/CMakeLists.txt @@ -6,9 +6,7 @@ idf_component_register(SRCS esp32s2.c # Apply board specific content include("${BOARD}/board.cmake") -idf_component_get_property( FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PATH) target_include_directories(${COMPONENT_TARGET} PUBLIC - "${FREERTOS_ORIG_INCLUDE_PATH}" "${TOP}/hw" "${TOP}/src" ) diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index d3adbbc2d..3e85939b0 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -32,6 +32,7 @@ #ifndef _TUSB_COMPILER_H_ #define _TUSB_COMPILER_H_ +#define TU_TOKEN(x) x #define TU_STRING(x) #x ///< stringify without expand #define TU_XSTRING(x) TU_STRING(x) ///< expand then stringify @@ -41,6 +42,8 @@ #define TU_XSTRCAT(a, b) TU_STRCAT(a, b) ///< expand then concat #define TU_XSTRCAT3(a, b, c) TU_STRCAT3(a, b, c) ///< expand then concat 3 tokens +#define TU_INCLUDE_PATH(_dir,_file) TU_XSTRING( TU_TOKEN(_dir)TU_TOKEN(_file) ) + #if defined __COUNTER__ && __COUNTER__ != __COUNTER__ #define _TU_COUNTER_ __COUNTER__ #else diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h index 66070c273..4573e01f5 100644 --- a/src/osal/osal_freertos.h +++ b/src/osal/osal_freertos.h @@ -28,10 +28,10 @@ #define _TUSB_OSAL_FREERTOS_H_ // FreeRTOS Headers -#include "FreeRTOS.h" -#include "semphr.h" -#include "queue.h" -#include "task.h" +#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,FreeRTOS.h) +#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,semphr.h) +#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,queue.h) +#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,task.h) #ifdef __cplusplus extern "C" { diff --git a/src/tusb_option.h b/src/tusb_option.h index a00f3489f..ad2a26a66 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -203,14 +203,20 @@ #define CFG_TUSB_MEM_SECTION #endif +// alignment requirement of buffer used for endpoint transferring #ifndef CFG_TUSB_MEM_ALIGN #define CFG_TUSB_MEM_ALIGN TU_ATTR_ALIGNED(4) #endif +// OS selection #ifndef CFG_TUSB_OS #define CFG_TUSB_OS OPT_OS_NONE #endif +#ifndef CFG_TUSB_OS_INC_PATH + #define CFG_TUSB_OS_INC_PATH +#endif + //-------------------------------------------------------------------- // DEVICE OPTIONS //-------------------------------------------------------------------- -- cgit v1.3.1 From 033d6b28fff1644411ef430a968ca7f0d9aa3b05 Mon Sep 17 00:00:00 2001 From: kkitayam <45088311+kkitayam@users.noreply.github.com> Date: Sun, 25 Jul 2021 14:01:35 +0900 Subject: moved ISO attributes from audio to common --- examples/rules.mk | 1 + src/class/audio/audio.h | 12 - src/class/video/video.h | 85 +++++- src/class/video/video_device.c | 634 +++++++++++++++++++++++++++++------------ src/class/video/video_device.h | 7 +- src/common/tusb_types.h | 12 + 6 files changed, 535 insertions(+), 216 deletions(-) (limited to 'src/common') diff --git a/examples/rules.mk b/examples/rules.mk index 861973284..6f2d5a0ee 100644 --- a/examples/rules.mk +++ b/examples/rules.mk @@ -35,6 +35,7 @@ SRC_C += \ src/class/msc/msc_device.c \ src/class/net/net_device.c \ src/class/usbtmc/usbtmc_device.c \ + src/class/video/video_device.c \ src/class/vendor/vendor_device.c # TinyUSB stack include diff --git a/src/class/audio/audio.h b/src/class/audio/audio.h index f99061eae..6f9c1a6b5 100644 --- a/src/class/audio/audio.h +++ b/src/class/audio/audio.h @@ -494,18 +494,6 @@ typedef enum /// All remaining definitions are taken from the descriptor descriptions in the UAC2 main specification -/// Isochronous End Point Attributes -typedef enum -{ - TUSB_ISO_EP_ATT_NO_SYNC = 0x00, - TUSB_ISO_EP_ATT_ASYNCHRONOUS = 0x04, - TUSB_ISO_EP_ATT_ADAPTIVE = 0x08, - TUSB_ISO_EP_ATT_SYNCHRONOUS = 0x0C, - TUSB_ISO_EP_ATT_DATA = 0x00, ///< Data End Point - TUSB_ISO_EP_ATT_EXPLICIT_FB = 0x10, ///< Feedback End Point - TUSB_ISO_EP_ATT_IMPLICIT_FB = 0x20, ///< Data endpoint that also serves as an implicit feedback -} tusb_iso_ep_attribute_t; - /// Audio Class-Control Values UAC2 typedef enum { diff --git a/src/class/video/video.h b/src/class/video/video.h index f994c7fed..081860c83 100644 --- a/src/class/video/video.h +++ b/src/class/video/video.h @@ -29,6 +29,20 @@ #include "common/tusb_common.h" +/* 4.2.1.2 */ +typedef enum { + VIDEO_NO_ERROR = 0, /* The request succeeded. */ + VIDEO_NOT_READY, + VIDEO_WRONG_STATE, + VIDEO_POWER, + VIDEO_OUT_OF_RANGE, + VIDEO_INVALID_UNIT, + VIDEO_INVALID_CONTROL, + VIDEO_INVALID_REQUEST, + VIDEO_INVALID_VALUE_WITHIN_RANGE, + VIDEO_UNKNOWN = 0xFF, +} video_error_code_t; + /* A.2 */ typedef enum { VIDEO_SUBCLASS_UNDEFINED = 0x00, @@ -103,14 +117,29 @@ typedef enum VIDEO_REQUEST_GET_DEF_ALL = 0x97 } video_control_request_t; -/* A.9 */ +/* A.9.1 */ typedef enum { - VIDEO_CTL_SEL_UNDEF = 0x00, - VIDEO_CTL_SEL_VIDEO_POWER_MODE_CONTROL, - VIDEO_CTL_SEL_REQUEST_ERROR_CODE_CONTROL, + VIDEO_VC_CTL_UNDEF = 0x00, + VIDEO_VC_CTL_VIDEO_POWER_MODE, + VIDEO_VC_CTL_REQUEST_ERROR_CODE, } video_interface_control_selector_t; +/* A.9.8 */ +typedef enum +{ + VIDEO_VS_CTL_UNDEF = 0x00, + VIDEO_VS_CTL_PROBE, + VIDEO_VS_CTL_COMMIT, + VIDEO_VS_CTL_STILL_PROBE, + VIDEO_VS_CTL_STILL_COMMIT, + VIDEO_VS_CTL_STILL_IMAGE_TRIGGER, + VIDEO_VS_CTL_STREAM_ERROR_CODE, + VIDEO_VS_CTL_GENERATE_KEY_FRAME, + VIDEO_VS_CTL_UPDATE_FRAME_SEGMENT, + VIDEO_VS_CTL_SYNCH_DELAY_CONTROL, +} video_interface_streaming_selector_t; + /* B. Terminal Types */ typedef enum { @@ -193,8 +222,37 @@ typedef struct TU_ATTR_PACKED { uint8_t bControlSize; uint8_t bmaControls[]; } output; + }; } tusb_desc_cs_video_stm_itf_hdr_t; +//--------------------------------------------------------------------+ +// Requests +//--------------------------------------------------------------------+ +typedef struct TU_ATTR_PACKED { + uint16_t bmHint; + uint8_t bFormatIndex; + uint8_t bFrameIndex; + uint32_t dwFrameInterval; + uint16_t wKeyFrameRate; + uint16_t wPFrameRate; + uint16_t wCompQuality; + uint16_t wCompWindowSize; + uint16_t wDelay; + uint32_t dwMaxVideoFrameSize; + uint32_t dwMaxPayloadTransferSize; + uint32_t dwClockFrequency; + uint8_t bmFramingInfo; + uint8_t bPreferedVersion; + uint8_t bMinVersion; + uint8_t bMaxVersion; + uint8_t bUsage; + uint8_t bBitDepthLum; + uint8_t bmSettings; + uint8_t bMaxNumberOfRefFramesPlus1; + uint16_t bmRateControlModes; + uint64_t bmLayoutPerStream; +} video_probe_and_commit_t; + #define TUD_VIDEO_DESC_IAD_LEN 8 #define TUD_VIDEO_DESC_STD_VC_LEN 9 #define TUD_VIDEO_DESC_CS_VC_LEN 12 @@ -225,18 +283,18 @@ typedef struct TU_ATTR_PACKED { /* 3.7.2 */ #define TUD_VIDEO_DESC_CS_VC(_bcdUVC, _totallen, _clkfreq, _coll, ...) \ TUD_VIDEO_DESC_CS_VC_LEN + _coll, TUSB_DESC_CS_INTERFACE, VIDEO_CS_VC_INTERFACE_HEADER, \ - U16_TO_U8S_LE(_bcdUVC), U16_TO_U8S_LE(_totallen + TUD_VIDEO_DESC_CS_AC_LEN), \ + U16_TO_U8S_LE(_bcdUVC), U16_TO_U8S_LE(_totallen + TUD_VIDEO_DESC_CS_VC_LEN), \ U32_TO_U8S_LE(_clkfreq), _coll, __VA_ARGS__ /* 3.7.2.1 */ #define TUD_VIDEO_DESC_INPUT_TERM(_tid, _tt, _at, _stridx) \ TUD_VIDEO_DESC_INPUT_TERM_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_VC_INTERFACE_INPUT_TERMINAL, \ - _tid, U16_TO_U8S_LE(_tt), _at, _ti + _tid, U16_TO_U8S_LE(_tt), _at, _stridx /* 3.7.2.2 */ #define TUD_VIDEO_DESC_OUTPUT_TERM(_tid, _tt, _at, _srcid, _stridx) \ TUD_VIDEO_DESC_INPUT_TERM_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_VC_INTERFACE_OUTPUT_TERMINAL, \ - _tid, U16_TO_U8S_LE(_tt), _at, _ti + _tid, U16_TO_U8S_LE(_tt), _at, _stridx /* 3.9.1 */ #define TUD_VIDEO_DESC_STD_VS(_itfnum, _alt, _epn, _stridx) \ @@ -258,14 +316,15 @@ typedef struct TU_ATTR_PACKED { _epn, _inf, _termlnk, _trgusg, _ctlsz, __VA_ARGS__ /* Uncompressed 3.1.1 */ +#define TUD_VIDEO_GUID(_g0,_g1,_g2,_g3,_g4,_g5,_g6,_g7,_g8,_g9,_g10,_g11,_g12,_g13,_g14,_g15) _g0,_g1,_g2,_g3,_g4,_g5,_g6,_g7,_g8,_g9,_g10,_g11,_g12,_g13,_g14,_g15 #define TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR(_fmtidx, _numfrmdesc, \ - _g0,_g1,_g2,_g3,_g4,_g5,_g6,_g7,_g8,_g9,_g10,_g11,_g12,_g13,_g14,_g15, \ - _bitsperpix, _frmidx, _asrx, _asry, _interlace, _cp) \ + _guid, _bitsperpix, _frmidx, _asrx, _asry, _interlace, _cp) \ TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_VS_INTERFACE_FORMAT_UNCOMPRESSED, \ - _fmtidx, _numfrmdesc,\ - _g0,_g1,_g2,_g3,_g4,_g5,_g6,_g7,_g8,_g9,_g10,_g11,_g12,_g13,_g14,_g15,\ + _fmtidx, _numfrmdesc, TUD_VIDEO_GUID(_guid), \ _bitsperpix, _frmidx, _asrx, _asry, _interlace, _cp +// _g0,_g1,_g2,_g3,_g4,_g5,_g6,_g7,_g8,_g9,_g10,_g11,_g12,_g13,_g14,_g15, + /* Uncompressed 3.1.2 Table 3-3 */ #define TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT(_frmidx, _cap, _width, _height, _minbr, _maxbr, _maxfrmbufsz, _frminterval, _minfrminterval, _maxfrminterval, _frmintervalstep) \ TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_VS_INTERFACE_FRAME_UNCOMPRESSED, \ @@ -281,12 +340,12 @@ typedef struct TU_ATTR_PACKED { U32_TO_U8S_LE(_maxfrmbufsz), U32_TO_U8S_LE(_frminterval), _numfrminterval, __VA_ARGS__ /* 3.10.1.1 */ -#define TUD_VIDEO_DESC_EP_ISO(_ep, _epsize, _ep_interval) +#define TUD_VIDEO_DESC_EP_ISO(_ep, _epsize, _ep_interval) \ 7, TUSB_DESC_ENDPOINT, _ep, TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS,\ U16_TO_U8S_LE(_epsize), _ep_interval /* 3.10.1.2 */ -#define TUD_VIDEO_DESC_EP_BULK(_ep, _epsize, _ep_interval) +#define TUD_VIDEO_DESC_EP_BULK(_ep, _epsize, _ep_interval) \ 7, TUSB_DESC_ENDPOINT, _ep, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), _ep_interval #endif diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index 637e7a127..ed703d79a 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -53,33 +53,32 @@ typedef struct { tusb_desc_cs_video_stm_itf_hdr_t stm; } tusb_desc_vs_itf_t; +typedef union { + tusb_desc_cs_video_ctl_itf_hdr_t ctl; + tusb_desc_cs_video_stm_itf_hdr_t stm; +} tusb_desc_video_itf_hdr_t; + typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; uint8_t bDescriptorSubtype; - union { - uint8_t bId; - uint8_t bTerminalId; - uint8_t bUnitId; - }; + uint8_t bEntityId; } tusb_desc_cs_video_entity_itf_t; typedef struct { - void const *beg; - void const *end; - tusb_desc_vc_itf_t const *vc; /* current video control interface */ - tusb_desc_vs_itf_t const *vs[2]; /* current video streaming interfaces */ - uint8_t ep_notif; /* notification */ - uint8_t ep_in; /* video IN */ - uint8_t ep_sti; /* still image IN */ - uint8_t ep_out; /* video OUT */ + void const *beg; /* The head of the first video control interface descriptor */ + uint16_t len; /* Byte length of the descriptors */ + uint16_t ofs[3]; /* offsets for video control/streaming interface. 0:control 1:streaming 2:streaming */ + uint8_t power_mode; + uint8_t error_code; /*------------- From this point, data is not cleared by bus reset -------------*/ // Endpoint Transfer buffer - CFG_TUSB_MEM_ALIGN uint8_t epout_buf[CFG_TUD_CDC_EP_BUFSIZE]; - CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_CDC_EP_BUFSIZE]; + // CFG_TUSB_MEM_ALIGN uint8_t epout_buf[CFG_TUD_CDC_EP_BUFSIZE]; + // CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_CDC_EP_BUFSIZE]; + uint8_t ctl_buf; } videod_interface_t; @@ -90,6 +89,26 @@ typedef struct //--------------------------------------------------------------------+ CFG_TUSB_MEM_SECTION static videod_interface_t _videod_itf[CFG_TUD_VIDEO]; +static uint8_t const _cap_get = 0x1u; /* support for GET */ +static uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */ + +static tusb_desc_vc_itf_t const* _get_desc_vc(videod_interface_t const *self) +{ + return (tusb_desc_vc_itf_t const *)(self->beg + self->ofs[0]); +} + +static uint16_t* _get_desc_ofs(videod_interface_t *self, unsigned itfnum) +{ + void const *beg = self->beg; + uint16_t *ofs = self->ofs; + for (unsigned i = 1; i < sizeof(self->ofs)/sizeof(self->ofs[0]); ++i) { + if (!ofs[i]) continue; + tusb_desc_interface_t const* itf = (tusb_desc_interface_t const*)(beg + ofs[i]); + if (itfnum == itf->bInterfaceNumber) return &ofs[i]; + } + return NULL; +} + /** Find the first descriptor with the specified descriptor type. * * @param[in] beg The head of descriptor byte array. @@ -98,51 +117,47 @@ CFG_TUSB_MEM_SECTION static videod_interface_t _videod_itf[CFG_TUD_VIDEO]; * * @return The pointer for interface descriptor. * @retval end did not found interface descriptor */ -static void const* videod_find_desc(void const *beg, void const *end, uint8_t target) +static void const* _find_desc(void const *beg, void const *end, uint8_t target) { - for (void const *cur = beg; cur < end; cur = tu_desc_next(cur)) { - if (target != tu_desc_type(cur)) - return (uint8_t const*)cur; + void const *cur = beg; + while ((cur < end) && (target != tu_desc_type(cur))) { + cur = tu_desc_next(cur); } - return end; + return cur; } -/** Find the first interface descriptor with the specified interface number and alternate setting number. +/** Return the next interface descriptor except alternate ones. * * @param[in] beg The head of descriptor byte array. * @param[in] end The tail of descriptor byte array. - * @param[in] itfnum The target interface number. - * @param[in] altnum The target alternate setting number. * * @return The pointer for interface descriptor. * @retval end did not found interface descriptor */ -static void const* videod_find_desc_itf(void const *beg, void const *end, unsigned itfnum, unsigned altnum) +static void const* _next_desc_itf(void const *beg, void const *end) { - for (void const *cur = beg; cur < end; cur = videod_find_desc(cur, end, TUSB_DESC_INTERFACE)) { - tusb_desc_interface_t const *itf = (tusb_desc_interface_t const *)cur; - if (itf->bInterfaceNumber == itfnum && itf->bAlternateSettings == altnum) { - return itf; - } - cur = tu_desc_next(cur); + void const *cur = beg; + unsigned itfnum = ((tusb_desc_interface_t const*)cur)->bInterfaceNumber; + while ((cur < end) && + (itfnum == ((tusb_desc_interface_t const*)cur)->bInterfaceNumber)) { + cur = _find_desc(tu_desc_next(cur), end, TUSB_DESC_INTERFACE); } - return end; + return cur; } -/** Find the first input or output terminal descriptor with the specified terminal id. +/** Find the first interface descriptor with the specified interface number and alternate setting number. * * @param[in] beg The head of descriptor byte array. * @param[in] end The tail of descriptor byte array. - * @param[in] termid The target terminal id. + * @param[in] itfnum The target interface number. + * @param[in] altnum The target alternate setting number. * * @return The pointer for interface descriptor. * @retval end did not found interface descriptor */ -static void const* videod_find_desc_term(void const *beg, void const *end, unsigned termid) +static void const* _find_desc_itf(void const *beg, void const *end, unsigned itfnum, unsigned altnum) { - for (void const *cur = beg; cur < end; cur = videod_find_desc(cur, end, TUSB_DESC_CS_INTERFACE)) { - tusb_desc_cs_video_entity_itf_t const *itf = (tusb_desc_cs_video_entity_itf_t const *)cur; - if ((VIDEO_CS_VC_INTERFACE_INPUT_TERMINAL == itf->bDescriptorSubtype || - VIDEO_CS_VC_INTERFACE_OUTPUT_TERMINAL == itf->bDescriptorSubtype) && - itf->bTerminalId == termid) { + for (void const *cur = beg; cur < end; cur = _find_desc(cur, end, TUSB_DESC_INTERFACE)) { + tusb_desc_interface_t const *itf = (tusb_desc_interface_t const *)cur; + if (itf->bInterfaceNumber == itfnum && itf->bAlternateSetting == altnum) { return itf; } cur = tu_desc_next(cur); @@ -150,21 +165,22 @@ static void const* videod_find_desc_term(void const *beg, void const *end, unsig return end; } -/** Find the first selector/processing/extension/encoding unit descriptor with the specified unit id. +/** Find the first entity descriptor with the specified entity ID in the video control interface descriptor. * - * @param[in] beg The head of descriptor byte array. - * @param[in] end The tail of descriptor byte array. - * @param[in] unitid The target unit id. + * @param[in] vc The video control interface descriptor. + * @param[in] entityid The target entity id. * * @return The pointer for interface descriptor. * @retval end did not found interface descriptor */ -static void const* videod_find_desc_unit(void const *beg, void const *end, unsigned unitid) +static void const* _find_desc_entity(tusb_desc_vc_itf_t const *vc, unsigned entityid) { - for (void const *cur = beg; cur < end; cur = videod_find_desc(cur, end, TUSB_DESC_CS_INTERFACE)) { + void const *beg = (void const*)vc; + void const *end = beg + vc->std.bLength + vc->ctl.bLength + vc->ctl.wTotalLength; + for (void const *cur = beg; cur < end; cur = _find_desc(cur, end, TUSB_DESC_CS_INTERFACE)) { tusb_desc_cs_video_entity_itf_t const *itf = (tusb_desc_cs_video_entity_itf_t const *)cur; - if (VIDEO_CS_VC_INTERFACE_SELECTOR_UNIT <= itf->bDescriptorSubtype && - itf->bDescriptorSubtype <= VIDEO_CS_VC_INTERFACE_ENCODING_UNIT && - itf->bUnitId == unitid) { + if ((VIDEO_CS_VC_INTERFACE_INPUT_TERMINAL == itf->bDescriptorSubtype || + VIDEO_CS_VC_INTERFACE_OUTPUT_TERMINAL == itf->bDescriptorSubtype) && + itf->bEntityId == entityid) { return itf; } cur = tu_desc_next(cur); @@ -172,25 +188,72 @@ static void const* videod_find_desc_unit(void const *beg, void const *end, unsig return end; } +static bool _close_vc_itf(uint8_t rhport, videod_interface_t *self) +{ + tusb_desc_vc_itf_t const *vc = _get_desc_vc(self); + /* The next descriptor after the class-specific VC interface header descriptor. */ + void const *cur = (void const*)vc + vc->std.bLength + vc->ctl.bLength; + /* The end of the video control interface descriptor. */ + void const *end = cur + vc->ctl.wTotalLength; + if (vc->std.bNumEndpoints) { + /* Find the notification endpoint descriptor. */ + cur = _find_desc(cur, end, TUSB_DESC_ENDPOINT); + TU_ASSERT(cur < end); + tusb_desc_endpoint_t const *notif = (tusb_desc_endpoint_t const *)cur; + usbd_edpt_close(rhport, notif->bEndpointAddress); + } + self->ofs[0] = 0; + return true; +} + +static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, unsigned altnum) +{ + void const *beg = self->beg; + void const *end = beg + self->len; + /* The first descriptor is a video control interface descriptor. */ + unsigned itfnum = ((tusb_desc_interface_t const *)beg)->bInterfaceNumber; + void const *cur = _find_desc_itf(beg, end, itfnum, altnum); + TU_VERIFY(cur < end); + + tusb_desc_vc_itf_t const *vc = (tusb_desc_vc_itf_t const *)cur; + /* Support for up to 2 streaming interfaces only. */ + TU_ASSERT(vc->ctl.bInCollection < 3); + + /* Advance to the next descriptor after the class-specific VC interface header descriptor. */ + cur += vc->std.bLength + vc->ctl.bLength; + /* Update to point the end of the video control interface descriptor. */ + end = cur + vc->ctl.wTotalLength; + /* Open the notification endpoint if it exist. */ + if (vc->std.bNumEndpoints) { + /* Support for 1 endpoint only. */ + TU_VERIFY(1 == vc->std.bNumEndpoints); + /* Find the notification endpoint descriptor. */ + cur = _find_desc(cur, end, TUSB_DESC_ENDPOINT); + TU_VERIFY(cur < end); + tusb_desc_endpoint_t const *notif = (tusb_desc_endpoint_t const *)cur; + /* Open the notification endpoint */ + TU_ASSERT(usbd_edpt_open(rhport, notif)); + } + self->ofs[0] = (void const*)vc - beg; + return true; +} + /** Set the specified alternate setting to own video control interface. * * @param[in,out] self The context. - * @param[in] altnum The target alternate setting number. - * - * @return The next descriptor after the video control interface descriptor. - * @retval NULL did not found interface descriptor or alternate setting */ -static void const* videod_set_vc_itf(videod_interface_t *self, unsigned altnum) + * @param[in] altnum The target alternate setting number. */ +static bool _set_vc_itf(uint8_t rhport, videod_interface_t *self, unsigned altnum) { void const *beg = self->beg; - void const *end = self->end; + void const *end = beg + self->len; /* The head descriptor is a video control interface descriptor. */ unsigned itfnum = ((tusb_desc_interface_t const *)beg)->bInterfaceNumber; - void const *cur = videod_find_desc_itf(beg, end, itfnum, altnum); - TU_VERIFY(cur < end, NULL); + void const *cur = _find_desc_itf(beg, end, itfnum, altnum); + TU_VERIFY(cur < end); tusb_desc_vc_itf_t const *vc = (tusb_desc_vc_itf_t const *)cur; /* Support for up to 2 streaming interfaces only. */ - TU_VERIFY(vc->ctl.bInCollection < 3, NULL); + TU_VERIFY(vc->ctl.bInCollection < 3); /* Close the previous notification endpoint if it is opened */ if (self->ep_notif) { @@ -204,42 +267,104 @@ static void const* videod_set_vc_itf(videod_interface_t *self, unsigned altnum) /* Open the notification endpoint if it exist. */ if (vc->std.bNumEndpoints) { /* Support for 1 endpoint only. */ - TU_VERIFY(1 == vc->std.bNumEndpoints, NULL); + TU_VERIFY(1 == vc->std.bNumEndpoints); /* Find the notification endpoint descriptor. */ - cur = videod_find_desc(cur, end, TUSB_DESC_ENDPOINT); - TU_VERIFY(cur < end, NULL); + cur = _find_desc(cur, end, TUSB_DESC_ENDPOINT); + TU_VERIFY(cur < end); tusb_desc_endpoint_t const *notif = (tusb_desc_endpoint_t const *)cur; /* Open the notification endpoint */ - TU_ASSERT(usbd_edpt_open(rhport, notif), NULL); + TU_ASSERT(usbd_edpt_open(rhport, notif)); self->ep_notif = notif->bEndpointAddress; } - self->vc = vc; - return end; + self->ofs[0] = (void const*)vc - beg; + return true; +} + +/** Set the specified alternate setting to own video control interface. + * + * @param[in,out] self The context. + * @param[in] itfnum The target interface number. */ +static bool _close_vs_itf(uint8_t rhport, videod_interface_t *self, unsigned itfnum) +{ + uint16_t *ofs = _get_desc_ofs(self, itfnum); + if (!ofs) return true; + tusb_desc_vs_itf_t const *vs = (tusb_desc_vs_itf_t const*)(self->beg + *ofs); + /* The next of the video streaming interface header descriptor. */ + void const *cur = (void const*)vs + vs->std.bLength + vs->stm.bLength; + /* The end of the video streaming interface descriptor. */ + void const *end = cur + vs->stm.wTotalLength; + if (unsigned i = 0; i < vs->std.bNumEndpoints; ++i) { + cur = _find_desc(cur, end, TUSB_DESC_ENDPOINT); + TU_ASSERT(cur < end); + tusb_desc_endpoint_t const *ep = (tusb_desc_endpoint_t const *)cur; + usbd_edpt_close(rhport, ep->bEndpointAddress); + cur += tu_desc_len(cur); + } + *ofs = 0; + return true; } /** Set the specified alternate setting to own video control interface. * * @param[in,out] self The context. * @param[in] itfnum The target interface number. - * @param[in] altnum The target alternate setting number. + * @param[in] altnum The target alternate setting number. */ +static bool _open_vs_itf(uint8_t rhport, videod_interface_t *self, unsigned itfnum, unsigned altnum) +{ + uint16_t *ofs = NULL; + for (unsigned i = 1; i < sizeof(self->ofs)/sizeof(self->ofs[0]); ++i) { + if (!self->ofs[i]) { + ofs = &self->ofs[i]; + break; + } + } + if (!ofs) return false; + + tusb_desc_vc_itf_t const *vc = _get_desc_vc(self); + void const *end = self->beg + self->len; + /* Set the end of the video control interface descriptor. */ + void const *cur = (void const*)vc + vc->std.bLength + vc->ctl.bLength + vc->ctl.wTotalLength; + + cur = _find_desc_itf(cur, end, itfnum, altnum); + TU_VERIFY(cur < end); + tusb_desc_vs_itf_t const *vs = (tusb_desc_vs_itf_t const*)cur; + /* Support for up to 2 endpoint only. */ + TU_ASSERT(vs->std.bNumEndpoints < 3); + /* Advance to the next descriptor after the class-specific VS interface header descriptor. */ + cur += vs->std.bLength + vs->stm.bLength; + /* Update to point the end of the video control interface descriptor. */ + end = cur + vs->stm.wTotalLength; + for (unsigned i = 0; i < vs->std.bNumEndpoints; ++i) { + cur = _find_desc(cur, end, TUSB_DESC_ENDPOINT); + TU_VERIFY(cur < end); + tusb_desc_endpoint_t const *ep = (tusb_desc_endpoint_t const *)cur; + TU_ASSERT(usbd_edpt_open(rhport, ep)); + cur += tu_desc_len(cur); + } + *ofs = (void const*)vs - self->beg; + return true; +} + +/** Set the specified alternate setting to own video control interface. * - * @return The next descriptor after the video control interface descriptor. - * @retval NULL did not found interface descriptor or alternate setting */ -static void const* videod_set_vs_itf(videod_interface_t *self, unsigned itfnum, unsigned altnum) + * @param[in,out] self The context. + * @param[in] itfnum The target interface number. + * @param[in] altnum The target alternate setting number. */ +static bool _set_vs_itf(uint8_t rhport, videod_interface_t *self, unsigned itfnum, unsigned altnum) { unsigned i; - tusb_desc_vc_itf_t const *vc = self->vc; - void const *end = self->end; + tusb_desc_vc_itf_t const *vc = _get_desc_vc(self); + void const *end = self->beg + self->len; /* Set the end of the video control interface descriptor. */ void const *cur = (void const*)vc + vc->std.bLength + vc->ctl.bLength + vc->ctl.wTotalLength; /* Check itfnum is valid */ - unsigned bInCollection = self->vc->ctl.bInCollection; + unsigned bInCollection = vc->ctl.bInCollection; for (i = 0; (i < bInCollection) && (vc->ctl.baInterfaceNr[i] != itfnum); ++i) ; - TU_VERIFY(i < bInCollection, NULL); - - cur = videod_find_desc_itf(cur, end, itfnum, altnum); - TU_VERIFY(cur < end, NULL); + TU_VERIFY(i < bInCollection); + + cur = _find_desc_itf(cur, end, itfnum, altnum); + TU_VERIFY(cur < end); tusb_desc_vs_itf_t const *vs = (tusb_desc_vs_itf_t const*)cur; /* Advance to the next descriptor after the class-specific VS interface header descriptor. */ cur += vs->std.bLength + vs->stm.bLength; @@ -247,10 +372,10 @@ static void const* videod_set_vs_itf(videod_interface_t *self, unsigned itfnum, end = cur + vs->stm.wTotalLength; switch (vs->stm.bDescriptorSubType) { - default: return end; + default: return false; case VIDEO_CS_VS_INTERFACE_INPUT_HEADER: /* Support for up to 2 endpoint only. */ - TU_VERIFY(vc->std.bNumEndpoints < 3, NULL); + TU_VERIFY(vc->std.bNumEndpoints < 3); if (self->ep_sti) { usbd_edpt_close(rhport, self->ep_sti); self->ep_sti = 0; @@ -260,18 +385,18 @@ static void const* videod_set_vs_itf(videod_interface_t *self, unsigned itfnum, self->ep_in = 0; } if (i = 0; i < vs->std.bNumEndpoints; ++i) { - cur = videod_find_desc(cur, end, TUSB_DESC_ENDPOINT); - TU_VERIFY(cur < end, NULL); + cur = _find_desc(cur, end, TUSB_DESC_ENDPOINT); + TU_VERIFY(cur < end); tusb_desc_endpoint_t const *ep = (tusb_desc_endpoint_t const *)cur; if (vs->stm.bEndpointAddress == ep->bEndpointAddress) { /* video input endpoint */ - TU_ASSERT(!self->ep_in, NULL); - TU_ASSERT(usbd_edpt_open(rhport, ep), NULL); + TU_ASSERT(!self->ep_in); + TU_ASSERT(usbd_edpt_open(rhport, ep)); self->ep_in = ep->bEndpointAddress; } else { /* still image input endpoint */ - TU_ASSERT(!self->ep_sti, NULL); - TU_ASSERT(usbd_edpt_open(rhport, ep), NULL); + TU_ASSERT(!self->ep_sti); + TU_ASSERT(usbd_edpt_open(rhport, ep)); self->ep_sti = ep->bEndpointAddress; } cur += tu_desc_len(cur); @@ -279,78 +404,245 @@ static void const* videod_set_vs_itf(videod_interface_t *self, unsigned itfnum, break; case VIDEO_CS_VS_INTERFACE_OUTPUT_HEADER: /* Support for up to 1 endpoint only. */ - TU_VERIFY(vc->std.bNumEndpoints < 2, NULL); + TU_VERIFY(vc->std.bNumEndpoints < 2); if (self->ep_out) { usbd_edpt_close(rhport, self->ep_out); self->ep_out = 0; } if (vs->std.bNumEndpoints) { - cur = videod_find_desc(cur, end, TUSB_DESC_ENDPOINT); - TU_VERIFY(cur < end, NULL); + cur = _find_desc(cur, end, TUSB_DESC_ENDPOINT); + TU_VERIFY(cur < end); tusb_desc_endpoint_t const *ep = (tusb_desc_endpoint_t const *)cur; if (vs->stm.bEndpointAddress == ep->bEndpointAddress) { /* video output endpoint */ - TU_ASSERT(usbd_edpt_open(rhport, ep), NULL); + TU_ASSERT(usbd_edpt_open(rhport, ep)); self->ep_out = ep->bEndpointAddress; } } break; } + for (unsigned i = 1; i < sizeof(self->ofs)/sizeof(ofs[0]); ++i) { + if (!self->ofs[i]) { + return true; + } + tusb_desc_interface_t const* itf = (tusb_desc_interface_t const*)(beg + ofs[i]); + if (itfnum == itf->bInterfaceNumber) return itf; + } + return NULL; for (i = 0; i < sizeof(self->vs)/sizeof(self->vs[0]); ++i) { if (!self->vs[i] || self->vs[i].stm.bInterfaceNumber == vs->stm.bInterfaceNumber) { - self->vs[i] = vs; - return end; + self->ofs[i] = (void const*)vs - self->beg; + return true; } } - return NULL; + return false; } -static bool videod_get_itf(uint8_t rhport, videod_interface_t *self, tusb_control_request_t const * request) +static int handle_video_ctl_std_req_get_itf(uint8_t rhport, uint8_t stage, tusb_control_request_t const *request, unsigned itf) { - unsigned altnum = tu_u16_low(p_request->wValue); - unsigned itfnum = tu_u16_low(p_request->wLength); - - tusb_desc_vc_itf_t const *vc = self->vc; - if (vc->std.bInterfaceNumber == itfnum) { - tud_control_xfer(rhport, request, &vc->std.bAlternateSettings, sizeof(vc->std.bAlternateSettings)); - return true; - } - for (unsigned i = 0; i < vc->ctl.bInCollection; ++i) { - tusb_desc_vs_itf_t const *vs = self->vs[i]; - if (!vs || vs->std.bInterfaceNumber == itfnum) { - continue; + if (stage != CONTROL_STAGE_SETUP) + return VIDEO_NO_ERROR; + videod_interface_t *self = &_videod_itf[itf]; + TU_VERIFY(1 == request->wLength, VIDEO_UNKNOWN); + tusb_desc_interface_t const *p = _get_desc_cur_itf(self, itfnum); + if (!p) return VIDEO_UNKNOWN; + if (tud_control_xfer(rhport, request, &p->bAlternateSettings, sizeof(p->bAlternateSettings))) + return VIDEO_NO_ERROR; + return VIDEO_UNKNOWN; +} + +/** Handle a standard request to the video control interface. */ +static int handle_video_ctl_std_req(uint8_t rhport, uint8_t stage, tusb_control_request_t const *request, unsigned itf) +{ + switch (p_request->bRequest) { + case TUSB_REQ_GET_INTERFACE: + handle_video_ctl_std_req_get_itf(rhport, stage, request, itf); + case TUSB_REQ_SET_INTERFACE: + if (stage != CONTROL_STAGE_SETUP) return VIDEO_NO_ERROR; + if (_set_vc_itf(rhport, &_videod_itf[itf], request->wValue)) + return VIDEO_NO_ERROR; + return VIDEO_UNKNOWN; + default: /* Unknown/Unsupported request */ + TU_BREAKPOINT(); + return VIDEO_INVALID_REQUEST; + } +} + +static int handle_video_ctl_cs_req(uint8_t rhport, uint8_t stage, tusb_control_request_t const *request, unsigned itf) +{ + videod_interface_t *self = &_videod_itf[i]; + /* 4.2.1 Interface Control Request */ + switch (TU_U16_HIGH(request->wValue)) { + case VIDEO_VC_CTL_VIDEO_POWER_MODE: + switch (p_request->bRequest) { + case VIDEO_REQUEST_SET_CUR: + if (stage == CONTROL_STAGE_SETUP) { + TU_LOG2(" Set Power Mode\r\n"); + TU_VERIFY(1 == request->wLength, VIDEO_UNKNOWN); + if (!tud_control_xfer(rhport, request, &self->power_mode, sizeof(self->power_mode))) + return VIDEO_UNKNOWN; + } else if (stage == CONTROL_STAGE_ACK) { + if (tud_video_power_mode_cb) return tud_video_power_mode_cb(itf, &self->power_mode); + } + return VIDEO_NO_ERROR; + case VIDEO_REQUEST_GET_CUR: + if (stage == CONTROL_STAGE_SETUP) { + TU_LOG2(" Get Power Mode\r\n"); + TU_VERIFY(1 == request->wLength, VIDEO_UNKNOWN); + if (!tud_control_xfer(rhport, request, &self->power_mode, sizeof(self->power_mode))) + return VIDEO_UNKNOWN; + } + return VIDEO_NO_ERROR; + case VIDEO_REQUEST_GET_INFO: + if (stage == CONTROL_STAGE_SETUP) { + TU_LOG2(" Get Info Power Mode\r\n"); + TU_VERIFY(1 == request->wLength, VIDEO_UNKNOWN); + if (!tud_control_xfer(rhport, request, &_cap_get_set, sizeof(_cap_get_set))) + return VIDEO_UNKNOWN; + } + return VIDEO_NO_ERROR; + default: break; } - tud_control_xfer(rhport, request, &vs->std.bAlternateSettings, sizeof(vs->std.bAlternateSettings)); - return true; + break; + case VIDEO_VC_CTL_REQUEST_ERROR_CODE: + switch (p_request->bRequest) { + case VIDEO_REQUEST_GET_CUR: + if (stage == CONTROL_STAGE_SETUP) { + TU_LOG2(" Get Error Code\r\n"); + if (!tud_control_xfer(rhport, request, &self->error_code, sizeof(self->error_code))) + return VIDEO_UNKNOWN; + } + return VIDEO_NO_ERROR; + case VIDEO_REQUEST_GET_INFO: + if (stage == CONTROL_STAGE_SETUP) { + TU_LOG2(" Get Info Error Code\r\n"); + if (tud_control_xfer(rhport, request, &_cap_get, sizeof(_cap_get))) + return VIDEO_UNKNOWN; + } + return VIDEO_NO_ERROR; + default: break; + } + break; + default: break; } - return false; + /* Unknown/Unsupported request */ + TU_BREAKPOINT(); + return VIDEO_INVALID_REQUEST; } -static bool videod_set_itf(uint8_t rhport, videod_interface_t *self, tusb_control_request_t const * request) +static int handle_video_ctl_req(uint8_t rhport, uint8_t stage, tusb_control_request_t const *request, unsigned itf) { - (void)rhport; - unsigned altnum = tu_u16_low(p_request->wValue); - unsigned itfnum = tu_u16_low(p_request->wLength); + switch (p_request->bmRequestType_bit.type) { + case TUSB_REQ_TYPE_STANDARD: + return handle_video_ctl_std_req(rhport, stage, request, itf); + case TUSB_REQ_TYPE_CLASS: + if (!TU_U16_HIGH(request->wIndex)) { + return handle_video_ctl_cs_req(rhport, stage, request, itf); + } else { + /* TODO: */ + return VIDEO_INVALID_REQUEST; + } + default: + return VIDEO_INVALID_REQUEST; + } +} - tusb_desc_vc_itf_t const *vc = self->vc; - if (vc->std.bInterfaceNumber == itfnum) { - if (videod_set_vc_itf(self, altnum)) - return true; - return false; +static int handle_video_stm_std_req(uint8_t rhport, uint8_t stage, tusb_control_request_t const *request, unsigned itf) +{ + switch (p_request->bRequest) { + case TUSB_REQ_GET_INTERFACE: + handle_video_ctl_std_req_get_itf(rhport, stage, request, itf); + case TUSB_REQ_SET_INTERFACE: + videod_interface_t *self = &_videod_itf[itf]; + unsigned itfnum = tu_u16_low(p_request->wIndex); + if (stage != CONTROL_STAGE_SETUP) return VIDEO_NO_ERROR; + if (_set_vs_itf(rhport, self, itfnum, request->wValue)) + return VIDEO_NO_ERROR; + return VIDEO_UNKNOWN; + default: /* Unknown/Unsupported request */ + TU_BREAKPOINT(); + return VIDEO_INVALID_REQUEST; } - for (unsigned i = 0; i < vc->ctl.bInCollection; ++i) { - tusb_desc_vs_itf_t const *vs = self->vs[i]; - if (!vs || vs->std.bInterfaceNumber == itfnum) { - continue; +} + +static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage, tusb_control_request_t const *request, unsigned itf) +{ + videod_interface_t *self = &_videod_itf[i]; + /* 4.2.1 Interface Control Request */ + switch (TU_U16_HIGH(request->wValue)) { + case VIDEO_VS_CTL_PROBE: + switch (p_request->bRequest) { + case VIDEO_REQUEST_SET_CUR: + if (stage == CONTROL_STAGE_SETUP) { + TU_LOG2(" Set Power Mode\r\n"); + TU_VERIFY(1 == request->wLength, VIDEO_UNKNOWN); + if (!tud_control_xfer(rhport, request, &self->power_mode, sizeof(self->power_mode))) + return VIDEO_UNKNOWN; + } else if (stage == CONTROL_STAGE_ACK) { + if (tud_video_power_mode_cb) return tud_video_power_mode_cb(itf, &self->power_mode); + } + return VIDEO_NO_ERROR; + case VIDEO_REQUEST_GET_CUR: + if (stage == CONTROL_STAGE_SETUP) { + TU_LOG2(" Get Power Mode\r\n"); + TU_VERIFY(1 == request->wLength, VIDEO_UNKNOWN); + if (!tud_control_xfer(rhport, request, &self->power_mode, sizeof(self->power_mode))) + return VIDEO_UNKNOWN; + } + return VIDEO_NO_ERROR; + case VIDEO_REQUEST_GET_INFO: + if (stage == CONTROL_STAGE_SETUP) { + TU_LOG2(" Get Info Power Mode\r\n"); + TU_VERIFY(1 == request->wLength, VIDEO_UNKNOWN); + if (!tud_control_xfer(rhport, request, &_cap_get_set, sizeof(_cap_get_set))) + return VIDEO_UNKNOWN; + } + return VIDEO_NO_ERROR; + default: break; } - if (videod_set_vs_itf(self, itfnum, altnum)) - return true; - return false; + break; + case VIDEO_VS_CTL_COMMIT: + switch (p_request->bRequest) { + case VIDEO_REQUEST_GET_CUR: + if (stage == CONTROL_STAGE_SETUP) { + TU_LOG2(" Get Error Code\r\n"); + if (!tud_control_xfer(rhport, request, &self->error_code, sizeof(self->error_code))) + return VIDEO_UNKNOWN; + } + return VIDEO_NO_ERROR; + case VIDEO_REQUEST_GET_INFO: + if (stage == CONTROL_STAGE_SETUP) { + TU_LOG2(" Get Info Error Code\r\n"); + if (tud_control_xfer(rhport, request, &_cap_get, sizeof(_cap_get))) + return VIDEO_UNKNOWN; + } + return VIDEO_NO_ERROR; + default: break; + } + break; + default: break; } - return false; + /* Unknown/Unsupported request */ + TU_BREAKPOINT(); + return VIDEO_INVALID_REQUEST; +} + +static int handle_video_stm_req(uint8_t rhport, uint8_t stage, tusb_control_request_t const *request, unsigned itf) +{ + switch (p_request->bmRequestType_bit.type) { + case TUSB_REQ_TYPE_STANDARD: + return handle_video_stm_std_req(rhport, stage, request, itf); + case TUSB_REQ_TYPE_CLASS: + if (TU_U16_HIGH(request->wIndex)) + return VIDEO_INVALID_REQUEST; + return handle_video_stm_cs_req(rhport, stage, request, itf); + default: + return VIDEO_INVALID_REQUEST; + } + return VIDEO_UNKNOWN; } -static void _prep_out_transaction (cdcd_interface_t* p_cdc) +static void _prep_out_transaction(cdcd_interface_t* p_cdc) { uint8_t const rhport = TUD_OPT_RHPORT; uint16_t available = tu_fifo_remaining(&p_cdc->rx_ff); @@ -440,31 +732,23 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin void const *end = (void const*)itf_desc + max_len; self->beg = itf_desc; - self->end = end; + self->len = max_len; /*------------- Video Control Interface -------------*/ - void const* cur = videod_set_vc_itf(self, 0); - TU_VERIFY(cur, 0); - unsigned bInCollection = self->vc->ctl.bInCollection; + if (!_open_vc_itf(rhport, self, 0)) return 0; + tusb_desc_vc_itf_t const *vc = _get_desc_vc(self); + unsigned bInCollection = vc->ctl.bInCollection; + /* Update end */ + void const *cur = _next_desc_itf(itf_desc, end); + for (unsigned i = 0; i < bInCollection; ++i) { + cur = _next_desc_itf(cur, end); + } + self->len = (uintptr_t)cur - (uintptr_t)itf_desc; /*------------- Video Stream Interface -------------*/ unsigned itfnum = 0; for (unsigned i = 0; i < bInCollection; ++i) { itfnum = vc->ctl.baInterfaceNr[i]; - cur = videod_set_vs_itf(self, itfnum, 0); - TU_VERIFY(cur, 0); + if (!_open_vs_itf(rhport, self, itfnum, 0)) return 0; } - - /* Skip alternate setting interfaces */ - while (cur < end && TUSB_DESC_INTERFACE == tu_desc_type(cur)) { - tusb_desc_vs_itf_t const *vs = (tusb_desc_vs_itf_t const *)cur; - if (itfnum != vs->std.bInterfaceNumber || - TUSB_DESC_CS_INTERFACE != vs->stm.bDescriptorType || - (VIDEO_CS_VS_INTERFACE_INPUT_HEADER != vs->stm.bDescriptorSubType && - VIDEO_CS_VS_INTERFACE_OUTPUT_HEADER!= vs->stm.bDescriptorSubType)) { - break; - } - cur += itf->std.bLength + itf->stm.bLength + itf->stm.wTotalLength; - } - self->end = cur; return end - cur; } @@ -473,61 +757,33 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin // return false to stall control endpoint (e.g unsupported request) bool videod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request) { + int err; if (p_request->bmRequestType_bit.recipient != TUSB_REQ_RCPT_INTERFACE) { return false; } unsigned itfnum = tu_u16_low(p_request->wIndex); /* Identify which interface to use */ - videod_interface_t *self = NULL; - for (unsigned i = 0; i < CFG_TUD_VIDEO; ++i) { - if (_videod_itf[i].vc->bInterfaceNumber == itfnum) { - self = &_videod_itf[i]; + int itf; + tusb_desc_vc_itf_t const *vc = NULL; + for (itf = 0; itf < CFG_TUD_VIDEO; ++itf) { + vc = _videod_itf[itf].vc; + if (!vc) continue; + unsigned beg_itfnum = vc->bInterfaceNumber; + unsigned end_itfnum = vc->ctl.bInCollection; + if (beg_itfnum <= itfnum && itfnum < end_itfnum) break; - } } - if (!self) return false; - - /* Standard request */ - if (p_request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD) { - if (stage != CONTROL_STAGE_SETUP) return true; - switch (p_request->bRequest) { - case TUSB_REQ_GET_INTERFACE: - return videod_get_itf(rhport, self, request); - case TUSB_REQ_SET_INTERFACE: - return videod_set_itf(rhport, self, request); - default: /* Unknown/Unsupported request */ - TU_BREAKPOINT(); - return false; - } + if (itf == CFG_TUD_VIDEO) return false; + + if (itfnum == vc->bInterfaceNumber) { + /* To video control interface */ + err = handle_video_ctl_req(rhport, stage, request, itf); + } else { + /* To video streaming interface */ + err = handle_video_stm_req(rhport, stage, request, itf); } - - unsigned cs = TU_U16_HIGH(request->wValue); - unsigned uid = TU_U16_HIGH(request->wIndex); - - switch (request->bRequest) { - case VIDEO_REQUEST_GET_INFO: - TU_VERIFY(1 == request->wLength); - - break; - case VIDEO_REQUEST_SET_CUR: - if (stage == CONTROL_STAGE_SETUP) { - TU_LOG2(" Set Current Setting Attribute\r\n"); - tud_control_xfer(rhport, request, &p_video->line_coding, sizeof(cdc_line_coding_t)); - } else if ( stage == CONTROL_STAGE_ACK) { - if ( tud_cdc_line_coding_cb ) tud_cdc_line_coding_cb(itf, &p_video->line_coding); - } - break; - case VIDEO_REQUEST_GET_CUR: - if (stage == CONTROL_STAGE_SETUP) { - TU_LOG2(" Set Current Setting Attribute\r\n"); - tud_control_xfer(rhport, request, &p_video->line_coding, sizeof(cdc_line_coding_t)); - } else if ( stage == CONTROL_STAGE_ACK) { - if ( tud_cdc_line_coding_cb ) tud_cdc_line_coding_cb(itf, &p_video->line_coding); - } - break; - default: return false; // stall unsupported request - } - + _videod_itf[itf].error_code = (uint8_t)err; + if (err) return false; return true; } diff --git a/src/class/video/video_device.h b/src/class/video/video_device.h index e0ff21694..cd04b7391 100644 --- a/src/class/video/video_device.h +++ b/src/class/video/video_device.h @@ -28,8 +28,11 @@ #ifndef TUSB_VIDEO_DEVICE_H_ #define TUSB_VIDEO_DEVICE_H_ +#include "common/tusb_common.h" +#include "video.h" + #ifdef __cplusplus - extern "C" { +extern "C" { #endif //--------------------------------------------------------------------+ @@ -41,7 +44,7 @@ TU_ATTR_WEAK bool tud_video_get_info_cb(uint8_t rhport, tusb_control_request_t c // Invoked when GET_INFO request received TU_ATTR_WEAK bool tud_video_set_cur_cb(uint8_t rhport, tusb_control_request_t const *request); // Invoked when GET_CUR request received -TU_ATTR_WEAK bool tud_video_get_info_cb(uint8_t rhport, tusb_control_request_t const *request); +TU_ATTR_WEAK bool tud_video_get_cur_cb(uint8_t rhport, tusb_control_request_t const *request); //--------------------------------------------------------------------+ // INTERNAL USBD-CLASS DRIVER API diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index f26983a74..897e89b39 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -69,6 +69,18 @@ typedef enum TUSB_DIR_IN_MASK = 0x80 }tusb_dir_t; +/// Isochronous End Point Attributes +typedef enum +{ + TUSB_ISO_EP_ATT_NO_SYNC = 0x00, + TUSB_ISO_EP_ATT_ASYNCHRONOUS = 0x04, + TUSB_ISO_EP_ATT_ADAPTIVE = 0x08, + TUSB_ISO_EP_ATT_SYNCHRONOUS = 0x0C, + TUSB_ISO_EP_ATT_DATA = 0x00, ///< Data End Point + TUSB_ISO_EP_ATT_EXPLICIT_FB = 0x10, ///< Feedback End Point + TUSB_ISO_EP_ATT_IMPLICIT_FB = 0x20, ///< Data endpoint that also serves as an implicit feedback +}tusb_iso_ep_attribute_t; + /// USB Descriptor Types typedef enum { -- cgit v1.3.1 From 0b249618b0469529da748e3e5478751cd56acd31 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 15 Oct 2021 17:35:05 +0700 Subject: fix -Wcast-qual --- hw/bsp/nrf/family.mk | 14 +----------- src/class/dfu/dfu_device.c | 2 +- src/class/hid/hid_device.c | 12 +++++------ src/class/usbtmc/usbtmc_device.c | 40 ++++++++++++++++------------------- src/class/usbtmc/usbtmc_device.h | 6 ------ src/class/video/video_device.c | 19 ++++++++++------- src/common/tusb_common.h | 5 ++--- src/common/tusb_fifo.c | 4 ++-- src/device/usbd.c | 39 ++++++++++++++++++---------------- src/portable/nordic/nrf5x/dcd_nrf5x.c | 4 ++-- 10 files changed, 64 insertions(+), 81 deletions(-) (limited to 'src/common') diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk index d1afd2587..d8283a9e6 100644 --- a/hw/bsp/nrf/family.mk +++ b/hw/bsp/nrf/family.mk @@ -14,19 +14,7 @@ CFLAGS += \ -DCONFIG_GPIO_AS_PINRESET # suppress warning caused by vendor mcu driver -CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align - -# due to tusb_hal_nrf_power_event -GCCVERSION = $(firstword $(subst ., ,$(shell arm-none-eabi-gcc -dumpversion))) -ifeq ($(CMDEXE),1) - ifeq ($(shell if $(GCCVERSION) geq 8 echo 1), 1) - CFLAGS += -Wno-error=cast-function-type - endif -else - ifeq ($(shell expr $(GCCVERSION) \>= 8), 1) - CFLAGS += -Wno-error=cast-function-type - endif -endif +CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual # All source paths should be relative to the top level. LD_FILE ?= hw/bsp/nrf/boards/$(BOARD)/nrf52840_s140_v6.ld diff --git a/src/class/dfu/dfu_device.c b/src/class/dfu/dfu_device.c index 28abf6e83..ddfa608e4 100644 --- a/src/class/dfu/dfu_device.c +++ b/src/class/dfu/dfu_device.c @@ -190,7 +190,7 @@ uint16_t dfu_moded_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, _dfu_ctx.attrs = func_desc->bAttributes; // CFG_TUD_DFU_XFER_BUFSIZE has to be set to the buffer size used in TUD_DFU_DESCRIPTOR - uint16_t const transfer_size = tu_le16toh( tu_unaligned_read16((uint8_t*) func_desc + offsetof(tusb_desc_dfu_functional_t, wTransferSize)) ); + uint16_t const transfer_size = tu_le16toh( tu_unaligned_read16((uint8_t const*) func_desc + offsetof(tusb_desc_dfu_functional_t, wTransferSize)) ); TU_ASSERT(transfer_size <= CFG_TUD_DFU_XFER_BUFSIZE, drv_len); return drv_len; diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c index 55071a5ce..588b61254 100644 --- a/src/class/hid/hid_device.c +++ b/src/class/hid/hid_device.c @@ -206,8 +206,8 @@ uint16_t hidd_open(uint8_t rhport, tusb_desc_interface_t const * desc_itf, uint1 //------------- HID descriptor -------------// p_desc = tu_desc_next(p_desc); + TU_ASSERT(HID_DESC_TYPE_HID == tu_desc_type(p_desc), 0); p_hid->hid_descriptor = (tusb_hid_descriptor_hid_t const *) p_desc; - TU_ASSERT(HID_DESC_TYPE_HID == p_hid->hid_descriptor->bDescriptorType, 0); //------------- Endpoint Descriptor -------------// p_desc = tu_desc_next(p_desc); @@ -216,10 +216,10 @@ uint16_t hidd_open(uint8_t rhport, tusb_desc_interface_t const * desc_itf, uint1 if ( desc_itf->bInterfaceSubClass == HID_SUBCLASS_BOOT ) p_hid->itf_protocol = desc_itf->bInterfaceProtocol; p_hid->protocol_mode = HID_PROTOCOL_REPORT; // Per Specs: default is report mode - p_hid->itf_num = desc_itf->bInterfaceNumber; + p_hid->itf_num = desc_itf->bInterfaceNumber; // Use offsetof to avoid pointer to the odd/misaligned address - memcpy(&p_hid->report_desc_len, (uint8_t*) p_hid->hid_descriptor + offsetof(tusb_hid_descriptor_hid_t, wReportLength), 2); + p_hid->report_desc_len = tu_unaligned_read16((uint8_t const*) p_hid->hid_descriptor + offsetof(tusb_hid_descriptor_hid_t, wReportLength)); // Prepare for output endpoint if (p_hid->ep_out) @@ -256,13 +256,13 @@ bool hidd_control_xfer_cb (uint8_t rhport, uint8_t stage, tusb_control_request_t if (request->bRequest == TUSB_REQ_GET_DESCRIPTOR && desc_type == HID_DESC_TYPE_HID) { - TU_VERIFY(p_hid->hid_descriptor != NULL); - TU_VERIFY(tud_control_xfer(rhport, request, (void*) p_hid->hid_descriptor, p_hid->hid_descriptor->bLength)); + TU_VERIFY(p_hid->hid_descriptor); + TU_VERIFY(tud_control_xfer(rhport, request, (void*)(uintptr_t) p_hid->hid_descriptor, p_hid->hid_descriptor->bLength)); } else if (request->bRequest == TUSB_REQ_GET_DESCRIPTOR && desc_type == HID_DESC_TYPE_REPORT) { uint8_t const * desc_report = tud_hid_descriptor_report_cb(hid_itf); - tud_control_xfer(rhport, request, (void*) desc_report, p_hid->report_desc_len); + tud_control_xfer(rhport, request, (void*)(uintptr_t) desc_report, p_hid->report_desc_len); } else { diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c index c1ee49f45..86495e3fa 100644 --- a/src/class/usbtmc/usbtmc_device.c +++ b/src/class/usbtmc/usbtmc_device.c @@ -1,10 +1,3 @@ -/* - * usbtmc.c - * - * Created on: Sep 9, 2019 - * Author: nconrad - */ - /* * The MIT License (MIT) * @@ -205,7 +198,7 @@ bool tud_usbtmc_transmit_dev_msg_data( { TU_ASSERT(usbtmc_state.capabilities->bmDevCapabilities.canEndBulkInOnTermChar); TU_ASSERT(termCharRequested); - TU_ASSERT(((uint8_t*)data)[len-1u] == termChar); + TU_ASSERT(((uint8_t const*)data)[len-1u] == termChar); } #endif @@ -228,7 +221,7 @@ bool tud_usbtmc_transmit_dev_msg_data( memcpy((uint8_t*)(usbtmc_state.ep_bulk_in_buf) + headerLen, data, dataLen); usbtmc_state.transfer_size_remaining = len - dataLen; usbtmc_state.transfer_size_sent = dataLen; - usbtmc_state.devInBuffer = (uint8_t*)data + (dataLen); + usbtmc_state.devInBuffer = (uint8_t const*) data + (dataLen); bool stateChanged = atomicChangeState(STATE_TX_REQUESTED, (packetLen >= txBufLen) ? STATE_TX_INITIATED : STATE_TX_SHORTED); @@ -508,13 +501,13 @@ bool usbtmcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint case STATE_ABORTING_BULK_OUT: TU_VERIFY(false); return false; // Should be stalled by now, shouldn't have received a packet. + case STATE_TX_REQUESTED: case STATE_TX_INITIATED: case STATE_ABORTING_BULK_IN: case STATE_ABORTING_BULK_IN_SHORTED: case STATE_ABORTING_BULK_IN_ABORTED: default: - TU_VERIFY(false); } } @@ -528,16 +521,16 @@ bool usbtmcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint case STATE_TX_INITIATED: if(usbtmc_state.transfer_size_remaining >=sizeof(usbtmc_state.ep_bulk_in_buf)) - { - // FIXME! This removes const below! - TU_VERIFY( usbd_edpt_xfer(rhport, usbtmc_state.ep_bulk_in, - (void*)usbtmc_state.devInBuffer,sizeof(usbtmc_state.ep_bulk_in_buf))); - usbtmc_state.devInBuffer += sizeof(usbtmc_state.ep_bulk_in_buf); - usbtmc_state.transfer_size_remaining -= sizeof(usbtmc_state.ep_bulk_in_buf); - usbtmc_state.transfer_size_sent += sizeof(usbtmc_state.ep_bulk_in_buf); - } - else // last packet - { + { + // FIXME! This removes const below! + TU_VERIFY( usbd_edpt_xfer(rhport, usbtmc_state.ep_bulk_in, + (void*)(uintptr_t) usbtmc_state.devInBuffer, sizeof(usbtmc_state.ep_bulk_in_buf))); + usbtmc_state.devInBuffer += sizeof(usbtmc_state.ep_bulk_in_buf); + usbtmc_state.transfer_size_remaining -= sizeof(usbtmc_state.ep_bulk_in_buf); + usbtmc_state.transfer_size_sent += sizeof(usbtmc_state.ep_bulk_in_buf); + } + else // last packet + { size_t packetLen = usbtmc_state.transfer_size_remaining; memcpy(usbtmc_state.ep_bulk_in_buf, usbtmc_state.devInBuffer, usbtmc_state.transfer_size_remaining); usbtmc_state.transfer_size_sent += sizeof(usbtmc_state.transfer_size_remaining); @@ -550,15 +543,18 @@ bool usbtmcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint } } return true; + case STATE_ABORTING_BULK_IN: // need to send short packet (ZLP?) TU_VERIFY( usbd_edpt_xfer(rhport, usbtmc_state.ep_bulk_in, usbtmc_state.ep_bulk_in_buf,(uint16_t)0u)); usbtmc_state.state = STATE_ABORTING_BULK_IN_SHORTED; return true; + case STATE_ABORTING_BULK_IN_SHORTED: /* Done. :)*/ usbtmc_state.state = STATE_ABORTING_BULK_IN_ABORTED; - return true; + return true; + default: TU_ASSERT(false); return false; @@ -787,7 +783,7 @@ bool usbtmcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request { TU_VERIFY(request->bmRequestType == 0xA1); // in,class,interface TU_VERIFY(request->wLength == sizeof(*(usbtmc_state.capabilities))); - TU_VERIFY(tud_control_xfer(rhport, request, (void*)usbtmc_state.capabilities, sizeof(*usbtmc_state.capabilities))); + TU_VERIFY(tud_control_xfer(rhport, request, (void*)(uintptr_t) usbtmc_state.capabilities, sizeof(*usbtmc_state.capabilities))); return true; } // USBTMC Optional Requests diff --git a/src/class/usbtmc/usbtmc_device.h b/src/class/usbtmc/usbtmc_device.h index 622800315..0549a1569 100644 --- a/src/class/usbtmc/usbtmc_device.h +++ b/src/class/usbtmc/usbtmc_device.h @@ -1,9 +1,3 @@ -/* - * usbtmc_device.h - * - * Created on: Sep 10, 2019 - * Author: nconrad - */ /* * The MIT License (MIT) * diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index 91d3b2b72..cc05a1e07 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -585,8 +585,9 @@ static int handle_video_ctl_std_req(uint8_t rhport, uint8_t stage, tusb_desc_vc_itf_t const *vc = _get_desc_vc(&_videod_itf[ctl_idx]); TU_VERIFY(vc, VIDEO_ERROR_UNKNOWN); - TU_VERIFY(tud_control_xfer(rhport, request, (void*)&vc->std.bAlternateSetting, sizeof(vc->std.bAlternateSetting)), - VIDEO_ERROR_UNKNOWN); + uint8_t alt_num = vc->std.bAlternateSetting; + + TU_VERIFY(tud_control_xfer(rhport, request, &alt_num, sizeof(alt_num)), VIDEO_ERROR_UNKNOWN); } return VIDEO_ERROR_NONE; @@ -637,7 +638,7 @@ static int handle_video_ctl_cs_req(uint8_t rhport, uint8_t stage, if (stage == CONTROL_STAGE_SETUP) { TU_VERIFY(1 == request->wLength, VIDEO_ERROR_UNKNOWN); - TU_VERIFY(tud_control_xfer(rhport, request, (uint8_t*)&_cap_get_set, sizeof(_cap_get_set)), VIDEO_ERROR_UNKNOWN); + TU_VERIFY(tud_control_xfer(rhport, request, (uint8_t*)(uintptr_t) &_cap_get_set, sizeof(_cap_get_set)), VIDEO_ERROR_UNKNOWN); } return VIDEO_ERROR_NONE; @@ -657,7 +658,7 @@ static int handle_video_ctl_cs_req(uint8_t rhport, uint8_t stage, case VIDEO_REQUEST_GET_INFO: if (stage == CONTROL_STAGE_SETUP) { - TU_VERIFY(tud_control_xfer(rhport, request, (uint8_t*)&_cap_get, sizeof(_cap_get)), VIDEO_ERROR_UNKNOWN); + TU_VERIFY(tud_control_xfer(rhport, request, (uint8_t*)(uintptr_t) &_cap_get, sizeof(_cap_get)), VIDEO_ERROR_UNKNOWN); } return VIDEO_ERROR_NONE; @@ -708,7 +709,9 @@ static int handle_video_stm_std_req(uint8_t rhport, uint8_t stage, TU_VERIFY(1 == request->wLength, VIDEO_ERROR_UNKNOWN); tusb_desc_vs_itf_t const *vs = _get_desc_vs(self); TU_VERIFY(vs, VIDEO_ERROR_UNKNOWN); - TU_VERIFY(tud_control_xfer(rhport, request, (void*)&vs->std.bAlternateSetting, sizeof(vs->std.bAlternateSetting)), VIDEO_ERROR_UNKNOWN); + uint8_t alt_num = vs->std.bAlternateSetting; + + TU_VERIFY(tud_control_xfer(rhport, request, &alt_num, sizeof(alt_num)), VIDEO_ERROR_UNKNOWN); } return VIDEO_ERROR_NONE; @@ -748,7 +751,7 @@ static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage, case VIDEO_REQUEST_GET_INFO: if (stage == CONTROL_STAGE_SETUP) { - TU_VERIFY(tud_control_xfer(rhport, request, (uint8_t*)&_cap_get, sizeof(_cap_get)), VIDEO_ERROR_UNKNOWN); + TU_VERIFY(tud_control_xfer(rhport, request, (uint8_t*)(uintptr_t) &_cap_get, sizeof(_cap_get)), VIDEO_ERROR_UNKNOWN); } return VIDEO_ERROR_NONE; @@ -808,7 +811,7 @@ static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage, if (stage == CONTROL_STAGE_SETUP) { TU_VERIFY(1 == request->wLength, VIDEO_ERROR_UNKNOWN); - TU_VERIFY(tud_control_xfer(rhport, request, (uint8_t*)&_cap_get_set, sizeof(_cap_get_set)), VIDEO_ERROR_UNKNOWN); + TU_VERIFY(tud_control_xfer(rhport, request, (uint8_t*)(uintptr_t) &_cap_get_set, sizeof(_cap_get_set)), VIDEO_ERROR_UNKNOWN); } return VIDEO_ERROR_NONE; @@ -842,7 +845,7 @@ static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage, if (stage == CONTROL_STAGE_SETUP) { TU_VERIFY(1 == request->wLength, VIDEO_ERROR_UNKNOWN); - TU_VERIFY(tud_control_xfer(rhport, request, (uint8_t*)&_cap_get_set, sizeof(_cap_get_set)), VIDEO_ERROR_UNKNOWN); + TU_VERIFY(tud_control_xfer(rhport, request, (uint8_t*)(uintptr_t) &_cap_get_set, sizeof(_cap_get_set)), VIDEO_ERROR_UNKNOWN); } return VIDEO_ERROR_NONE; diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index fc4d3bc62..8dd1dbd49 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -161,7 +161,6 @@ static inline uint8_t tu_log2(uint32_t value) #if TUP_ARCH_STRICT_ALIGN // Rely on compiler to generate correct code for unaligned access - typedef struct { uint16_t val; } TU_ATTR_PACKED tu_unaligned_uint16_t; typedef struct { uint32_t val; } TU_ATTR_PACKED tu_unaligned_uint32_t; @@ -227,8 +226,8 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void* mem, uint16_ #else // MCU that could access unaligned memory natively -TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32 (const void* mem ) { return *((uint32_t*) mem); } -TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16 (const void* mem ) { return *((uint16_t*) mem); } +TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32 (const void* mem) { return *((uint32_t const *) mem); } +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16 (const void* mem) { return *((uint16_t const *) mem); } TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write32 (void* mem, uint32_t value ) { *((uint32_t*) mem) = value; } TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16 (void* mem, uint16_t value ) { *((uint16_t*) mem) = value; } diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 11b8fc5f3..564687e02 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -102,7 +102,7 @@ static inline uint16_t _ff_mod(uint16_t idx, uint16_t depth) // TODO generalize with configurable 1 byte or 4 byte each read static void _ff_push_const_addr(uint8_t * ff_buf, const void * app_buf, uint16_t len) { - volatile uint32_t * rx_fifo = (volatile uint32_t *) app_buf; + volatile const uint32_t * rx_fifo = (volatile const uint32_t *) app_buf; // Reading full available 32 bit words from const app address uint16_t full_words = len >> 2; @@ -201,7 +201,7 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t ff_buf += nLin_4n_bytes; // There could be odd 1-3 bytes before the wrap-around boundary - volatile uint32_t * rx_fifo = (volatile uint32_t *) app_buf; + volatile const uint32_t * rx_fifo = (volatile const uint32_t *) app_buf; uint8_t rem = nLin_bytes & 0x03; if (rem > 0) { diff --git a/src/device/usbd.c b/src/device/usbd.c index 7be41172b..b4680283f 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -990,21 +990,23 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const { TU_LOG2(" Device\r\n"); - uint16_t len = sizeof(tusb_desc_device_t); + void* desc_device = (void*) (uintptr_t) tud_descriptor_device_cb(); - // Only send up to EP0 Packet Size if not addressed and host requested more data - // that device descriptor has. + // Only response with exactly 1 Packet if: not addressed and host requested more data than device descriptor has. // This only happens with the very first get device descriptor and EP0 size = 8 or 16. if ((CFG_TUD_ENDPOINT0_SIZE < sizeof(tusb_desc_device_t)) && !_usbd_dev.addressed && - ((tusb_control_request_t*) p_request)->wLength > sizeof(tusb_desc_device_t)) + ((tusb_control_request_t const*) p_request)->wLength > sizeof(tusb_desc_device_t)) { - len = CFG_TUD_ENDPOINT0_SIZE; - // Hack here: we modify the request length to prevent usbd_control response with zlp - ((tusb_control_request_t*) p_request)->wLength = CFG_TUD_ENDPOINT0_SIZE; - } + // since we are responding with 1 packet & less data than wLength. + tusb_control_request_t mod_request = *p_request; + mod_request.wLength = CFG_TUD_ENDPOINT0_SIZE; - return tud_control_xfer(rhport, p_request, (void*) tud_descriptor_device_cb(), len); + tud_control_xfer(rhport, &mod_request, desc_device, CFG_TUD_ENDPOINT0_SIZE); + }else + { + return tud_control_xfer(rhport, p_request, desc_device, sizeof(tusb_desc_device_t)); + } } break; @@ -1015,10 +1017,11 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const // requested by host if USB > 2.0 ( i.e 2.1 or 3.x ) if (!tud_descriptor_bos_cb) return false; - tusb_desc_bos_t const* desc_bos = (tusb_desc_bos_t const*) tud_descriptor_bos_cb(); + uintptr_t desc_bos = (uintptr_t) tud_descriptor_bos_cb(); + TU_ASSERT(desc_bos); // Use offsetof to avoid pointer to the odd/misaligned address - uint16_t const total_len = tu_le16toh( tu_unaligned_read16((uint8_t*) desc_bos + offsetof(tusb_desc_bos_t, wTotalLength)) ); + uint16_t const total_len = tu_le16toh( tu_unaligned_read16((const void*) (desc_bos + offsetof(tusb_desc_bos_t, wTotalLength))) ); return tud_control_xfer(rhport, p_request, (void*) desc_bos, total_len); } @@ -1027,24 +1030,24 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const case TUSB_DESC_CONFIGURATION: case TUSB_DESC_OTHER_SPEED_CONFIG: { - tusb_desc_configuration_t const* desc_config; + uintptr_t desc_config; if ( desc_type == TUSB_DESC_CONFIGURATION ) { TU_LOG2(" Configuration[%u]\r\n", desc_index); - desc_config = (tusb_desc_configuration_t const*) tud_descriptor_configuration_cb(desc_index); + desc_config = (uintptr_t) tud_descriptor_configuration_cb(desc_index); }else { // Host only request this after getting Device Qualifier descriptor TU_LOG2(" Other Speed Configuration\r\n"); TU_VERIFY( tud_descriptor_other_speed_configuration_cb ); - desc_config = (tusb_desc_configuration_t const*) tud_descriptor_other_speed_configuration_cb(desc_index); + desc_config = (uintptr_t) tud_descriptor_other_speed_configuration_cb(desc_index); } TU_ASSERT(desc_config); // Use offsetof to avoid pointer to the odd/misaligned address - uint16_t const total_len = tu_le16toh( tu_unaligned_read16((uint8_t*) desc_config + offsetof(tusb_desc_configuration_t, wTotalLength)) ); + uint16_t const total_len = tu_le16toh( tu_unaligned_read16((const void*) (desc_config + offsetof(tusb_desc_configuration_t, wTotalLength))) ); return tud_control_xfer(rhport, p_request, (void*) desc_config, total_len); } @@ -1055,11 +1058,11 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const TU_LOG2(" String[%u]\r\n", desc_index); // String Descriptor always uses the desc set from user - uint8_t const* desc_str = (uint8_t const*) tud_descriptor_string_cb(desc_index, p_request->wIndex); + uint8_t const* desc_str = (uint8_t const*) tud_descriptor_string_cb(desc_index, tu_le16toh(p_request->wIndex)); TU_VERIFY(desc_str); // first byte of descriptor is its size - return tud_control_xfer(rhport, p_request, (void*) desc_str, desc_str[0]); + return tud_control_xfer(rhport, p_request, (void*) (uintptr_t) desc_str, tu_desc_len(desc_str)); } break; @@ -1073,7 +1076,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const TU_VERIFY(desc_qualifier); // first byte of descriptor is its size - return tud_control_xfer(rhport, p_request, (void*) desc_qualifier, desc_qualifier[0]); + return tud_control_xfer(rhport, p_request, (void*) (uintptr_t) desc_qualifier, tu_desc_len(desc_qualifier)); } break; diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index f40ba2d4f..06f23f8a5 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -125,7 +125,7 @@ static void edpt_dma_start(volatile uint32_t* reg_startep) if (is_in_isr()) { // Called within ISR, use usbd task to defer later - usbd_defer_func( (osal_task_func_t) edpt_dma_start, (void*) reg_startep, true ); + usbd_defer_func((osal_task_func_t) edpt_dma_start, (void*) (uintptr_t) reg_startep, true); return; } else @@ -773,7 +773,7 @@ void dcd_int_handler(uint8_t rhport) if ( _dcd.dma_pending ) { // use usbd task to defer later - usbd_defer_func( (osal_task_func_t) start_ep0_task, (void*) &NRF_USBD->TASKS_EP0RCVOUT, true ); + usbd_defer_func((osal_task_func_t) start_ep0_task, (void*) (uintptr_t) &NRF_USBD->TASKS_EP0RCVOUT, true); }else { start_ep0_task(&NRF_USBD->TASKS_EP0RCVOUT); -- cgit v1.3.1 From 5af989384bd95dbf16f824bcc48e56f3ea283080 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 24 Oct 2021 13:11:21 +0700 Subject: remove ep descriptor wMaxPacketSize bitfield due to endian issue --- CONTRIBUTORS.rst | 2 +- src/class/audio/audio_device.c | 15 +++++----- src/class/bth/bth_device.c | 8 ++--- src/class/hid/hid_host.c | 2 +- src/class/usbtmc/usbtmc_device.c | 2 +- src/class/video/video_device.c | 6 ++-- src/common/tusb_common.h | 21 ++++++------- src/common/tusb_types.h | 35 ++++++++++------------ src/host/usbh.c | 2 +- src/portable/dialog/da146xx/dcd_da146xx.c | 2 +- src/portable/ehci/ehci.c | 2 +- src/portable/espressif/esp32sx/dcd_esp32sx.c | 7 ++--- src/portable/microchip/samd/dcd_samd.c | 4 +-- src/portable/microchip/samg/dcd_samg.c | 2 +- src/portable/microchip/samx7x/dcd_samx7x.c | 2 +- src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c | 2 +- src/portable/nordic/nrf5x/dcd_nrf5x.c | 2 +- src/portable/nuvoton/nuc120/dcd_nuc120.c | 2 +- src/portable/nuvoton/nuc121/dcd_nuc121.c | 2 +- src/portable/nuvoton/nuc505/dcd_nuc505.c | 2 +- src/portable/nxp/khci/dcd_khci.c | 2 +- src/portable/nxp/lpc17_40/dcd_lpc17_40.c | 5 ++-- .../nxp/transdimension/dcd_transdimension.c | 2 +- src/portable/ohci/ohci.c | 2 +- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 2 +- src/portable/raspberrypi/rp2040/hcd_rp2040.c | 2 +- src/portable/renesas/usba/dcd_usba.c | 2 +- src/portable/silabs/efm32/dcd_efm32.c | 7 ++--- src/portable/sony/cxd56/dcd_cxd56.c | 8 +++-- src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 12 ++++---- src/portable/st/synopsys/dcd_synopsys.c | 8 ++--- src/portable/ti/msp430x5xx/dcd_msp430x5xx.c | 4 +-- src/tusb.c | 2 +- 33 files changed, 90 insertions(+), 90 deletions(-) (limited to 'src/common') diff --git a/CONTRIBUTORS.rst b/CONTRIBUTORS.rst index 55a291222..e3186f086 100644 --- a/CONTRIBUTORS.rst +++ b/CONTRIBUTORS.rst @@ -110,7 +110,7 @@ Notable contributors `Rafael Silva `__ ---------------------------------------------- -- Add new DCD port for Silabs EFM32GG12 with SLTB009A board +- Port DCD Synopsys to support Silabs EFM32GG12 with SLTB009A board - Rewrite documentation in rst and setup for readthedocs diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index e16771cd3..28b1c1a7c 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -1569,20 +1569,21 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const * { if (tu_desc_type(p_desc) == TUSB_DESC_ENDPOINT) { - TU_ASSERT(usbd_edpt_open(rhport, (tusb_desc_endpoint_t const *)p_desc)); + tusb_desc_endpoint_t const* desc_ep = (tusb_desc_endpoint_t const *) p_desc; + TU_ASSERT(usbd_edpt_open(rhport, desc_ep)); - uint8_t ep_addr = ((tusb_desc_endpoint_t const *) p_desc)->bEndpointAddress; + uint8_t const ep_addr = desc_ep->bEndpointAddress; //TODO: We need to set EP non busy since this is not taken care of right now in ep_close() - THIS IS A WORKAROUND! usbd_edpt_clear_stall(rhport, ep_addr); #if CFG_TUD_AUDIO_ENABLE_EP_IN - if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN && ((tusb_desc_endpoint_t const *) p_desc)->bmAttributes.usage == 0x00) // Check if usage is data EP + if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN && desc_ep->bmAttributes.usage == 0x00) // Check if usage is data EP { // Save address audio->ep_in = ep_addr; audio->ep_in_as_intf_num = itf; - audio->ep_in_sz = ((tusb_desc_endpoint_t const *) p_desc)->wMaxPacketSize.size; + audio->ep_in_sz = tu_edpt_packet_size(desc_ep); // If software encoding is enabled, parse for the corresponding parameters - doing this here means only AS interfaces with EPs get scanned for parameters #if CFG_TUD_AUDIO_ENABLE_ENCODING @@ -1616,7 +1617,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const * // Save address audio->ep_out = ep_addr; audio->ep_out_as_intf_num = itf; - audio->ep_out_sz = ((tusb_desc_endpoint_t const *) p_desc)->wMaxPacketSize.size; + audio->ep_out_sz = tu_edpt_packet_size(desc_ep); #if CFG_TUD_AUDIO_ENABLE_DECODING audiod_parse_for_AS_params(audio, p_desc_parse_for_params, p_desc_end, itf); @@ -1635,7 +1636,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const * #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP // In case of asynchronous EP, call Cb after ep_fb is set - if (!(((tusb_desc_endpoint_t const *) p_desc)->bmAttributes.sync == 0x01 && audio->ep_fb == 0)) + if ( !(desc_ep->bmAttributes.sync == 0x01 && audio->ep_fb == 0) ) { if (tud_audio_set_itf_cb) TU_VERIFY(tud_audio_set_itf_cb(rhport, p_request)); } @@ -1652,7 +1653,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const * } #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP - if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN && ((tusb_desc_endpoint_t const *) p_desc)->bmAttributes.usage == 1) // Check if usage is explicit data feedback + if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN && desc_ep->bmAttributes.usage == 1) // Check if usage is explicit data feedback { audio->ep_fb = ep_addr; diff --git a/src/class/bth/bth_device.c b/src/class/bth/bth_device.c index b73f829cc..f445deed2 100755 --- a/src/class/bth/bth_device.c +++ b/src/class/bth/bth_device.c @@ -142,14 +142,14 @@ uint16_t btd_open(uint8_t rhport, tusb_desc_interface_t const *itf_desc, uint16_ dir = tu_edpt_dir(desc_ep->bEndpointAddress); _btd_itf.ep_voice[dir] = desc_ep->bEndpointAddress; // Store endpoint size for alternative - _btd_itf.ep_voice_size[dir][itf_desc->bAlternateSetting] = (uint8_t)desc_ep->wMaxPacketSize.size; + _btd_itf.ep_voice_size[dir][itf_desc->bAlternateSetting] = (uint8_t) tu_edpt_packet_size(desc_ep); desc_ep = (tusb_desc_endpoint_t const *)tu_desc_next(desc_ep); TU_ASSERT(desc_ep->bDescriptorType == TUSB_DESC_ENDPOINT, 0); dir = tu_edpt_dir(desc_ep->bEndpointAddress); _btd_itf.ep_voice[dir] = desc_ep->bEndpointAddress; // Store endpoint size for alternative - _btd_itf.ep_voice_size[dir][itf_desc->bAlternateSetting] = (uint8_t)desc_ep->wMaxPacketSize.size; + _btd_itf.ep_voice_size[dir][itf_desc->bAlternateSetting] = (uint8_t) tu_edpt_packet_size(desc_ep); drv_len += iso_alt_itf_size; for (int i = 1; i < CFG_TUD_BTH_ISO_ALT_COUNT && drv_len + iso_alt_itf_size <= max_len; ++i) { @@ -170,14 +170,14 @@ uint16_t btd_open(uint8_t rhport, tusb_desc_interface_t const *itf_desc, uint16_ // Verify that alternative endpoint are same as first ones TU_ASSERT(desc_ep->bDescriptorType == TUSB_DESC_ENDPOINT && _btd_itf.ep_voice[dir] == desc_ep->bEndpointAddress, 0); - _btd_itf.ep_voice_size[dir][itf_desc->bAlternateSetting] = (uint8_t)desc_ep->wMaxPacketSize.size; + _btd_itf.ep_voice_size[dir][itf_desc->bAlternateSetting] = (uint8_t) tu_edpt_packet_size(desc_ep); desc_ep = (tusb_desc_endpoint_t const *)tu_desc_next(desc_ep); dir = tu_edpt_dir(desc_ep->bEndpointAddress); // Verify that alternative endpoint are same as first ones TU_ASSERT(desc_ep->bDescriptorType == TUSB_DESC_ENDPOINT && _btd_itf.ep_voice[dir] == desc_ep->bEndpointAddress, 0); - _btd_itf.ep_voice_size[dir][itf_desc->bAlternateSetting] = (uint8_t)desc_ep->wMaxPacketSize.size; + _btd_itf.ep_voice_size[dir][itf_desc->bAlternateSetting] = (uint8_t) tu_edpt_packet_size(desc_ep); drv_len += iso_alt_itf_size; } } diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index ac260d39b..f19f1ba81 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -307,7 +307,7 @@ bool hidh_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *de hid_itf->itf_num = desc_itf->bInterfaceNumber; hid_itf->ep_in = desc_ep->bEndpointAddress; - hid_itf->epin_size = desc_ep->wMaxPacketSize.size; + hid_itf->epin_size = tu_edpt_packet_size(desc_ep); // Assume bNumDescriptors = 1 hid_itf->report_desc_type = desc_hid->bReportType; diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c index 6c916d2f3..4bd1edf12 100644 --- a/src/class/usbtmc/usbtmc_device.c +++ b/src/class/usbtmc/usbtmc_device.c @@ -280,7 +280,7 @@ uint16_t usbtmcd_open_cb(uint8_t rhport, tusb_desc_interface_t const * itf_desc, tusb_desc_endpoint_t const *ep_desc = (tusb_desc_endpoint_t const *)p_desc; switch(ep_desc->bmAttributes.xfer) { case TUSB_XFER_BULK: - TU_ASSERT(ep_desc->wMaxPacketSize.size == USBTMCD_MAX_PACKET_SIZE, 0); + TU_ASSERT(tu_edpt_packet_size(ep_desc) == USBTMCD_MAX_PACKET_SIZE, 0); if (tu_edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN) { usbtmc_state.ep_bulk_in = ep_desc->bEndpointAddress; diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index d9bd44f61..eeb068197 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -582,11 +582,11 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint TU_ASSERT(cur < end); tusb_desc_endpoint_t const *ep = (tusb_desc_endpoint_t const*)cur; if (!stm->max_payload_transfer_size) { - video_probe_and_commit_control_t const *param = - (video_probe_and_commit_control_t const*)&stm->ep_buf; + video_probe_and_commit_control_t const *param = (video_probe_and_commit_control_t const*)&stm->ep_buf; uint_fast32_t max_size = param->dwMaxPayloadTransferSize; if ((TUSB_XFER_ISOCHRONOUS == ep->bmAttributes.xfer) && - (ep->wMaxPacketSize.size < max_size)) { + (tu_edpt_packet_size(ep) < max_size)) + { /* FS must be less than or equal to max packet size */ return false; } diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 8dd1dbd49..fc92654b7 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -38,20 +38,21 @@ #define TU_MIN(_x, _y) ( ( (_x) < (_y) ) ? (_x) : (_y) ) #define TU_MAX(_x, _y) ( ( (_x) > (_y) ) ? (_x) : (_y) ) -#define TU_U16_HIGH(_u16) ((uint8_t) (((_u16) >> 8) & 0x00ff)) -#define TU_U16_LOW(_u16) ((uint8_t) ((_u16) & 0x00ff)) -#define U16_TO_U8S_BE(_u16) TU_U16_HIGH(_u16), TU_U16_LOW(_u16) -#define U16_TO_U8S_LE(_u16) TU_U16_LOW(_u16), TU_U16_HIGH(_u16) +#define TU_U16_HIGH(_u16) ((uint8_t) (((_u16) >> 8) & 0x00ff)) +#define TU_U16_LOW(_u16) ((uint8_t) ((_u16) & 0x00ff)) +#define U16_TO_U8S_BE(_u16) TU_U16_HIGH(_u16), TU_U16_LOW(_u16) +#define U16_TO_U8S_LE(_u16) TU_U16_LOW(_u16), TU_U16_HIGH(_u16) -#define TU_U32_BYTE3(_u32) ((uint8_t) ((((uint32_t) _u32) >> 24) & 0x000000ff)) // MSB -#define TU_U32_BYTE2(_u32) ((uint8_t) ((((uint32_t) _u32) >> 16) & 0x000000ff)) -#define TU_U32_BYTE1(_u32) ((uint8_t) ((((uint32_t) _u32) >> 8) & 0x000000ff)) -#define TU_U32_BYTE0(_u32) ((uint8_t) (((uint32_t) _u32) & 0x000000ff)) // LSB +#define TU_U32_BYTE3(_u32) ((uint8_t) ((((uint32_t) _u32) >> 24) & 0x000000ff)) // MSB +#define TU_U32_BYTE2(_u32) ((uint8_t) ((((uint32_t) _u32) >> 16) & 0x000000ff)) +#define TU_U32_BYTE1(_u32) ((uint8_t) ((((uint32_t) _u32) >> 8) & 0x000000ff)) +#define TU_U32_BYTE0(_u32) ((uint8_t) (((uint32_t) _u32) & 0x000000ff)) // LSB -#define U32_TO_U8S_BE(_u32) TU_U32_BYTE3(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE0(_u32) -#define U32_TO_U8S_LE(_u32) TU_U32_BYTE0(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE3(_u32) +#define U32_TO_U8S_BE(_u32) TU_U32_BYTE3(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE0(_u32) +#define U32_TO_U8S_LE(_u32) TU_U32_BYTE0(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE3(_u32) #define TU_BIT(n) (1UL << (n)) +#define TU_GENMASK(h, l) ( (UINT32_MAX << (l)) & (UINT32_MAX >> (31 - (h))) ) //--------------------------------------------------------------------+ // Includes diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 897e89b39..233def466 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -349,32 +349,24 @@ TU_VERIFY_STATIC( sizeof(tusb_desc_interface_t) == 9, "size is not correct"); /// USB Endpoint Descriptor typedef struct TU_ATTR_PACKED { - uint8_t bLength ; ///< Size of this descriptor in bytes - uint8_t bDescriptorType ; ///< ENDPOINT Descriptor Type + uint8_t bLength ; // Size of this descriptor in bytes + uint8_t bDescriptorType ; // ENDPOINT Descriptor Type - uint8_t bEndpointAddress ; ///< The address of the endpoint on the USB device described by this descriptor. The address is encoded as follows: \n Bit 3...0: The endpoint number \n Bit 6...4: Reserved, reset to zero \n Bit 7: Direction, ignored for control endpoints 0 = OUT endpoint 1 = IN endpoint. + uint8_t bEndpointAddress ; // The address of the endpoint struct TU_ATTR_PACKED { - uint8_t xfer : 2; - uint8_t sync : 2; - uint8_t usage : 2; + uint8_t xfer : 2; // Control, ISO, Bulk, Interrupt + uint8_t sync : 2; // None, Asynchronous, Adaptive, Synchronous + uint8_t usage : 2; // Data, Feedback, Implicit feedback uint8_t : 2; - } bmAttributes ; ///< This field describes the endpoint's attributes when it is configured using the bConfigurationValue. \n Bits 1..0: Transfer Type \n- 00 = Control \n- 01 = Isochronous \n- 10 = Bulk \n- 11 = Interrupt \n If not an isochronous endpoint, bits 5..2 are reserved and must be set to zero. If isochronous, they are defined as follows: \n Bits 3..2: Synchronization Type \n- 00 = No Synchronization \n- 01 = Asynchronous \n- 10 = Adaptive \n- 11 = Synchronous \n Bits 5..4: Usage Type \n- 00 = Data endpoint \n- 01 = Feedback endpoint \n- 10 = Implicit feedback Data endpoint \n- 11 = Reserved \n Refer to Chapter 5 of USB 2.0 specification for more information. \n All other bits are reserved and must be reset to zero. Reserved bits must be ignored by the host. + } bmAttributes; - struct TU_ATTR_PACKED { -#if defined(__CCRX__) - //FIXME the original defined bit field has a problem with the CCRX toolchain, so only a size field is defined - uint16_t size; -#else - uint16_t size : 11; ///< Maximum packet size this endpoint is capable of sending or receiving when this configuration is selected. \n For isochronous endpoints, this value is used to reserve the bus time in the schedule, required for the per-(micro)frame data payloads. The pipe may, on an ongoing basis, actually use less bandwidth than that reserved. The device reports, if necessary, the actual bandwidth used via its normal, non-USB defined mechanisms. \n For all endpoints, bits 10..0 specify the maximum packet size (in bytes). \n For high-speed isochronous and interrupt endpoints: \n Bits 12..11 specify the number of additional transaction opportunities per microframe: \n- 00 = None (1 transaction per microframe) \n- 01 = 1 additional (2 per microframe) \n- 10 = 2 additional (3 per microframe) \n- 11 = Reserved \n Bits 15..13 are reserved and must be set to zero. - uint16_t hs_period_mult : 2; - uint16_t TU_RESERVED : 3; -#endif - }wMaxPacketSize; - - uint8_t bInterval ; ///< Interval for polling endpoint for data transfers. Expressed in frames or microframes depending on the device operating speed (i.e., either 1 millisecond or 125 us units). \n- For full-/high-speed isochronous endpoints, this value must be in the range from 1 to 16. The bInterval value is used as the exponent for a \f$ 2^(bInterval-1) \f$ value; e.g., a bInterval of 4 means a period of 8 (\f$ 2^(4-1) \f$). \n- For full-/low-speed interrupt endpoints, the value of this field may be from 1 to 255. \n- For high-speed interrupt endpoints, the bInterval value is used as the exponent for a \f$ 2^(bInterval-1) \f$ value; e.g., a bInterval of 4 means a period of 8 (\f$ 2^(4-1) \f$) . This value must be from 1 to 16. \n- For high-speed bulk/control OUT endpoints, the bInterval must specify the maximum NAK rate of the endpoint. A value of 0 indicates the endpoint never NAKs. Other values indicate at most 1 NAK each bInterval number of microframes. This value must be in the range from 0 to 255. \n Refer to Chapter 5 of USB 2.0 specification for more information. + uint16_t wMaxPacketSize ; // Bit 10..0 : max packet size, bit 12..11 additional transaction per highspeed micro-frame + uint8_t bInterval ; // Polling interval, in frames or microframes depending on the operating speed } tusb_desc_endpoint_t; +TU_VERIFY_STATIC( sizeof(tusb_desc_endpoint_t) == 7, "size is not correct"); + /// USB Other Speed Configuration Descriptor typedef struct TU_ATTR_PACKED { @@ -521,6 +513,11 @@ static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) return (uint8_t)(num | (dir ? TUSB_DIR_IN_MASK : 0)); } +static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) +{ + return tu_le16toh(desc_ep->wMaxPacketSize) & TU_GENMASK(10, 0); +} + //--------------------------------------------------------------------+ // Descriptor helper //--------------------------------------------------------------------+ diff --git a/src/host/usbh.c b/src/host/usbh.c index a9c2c201f..f74e7114c 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -1172,7 +1172,7 @@ static bool usbh_edpt_control_open(uint8_t dev_addr, uint8_t max_packet_size) .bDescriptorType = TUSB_DESC_ENDPOINT, .bEndpointAddress = 0, .bmAttributes = { .xfer = TUSB_XFER_CONTROL }, - .wMaxPacketSize = { .size = max_packet_size }, + .wMaxPacketSize = max_packet_size, .bInterval = 0 }; diff --git a/src/portable/dialog/da146xx/dcd_da146xx.c b/src/portable/dialog/da146xx/dcd_da146xx.c index c9d1d9b3c..51957829f 100644 --- a/src/portable/dialog/da146xx/dcd_da146xx.c +++ b/src/portable/dialog/da146xx/dcd_da146xx.c @@ -914,7 +914,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) TU_ASSERT(epnum < EP_MAX); - xfer->max_packet_size = desc_edpt->wMaxPacketSize.size; + xfer->max_packet_size = tu_edpt_packet_size(desc_edpt); xfer->ep_addr = desc_edpt->bEndpointAddress; xfer->data1 = 0; xfer->iso = 0; diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index 18ddaf31a..e92f8a951 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -802,7 +802,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c p_qhd->ep_speed = devtree_info.speed; p_qhd->data_toggle_control= (xfer_type == TUSB_XFER_CONTROL) ? 1 : 0; p_qhd->head_list_flag = (dev_addr == 0) ? 1 : 0; // addr0's endpoint is the static asyn list head - p_qhd->max_packet_size = ep_desc->wMaxPacketSize.size; + p_qhd->max_packet_size = tu_edpt_packet_size(ep_desc); p_qhd->fl_ctrl_ep_flag = ((xfer_type == TUSB_XFER_CONTROL) && (p_qhd->ep_speed != TUSB_SPEED_HIGH)) ? 1 : 0; p_qhd->nak_reload = 0; diff --git a/src/portable/espressif/esp32sx/dcd_esp32sx.c b/src/portable/espressif/esp32sx/dcd_esp32sx.c index cfbbab233..c27fc2922 100644 --- a/src/portable/espressif/esp32sx/dcd_esp32sx.c +++ b/src/portable/espressif/esp32sx/dcd_esp32sx.c @@ -256,17 +256,16 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_edpt) uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress); uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress); - TU_ASSERT(desc_edpt->wMaxPacketSize.size <= 64); TU_ASSERT(epnum < EP_MAX); xfer_ctl_t *xfer = XFER_CTL_BASE(epnum, dir); - xfer->max_size = desc_edpt->wMaxPacketSize.size; + xfer->max_size = tu_edpt_packet_size(desc_edpt); if (dir == TUSB_DIR_OUT) { out_ep[epnum].doepctl |= USB_USBACTEP1_M | desc_edpt->bmAttributes.xfer << USB_EPTYPE1_S | (desc_edpt->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS ? USB_DO_SETD0PID1_M : 0) | - desc_edpt->wMaxPacketSize.size << USB_MPS1_S; + xfer->max_size << USB_MPS1_S; USB0.daintmsk |= (1 << (16 + epnum)); } else { // "USB Data FIFOs" section in reference manual @@ -300,7 +299,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_edpt) fifo_num << USB_D_TXFNUM1_S | desc_edpt->bmAttributes.xfer << USB_D_EPTYPE1_S | (desc_edpt->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS ? (1 << USB_DI_SETD0PID1_S) : 0) | - desc_edpt->wMaxPacketSize.size << 0; + xfer->max_size << 0; USB0.daintmsk |= (1 << (0 + epnum)); diff --git a/src/portable/microchip/samd/dcd_samd.c b/src/portable/microchip/samd/dcd_samd.c index 526a6fb63..46aabc5aa 100644 --- a/src/portable/microchip/samd/dcd_samd.c +++ b/src/portable/microchip/samd/dcd_samd.c @@ -214,14 +214,14 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) UsbDeviceDescBank* bank = &sram_registers[epnum][dir]; uint32_t size_value = 0; while (size_value < 7) { - if (1 << (size_value + 3) == desc_edpt->wMaxPacketSize.size) { + if (1 << (size_value + 3) == tu_edpt_packet_size(desc_edpt)) { break; } size_value++; } // unsupported endpoint size - if ( size_value == 7 && desc_edpt->wMaxPacketSize.size != 1023 ) return false; + if ( size_value == 7 && tu_edpt_packet_size(desc_edpt) != 1023 ) return false; bank->PCKSIZE.bit.SIZE = size_value; diff --git a/src/portable/microchip/samg/dcd_samg.c b/src/portable/microchip/samg/dcd_samg.c index 81779c56b..2e9854153 100644 --- a/src/portable/microchip/samg/dcd_samg.c +++ b/src/portable/microchip/samg/dcd_samg.c @@ -258,7 +258,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) // Must not already enabled TU_ASSERT((UDP->UDP_CSR[epnum] & UDP_CSR_EPEDS_Msk) == 0); - xfer_epsize_set(&_dcd_xfer[epnum], ep_desc->wMaxPacketSize.size); + xfer_epsize_set(&_dcd_xfer[epnum], tu_edpt_packet_size(ep_desc)); // Configure type and enable EP csr_write(epnum, UDP_CSR_EPEDS_Msk | UDP_CSR_EPTYPE(ep_desc->bmAttributes.xfer + 4*dir)); diff --git a/src/portable/microchip/samx7x/dcd_samx7x.c b/src/portable/microchip/samx7x/dcd_samx7x.c index 032547e47..d716e8fed 100644 --- a/src/portable/microchip/samx7x/dcd_samx7x.c +++ b/src/portable/microchip/samx7x/dcd_samx7x.c @@ -460,7 +460,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) (void) rhport; uint8_t const epnum = tu_edpt_number(ep_desc->bEndpointAddress); uint8_t const dir = tu_edpt_dir(ep_desc->bEndpointAddress); - uint16_t const epMaxPktSize = ep_desc->wMaxPacketSize.size; + uint16_t const epMaxPktSize = tu_edpt_packet_size(ep_desc); tusb_xfer_type_t const eptype = (tusb_xfer_type_t)ep_desc->bmAttributes.xfer; uint8_t fifoSize = 0; // FIFO size uint16_t defaultEndpointSize = 8; // Default size of Endpoint diff --git a/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c b/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c index 6cc0fcac3..a3b69b987 100644 --- a/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c +++ b/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c @@ -323,7 +323,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) /* No support for control transfer */ TU_ASSERT(epn && (xfer != TUSB_XFER_CONTROL)); - ep->max_packet_size = ep_desc->wMaxPacketSize.size; + ep->max_packet_size = tu_edpt_packet_size(ep_desc); unsigned val = USB_ENDPT_EPCTLDIS_MASK; val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK: 0; val |= dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK; diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index 06f23f8a5..9d7db11b2 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -311,7 +311,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const dir = tu_edpt_dir(ep_addr); - _dcd.xfer[epnum][dir].mps = desc_edpt->wMaxPacketSize.size; + _dcd.xfer[epnum][dir].mps = tu_edpt_packet_size(desc_edpt); if (desc_edpt->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS) { diff --git a/src/portable/nuvoton/nuc120/dcd_nuc120.c b/src/portable/nuvoton/nuc120/dcd_nuc120.c index 7618f288d..0d45090d1 100644 --- a/src/portable/nuvoton/nuc120/dcd_nuc120.c +++ b/src/portable/nuvoton/nuc120/dcd_nuc120.c @@ -251,7 +251,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) /* mine the data for the information we need */ int const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress); - int const size = p_endpoint_desc->wMaxPacketSize.size; + int const size = tu_edpt_packet_size(p_endpoint_desc); tusb_xfer_type_t const type = (tusb_xfer_type_t) p_endpoint_desc->bmAttributes.xfer; struct xfer_ctl_t *xfer = &xfer_table[ep - USBD->EP]; diff --git a/src/portable/nuvoton/nuc121/dcd_nuc121.c b/src/portable/nuvoton/nuc121/dcd_nuc121.c index dbc5cd18a..fc7150508 100644 --- a/src/portable/nuvoton/nuc121/dcd_nuc121.c +++ b/src/portable/nuvoton/nuc121/dcd_nuc121.c @@ -279,7 +279,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) /* mine the data for the information we need */ int const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress); - int const size = p_endpoint_desc->wMaxPacketSize.size; + int const size = tu_edpt_packet_size(p_endpoint_desc); tusb_xfer_type_t const type = (tusb_xfer_type_t) p_endpoint_desc->bmAttributes.xfer; struct xfer_ctl_t *xfer = &xfer_table[ep - USBD->EP]; diff --git a/src/portable/nuvoton/nuc505/dcd_nuc505.c b/src/portable/nuvoton/nuc505/dcd_nuc505.c index 11d71a285..aefb09f4e 100644 --- a/src/portable/nuvoton/nuc505/dcd_nuc505.c +++ b/src/portable/nuvoton/nuc505/dcd_nuc505.c @@ -327,7 +327,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) /* mine the data for the information we need */ int const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress); - int const size = p_endpoint_desc->wMaxPacketSize.size; + int const size = tu_edpt_packet_size(p_endpoint_desc); tusb_xfer_type_t const type = p_endpoint_desc->bmAttributes.xfer; struct xfer_ctl_t *xfer = &xfer_table[ep - USBD->EP]; diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c index ff1997440..8de924f90 100644 --- a/src/portable/nxp/khci/dcd_khci.c +++ b/src/portable/nxp/khci/dcd_khci.c @@ -346,7 +346,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) /* No support for control transfer */ TU_ASSERT(epn && (xfer != TUSB_XFER_CONTROL)); - ep->max_packet_size = ep_desc->wMaxPacketSize.size; + ep->max_packet_size = tu_edpt_packet_size(ep_desc); unsigned val = USB_ENDPT_EPCTLDIS_MASK; val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK: 0; val |= dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK; diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c index 2eae6d0f7..0f500a88f 100644 --- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c +++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c @@ -311,14 +311,15 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) } //------------- Realize Endpoint with Max Packet Size -------------// - set_ep_size(ep_id, p_endpoint_desc->wMaxPacketSize.size); + const uint16_t ep_size = tu_edpt_packet_size(p_endpoint_desc); + set_ep_size(ep_id, ep_size); //------------- first DD prepare -------------// dma_desc_t* const dd = &_dcd.dd[ep_id]; tu_memclr(dd, sizeof(dma_desc_t)); dd->isochronous = (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) ? 1 : 0; - dd->max_packet_size = p_endpoint_desc->wMaxPacketSize.size; + dd->max_packet_size = ep_size; dd->retired = 1; // invalid at first sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS + ep_id, 1, 0); // clear all endpoint status diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c index 0f58cceb9..5ac041fbf 100644 --- a/src/portable/nxp/transdimension/dcd_transdimension.c +++ b/src/portable/nxp/transdimension/dcd_transdimension.c @@ -365,7 +365,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) tu_memclr(p_qhd, sizeof(dcd_qhd_t)); p_qhd->zero_length_termination = 1; - p_qhd->max_packet_size = p_endpoint_desc->wMaxPacketSize.size; + p_qhd->max_packet_size = tu_edpt_packet_size(p_endpoint_desc); if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) { p_qhd->iso_mult = 1; diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c index bcee34938..daa8075b7 100644 --- a/src/portable/ohci/ohci.c +++ b/src/portable/ohci/ohci.c @@ -412,7 +412,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const } TU_ASSERT(p_ed); - ed_init( p_ed, dev_addr, ep_desc->wMaxPacketSize.size, ep_desc->bEndpointAddress, + ed_init( p_ed, dev_addr, tu_edpt_packet_size(ep_desc), ep_desc->bEndpointAddress, ep_desc->bmAttributes.xfer, ep_desc->bInterval ); // control of dev0 is used as static async head diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index 4bcc9ca54..e084478e0 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -426,7 +426,7 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * re bool dcd_edpt_open (__unused uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) { assert(rhport == 0); - hw_endpoint_init(desc_edpt->bEndpointAddress, desc_edpt->wMaxPacketSize.size, desc_edpt->bmAttributes.xfer); + hw_endpoint_init(desc_edpt->bEndpointAddress, tu_edpt_packet_size(desc_edpt), desc_edpt->bmAttributes.xfer); return true; } diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index 5e5bb4906..627e957e8 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -454,7 +454,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const _hw_endpoint_init(ep, dev_addr, ep_desc->bEndpointAddress, - ep_desc->wMaxPacketSize.size, + tu_edpt_packet_size(ep_desc), ep_desc->bmAttributes.xfer, ep_desc->bInterval); diff --git a/src/portable/renesas/usba/dcd_usba.c b/src/portable/renesas/usba/dcd_usba.c index 07d3ba898..ae7d2fd0c 100644 --- a/src/portable/renesas/usba/dcd_usba.c +++ b/src/portable/renesas/usba/dcd_usba.c @@ -695,7 +695,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) const unsigned dir = tu_edpt_dir(ep_addr); const unsigned xfer = ep_desc->bmAttributes.xfer; - const unsigned mps = tu_le16toh(ep_desc->wMaxPacketSize.size); + const unsigned mps = tu_edpt_packet_size(ep_desc); if (xfer == TUSB_XFER_ISOCHRONOUS && mps > 256) { /* USBa supports up to 256 bytes */ return false; diff --git a/src/portable/silabs/efm32/dcd_efm32.c b/src/portable/silabs/efm32/dcd_efm32.c index 3bef83408..ccae113a3 100644 --- a/src/portable/silabs/efm32/dcd_efm32.c +++ b/src/portable/silabs/efm32/dcd_efm32.c @@ -393,18 +393,17 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress); uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress); - TU_ASSERT(p_endpoint_desc->wMaxPacketSize.size <= 64); TU_ASSERT(epnum < EP_COUNT); TU_ASSERT(epnum != 0); xfer_ctl_t *xfer = XFER_CTL_BASE(epnum, dir); - xfer->max_size = p_endpoint_desc->wMaxPacketSize.size; + xfer->max_size = tu_edpt_packet_size(p_endpoint_desc); if(dir == TUSB_DIR_OUT) { USB->DOEP[epnum - 1].CTL |= USB_DOEP_CTL_USBACTEP | (p_endpoint_desc->bmAttributes.xfer << _USB_DOEP_CTL_EPTYPE_SHIFT) | - (p_endpoint_desc->wMaxPacketSize.size << _USB_DOEP_CTL_MPS_SHIFT); + (xfer->max_size << _USB_DOEP_CTL_MPS_SHIFT); USB->DAINTMSK |= (1 << (_USB_DAINTMSK_OUTEPMSK0_SHIFT + epnum)); } else @@ -417,7 +416,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) (fifo_num << _USB_DIEP_CTL_TXFNUM_SHIFT) | (p_endpoint_desc->bmAttributes.xfer << _USB_DIEP_CTL_EPTYPE_SHIFT) | ((p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS) ? USB_DIEP_CTL_SETD0PIDEF : 0) | - (p_endpoint_desc->wMaxPacketSize.size << 0); + (xfer->max_size << 0); USB->DAINTMSK |= (1 << epnum); diff --git a/src/portable/sony/cxd56/dcd_cxd56.c b/src/portable/sony/cxd56/dcd_cxd56.c index 1b8a789a4..dfe409383 100644 --- a/src/portable/sony/cxd56/dcd_cxd56.c +++ b/src/portable/sony/cxd56/dcd_cxd56.c @@ -257,6 +257,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *p_endpoint_desc) uint8_t epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress); uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress); uint8_t xfrtype = 0; + uint16_t const ep_mps = tu_edpt_packet_size(p_endpoint_desc); + struct usb_epdesc_s epdesc; if (epnum >= CXD56_EPNUM) @@ -287,7 +289,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *p_endpoint_desc) usbdcd_driver.req[epnum] = EP_ALLOCREQ(usbdcd_driver.ep[epnum]); if (usbdcd_driver.req[epnum] != NULL) { - usbdcd_driver.req[epnum]->len = p_endpoint_desc->wMaxPacketSize.size; + usbdcd_driver.req[epnum]->len = ep_mps; } else { @@ -300,8 +302,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *p_endpoint_desc) epdesc.type = p_endpoint_desc->bDescriptorType; epdesc.addr = p_endpoint_desc->bEndpointAddress; epdesc.attr = xfrtype; - epdesc.mxpacketsize[0] = LSBYTE(p_endpoint_desc->wMaxPacketSize.size); - epdesc.mxpacketsize[1] = MSBYTE(p_endpoint_desc->wMaxPacketSize.size); + epdesc.mxpacketsize[0] = LSBYTE(ep_mps); + epdesc.mxpacketsize[1] = MSBYTE(ep_mps); epdesc.interval = p_endpoint_desc->bInterval; if (EP_CONFIGURE(usbdcd_driver.ep[epnum], &epdesc, false) < 0) diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index ccffa42d7..ca6564d46 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -394,7 +394,7 @@ static const tusb_desc_endpoint_t ep0OUT_desc = .bEndpointAddress = 0x00, .bmAttributes = { .xfer = TUSB_XFER_CONTROL }, - .wMaxPacketSize = { .size = CFG_TUD_ENDPOINT0_SIZE }, + .wMaxPacketSize = CFG_TUD_ENDPOINT0_SIZE, .bInterval = 0 }; @@ -405,7 +405,7 @@ static const tusb_desc_endpoint_t ep0IN_desc = .bEndpointAddress = 0x80, .bmAttributes = { .xfer = TUSB_XFER_CONTROL }, - .wMaxPacketSize = { .size = CFG_TUD_ENDPOINT0_SIZE }, + .wMaxPacketSize = CFG_TUD_ENDPOINT0_SIZE, .bInterval = 0 }; @@ -741,7 +741,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc (void)rhport; uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress); uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress); - const uint16_t epMaxPktSize = p_endpoint_desc->wMaxPacketSize.size; + const uint16_t epMaxPktSize = tu_edpt_packet_size(p_endpoint_desc); uint16_t pma_addr; uint32_t wType; @@ -778,19 +778,19 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc // or being double-buffered (bulk endpoints) pcd_clear_ep_kind(USB,0); - pma_addr = dcd_pma_alloc(p_endpoint_desc->bEndpointAddress, p_endpoint_desc->wMaxPacketSize.size); + pma_addr = dcd_pma_alloc(p_endpoint_desc->bEndpointAddress, epMaxPktSize); if(dir == TUSB_DIR_IN) { *pcd_ep_tx_address_ptr(USB, epnum) = pma_addr; - pcd_set_ep_tx_cnt(USB, epnum, p_endpoint_desc->wMaxPacketSize.size); + pcd_set_ep_tx_cnt(USB, epnum, epMaxPktSize); pcd_clear_tx_dtog(USB, epnum); pcd_set_ep_tx_status(USB,epnum,USB_EP_TX_NAK); } else { *pcd_ep_rx_address_ptr(USB, epnum) = pma_addr; - pcd_set_ep_rx_cnt(USB, epnum, p_endpoint_desc->wMaxPacketSize.size); + pcd_set_ep_rx_cnt(USB, epnum, epMaxPktSize); pcd_clear_rx_dtog(USB, epnum); pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_NAK); } diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index 29030784b..4e2bbd076 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -622,10 +622,10 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) TU_ASSERT(epnum < EP_MAX); xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir); - xfer->max_size = desc_edpt->wMaxPacketSize.size; + xfer->max_size = tu_edpt_packet_size(desc_edpt); xfer->interval = desc_edpt->bInterval; - uint16_t const fifo_size = (desc_edpt->wMaxPacketSize.size + 3) / 4; // Round up to next full word + uint16_t const fifo_size = (xfer->max_size + 3) / 4; // Round up to next full word if(dir == TUSB_DIR_OUT) { @@ -644,7 +644,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) out_ep[epnum].DOEPCTL |= (1 << USB_OTG_DOEPCTL_USBAEP_Pos) | (desc_edpt->bmAttributes.xfer << USB_OTG_DOEPCTL_EPTYP_Pos) | (desc_edpt->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS ? USB_OTG_DOEPCTL_SD0PID_SEVNFRM : 0) | - (desc_edpt->wMaxPacketSize.size << USB_OTG_DOEPCTL_MPSIZ_Pos); + (xfer->max_size << USB_OTG_DOEPCTL_MPSIZ_Pos); dev->DAINTMSK |= (1 << (USB_OTG_DAINTMSK_OEPM_Pos + epnum)); } @@ -686,7 +686,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) (epnum << USB_OTG_DIEPCTL_TXFNUM_Pos) | (desc_edpt->bmAttributes.xfer << USB_OTG_DIEPCTL_EPTYP_Pos) | (desc_edpt->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS ? USB_OTG_DIEPCTL_SD0PID_SEVNFRM : 0) | - (desc_edpt->wMaxPacketSize.size << USB_OTG_DIEPCTL_MPSIZ_Pos); + (xfer->max_size << USB_OTG_DIEPCTL_MPSIZ_Pos); dev->DAINTMSK |= (1 << (USB_OTG_DAINTMSK_IEPM_Pos + epnum)); } diff --git a/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c b/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c index ee85f0a77..7a2a0156f 100644 --- a/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c +++ b/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c @@ -242,7 +242,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) } xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir); - xfer->max_size = desc_edpt->wMaxPacketSize.size; + xfer->max_size = tu_edpt_packet_size(desc_edpt); // Buffer allocation scheme: // For simplicity, only single buffer for now, since tinyusb currently waits @@ -275,7 +275,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) // Also, DBUF got set on OUT EP 2 while debugging. Only OUT EPs seem to be // affected at this time. USB RAM directly precedes main RAM; perhaps I'm // overwriting registers via buffer overflow w/ my debugging code? - ep_regs[SIZXY] = desc_edpt->wMaxPacketSize.size; + ep_regs[SIZXY] = tu_edpt_packet_size(desc_edpt); ep_regs[BCTX] |= NAK; ep_regs[BBAX] = buf_base; ep_regs[CNF] &= ~(TOGGLE | STALL | DBUF); // ISO xfers not supported on diff --git a/src/tusb.c b/src/tusb.c index fc1936c3d..9583f509d 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -69,7 +69,7 @@ bool tusb_inited(void) bool tu_edpt_validate(tusb_desc_endpoint_t const * desc_ep, tusb_speed_t speed) { - uint16_t const max_packet_size = tu_le16toh(desc_ep->wMaxPacketSize.size); + uint16_t const max_packet_size = tu_edpt_packet_size(desc_ep); TU_LOG2(" Open EP %02X with Size = %u\r\n", desc_ep->bEndpointAddress, max_packet_size); switch (desc_ep->bmAttributes.xfer) -- cgit v1.3.1 From a0202df920889b57f79560760f6a38632e52c364 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 25 Oct 2021 13:49:59 +0700 Subject: add TU_ARGS_APPLY(), TU_CHECK_MCU() now could check list of mcus --- src/common/tusb_common.h | 31 ------------------------------- src/common/tusb_compiler.h | 40 ++++++++++++++++++++++++++++++++++++++++ src/tusb_option.h | 9 ++++++++- 3 files changed, 48 insertions(+), 32 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index fc92654b7..bf9641622 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -235,37 +235,6 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16 (void* mem, ui #endif -/*------------------------------------------------------------------*/ -/* Count number of arguments of __VA_ARGS__ - * - reference https://groups.google.com/forum/#!topic/comp.std.c/d-6Mj5Lko_s - * - _GET_NTH_ARG() takes args >= N (64) but only expand to Nth one (64th) - * - _RSEQ_N() is reverse sequential to N to add padding to have - * Nth position is the same as the number of arguments - * - ##__VA_ARGS__ is used to deal with 0 paramerter (swallows comma) - *------------------------------------------------------------------*/ -#ifndef TU_ARGS_NUM - -#define TU_ARGS_NUM(...) _TU_NARG(_0, ##__VA_ARGS__,_RSEQ_N()) - -#define _TU_NARG(...) _GET_NTH_ARG(__VA_ARGS__) -#define _GET_NTH_ARG( \ - _1, _2, _3, _4, _5, _6, _7, _8, _9,_10, \ - _11,_12,_13,_14,_15,_16,_17,_18,_19,_20, \ - _21,_22,_23,_24,_25,_26,_27,_28,_29,_30, \ - _31,_32,_33,_34,_35,_36,_37,_38,_39,_40, \ - _41,_42,_43,_44,_45,_46,_47,_48,_49,_50, \ - _51,_52,_53,_54,_55,_56,_57,_58,_59,_60, \ - _61,_62,_63,N,...) N -#define _RSEQ_N() \ - 62,61,60, \ - 59,58,57,56,55,54,53,52,51,50, \ - 49,48,47,46,45,44,43,42,41,40, \ - 39,38,37,36,35,34,33,32,31,30, \ - 29,28,27,26,25,24,23,22,21,20, \ - 19,18,17,16,15,14,13,12,11,10, \ - 9,8,7,6,5,4,3,2,1,0 -#endif - // To be removed //------------- Binary constant -------------// #if defined(__GNUC__) && !defined(__CC_ARM) diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 3e85939b0..b0999b5d9 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -67,6 +67,46 @@ #define TU_LITTLE_ENDIAN (0x12u) #define TU_BIG_ENDIAN (0x21u) +/*------------------------------------------------------------------*/ +/* Count number of arguments of __VA_ARGS__ + * - reference https://groups.google.com/forum/#!topic/comp.std.c/d-6Mj5Lko_s + * - _GET_NTH_ARG() takes args >= N (64) but only expand to Nth one (64th) + * - _RSEQ_N() is reverse sequential to N to add padding to have + * Nth position is the same as the number of arguments + * - ##__VA_ARGS__ is used to deal with 0 paramerter (swallows comma) + *------------------------------------------------------------------*/ +#define TU_ARGS_NUM(...) _TU_NARG(_0, ##__VA_ARGS__,_RSEQ_N()) + +#define _TU_NARG(...) _GET_NTH_ARG(__VA_ARGS__) +#define _GET_NTH_ARG( \ + _1, _2, _3, _4, _5, _6, _7, _8, _9,_10, \ + _11,_12,_13,_14,_15,_16,_17,_18,_19,_20, \ + _21,_22,_23,_24,_25,_26,_27,_28,_29,_30, \ + _31,_32,_33,_34,_35,_36,_37,_38,_39,_40, \ + _41,_42,_43,_44,_45,_46,_47,_48,_49,_50, \ + _51,_52,_53,_54,_55,_56,_57,_58,_59,_60, \ + _61,_62,_63,N,...) N +#define _RSEQ_N() \ + 62,61,60, \ + 59,58,57,56,55,54,53,52,51,50, \ + 49,48,47,46,45,44,43,42,41,40, \ + 39,38,37,36,35,34,33,32,31,30, \ + 29,28,27,26,25,24,23,22,21,20, \ + 19,18,17,16,15,14,13,12,11,10, \ + 9,8,7,6,5,4,3,2,1,0 + +// Apply an macro X to each of the arguments with an separated of choice +#define TU_ARGS_APPLY(_X, _s, ...) TU_XSTRCAT(_TU_ARGS_APPLY_, TU_ARGS_NUM(__VA_ARGS__))(_X, _s, __VA_ARGS__) + +#define _TU_ARGS_APPLY_1(_X, _s, _a1) _X(_a1) +#define _TU_ARGS_APPLY_2(_X, _s, _a1, _a2) _X(_a1) _s _X(_a2) +#define _TU_ARGS_APPLY_3(_X, _s, _a1, _a2, _a3) _X(_a1) _s _TU_ARGS_APPLY_2(_X, _s, _a2, _a3) +#define _TU_ARGS_APPLY_4(_X, _s, _a1, _a2, _a3, _a4) _X(_a1) _s _TU_ARGS_APPLY_3(_X, _s, _a2, _a3, _a4) +#define _TU_ARGS_APPLY_5(_X, _s, _a1, _a2, _a3, _a4, _a5) _X(_a1) _s _TU_ARGS_APPLY_4(_X, _s, _a2, _a3, _a4, _a5) +#define _TU_ARGS_APPLY_6(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6) _X(_a1) _s _TU_ARGS_APPLY_5(_X, _s, _a2, _a3, _a4, _a5, _a6) +#define _TU_ARGS_APPLY_7(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7) _X(_a1) _s _TU_ARGS_APPLY_6(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7) +#define _TU_ARGS_APPLY_8(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7, _a8) _X(_a1) _s _TU_ARGS_APPLY_7(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7, _a8) + //--------------------------------------------------------------------+ // Compiler porting with Attribute and Endian //--------------------------------------------------------------------+ diff --git a/src/tusb_option.h b/src/tusb_option.h index e49fc0119..89d83472b 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -27,6 +27,8 @@ #ifndef _TUSB_OPTION_H_ #define _TUSB_OPTION_H_ +#include "common/tusb_compiler.h" + #define TUSB_VERSION_MAJOR 0 #define TUSB_VERSION_MINOR 12 #define TUSB_VERSION_REVISION 0 @@ -36,7 +38,6 @@ // Supported MCUs // CFG_TUSB_MCU must be defined to one of following value //--------------------------------------------------------------------+ -#define TU_CHECK_MCU(_m) (CFG_TUSB_MCU == OPT_MCU_##_m) #define OPT_MCU_NONE 0 @@ -126,6 +127,12 @@ // GigaDevice #define OPT_MCU_GD32VF103 1600 ///< GigaDevice GD32VF103 + +// Helper to check if configured MCU is one of listed +// Apply _TU_CHECK_MCU with || as separator to list of input +#define _TU_CHECK_MCU(_m) (CFG_TUSB_MCU == OPT_MCU_##_m) +#define TU_CHECK_MCU(...) TU_ARGS_APPLY(_TU_CHECK_MCU, ||, __VA_ARGS__) + //--------------------------------------------------------------------+ // Supported OS //--------------------------------------------------------------------+ -- cgit v1.3.1 From dbd31895bc234ff6d76d3fe736dc613890ab7acb Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 25 Oct 2021 17:04:03 +0700 Subject: change usage of TU_CHECK_MCU() to prevent macro conflict --- .../audio_4_channel_mic/src/usb_descriptors.c | 12 ++-- examples/device/audio_test/src/usb_descriptors.c | 2 +- examples/device/cdc_msc_freertos/src/main.c | 6 +- examples/device/cdc_msc_freertos/src/tusb_config.h | 2 +- examples/device/hid_composite_freertos/src/main.c | 6 +- .../hid_composite_freertos/src/tusb_config.h | 2 +- .../device/video_capture/src/usb_descriptors.c | 4 +- src/class/msc/msc_device.c | 2 +- src/common/tusb_compiler.h | 2 +- src/device/dcd_attr.h | 73 +++++++++++----------- src/host/hcd_attr.h | 46 +++++++------- src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 11 ++-- src/portable/synopsys/dwc2/dcd_dwc2.c | 6 +- src/tusb_option.h | 2 +- 14 files changed, 85 insertions(+), 91 deletions(-) (limited to 'src/common') diff --git a/examples/device/audio_4_channel_mic/src/usb_descriptors.c b/examples/device/audio_4_channel_mic/src/usb_descriptors.c index b6a5bd5c2..93ae2ea47 100644 --- a/examples/device/audio_4_channel_mic/src/usb_descriptors.c +++ b/examples/device/audio_4_channel_mic/src/usb_descriptors.c @@ -81,12 +81,12 @@ enum #define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + CFG_TUD_AUDIO * TUD_AUDIO_MIC_FOUR_CH_DESC_LEN) -#if TU_CHECK_MCU(LPC175X_6X) || TU_CHECK_MCU(LPC177X_8X) || TU_CHECK_MCU(LPC40XX) +#if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ... #define EPNUM_AUDIO 0x03 -#elif TU_CHECK_MCU(NRF5X) +#elif TU_CHECK_MCU(OPT_MCU_NRF5X) // nRF5x ISO can only be endpoint 8 #define EPNUM_AUDIO 0x08 @@ -96,11 +96,11 @@ enum uint8_t const desc_configuration[] = { - // Interface count, string index, total length, attribute, power in mA - TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100), + // Interface count, string index, total length, attribute, power in mA + TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100), - // Interface number, string index, EP Out & EP In address, EP size - TUD_AUDIO_MIC_FOUR_CH_DESCRIPTOR(/*_itfnum*/ ITF_NUM_AUDIO_CONTROL, /*_stridx*/ 0, /*_nBytesPerSample*/ CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX, /*_nBitsUsedPerSample*/ CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX*8, /*_epin*/ 0x80 | EPNUM_AUDIO, /*_epsize*/ CFG_TUD_AUDIO_EP_SZ_IN) + // Interface number, string index, EP Out & EP In address, EP size + TUD_AUDIO_MIC_FOUR_CH_DESCRIPTOR(/*_itfnum*/ ITF_NUM_AUDIO_CONTROL, /*_stridx*/ 0, /*_nBytesPerSample*/ CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX, /*_nBitsUsedPerSample*/ CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX*8, /*_epin*/ 0x80 | EPNUM_AUDIO, /*_epsize*/ CFG_TUD_AUDIO_EP_SZ_IN) }; // Invoked when received GET CONFIGURATION DESCRIPTOR diff --git a/examples/device/audio_test/src/usb_descriptors.c b/examples/device/audio_test/src/usb_descriptors.c index 348f5eede..09b2a2d45 100644 --- a/examples/device/audio_test/src/usb_descriptors.c +++ b/examples/device/audio_test/src/usb_descriptors.c @@ -86,7 +86,7 @@ enum // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ... #define EPNUM_AUDIO 0x03 -#elif TU_CHECK_MCU(NRF5X) +#elif TU_CHECK_MCU(OPT_MCU_NRF5X) // nRF5x ISO can only be endpoint 8 #define EPNUM_AUDIO 0x08 diff --git a/examples/device/cdc_msc_freertos/src/main.c b/examples/device/cdc_msc_freertos/src/main.c index 65b7fda3b..2d3426f1d 100644 --- a/examples/device/cdc_msc_freertos/src/main.c +++ b/examples/device/cdc_msc_freertos/src/main.c @@ -30,7 +30,7 @@ #include "bsp/board.h" #include "tusb.h" -#if TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3) +#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) // ESP-IDF need "freertos/" prefix in include path. // CFG_TUSB_OS_INC_PATH should be defined accordingly. #include "freertos/FreeRTOS.h" @@ -105,14 +105,14 @@ int main(void) (void) xTaskCreateStatic( cdc_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, cdc_stack, &cdc_taskdef); // skip starting scheduler (and return) for ESP32-S2 or ESP32-S3 -#if !( TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3) ) +#if !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) vTaskStartScheduler(); #endif return 0; } -#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3 +#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) void app_main(void) { main(); diff --git a/examples/device/cdc_msc_freertos/src/tusb_config.h b/examples/device/cdc_msc_freertos/src/tusb_config.h index d4bbdee48..55e84c62d 100644 --- a/examples/device/cdc_msc_freertos/src/tusb_config.h +++ b/examples/device/cdc_msc_freertos/src/tusb_config.h @@ -68,7 +68,7 @@ #define CFG_TUSB_OS OPT_OS_FREERTOS // Espressif IDF requires "freertos/" prefix in include path -#if TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3) +#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) #define CFG_TUSB_OS_INC_PATH freertos/ #endif diff --git a/examples/device/hid_composite_freertos/src/main.c b/examples/device/hid_composite_freertos/src/main.c index b25c71f64..336f5d426 100644 --- a/examples/device/hid_composite_freertos/src/main.c +++ b/examples/device/hid_composite_freertos/src/main.c @@ -31,7 +31,7 @@ #include "tusb.h" #include "usb_descriptors.h" -#if TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3) +#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) // ESP-IDF need "freertos/" prefix in include path. // CFG_TUSB_OS_INC_PATH should be defined accordingly. #include "freertos/FreeRTOS.h" @@ -105,14 +105,14 @@ int main(void) (void) xTaskCreateStatic( hid_task, "hid", HID_STACK_SZIE, NULL, configMAX_PRIORITIES-2, hid_stack, &hid_taskdef); // skip starting scheduler (and return) for ESP32-S2 or ESP32-S3 -#if !( TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3) ) +#if !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) vTaskStartScheduler(); #endif return 0; } -#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3 +#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) void app_main(void) { main(); diff --git a/examples/device/hid_composite_freertos/src/tusb_config.h b/examples/device/hid_composite_freertos/src/tusb_config.h index b061dce3f..062f32ac3 100644 --- a/examples/device/hid_composite_freertos/src/tusb_config.h +++ b/examples/device/hid_composite_freertos/src/tusb_config.h @@ -68,7 +68,7 @@ #define CFG_TUSB_OS OPT_OS_FREERTOS // Espressif IDF requires "freertos/" prefix in include path -#if TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3) +#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) #define CFG_TUSB_OS_INC_PATH freertos/ #endif diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c index 404ffe070..da8ec8e89 100644 --- a/examples/device/video_capture/src/usb_descriptors.c +++ b/examples/device/video_capture/src/usb_descriptors.c @@ -77,12 +77,12 @@ uint8_t const * tud_descriptor_device_cb(void) #define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_LEN) -#if TU_CHECK_MCU(LPC175X_6X) || TU_CHECK_MCU(LPC177X_8X) || TU_CHECK_MCU(LPC40XX) +#if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In, 5 Bulk etc ... #define EPNUM_VIDEO_IN 0x83 -#elif TU_CHECK_MCU(NRF5X) +#elif TU_CHECK_MCU(OPT_MCU_NRF5X) // nRF5x ISO can only be endpoint 8 #define EPNUM_VIDEO_IN 0x88 diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index 81522be46..dd490dd68 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -617,7 +617,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t } } - #if TU_CHECK_MCU(CXD56) + #if TU_CHECK_MCU(OPT_MCU_CXD56) // WORKAROUND: cxd56 has its own nuttx usb stack which does not forward Set/ClearFeature(Endpoint) to DCD. // There is no way for us to know when EP is un-stall, therefore we will unconditionally un-stall here and // hope everything will work diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index b0999b5d9..d3284c62a 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -69,7 +69,7 @@ /*------------------------------------------------------------------*/ /* Count number of arguments of __VA_ARGS__ - * - reference https://groups.google.com/forum/#!topic/comp.std.c/d-6Mj5Lko_s + * - reference https://stackoverflow.com/questions/2124339/c-preprocessor-va-args-number-of-arguments * - _GET_NTH_ARG() takes args >= N (64) but only expand to Nth one (64th) * - _RSEQ_N() is reverse sequential to N to add padding to have * Nth position is the same as the number of arguments diff --git a/src/device/dcd_attr.h b/src/device/dcd_attr.h index ddec481a8..54627eaa0 100644 --- a/src/device/dcd_attr.h +++ b/src/device/dcd_attr.h @@ -36,59 +36,59 @@ // - PORT_HIGHSPEED: mask to indicate which port support highspeed mode, bit0 for port0 and so on. //------------- NXP -------------// -#if TU_CHECK_MCU(LPC11UXX, LPC13XX, LPC15XX) +#if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) #define DCD_ATTR_ENDPOINT_MAX 5 -#elif TU_CHECK_MCU(LPC175X_6X, LPC177X_8X, LPC40XX) +#elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) #define DCD_ATTR_ENDPOINT_MAX 16 -#elif TU_CHECK_MCU(LPC18XX, LPC43XX) +#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) // TODO USB0 has 6, USB1 has 4 #define DCD_ATTR_ENDPOINT_MAX 6 -#elif TU_CHECK_MCU(LPC51UXX) +#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX) #define DCD_ATTR_ENDPOINT_MAX 5 -#elif TU_CHECK_MCU(LPC54XXX) +#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX) // TODO USB0 has 5, USB1 has 6 #define DCD_ATTR_ENDPOINT_MAX 6 -#elif TU_CHECK_MCU(LPC55XX) +#elif TU_CHECK_MCU(OPT_MCU_LPC55XX) // TODO USB0 has 5, USB1 has 6 #define DCD_ATTR_ENDPOINT_MAX 6 -#elif TU_CHECK_MCU(MIMXRT10XX) +#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX) #define DCD_ATTR_ENDPOINT_MAX 8 -#elif TU_CHECK_MCU(MKL25ZXX, K32L2BXX) +#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX) #define DCD_ATTR_ENDPOINT_MAX 16 -#elif TU_CHECK_MCU(MM32F327X) +#elif TU_CHECK_MCU(OPT_MCU_MM32F327X) #define DCD_ATTR_ENDPOINT_MAX 16 //------------- Nordic -------------// -#elif TU_CHECK_MCU(NRF5X) +#elif TU_CHECK_MCU(OPT_MCU_NRF5X) // 8 CBI + 1 ISO #define DCD_ATTR_ENDPOINT_MAX 9 //------------- Microchip -------------// -#elif TU_CHECK_MCU(SAMD21, SAMD51, SAME5X) || \ - TU_CHECK_MCU(SAMD11, SAML21, SAML22) +#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \ + TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22) #define DCD_ATTR_ENDPOINT_MAX 8 -#elif TU_CHECK_MCU(SAMG) +#elif TU_CHECK_MCU(OPT_MCU_SAMG) #define DCD_ATTR_ENDPOINT_MAX 6 #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER -#elif TU_CHECK_MCU(SAMX7X) +#elif TU_CHECK_MCU(OPT_MCU_SAMX7X) #define DCD_ATTR_ENDPOINT_MAX 10 #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER //------------- ST -------------// -#elif TU_CHECK_MCU(STM32F0) +#elif TU_CHECK_MCU(OPT_MCU_STM32F0) #define DCD_ATTR_ENDPOINT_MAX 8 -#elif TU_CHECK_MCU(STM32F1) +#elif TU_CHECK_MCU(OPT_MCU_STM32F1) #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \ defined (STM32F107xB) || defined (STM32F107xC) #define DCD_ATTR_ENDPOINT_MAX 4 @@ -97,32 +97,32 @@ #define DCD_ATTR_ENDPOINT_MAX 8 #endif -#elif TU_CHECK_MCU(STM32F2) +#elif TU_CHECK_MCU(OPT_MCU_STM32F2) // FS has 4 ep, HS has 5 ep #define DCD_ATTR_ENDPOINT_MAX 6 #define DCD_ATTR_DWC2_STM32 -#elif TU_CHECK_MCU(STM32F3) +#elif TU_CHECK_MCU(OPT_MCU_STM32F3) #define DCD_ATTR_ENDPOINT_MAX 8 -#elif TU_CHECK_MCU(STM32F4) +#elif TU_CHECK_MCU(OPT_MCU_STM32F4) // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9 #define DCD_ATTR_ENDPOINT_MAX 6 #define DCD_ATTR_DWC2_STM32 -#elif TU_CHECK_MCU(STM32F7) +#elif TU_CHECK_MCU(OPT_MCU_STM32F7) // FS has 6, HS has 9 #define DCD_ATTR_ENDPOINT_MAX 9 #define DCD_ATTR_DWC2_STM32 -#elif TU_CHECK_MCU(STM32H7) +#elif TU_CHECK_MCU(OPT_MCU_STM32H7) #define DCD_ATTR_ENDPOINT_MAX 9 #define DCD_ATTR_DWC2_STM32 -#elif TU_CHECK_MCU(STM32L0, STM32L1) +#elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1) #define DCD_ATTR_ENDPOINT_MAX 8 -#elif TU_CHECK_MCU(STM32L4) +#elif TU_CHECK_MCU(OPT_MCU_STM32L4) #if defined (STM32L475xx) || defined (STM32L476xx) || \ defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \ defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \ @@ -134,53 +134,50 @@ #endif //------------- Sony -------------// -#elif TU_CHECK_MCU(CXD56) +#elif TU_CHECK_MCU(OPT_MCU_CXD56) #define DCD_ATTR_ENDPOINT_MAX 7 #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER //------------- TI -------------// -#elif TU_CHECK_MCU(MSP430x5xx) +#elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx) #define DCD_ATTR_ENDPOINT_MAX 8 //------------- ValentyUSB -------------// -#elif TU_CHECK_MCU(VALENTYUSB_EPTRI) +#elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI) #define DCD_ATTR_ENDPOINT_MAX 16 //------------- Nuvoton -------------// -#elif TU_CHECK_MCU(NUC121) || TU_CHECK_MCU(NUC126) +#elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126) #define DCD_ATTR_ENDPOINT_MAX 8 -#elif TU_CHECK_MCU(NUC120) +#elif TU_CHECK_MCU(OPT_MCU_NUC120) #define DCD_ATTR_ENDPOINT_MAX 6 -#elif TU_CHECK_MCU(NUC505) +#elif TU_CHECK_MCU(OPT_MCU_NUC505) #define DCD_ATTR_ENDPOINT_MAX 12 //------------- Espressif -------------// -#elif TU_CHECK_MCU(ESP32S2, ESP32S3) +#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) #define DCD_ATTR_ENDPOINT_MAX 6 //------------- Dialog -------------// -#elif TU_CHECK_MCU(DA1469X) +#elif TU_CHECK_MCU(OPT_MCU_DA1469X) #define DCD_ATTR_ENDPOINT_MAX 4 //------------- Raspberry Pi -------------// -#elif TU_CHECK_MCU(RP2040) +#elif TU_CHECK_MCU(OPT_MCU_RP2040) #define DCD_ATTR_ENDPOINT_MAX 16 //------------- Silabs -------------// -#elif TU_CHECK_MCU(EFM32GG) || TU_CHECK_MCU(EFM32GG11) || TU_CHECK_MCU(EFM32GG12) +#elif TU_CHECK_MCU(OPT_MCU_EFM32GG, OPT_MCU_EFM32GG11, OPT_MCU_EFM32GG12) #define DCD_ATTR_ENDPOINT_MAX 7 //------------- Renesas -------------// -#elif TU_CHECK_MCU(RX63X) || TU_CHECK_MCU(RX65X) || TU_CHECK_MCU(RX72N) +#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) #define DCD_ATTR_ENDPOINT_MAX 10 -//#elif TU_CHECK_MCU(MM32F327X) -// #define DCD_ATTR_ENDPOINT_MAX not known yet - //------------- GigaDevice -------------// -#elif TU_CHECK_MCU(GD32VF103) +#elif TU_CHECK_MCU(OPT_MCU_GD32VF103) #define DCD_ATTR_ENDPOINT_MAX 4 #else diff --git a/src/host/hcd_attr.h b/src/host/hcd_attr.h index 729fc407b..a9bc242d7 100644 --- a/src/host/hcd_attr.h +++ b/src/host/hcd_attr.h @@ -34,64 +34,64 @@ // - PORT_HIGHSPEED: mask to indicate which port support highspeed mode, bit0 for port0 and so on. //------------- NXP -------------// -#if TU_CHECK_MCU(LPC175X_6X) || TU_CHECK_MCU(LPC177X_8X) || TU_CHECK_MCU(LPC40XX) +#if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) #define HCD_ATTR_OHCI -#elif TU_CHECK_MCU(LPC18XX) || TU_CHECK_MCU(LPC43XX) +#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) #define HCD_ATTR_EHCI_TRANSDIMENSION -#elif TU_CHECK_MCU(LPC54XXX) +#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX) // #define HCD_ATTR_EHCI_NXP_PTD -#elif TU_CHECK_MCU(LPC55XX) +#elif TU_CHECK_MCU(OPT_MCU_LPC55XX) // #define HCD_ATTR_EHCI_NXP_PTD -#elif TU_CHECK_MCU(MIMXRT10XX) +#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX) #define HCD_ATTR_EHCI_TRANSDIMENSION -#elif TU_CHECK_MCU(MKL25ZXX) +#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX) //------------- Microchip -------------// -#elif TU_CHECK_MCU(SAMD21) || TU_CHECK_MCU(SAMD51) || TU_CHECK_MCU(SAME5X) || \ - TU_CHECK_MCU(SAMD11) || TU_CHECK_MCU(SAML21) || TU_CHECK_MCU(SAML22) +#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \ + TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22) -#elif TU_CHECK_MCU(SAMG) +#elif TU_CHECK_MCU(OPT_MCU_SAMG) -#elif TU_CHECK_MCU(SAMX7X) +#elif TU_CHECK_MCU(OPT_MCU_SAMX7X) //------------- ST -------------// -#elif TU_CHECK_MCU(STM32F0) || TU_CHECK_MCU(STM32F1) || TU_CHECK_MCU(STM32F3) || \ - TU_CHECK_MCU(STM32L0) || TU_CHECK_MCU(STM32L1) || TU_CHECK_MCU(STM32L4) +#elif TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F1, OPT_MCU_STM32F3) || \ + TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1, OPT_MCU_STM32L4) -#elif TU_CHECK_MCU(STM32F2) || TU_CHECK_MCU(STM32F4) || TU_CHECK_MCU(STM32F3) +#elif TU_CHECK_MCU(OPT_MCU_STM32F2, OPT_MCU_STM32F3, OPT_MCU_STM32F4) -#elif TU_CHECK_MCU(STM32F7) +#elif TU_CHECK_MCU(OPT_MCU_STM32F7) -#elif TU_CHECK_MCU(STM32H7) +#elif TU_CHECK_MCU(OPT_MCU_STM32H7) //------------- Sony -------------// -#elif TU_CHECK_MCU(CXD56) +#elif TU_CHECK_MCU(OPT_MCU_CXD56) //------------- Nuvoton -------------// -#elif TU_CHECK_MCU(NUC505) +#elif TU_CHECK_MCU(OPT_MCU_NUC505) //------------- Espressif -------------// -#elif TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3) +#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) //------------- Raspberry Pi -------------// -#elif TU_CHECK_MCU(RP2040) +#elif TU_CHECK_MCU(OPT_MCU_RP2040) //------------- Silabs -------------// -#elif TU_CHECK_MCU(EFM32GG) || TU_CHECK_MCU(EFM32GG11) || TU_CHECK_MCU(EFM32GG12) +#elif TU_CHECK_MCU(OPT_MCU_EFM32GG, OPT_MCU_EFM32GG11, OPT_MCU_EFM32GG12) //------------- Renesas -------------// -#elif TU_CHECK_MCU(RX63X) || TU_CHECK_MCU(RX65X) || TU_CHECK_MCU(RX72N) +#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) -//#elif TU_CHECK_MCU(MM32F327X) +//#elif TU_CHECK_MCU(OPT_MCU_MM32F327X) // #define DCD_ATTR_ENDPOINT_MAX not known yet //------------- GigaDevice -------------// -#elif TU_CHECK_MCU(GD32VF103) +#elif TU_CHECK_MCU(OPT_MCU_GD32VF103) #else // #warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8" diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index ca6564d46..933f352a2 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -109,13 +109,10 @@ #define STM32F1_FSDEV #endif -#if (TUSB_OPT_DEVICE_ENABLED) && ( \ - (CFG_TUSB_MCU == OPT_MCU_STM32F0 ) || \ - (CFG_TUSB_MCU == OPT_MCU_STM32F1 && defined(STM32F1_FSDEV)) || \ - (CFG_TUSB_MCU == OPT_MCU_STM32F3 ) || \ - (CFG_TUSB_MCU == OPT_MCU_STM32L0 ) || \ - (CFG_TUSB_MCU == OPT_MCU_STM32L1 ) \ - ) +#if TUSB_OPT_DEVICE_ENABLED && \ + ( TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F3, OPT_MCU_STM32L0, OPT_MCU_STM32L1) || \ + (TU_CHECK_MCU(OPT_MCU_STM32F1) && defined(STM32F1_FSDEV)) \ + ) // In order to reduce the dependance on HAL, we undefine this. // Some definitions are copied to our private include file. diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index fca5321f7..7ae10652c 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -31,16 +31,16 @@ #include "device/dcd_attr.h" #if TUSB_OPT_DEVICE_ENABLED && \ - ( defined(DCD_ATTR_DWC2_STM32) || TU_CHECK_MCU(ESP32S2, ESP32S3, GD32VF103) ) + ( defined(DCD_ATTR_DWC2_STM32) || TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_GD32VF103) ) #include "device/dcd.h" #include "dwc2_type.h" #if defined(DCD_ATTR_DWC2_STM32) #include "dwc2_stm32.h" -#elif TU_CHECK_MCU(ESP32S2, ESP32S3) +#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) #include "dwc2_esp32.h" -#elif TU_CHECK_MCU(GD32VF103) +#elif TU_CHECK_MCU(OPT_MCU_GD32VF103) #include "dwc2_gd32.h" #else #error "Unsupported MCUs" diff --git a/src/tusb_option.h b/src/tusb_option.h index d707c44c7..509ff4a3c 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -130,7 +130,7 @@ // Helper to check if configured MCU is one of listed // Apply _TU_CHECK_MCU with || as separator to list of input -#define _TU_CHECK_MCU(_m) (CFG_TUSB_MCU == OPT_MCU_##_m) +#define _TU_CHECK_MCU(_m) (CFG_TUSB_MCU == _m) #define TU_CHECK_MCU(...) (TU_ARGS_APPLY(_TU_CHECK_MCU, ||, __VA_ARGS__)) //--------------------------------------------------------------------+ -- cgit v1.3.1 From bb5dab5c2e81be277214a6704a8d90e89a5b4759 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 26 Oct 2021 22:48:01 +0700 Subject: add hw config struct --- hw/bsp/board.c | 2 +- src/common/tusb_common.h | 4 +- src/portable/synopsys/dwc2/dcd_dwc2.c | 92 +++++++++++-- src/portable/synopsys/dwc2/dwc2_type.h | 234 ++++++++++++++++++++++----------- 4 files changed, 240 insertions(+), 92 deletions(-) (limited to 'src/common') diff --git a/hw/bsp/board.c b/hw/bsp/board.c index 2c18b61b4..afacdef9f 100644 --- a/hw/bsp/board.c +++ b/hw/bsp/board.c @@ -96,7 +96,7 @@ void board_led_task(void) TU_ATTR_USED int sys_write (int fhdl, const void *buf, size_t count) { (void) fhdl; - SEGGER_RTT_Write(0, (char*) buf, (int) count); + SEGGER_RTT_Write(0, (const char*) buf, (int) count); return count; } diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index bf9641622..e62bcde12 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -303,8 +303,8 @@ void tu_print_var(uint8_t const* buf, uint32_t bufsize) #define TU_LOG1 tu_printf #define TU_LOG1_MEM tu_print_mem #define TU_LOG1_VAR(_x) tu_print_var((uint8_t const*)(_x), sizeof(*(_x))) -#define TU_LOG1_INT(_x) tu_printf(#_x " = %ld\r\n", (uint32_t) (_x) ) -#define TU_LOG1_HEX(_x) tu_printf(#_x " = %lX\r\n", (uint32_t) (_x) ) +#define TU_LOG1_INT(_x) tu_printf(#_x " = %ld\r\n", (unsigned long) (_x) ) +#define TU_LOG1_HEX(_x) tu_printf(#_x " = %lX\r\n", (unsigned long) (_x) ) // Log Level 2: Warn #if CFG_TUSB_DEBUG >= 2 diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index 67f84a083..7b02c75cd 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -74,14 +74,14 @@ typedef struct { } xfer_ctl_t; xfer_ctl_t xfer_status[DWC2_EP_MAX][2]; -#define XFER_CTL_BASE(_ep, _dir) &xfer_status[_ep][_dir] +#define XFER_CTL_BASE(_ep, _dir) (&xfer_status[_ep][_dir]) // EP0 transfers are limited to 1 packet - larger sizes has to be split static uint16_t ep0_pending[2]; // Index determines direction as tusb_dir_t type // TX FIFO RAM allocation so far in words - RX FIFO size is readily available from dwc2->grxfsiz static uint16_t _allocated_fifo_words_tx; // TX FIFO size in words (IN EPs) -static bool _out_ep_closed; // Flag to check if RX FIFO size needs an update (reduce its size) +static bool _out_ep_closed; // Flag to check if RX FIFO size needs an update (reduce its size) // Calculate the RX FIFO size according to recommendations from reference manual static inline uint16_t calc_rx_ff_size(uint16_t ep_size) @@ -120,14 +120,15 @@ static void bus_reset(uint8_t rhport) dwc2->dcfg &= ~DCFG_DAD_Msk; // 1. NAK for all OUT endpoints - for(uint8_t n = 0; n < DWC2_EP_MAX; n++) { + for ( uint8_t n = 0; n < DWC2_EP_MAX; n++ ) + { dwc2->epout[n].doepctl |= DOEPCTL_SNAK; } // 2. Un-mask interrupt bits dwc2->daintmsk = (1 << DAINTMSK_OEPM_Pos) | (1 << DAINTMSK_IEPM_Pos); dwc2->doepmsk = DOEPMSK_STUPM | DOEPMSK_XFRCM; - dwc2->diepmsk = DIEPMSK_TOM | DIEPMSK_XFRCM; + dwc2->diepmsk = DIEPMSK_TOM | DIEPMSK_XFRCM; // "USB Data FIFOs" section in reference manual // Peripheral FIFO architecture @@ -188,7 +189,8 @@ static void bus_reset(uint8_t rhport) // Fixed control EP0 size to 64 bytes dwc2->epin[0].diepctl &= ~(0x03 << DIEPCTL_MPSIZ_Pos); - xfer_status[0][TUSB_DIR_OUT].max_size = xfer_status[0][TUSB_DIR_IN].max_size = 64; + xfer_status[0][TUSB_DIR_OUT].max_size = 64; + xfer_status[0][TUSB_DIR_IN ].max_size = 64; dwc2->epout[0].doeptsiz |= (3 << DOEPTSIZ_STUPCNT_Pos); @@ -210,7 +212,7 @@ static void set_speed(uint8_t rhport, tusb_speed_t speed) if ( rhport == 1 ) { - bitvalue = ((TUSB_SPEED_HIGH == speed) ? DCD_HIGH_SPEED : DCD_FULL_SPEED_USE_HS); + bitvalue = (TUSB_SPEED_HIGH == speed ? DCD_HIGH_SPEED : DCD_FULL_SPEED_USE_HS); } else { @@ -287,7 +289,7 @@ static void edpt_schedule_packets(uint8_t rhport, uint8_t const epnum, uint8_t c // A full IN transfer (multiple packets, possibly) triggers XFRC. epin[epnum].dieptsiz = (num_packets << DIEPTSIZ_PKTCNT_Pos) | - ((total_bytes << DIEPTSIZ_XFRSIZ_Pos) & DIEPTSIZ_XFRSIZ_Msk); + ((total_bytes << DIEPTSIZ_XFRSIZ_Pos) & DIEPTSIZ_XFRSIZ_Msk); epin[epnum].diepctl |= DIEPCTL_EPENA | DIEPCTL_CNAK; @@ -311,10 +313,11 @@ static void edpt_schedule_packets(uint8_t rhport, uint8_t const epnum, uint8_t c // A full OUT transfer (multiple packets, possibly) triggers XFRC. epout[epnum].doeptsiz &= ~(DOEPTSIZ_PKTCNT_Msk | DOEPTSIZ_XFRSIZ); epout[epnum].doeptsiz |= (num_packets << DOEPTSIZ_PKTCNT_Pos) | - ((total_bytes << DOEPTSIZ_XFRSIZ_Pos) & DOEPTSIZ_XFRSIZ_Msk); + ((total_bytes << DOEPTSIZ_XFRSIZ_Pos) & DOEPTSIZ_XFRSIZ_Msk); epout[epnum].doepctl |= DOEPCTL_EPENA | DOEPCTL_CNAK; - if ( (epout[epnum].doepctl & DOEPCTL_EPTYP) == DOEPCTL_EPTYP_0 && (XFER_CTL_BASE(epnum, dir))->interval == 1 ) + if ( (epout[epnum].doepctl & DOEPCTL_EPTYP) == DOEPCTL_EPTYP_0 && + XFER_CTL_BASE(epnum, dir)->interval == 1 ) { // Take odd/even bit from frame counter. uint32_t const odd_frame_now = (dwc2->dsts & (1u << DSTS_FNSOF_Pos)); @@ -326,13 +329,82 @@ static void edpt_schedule_packets(uint8_t rhport, uint8_t const epnum, uint8_t c /*------------------------------------------------------------------*/ /* Controller API *------------------------------------------------------------------*/ +void print_dwc2_info(dwc2_regs_t * dwc2) +{ + dwc2_ghwcfg2_t const * hw_cfg2 = &dwc2->ghwcfg2_bm; + dwc2_ghwcfg3_t const * hw_cfg3 = &dwc2->ghwcfg3_bm; + dwc2_ghwcfg4_t const * hw_cfg4 = &dwc2->ghwcfg4_bm; + + TU_LOG_HEX(1, dwc2->guid); + TU_LOG_HEX(1, dwc2->gsnpsid); + TU_LOG_HEX(1, dwc2->ghwcfg1); + + // HW configure 2 + TU_LOG(1, "\r\n"); + TU_LOG_HEX(1, dwc2->ghwcfg2); + TU_LOG_INT(1, hw_cfg2->op_mode ); + TU_LOG_INT(1, hw_cfg2->arch ); + TU_LOG_INT(1, hw_cfg2->point2point ); + TU_LOG_INT(1, hw_cfg2->hs_phy_type ); + TU_LOG_INT(1, hw_cfg2->fs_phy_type ); + TU_LOG_INT(1, hw_cfg2->num_dev_ep ); + TU_LOG_INT(1, hw_cfg2->num_host_ch ); + TU_LOG_INT(1, hw_cfg2->period_channel_support ); + TU_LOG_INT(1, hw_cfg2->enable_dynamic_fifo ); + TU_LOG_INT(1, hw_cfg2->mul_cpu_int ); + TU_LOG_INT(1, hw_cfg2->nperiod_tx_q_depth ); + TU_LOG_INT(1, hw_cfg2->host_period_tx_q_depth ); + TU_LOG_INT(1, hw_cfg2->dev_token_q_depth ); + TU_LOG_INT(1, hw_cfg2->otg_enable_ic_usb ); + + // HW configure 3 + TU_LOG(1, "\r\n"); + TU_LOG_HEX(1, dwc2->ghwcfg3); + TU_LOG_INT(1, hw_cfg3->xfer_size_width ); + TU_LOG_INT(1, hw_cfg3->packet_size_width ); + TU_LOG_INT(1, hw_cfg3->otg_enable ); + TU_LOG_INT(1, hw_cfg3->i2c_enable ); + TU_LOG_INT(1, hw_cfg3->vendor_ctrl_itf ); + TU_LOG_INT(1, hw_cfg3->optional_feature_removed ); + TU_LOG_INT(1, hw_cfg3->synch_reset ); + TU_LOG_INT(1, hw_cfg3->otg_adp_support ); + TU_LOG_INT(1, hw_cfg3->otg_enable_hsic ); + TU_LOG_INT(1, hw_cfg3->otg_bc_support ); + TU_LOG_INT(1, hw_cfg3->lpm_mode ); + TU_LOG_INT(1, hw_cfg3->total_fifo_size ); + + // HW configure 4 + TU_LOG(1, "\r\n"); + TU_LOG_HEX(1, dwc2->ghwcfg4); + TU_LOG_INT(1, hw_cfg4->num_dev_period_in_ep ); + TU_LOG_INT(1, hw_cfg4->power_optimized ); + TU_LOG_INT(1, hw_cfg4->ahb_freq_min ); + TU_LOG_INT(1, hw_cfg4->hibernation ); + TU_LOG_INT(1, hw_cfg4->service_interval_mode ); + TU_LOG_INT(1, hw_cfg4->ipg_isoc_en ); + TU_LOG_INT(1, hw_cfg4->acg_enable ); + TU_LOG_INT(1, hw_cfg4->utmi_phy_data_width ); + TU_LOG_INT(1, hw_cfg4->dev_ctrl_ep_num ); + TU_LOG_INT(1, hw_cfg4->iddg_filter_enabled ); + TU_LOG_INT(1, hw_cfg4->vbus_valid_filter_enabled ); + TU_LOG_INT(1, hw_cfg4->a_valid_filter_enabled ); + TU_LOG_INT(1, hw_cfg4->b_valid_filter_enabled ); + TU_LOG_INT(1, hw_cfg4->dedicated_fifos ); + TU_LOG_INT(1, hw_cfg4->num_dev_in_eps ); + TU_LOG_INT(1, hw_cfg4->dma_desc_enable ); + TU_LOG_INT(1, hw_cfg4->dma_dynamic ); +} + void dcd_init (uint8_t rhport) { // Programming model begins in the last section of the chapter on the USB // peripheral in each Reference Manual. dwc2_regs_t * dwc2 = DWC2_REG(rhport); - // check GSNPSID + // check gsnpsid + //TU_LOG_HEX(1, dwc2->gsnpsid); + + print_dwc2_info(dwc2); // No HNP/SRP (no OTG support), program timeout later. if ( rhport == 1 ) diff --git a/src/portable/synopsys/dwc2/dwc2_type.h b/src/portable/synopsys/dwc2/dwc2_type.h index 5669aa88d..58e628970 100644 --- a/src/portable/synopsys/dwc2/dwc2_type.h +++ b/src/portable/synopsys/dwc2/dwc2_type.h @@ -19,6 +19,27 @@ #include "stdint.h" +/* DWC OTG HW Release versions */ +#define DWC2_CORE_REV_2_71a 0x4f54271a +#define DWC2_CORE_REV_2_72a 0x4f54272a +#define DWC2_CORE_REV_2_80a 0x4f54280a +#define DWC2_CORE_REV_2_90a 0x4f54290a +#define DWC2_CORE_REV_2_91a 0x4f54291a +#define DWC2_CORE_REV_2_92a 0x4f54292a +#define DWC2_CORE_REV_2_94a 0x4f54294a +#define DWC2_CORE_REV_3_00a 0x4f54300a +#define DWC2_CORE_REV_3_10a 0x4f54310a +#define DWC2_CORE_REV_4_00a 0x4f54400a +#define DWC2_CORE_REV_4_20a 0x4f54420a +#define DWC2_FS_IOT_REV_1_00a 0x5531100a +#define DWC2_HS_IOT_REV_1_00a 0x5532100a +#define DWC2_CORE_REV_MASK 0x0000ffff + +/* DWC OTG HW Core ID */ +#define DWC2_OTG_ID 0x4f540000 +#define DWC2_FS_IOT_ID 0x55310000 +#define DWC2_HS_IOT_ID 0x55320000 + #ifdef __cplusplus extern "C" { #endif @@ -37,93 +58,165 @@ typedef struct } HS_PHYC_GlobalTypeDef; #endif +typedef struct TU_ATTR_PACKED +{ + uint32_t op_mode : 3; // 0: HNP and SRP | 1: SRP | 2: non-HNP, non-SRP + uint32_t arch : 2; // 0: slave-only | 1: External DMA | 2: Internal DMA | 3: others + uint32_t point2point : 1; // 0: support hub and split | 1: no hub, no split + uint32_t hs_phy_type : 2; // 0: not supported | 1: UTMI+ | 2: ULPI | 3: UTMI+ and ULPI + uint32_t fs_phy_type : 2; // 0: not supported | 1: dedicated | 2: UTMI+ | 3: ULPI + uint32_t num_dev_ep : 4; // Number of device endpoints (not including EP0) + uint32_t num_host_ch : 4; // Number of host channel + uint32_t period_channel_support : 1; // Support Periodic OUT Host Channel + uint32_t enable_dynamic_fifo : 1; // Dynamic FIFO Sizing Enabled + uint32_t mul_cpu_int : 1; // Multi-Processor Interrupt Enabled + uint32_t reserved21 : 1; + uint32_t nperiod_tx_q_depth : 2; // Non-periodic request queue depth: 0 = 2. 1 = 4, 2 = 8 + uint32_t host_period_tx_q_depth : 2; // Host periodic request queue depth: 0 = 2. 1 = 4, 2 = 8 + uint32_t dev_token_q_depth : 5; // Device IN token sequence learning queue depth: 0-30 + uint32_t otg_enable_ic_usb : 1; // IC_USB mode specified for mode of operation +} dwc2_ghwcfg2_t; + +TU_VERIFY_STATIC(sizeof(dwc2_ghwcfg2_t) == 4, "incorrect size"); + +typedef struct TU_ATTR_PACKED +{ + uint32_t xfer_size_width : 4; // Transfer size counter in bits = 11 + n (max 19 bits) + uint32_t packet_size_width : 3; // Packet size counter in bits = 4 + n (max 10 bits) + uint32_t otg_enable : 1; // 1 is OTG capable + uint32_t i2c_enable : 1; // I2C interface is available + uint32_t vendor_ctrl_itf : 1; // Vendor control interface is available + uint32_t optional_feature_removed : 1; // remove User ID, GPIO, SOF toggle & counter + uint32_t synch_reset : 1; // 0: async reset | 1: synch reset + uint32_t otg_adp_support : 1; // ADP logic is present along with HSOTG controller + uint32_t otg_enable_hsic : 1; // 1: HSIC-capable with shared UTMI PHY interface | 0: non-HSIC + uint32_t otg_bc_support : 1; // support battery charger + uint32_t lpm_mode : 1; // LPC mode + uint32_t total_fifo_size : 16; // DFIFO depth value in terms of 32-bit words +}dwc2_ghwcfg3_t; + +TU_VERIFY_STATIC(sizeof(dwc2_ghwcfg3_t) == 4, "incorrect size"); + +typedef struct TU_ATTR_PACKED +{ + uint32_t num_dev_period_in_ep : 4; // Number of Device Periodic IN Endpoints + uint32_t power_optimized : 1; // Partial Power Down Enabled + uint32_t ahb_freq_min : 1; // 1: minimum of AHB frequency is less than 60 MHz + uint32_t hibernation : 1; // Hibernation feature is enabled + uint32_t reserved7 : 3; + uint32_t service_interval_mode : 1; // Service Interval supported + uint32_t ipg_isoc_en : 1; // IPG ISOC supported + uint32_t acg_enable : 1; // ACG enabled + uint32_t reserved13 : 1; + uint32_t utmi_phy_data_width : 2; // 0: 8 bits | 1: 16 bits | 2: 8/16 software selectable + uint32_t dev_ctrl_ep_num : 4; // Number of Device control endpoints in addition to EP0 + uint32_t iddg_filter_enabled : 1; + uint32_t vbus_valid_filter_enabled : 1; + uint32_t a_valid_filter_enabled : 1; + uint32_t b_valid_filter_enabled : 1; + uint32_t dedicated_fifos : 1; // Dedicated tx fifo for device IN Endpoint is enabled + uint32_t num_dev_in_eps : 4; // Number of Device IN Endpoints including EP0 + uint32_t dma_desc_enable : 1; // scatter/gather DMA configuration + uint32_t dma_dynamic : 1; // Dynamic scatter/gather DMA +}dwc2_ghwcfg4_t; + +TU_VERIFY_STATIC(sizeof(dwc2_ghwcfg4_t) == 4, "incorrect size"); + // Host Channel typedef struct { - volatile uint32_t hcchar; // 500 + 20*ch Host Channel Characteristics Register - volatile uint32_t hcsplt; // 504 + 20*ch Host Channel Split Control Register - volatile uint32_t hcint; // 508 + 20*ch Host Channel Interrupt Register - volatile uint32_t hcintmsk; // 50C + 20*ch Host Channel Interrupt Mask Register - volatile uint32_t hctsiz; // 510 + 20*ch Host Channel Transfer Size Register - volatile uint32_t hcdma; // 514 + 20*ch Host Channel DMA Address Register + volatile uint32_t hcchar; // 500 + 20*ch Host Channel Characteristics + volatile uint32_t hcsplt; // 504 + 20*ch Host Channel Split Control + volatile uint32_t hcint; // 508 + 20*ch Host Channel Interrupt + volatile uint32_t hcintmsk; // 50C + 20*ch Host Channel Interrupt Mask + volatile uint32_t hctsiz; // 510 + 20*ch Host Channel Transfer Size + volatile uint32_t hcdma; // 514 + 20*ch Host Channel DMA Address uint32_t reserved518; // 518 + 20*ch - volatile uint32_t hcdmab; // 51C + 20*ch Host Channel DMA Address Register + volatile uint32_t hcdmab; // 51C + 20*ch Host Channel DMA Address } dwc2_channel_t; // Endpoint IN typedef struct { - volatile uint32_t diepctl; // 900 + 20*ep Device IN Endpoint Control - uint32_t reserved04; // 904 - volatile uint32_t diepint; // 908 + 20*ep Device IN Endpoint Interrupt - uint32_t reserved0c; // 90C - volatile uint32_t dieptsiz; // 910 + 20*ep Device IN Endpoint Transfer Size - volatile uint32_t diepdma; // 914 + 20*ep Device IN Endpoint DMA Address - volatile uint32_t dtxfsts; // 918 + 20*ep Device IN Endpoint Tx FIFO Status - uint32_t reserved1c; // 91C + volatile uint32_t diepctl; // 900 + 20*ep Device IN Endpoint Control + uint32_t reserved04; // 904 + volatile uint32_t diepint; // 908 + 20*ep Device IN Endpoint Interrupt + uint32_t reserved0c; // 90C + volatile uint32_t dieptsiz; // 910 + 20*ep Device IN Endpoint Transfer Size + volatile uint32_t diepdma; // 914 + 20*ep Device IN Endpoint DMA Address + volatile uint32_t dtxfsts; // 918 + 20*ep Device IN Endpoint Tx FIFO Status + uint32_t reserved1c; // 91C } dwc2_epin_t; // Endpoint OUT typedef struct { - volatile uint32_t doepctl; // B00 + 20*ep Device OUT Endpoint Control - uint32_t reserved04; // B04 - volatile uint32_t doepint; // B08 + 20*ep Device OUT Endpoint Interrupt - uint32_t reserved0c; // B0C - volatile uint32_t doeptsiz; // B10 + 20*ep Device OUT Endpoint Transfer Size - volatile uint32_t doepdma; // B14 + 20*ep Device OUT Endpoint DMA Address - uint32_t reserved18[2]; // B18..B1C + volatile uint32_t doepctl; // B00 + 20*ep Device OUT Endpoint Control + uint32_t reserved04; // B04 + volatile uint32_t doepint; // B08 + 20*ep Device OUT Endpoint Interrupt + uint32_t reserved0c; // B0C + volatile uint32_t doeptsiz; // B10 + 20*ep Device OUT Endpoint Transfer Size + volatile uint32_t doepdma; // B14 + 20*ep Device OUT Endpoint DMA Address + uint32_t reserved18[2]; // B18..B1C } dwc2_epout_t; typedef struct { //------------- Core Global -------------// - volatile uint32_t gotgctl; // 000 OTG Control and Status Register - volatile uint32_t gotgint; // 004 OTG Interrupt Register - volatile uint32_t gahbcfg; // 008 AHB Configuration Register - volatile uint32_t gusbcfg; // 00c USB Configuration Register - volatile uint32_t grstctl; // 010 Reset Register - volatile uint32_t gintsts; // 014 Interrupt Register - volatile uint32_t gintmsk; // 018 Interrupt Mask Register - volatile uint32_t grxstsr; // 01c Receive Status Debug Read Register - volatile uint32_t grxstsp; // 020 Receive Status Read/Pop Register - volatile uint32_t grxfsiz; // 024 Receive FIFO Size Register + volatile uint32_t gotgctl; // 000 OTG Control and Status + volatile uint32_t gotgint; // 004 OTG Interrupt + volatile uint32_t gahbcfg; // 008 AHB Configuration + volatile uint32_t gusbcfg; // 00c USB Configuration + volatile uint32_t grstctl; // 010 Reset + volatile uint32_t gintsts; // 014 Interrupt + volatile uint32_t gintmsk; // 018 Interrupt Mask + volatile uint32_t grxstsr; // 01c Receive Status Debug Read + volatile uint32_t grxstsp; // 020 Receive Status Read/Pop + volatile uint32_t grxfsiz; // 024 Receive FIFO Size union { - volatile uint32_t dieptxf0; // 028 EP0 Tx FIFO Size Register - volatile uint32_t gnptxfsiz; // 028 Non-periodic Transmit FIFO Size Register + volatile uint32_t dieptxf0; // 028 EP0 Tx FIFO Size + volatile uint32_t gnptxfsiz; // 028 Non-periodic Transmit FIFO Size }; - volatile uint32_t gnptxsts; // 02c Non-periodic Transmit FIFO/Queue Status Register - volatile uint32_t gi2cctl; // 030 I2C Address Register - volatile uint32_t gpvndctl; // 034 PHY Vendor Control Register + volatile uint32_t gnptxsts; // 02c Non-periodic Transmit FIFO/Queue Status + volatile uint32_t gi2cctl; // 030 I2C Address + volatile uint32_t gpvndctl; // 034 PHY Vendor Control union { - volatile uint32_t ggpio; // 038 General Purpose IO Register + volatile uint32_t ggpio; // 038 General Purpose IO volatile uint32_t stm32_gccfg; // 038 STM32 General Core Configuration }; - volatile uint32_t guid; // 03C User ID Register - volatile uint32_t gsnpsid; // 040 Synopsys ID Register - volatile uint32_t ghwcfg1; // 044 User Hardware Configuration 1 Register - volatile uint32_t ghwcfg2; // 048 User Hardware Configuration 2 Register - volatile uint32_t ghwcfg3; // 04C User Hardware Configuration 3 Register - volatile uint32_t ghwcfg4; // 050 User Hardware Configuration 4 Register - volatile uint32_t glpmcfg; // 054 Core LPM Configuration Register - volatile uint32_t gpwrdn; // 058 Power Down Register - volatile uint32_t gdfifocfg; // 05C DFIFO Software Configuration Register - volatile uint32_t gadpctl; // 060 ADP Timer, Control and Status Register - + volatile uint32_t guid; // 03C User (Application programmable) ID + volatile uint32_t gsnpsid; // 040 Synopsys ID + Release version + volatile uint32_t ghwcfg1; // 044 User Hardware Configuration1: endpoint dir (2 bit per ep) +union { + volatile uint32_t ghwcfg2; // 048 User Hardware Configuration2 + dwc2_ghwcfg2_t ghwcfg2_bm; +}; +union { + volatile uint32_t ghwcfg3; // 04C User Hardware Configuration3 + dwc2_ghwcfg3_t ghwcfg3_bm; +}; +union { + volatile uint32_t ghwcfg4; // 050 User Hardware Configuration4 + dwc2_ghwcfg4_t ghwcfg4_bm; +}; + volatile uint32_t glpmcfg; // 054 Core LPM Configuration + volatile uint32_t gpwrdn; // 058 Power Down + volatile uint32_t gdfifocfg; // 05C DFIFO Software Configuration + volatile uint32_t gadpctl; // 060 ADP Timer, Control and Status uint32_t reserved64[39]; // 064..0FF - volatile uint32_t hptxfsiz; // 100 Host Periodic Tx FIFO Size Register - volatile uint32_t dieptxf[15]; // 104..13C Device Periodic Transmit FIFO Size Register + volatile uint32_t hptxfsiz; // 100 Host Periodic Tx FIFO Size + volatile uint32_t dieptxf[15]; // 104..13C Device Periodic Transmit FIFO Size uint32_t reserved140[176]; // 140..3FF //------------- Host -------------// - volatile uint32_t hcfg; // 400 Host Configuration Register - volatile uint32_t hfir; // 404 Host Frame Interval Register + volatile uint32_t hcfg; // 400 Host Configuration + volatile uint32_t hfir; // 404 Host Frame Interval volatile uint32_t hfnum; // 408 Host Frame Number / Frame Remaining uint32_t reserved40c; // 40C volatile uint32_t hptxsts; // 410 Host Periodic TX FIFO / Queue Status - volatile uint32_t haint; // 414 Host All Channels Interrupt Register + volatile uint32_t haint; // 414 Host All Channels Interrupt volatile uint32_t haintmsk; // 418 Host All Channels Interrupt Mask - volatile uint32_t hflbaddr; // 41C Host Frame List Base Address Register + volatile uint32_t hflbaddr; // 41C Host Frame List Base Address uint32_t reserved420[8]; // 420..43F volatile uint32_t hprt; // 440 Host Port Control and Status uint32_t reserved444[47]; // 444..4FF @@ -133,18 +226,18 @@ union { uint32_t reserved700[64]; // 700..7FF //------------- Device -------------// - volatile uint32_t dcfg; // 800 Device Configuration Register - volatile uint32_t dctl; // 804 Device Control Register - volatile uint32_t dsts; // 808 Device Status Register (RO) + volatile uint32_t dcfg; // 800 Device Configuration + volatile uint32_t dctl; // 804 Device Control + volatile uint32_t dsts; // 808 Device Status (RO) uint32_t reserved80c; // 80C volatile uint32_t diepmsk; // 810 Device IN Endpoint Interrupt Mask volatile uint32_t doepmsk; // 814 Device OUT Endpoint Interrupt Mask volatile uint32_t daint; // 818 Device All Endpoints Interrupt volatile uint32_t daintmsk; // 81C Device All Endpoints Interrupt Mask - volatile uint32_t dtknqr1; // 820 Device IN token sequence learning queue read register1 - volatile uint32_t dtknqr2; // 824 Device IN token sequence learning queue read register2 - volatile uint32_t dvbusdis; // 828 Device VBUS Discharge Time Register - volatile uint32_t dvbuspulse; // 82C Device VBUS Pulsing Time Register + volatile uint32_t dtknqr1; // 820 Device IN token sequence learning queue read1 + volatile uint32_t dtknqr2; // 824 Device IN token sequence learning queue read2 + volatile uint32_t dvbusdis; // 828 Device VBUS Discharge Time + volatile uint32_t dvbuspulse; // 82C Device VBUS Pulsing Time volatile uint32_t dthrctl; // 830 Device threshold Control volatile uint32_t diepempmsk; // 834 Device IN Endpoint FIFO Empty Interrupt Mask volatile uint32_t deachint; // 838 Device Each Endpoint Interrupt @@ -176,23 +269,6 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, epout ) == 0x0B00, "incorrect size"); TU_VERIFY_STATIC(offsetof(dwc2_regs_t, pcgctrl) == 0x0E00, "incorrect size"); TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo ) == 0x1000, "incorrect size"); -//--------------------------------------------------------------------+ -// Register Base Address -//--------------------------------------------------------------------+ - -#define DWC2_GLOBAL_BASE 0x00000000UL -#define DWC2_DEVICE_BASE 0x00000800UL -#define DWC2_IN_ENDPOINT_BASE 0x00000900UL -#define DWC2_OUT_ENDPOINT_BASE 0x00000B00UL -#define DWC2_EP_REG_SIZE 0x00000020UL -#define DWC2_HOST_BASE 0x00000400UL -#define DWC2_HOST_PORT_BASE 0x00000440UL -#define DWC2_HOST_CHANNEL_BASE 0x00000500UL -#define DWC2_HOST_CHANNEL_SIZE 0x00000020UL -#define DWC2_PCGCCTL_BASE 0x00000E00UL -#define DWC2_FIFO_BASE 0x00001000UL -#define DWC2_FIFO_SIZE 0x00001000UL - //--------------------------------------------------------------------+ // Register Bit Definitions //--------------------------------------------------------------------+ -- cgit v1.3.1 From 6c67fc412516950622a13fb34ddc10b64b9b3843 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 29 Oct 2021 00:53:30 +0700 Subject: correctly init hs phy for bcm --- examples/device/cdc_msc/src/tusb_config.h | 5 +- examples/device/hid_composite/src/tusb_config.h | 4 +- src/common/tusb_types.h | 4 +- src/portable/synopsys/dwc2/dcd_dwc2.c | 211 ++++++++++++++---------- src/portable/synopsys/dwc2/dwc2_type.h | 166 +++++++++---------- 5 files changed, 204 insertions(+), 186 deletions(-) (limited to 'src/common') diff --git a/examples/device/cdc_msc/src/tusb_config.h b/examples/device/cdc_msc/src/tusb_config.h index a3802f536..499966cb4 100644 --- a/examples/device/cdc_msc/src/tusb_config.h +++ b/examples/device/cdc_msc/src/tusb_config.h @@ -47,9 +47,8 @@ // RHPort max operational speed can defined by board.mk // Default to Highspeed for MCU with internal HighSpeed PHY (can be port specific), otherwise FullSpeed #ifndef BOARD_DEVICE_RHPORT_SPEED - #if (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || \ - CFG_TUSB_MCU == OPT_MCU_NUC505 || CFG_TUSB_MCU == OPT_MCU_CXD56 || CFG_TUSB_MCU == OPT_MCU_SAMX7X || \ - CFG_TUSB_MCU == OPT_MCU_BCM2711) + #if TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX, OPT_MCU_MIMXRT10XX, OPT_MCU_NUC505) ||\ + TU_CHECK_MCU(OPT_MCU_CXD56, OPT_MCU_SAMX7X, OPT_MCU_BCM2711) #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_HIGH_SPEED #else #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_FULL_SPEED diff --git a/examples/device/hid_composite/src/tusb_config.h b/examples/device/hid_composite/src/tusb_config.h index 868424e6d..8fa5e5cd4 100644 --- a/examples/device/hid_composite/src/tusb_config.h +++ b/examples/device/hid_composite/src/tusb_config.h @@ -47,8 +47,8 @@ // RHPort max operational speed can defined by board.mk // Default to Highspeed for MCU with internal HighSpeed PHY (can be port specific), otherwise FullSpeed #ifndef BOARD_DEVICE_RHPORT_SPEED - #if (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || \ - CFG_TUSB_MCU == OPT_MCU_NUC505 || CFG_TUSB_MCU == OPT_MCU_CXD56 || CFG_TUSB_MCU == OPT_MCU_SAMX7X) + #if TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX, OPT_MCU_MIMXRT10XX, OPT_MCU_NUC505) ||\ + TU_CHECK_MCU(OPT_MCU_CXD56, OPT_MCU_SAMX7X, OPT_MCU_BCM2711) #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_HIGH_SPEED #else #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_FULL_SPEED diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 233def466..5b26f5aec 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -47,8 +47,8 @@ typedef enum { TUSB_SPEED_FULL = 0, - TUSB_SPEED_LOW , - TUSB_SPEED_HIGH, + TUSB_SPEED_LOW = 1, + TUSB_SPEED_HIGH = 2, TUSB_SPEED_INVALID = 0xff, }tusb_speed_t; diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index 0d2766c38..ce9b58e03 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -199,35 +199,6 @@ static void bus_reset(uint8_t rhport) dwc2->gintmsk |= GINTMSK_OEPINT | GINTMSK_IEPINT; } - -static tusb_speed_t get_speed(uint8_t rhport) -{ - (void) rhport; - dwc2_regs_t * dwc2 = DWC2_REG(rhport); - uint32_t const enum_spd = (dwc2->dsts & DSTS_ENUMSPD_Msk) >> DSTS_ENUMSPD_Pos; - return (enum_spd == DCD_HIGH_SPEED) ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL; -} - -static void set_speed(uint8_t rhport, tusb_speed_t speed) -{ - uint32_t bitvalue; - - if ( rhport == 1 ) - { - bitvalue = (TUSB_SPEED_HIGH == speed ? DCD_HIGH_SPEED : DCD_FULL_SPEED_USE_HS); - } - else - { - bitvalue = DCD_FULL_SPEED; - } - - dwc2_regs_t * dwc2 = DWC2_REG(rhport); - - // Clear and set speed bits - dwc2->dcfg &= ~(3 << DCFG_DSPD_Pos); - dwc2->dcfg |= (bitvalue << DCFG_DSPD_Pos); -} - static void edpt_schedule_packets(uint8_t rhport, uint8_t const epnum, uint8_t const dir, uint16_t const num_packets, uint16_t total_bytes) { (void) rhport; @@ -371,90 +342,136 @@ static void reset_core(dwc2_regs_t * dwc2) // wait for device mode ? } -void dcd_init (uint8_t rhport) +static bool has_hs_phy(dwc2_regs_t * dwc2) { - // Programming model begins in the last section of the chapter on the USB - // peripheral in each Reference Manual. - dwc2_regs_t * dwc2 = DWC2_REG(rhport); + return TUD_OPT_HIGH_SPEED && dwc2->ghwcfg2_bm.hs_phy_type != HS_PHY_TYPE_NONE; +} - // Check Synopsys ID, failed if controller is not enabled - uint32_t const gsnpsid = dwc2->gsnpsid & GSNPSID_ID_MASK; - TU_ASSERT(gsnpsid == DWC2_OTG_ID || gsnpsid == DWC2_FS_IOT_ID || gsnpsid == DWC2_HS_IOT_ID, ); +static void phy_fs_init(dwc2_regs_t * dwc2) +{ + TU_LOG1("Fullspeed PHY init\r\n"); - print_dwc2_info(dwc2); + // Select FS PHY + dwc2->gusbcfg |= GUSBCFG_PHYSEL; - // Force device mode - dwc2->gusbcfg = (dwc2->gusbcfg & ~GUSBCFG_FHMOD) | GUSBCFG_FDMOD; + // Reset core after selecting PHY + reset_core(dwc2); - uint32_t const hs_phy_type = dwc2->ghwcfg2_bm.hs_phy_type; + // set turn around + // The values above are calculated for the minimum AHB frequency of 30 MHz. USB turnaround + // time is critical for certification where long cables and 5-Hubs are used, so if + // you need the AHB to run at less than 30 MHz, and if USB turnaround time is not critical, + // these bits can be programmed to a larger value. + dwc2_set_turnaround(dwc2, TUSB_SPEED_FULL); - if( !TUD_OPT_HIGH_SPEED || hs_phy_type == HS_PHY_TYPE_NONE) - { - // max speed is full or core does not support highspeed - TU_LOG2("Fullspeed PHY init\r\n"); + // set max speed + dwc2->dcfg = (dwc2->dcfg & ~DCFG_DSPD_Msk) | (DCFG_DSPD_FS << DCFG_DSPD_Pos); - // Select FS PHY - dwc2->gusbcfg |= GUSBCFG_PHYSEL; + #if defined(DCD_ATTR_DWC2_STM32) + // activate FS PHY on stm32 + dwc2->stm32_gccfg |= STM32_GCCFG_PWRDWN; + #endif +} - // Reset core after selecting PHY - reset_core(dwc2); +static void phy_hs_init(dwc2_regs_t * dwc2) +{ + uint32_t gusbcfg = dwc2->gusbcfg; - #if defined(DCD_ATTR_DWC2_STM32) - // activate FS PHY on stm32 - dwc2->stm32_gccfg |= STM32_GCCFG_PWRDWN; - #endif - }else + // De-select FS PHY + gusbcfg &= ~GUSBCFG_PHYSEL; + + if (dwc2->ghwcfg2_bm.hs_phy_type == HS_PHY_TYPE_ULPI) { - // Highspeed mode + TU_LOG1("Highspeed ULPI PHY init\r\n"); - #if defined(DCD_ATTR_DWC2_STM32) - // Disable STM32 FS PHY - dwc2->stm32_gccfg &= ~STM32_GCCFG_PWRDWN; - #endif + // Select ULPI + gusbcfg |= GUSBCFG_ULPI_UTMI_SEL; - uint32_t gusbcfg = dwc2->gusbcfg; + // ULPI 8-bit interface, single data rate + gusbcfg &= ~(GUSBCFG_PHYIF16 | GUSBCFG_DDRSEL); - // De-select FS PHY - gusbcfg &= ~GUSBCFG_PHYSEL; + // default internal VBUS Indicator and Drive + gusbcfg &= ~(GUSBCFG_ULPIEVBUSD | GUSBCFG_ULPIEVBUSI); - if (hs_phy_type == HS_PHY_TYPE_ULPI) - { - TU_LOG2("Highspeed ULPI PHY init\r\n"); + // Disable FS/LS ULPI + gusbcfg &= ~(GUSBCFG_ULPIFSLS | GUSBCFG_ULPICSM); + }else + { + TU_LOG1("Highspeed UTMI+ PHY init\r\n"); - // Select ULPI - gusbcfg |= GUSBCFG_ULPI_UTMI_SEL; + // Select UTMI+ with 8-bit interface + gusbcfg &= ~(GUSBCFG_ULPI_UTMI_SEL | GUSBCFG_PHYIF16); - // ULPI 8-bit interface, single data rate - gusbcfg &= ~(GUSBCFG_PHYIF16 | GUSBCFG_DDRSEL); + // Set 16-bit interface if supported + if (dwc2->ghwcfg4_bm.utmi_phy_data_width) gusbcfg |= GUSBCFG_PHYIF16; - // default internal VBUS Indicator and Drive - gusbcfg &= ~(GUSBCFG_ULPIEVBUSD | GUSBCFG_ULPIEVBUSI); + #if defined(DCD_ATTR_DWC2_STM32) && defined(USB_HS_PHYC) + dwc2_stm32_utmi_phy_init(dwc2); + #endif + } - // Disable FS/LS ULPI - gusbcfg &= ~(GUSBCFG_ULPIFSLS | GUSBCFG_ULPICSM); - }else - { - TU_LOG2("Highspeed UTMI+ PHY init\r\n"); + // Apply config + dwc2->gusbcfg = gusbcfg; + + #if defined(DCD_ATTR_DWC2_STM32) + // Disable STM32 FS PHY + dwc2->stm32_gccfg &= ~STM32_GCCFG_PWRDWN; + #endif + + // Reset core after selecting PHY + reset_core(dwc2); + + // Set turn-around, must after core reset otherwise it will be clear + // 9 if UTMI interface is 8-bit, 5 if 16-bit + // The values above are calculated for the minimum AHB frequency of 30 MHz. USB turnaround + // time is critical for certification where long cables and 5-Hubs are used, so if + // you need the AHB to run at less than 30 MHz, and if USB turnaround time is not critical, + // these bits can be programmed to a larger value. + gusbcfg &= ~GUSBCFG_TRDT_Msk; + gusbcfg |= (dwc2->ghwcfg4_bm.utmi_phy_data_width ? 5u : 9u) << GUSBCFG_TRDT_Pos; + dwc2->gusbcfg = gusbcfg; // Apply config + + // Set max speed + dwc2->dcfg = (dwc2->dcfg & ~DCFG_DSPD_Msk) | (DCFG_DSPD_HS << DCFG_DSPD_Pos); +} - // Select UTMI+ with 8-bit interface - gusbcfg &= ~(GUSBCFG_ULPI_UTMI_SEL | GUSBCFG_PHYIF16); +void dcd_init (uint8_t rhport) +{ + // Programming model begins in the last section of the chapter on the USB + // peripheral in each Reference Manual. + dwc2_regs_t * dwc2 = DWC2_REG(rhport); - // Set 16-bit interface if supported - if (dwc2->ghwcfg4_bm.utmi_phy_data_width) gusbcfg |= GUSBCFG_PHYIF16; + // Check Synopsys ID, failed if controller is not enabled + uint32_t const gsnpsid = dwc2->gsnpsid & GSNPSID_ID_MASK; + TU_ASSERT(gsnpsid == DWC2_OTG_ID || gsnpsid == DWC2_FS_IOT_ID || gsnpsid == DWC2_HS_IOT_ID, ); - #if defined(DCD_ATTR_DWC2_STM32) && defined(USB_HS_PHYC) - dwc2_stm32_utmi_phy_init(dwc2); - #endif - } + print_dwc2_info(dwc2); - dwc2->gusbcfg = gusbcfg; + // Force device mode + dwc2->gusbcfg = (dwc2->gusbcfg & ~GUSBCFG_FHMOD) | GUSBCFG_FDMOD; - // Reset core after selecting PHY - reset_core(dwc2); + if( !has_hs_phy(dwc2) ) + { + // core does not support highspeed or hs-phy is not present + phy_fs_init(dwc2); + }else + { + // Highspeed + phy_hs_init(dwc2); } + /* Set HS/FS Timeout Calibration to 7 (max available value). + * The number of PHY clocks that the application programs in + * this field is added to the high/full speed interpacket timeout + * duration in the core to account for any additional delays + * introduced by the PHY. This can be required, because the delay + * introduced by the PHY in generating the linestate condition + * can vary from one PHY to another. + */ + // dwc2->gusbcfg |= (7ul << GUSBCFG_TOCAL_Pos); + // Restart PHY clock - dwc2->pcgctrl = 0; + dwc2->pcgctl &= ~(PCGCTL_STOPPCLK | PCGCTL_GATEHCLK | PCGCTL_PWRCLMP | PCGCTL_RSTPDWNMODULE); // Clear all interrupts dwc2->gintsts |= dwc2->gintsts; @@ -468,8 +485,6 @@ void dcd_init (uint8_t rhport) // (non zero-length packet), send STALL back and discard. dwc2->dcfg |= DCFG_NZLSOHSK; - set_speed(rhport, TUD_OPT_HIGH_SPEED ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL); - dwc2->gintmsk |= GINTMSK_USBRST | GINTMSK_ENUMDNEM | GINTMSK_USBSUSPM | GINTMSK_WUIM | GINTMSK_RXFLVLM; @@ -1088,9 +1103,23 @@ void dcd_int_handler(uint8_t rhport) dwc2->gintsts = GINTSTS_ENUMDNE; - tusb_speed_t const speed = get_speed(rhport); + tusb_speed_t speed; + switch ((dwc2->dsts & DSTS_ENUMSPD_Msk) >> DSTS_ENUMSPD_Pos) + { + case DSTS_ENUMSPD_HS: + speed = TUSB_SPEED_HIGH; + break; + + case DSTS_ENUMSPD_FS_HSPHY: + case DSTS_ENUMSPD_FS: + speed = TUSB_SPEED_FULL; + break; + + case DSTS_ENUMSPD_LS: + speed = TUSB_SPEED_LOW; + break; + } - dwc2_set_turnaround(dwc2, speed); dcd_event_bus_reset(rhport, speed, true); } diff --git a/src/portable/synopsys/dwc2/dwc2_type.h b/src/portable/synopsys/dwc2/dwc2_type.h index 5ded366d7..7e472310f 100644 --- a/src/portable/synopsys/dwc2/dwc2_type.h +++ b/src/portable/synopsys/dwc2/dwc2_type.h @@ -259,8 +259,8 @@ union { uint32_t reservedd00[64]; // D00..DFF //------------- Power Clock -------------// - volatile uint32_t pcgctrl; // E00 Power and Clock Gating Control - volatile uint32_t pcgcctl1; // E04 + volatile uint32_t pcgctl; // E00 Power and Clock Gating Control + volatile uint32_t pcgctl1; // E04 uint32_t reservede08[126]; // E08..FFF //------------- FIFOs -------------// @@ -273,7 +273,7 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, channel) == 0x0500, "incorrect size"); TU_VERIFY_STATIC(offsetof(dwc2_regs_t, dcfg ) == 0x0800, "incorrect size"); TU_VERIFY_STATIC(offsetof(dwc2_regs_t, epin ) == 0x0900, "incorrect size"); TU_VERIFY_STATIC(offsetof(dwc2_regs_t, epout ) == 0x0B00, "incorrect size"); -TU_VERIFY_STATIC(offsetof(dwc2_regs_t, pcgctrl) == 0x0E00, "incorrect size"); +TU_VERIFY_STATIC(offsetof(dwc2_regs_t, pcgctl ) == 0x0E00, "incorrect size"); TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo ) == 0x1000, "incorrect size"); //--------------------------------------------------------------------+ @@ -346,39 +346,6 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo ) == 0x1000, "incorrect size"); #define HCFG_FSLSS_Msk (0x1UL << HCFG_FSLSS_Pos) // 0x00000004 */ #define HCFG_FSLSS HCFG_FSLSS_Msk // FS- and LS-only support */ -/******************** Bit definition for DCFG register ********************/ -#define DCFG_DSPD_Pos (0U) -#define DCFG_DSPD_Msk (0x3UL << DCFG_DSPD_Pos) // 0x00000003 */ -#define DCFG_DSPD DCFG_DSPD_Msk // Device speed */ -#define DCFG_DSPD_0 (0x1UL << DCFG_DSPD_Pos) // 0x00000001 */ -#define DCFG_DSPD_1 (0x2UL << DCFG_DSPD_Pos) // 0x00000002 */ -#define DCFG_NZLSOHSK_Pos (2U) -#define DCFG_NZLSOHSK_Msk (0x1UL << DCFG_NZLSOHSK_Pos) // 0x00000004 */ -#define DCFG_NZLSOHSK DCFG_NZLSOHSK_Msk // Nonzero-length status OUT handshake */ - -#define DCFG_DAD_Pos (4U) -#define DCFG_DAD_Msk (0x7FUL << DCFG_DAD_Pos) // 0x000007F0 */ -#define DCFG_DAD DCFG_DAD_Msk // Device address */ -#define DCFG_DAD_0 (0x01UL << DCFG_DAD_Pos) // 0x00000010 */ -#define DCFG_DAD_1 (0x02UL << DCFG_DAD_Pos) // 0x00000020 */ -#define DCFG_DAD_2 (0x04UL << DCFG_DAD_Pos) // 0x00000040 */ -#define DCFG_DAD_3 (0x08UL << DCFG_DAD_Pos) // 0x00000080 */ -#define DCFG_DAD_4 (0x10UL << DCFG_DAD_Pos) // 0x00000100 */ -#define DCFG_DAD_5 (0x20UL << DCFG_DAD_Pos) // 0x00000200 */ -#define DCFG_DAD_6 (0x40UL << DCFG_DAD_Pos) // 0x00000400 */ - -#define DCFG_PFIVL_Pos (11U) -#define DCFG_PFIVL_Msk (0x3UL << DCFG_PFIVL_Pos) // 0x00001800 */ -#define DCFG_PFIVL DCFG_PFIVL_Msk // Periodic (micro)frame interval */ -#define DCFG_PFIVL_0 (0x1UL << DCFG_PFIVL_Pos) // 0x00000800 */ -#define DCFG_PFIVL_1 (0x2UL << DCFG_PFIVL_Pos) // 0x00001000 */ - -#define DCFG_PERSCHIVL_Pos (24U) -#define DCFG_PERSCHIVL_Msk (0x3UL << DCFG_PERSCHIVL_Pos) // 0x03000000 */ -#define DCFG_PERSCHIVL DCFG_PERSCHIVL_Msk // Periodic scheduling interval */ -#define DCFG_PERSCHIVL_0 (0x1UL << DCFG_PERSCHIVL_Pos) // 0x01000000 */ -#define DCFG_PERSCHIVL_1 (0x2UL << DCFG_PERSCHIVL_Pos) // 0x02000000 */ - /******************** Bit definition for PCGCR register ********************/ #define PCGCR_STPPCLK_Pos (0U) #define PCGCR_STPPCLK_Msk (0x1UL << PCGCR_STPPCLK_Pos) // 0x00000001 */ @@ -413,6 +380,41 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo ) == 0x1000, "incorrect size"); #define GOTGINT_IDCHNG_Msk (0x1UL << GOTGINT_IDCHNG_Pos) // 0x00100000 */ #define GOTGINT_IDCHNG GOTGINT_IDCHNG_Msk // Change in ID pin input value */ +/******************** Bit definition for DCFG register ********************/ +#define DCFG_DSPD_Pos (0U) +#define DCFG_DSPD_Msk (0x3UL << DCFG_DSPD_Pos) // 0x00000003 +#define DCFG_DSPD_HS 0 // Highspeed +#define DCFG_DSPD_FS_HSPHY 1 // Fullspeed on HS PHY +#define DCFG_DSPD_LS 2 // Lowspeed +#define DCFG_DSPD_FS 3 // Fullspeed on FS PHY + +#define DCFG_NZLSOHSK_Pos (2U) +#define DCFG_NZLSOHSK_Msk (0x1UL << DCFG_NZLSOHSK_Pos) // 0x00000004 */ +#define DCFG_NZLSOHSK DCFG_NZLSOHSK_Msk // Nonzero-length status OUT handshake */ + +#define DCFG_DAD_Pos (4U) +#define DCFG_DAD_Msk (0x7FUL << DCFG_DAD_Pos) // 0x000007F0 */ +#define DCFG_DAD DCFG_DAD_Msk // Device address */ +#define DCFG_DAD_0 (0x01UL << DCFG_DAD_Pos) // 0x00000010 */ +#define DCFG_DAD_1 (0x02UL << DCFG_DAD_Pos) // 0x00000020 */ +#define DCFG_DAD_2 (0x04UL << DCFG_DAD_Pos) // 0x00000040 */ +#define DCFG_DAD_3 (0x08UL << DCFG_DAD_Pos) // 0x00000080 */ +#define DCFG_DAD_4 (0x10UL << DCFG_DAD_Pos) // 0x00000100 */ +#define DCFG_DAD_5 (0x20UL << DCFG_DAD_Pos) // 0x00000200 */ +#define DCFG_DAD_6 (0x40UL << DCFG_DAD_Pos) // 0x00000400 */ + +#define DCFG_PFIVL_Pos (11U) +#define DCFG_PFIVL_Msk (0x3UL << DCFG_PFIVL_Pos) // 0x00001800 */ +#define DCFG_PFIVL DCFG_PFIVL_Msk // Periodic (micro)frame interval */ +#define DCFG_PFIVL_0 (0x1UL << DCFG_PFIVL_Pos) // 0x00000800 */ +#define DCFG_PFIVL_1 (0x2UL << DCFG_PFIVL_Pos) // 0x00001000 */ + +#define DCFG_PERSCHIVL_Pos (24U) +#define DCFG_PERSCHIVL_Msk (0x3UL << DCFG_PERSCHIVL_Pos) // 0x03000000 */ +#define DCFG_PERSCHIVL DCFG_PERSCHIVL_Msk // Periodic scheduling interval */ +#define DCFG_PERSCHIVL_0 (0x1UL << DCFG_PERSCHIVL_Pos) // 0x01000000 */ +#define DCFG_PERSCHIVL_1 (0x2UL << DCFG_PERSCHIVL_Pos) // 0x02000000 */ + /******************** Bit definition for DCTL register ********************/ #define DCTL_RWUSIG_Pos (0U) #define DCTL_RWUSIG_Msk (0x1UL << DCTL_RWUSIG_Pos) // 0x00000001 */ @@ -466,12 +468,15 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo ) == 0x1000, "incorrect size"); #define DSTS_SUSPSTS_Pos (0U) #define DSTS_SUSPSTS_Msk (0x1UL << DSTS_SUSPSTS_Pos) // 0x00000001 */ #define DSTS_SUSPSTS DSTS_SUSPSTS_Msk // Suspend status */ - #define DSTS_ENUMSPD_Pos (1U) #define DSTS_ENUMSPD_Msk (0x3UL << DSTS_ENUMSPD_Pos) // 0x00000006 */ #define DSTS_ENUMSPD DSTS_ENUMSPD_Msk // Enumerated speed */ -#define DSTS_ENUMSPD_0 (0x1UL << DSTS_ENUMSPD_Pos) // 0x00000002 */ -#define DSTS_ENUMSPD_1 (0x2UL << DSTS_ENUMSPD_Pos) // 0x00000004 */ +#define DSTS_ENUMSPD_HS 0 // Highspeed +#define DSTS_ENUMSPD_FS_HSPHY 1 // Fullspeed on HS PHY +#define DSTS_ENUMSPD_LS 2 // Lowspeed +#define DSTS_ENUMSPD_FS 3 // Fullspeed on FS PHY + + #define DSTS_EERR_Pos (3U) #define DSTS_EERR_Msk (0x1UL << DSTS_EERR_Pos) // 0x00000008 */ #define DSTS_EERR DSTS_EERR_Msk // Erratic error */ @@ -501,15 +506,12 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo ) == 0x1000, "incorrect size"); #define GAHBCFG_PTXFELVL_Msk (0x1UL << GAHBCFG_PTXFELVL_Pos) // 0x00000100 */ #define GAHBCFG_PTXFELVL GAHBCFG_PTXFELVL_Msk // Periodic TxFIFO empty level */ -#define GSNPSID_ID_MASK TU_GENMASK(31, 16) +#define GSNPSID_ID_MASK TU_GENMASK(31, 16) /******************** Bit definition for GUSBCFG register ********************/ #define GUSBCFG_TOCAL_Pos (0U) #define GUSBCFG_TOCAL_Msk (0x7UL << GUSBCFG_TOCAL_Pos) // 0x00000007 */ #define GUSBCFG_TOCAL GUSBCFG_TOCAL_Msk // FS timeout calibration */ -#define GUSBCFG_TOCAL_0 (0x1UL << GUSBCFG_TOCAL_Pos) // 0x00000001 */ -#define GUSBCFG_TOCAL_1 (0x2UL << GUSBCFG_TOCAL_Pos) // 0x00000002 */ -#define GUSBCFG_TOCAL_2 (0x4UL << GUSBCFG_TOCAL_Pos) // 0x00000004 */ #define GUSBCFG_PHYIF16_Pos (3U) #define GUSBCFG_PHYIF16_Msk (0x1UL << GUSBCFG_PHYIF16_Pos) // 0x00000008 */ #define GUSBCFG_PHYIF16 GUSBCFG_PHYIF16_Msk // PHY Interface (PHYIf) */ @@ -519,7 +521,7 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo ) == 0x1000, "incorrect size"); #define GUSBCFG_PHYSEL_Pos (6U) #define GUSBCFG_PHYSEL_Msk (0x1UL << GUSBCFG_PHYSEL_Pos) // 0x00000040 */ #define GUSBCFG_PHYSEL GUSBCFG_PHYSEL_Msk // USB 2.0 high-speed ULPI PHY or USB 1.1 full-speed serial transceiver select */ -#define GUSBCFG_DDRSEL TU_BIT(7) // Single Data Rate (SDR) or Double Data Rate (DDR) or ULPI interface. +#define GUSBCFG_DDRSEL TU_BIT(7) // Single Data Rate (SDR) or Double Data Rate (DDR) or ULPI interface. #define GUSBCFG_SRPCAP_Pos (8U) #define GUSBCFG_SRPCAP_Msk (0x1UL << GUSBCFG_SRPCAP_Pos) // 0x00000100 */ #define GUSBCFG_SRPCAP GUSBCFG_SRPCAP_Msk // SRP-capable */ @@ -597,8 +599,8 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo ) == 0x1000, "incorrect size"); #define GRSTCTL_TXFNUM_2 (0x04UL << GRSTCTL_TXFNUM_Pos) // 0x00000100 */ #define GRSTCTL_TXFNUM_3 (0x08UL << GRSTCTL_TXFNUM_Pos) // 0x00000200 */ #define GRSTCTL_TXFNUM_4 (0x10UL << GRSTCTL_TXFNUM_Pos) // 0x00000400 */ -#define GRSTCTL_CSFTRST_DONE_Pos (29) -#define GRSTCTL_CSFTRST_DONE (1u << GRSTCTL_CSFTRST_DONE_Pos) // Reset Done, only available from v4.20a +#define GRSTCTL_CSFTRST_DONE_Pos (29) +#define GRSTCTL_CSFTRST_DONE (1u << GRSTCTL_CSFTRST_DONE_Pos) // Reset Done, only available from v4.20a #define GRSTCTL_DMAREQ_Pos (30U) #define GRSTCTL_DMAREQ_Msk (0x1UL << GRSTCTL_DMAREQ_Pos) // 0x40000000 */ #define GRSTCTL_DMAREQ GRSTCTL_DMAREQ_Msk // DMA request signal */ @@ -1672,48 +1674,36 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo ) == 0x1000, "incorrect size"); #define DOEPTSIZ_STUPCNT_0 (0x1UL << DOEPTSIZ_STUPCNT_Pos) // 0x20000000 */ #define DOEPTSIZ_STUPCNT_1 (0x2UL << DOEPTSIZ_STUPCNT_Pos) // 0x40000000 */ -/******************** Bit definition for PCGCCTL register ********************/ -#define PCGCCTL_STOPCLK_Pos (0U) -#define PCGCCTL_STOPCLK_Msk (0x1UL << PCGCCTL_STOPCLK_Pos) // 0x00000001 */ -#define PCGCCTL_STOPCLK PCGCCTL_STOPCLK_Msk // SETUP packet count */ -#define PCGCCTL_GATECLK_Pos (1U) -#define PCGCCTL_GATECLK_Msk (0x1UL << PCGCCTL_GATECLK_Pos) // 0x00000002 */ -#define PCGCCTL_GATECLK PCGCCTL_GATECLK_Msk //Bit 0 */ -#define PCGCCTL_PHYSUSP_Pos (4U) -#define PCGCCTL_PHYSUSP_Msk (0x1UL << PCGCCTL_PHYSUSP_Pos) // 0x00000010 */ -#define PCGCCTL_PHYSUSP PCGCCTL_PHYSUSP_Msk //Bit 1 */ - -/******************** Bit definition for USBPHYC_PLL1 register ********************/ -#define HS_PHYC_PLL1_PLLEN_Pos (0U) -#define HS_PHYC_PLL1_PLLEN_Msk (0x1UL << HS_PHYC_PLL1_PLLEN_Pos) // 0x00000001 */ -#define HS_PHYC_PLL1_PLLEN HS_PHYC_PLL1_PLLEN_Msk // Enable PLL */ -#define HS_PHYC_PLL1_PLLSEL_Pos (1U) -#define HS_PHYC_PLL1_PLLSEL_Msk (0x7UL << HS_PHYC_PLL1_PLLSEL_Pos) // 0x0000000E */ -#define HS_PHYC_PLL1_PLLSEL HS_PHYC_PLL1_PLLSEL_Msk // Controls PHY frequency operation selection */ -#define HS_PHYC_PLL1_PLLSEL_1 (0x1UL << HS_PHYC_PLL1_PLLSEL_Pos) // 0x00000002 */ -#define HS_PHYC_PLL1_PLLSEL_2 (0x2UL << HS_PHYC_PLL1_PLLSEL_Pos) // 0x00000004 */ -#define HS_PHYC_PLL1_PLLSEL_3 (0x4UL << HS_PHYC_PLL1_PLLSEL_Pos) // 0x00000008 */ - -#define HS_PHYC_PLL1_PLLSEL_12MHZ 0x00000000U // PHY PLL1 input clock frequency 12 MHz */ -#define HS_PHYC_PLL1_PLLSEL_12_5MHZ HS_PHYC_PLL1_PLLSEL_1 // PHY PLL1 input clock frequency 12.5 MHz */ -#define HS_PHYC_PLL1_PLLSEL_16MHZ (uint32_t)(HS_PHYC_PLL1_PLLSEL_1 | HS_PHYC_PLL1_PLLSEL_2) // PHY PLL1 input clock frequency 16 MHz */ -#define HS_PHYC_PLL1_PLLSEL_24MHZ HS_PHYC_PLL1_PLLSEL_3 // PHY PLL1 input clock frequency 24 MHz */ -#define HS_PHYC_PLL1_PLLSEL_25MHZ (uint32_t)(HS_PHYC_PLL1_PLLSEL_2 | HS_PHYC_PLL1_PLLSEL_3) // PHY PLL1 input clock frequency 25 MHz */ - -/******************** Bit definition for USBPHYC_LDO register ********************/ -#define HS_PHYC_LDO_USED_Pos (0U) -#define HS_PHYC_LDO_USED_Msk (0x1UL << HS_PHYC_LDO_USED_Pos) // 0x00000001 */ -#define HS_PHYC_LDO_USED HS_PHYC_LDO_USED_Msk // Monitors the usage status of the PHY's LDO */ -#define HS_PHYC_LDO_STATUS_Pos (1U) -#define HS_PHYC_LDO_STATUS_Msk (0x1UL << HS_PHYC_LDO_STATUS_Pos) // 0x00000002 */ -#define HS_PHYC_LDO_STATUS HS_PHYC_LDO_STATUS_Msk // Monitors the status of the PHY's LDO. */ -#define HS_PHYC_LDO_DISABLE_Pos (2U) -#define HS_PHYC_LDO_DISABLE_Msk (0x1UL << HS_PHYC_LDO_DISABLE_Pos) // 0x00000004 */ -#define HS_PHYC_LDO_DISABLE HS_PHYC_LDO_DISABLE_Msk // Controls disable of the High Speed PHY's LDO */ - -#define HS_PHYC_LDO_ENABLE_Pos HS_PHYC_LDO_DISABLE_Pos -#define HS_PHYC_LDO_ENABLE_Msk HS_PHYC_LDO_DISABLE_Msk -#define HS_PHYC_LDO_ENABLE HS_PHYC_LDO_DISABLE +/******************** Bit definition for PCGCTL register ********************/ +#define PCGCTL_IF_DEV_MODE TU_BIT(31) +#define PCGCTL_P2HD_PRT_SPD_MASK (0x3ul << 29) +#define PCGCTL_P2HD_PRT_SPD_SHIFT 29 +#define PCGCTL_P2HD_DEV_ENUM_SPD_MASK (0x3ul << 27) +#define PCGCTL_P2HD_DEV_ENUM_SPD_SHIFT 27 +#define PCGCTL_MAC_DEV_ADDR_MASK (0x7ful << 20) +#define PCGCTL_MAC_DEV_ADDR_SHIFT 20 +#define PCGCTL_MAX_TERMSEL TU_BIT(19) +#define PCGCTL_MAX_XCVRSELECT_MASK (0x3ul << 17) +#define PCGCTL_MAX_XCVRSELECT_SHIFT 17 +#define PCGCTL_PORT_POWER TU_BIT(16) +#define PCGCTL_PRT_CLK_SEL_MASK (0x3ul << 14) +#define PCGCTL_PRT_CLK_SEL_SHIFT 14 +#define PCGCTL_ESS_REG_RESTORED TU_BIT(13) +#define PCGCTL_EXTND_HIBER_SWITCH TU_BIT(12) +#define PCGCTL_EXTND_HIBER_PWRCLMP TU_BIT(11) +#define PCGCTL_ENBL_EXTND_HIBER TU_BIT(10) +#define PCGCTL_RESTOREMODE TU_BIT(9) +#define PCGCTL_RESETAFTSUSP TU_BIT(8) +#define PCGCTL_DEEP_SLEEP TU_BIT(7) +#define PCGCTL_PHY_IN_SLEEP TU_BIT(6) +#define PCGCTL_ENBL_SLEEP_GATING TU_BIT(5) +#define PCGCTL_RSTPDWNMODULE TU_BIT(3) +#define PCGCTL_PWRCLMP TU_BIT(2) +#define PCGCTL_GATEHCLK TU_BIT(1) +#define PCGCTL_STOPPCLK TU_BIT(0) + +#define PCGCTL1_TIMER (0x3ul << 1) +#define PCGCTL1_GATEEN TU_BIT(0) #ifdef __cplusplus } -- cgit v1.3.1 From 660e8b8c887091e17323c361f25e804a5d06d6df Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 29 Oct 2021 16:08:19 +0700 Subject: skip snpsid check for gd32, abstract phyfs turnaround, set max timeout calibration. still has issue with gd32 with msc (does work with running with rtt as log). --- src/common/tusb_common.h | 3 + src/portable/synopsys/dwc2/dcd_dwc2.c | 191 +++++++++++++++++--------------- src/portable/synopsys/dwc2/dwc2_bcm.h | 7 +- src/portable/synopsys/dwc2/dwc2_esp32.h | 8 +- src/portable/synopsys/dwc2/dwc2_gd32.h | 8 +- src/portable/synopsys/dwc2/dwc2_stm32.h | 61 +++++----- src/portable/synopsys/dwc2/dwc2_type.h | 13 ++- 7 files changed, 144 insertions(+), 147 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index e62bcde12..9b9e2b007 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -111,6 +111,9 @@ TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte2(uint32_t ui32) { return TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte1(uint32_t ui32) { return TU_U32_BYTE1(ui32); } TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte0(uint32_t ui32) { return TU_U32_BYTE0(ui32); } +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u32_high16(uint32_t ui32) { return (uint16_t) (ui32 >> 16); } +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u32_low16 (uint32_t ui32) { return (uint16_t) (ui32 & 0x0000ffffu); } + TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_high(uint16_t ui16) { return TU_U16_HIGH(ui16); } TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_low (uint16_t ui16) { return TU_U16_LOW(ui16); } diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index ce9b58e03..aad7e45cc 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -54,16 +54,8 @@ #define DWC2_REG(_port) ((dwc2_regs_t*) DWC2_REG_BASE) -enum -{ - DCD_HIGH_SPEED = 0, // Highspeed mode - DCD_FULL_SPEED_USE_HS = 1, // Full speed in Highspeed port (probably with internal PHY) - DCD_FULL_SPEED = 3, // Full speed with internal PHY -}; - -// PHYSEL, ULPISEL -// UTMI internal HS PHY -// ULPI external HS PHY +// Debug level for DWC2 +#define DWC2_DEBUG 1 static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[2]; @@ -261,71 +253,73 @@ static void edpt_schedule_packets(uint8_t rhport, uint8_t const epnum, uint8_t c /*------------------------------------------------------------------*/ /* Controller API *------------------------------------------------------------------*/ +#if CFG_TUSB_DEBUG >= DWC2_DEBUG void print_dwc2_info(dwc2_regs_t * dwc2) { dwc2_ghwcfg2_t const * hw_cfg2 = &dwc2->ghwcfg2_bm; dwc2_ghwcfg3_t const * hw_cfg3 = &dwc2->ghwcfg3_bm; dwc2_ghwcfg4_t const * hw_cfg4 = &dwc2->ghwcfg4_bm; - TU_LOG_HEX(1, dwc2->guid); - TU_LOG_HEX(1, dwc2->gsnpsid); - TU_LOG_HEX(1, dwc2->ghwcfg1); + TU_LOG_HEX(DWC2_DEBUG, dwc2->guid); + TU_LOG_HEX(DWC2_DEBUG, dwc2->gsnpsid); + TU_LOG_HEX(DWC2_DEBUG, dwc2->ghwcfg1); // HW configure 2 - TU_LOG(1, "\r\n"); - TU_LOG_HEX(1, dwc2->ghwcfg2); - TU_LOG_INT(1, hw_cfg2->op_mode ); - TU_LOG_INT(1, hw_cfg2->arch ); - TU_LOG_INT(1, hw_cfg2->point2point ); - TU_LOG_INT(1, hw_cfg2->hs_phy_type ); - TU_LOG_INT(1, hw_cfg2->fs_phy_type ); - TU_LOG_INT(1, hw_cfg2->num_dev_ep ); - TU_LOG_INT(1, hw_cfg2->num_host_ch ); - TU_LOG_INT(1, hw_cfg2->period_channel_support ); - TU_LOG_INT(1, hw_cfg2->enable_dynamic_fifo ); - TU_LOG_INT(1, hw_cfg2->mul_cpu_int ); - TU_LOG_INT(1, hw_cfg2->nperiod_tx_q_depth ); - TU_LOG_INT(1, hw_cfg2->host_period_tx_q_depth ); - TU_LOG_INT(1, hw_cfg2->dev_token_q_depth ); - TU_LOG_INT(1, hw_cfg2->otg_enable_ic_usb ); + TU_LOG(DWC2_DEBUG, "\r\n"); + TU_LOG_HEX(DWC2_DEBUG, dwc2->ghwcfg2); + TU_LOG_INT(DWC2_DEBUG, hw_cfg2->op_mode ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg2->arch ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg2->point2point ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg2->hs_phy_type ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg2->fs_phy_type ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg2->num_dev_ep ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg2->num_host_ch ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg2->period_channel_support ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg2->enable_dynamic_fifo ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg2->mul_cpu_int ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg2->nperiod_tx_q_depth ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg2->host_period_tx_q_depth ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg2->dev_token_q_depth ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg2->otg_enable_ic_usb ); // HW configure 3 - TU_LOG(1, "\r\n"); - TU_LOG_HEX(1, dwc2->ghwcfg3); - TU_LOG_INT(1, hw_cfg3->xfer_size_width ); - TU_LOG_INT(1, hw_cfg3->packet_size_width ); - TU_LOG_INT(1, hw_cfg3->otg_enable ); - TU_LOG_INT(1, hw_cfg3->i2c_enable ); - TU_LOG_INT(1, hw_cfg3->vendor_ctrl_itf ); - TU_LOG_INT(1, hw_cfg3->optional_feature_removed ); - TU_LOG_INT(1, hw_cfg3->synch_reset ); - TU_LOG_INT(1, hw_cfg3->otg_adp_support ); - TU_LOG_INT(1, hw_cfg3->otg_enable_hsic ); - TU_LOG_INT(1, hw_cfg3->battery_charger_support ); - TU_LOG_INT(1, hw_cfg3->lpm_mode ); - TU_LOG_INT(1, hw_cfg3->total_fifo_size ); + TU_LOG(DWC2_DEBUG, "\r\n"); + TU_LOG_HEX(DWC2_DEBUG, dwc2->ghwcfg3); + TU_LOG_INT(DWC2_DEBUG, hw_cfg3->xfer_size_width ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg3->packet_size_width ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg3->otg_enable ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg3->i2c_enable ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg3->vendor_ctrl_itf ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg3->optional_feature_removed ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg3->synch_reset ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg3->otg_adp_support ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg3->otg_enable_hsic ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg3->battery_charger_support ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg3->lpm_mode ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg3->total_fifo_size ); // HW configure 4 - TU_LOG(1, "\r\n"); - TU_LOG_HEX(1, dwc2->ghwcfg4); - TU_LOG_INT(1, hw_cfg4->num_dev_period_in_ep ); - TU_LOG_INT(1, hw_cfg4->power_optimized ); - TU_LOG_INT(1, hw_cfg4->ahb_freq_min ); - TU_LOG_INT(1, hw_cfg4->hibernation ); - TU_LOG_INT(1, hw_cfg4->service_interval_mode ); - TU_LOG_INT(1, hw_cfg4->ipg_isoc_en ); - TU_LOG_INT(1, hw_cfg4->acg_enable ); - TU_LOG_INT(1, hw_cfg4->utmi_phy_data_width ); - TU_LOG_INT(1, hw_cfg4->dev_ctrl_ep_num ); - TU_LOG_INT(1, hw_cfg4->iddg_filter_enabled ); - TU_LOG_INT(1, hw_cfg4->vbus_valid_filter_enabled ); - TU_LOG_INT(1, hw_cfg4->a_valid_filter_enabled ); - TU_LOG_INT(1, hw_cfg4->b_valid_filter_enabled ); - TU_LOG_INT(1, hw_cfg4->dedicated_fifos ); - TU_LOG_INT(1, hw_cfg4->num_dev_in_eps ); - TU_LOG_INT(1, hw_cfg4->dma_desc_enable ); - TU_LOG_INT(1, hw_cfg4->dma_dynamic ); + TU_LOG(DWC2_DEBUG, "\r\n"); + TU_LOG_HEX(DWC2_DEBUG, dwc2->ghwcfg4); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->num_dev_period_in_ep ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->power_optimized ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->ahb_freq_min ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->hibernation ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->service_interval_mode ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->ipg_isoc_en ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->acg_enable ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->utmi_phy_data_width ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->dev_ctrl_ep_num ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->iddg_filter_enabled ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->vbus_valid_filter_enabled ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->a_valid_filter_enabled ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->b_valid_filter_enabled ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->dedicated_fifos ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->num_dev_in_eps ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->dma_desc_enable ); + TU_LOG_INT(DWC2_DEBUG, hw_cfg4->dma_dynamic ); } +#endif static void reset_core(dwc2_regs_t * dwc2) { @@ -342,14 +336,15 @@ static void reset_core(dwc2_regs_t * dwc2) // wait for device mode ? } -static bool has_hs_phy(dwc2_regs_t * dwc2) +static bool phy_hs_supported(dwc2_regs_t * dwc2) { + // note: esp32 incorrect report its hs_phy_type as utmi return TUD_OPT_HIGH_SPEED && dwc2->ghwcfg2_bm.hs_phy_type != HS_PHY_TYPE_NONE; } static void phy_fs_init(dwc2_regs_t * dwc2) { - TU_LOG1("Fullspeed PHY init\r\n"); + TU_LOG(DWC2_DEBUG, "Fullspeed PHY init\r\n"); // Select FS PHY dwc2->gusbcfg |= GUSBCFG_PHYSEL; @@ -358,11 +353,11 @@ static void phy_fs_init(dwc2_regs_t * dwc2) reset_core(dwc2); // set turn around - // The values above are calculated for the minimum AHB frequency of 30 MHz. USB turnaround - // time is critical for certification where long cables and 5-Hubs are used, so if - // you need the AHB to run at less than 30 MHz, and if USB turnaround time is not critical, + // USB turnaround time is critical for certification where long cables and 5-Hubs are used. + // So if you need the AHB to run at less than 30 MHz, and if USB turnaround time is not critical, // these bits can be programmed to a larger value. - dwc2_set_turnaround(dwc2, TUSB_SPEED_FULL); + //TU_LOG_INT(DWC2_DEBUG, (dwc2->gusbcfg & GUSBCFG_TRDT_Msk) >> GUSBCFG_TRDT_Pos ); + dwc2_phyfs_set_turnaround(dwc2); // set max speed dwc2->dcfg = (dwc2->dcfg & ~DCFG_DSPD_Msk) | (DCFG_DSPD_FS << DCFG_DSPD_Pos); @@ -382,7 +377,7 @@ static void phy_hs_init(dwc2_regs_t * dwc2) if (dwc2->ghwcfg2_bm.hs_phy_type == HS_PHY_TYPE_ULPI) { - TU_LOG1("Highspeed ULPI PHY init\r\n"); + TU_LOG(DWC2_DEBUG, "Highspeed ULPI PHY init\r\n"); // Select ULPI gusbcfg |= GUSBCFG_ULPI_UTMI_SEL; @@ -397,7 +392,7 @@ static void phy_hs_init(dwc2_regs_t * dwc2) gusbcfg &= ~(GUSBCFG_ULPIFSLS | GUSBCFG_ULPICSM); }else { - TU_LOG1("Highspeed UTMI+ PHY init\r\n"); + TU_LOG(DWC2_DEBUG, "Highspeed UTMI+ PHY init\r\n"); // Select UTMI+ with 8-bit interface gusbcfg &= ~(GUSBCFG_ULPI_UTMI_SEL | GUSBCFG_PHYIF16); @@ -422,11 +417,8 @@ static void phy_hs_init(dwc2_regs_t * dwc2) reset_core(dwc2); // Set turn-around, must after core reset otherwise it will be clear - // 9 if UTMI interface is 8-bit, 5 if 16-bit - // The values above are calculated for the minimum AHB frequency of 30 MHz. USB turnaround - // time is critical for certification where long cables and 5-Hubs are used, so if - // you need the AHB to run at less than 30 MHz, and if USB turnaround time is not critical, - // these bits can be programmed to a larger value. + // - 9 if using 8-bit PHY interface + // - 5 if using 16-bit PHY interface gusbcfg &= ~GUSBCFG_TRDT_Msk; gusbcfg |= (dwc2->ghwcfg4_bm.utmi_phy_data_width ? 5u : 9u) << GUSBCFG_TRDT_Pos; dwc2->gusbcfg = gusbcfg; // Apply config @@ -435,31 +427,45 @@ static void phy_hs_init(dwc2_regs_t * dwc2) dwc2->dcfg = (dwc2->dcfg & ~DCFG_DSPD_Msk) | (DCFG_DSPD_HS << DCFG_DSPD_Pos); } +static bool check_dwc2(dwc2_regs_t * dwc2) +{ + // For some reasons: GD32VF103 snpsid and all hwcfg register are always zero (skip it) +#if !TU_CHECK_MCU(OPT_MCU_GD32VF103) + uint32_t const gsnpsid = dwc2->gsnpsid & GSNPSID_ID_MASK; + TU_ASSERT(gsnpsid == DWC2_OTG_ID || gsnpsid == DWC2_FS_IOT_ID || gsnpsid == DWC2_HS_IOT_ID); +#endif + +#if CFG_TUSB_DEBUG >= DWC2_DEBUG + print_dwc2_info(dwc2); +#endif + + return true; +} + void dcd_init (uint8_t rhport) { // Programming model begins in the last section of the chapter on the USB // peripheral in each Reference Manual. dwc2_regs_t * dwc2 = DWC2_REG(rhport); - // Check Synopsys ID, failed if controller is not enabled - uint32_t const gsnpsid = dwc2->gsnpsid & GSNPSID_ID_MASK; - TU_ASSERT(gsnpsid == DWC2_OTG_ID || gsnpsid == DWC2_FS_IOT_ID || gsnpsid == DWC2_HS_IOT_ID, ); - - print_dwc2_info(dwc2); + // Check Synopsys ID register, failed if controller clock/power is not enabled + TU_VERIFY(check_dwc2(dwc2), ); // Force device mode dwc2->gusbcfg = (dwc2->gusbcfg & ~GUSBCFG_FHMOD) | GUSBCFG_FDMOD; - if( !has_hs_phy(dwc2) ) - { - // core does not support highspeed or hs-phy is not present - phy_fs_init(dwc2); - }else + if( phy_hs_supported(dwc2) ) { // Highspeed phy_hs_init(dwc2); + }else + { + // core does not support highspeed or hs-phy is not present + phy_fs_init(dwc2); } + TU_LOG_HEX(DWC2_DEBUG, dwc2->gusbcfg); + /* Set HS/FS Timeout Calibration to 7 (max available value). * The number of PHY clocks that the application programs in * this field is added to the high/full speed interpacket timeout @@ -468,7 +474,7 @@ void dcd_init (uint8_t rhport) * introduced by the PHY in generating the linestate condition * can vary from one PHY to another. */ - // dwc2->gusbcfg |= (7ul << GUSBCFG_TOCAL_Pos); + dwc2->gusbcfg |= (7ul << GUSBCFG_TOCAL_Pos); // Restart PHY clock dwc2->pcgctl &= ~(PCGCTL_STOPPCLK | PCGCTL_GATEHCLK | PCGCTL_PWRCLMP | PCGCTL_RSTPDWNMODULE); @@ -617,7 +623,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) _allocated_fifo_words_tx += fifo_size; - TU_LOG(2, " Allocated %u bytes at offset %u", fifo_size*4, DWC2_EP_FIFO_SIZE-_allocated_fifo_words_tx*4); + TU_LOG(DWC2_DEBUG, " Allocated %u bytes at offset %u", fifo_size*4, DWC2_EP_FIFO_SIZE-_allocated_fifo_words_tx*4); // DIEPTXF starts at FIFO #1. // Both TXFD and TXSA are in unit of 32-bit words. @@ -1110,14 +1116,15 @@ void dcd_int_handler(uint8_t rhport) speed = TUSB_SPEED_HIGH; break; + case DSTS_ENUMSPD_LS: + speed = TUSB_SPEED_LOW; + break; + case DSTS_ENUMSPD_FS_HSPHY: case DSTS_ENUMSPD_FS: + default: speed = TUSB_SPEED_FULL; break; - - case DSTS_ENUMSPD_LS: - speed = TUSB_SPEED_LOW; - break; } dcd_event_bus_reset(rhport, speed, true); @@ -1204,7 +1211,7 @@ void dcd_int_handler(uint8_t rhport) // // Check for Incomplete isochronous IN transfer // if(int_status & GINTSTS_IISOIXFR) { // printf(" IISOIXFR!\r\n"); - //// TU_LOG2(" IISOIXFR!\r\n"); + //// TU_LOG(DWC2_DEBUG, " IISOIXFR!\r\n"); // } } diff --git a/src/portable/synopsys/dwc2/dwc2_bcm.h b/src/portable/synopsys/dwc2/dwc2_bcm.h index da1f23ae0..c064946cf 100644 --- a/src/portable/synopsys/dwc2/dwc2_bcm.h +++ b/src/portable/synopsys/dwc2/dwc2_bcm.h @@ -58,11 +58,10 @@ static inline void dwc2_remote_wakeup_delay(void) // TODO implement later } -static inline void dwc2_set_turnaround(dwc2_regs_t * core, tusb_speed_t speed) +static inline void dwc2_phyfs_set_turnaround(dwc2_regs_t * dwc2) { - // TODO implement later - (void) core; - (void) speed; + (void) dwc2; + // do nothing since bcm alwyas use HS PHY } #ifdef __cplusplus diff --git a/src/portable/synopsys/dwc2/dwc2_esp32.h b/src/portable/synopsys/dwc2/dwc2_esp32.h index b8a040041..af5d5f093 100644 --- a/src/portable/synopsys/dwc2/dwc2_esp32.h +++ b/src/portable/synopsys/dwc2/dwc2_esp32.h @@ -67,12 +67,10 @@ static inline void dwc2_remote_wakeup_delay(void) vTaskDelay(pdMS_TO_TICKS(1)); } -static inline void dwc2_set_turnaround(dwc2_regs_t * core, tusb_speed_t speed) +static inline void dwc2_phyfs_set_turnaround(dwc2_regs_t * dwc2) { - (void) core; - (void) speed; - - // keep the reset value + (void) dwc2; + // keep the reset value which is 5 on this port } #ifdef __cplusplus diff --git a/src/portable/synopsys/dwc2/dwc2_gd32.h b/src/portable/synopsys/dwc2/dwc2_gd32.h index de3ccb3b0..15e73ad1e 100644 --- a/src/portable/synopsys/dwc2/dwc2_gd32.h +++ b/src/portable/synopsys/dwc2/dwc2_gd32.h @@ -76,12 +76,10 @@ static inline void dwc2_remote_wakeup_delay(void) while ( count-- ) __asm volatile ("nop"); } -static inline void dwc2_set_turnaround(dwc2_regs_t * core, tusb_speed_t speed) +static inline void dwc2_phyfs_set_turnaround(dwc2_regs_t * dwc2) { - (void) core; - (void) speed; - - // keep the reset value + // use recommeded value 6 by stm32 for mcu with AHB clock > 32Mhz + dwc2->gusbcfg = (dwc2->gusbcfg & GUSBCFG_TRDT_Msk) | (6u << GUSBCFG_TRDT_Pos); } diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index b77cda2ca..4d0ed3f0a 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -113,44 +113,33 @@ static inline void dwc2_remote_wakeup_delay(void) } // Set turn-around timeout according to link speed -static inline void dwc2_set_turnaround(dwc2_regs_t * dwc2, tusb_speed_t speed) +static inline void dwc2_phyfs_set_turnaround(dwc2_regs_t * dwc2) { - dwc2->gusbcfg &= ~GUSBCFG_TRDT; - - if ( speed == TUSB_SPEED_HIGH ) - { - // Use fixed 0x09 for Highspeed - dwc2->gusbcfg |= (0x09 << GUSBCFG_TRDT_Pos); - } + // Turnaround timeout depends on the AHB clock dictated by STM32 Reference Manual + uint32_t turnaround; + + if ( SystemCoreClock >= 32000000U ) + turnaround = 0x6u; + else if ( SystemCoreClock >= 27500000U ) + turnaround = 0x7u; + else if ( SystemCoreClock >= 24000000U ) + turnaround = 0x8u; + else if ( SystemCoreClock >= 21800000U ) + turnaround = 0x9u; + else if ( SystemCoreClock >= 20000000U ) + turnaround = 0xAu; + else if ( SystemCoreClock >= 18500000U ) + turnaround = 0xBu; + else if ( SystemCoreClock >= 17200000U ) + turnaround = 0xCu; + else if ( SystemCoreClock >= 16000000U ) + turnaround = 0xDu; + else if ( SystemCoreClock >= 15000000U ) + turnaround = 0xEu; else - { - // Turnaround timeout depends on the MCU clock - uint32_t turnaround; - - if ( SystemCoreClock >= 32000000U ) - turnaround = 0x6U; - else if ( SystemCoreClock >= 27500000U ) - turnaround = 0x7U; - else if ( SystemCoreClock >= 24000000U ) - turnaround = 0x8U; - else if ( SystemCoreClock >= 21800000U ) - turnaround = 0x9U; - else if ( SystemCoreClock >= 20000000U ) - turnaround = 0xAU; - else if ( SystemCoreClock >= 18500000U ) - turnaround = 0xBU; - else if ( SystemCoreClock >= 17200000U ) - turnaround = 0xCU; - else if ( SystemCoreClock >= 16000000U ) - turnaround = 0xDU; - else if ( SystemCoreClock >= 15000000U ) - turnaround = 0xEU; - else - turnaround = 0xFU; - - // Fullspeed depends on MCU clocks, but we will use 0x06 for 32+ Mhz - dwc2->gusbcfg |= (turnaround << GUSBCFG_TRDT_Pos); - } + turnaround = 0xFu; + + dwc2->gusbcfg = (dwc2->gusbcfg & GUSBCFG_TRDT_Msk) | (turnaround << GUSBCFG_TRDT_Pos); } #if defined(USB_HS_PHYC) diff --git a/src/portable/synopsys/dwc2/dwc2_type.h b/src/portable/synopsys/dwc2/dwc2_type.h index 7e472310f..7b3db4dd9 100644 --- a/src/portable/synopsys/dwc2/dwc2_type.h +++ b/src/portable/synopsys/dwc2/dwc2_type.h @@ -59,12 +59,19 @@ typedef struct #endif enum { - HS_PHY_TYPE_NONE = 0 , + HS_PHY_TYPE_NONE = 0 , // not supported HS_PHY_TYPE_UTMI , // internal PHY (mostly) HS_PHY_TYPE_ULPI , // external PHY HS_PHY_TYPE_UTMI_ULPI , }; +enum { + FS_PHY_TYPE_NONE = 0, // not supported + FS_PHY_TYPE_DEDICATED, + FS_PHY_TYPE_UTMI, + FS_PHY_TYPE_ULPI, +}; + typedef struct TU_ATTR_PACKED { uint32_t op_mode : 3; // 0: HNP and SRP | 1: SRP | 2: non-HNP, non-SRP @@ -531,10 +538,6 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo ) == 0x1000, "incorrect size"); #define GUSBCFG_TRDT_Pos (10U) #define GUSBCFG_TRDT_Msk (0xFUL << GUSBCFG_TRDT_Pos) // 0x00003C00 */ #define GUSBCFG_TRDT GUSBCFG_TRDT_Msk // USB turnaround time */ -#define GUSBCFG_TRDT_0 (0x1UL << GUSBCFG_TRDT_Pos) // 0x00000400 */ -#define GUSBCFG_TRDT_1 (0x2UL << GUSBCFG_TRDT_Pos) // 0x00000800 */ -#define GUSBCFG_TRDT_2 (0x4UL << GUSBCFG_TRDT_Pos) // 0x00001000 */ -#define GUSBCFG_TRDT_3 (0x8UL << GUSBCFG_TRDT_Pos) // 0x00002000 */ #define GUSBCFG_PHYLPCS_Pos (15U) #define GUSBCFG_PHYLPCS_Msk (0x1UL << GUSBCFG_PHYLPCS_Pos) // 0x00008000 */ #define GUSBCFG_PHYLPCS GUSBCFG_PHYLPCS_Msk // PHY Low-power clock select */ -- cgit v1.3.1 From ac20605e3f098687ce40349bbecc9266333d951b Mon Sep 17 00:00:00 2001 From: Yunhao Tian Date: Tue, 30 Nov 2021 17:11:09 +0800 Subject: Ignore certain compiler options on ARMCC ARMCC also sets __GNU__ macro, but doesn't support GCC diagnostic pragmas. --- src/common/tusb_compiler.h | 4 +++- src/device/dcd.h | 4 ++-- src/osal/osal.h | 4 ++-- 3 files changed, 7 insertions(+), 5 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index d3284c62a..38e6a16d0 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -137,9 +137,11 @@ #define TU_BSWAP16(u16) (__builtin_bswap16(u16)) #define TU_BSWAP32(u32) (__builtin_bswap32(u32)) + #ifndef __ARMCC_VERSION // List of obsolete callback function that is renamed and should not be defined. // Put it here since only gcc support this pragma - #pragma GCC poison tud_vendor_control_request_cb + #pragma GCC poison tud_vendor_control_request_cb + #endif #elif defined(__TI_COMPILER_VERSION__) #define TU_ATTR_ALIGNED(Bytes) __attribute__ ((aligned(Bytes))) diff --git a/src/device/dcd.h b/src/device/dcd.h index c042cc708..fbcef40d4 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -106,12 +106,12 @@ typedef struct TU_ATTR_ALIGNED(4) void dcd_init (uint8_t rhport); // Interrupt Handler -#if __GNUC__ +#if __GNUC__ && !defined(__ARMCC_VERSION) #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Wredundant-decls" #endif void dcd_int_handler(uint8_t rhport); -#if __GNUC__ +#if __GNUC__ && !defined(__ARMCC_VERSION) #pragma GCC diagnostic pop #endif diff --git a/src/osal/osal.h b/src/osal/osal.h index c8131d19d..9194f80d5 100644 --- a/src/osal/osal.h +++ b/src/osal/osal.h @@ -67,7 +67,7 @@ typedef void (*osal_task_func_t)( void * ); // OSAL Porting API //--------------------------------------------------------------------+ -#if __GNUC__ +#if __GNUC__ && !defined(__ARMCC_VERSION) #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Wredundant-decls" #endif @@ -88,7 +88,7 @@ static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef); static inline bool osal_queue_receive(osal_queue_t qhdl, void* data); static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr); static inline bool osal_queue_empty(osal_queue_t qhdl); -#if __GNUC__ +#if __GNUC__ && !defined(__ARMCC_VERSION) #pragma GCC diagnostic pop #endif -- cgit v1.3.1 From 44406a8940a96bbe03e103a4f4895ec19183941f Mon Sep 17 00:00:00 2001 From: EmergReanimator Date: Thu, 6 Jan 2022 09:56:45 +0100 Subject: Enable breakpoints for ARM8M (e.g. cortex-m33) --- src/common/tusb_verify.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index 56ba8bcd1..8fef11dc7 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -37,31 +37,31 @@ * manipulation that you are told to stay away. * * This contains macros for both VERIFY and ASSERT: - * + * * VERIFY: Used when there is an error condition which is not the * fault of the MCU. For example, bounds checking on data * sent to the micro over USB should use this function. * Another example is checking for buffer overflows, where * returning from the active function causes a NAK. - * + * * ASSERT: Used for error conditions that are caused by MCU firmware * bugs. This is used to discover bugs in the code more * quickly. One example would be adding assertions in library * function calls to confirm a function's (untainted) * parameters are valid. - * + * * The difference in behavior is that ASSERT triggers a breakpoint while * verify does not. * * #define TU_VERIFY(cond) if(cond) return false; * #define TU_VERIFY(cond,ret) if(cond) return ret; - * + * * #define TU_VERIFY_HDLR(cond,handler) if(cond) {handler; return false;} * #define TU_VERIFY_HDLR(cond,ret,handler) if(cond) {handler; return ret;} * * #define TU_ASSERT(cond) if(cond) {_MESS_FAILED(); TU_BREAKPOINT(), return false;} * #define TU_ASSERT(cond,ret) if(cond) {_MESS_FAILED(); TU_BREAKPOINT(), return ret;} - * + * *------------------------------------------------------------------*/ #ifdef __cplusplus @@ -81,8 +81,8 @@ #define _MESS_FAILED() do {} while (0) #endif -// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7 -#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) +// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33 +#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) #define TU_BREAKPOINT() do \ { \ volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ -- cgit v1.3.1 From 161ba73c8b01c6de637309fbfc8c6dcea58c9d06 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 19 Jan 2022 10:17:39 +0700 Subject: fix locked mutex when fifo is full --- src/common/tusb_fifo.c | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 564687e02..0d35405db 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -741,21 +741,28 @@ bool tu_fifo_write(tu_fifo_t* f, const void * data) { _ff_lock(f->mutex_wr); - uint16_t w = f->wr_idx; + bool ret; + uint16_t const w = f->wr_idx; - if ( _tu_fifo_full(f, w, f->rd_idx) && !f->overwritable ) return false; + if ( _tu_fifo_full(f, w, f->rd_idx) && !f->overwritable ) + { + ret = false; + }else + { + uint16_t wRel = get_relative_pointer(f, w); - uint16_t wRel = get_relative_pointer(f, w); + // Write data + _ff_push(f, data, wRel); - // Write data - _ff_push(f, data, wRel); + // Advance pointer + f->wr_idx = advance_pointer(f, w, 1); - // Advance pointer - f->wr_idx = advance_pointer(f, w, 1); + ret = true; + } _ff_unlock(f->mutex_wr); - return true; + return ret; } /******************************************************************************/ -- cgit v1.3.1 From af9a3f646cecd8895f488a8bc3b3c39838b55296 Mon Sep 17 00:00:00 2001 From: email <{ID}+{username}@users.noreply.github.com> Date: Wed, 19 Jan 2022 09:00:32 +0100 Subject: fix idfgh-6508: return type in tu_fifo_peek_n() https://github.com/espressif/esp-idf/issues/8161 --- src/common/tusb_fifo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 0d35405db..183c9c6fc 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -716,7 +716,7 @@ bool tu_fifo_peek(tu_fifo_t* f, void * p_buffer) uint16_t tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n) { _ff_lock(f->mutex_rd); - bool ret = _tu_fifo_peek_n(f, p_buffer, n, f->wr_idx, f->rd_idx, TU_FIFO_COPY_INC); + uint16_t ret = _tu_fifo_peek_n(f, p_buffer, n, f->wr_idx, f->rd_idx, TU_FIFO_COPY_INC); _ff_unlock(f->mutex_rd); return ret; } -- cgit v1.3.1 From e1f0c484c628fd9f2b66ef517a2fda9ace75dce0 Mon Sep 17 00:00:00 2001 From: Roland Date: Tue, 1 Feb 2022 23:45:52 +0100 Subject: Modifications for CCRX toolchain --- src/common/tusb_compiler.h | 6 +++++- src/portable/renesas/usba/dcd_usba.c | 8 ++++++-- 2 files changed, 11 insertions(+), 3 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 38e6a16d0..8f1de7162 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -75,7 +75,11 @@ * Nth position is the same as the number of arguments * - ##__VA_ARGS__ is used to deal with 0 paramerter (swallows comma) *------------------------------------------------------------------*/ -#define TU_ARGS_NUM(...) _TU_NARG(_0, ##__VA_ARGS__,_RSEQ_N()) +#if !defined(__CCRX__) +#define TU_ARGS_NUM(...) _TU_NARG(_0, ##__VA_ARGS__,_RSEQ_N()) +#else +#define TU_ARGS_NUM(...) _TU_NARG(_0, __VA_ARGS__,_RSEQ_N()) +#endif #define _TU_NARG(...) _GET_NTH_ARG(__VA_ARGS__) #define _GET_NTH_ARG( \ diff --git a/src/portable/renesas/usba/dcd_usba.c b/src/portable/renesas/usba/dcd_usba.c index ae7d2fd0c..70a9f41e6 100644 --- a/src/portable/renesas/usba/dcd_usba.c +++ b/src/portable/renesas/usba/dcd_usba.c @@ -494,7 +494,11 @@ static bool process_pipe_xfer(int buffer_type, uint8_t ep_addr, void* buffer, ui while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */ } } else { +#if defined(__CCRX__) + __evenaccess volatile reg_pipetre_t *pt = get_pipetre(num); +#else volatile reg_pipetre_t *pt = get_pipetre(num); +#endif if (pt) { const unsigned mps = edpt_max_packet_size(num); volatile uint16_t *ctr = get_pipectr(num); @@ -715,11 +719,11 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) *ctr = 0; unsigned cfg = (dir << 4) | epn; if (xfer == TUSB_XFER_BULK) { - cfg |= USB_PIPECFG_BULK | USB_PIPECFG_SHTNAK | USB_PIPECFG_DBLB; + cfg |= (USB_PIPECFG_BULK | USB_PIPECFG_SHTNAK | USB_PIPECFG_DBLB); } else if (xfer == TUSB_XFER_INTERRUPT) { cfg |= USB_PIPECFG_INT; } else { - cfg |= USB_PIPECFG_ISO | USB_PIPECFG_DBLB; + cfg |= (USB_PIPECFG_ISO | USB_PIPECFG_DBLB); } USB0.PIPECFG.WORD = cfg; USB0.BRDYSTS.WORD = 0x1FFu ^ TU_BIT(num); -- cgit v1.3.1 From 81e33477ea2d2a4f056d8d9c4cacfbbd7a4bc8e8 Mon Sep 17 00:00:00 2001 From: Alexandre Perrin Date: Wed, 23 Feb 2022 18:27:52 +0100 Subject: Fix CPP compilation with IAR IAR defines __STDC_VERSION__ in cpp as well. Which causes TU_VERIFY_STATIC to be defined as _Static_assert instead of cpp's static_assert. This reorders __cplusplus__ to be first, then to fallback to __STDC_VERSION__ if not CPP. --- src/common/tusb_compiler.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 38e6a16d0..93af44115 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -51,10 +51,10 @@ #endif // Compile-time Assert -#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 201112L - #define TU_VERIFY_STATIC _Static_assert -#elif defined (__cplusplus) && __cplusplus >= 201103L +#if defined (__cplusplus) && __cplusplus >= 201103L #define TU_VERIFY_STATIC static_assert +#elif defined (__STDC_VERSION__) && __STDC_VERSION__ >= 201112L + #define TU_VERIFY_STATIC _Static_assert #elif defined(__CCRX__) #define TU_VERIFY_STATIC(const_expr, _mess) typedef char TU_XSTRCAT(Line, __LINE__)[(const_expr) ? 1 : 0]; #else -- cgit v1.3.1 From 99ad3ae2ca9d4db79b2ac92a6991ebdc3dfb94a3 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 25 Feb 2022 13:45:51 +0700 Subject: rename and move dcd_attr.h to tusb_mcu_attr.h --- src/common/tusb_mcu_attr.h | 234 ++++++++++++++++++++++++++++++++ src/device/dcd.h | 1 - src/device/dcd_attr.h | 234 -------------------------------- src/portable/chipidea/ci_hs/dcd_ci_hs.c | 1 - src/portable/synopsys/dwc2/dcd_dwc2.c | 1 - src/tusb_option.h | 2 +- 6 files changed, 235 insertions(+), 238 deletions(-) create mode 100644 src/common/tusb_mcu_attr.h delete mode 100644 src/device/dcd_attr.h (limited to 'src/common') diff --git a/src/common/tusb_mcu_attr.h b/src/common/tusb_mcu_attr.h new file mode 100644 index 000000000..c10869d21 --- /dev/null +++ b/src/common/tusb_mcu_attr.h @@ -0,0 +1,234 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef TUSB_MCU_ATTR_H_ +#define TUSB_MCU_ATTR_H_ + +#include "tusb_option.h" + +// Attribute includes +// - ENDPOINT_MAX: max (logical) number of endpoint +// - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed, +// e.g EP1 OUT & EP1 IN cannot exist together +// - RHPORT_HIGHSPEED: mask to indicate which port support highspeed mode (without external PHY) +// bit0 for port0 and so on. + +//------------- NXP -------------// +#if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) + #define DCD_ATTR_ENDPOINT_MAX 5 + +#elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) + #define DCD_ATTR_ENDPOINT_MAX 16 + +#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) + // TODO USB0 has 6, USB1 has 4 + #define DCD_ATTR_CONTROLLER_CHIPIDEA_HS + #define DCD_ATTR_ENDPOINT_MAX 6 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS + +#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX) + #define DCD_ATTR_ENDPOINT_MAX 5 + +#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX) + // TODO USB0 has 5, USB1 has 6 + #define DCD_ATTR_ENDPOINT_MAX 6 + +#elif TU_CHECK_MCU(OPT_MCU_LPC55XX) + // TODO USB0 has 5, USB1 has 6 + #define DCD_ATTR_ENDPOINT_MAX 6 + +#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX) + #define DCD_ATTR_CONTROLLER_CHIPIDEA_HS + #define DCD_ATTR_ENDPOINT_MAX 8 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS + +#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX) + #define DCD_ATTR_ENDPOINT_MAX 16 + +#elif TU_CHECK_MCU(OPT_MCU_MM32F327X) + #define DCD_ATTR_ENDPOINT_MAX 16 + +//------------- Nordic -------------// +#elif TU_CHECK_MCU(OPT_MCU_NRF5X) + // 8 CBI + 1 ISO + #define DCD_ATTR_ENDPOINT_MAX 9 + +//------------- Microchip -------------// +#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \ + TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22) + #define DCD_ATTR_ENDPOINT_MAX 8 + +#elif TU_CHECK_MCU(OPT_MCU_SAMG) + #define DCD_ATTR_ENDPOINT_MAX 6 + #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + +#elif TU_CHECK_MCU(OPT_MCU_SAMX7X) + #define DCD_ATTR_ENDPOINT_MAX 10 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + +#elif TU_CHECK_MCU(OPT_MCU_PIC32MZ) + #define DCD_ATTR_ENDPOINT_MAX 8 + #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + +//------------- ST -------------// +#elif TU_CHECK_MCU(OPT_MCU_STM32F0) + #define DCD_ATTR_ENDPOINT_MAX 8 + +#elif TU_CHECK_MCU(OPT_MCU_STM32F1) + #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \ + defined (STM32F107xB) || defined (STM32F107xC) + #define DCD_ATTR_ENDPOINT_MAX 4 + #define DCD_ATTR_DWC2_STM32 + #else + #define DCD_ATTR_ENDPOINT_MAX 8 + #endif + +#elif TU_CHECK_MCU(OPT_MCU_STM32F2) + // FS has 4 ep, HS has 5 ep + #define DCD_ATTR_ENDPOINT_MAX 6 + #define DCD_ATTR_DWC2_STM32 + +#elif TU_CHECK_MCU(OPT_MCU_STM32F3) + #define DCD_ATTR_ENDPOINT_MAX 8 + +#elif TU_CHECK_MCU(OPT_MCU_STM32F4) + // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9 + #define DCD_ATTR_ENDPOINT_MAX 6 + #define DCD_ATTR_DWC2_STM32 + +#elif TU_CHECK_MCU(OPT_MCU_STM32F7) + // FS has 6, HS has 9 + #define DCD_ATTR_ENDPOINT_MAX 9 + #define DCD_ATTR_DWC2_STM32 + +#elif TU_CHECK_MCU(OPT_MCU_STM32H7) + #define DCD_ATTR_ENDPOINT_MAX 9 + #define DCD_ATTR_DWC2_STM32 + +#elif TU_CHECK_MCU(OPT_MCU_STM32G4) + #define DCD_ATTR_ENDPOINT_MAX 8 + +#elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1) + #define DCD_ATTR_ENDPOINT_MAX 8 + +#elif TU_CHECK_MCU(OPT_MCU_STM32L4) + #if defined (STM32L475xx) || defined (STM32L476xx) || \ + defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \ + defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \ + defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \ + defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) + #define DCD_ATTR_ENDPOINT_MAX 6 + #define DCD_ATTR_DWC2_STM32 + #else + #define DCD_ATTR_ENDPOINT_MAX 8 + #endif + +//------------- Sony -------------// +#elif TU_CHECK_MCU(OPT_MCU_CXD56) + #define DCD_ATTR_ENDPOINT_MAX 7 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + +//------------- TI -------------// +#elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx) + #define DCD_ATTR_ENDPOINT_MAX 8 + +#elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129) + #define DCD_ATTR_ENDPOINT_MAX 8 + +//------------- ValentyUSB -------------// +#elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI) + #define DCD_ATTR_ENDPOINT_MAX 16 + +//------------- Nuvoton -------------// +#elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126) + #define DCD_ATTR_ENDPOINT_MAX 8 + +#elif TU_CHECK_MCU(OPT_MCU_NUC120) + #define DCD_ATTR_ENDPOINT_MAX 6 + +#elif TU_CHECK_MCU(OPT_MCU_NUC505) + #define DCD_ATTR_ENDPOINT_MAX 12 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + +//------------- Espressif -------------// +#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) + #define DCD_ATTR_ENDPOINT_MAX 6 + +//------------- Dialog -------------// +#elif TU_CHECK_MCU(OPT_MCU_DA1469X) + #define DCD_ATTR_ENDPOINT_MAX 4 + +//------------- Raspberry Pi -------------// +#elif TU_CHECK_MCU(OPT_MCU_RP2040) + #define DCD_ATTR_ENDPOINT_MAX 16 + +//------------- Silabs -------------// +#elif TU_CHECK_MCU(OPT_MCU_EFM32GG) + #define DCD_ATTR_ENDPOINT_MAX 7 + +//------------- Renesas -------------// +#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) + #define DCD_ATTR_ENDPOINT_MAX 10 + +//------------- GigaDevice -------------// +#elif TU_CHECK_MCU(OPT_MCU_GD32VF103) + #define DCD_ATTR_ENDPOINT_MAX 4 + +//------------- Broadcom -------------// +#elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837) + #define DCD_ATTR_ENDPOINT_MAX 8 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + +//------------- Broadcom -------------// +#elif TU_CHECK_MCU(OPT_MCU_XMC4000) + #define DCD_ATTR_ENDPOINT_MAX 8 + +//------------- BridgeTek -------------// +#elif TU_CHECK_MCU(OPT_MCU_FT90X) + #define DCD_ATTR_ENDPOINT_MAX 8 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + +#elif TU_CHECK_MCU(OPT_MCU_FT93X) + #define DCD_ATTR_ENDPOINT_MAX 16 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + +//------------ Allwinner -------------// +#elif TU_CHECK_MCU(OPT_MCU_F1C100S) + #define DCD_ATTR_ENDPOINT_MAX 4 + +#else + #warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8" + #define DCD_ATTR_ENDPOINT_MAX 8 +#endif + +// Default to fullspeed if not defined +#ifndef DCD_ATTR_RHPORT_HIGHSPEED + #define DCD_ATTR_RHPORT_HIGHSPEED 0x00 +#endif + +#endif diff --git a/src/device/dcd.h b/src/device/dcd.h index fbcef40d4..4e725c95a 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -30,7 +30,6 @@ #include "common/tusb_common.h" #include "osal/osal.h" #include "common/tusb_fifo.h" -#include "dcd_attr.h" #ifdef __cplusplus extern "C" { diff --git a/src/device/dcd_attr.h b/src/device/dcd_attr.h deleted file mode 100644 index e14a3f134..000000000 --- a/src/device/dcd_attr.h +++ /dev/null @@ -1,234 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2021, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef TUSB_DCD_ATTR_H_ -#define TUSB_DCD_ATTR_H_ - -#include "tusb_option.h" - -// Attribute includes -// - ENDPOINT_MAX: max (logical) number of endpoint -// - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed, -// e.g EP1 OUT & EP1 IN cannot exist together -// - RHPORT_HIGHSPEED: mask to indicate which port support highspeed mode (without external PHY) -// bit0 for port0 and so on. - -//------------- NXP -------------// -#if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) - #define DCD_ATTR_ENDPOINT_MAX 5 - -#elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) - #define DCD_ATTR_ENDPOINT_MAX 16 - -#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) - // TODO USB0 has 6, USB1 has 4 - #define DCD_ATTR_CONTROLLER_CHIPIDEA_HS - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS - -#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX) - #define DCD_ATTR_ENDPOINT_MAX 5 - -#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX) - // TODO USB0 has 5, USB1 has 6 - #define DCD_ATTR_ENDPOINT_MAX 6 - -#elif TU_CHECK_MCU(OPT_MCU_LPC55XX) - // TODO USB0 has 5, USB1 has 6 - #define DCD_ATTR_ENDPOINT_MAX 6 - -#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX) - #define DCD_ATTR_CONTROLLER_CHIPIDEA_HS - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS - -#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX) - #define DCD_ATTR_ENDPOINT_MAX 16 - -#elif TU_CHECK_MCU(OPT_MCU_MM32F327X) - #define DCD_ATTR_ENDPOINT_MAX 16 - -//------------- Nordic -------------// -#elif TU_CHECK_MCU(OPT_MCU_NRF5X) - // 8 CBI + 1 ISO - #define DCD_ATTR_ENDPOINT_MAX 9 - -//------------- Microchip -------------// -#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \ - TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22) - #define DCD_ATTR_ENDPOINT_MAX 8 - -#elif TU_CHECK_MCU(OPT_MCU_SAMG) - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER - -#elif TU_CHECK_MCU(OPT_MCU_SAMX7X) - #define DCD_ATTR_ENDPOINT_MAX 10 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER - -#elif TU_CHECK_MCU(OPT_MCU_PIC32MZ) - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER - -//------------- ST -------------// -#elif TU_CHECK_MCU(OPT_MCU_STM32F0) - #define DCD_ATTR_ENDPOINT_MAX 8 - -#elif TU_CHECK_MCU(OPT_MCU_STM32F1) - #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \ - defined (STM32F107xB) || defined (STM32F107xC) - #define DCD_ATTR_ENDPOINT_MAX 4 - #define DCD_ATTR_DWC2_STM32 - #else - #define DCD_ATTR_ENDPOINT_MAX 8 - #endif - -#elif TU_CHECK_MCU(OPT_MCU_STM32F2) - // FS has 4 ep, HS has 5 ep - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_DWC2_STM32 - -#elif TU_CHECK_MCU(OPT_MCU_STM32F3) - #define DCD_ATTR_ENDPOINT_MAX 8 - -#elif TU_CHECK_MCU(OPT_MCU_STM32F4) - // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9 - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_DWC2_STM32 - -#elif TU_CHECK_MCU(OPT_MCU_STM32F7) - // FS has 6, HS has 9 - #define DCD_ATTR_ENDPOINT_MAX 9 - #define DCD_ATTR_DWC2_STM32 - -#elif TU_CHECK_MCU(OPT_MCU_STM32H7) - #define DCD_ATTR_ENDPOINT_MAX 9 - #define DCD_ATTR_DWC2_STM32 - -#elif TU_CHECK_MCU(OPT_MCU_STM32G4) - #define DCD_ATTR_ENDPOINT_MAX 8 - -#elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1) - #define DCD_ATTR_ENDPOINT_MAX 8 - -#elif TU_CHECK_MCU(OPT_MCU_STM32L4) - #if defined (STM32L475xx) || defined (STM32L476xx) || \ - defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \ - defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \ - defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_DWC2_STM32 - #else - #define DCD_ATTR_ENDPOINT_MAX 8 - #endif - -//------------- Sony -------------// -#elif TU_CHECK_MCU(OPT_MCU_CXD56) - #define DCD_ATTR_ENDPOINT_MAX 7 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER - -//------------- TI -------------// -#elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx) - #define DCD_ATTR_ENDPOINT_MAX 8 - -#elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129) - #define DCD_ATTR_ENDPOINT_MAX 8 - -//------------- ValentyUSB -------------// -#elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI) - #define DCD_ATTR_ENDPOINT_MAX 16 - -//------------- Nuvoton -------------// -#elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126) - #define DCD_ATTR_ENDPOINT_MAX 8 - -#elif TU_CHECK_MCU(OPT_MCU_NUC120) - #define DCD_ATTR_ENDPOINT_MAX 6 - -#elif TU_CHECK_MCU(OPT_MCU_NUC505) - #define DCD_ATTR_ENDPOINT_MAX 12 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - -//------------- Espressif -------------// -#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) - #define DCD_ATTR_ENDPOINT_MAX 6 - -//------------- Dialog -------------// -#elif TU_CHECK_MCU(OPT_MCU_DA1469X) - #define DCD_ATTR_ENDPOINT_MAX 4 - -//------------- Raspberry Pi -------------// -#elif TU_CHECK_MCU(OPT_MCU_RP2040) - #define DCD_ATTR_ENDPOINT_MAX 16 - -//------------- Silabs -------------// -#elif TU_CHECK_MCU(OPT_MCU_EFM32GG) - #define DCD_ATTR_ENDPOINT_MAX 7 - -//------------- Renesas -------------// -#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) - #define DCD_ATTR_ENDPOINT_MAX 10 - -//------------- GigaDevice -------------// -#elif TU_CHECK_MCU(OPT_MCU_GD32VF103) - #define DCD_ATTR_ENDPOINT_MAX 4 - -//------------- Broadcom -------------// -#elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837) - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - -//------------- Broadcom -------------// -#elif TU_CHECK_MCU(OPT_MCU_XMC4000) - #define DCD_ATTR_ENDPOINT_MAX 8 - -//------------- BridgeTek -------------// -#elif TU_CHECK_MCU(OPT_MCU_FT90X) - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - -#elif TU_CHECK_MCU(OPT_MCU_FT93X) - #define DCD_ATTR_ENDPOINT_MAX 16 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - -//------------ Allwinner -------------// -#elif TU_CHECK_MCU(OPT_MCU_F1C100S) - #define DCD_ATTR_ENDPOINT_MAX 4 - -#else - #warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8" - #define DCD_ATTR_ENDPOINT_MAX 8 -#endif - -// Default to fullspeed if not defined -#ifndef DCD_ATTR_RHPORT_HIGHSPEED - #define DCD_ATTR_RHPORT_HIGHSPEED 0x00 -#endif - -#endif diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index ffb2ebd16..6361fe629 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -25,7 +25,6 @@ */ #include "tusb_option.h" -#include "device/dcd_attr.h" #if CFG_TUD_ENABLED && defined(DCD_ATTR_CONTROLLER_CHIPIDEA_HS) diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index 86dc760c8..ecbc36fb9 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -28,7 +28,6 @@ */ #include "tusb_option.h" -#include "device/dcd_attr.h" #if CFG_TUD_ENABLED && \ ( defined(DCD_ATTR_DWC2_STM32) || \ diff --git a/src/tusb_option.h b/src/tusb_option.h index 5d104e31c..6a3638461 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -172,7 +172,7 @@ #include "tusb_config.h" #endif -#include "device/dcd_attr.h" +#include "common/tusb_mcu_attr.h" //-------------------------------------------------------------------- // RootHub Mode Configuration -- cgit v1.3.1 From 309540473bc2985d83212b9da0527c7500ba2a66 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 25 Feb 2022 22:26:35 +0700 Subject: minor house keeping --- src/class/msc/msc_host.c | 2 +- src/common/tusb_error.h | 2 ++ src/device/usbd.c | 4 +--- src/host/usbh.c | 1 + src/tusb.c | 2 ++ src/tusb_option.h | 15 +++++++++++++-- 6 files changed, 20 insertions(+), 6 deletions(-) (limited to 'src/common') diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index a49a10522..e4239e375 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -26,7 +26,7 @@ #include "tusb_option.h" -#if CFG_TUH_ENABLED & CFG_TUH_MSC +#if CFG_TUH_ENABLED && CFG_TUH_MSC #include "host/usbh.h" #include "host/usbh_classdriver.h" diff --git a/src/common/tusb_error.h b/src/common/tusb_error.h index d7ad8c318..42541acd6 100644 --- a/src/common/tusb_error.h +++ b/src/common/tusb_error.h @@ -64,6 +64,8 @@ typedef enum #if CFG_TUSB_DEBUG /// Enum to String for debugging purposes. Only available if \ref CFG_TUSB_DEBUG > 0 extern char const* const tusb_strerr[TUSB_ERROR_COUNT]; +extern char const* const tusb_speed_str[]; + #endif #ifdef __cplusplus diff --git a/src/device/usbd.c b/src/device/usbd.c index e6861ee0a..c20bab76b 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -332,8 +332,6 @@ static char const* const _tusb_std_request_str[] = "Synch Frame" }; -static char const* const _tusb_speed_str[] = { "Full", "Low", "High" }; - // for usbd_control to print the name of control complete driver void usbd_driver_print_control_complete_name(usbd_control_xfer_cb_t callback) { @@ -509,7 +507,7 @@ void tud_task (void) switch ( event.event_id ) { case DCD_EVENT_BUS_RESET: - TU_LOG2(": %s Speed\r\n", _tusb_speed_str[event.bus_reset.speed]); + TU_LOG2(": %s Speed\r\n", tusb_speed_str[event.bus_reset.speed]); usbd_reset(event.rhport); _usbd_dev.speed = event.bus_reset.speed; break; diff --git a/src/host/usbh.c b/src/host/usbh.c index e29ce1e54..ce0ccc3cb 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -709,6 +709,7 @@ static bool enum_new_device(hcd_event_t* event) if ( !hcd_port_connect_status(_dev0.rhport) ) return true; _dev0.speed = hcd_port_speed_get(_dev0.rhport ); + TU_LOG2("%s Speed\r\n", tusb_speed_str[_dev0.speed]); enum_request_addr0_device_desc(); } diff --git a/src/tusb.c b/src/tusb.c index 03fe43104..a30221059 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -163,6 +163,8 @@ uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, char const* const tusb_strerr[TUSB_ERROR_COUNT] = { ERROR_TABLE(ERROR_STRING) }; +char const* const tusb_speed_str[] = { "Full", "Low", "High" }; + static void dump_str_line(uint8_t const* buf, uint16_t count) { tu_printf(" |"); diff --git a/src/tusb_option.h b/src/tusb_option.h index 6a3638461..5bf336438 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -223,8 +223,19 @@ // CFG_TUD_SPEED OPT_MODE_HIGH_SPEED //------------- Roothub as Host -------------// -#define TUH_OPT_RHPORT ( ((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST) ? 0 : (((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST) ? 1 : -1) ) -#define CFG_TUH_ENABLED ( TUH_OPT_RHPORT >= 0 ) + +#if (CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST + #define TUH_RHPORT_MODE (CFG_TUSB_RHPORT0_MODE) + #define TUH_OPT_RHPORT 0 +#elif (CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST + #define TUH_RHPORT_MODE (CFG_TUSB_RHPORT1_MODE) + #define TUH_OPT_RHPORT 1 +#else + #define TUH_RHPORT_MODE OPT_MODE_NONE + #define TUH_OPT_RHPORT -1 +#endif + +#define CFG_TUH_ENABLED ( TUH_RHPORT_MODE & OPT_MODE_HOST ) // For backward compatible #define TUSB_OPT_DEVICE_ENABLED CFG_TUD_ENABLED -- cgit v1.3.1 From 89115253da3ef55d59367977b8103a5e321e56aa Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 25 Feb 2022 22:45:05 +0700 Subject: internal symbol rename --- src/common/tusb_mcu_attr.h | 28 ++++++++---- src/host/hcd.h | 1 - src/host/hcd_attr.h | 105 --------------------------------------------- src/portable/ehci/ehci.c | 6 +-- src/portable/ohci/ohci.c | 2 +- 5 files changed, 23 insertions(+), 119 deletions(-) delete mode 100644 src/host/hcd_attr.h (limited to 'src/common') diff --git a/src/common/tusb_mcu_attr.h b/src/common/tusb_mcu_attr.h index c10869d21..e3393ad04 100644 --- a/src/common/tusb_mcu_attr.h +++ b/src/common/tusb_mcu_attr.h @@ -27,14 +27,13 @@ #ifndef TUSB_MCU_ATTR_H_ #define TUSB_MCU_ATTR_H_ -#include "tusb_option.h" - -// Attribute includes -// - ENDPOINT_MAX: max (logical) number of endpoint -// - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed, -// e.g EP1 OUT & EP1 IN cannot exist together -// - RHPORT_HIGHSPEED: mask to indicate which port support highspeed mode (without external PHY) -// bit0 for port0 and so on. +/* Attribute includes + * - ENDPOINT_MAX: max (logical) number of endpoint + * - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed, + * e.g EP1 OUT & EP1 IN cannot exist together + * - RHPORT_HIGHSPEED: mask to indicate which port support highspeed mode (without external PHY) + * bit0 for port0 and so on. + */ //------------- NXP -------------// #if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) @@ -42,6 +41,7 @@ #elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) #define DCD_ATTR_ENDPOINT_MAX 16 + #define HCD_ATTR_OHCI #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) // TODO USB0 has 6, USB1 has 4 @@ -49,6 +49,8 @@ #define DCD_ATTR_ENDPOINT_MAX 6 #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS + #define HCD_ATTR_EHCI + #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX) #define DCD_ATTR_ENDPOINT_MAX 5 @@ -65,6 +67,8 @@ #define DCD_ATTR_ENDPOINT_MAX 8 #define DCD_ATTR_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS + #define HCD_ATTR_EHCI + #elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX) #define DCD_ATTR_ENDPOINT_MAX 16 @@ -221,7 +225,13 @@ #elif TU_CHECK_MCU(OPT_MCU_F1C100S) #define DCD_ATTR_ENDPOINT_MAX 4 -#else +#endif + +//--------------------------------------------------------------------+ +// Default Values +//--------------------------------------------------------------------+ + +#ifndef DCD_ATTR_ENDPOINT_MAX #warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8" #define DCD_ATTR_ENDPOINT_MAX 8 #endif diff --git a/src/host/hcd.h b/src/host/hcd.h index 054fd9647..80500f048 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -30,7 +30,6 @@ #include "common/tusb_common.h" #include "osal/osal.h" #include "common/tusb_fifo.h" -#include "hcd_attr.h" #ifdef __cplusplus extern "C" { diff --git a/src/host/hcd_attr.h b/src/host/hcd_attr.h deleted file mode 100644 index 06011c63c..000000000 --- a/src/host/hcd_attr.h +++ /dev/null @@ -1,105 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2021, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef TUSB_HCD_ATTR_H_ -#define TUSB_HCD_ATTR_H_ - -#include "tusb_option.h" - -// Attribute includes -// - ENDPOINT_MAX: max (logical) number of endpoint -// - PORT_HIGHSPEED: mask to indicate which port support highspeed mode, bit0 for port0 and so on. - -//------------- NXP -------------// -#if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) - #define HCD_ATTR_OHCI - -#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) - #define HCD_ATTR_EHCI_TRANSDIMENSION - -#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX) - // #define HCD_ATTR_EHCI_NXP_PTD - -#elif TU_CHECK_MCU(OPT_MCU_LPC55XX) - // #define HCD_ATTR_EHCI_NXP_PTD - -#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX) - #define HCD_ATTR_EHCI_TRANSDIMENSION - -#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX) - -//------------- Microchip -------------// -#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \ - TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22) - -#elif TU_CHECK_MCU(OPT_MCU_SAMG) - -#elif TU_CHECK_MCU(OPT_MCU_SAMX7X) - -//------------- ST -------------// -#elif TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F1, OPT_MCU_STM32F3) || \ - TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1, OPT_MCU_STM32L4) - -#elif TU_CHECK_MCU(OPT_MCU_STM32F2, OPT_MCU_STM32F3, OPT_MCU_STM32F4) - -#elif TU_CHECK_MCU(OPT_MCU_STM32F7) - -#elif TU_CHECK_MCU(OPT_MCU_STM32H7) - -//------------- Sony -------------// -#elif TU_CHECK_MCU(OPT_MCU_CXD56) - -//------------- Nuvoton -------------// -#elif TU_CHECK_MCU(OPT_MCU_NUC505) - -//------------- Espressif -------------// -#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) - -//------------- Raspberry Pi -------------// -#elif TU_CHECK_MCU(OPT_MCU_RP2040) - -//------------- Silabs -------------// -#elif TU_CHECK_MCU(OPT_MCU_EFM32GG) - -//------------- Renesas -------------// -#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) - -//#elif TU_CHECK_MCU(OPT_MCU_MM32F327X) -// #define DCD_ATTR_ENDPOINT_MAX not known yet - -//------------- GigaDevice -------------// -#elif TU_CHECK_MCU(OPT_MCU_GD32VF103) - -#else -// #warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8" -#endif - -// Default to fullspeed if not defined -//#ifndef PORT_HIGHSPEED -// #define DCD_ATTR_PORT_HIGHSPEED 0x00 -//#endif - -#endif diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index 6b86cb2b2..419601245 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -24,9 +24,9 @@ * This file is part of the TinyUSB stack. */ -#include "host/hcd_attr.h" +#include "tusb_option.h" -#if CFG_TUH_ENABLED && defined(HCD_ATTR_EHCI_TRANSDIMENSION) +#if CFG_TUH_ENABLED && defined(HCD_ATTR_EHCI) //--------------------------------------------------------------------+ // INCLUDE @@ -45,7 +45,7 @@ #define EHCI_DBG 2 // Framelist size as small as possible to save SRAM -#ifdef HCD_ATTR_EHCI_TRANSDIMENSION +#ifdef HCD_ATTR_EHCI // NXP Transdimension: 8 elements #define FRAMELIST_SIZE_BIT_VALUE 7u #define FRAMELIST_SIZE_USBCMD_VALUE (((FRAMELIST_SIZE_BIT_VALUE & 3) << EHCI_USBCMD_POS_FRAMELIST_SIZE) | \ diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c index 8860f27a2..c9e1061f9 100644 --- a/src/portable/ohci/ohci.c +++ b/src/portable/ohci/ohci.c @@ -24,7 +24,7 @@ * This file is part of the TinyUSB stack. */ -#include "host/hcd_attr.h" +#include "tusb_option.h" #if CFG_TUH_ENABLED && defined(HCD_ATTR_OHCI) -- cgit v1.3.1 From 0997589c45a7c4dd96da0d9bce37f771520e34c6 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 25 Feb 2022 23:04:39 +0700 Subject: more symbol rename --- src/common/tusb_mcu_attr.h | 6 +++--- src/portable/chipidea/ci_hs/dcd_ci_hs.c | 2 +- src/portable/ehci/ehci.c | 2 +- src/tusb_option.h | 2 -- 4 files changed, 5 insertions(+), 7 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_mcu_attr.h b/src/common/tusb_mcu_attr.h index e3393ad04..0341dd1bf 100644 --- a/src/common/tusb_mcu_attr.h +++ b/src/common/tusb_mcu_attr.h @@ -27,7 +27,7 @@ #ifndef TUSB_MCU_ATTR_H_ #define TUSB_MCU_ATTR_H_ -/* Attribute includes +/* USB Controller Attributes for Device, Host or MCU (both) * - ENDPOINT_MAX: max (logical) number of endpoint * - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed, * e.g EP1 OUT & EP1 IN cannot exist together @@ -45,7 +45,7 @@ #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) // TODO USB0 has 6, USB1 has 4 - #define DCD_ATTR_CONTROLLER_CHIPIDEA_HS + #define MCU_ATTR_CONTROLLER_CHIPIDEA_HS #define DCD_ATTR_ENDPOINT_MAX 6 #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS @@ -63,7 +63,7 @@ #define DCD_ATTR_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX) - #define DCD_ATTR_CONTROLLER_CHIPIDEA_HS + #define MCU_ATTR_CONTROLLER_CHIPIDEA_HS #define DCD_ATTR_ENDPOINT_MAX 8 #define DCD_ATTR_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 6361fe629..21087681c 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -26,7 +26,7 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && defined(DCD_ATTR_CONTROLLER_CHIPIDEA_HS) +#if CFG_TUD_ENABLED && defined(MCU_ATTR_CONTROLLER_CHIPIDEA_HS) //--------------------------------------------------------------------+ // INCLUDE diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index 419601245..5b42ece48 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -45,7 +45,7 @@ #define EHCI_DBG 2 // Framelist size as small as possible to save SRAM -#ifdef HCD_ATTR_EHCI +#ifdef MCU_ATTR_CONTROLLER_CHIPIDEA_HS // NXP Transdimension: 8 elements #define FRAMELIST_SIZE_BIT_VALUE 7u #define FRAMELIST_SIZE_USBCMD_VALUE (((FRAMELIST_SIZE_BIT_VALUE & 3) << EHCI_USBCMD_POS_FRAMELIST_SIZE) | \ diff --git a/src/tusb_option.h b/src/tusb_option.h index 5bf336438..5cc362f1a 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -220,8 +220,6 @@ #define CFG_TUD_ENABLED ( TUD_RHPORT_MODE & OPT_MODE_DEVICE ) #define TUD_OPT_HIGH_SPEED ( (TUD_RHPORT_MODE & OPT_MODE_SPEED_MASK) ? (TUD_RHPORT_MODE & OPT_MODE_HIGH_SPEED) : (DCD_ATTR_RHPORT_HIGHSPEED & (1 << TUD_OPT_RHPORT)) ) -// CFG_TUD_SPEED OPT_MODE_HIGH_SPEED - //------------- Roothub as Host -------------// #if (CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST -- cgit v1.3.1 From bc63f59af2e75e4fc93715ac88a2a8360f09d69a Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 26 Feb 2022 15:18:51 +0700 Subject: mcu specific rename --- src/common/tusb_mcu.h | 270 ++++++++++++++++++++++++++++++++ src/common/tusb_mcu_attr.h | 244 ----------------------------- src/portable/chipidea/ci_hs/dcd_ci_hs.c | 2 +- src/portable/ehci/ehci.c | 2 +- src/portable/synopsys/dwc2/dcd_dwc2.c | 2 +- src/tusb_option.h | 39 ++--- 6 files changed, 286 insertions(+), 273 deletions(-) create mode 100644 src/common/tusb_mcu.h delete mode 100644 src/common/tusb_mcu_attr.h (limited to 'src/common') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h new file mode 100644 index 000000000..1f1aeb462 --- /dev/null +++ b/src/common/tusb_mcu.h @@ -0,0 +1,270 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef TUSB_MCU_H_ +#define TUSB_MCU_H_ + +//--------------------------------------------------------------------+ +// Port Specific +// TUP stand for TinyUSB Port (can be renamed) +//--------------------------------------------------------------------+ + +//------------- Unaligned Memory Access -------------// + +// ARMv7+ (M3-M7, M23-M33) can access unaligned memory +#if (defined(__ARM_ARCH) && (__ARM_ARCH >= 7)) + #define TUP_ARCH_STRICT_ALIGN 0 +#else + #define TUP_ARCH_STRICT_ALIGN 1 +#endif + +/* USB Controller Attributes for Device, Host or MCU (both) + * - ENDPOINT_MAX: max (logical) number of endpoint + * - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed, + * e.g EP1 OUT & EP1 IN cannot exist together + * - RHPORT_HIGHSPEED: mask to indicate which port support highspeed mode (without external PHY) + * bit0 for port0 and so on. + */ + +//------------- NXP -------------// +#if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) + #define DCD_ATTR_ENDPOINT_MAX 5 + +#elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) + #define DCD_ATTR_ENDPOINT_MAX 16 + #define HCD_ATTR_OHCI + +#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) + // TODO USB0 has 6, USB1 has 4 + #define TUP_USBIP_CHIPIDEA_HS + #define DCD_ATTR_ENDPOINT_MAX 6 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS + + #define HCD_ATTR_EHCI + +#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX) + #define DCD_ATTR_ENDPOINT_MAX 5 + +#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX) + // TODO USB0 has 5, USB1 has 6 + #define DCD_ATTR_ENDPOINT_MAX 6 + +#elif TU_CHECK_MCU(OPT_MCU_LPC55XX) + // TODO USB0 has 5, USB1 has 6 + #define DCD_ATTR_ENDPOINT_MAX 6 + +#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX) + #define TUP_USBIP_CHIPIDEA_HS + #define DCD_ATTR_ENDPOINT_MAX 8 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS + + #define HCD_ATTR_EHCI + +#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX) + #define DCD_ATTR_ENDPOINT_MAX 16 + +#elif TU_CHECK_MCU(OPT_MCU_MM32F327X) + #define DCD_ATTR_ENDPOINT_MAX 16 + +//------------- Nordic -------------// +#elif TU_CHECK_MCU(OPT_MCU_NRF5X) + // 8 CBI + 1 ISO + #define DCD_ATTR_ENDPOINT_MAX 9 + +//------------- Microchip -------------// +#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \ + TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22) + #define DCD_ATTR_ENDPOINT_MAX 8 + +#elif TU_CHECK_MCU(OPT_MCU_SAMG) + #define DCD_ATTR_ENDPOINT_MAX 6 + #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + +#elif TU_CHECK_MCU(OPT_MCU_SAMX7X) + #define DCD_ATTR_ENDPOINT_MAX 10 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + +#elif TU_CHECK_MCU(OPT_MCU_PIC32MZ) + #define DCD_ATTR_ENDPOINT_MAX 8 + #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + +//------------- ST -------------// +#elif TU_CHECK_MCU(OPT_MCU_STM32F0) + #define DCD_ATTR_ENDPOINT_MAX 8 + +#elif TU_CHECK_MCU(OPT_MCU_STM32F1) + #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \ + defined (STM32F107xB) || defined (STM32F107xC) + #define DCD_ATTR_ENDPOINT_MAX 4 + + #define TUP_USBIP_DWC2 + #define DCD_ATTR_DWC2_STM32 + #else + #define DCD_ATTR_ENDPOINT_MAX 8 + #endif + +#elif TU_CHECK_MCU(OPT_MCU_STM32F2) + // FS has 4 ep, HS has 5 ep + #define DCD_ATTR_ENDPOINT_MAX 6 + + #define TUP_USBIP_DWC2 + #define DCD_ATTR_DWC2_STM32 + +#elif TU_CHECK_MCU(OPT_MCU_STM32F3) + #define DCD_ATTR_ENDPOINT_MAX 8 + +#elif TU_CHECK_MCU(OPT_MCU_STM32F4) + // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9 + #define DCD_ATTR_ENDPOINT_MAX 6 + + #define TUP_USBIP_DWC2 + #define DCD_ATTR_DWC2_STM32 + +#elif TU_CHECK_MCU(OPT_MCU_STM32F7) + // FS has 6, HS has 9 + #define DCD_ATTR_ENDPOINT_MAX 9 + + #define TUP_USBIP_DWC2 + #define DCD_ATTR_DWC2_STM32 + +#elif TU_CHECK_MCU(OPT_MCU_STM32H7) + #define DCD_ATTR_ENDPOINT_MAX 9 + + #define TUP_USBIP_DWC2 + #define DCD_ATTR_DWC2_STM32 + +#elif TU_CHECK_MCU(OPT_MCU_STM32G4) + #define DCD_ATTR_ENDPOINT_MAX 8 + +#elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1) + #define DCD_ATTR_ENDPOINT_MAX 8 + +#elif TU_CHECK_MCU(OPT_MCU_STM32L4) + #if defined (STM32L475xx) || defined (STM32L476xx) || \ + defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \ + defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \ + defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \ + defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) + #define DCD_ATTR_ENDPOINT_MAX 6 + + #define TUP_USBIP_DWC2 + #define DCD_ATTR_DWC2_STM32 + #else + #define DCD_ATTR_ENDPOINT_MAX 8 + #endif + +//------------- Sony -------------// +#elif TU_CHECK_MCU(OPT_MCU_CXD56) + #define DCD_ATTR_ENDPOINT_MAX 7 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + +//------------- TI -------------// +#elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx) + #define DCD_ATTR_ENDPOINT_MAX 8 + +#elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129) + #define DCD_ATTR_ENDPOINT_MAX 8 + +//------------- ValentyUSB -------------// +#elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI) + #define DCD_ATTR_ENDPOINT_MAX 16 + +//------------- Nuvoton -------------// +#elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126) + #define DCD_ATTR_ENDPOINT_MAX 8 + +#elif TU_CHECK_MCU(OPT_MCU_NUC120) + #define DCD_ATTR_ENDPOINT_MAX 6 + +#elif TU_CHECK_MCU(OPT_MCU_NUC505) + #define DCD_ATTR_ENDPOINT_MAX 12 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + +//------------- Espressif -------------// +#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) + #define DCD_ATTR_ENDPOINT_MAX 6 + +//------------- Dialog -------------// +#elif TU_CHECK_MCU(OPT_MCU_DA1469X) + #define DCD_ATTR_ENDPOINT_MAX 4 + +//------------- Raspberry Pi -------------// +#elif TU_CHECK_MCU(OPT_MCU_RP2040) + #define DCD_ATTR_ENDPOINT_MAX 16 + +//------------- Silabs -------------// +#elif TU_CHECK_MCU(OPT_MCU_EFM32GG) + #define DCD_ATTR_ENDPOINT_MAX 7 + +//------------- Renesas -------------// +#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) + #define DCD_ATTR_ENDPOINT_MAX 10 + +//------------- GigaDevice -------------// +#elif TU_CHECK_MCU(OPT_MCU_GD32VF103) + #define DCD_ATTR_ENDPOINT_MAX 4 + +//------------- Broadcom -------------// +#elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837) + #define DCD_ATTR_ENDPOINT_MAX 8 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + +//------------- Broadcom -------------// +#elif TU_CHECK_MCU(OPT_MCU_XMC4000) + #define DCD_ATTR_ENDPOINT_MAX 8 + +//------------- BridgeTek -------------// +#elif TU_CHECK_MCU(OPT_MCU_FT90X) + #define DCD_ATTR_ENDPOINT_MAX 8 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + +#elif TU_CHECK_MCU(OPT_MCU_FT93X) + #define DCD_ATTR_ENDPOINT_MAX 16 + #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + +//------------ Allwinner -------------// +#elif TU_CHECK_MCU(OPT_MCU_F1C100S) + #define DCD_ATTR_ENDPOINT_MAX 4 + +#endif + +//--------------------------------------------------------------------+ +// Default Values +//--------------------------------------------------------------------+ + +#ifndef DCD_ATTR_ENDPOINT_MAX + #warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8" + #define DCD_ATTR_ENDPOINT_MAX 8 +#endif + +// Default to fullspeed if not defined +#ifndef DCD_ATTR_RHPORT_HIGHSPEED + #define DCD_ATTR_RHPORT_HIGHSPEED 0x00 +#endif + +#endif diff --git a/src/common/tusb_mcu_attr.h b/src/common/tusb_mcu_attr.h deleted file mode 100644 index 0341dd1bf..000000000 --- a/src/common/tusb_mcu_attr.h +++ /dev/null @@ -1,244 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2021, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef TUSB_MCU_ATTR_H_ -#define TUSB_MCU_ATTR_H_ - -/* USB Controller Attributes for Device, Host or MCU (both) - * - ENDPOINT_MAX: max (logical) number of endpoint - * - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed, - * e.g EP1 OUT & EP1 IN cannot exist together - * - RHPORT_HIGHSPEED: mask to indicate which port support highspeed mode (without external PHY) - * bit0 for port0 and so on. - */ - -//------------- NXP -------------// -#if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) - #define DCD_ATTR_ENDPOINT_MAX 5 - -#elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) - #define DCD_ATTR_ENDPOINT_MAX 16 - #define HCD_ATTR_OHCI - -#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) - // TODO USB0 has 6, USB1 has 4 - #define MCU_ATTR_CONTROLLER_CHIPIDEA_HS - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS - - #define HCD_ATTR_EHCI - -#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX) - #define DCD_ATTR_ENDPOINT_MAX 5 - -#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX) - // TODO USB0 has 5, USB1 has 6 - #define DCD_ATTR_ENDPOINT_MAX 6 - -#elif TU_CHECK_MCU(OPT_MCU_LPC55XX) - // TODO USB0 has 5, USB1 has 6 - #define DCD_ATTR_ENDPOINT_MAX 6 - -#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX) - #define MCU_ATTR_CONTROLLER_CHIPIDEA_HS - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS - - #define HCD_ATTR_EHCI - -#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX) - #define DCD_ATTR_ENDPOINT_MAX 16 - -#elif TU_CHECK_MCU(OPT_MCU_MM32F327X) - #define DCD_ATTR_ENDPOINT_MAX 16 - -//------------- Nordic -------------// -#elif TU_CHECK_MCU(OPT_MCU_NRF5X) - // 8 CBI + 1 ISO - #define DCD_ATTR_ENDPOINT_MAX 9 - -//------------- Microchip -------------// -#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \ - TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22) - #define DCD_ATTR_ENDPOINT_MAX 8 - -#elif TU_CHECK_MCU(OPT_MCU_SAMG) - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER - -#elif TU_CHECK_MCU(OPT_MCU_SAMX7X) - #define DCD_ATTR_ENDPOINT_MAX 10 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER - -#elif TU_CHECK_MCU(OPT_MCU_PIC32MZ) - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER - -//------------- ST -------------// -#elif TU_CHECK_MCU(OPT_MCU_STM32F0) - #define DCD_ATTR_ENDPOINT_MAX 8 - -#elif TU_CHECK_MCU(OPT_MCU_STM32F1) - #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \ - defined (STM32F107xB) || defined (STM32F107xC) - #define DCD_ATTR_ENDPOINT_MAX 4 - #define DCD_ATTR_DWC2_STM32 - #else - #define DCD_ATTR_ENDPOINT_MAX 8 - #endif - -#elif TU_CHECK_MCU(OPT_MCU_STM32F2) - // FS has 4 ep, HS has 5 ep - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_DWC2_STM32 - -#elif TU_CHECK_MCU(OPT_MCU_STM32F3) - #define DCD_ATTR_ENDPOINT_MAX 8 - -#elif TU_CHECK_MCU(OPT_MCU_STM32F4) - // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9 - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_DWC2_STM32 - -#elif TU_CHECK_MCU(OPT_MCU_STM32F7) - // FS has 6, HS has 9 - #define DCD_ATTR_ENDPOINT_MAX 9 - #define DCD_ATTR_DWC2_STM32 - -#elif TU_CHECK_MCU(OPT_MCU_STM32H7) - #define DCD_ATTR_ENDPOINT_MAX 9 - #define DCD_ATTR_DWC2_STM32 - -#elif TU_CHECK_MCU(OPT_MCU_STM32G4) - #define DCD_ATTR_ENDPOINT_MAX 8 - -#elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1) - #define DCD_ATTR_ENDPOINT_MAX 8 - -#elif TU_CHECK_MCU(OPT_MCU_STM32L4) - #if defined (STM32L475xx) || defined (STM32L476xx) || \ - defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \ - defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \ - defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_DWC2_STM32 - #else - #define DCD_ATTR_ENDPOINT_MAX 8 - #endif - -//------------- Sony -------------// -#elif TU_CHECK_MCU(OPT_MCU_CXD56) - #define DCD_ATTR_ENDPOINT_MAX 7 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER - -//------------- TI -------------// -#elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx) - #define DCD_ATTR_ENDPOINT_MAX 8 - -#elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129) - #define DCD_ATTR_ENDPOINT_MAX 8 - -//------------- ValentyUSB -------------// -#elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI) - #define DCD_ATTR_ENDPOINT_MAX 16 - -//------------- Nuvoton -------------// -#elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126) - #define DCD_ATTR_ENDPOINT_MAX 8 - -#elif TU_CHECK_MCU(OPT_MCU_NUC120) - #define DCD_ATTR_ENDPOINT_MAX 6 - -#elif TU_CHECK_MCU(OPT_MCU_NUC505) - #define DCD_ATTR_ENDPOINT_MAX 12 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - -//------------- Espressif -------------// -#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) - #define DCD_ATTR_ENDPOINT_MAX 6 - -//------------- Dialog -------------// -#elif TU_CHECK_MCU(OPT_MCU_DA1469X) - #define DCD_ATTR_ENDPOINT_MAX 4 - -//------------- Raspberry Pi -------------// -#elif TU_CHECK_MCU(OPT_MCU_RP2040) - #define DCD_ATTR_ENDPOINT_MAX 16 - -//------------- Silabs -------------// -#elif TU_CHECK_MCU(OPT_MCU_EFM32GG) - #define DCD_ATTR_ENDPOINT_MAX 7 - -//------------- Renesas -------------// -#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) - #define DCD_ATTR_ENDPOINT_MAX 10 - -//------------- GigaDevice -------------// -#elif TU_CHECK_MCU(OPT_MCU_GD32VF103) - #define DCD_ATTR_ENDPOINT_MAX 4 - -//------------- Broadcom -------------// -#elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837) - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - -//------------- Broadcom -------------// -#elif TU_CHECK_MCU(OPT_MCU_XMC4000) - #define DCD_ATTR_ENDPOINT_MAX 8 - -//------------- BridgeTek -------------// -#elif TU_CHECK_MCU(OPT_MCU_FT90X) - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - -#elif TU_CHECK_MCU(OPT_MCU_FT93X) - #define DCD_ATTR_ENDPOINT_MAX 16 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - -//------------ Allwinner -------------// -#elif TU_CHECK_MCU(OPT_MCU_F1C100S) - #define DCD_ATTR_ENDPOINT_MAX 4 - -#endif - -//--------------------------------------------------------------------+ -// Default Values -//--------------------------------------------------------------------+ - -#ifndef DCD_ATTR_ENDPOINT_MAX - #warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8" - #define DCD_ATTR_ENDPOINT_MAX 8 -#endif - -// Default to fullspeed if not defined -#ifndef DCD_ATTR_RHPORT_HIGHSPEED - #define DCD_ATTR_RHPORT_HIGHSPEED 0x00 -#endif - -#endif diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 21087681c..726c7a517 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -26,7 +26,7 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && defined(MCU_ATTR_CONTROLLER_CHIPIDEA_HS) +#if CFG_TUD_ENABLED && defined(TUP_USBIP_CHIPIDEA_HS) //--------------------------------------------------------------------+ // INCLUDE diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index 5b42ece48..ac873455b 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -45,7 +45,7 @@ #define EHCI_DBG 2 // Framelist size as small as possible to save SRAM -#ifdef MCU_ATTR_CONTROLLER_CHIPIDEA_HS +#ifdef TUP_USBIP_CHIPIDEA_HS // NXP Transdimension: 8 elements #define FRAMELIST_SIZE_BIT_VALUE 7u #define FRAMELIST_SIZE_USBCMD_VALUE (((FRAMELIST_SIZE_BIT_VALUE & 3) << EHCI_USBCMD_POS_FRAMELIST_SIZE) | \ diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index ecbc36fb9..377f0f44e 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -30,7 +30,7 @@ #include "tusb_option.h" #if CFG_TUD_ENABLED && \ - ( defined(DCD_ATTR_DWC2_STM32) || \ + ( defined(TUP_USBIP_DWC2) || \ TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_GD32VF103) || \ TU_CHECK_MCU(OPT_MCU_EFM32GG, OPT_MCU_BCM2711, OPT_MCU_BCM2835) || \ TU_CHECK_MCU(OPT_MCU_BCM2837, OPT_MCU_XMC4000) ) diff --git a/src/tusb_option.h b/src/tusb_option.h index 5cc362f1a..3c2207c26 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -172,7 +172,7 @@ #include "tusb_config.h" #endif -#include "common/tusb_mcu_attr.h" +#include "common/tusb_mcu.h" //-------------------------------------------------------------------- // RootHub Mode Configuration @@ -239,6 +239,18 @@ #define TUSB_OPT_DEVICE_ENABLED CFG_TUD_ENABLED #define TUSB_OPT_HOST_ENABLED CFG_TUH_ENABLED +// TODO move later +// TUP_MCU_STRICT_ALIGN will overwrite TUP_ARCH_STRICT_ALIGN. +// In case TUP_MCU_STRICT_ALIGN = 1 and TUP_ARCH_STRICT_ALIGN =0, we will not reply on compiler +// to generate unaligned access code. +// LPC_IP3511 Highspeed cannot access unaligned memory on USB_RAM +#if TUD_OPT_HIGH_SPEED && (CFG_TUSB_MCU == OPT_MCU_LPC54XXX || CFG_TUSB_MCU == OPT_MCU_LPC55XX) + #define TUP_MCU_STRICT_ALIGN 1 +#else + #define TUP_MCU_STRICT_ALIGN 0 +#endif + + //--------------------------------------------------------------------+ // COMMON OPTIONS //--------------------------------------------------------------------+ @@ -371,31 +383,6 @@ #define CFG_TUH_VENDOR 0 #endif -//--------------------------------------------------------------------+ -// Port Specific -// TUP stand for TinyUSB Port (can be renamed) -//--------------------------------------------------------------------+ - -//------------- Unaligned Memory -------------// - -// ARMv7+ (M3-M7, M23-M33) can access unaligned memory -#if (defined(__ARM_ARCH) && (__ARM_ARCH >= 7)) - #define TUP_ARCH_STRICT_ALIGN 0 -#else - #define TUP_ARCH_STRICT_ALIGN 1 -#endif - -// TUP_MCU_STRICT_ALIGN will overwrite TUP_ARCH_STRICT_ALIGN. -// In case TUP_MCU_STRICT_ALIGN = 1 and TUP_ARCH_STRICT_ALIGN =0, we will not reply on compiler -// to generate unaligned access code. -// LPC_IP3511 Highspeed cannot access unaligned memory on USB_RAM -#if TUD_OPT_HIGH_SPEED && (CFG_TUSB_MCU == OPT_MCU_LPC54XXX || CFG_TUSB_MCU == OPT_MCU_LPC55XX) - #define TUP_MCU_STRICT_ALIGN 1 -#else - #define TUP_MCU_STRICT_ALIGN 0 -#endif - - //------------------------------------------------------------------ // Configuration Validation //------------------------------------------------------------------ -- cgit v1.3.1 From 11c89d43abec5a37856e3f026b23ab26c33a656a Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 26 Feb 2022 17:03:54 +0700 Subject: more internal rename --- src/common/tusb_mcu.h | 158 +++++++++++---------- src/device/dcd.h | 2 +- src/portable/chipidea/ci_hs/dcd_ci_hs.c | 6 +- src/portable/ehci/ehci.c | 2 +- src/portable/mentor/musb/dcd_musb.c | 10 +- .../nxp/transdimension/dcd_transdimension.c | 6 +- src/portable/ohci/ohci.c | 2 +- src/portable/sunxi/dcd_sunxi_musb.c | 8 +- src/portable/synopsys/dwc2/dcd_dwc2.c | 2 +- src/tusb_option.h | 2 +- 10 files changed, 100 insertions(+), 98 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 1f1aeb462..b4e023165 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -51,117 +51,119 @@ //------------- NXP -------------// #if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) - #define DCD_ATTR_ENDPOINT_MAX 5 + #define TUP_DCD_ENDPOINT_MAX 5 #elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) - #define DCD_ATTR_ENDPOINT_MAX 16 - #define HCD_ATTR_OHCI + #define TUP_DCD_ENDPOINT_MAX 16 + #define TUP_USBIP_OHCI #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) // TODO USB0 has 6, USB1 has 4 #define TUP_USBIP_CHIPIDEA_HS - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS + #define TUP_USBIP_EHCI + + #define TUP_DCD_ENDPOINT_MAX 6 + #define TUP_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS - #define HCD_ATTR_EHCI #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX) - #define DCD_ATTR_ENDPOINT_MAX 5 + #define TUP_DCD_ENDPOINT_MAX 5 #elif TU_CHECK_MCU(OPT_MCU_LPC54XXX) // TODO USB0 has 5, USB1 has 6 - #define DCD_ATTR_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_LPC55XX) // TODO USB0 has 5, USB1 has 6 - #define DCD_ATTR_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX) #define TUP_USBIP_CHIPIDEA_HS - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS + #define TUP_USBIP_EHCI + + #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS - #define HCD_ATTR_EHCI #elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX) - #define DCD_ATTR_ENDPOINT_MAX 16 + #define TUP_DCD_ENDPOINT_MAX 16 #elif TU_CHECK_MCU(OPT_MCU_MM32F327X) - #define DCD_ATTR_ENDPOINT_MAX 16 + #define TUP_DCD_ENDPOINT_MAX 16 //------------- Nordic -------------// #elif TU_CHECK_MCU(OPT_MCU_NRF5X) // 8 CBI + 1 ISO - #define DCD_ATTR_ENDPOINT_MAX 9 + #define TUP_DCD_ENDPOINT_MAX 9 //------------- Microchip -------------// #elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \ TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_SAMG) - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + #define TUP_DCD_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER #elif TU_CHECK_MCU(OPT_MCU_SAMX7X) - #define DCD_ATTR_ENDPOINT_MAX 10 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + #define TUP_DCD_ENDPOINT_MAX 10 + #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER #elif TU_CHECK_MCU(OPT_MCU_PIC32MZ) - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER //------------- ST -------------// #elif TU_CHECK_MCU(OPT_MCU_STM32F0) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32F1) #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \ defined (STM32F107xB) || defined (STM32F107xC) - #define DCD_ATTR_ENDPOINT_MAX 4 - #define TUP_USBIP_DWC2 - #define DCD_ATTR_DWC2_STM32 + #define TUP_USBIP_DWC2_STM32 + + #define TUP_DCD_ENDPOINT_MAX 4 #else - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #endif #elif TU_CHECK_MCU(OPT_MCU_STM32F2) - // FS has 4 ep, HS has 5 ep - #define DCD_ATTR_ENDPOINT_MAX 6 - #define TUP_USBIP_DWC2 - #define DCD_ATTR_DWC2_STM32 + #define TUP_USBIP_DWC2_STM32 + + // FS has 4 ep, HS has 5 ep + #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_STM32F3) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32F4) + #define TUP_USBIP_DWC2 + #define TUP_USBIP_DWC2_STM32 + // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9 - #define DCD_ATTR_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_MAX 6 +#elif TU_CHECK_MCU(OPT_MCU_STM32F7) #define TUP_USBIP_DWC2 - #define DCD_ATTR_DWC2_STM32 + #define TUP_USBIP_DWC2_STM32 -#elif TU_CHECK_MCU(OPT_MCU_STM32F7) // FS has 6, HS has 9 - #define DCD_ATTR_ENDPOINT_MAX 9 - - #define TUP_USBIP_DWC2 - #define DCD_ATTR_DWC2_STM32 + #define TUP_DCD_ENDPOINT_MAX 9 #elif TU_CHECK_MCU(OPT_MCU_STM32H7) - #define DCD_ATTR_ENDPOINT_MAX 9 - #define TUP_USBIP_DWC2 - #define DCD_ATTR_DWC2_STM32 + #define TUP_USBIP_DWC2_STM32 + + #define TUP_DCD_ENDPOINT_MAX 9 #elif TU_CHECK_MCU(OPT_MCU_STM32G4) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32L4) #if defined (STM32L475xx) || defined (STM32L476xx) || \ @@ -169,87 +171,87 @@ defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \ defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \ defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - #define DCD_ATTR_ENDPOINT_MAX 6 - #define TUP_USBIP_DWC2 - #define DCD_ATTR_DWC2_STM32 + #define TUP_USBIP_DWC2_STM32 + + #define TUP_DCD_ENDPOINT_MAX 6 #else - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #endif //------------- Sony -------------// #elif TU_CHECK_MCU(OPT_MCU_CXD56) - #define DCD_ATTR_ENDPOINT_MAX 7 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + #define TUP_DCD_ENDPOINT_MAX 7 + #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER //------------- TI -------------// #elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 //------------- ValentyUSB -------------// #elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI) - #define DCD_ATTR_ENDPOINT_MAX 16 + #define TUP_DCD_ENDPOINT_MAX 16 //------------- Nuvoton -------------// #elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_NUC120) - #define DCD_ATTR_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_NUC505) - #define DCD_ATTR_ENDPOINT_MAX 12 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_MAX 12 + #define TUP_RHPORT_HIGHSPEED 0x01 //------------- Espressif -------------// #elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) - #define DCD_ATTR_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_MAX 6 //------------- Dialog -------------// #elif TU_CHECK_MCU(OPT_MCU_DA1469X) - #define DCD_ATTR_ENDPOINT_MAX 4 + #define TUP_DCD_ENDPOINT_MAX 4 //------------- Raspberry Pi -------------// #elif TU_CHECK_MCU(OPT_MCU_RP2040) - #define DCD_ATTR_ENDPOINT_MAX 16 + #define TUP_DCD_ENDPOINT_MAX 16 //------------- Silabs -------------// #elif TU_CHECK_MCU(OPT_MCU_EFM32GG) - #define DCD_ATTR_ENDPOINT_MAX 7 + #define TUP_DCD_ENDPOINT_MAX 7 //------------- Renesas -------------// #elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) - #define DCD_ATTR_ENDPOINT_MAX 10 + #define TUP_DCD_ENDPOINT_MAX 10 //------------- GigaDevice -------------// #elif TU_CHECK_MCU(OPT_MCU_GD32VF103) - #define DCD_ATTR_ENDPOINT_MAX 4 + #define TUP_DCD_ENDPOINT_MAX 4 //------------- Broadcom -------------// #elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837) - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_RHPORT_HIGHSPEED 0x01 //------------- Broadcom -------------// #elif TU_CHECK_MCU(OPT_MCU_XMC4000) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 //------------- BridgeTek -------------// #elif TU_CHECK_MCU(OPT_MCU_FT90X) - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_RHPORT_HIGHSPEED 0x01 #elif TU_CHECK_MCU(OPT_MCU_FT93X) - #define DCD_ATTR_ENDPOINT_MAX 16 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_MAX 16 + #define TUP_RHPORT_HIGHSPEED 0x01 //------------ Allwinner -------------// #elif TU_CHECK_MCU(OPT_MCU_F1C100S) - #define DCD_ATTR_ENDPOINT_MAX 4 + #define TUP_DCD_ENDPOINT_MAX 4 #endif @@ -257,14 +259,14 @@ // Default Values //--------------------------------------------------------------------+ -#ifndef DCD_ATTR_ENDPOINT_MAX - #warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8" - #define DCD_ATTR_ENDPOINT_MAX 8 +#ifndef TUP_DCD_ENDPOINT_MAX + #warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8" + #define TUP_DCD_ENDPOINT_MAX 8 #endif // Default to fullspeed if not defined -#ifndef DCD_ATTR_RHPORT_HIGHSPEED - #define DCD_ATTR_RHPORT_HIGHSPEED 0x00 +#ifndef TUP_RHPORT_HIGHSPEED + #define TUP_RHPORT_HIGHSPEED 0x00 #endif #endif diff --git a/src/device/dcd.h b/src/device/dcd.h index 4e725c95a..8efbc90ef 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -40,7 +40,7 @@ //--------------------------------------------------------------------+ #ifndef CFG_TUD_ENDPPOINT_MAX - #define CFG_TUD_ENDPPOINT_MAX DCD_ATTR_ENDPOINT_MAX + #define CFG_TUD_ENDPPOINT_MAX TUP_DCD_ENDPOINT_MAX #endif //--------------------------------------------------------------------+ diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 726c7a517..32c2fc029 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -151,8 +151,8 @@ typedef struct { // Must be at 2K alignment // Each endpoint with direction (IN/OUT) occupies a queue head // for portability, TinyUSB only queue 1 TD for each Qhd - dcd_qhd_t qhd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64); - dcd_qtd_t qtd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32); + dcd_qhd_t qhd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64); + dcd_qtd_t qtd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32); }dcd_data_t; CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048) @@ -619,7 +619,7 @@ void dcd_int_handler(uint8_t rhport) if ( edpt_complete ) { - for(uint8_t epnum = 0; epnum < DCD_ATTR_ENDPOINT_MAX; epnum++) + for(uint8_t epnum = 0; epnum < TUP_DCD_ENDPOINT_MAX; epnum++) { if ( tu_bit_test(edpt_complete, epnum) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_OUT); if ( tu_bit_test(edpt_complete, epnum+16) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_IN); diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index ac873455b..acfc561fe 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -26,7 +26,7 @@ #include "tusb_option.h" -#if CFG_TUH_ENABLED && defined(HCD_ATTR_EHCI) +#if CFG_TUH_ENABLED && defined(TUP_USBIP_EHCI) //--------------------------------------------------------------------+ // INCLUDE diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c index 71414e737..d36585592 100644 --- a/src/portable/mentor/musb/dcd_musb.c +++ b/src/portable/mentor/musb/dcd_musb.c @@ -170,13 +170,13 @@ static inline void print_block_list(free_block_t const *blk, unsigned num) static unsigned find_free_memory(uint_fast16_t size_in_log2_minus3) { - free_block_t free_blocks[2 * (DCD_ATTR_ENDPOINT_MAX - 1)]; + free_block_t free_blocks[2 * (TUP_DCD_ENDPOINT_MAX - 1)]; unsigned num_blocks = 1; /* Initialize free memory block list */ free_blocks[0].beg = 64 / 8; free_blocks[0].end = (4 << 10) / 8; /* 4KiB / 8 bytes */ - for (int i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) { + for (int i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) { uint_fast16_t addr; int num; USB0->EPIDX = i; @@ -575,7 +575,7 @@ static void process_bus_reset(uint8_t rhport) USB0->RXIE = 0; /* Clear FIFO settings */ - for (unsigned i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) { + for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) { USB0->EPIDX = i; USB0->TXFIFOSZ = 0; USB0->TXFIFOADD = 0; @@ -663,7 +663,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) const unsigned xfer = ep_desc->bmAttributes.xfer; const unsigned mps = tu_edpt_packet_size(ep_desc); - TU_ASSERT(epn < DCD_ATTR_ENDPOINT_MAX); + TU_ASSERT(epn < TUP_DCD_ENDPOINT_MAX); pipe_state_t *pipe = &_dcd.pipe[dir_in][epn - 1]; pipe->buf = NULL; @@ -715,7 +715,7 @@ void dcd_edpt_close_all(uint8_t rhport) NVIC_DisableIRQ(USB0_IRQn); USB0->TXIE = 1; /* Enable only EP0 */ USB0->RXIE = 0; - for (unsigned i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) { + for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) { regs->TXMAXP = 0; regs->TXCSRH = 0; if (regs->TXCSRL & USB_TXCSRL1_TXRDY) diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c index 9f5979ab4..108baf99d 100644 --- a/src/portable/nxp/transdimension/dcd_transdimension.c +++ b/src/portable/nxp/transdimension/dcd_transdimension.c @@ -179,8 +179,8 @@ typedef struct { // Must be at 2K alignment // Each endpoint with direction (IN/OUT) occupies a queue head // for portability, TinyUSB only queue 1 TD for each Qhd - dcd_qhd_t qhd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64); - dcd_qtd_t qtd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32); + dcd_qhd_t qhd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64); + dcd_qtd_t qtd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32); }dcd_data_t; CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048) @@ -647,7 +647,7 @@ void dcd_int_handler(uint8_t rhport) if ( edpt_complete ) { - for(uint8_t epnum = 0; epnum < DCD_ATTR_ENDPOINT_MAX; epnum++) + for(uint8_t epnum = 0; epnum < TUP_DCD_ENDPOINT_MAX; epnum++) { if ( tu_bit_test(edpt_complete, epnum) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_OUT); if ( tu_bit_test(edpt_complete, epnum+16) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_IN); diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c index c9e1061f9..cb4e6dc4a 100644 --- a/src/portable/ohci/ohci.c +++ b/src/portable/ohci/ohci.c @@ -26,7 +26,7 @@ #include "tusb_option.h" -#if CFG_TUH_ENABLED && defined(HCD_ATTR_OHCI) +#if CFG_TUH_ENABLED && defined(TUP_USBIP_OHCI) //--------------------------------------------------------------------+ // INCLUDE diff --git a/src/portable/sunxi/dcd_sunxi_musb.c b/src/portable/sunxi/dcd_sunxi_musb.c index 447069f88..27514339b 100644 --- a/src/portable/sunxi/dcd_sunxi_musb.c +++ b/src/portable/sunxi/dcd_sunxi_musb.c @@ -426,7 +426,7 @@ static inline void print_block_list(free_block_t const *blk, unsigned num) static unsigned find_free_memory(uint_fast16_t size_in_log2_minus3) { - free_block_t free_blocks[2 * (DCD_ATTR_ENDPOINT_MAX - 1)]; + free_block_t free_blocks[2 * (TUP_DCD_ENDPOINT_MAX - 1)]; unsigned num_blocks = 1; /* Backup current EP to restore later */ u8 backup_ep = USBC_GetActiveEp(); @@ -434,7 +434,7 @@ static unsigned find_free_memory(uint_fast16_t size_in_log2_minus3) /* Initialize free memory block list */ free_blocks[0].beg = 64 / 8; free_blocks[0].end = (USB_FIFO_SIZE_KB << 10) / 8; /* 2KiB / 8 bytes */ - for (int i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) { + for (int i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) { uint_fast16_t addr; int num; USBC_SelectActiveEp(i); @@ -974,7 +974,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) const unsigned xfer = ep_desc->bmAttributes.xfer; const unsigned mps = tu_edpt_packet_size(ep_desc); - TU_ASSERT(epn < DCD_ATTR_ENDPOINT_MAX); + TU_ASSERT(epn < TUP_DCD_ENDPOINT_MAX); pipe_state_t *pipe = &_dcd.pipe[dir_in][epn - 1]; pipe->buf = NULL; @@ -1033,7 +1033,7 @@ void dcd_edpt_close_all(uint8_t rhport) musb_int_mask(); USBC_Writew(1, USBC_REG_INTTxE(USBC0_BASE)); /* Enable only EP0 */ USBC_Writew(0, USBC_REG_INTRxE(USBC0_BASE)); - for (unsigned i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) { + for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) { USBC_SelectActiveEp(i); USBC_Writew(0, USBC_REG_TXMAXP(USBC0_BASE)); USBC_Writew((1 << USBC_BP_TXCSR_D_MODE) | (1 << USBC_BP_TXCSR_D_CLEAR_DATA_TOGGLE) | (1 << USBC_BP_TXCSR_D_FLUSH_FIFO), diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index 377f0f44e..a765bc275 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -38,7 +38,7 @@ #include "device/dcd.h" #include "dwc2_type.h" -#if defined(DCD_ATTR_DWC2_STM32) +#if defined(TUP_USBIP_DWC2_STM32) #include "dwc2_stm32.h" #elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) #include "dwc2_esp32.h" diff --git a/src/tusb_option.h b/src/tusb_option.h index 3c2207c26..25e536787 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -218,7 +218,7 @@ #endif #define CFG_TUD_ENABLED ( TUD_RHPORT_MODE & OPT_MODE_DEVICE ) -#define TUD_OPT_HIGH_SPEED ( (TUD_RHPORT_MODE & OPT_MODE_SPEED_MASK) ? (TUD_RHPORT_MODE & OPT_MODE_HIGH_SPEED) : (DCD_ATTR_RHPORT_HIGHSPEED & (1 << TUD_OPT_RHPORT)) ) +#define TUD_OPT_HIGH_SPEED ( (TUD_RHPORT_MODE & OPT_MODE_SPEED_MASK) ? (TUD_RHPORT_MODE & OPT_MODE_HIGH_SPEED) : (TUP_RHPORT_HIGHSPEED & (1 << TUD_OPT_RHPORT)) ) //------------- Roothub as Host -------------// -- cgit v1.3.1 From a4ba3f2891bad76cb3188159ac8e8dc223175230 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 26 Feb 2022 17:13:06 +0700 Subject: add TUP_USBIP_DWC2 --- src/common/tusb_mcu.h | 111 ++++++++++++++++++---------------- src/portable/synopsys/dwc2/dcd_dwc2.c | 6 +- 2 files changed, 59 insertions(+), 58 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index b4e023165..5fc504437 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -51,10 +51,10 @@ //------------- NXP -------------// #if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) - #define TUP_DCD_ENDPOINT_MAX 5 + #define TUP_DCD_ENDPOINT_MAX 5 #elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) - #define TUP_DCD_ENDPOINT_MAX 16 + #define TUP_DCD_ENDPOINT_MAX 16 #define TUP_USBIP_OHCI #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) @@ -62,8 +62,8 @@ #define TUP_USBIP_CHIPIDEA_HS #define TUP_USBIP_EHCI - #define TUP_DCD_ENDPOINT_MAX 6 - #define TUP_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS + #define TUP_DCD_ENDPOINT_MAX 6 + #define TUP_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX) @@ -71,52 +71,52 @@ #elif TU_CHECK_MCU(OPT_MCU_LPC54XXX) // TODO USB0 has 5, USB1 has 6 - #define TUP_DCD_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_LPC55XX) // TODO USB0 has 5, USB1 has 6 - #define TUP_DCD_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX) #define TUP_USBIP_CHIPIDEA_HS #define TUP_USBIP_EHCI - #define TUP_DCD_ENDPOINT_MAX 8 - #define TUP_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS + #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS #elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX) - #define TUP_DCD_ENDPOINT_MAX 16 + #define TUP_DCD_ENDPOINT_MAX 16 #elif TU_CHECK_MCU(OPT_MCU_MM32F327X) - #define TUP_DCD_ENDPOINT_MAX 16 + #define TUP_DCD_ENDPOINT_MAX 16 //------------- Nordic -------------// #elif TU_CHECK_MCU(OPT_MCU_NRF5X) // 8 CBI + 1 ISO - #define TUP_DCD_ENDPOINT_MAX 9 + #define TUP_DCD_ENDPOINT_MAX 9 //------------- Microchip -------------// #elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \ TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22) - #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_SAMG) - #define TUP_DCD_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_MAX 6 #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER #elif TU_CHECK_MCU(OPT_MCU_SAMX7X) - #define TUP_DCD_ENDPOINT_MAX 10 - #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_MAX 10 + #define TUP_RHPORT_HIGHSPEED 0x01 #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER #elif TU_CHECK_MCU(OPT_MCU_PIC32MZ) - #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER //------------- ST -------------// #elif TU_CHECK_MCU(OPT_MCU_STM32F0) - #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32F1) #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \ @@ -124,9 +124,9 @@ #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_STM32 - #define TUP_DCD_ENDPOINT_MAX 4 + #define TUP_DCD_ENDPOINT_MAX 4 #else - #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #endif #elif TU_CHECK_MCU(OPT_MCU_STM32F2) @@ -134,36 +134,36 @@ #define TUP_USBIP_DWC2_STM32 // FS has 4 ep, HS has 5 ep - #define TUP_DCD_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_STM32F3) - #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32F4) #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_STM32 // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9 - #define TUP_DCD_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_STM32F7) #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_STM32 // FS has 6, HS has 9 - #define TUP_DCD_ENDPOINT_MAX 9 + #define TUP_DCD_ENDPOINT_MAX 9 #elif TU_CHECK_MCU(OPT_MCU_STM32H7) #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_STM32 - #define TUP_DCD_ENDPOINT_MAX 9 + #define TUP_DCD_ENDPOINT_MAX 9 #elif TU_CHECK_MCU(OPT_MCU_STM32G4) - #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1) - #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32L4) #if defined (STM32L475xx) || defined (STM32L476xx) || \ @@ -174,84 +174,89 @@ #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_STM32 - #define TUP_DCD_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_MAX 6 #else - #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #endif //------------- Sony -------------// #elif TU_CHECK_MCU(OPT_MCU_CXD56) - #define TUP_DCD_ENDPOINT_MAX 7 - #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_MAX 7 + #define TUP_RHPORT_HIGHSPEED 0x01 #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER //------------- TI -------------// #elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx) - #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129) - #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 //------------- ValentyUSB -------------// #elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI) - #define TUP_DCD_ENDPOINT_MAX 16 + #define TUP_DCD_ENDPOINT_MAX 16 //------------- Nuvoton -------------// #elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126) - #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_NUC120) - #define TUP_DCD_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_NUC505) - #define TUP_DCD_ENDPOINT_MAX 12 - #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_MAX 12 + #define TUP_RHPORT_HIGHSPEED 0x01 //------------- Espressif -------------// #elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) - #define TUP_DCD_ENDPOINT_MAX 6 + #define TUP_USBIP_DWC2 + #define TUP_DCD_ENDPOINT_MAX 6 //------------- Dialog -------------// #elif TU_CHECK_MCU(OPT_MCU_DA1469X) - #define TUP_DCD_ENDPOINT_MAX 4 + #define TUP_DCD_ENDPOINT_MAX 4 //------------- Raspberry Pi -------------// #elif TU_CHECK_MCU(OPT_MCU_RP2040) - #define TUP_DCD_ENDPOINT_MAX 16 + #define TUP_DCD_ENDPOINT_MAX 16 //------------- Silabs -------------// #elif TU_CHECK_MCU(OPT_MCU_EFM32GG) - #define TUP_DCD_ENDPOINT_MAX 7 + #define TUP_USBIP_DWC2 + #define TUP_DCD_ENDPOINT_MAX 7 //------------- Renesas -------------// #elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) - #define TUP_DCD_ENDPOINT_MAX 10 + #define TUP_DCD_ENDPOINT_MAX 10 //------------- GigaDevice -------------// #elif TU_CHECK_MCU(OPT_MCU_GD32VF103) - #define TUP_DCD_ENDPOINT_MAX 4 + #define TUP_USBIP_DWC2 + #define TUP_DCD_ENDPOINT_MAX 4 //------------- Broadcom -------------// #elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837) - #define TUP_DCD_ENDPOINT_MAX 8 - #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_USBIP_DWC2 + #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_RHPORT_HIGHSPEED 0x01 //------------- Broadcom -------------// #elif TU_CHECK_MCU(OPT_MCU_XMC4000) - #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_USBIP_DWC2 + #define TUP_DCD_ENDPOINT_MAX 8 //------------- BridgeTek -------------// #elif TU_CHECK_MCU(OPT_MCU_FT90X) - #define TUP_DCD_ENDPOINT_MAX 8 - #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_RHPORT_HIGHSPEED 0x01 #elif TU_CHECK_MCU(OPT_MCU_FT93X) - #define TUP_DCD_ENDPOINT_MAX 16 - #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_MAX 16 + #define TUP_RHPORT_HIGHSPEED 0x01 //------------ Allwinner -------------// #elif TU_CHECK_MCU(OPT_MCU_F1C100S) - #define TUP_DCD_ENDPOINT_MAX 4 + #define TUP_DCD_ENDPOINT_MAX 4 #endif @@ -261,12 +266,12 @@ #ifndef TUP_DCD_ENDPOINT_MAX #warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8" - #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #endif // Default to fullspeed if not defined #ifndef TUP_RHPORT_HIGHSPEED - #define TUP_RHPORT_HIGHSPEED 0x00 + #define TUP_RHPORT_HIGHSPEED 0x00 #endif #endif diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index a765bc275..c71f38d2d 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -29,11 +29,7 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && \ - ( defined(TUP_USBIP_DWC2) || \ - TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_GD32VF103) || \ - TU_CHECK_MCU(OPT_MCU_EFM32GG, OPT_MCU_BCM2711, OPT_MCU_BCM2835) || \ - TU_CHECK_MCU(OPT_MCU_BCM2837, OPT_MCU_XMC4000) ) +#if CFG_TUD_ENABLED && defined(TUP_USBIP_DWC2) #include "device/dcd.h" #include "dwc2_type.h" -- cgit v1.3.1 From 2fe3a925fbee91c1b5d8515c9fba25e5bd8b87a6 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 26 Feb 2022 17:34:29 +0700 Subject: add highspeed detect for f723/730/733 --- src/common/tusb_mcu.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/common') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 5fc504437..465e33ec7 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -153,6 +153,11 @@ // FS has 6, HS has 9 #define TUP_DCD_ENDPOINT_MAX 9 + // MCU with on-chip HS Phy + #if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx) + #define TUP_RHPORT_HIGHSPEED 0x02 // Port 0: FS, Port 1: HS + #endif + #elif TU_CHECK_MCU(OPT_MCU_STM32H7) #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_STM32 -- cgit v1.3.1 From 2cd73ca60234748a15b74a2c346778fcb4f4ee61 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Thu, 3 Mar 2022 16:53:22 -0800 Subject: Add host string descriptor functions Plus typo fixes, GCC11 array bounds fix, snprintf for malloc-free debug and pragmas for alignment checks. --- src/common/tusb_common.h | 2 +- src/host/usbh.c | 57 +++++++++++++++++++++++++++- src/host/usbh.h | 12 ++++++ src/portable/chipidea/ci_hs/hcd_ci_hs.c | 1 + src/portable/ehci/ehci.c | 3 ++ src/portable/ehci/ehci.h | 4 +- src/portable/raspberrypi/rp2040/rp2040_usb.c | 3 ++ 7 files changed, 78 insertions(+), 4 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 9b9e2b007..80bb40f77 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -349,7 +349,7 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3 } // not found return the key value in hex - sprintf(not_found, "0x%08lX", (unsigned long) key); + snprintf(not_found, sizeof(not_found), "0x%08lX", (unsigned long) key); return not_found; } diff --git a/src/host/usbh.c b/src/host/usbh.c index 130aba40e..a3c6c3a04 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -258,6 +258,60 @@ bool tuh_vid_pid_get(uint8_t dev_addr, uint16_t* vid, uint16_t* pid) return true; } +uint8_t tuh_i_manufacturer_get(uint8_t dev_addr) { + TU_VERIFY(tuh_mounted(dev_addr)); + usbh_device_t const* dev = get_device(dev_addr); + + return dev->i_manufacturer; +} + +uint8_t tuh_i_serial_get(uint8_t dev_addr) { + TU_VERIFY(tuh_mounted(dev_addr)); + usbh_device_t const* dev = get_device(dev_addr); + + return dev->i_serial; +} + +uint8_t tuh_i_product_get(uint8_t dev_addr) { + TU_VERIFY(tuh_mounted(dev_addr)); + usbh_device_t const* dev = get_device(dev_addr); + + return dev->i_product; +} + +static tuh_complete_cb_t string_get_cb; + +static bool string_get_complete (uint8_t dev_addr, tusb_control_request_t const * request, xfer_result_t result) { + if (string_get_cb != NULL) { + TU_LOG2("string get done %d\r\n", result); + string_get_cb(result); + } + string_get_cb = NULL; + return true; +} + +bool tuh_string_get(uint8_t dev_addr, uint8_t string_index, uint16_t* buf, size_t len, tuh_complete_cb_t complete_cb) { + if (string_get_cb != NULL) { + return false; + } + tusb_control_request_t const request = + { + .bmRequestType_bit = + { + .recipient = TUSB_REQ_RCPT_DEVICE, + .type = TUSB_REQ_TYPE_STANDARD, + .direction = TUSB_DIR_IN + }, + .bRequest = TUSB_REQ_GET_DESCRIPTOR, + .wValue = TUSB_DESC_STRING << 8 | string_index, + .wIndex = 0, + .wLength = len * sizeof(uint16_t) + }; + string_get_cb = complete_cb; + TU_ASSERT( tuh_control_xfer(dev_addr, &request, buf, string_get_complete) ); + return true; +} + tusb_speed_t tuh_speed_get (uint8_t dev_addr) { return (tusb_speed_t) (dev_addr ? get_device(dev_addr)->speed : _dev0.speed); @@ -561,6 +615,7 @@ void process_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t hub_port tu_memclr(dev->ep_status, sizeof(dev->ep_status)); dev->state = TUSB_DEVICE_STATE_UNPLUG; + dev->configured = false; } } } @@ -609,7 +664,7 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num) //--------------------------------------------------------------------+ // Enumeration Process -// is a lengthy process with a seires of control transfer to configure +// is a lengthy process with a series of control transfer to configure // newly attached device. Each step is handled by a function in this // section // TODO due to the shared _usbh_ctrl_buf, we must complete enumerating diff --git a/src/host/usbh.h b/src/host/usbh.h index 8411cad28..98e83fc3c 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -38,6 +38,7 @@ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ +typedef bool (*tuh_complete_cb_t)(xfer_result_t result); typedef bool (*tuh_control_complete_cb_t)(uint8_t dev_addr, tusb_control_request_t const * request, xfer_result_t result); //--------------------------------------------------------------------+ @@ -58,6 +59,17 @@ extern void hcd_int_handler(uint8_t rhport); #define tuh_int_handler hcd_int_handler bool tuh_vid_pid_get(uint8_t dev_addr, uint16_t* vid, uint16_t* pid); + +// Gets the string indices for common device descriptor data. +uint8_t tuh_i_manufacturer_get(uint8_t dev_addr); +uint8_t tuh_i_serial_get(uint8_t dev_addr); +uint8_t tuh_i_product_get(uint8_t dev_addr); + +// Reads the string descriptor at the string index into the buffer. This is the +// full response so the first entry is the length and the constant 0x03 for +// string descriptor type. +bool tuh_string_get(uint8_t dev_addr, uint8_t string_index, uint16_t* buf, size_t len, tuh_complete_cb_t complete_cb); + tusb_speed_t tuh_speed_get(uint8_t dev_addr); // Check if device is connected and configured diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c index 0754b477e..221721b0f 100644 --- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -35,6 +35,7 @@ // INCLUDE //--------------------------------------------------------------------+ #include "common/tusb_common.h" +#include "host/hcd.h" #include "portable/ehci/ehci_api.h" #include "ci_hs_type.h" diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index e2d51dc4b..6723e99e9 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -189,7 +189,10 @@ static void list_remove_qhd_by_addr(ehci_link_t* list_head, uint8_t dev_addr) prev = list_next(prev) ) { // TODO check type for ISO iTD and siTD + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wcast-align" ehci_qhd_t* qhd = (ehci_qhd_t*) list_next(prev); + #pragma GCC diagnostic pop if ( qhd->dev_addr == dev_addr ) { // TODO deactive all TD, wait for QHD to inactive before removal diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h index c2bee67a5..ff9ae12e7 100644 --- a/src/portable/ehci/ehci.h +++ b/src/portable/ehci/ehci.h @@ -101,8 +101,8 @@ typedef struct // Word 2: qTQ Token volatile uint32_t ping_err : 1 ; ///< For Highspeed: 0 Out, 1 Ping. Full/Slow used as error indicator - volatile uint32_t non_hs_split_state : 1 ; ///< Used by HC to track the state of slipt transaction - volatile uint32_t non_hs_missed_uframe : 1 ; ///< HC misses a complete slip transaction + volatile uint32_t non_hs_split_state : 1 ; ///< Used by HC to track the state of split transaction + volatile uint32_t non_hs_missed_uframe : 1 ; ///< HC misses a complete split transaction volatile uint32_t xact_err : 1 ; ///< Error (Timeout, CRC, Bad PID ... ) volatile uint32_t babble_err : 1 ; ///< Babble detected, also set Halted bit to 1 volatile uint32_t buffer_err : 1 ; ///< Data overrun/underrun error diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index 293cefaf6..be02493f0 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -58,8 +58,11 @@ void rp2040_usb_init(void) unreset_block_wait(RESETS_RESET_USBCTRL_BITS); // Clear any previous state just in case +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Warray-bounds" memset(usb_hw, 0, sizeof(*usb_hw)); memset(usb_dpram, 0, sizeof(*usb_dpram)); +#pragma GCC diagnostic pop // Mux the controller to the onboard usb phy usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS; -- cgit v1.3.1 From e08a875d52792c03e1e7cd114f0f3f7013c36210 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 4 Mar 2022 19:26:54 +0700 Subject: add tuh_descriptor_get() and tuh_descriptor_device_get() --- src/common/tusb_common.h | 1 + src/device/usbd.c | 1 + src/host/usbh.c | 64 ++++++++++++++++++++++++------------------------ src/host/usbh.h | 39 +++++++++++++++++------------ 4 files changed, 58 insertions(+), 47 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 80bb40f77..26865805e 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -38,6 +38,7 @@ #define TU_MIN(_x, _y) ( ( (_x) < (_y) ) ? (_x) : (_y) ) #define TU_MAX(_x, _y) ( ( (_x) > (_y) ) ? (_x) : (_y) ) +#define TU_U16(_high, _low) ((uint16_t) (((_high) << 8) | (_low))) #define TU_U16_HIGH(_u16) ((uint8_t) (((_u16) >> 8) & 0x00ff)) #define TU_U16_LOW(_u16) ((uint8_t) ((_u16) & 0x00ff)) #define U16_TO_U8S_BE(_u16) TU_U16_HIGH(_u16), TU_U16_LOW(_u16) diff --git a/src/device/usbd.c b/src/device/usbd.c index c20bab76b..7926689b7 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -407,6 +407,7 @@ bool tud_init (uint8_t rhport) if ( tud_inited() ) return true; TU_LOG2("USBD init\r\n"); + TU_LOG2_INT(sizeof(usbd_device_t)); tu_varclr(&_usbd_dev); diff --git a/src/host/usbh.c b/src/host/usbh.c index d655ee7ca..4c3bda4b0 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -96,7 +96,7 @@ typedef struct { //------------- device -------------// volatile uint8_t state; // device state, value from enum tusbh_device_state_t - uint8_t itf2drv[16]; // map interface number to driver (0xff is invalid) + uint8_t itf2drv[8]; // map interface number to driver (0xff is invalid) uint8_t ep2drv[CFG_TUH_ENDPOINT_MAX][2]; // map endpoint to driver ( 0xff is invalid ) struct TU_ATTR_PACKED @@ -253,6 +253,34 @@ bool tuh_vid_pid_get(uint8_t dev_addr, uint16_t* vid, uint16_t* pid) return true; } + +bool tuh_descriptor_get(uint8_t daddr, uint8_t type, uint8_t index, + void* buffer, uint16_t len, tuh_control_complete_cb_t complete_cb) +{ + tusb_control_request_t const request = + { + .bmRequestType_bit = + { + .recipient = TUSB_REQ_RCPT_DEVICE, + .type = TUSB_REQ_TYPE_STANDARD, + .direction = TUSB_DIR_IN + }, + .bRequest = TUSB_REQ_GET_DESCRIPTOR, + .wValue = tu_htole16( TU_U16(type, index) ), + .wIndex = 0, + .wLength = len + }; + + TU_ASSERT( tuh_control_xfer(daddr, &request, buffer, complete_cb) ); + + return true; +} + +bool tuh_descriptor_device_get(uint8_t daddr, void* buffer, uint16_t len, tuh_control_complete_cb_t complete_cb) +{ + return tuh_descriptor_get(daddr, TUSB_DESC_DEVICE, 0, buffer, len, complete_cb); +} + uint8_t tuh_i_manufacturer_get(uint8_t dev_addr) { TU_VERIFY(tuh_mounted(dev_addr)); usbh_device_t const* dev = get_device(dev_addr); @@ -338,7 +366,6 @@ bool tuh_init(uint8_t rhport) if (_usbh_initialized) return _usbh_initialized; TU_LOG2("USBH init\r\n"); - TU_LOG2_INT(sizeof(usbh_device_t)); tu_memclr(_usbh_devices, sizeof(_usbh_devices)); @@ -785,23 +812,10 @@ static bool enum_request_addr0_device_desc(void) uint8_t const addr0 = 0; TU_ASSERT( usbh_edpt_control_open(addr0, 8) ); - //------------- Get first 8 bytes of device descriptor to get Control Endpoint Size -------------// + // Get first 8 bytes of device descriptor for Control Endpoint size TU_LOG2("Get 8 byte of Device Descriptor\r\n"); - tusb_control_request_t const request = - { - .bmRequestType_bit = - { - .recipient = TUSB_REQ_RCPT_DEVICE, - .type = TUSB_REQ_TYPE_STANDARD, - .direction = TUSB_DIR_IN - }, - .bRequest = TUSB_REQ_GET_DESCRIPTOR, - .wValue = TUSB_DESC_DEVICE << 8, - .wIndex = 0, - .wLength = 8 - }; - TU_ASSERT( tuh_control_xfer(addr0, &request, _usbh_ctrl_buf, enum_get_addr0_device_desc_complete) ); + TU_ASSERT(tuh_descriptor_device_get(addr0, _usbh_ctrl_buf, 8, enum_get_addr0_device_desc_complete)); return true; } @@ -909,22 +923,8 @@ static bool enum_set_address_complete(uint8_t dev_addr, tusb_control_request_t c // Get full device descriptor TU_LOG2("Get Device Descriptor\r\n"); - tusb_control_request_t const new_request = - { - .bmRequestType_bit = - { - .recipient = TUSB_REQ_RCPT_DEVICE, - .type = TUSB_REQ_TYPE_STANDARD, - .direction = TUSB_DIR_IN - }, - .bRequest = TUSB_REQ_GET_DESCRIPTOR, - .wValue = TUSB_DESC_DEVICE << 8, - .wIndex = 0, - .wLength = sizeof(tusb_desc_device_t) - }; - - TU_ASSERT(tuh_control_xfer(new_addr, &new_request, _usbh_ctrl_buf, enum_get_device_desc_complete)); + TU_ASSERT(tuh_descriptor_device_get(new_addr, _usbh_ctrl_buf, sizeof(tusb_desc_device_t), enum_get_device_desc_complete)); return true; } diff --git a/src/host/usbh.h b/src/host/usbh.h index 98e83fc3c..9af139283 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -39,7 +39,7 @@ //--------------------------------------------------------------------+ typedef bool (*tuh_complete_cb_t)(xfer_result_t result); -typedef bool (*tuh_control_complete_cb_t)(uint8_t dev_addr, tusb_control_request_t const * request, xfer_result_t result); +typedef bool (*tuh_control_complete_cb_t)(uint8_t daddr, tusb_control_request_t const * request, xfer_result_t result); //--------------------------------------------------------------------+ // APPLICATION API @@ -58,40 +58,49 @@ void tuh_task(void); extern void hcd_int_handler(uint8_t rhport); #define tuh_int_handler hcd_int_handler -bool tuh_vid_pid_get(uint8_t dev_addr, uint16_t* vid, uint16_t* pid); +//------------- descriptors -------------// + +// Get an descriptor +bool tuh_descriptor_get(uint8_t daddr, uint8_t type, uint8_t index, + void* buffer, uint16_t len, tuh_control_complete_cb_t complete_cb); + +// Get device descriptor +bool tuh_descriptor_device_get(uint8_t daddr, void* buffer, uint16_t len, tuh_control_complete_cb_t complete_cb); + +bool tuh_vid_pid_get(uint8_t daddr, uint16_t* vid, uint16_t* pid); // Gets the string indices for common device descriptor data. -uint8_t tuh_i_manufacturer_get(uint8_t dev_addr); -uint8_t tuh_i_serial_get(uint8_t dev_addr); -uint8_t tuh_i_product_get(uint8_t dev_addr); +uint8_t tuh_i_manufacturer_get(uint8_t daddr); +uint8_t tuh_i_serial_get(uint8_t daddr); +uint8_t tuh_i_product_get(uint8_t daddr); // Reads the string descriptor at the string index into the buffer. This is the // full response so the first entry is the length and the constant 0x03 for // string descriptor type. -bool tuh_string_get(uint8_t dev_addr, uint8_t string_index, uint16_t* buf, size_t len, tuh_complete_cb_t complete_cb); +bool tuh_string_get(uint8_t daddr, uint8_t string_index, uint16_t* buf, size_t len, tuh_complete_cb_t complete_cb); -tusb_speed_t tuh_speed_get(uint8_t dev_addr); +tusb_speed_t tuh_speed_get(uint8_t daddr); // Check if device is connected and configured -bool tuh_mounted(uint8_t dev_addr); +bool tuh_mounted(uint8_t daddr); // Check if device is suspended -static inline bool tuh_suspended(uint8_t dev_addr) +static inline bool tuh_suspended(uint8_t daddr) { // TODO implement suspend & resume on host - (void) dev_addr; + (void) daddr; return false; } // Check if device is ready to communicate with TU_ATTR_ALWAYS_INLINE -static inline bool tuh_ready(uint8_t dev_addr) +static inline bool tuh_ready(uint8_t daddr) { - return tuh_mounted(dev_addr) && !tuh_suspended(dev_addr); + return tuh_mounted(daddr) && !tuh_suspended(daddr); } // Carry out control transfer -bool tuh_control_xfer (uint8_t dev_addr, tusb_control_request_t const* request, void* buffer, tuh_control_complete_cb_t complete_cb); +bool tuh_control_xfer (uint8_t daddr, tusb_control_request_t const* request, void* buffer, tuh_control_complete_cb_t complete_cb); //--------------------------------------------------------------------+ // APPLICATION CALLBACK @@ -99,10 +108,10 @@ bool tuh_control_xfer (uint8_t dev_addr, tusb_control_request_t const* request, //TU_ATTR_WEAK uint8_t tuh_attach_cb (tusb_desc_device_t const *desc_device); // Invoked when device is mounted (configured) -TU_ATTR_WEAK void tuh_mount_cb (uint8_t dev_addr); +TU_ATTR_WEAK void tuh_mount_cb (uint8_t daddr); /// Invoked when device is unmounted (bus reset/unplugged) -TU_ATTR_WEAK void tuh_umount_cb(uint8_t dev_addr); +TU_ATTR_WEAK void tuh_umount_cb(uint8_t daddr); #ifdef __cplusplus } -- cgit v1.3.1 From a18ac842298d3742dc7044bd0db5c2351a4219a8 Mon Sep 17 00:00:00 2001 From: Jerzy Kasenberg Date: Sat, 5 Mar 2022 17:09:04 +0100 Subject: Add support for STM32WB mcu --- src/common/tusb_mcu.h | 3 +++ src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 10 +++++++++- src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 7 +++++++ src/tusb_option.h | 1 + 4 files changed, 20 insertions(+), 1 deletion(-) (limited to 'src/common') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 465e33ec7..8eb4ad475 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -184,6 +184,9 @@ #define TUP_DCD_ENDPOINT_MAX 8 #endif +#elif TU_CHECK_MCU(OPT_MCU_STM32WB) +#define TUP_DCD_ENDPOINT_MAX 8 + //------------- Sony -------------// #elif TU_CHECK_MCU(OPT_MCU_CXD56) #define TUP_DCD_ENDPOINT_MAX 7 diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index f201a02cf..4fd189188 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -110,7 +110,7 @@ #endif #if CFG_TUD_ENABLED && \ - ( TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F3, OPT_MCU_STM32L0, OPT_MCU_STM32L1, OPT_MCU_STM32G4) || \ + ( TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F3, OPT_MCU_STM32L0, OPT_MCU_STM32L1, OPT_MCU_STM32G4, OPT_MCU_STM32WB) || \ (TU_CHECK_MCU(OPT_MCU_STM32F1) && defined(STM32F1_FSDEV)) \ ) @@ -328,6 +328,10 @@ void dcd_int_enable (uint8_t rhport) NVIC_EnableIRQ(USB_LP_IRQn); NVIC_EnableIRQ(USBWakeUp_IRQn); +#elif CFG_TUSB_MCU == OPT_MCU_STM32WB + NVIC_EnableIRQ(USB_HP_IRQn); + NVIC_EnableIRQ(USB_LP_IRQn); + #else #error Unknown arch in USB driver #endif @@ -370,6 +374,10 @@ void dcd_int_disable(uint8_t rhport) NVIC_DisableIRQ(USB_LP_IRQn); NVIC_DisableIRQ(USBWakeUp_IRQn); +#elif CFG_TUSB_MCU == OPT_MCU_STM32WB + NVIC_DisableIRQ(USB_HP_IRQn); + NVIC_DisableIRQ(USB_LP_IRQn); + #else #error Unknown arch in USB driver #endif diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h index 596f7be6c..bffae4500 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h @@ -91,6 +91,13 @@ #include "stm32g4xx.h" #define PMA_LENGTH (1024u) +#elif CFG_TUSB_MCU == OPT_MCU_STM32WB + #include "stm32wbxx.h" + #define PMA_LENGTH (1024u) + /* ST provided header has incorrect value */ + #undef USB_PMAADDR + #define USB_PMAADDR USB1_PMAADDR + #else #error You are using an untested or unimplemented STM32 variant. Please update the driver. // This includes L1x0, L1x1, L1x2, L4x2 and L4x3, G1x1, G1x3, and G1x4 diff --git a/src/tusb_option.h b/src/tusb_option.h index 25e536787..3f404872a 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -80,6 +80,7 @@ #define OPT_MCU_STM32L4 309 ///< ST L4 #define OPT_MCU_STM32G0 310 ///< ST G0 #define OPT_MCU_STM32G4 311 ///< ST G4 +#define OPT_MCU_STM32WB 312 ///< ST WB // Sony #define OPT_MCU_CXD56 400 ///< SONY CXD56 -- cgit v1.3.1 From 708f05668d681439e521379e281d087d1910a0f3 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 9 Mar 2022 16:42:51 +0700 Subject: add tusb_debug.h remove tusb_error.h move debug utils to new header --- src/class/cdc/cdc_host.c | 4 +- src/class/cdc/cdc_rndis_host.h | 2 +- src/class/vendor/vendor_host.h | 12 +-- src/common/tusb_common.h | 134 +------------------------------ src/common/tusb_debug.h | 174 +++++++++++++++++++++++++++++++++++++++++ src/common/tusb_error.h | 77 ------------------ src/common/tusb_verify.h | 28 ------- src/device/usbd.c | 21 +---- src/host/usbh.c | 13 ++- src/host/usbh_control.c | 7 +- src/tusb.c | 22 +++++- 11 files changed, 220 insertions(+), 274 deletions(-) create mode 100644 src/common/tusb_debug.h delete mode 100644 src/common/tusb_error.h (limited to 'src/common') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index c18234db4..2787cd201 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -100,7 +100,7 @@ bool tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length, bool i { (void) is_notify; TU_VERIFY( tuh_cdc_mounted(dev_addr) ); - TU_VERIFY( p_data != NULL && length, TUSB_ERROR_INVALID_PARA); + TU_VERIFY( p_data != NULL && length); uint8_t const ep_out = cdch_data[dev_addr-1].ep_out; if ( usbh_edpt_busy(dev_addr, ep_out) ) return false; @@ -112,7 +112,7 @@ bool tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is { (void) is_notify; TU_VERIFY( tuh_cdc_mounted(dev_addr) ); - TU_VERIFY( p_buffer != NULL && length, TUSB_ERROR_INVALID_PARA); + TU_VERIFY( p_buffer != NULL && length ); uint8_t const ep_in = cdch_data[dev_addr-1].ep_in; if ( usbh_edpt_busy(dev_addr, ep_in) ) return false; diff --git a/src/class/cdc/cdc_rndis_host.h b/src/class/cdc/cdc_rndis_host.h index 170cb3b0e..447cc4e97 100644 --- a/src/class/cdc/cdc_rndis_host.h +++ b/src/class/cdc/cdc_rndis_host.h @@ -50,7 +50,7 @@ typedef struct { }rndish_data_t; void rndish_init(void); -tusb_error_t rndish_open_subtask(uint8_t dev_addr, cdch_data_t *p_cdc); +bool rndish_open_subtask(uint8_t dev_addr, cdch_data_t *p_cdc); void rndish_xfer_isr(cdch_data_t *p_cdc, pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); void rndish_close(uint8_t dev_addr); diff --git a/src/class/vendor/vendor_host.h b/src/class/vendor/vendor_host.h index 07fa56c61..65223fbca 100644 --- a/src/class/vendor/vendor_host.h +++ b/src/class/vendor/vendor_host.h @@ -49,16 +49,16 @@ static inline bool tusbh_custom_is_mounted(uint8_t dev_addr, uint16_t vendor_id, return false; } -tusb_error_t tusbh_custom_read(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void * p_buffer, uint16_t length); -tusb_error_t tusbh_custom_write(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void const * p_data, uint16_t length); +bool tusbh_custom_read(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void * p_buffer, uint16_t length); +bool tusbh_custom_write(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void const * p_data, uint16_t length); //--------------------------------------------------------------------+ // Internal Class Driver API //--------------------------------------------------------------------+ -void cush_init(void); -tusb_error_t cush_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length); -void cush_isr(pipe_handle_t pipe_hdl, xfer_result_t event); -void cush_close(uint8_t dev_addr); +void cush_init(void); +bool cush_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length); +void cush_isr(pipe_handle_t pipe_hdl, xfer_result_t event); +void cush_close(uint8_t dev_addr); #ifdef __cplusplus } diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 26865805e..34f3bb8f7 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -71,8 +71,8 @@ #include "tusb_compiler.h" #include "tusb_verify.h" #include "tusb_types.h" +#include "tusb_debug.h" -#include "tusb_error.h" // TODO remove #include "tusb_timeout.h" // TODO remove //--------------------------------------------------------------------+ @@ -268,138 +268,6 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16 (void* mem, ui + TU_BIN8(dlsb)) #endif -//--------------------------------------------------------------------+ -// Debug Function -//--------------------------------------------------------------------+ - -// CFG_TUSB_DEBUG for debugging -// 0 : no debug -// 1 : print error -// 2 : print warning -// 3 : print info -#if CFG_TUSB_DEBUG - -void tu_print_mem(void const *buf, uint32_t count, uint8_t indent); - -#ifdef CFG_TUSB_DEBUG_PRINTF - extern int CFG_TUSB_DEBUG_PRINTF(const char *format, ...); - #define tu_printf CFG_TUSB_DEBUG_PRINTF -#else - #define tu_printf printf -#endif - -static inline -void tu_print_var(uint8_t const* buf, uint32_t bufsize) -{ - for(uint32_t i=0; i= 2 - #define TU_LOG2 TU_LOG1 - #define TU_LOG2_MEM TU_LOG1_MEM - #define TU_LOG2_VAR TU_LOG1_VAR - #define TU_LOG2_INT TU_LOG1_INT - #define TU_LOG2_HEX TU_LOG1_HEX -#endif - -// Log Level 3: Info -#if CFG_TUSB_DEBUG >= 3 - #define TU_LOG3 TU_LOG1 - #define TU_LOG3_MEM TU_LOG1_MEM - #define TU_LOG3_VAR TU_LOG1_VAR - #define TU_LOG3_INT TU_LOG1_INT - #define TU_LOG3_HEX TU_LOG1_HEX -#endif - -typedef struct -{ - uint32_t key; - const char* data; -} tu_lookup_entry_t; - -typedef struct -{ - uint16_t count; - tu_lookup_entry_t const* items; -} tu_lookup_table_t; - -static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key) -{ - static char not_found[11]; - - for(uint16_t i=0; icount; i++) - { - if (p_table->items[i].key == key) return p_table->items[i].data; - } - - // not found return the key value in hex - snprintf(not_found, sizeof(not_found), "0x%08lX", (unsigned long) key); - - return not_found; -} - -#endif // CFG_TUSB_DEBUG - -#ifndef TU_LOG -#define TU_LOG(n, ...) -#define TU_LOG_MEM(n, ...) -#define TU_LOG_VAR(n, ...) -#define TU_LOG_INT(n, ...) -#define TU_LOG_HEX(n, ...) -#define TU_LOG_LOCATION() -#define TU_LOG_FAILED() -#endif - -// TODO replace all TU_LOGn with TU_LOG(n) - -#define TU_LOG0(...) -#define TU_LOG0_MEM(...) -#define TU_LOG0_VAR(...) -#define TU_LOG0_INT(...) -#define TU_LOG0_HEX(...) - - -#ifndef TU_LOG1 - #define TU_LOG1(...) - #define TU_LOG1_MEM(...) - #define TU_LOG1_VAR(...) - #define TU_LOG1_INT(...) - #define TU_LOG1_HEX(...) -#endif - -#ifndef TU_LOG2 - #define TU_LOG2(...) - #define TU_LOG2_MEM(...) - #define TU_LOG2_VAR(...) - #define TU_LOG2_INT(...) - #define TU_LOG2_HEX(...) -#endif - -#ifndef TU_LOG3 - #define TU_LOG3(...) - #define TU_LOG3_MEM(...) - #define TU_LOG3_VAR(...) - #define TU_LOG3_INT(...) - #define TU_LOG3_HEX(...) -#endif - #ifdef __cplusplus } #endif diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h new file mode 100644 index 000000000..647e8a8db --- /dev/null +++ b/src/common/tusb_debug.h @@ -0,0 +1,174 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _TUSB_DEBUG_H_ +#define _TUSB_DEBUG_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +//--------------------------------------------------------------------+ +// Debug +//--------------------------------------------------------------------+ + +// CFG_TUSB_DEBUG for debugging +// 0 : no debug +// 1 : print error +// 2 : print warning +// 3 : print info +#if CFG_TUSB_DEBUG + +// Enum to String for debugging purposes +#if CFG_TUSB_DEBUG >= 2 +extern char const* const tu_str_speed[]; +extern char const* const tu_str_std_request[]; +#endif + +void tu_print_mem(void const *buf, uint32_t count, uint8_t indent); + +#ifdef CFG_TUSB_DEBUG_PRINTF + extern int CFG_TUSB_DEBUG_PRINTF(const char *format, ...); + #define tu_printf CFG_TUSB_DEBUG_PRINTF +#else + #define tu_printf printf +#endif + +static inline void tu_print_var(uint8_t const* buf, uint32_t bufsize) +{ + for(uint32_t i=0; i= 2 + #define TU_LOG2 TU_LOG1 + #define TU_LOG2_MEM TU_LOG1_MEM + #define TU_LOG2_VAR TU_LOG1_VAR + #define TU_LOG2_INT TU_LOG1_INT + #define TU_LOG2_HEX TU_LOG1_HEX +#endif + +// Log Level 3: Info +#if CFG_TUSB_DEBUG >= 3 + #define TU_LOG3 TU_LOG1 + #define TU_LOG3_MEM TU_LOG1_MEM + #define TU_LOG3_VAR TU_LOG1_VAR + #define TU_LOG3_INT TU_LOG1_INT + #define TU_LOG3_HEX TU_LOG1_HEX +#endif + +typedef struct +{ + uint32_t key; + const char* data; +} tu_lookup_entry_t; + +typedef struct +{ + uint16_t count; + tu_lookup_entry_t const* items; +} tu_lookup_table_t; + +static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key) +{ + static char not_found[11]; + + for(uint16_t i=0; icount; i++) + { + if (p_table->items[i].key == key) return p_table->items[i].data; + } + + // not found return the key value in hex + snprintf(not_found, sizeof(not_found), "0x%08lX", (unsigned long) key); + + return not_found; +} + +#endif // CFG_TUSB_DEBUG + +#ifndef TU_LOG + #define TU_LOG(n, ...) + #define TU_LOG_MEM(n, ...) + #define TU_LOG_VAR(n, ...) + #define TU_LOG_INT(n, ...) + #define TU_LOG_HEX(n, ...) + #define TU_LOG_LOCATION() + #define TU_LOG_FAILED() +#endif + +// TODO replace all TU_LOGn with TU_LOG(n) + +#define TU_LOG0(...) +#define TU_LOG0_MEM(...) +#define TU_LOG0_VAR(...) +#define TU_LOG0_INT(...) +#define TU_LOG0_HEX(...) + +#ifndef TU_LOG1 + #define TU_LOG1(...) + #define TU_LOG1_MEM(...) + #define TU_LOG1_VAR(...) + #define TU_LOG1_INT(...) + #define TU_LOG1_HEX(...) +#endif + +#ifndef TU_LOG2 + #define TU_LOG2(...) + #define TU_LOG2_MEM(...) + #define TU_LOG2_VAR(...) + #define TU_LOG2_INT(...) + #define TU_LOG2_HEX(...) +#endif + +#ifndef TU_LOG3 + #define TU_LOG3(...) + #define TU_LOG3_MEM(...) + #define TU_LOG3_VAR(...) + #define TU_LOG3_INT(...) + #define TU_LOG3_HEX(...) +#endif + +#ifdef __cplusplus + } +#endif + +#endif /* _TUSB_DEBUG_H_ */ diff --git a/src/common/tusb_error.h b/src/common/tusb_error.h deleted file mode 100644 index 42541acd6..000000000 --- a/src/common/tusb_error.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -/** \ingroup Group_Common - * \defgroup Group_Error Error Codes - * @{ */ - -#ifndef _TUSB_ERRORS_H_ -#define _TUSB_ERRORS_H_ - -#include "tusb_option.h" - -#ifdef __cplusplus - extern "C" { -#endif - -#define ERROR_ENUM(x) x, -#define ERROR_STRING(x) #x, - -#define ERROR_TABLE(ENTRY) \ - ENTRY(TUSB_ERROR_NONE )\ - ENTRY(TUSB_ERROR_INVALID_PARA )\ - ENTRY(TUSB_ERROR_DEVICE_NOT_READY )\ - ENTRY(TUSB_ERROR_INTERFACE_IS_BUSY )\ - ENTRY(TUSB_ERROR_HCD_OPEN_PIPE_FAILED )\ - ENTRY(TUSB_ERROR_OSAL_TIMEOUT )\ - ENTRY(TUSB_ERROR_CDCH_DEVICE_NOT_MOUNTED )\ - ENTRY(TUSB_ERROR_MSCH_DEVICE_NOT_MOUNTED )\ - ENTRY(TUSB_ERROR_NOT_SUPPORTED )\ - ENTRY(TUSB_ERROR_NOT_ENOUGH_MEMORY )\ - ENTRY(TUSB_ERROR_FAILED )\ - -/// \brief Error Code returned -/// TODO obsolete and to be remove -typedef enum -{ - ERROR_TABLE(ERROR_ENUM) - TUSB_ERROR_COUNT -}tusb_error_t; - -#if CFG_TUSB_DEBUG -/// Enum to String for debugging purposes. Only available if \ref CFG_TUSB_DEBUG > 0 -extern char const* const tusb_strerr[TUSB_ERROR_COUNT]; -extern char const* const tusb_speed_str[]; - -#endif - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_ERRORS_H_ */ - -/** @} */ diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index 8fef11dc7..f4a08ce2f 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -74,10 +74,8 @@ #if CFG_TUSB_DEBUG #include - #define _MESS_ERR(_err) tu_printf("%s %d: failed, error = %s\r\n", __func__, __LINE__, tusb_strerr[_err]) #define _MESS_FAILED() tu_printf("%s %d: ASSERT FAILED\r\n", __func__, __LINE__) #else - #define _MESS_ERR(_err) do {} while (0) #define _MESS_FAILED() do {} while (0) #endif @@ -144,32 +142,6 @@ #define TU_ASSERT(...) GET_3RD_ARG(__VA_ARGS__, ASSERT_2ARGS, ASSERT_1ARGS,UNUSED)(__VA_ARGS__) #endif -// TODO remove TU_ASSERT_ERR() later - -/*------------- Generator for TU_VERIFY_ERR and TU_VERIFY_ERR_HDLR -------------*/ -#define TU_VERIFY_ERR_DEF2(_error, _handler) do \ -{ \ - uint32_t _err = (uint32_t)(_error); \ - if ( 0 != _err ) { _MESS_ERR(_err); _handler; return _err; } \ -} while(0) - -#define TU_VERIFY_ERR_DEF3(_error, _handler, _ret) do \ -{ \ - uint32_t _err = (uint32_t)(_error); \ - if ( 0 != _err ) { _MESS_ERR(_err); _handler; return _ret; } \ -} while(0) - -/*------------------------------------------------------------------*/ -/* ASSERT Error - * basically TU_VERIFY Error with TU_BREAKPOINT() as handler - *------------------------------------------------------------------*/ -#define ASSERT_ERR_1ARGS(_error) TU_VERIFY_ERR_DEF2(_error, TU_BREAKPOINT()) -#define ASSERT_ERR_2ARGS(_error, _ret) TU_VERIFY_ERR_DEF3(_error, TU_BREAKPOINT(), _ret) - -#ifndef TU_ASSERT_ERR -#define TU_ASSERT_ERR(...) GET_3RD_ARG(__VA_ARGS__, ASSERT_ERR_2ARGS, ASSERT_ERR_1ARGS,UNUSED)(__VA_ARGS__) -#endif - /*------------------------------------------------------------------*/ /* ASSERT HDLR *------------------------------------------------------------------*/ diff --git a/src/device/usbd.c b/src/device/usbd.c index b14b5e0fc..fc66f83c6 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -315,23 +315,6 @@ static char const* const _usbd_event_str[DCD_EVENT_COUNT] = "Func Call" }; -static char const* const _tusb_std_request_str[] = -{ - "Get Status" , - "Clear Feature" , - "Reserved" , - "Set Feature" , - "Reserved" , - "Set Address" , - "Get Descriptor" , - "Set Descriptor" , - "Get Configuration" , - "Set Configuration" , - "Get Interface" , - "Set Interface" , - "Synch Frame" -}; - // for usbd_control to print the name of control complete driver void usbd_driver_print_control_complete_name(usbd_control_xfer_cb_t callback) { @@ -508,7 +491,7 @@ void tud_task (void) switch ( event.event_id ) { case DCD_EVENT_BUS_RESET: - TU_LOG2(": %s Speed\r\n", tusb_speed_str[event.bus_reset.speed]); + TU_LOG2(": %s Speed\r\n", tu_str_speed[event.bus_reset.speed]); usbd_reset(event.rhport); _usbd_dev.speed = event.bus_reset.speed; break; @@ -650,7 +633,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const #if CFG_TUSB_DEBUG >= 2 if (TUSB_REQ_TYPE_STANDARD == p_request->bmRequestType_bit.type && p_request->bRequest <= TUSB_REQ_SYNCH_FRAME) { - TU_LOG2(" %s", _tusb_std_request_str[p_request->bRequest]); + TU_LOG2(" %s", tu_str_std_request[p_request->bRequest]); if (TUSB_REQ_GET_DESCRIPTOR != p_request->bRequest) TU_LOG2("\r\n"); } #endif diff --git a/src/host/usbh.c b/src/host/usbh.c index 59fcb4da3..5d167408a 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -259,6 +259,7 @@ static void process_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t h static bool usbh_edpt_control_open(uint8_t dev_addr, uint8_t max_packet_size); // from usbh_control.c +extern bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t const* request, void* buffer, tuh_control_complete_cb_t complete_cb); extern bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes); //--------------------------------------------------------------------+ @@ -297,6 +298,16 @@ void osal_task_delay(uint32_t msec) } #endif + +bool tuh_control_xfer (uint8_t dev_addr, tusb_control_request_t const* request, void* buffer, tuh_control_complete_cb_t complete_cb) +{ + TU_LOG2("[%u:%u] %s: ", usbh_get_rhport(dev_addr), dev_addr, request->bRequest <= TUSB_REQ_SYNCH_FRAME ? tu_str_std_request[request->bRequest] : "Unknown Request"); + TU_LOG2_VAR(request); + TU_LOG2("\r\n"); + + return usbh_control_xfer(dev_addr, request, buffer, complete_cb); +} + //--------------------------------------------------------------------+ // Descriptors //--------------------------------------------------------------------+ @@ -864,7 +875,7 @@ static bool enum_new_device(hcd_event_t* event) if ( !hcd_port_connect_status(_dev0.rhport) ) return true; _dev0.speed = hcd_port_speed_get(_dev0.rhport ); - TU_LOG2("%s Speed\r\n", tusb_speed_str[_dev0.speed]); + TU_LOG2("%s Speed\r\n", tu_str_speed[_dev0.speed]); enum_request_addr0_device_desc(); } diff --git a/src/host/usbh_control.c b/src/host/usbh_control.c index d034eec7f..5f4fcf52f 100644 --- a/src/host/usbh_control.c +++ b/src/host/usbh_control.c @@ -33,6 +33,7 @@ enum { + STAGE_IDLE, STAGE_SETUP, STAGE_DATA, STAGE_ACK @@ -56,7 +57,7 @@ static usbh_control_xfer_t _ctrl_xfer; // MACRO TYPEDEF CONSTANT ENUM DECLARATION //--------------------------------------------------------------------+ -bool tuh_control_xfer (uint8_t dev_addr, tusb_control_request_t const* request, void* buffer, tuh_control_complete_cb_t complete_cb) +bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t const* request, void* buffer, tuh_control_complete_cb_t complete_cb) { // TODO need to claim the endpoint first const uint8_t rhport = usbh_get_rhport(dev_addr); @@ -66,10 +67,6 @@ bool tuh_control_xfer (uint8_t dev_addr, tusb_control_request_t const* request, _ctrl_xfer.stage = STAGE_SETUP; _ctrl_xfer.complete_cb = complete_cb; - TU_LOG2("Control Setup (addr = %u): ", dev_addr); - TU_LOG2_VAR(request); - TU_LOG2("\r\n"); - // Send setup packet TU_ASSERT( hcd_setup_send(rhport, dev_addr, (uint8_t const*) &_ctrl_xfer.request) ); diff --git a/src/tusb.c b/src/tusb.c index a30221059..c6c04262c 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -161,9 +161,27 @@ uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, #if CFG_TUSB_DEBUG #include -char const* const tusb_strerr[TUSB_ERROR_COUNT] = { ERROR_TABLE(ERROR_STRING) }; +#if CFG_TUSB_DEBUG >= 2 -char const* const tusb_speed_str[] = { "Full", "Low", "High" }; +char const* const tu_str_speed[] = { "Full", "Low", "High" }; +char const* const tu_str_std_request[] = +{ + "Get Status" , + "Clear Feature" , + "Reserved" , + "Set Feature" , + "Reserved" , + "Set Address" , + "Get Descriptor" , + "Set Descriptor" , + "Get Configuration" , + "Set Configuration" , + "Get Interface" , + "Set Interface" , + "Synch Frame" +}; + +#endif static void dump_str_line(uint8_t const* buf, uint16_t count) { -- cgit v1.3.1 From a5fb20533cc1c9e0ed155083c1bbcb3e7be75e67 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 9 Mar 2022 17:17:27 +0700 Subject: adding tusb_private.h to implement common edpt claim --- src/common/tusb_common.h | 13 ---------- src/common/tusb_private.h | 61 +++++++++++++++++++++++++++++++++++++++++++++++ src/device/usbd.c | 4 ++++ src/host/usbh.c | 41 +++++++++++-------------------- src/tusb.c | 25 +++++++++++++++++++ src/tusb.h | 4 ---- 6 files changed, 104 insertions(+), 44 deletions(-) create mode 100644 src/common/tusb_private.h (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 34f3bb8f7..58591f0be 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -75,19 +75,6 @@ #include "tusb_timeout.h" // TODO remove -//--------------------------------------------------------------------+ -// Internal Helper used by Host and Device Stack -//--------------------------------------------------------------------+ - -// Check if endpoint descriptor is valid per USB specs -bool tu_edpt_validate(tusb_desc_endpoint_t const * desc_ep, tusb_speed_t speed); - -// Bind all endpoint of a interface descriptor to class driver -void tu_edpt_bind_driver(uint8_t ep2drv[][2], tusb_desc_interface_t const* p_desc, uint16_t desc_len, uint8_t driver_id); - -// Calculate total length of n interfaces (depending on IAD) -uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, uint8_t itf_count, uint16_t max_len); - //--------------------------------------------------------------------+ // Internal Inline Functions //--------------------------------------------------------------------+ diff --git a/src/common/tusb_private.h b/src/common/tusb_private.h new file mode 100644 index 000000000..5315c352f --- /dev/null +++ b/src/common/tusb_private.h @@ -0,0 +1,61 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + + +#ifndef _TUSB_PRIVATE_H_ +#define _TUSB_PRIVATE_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +typedef struct TU_ATTR_PACKED +{ + volatile uint8_t busy : 1; + volatile uint8_t stalled : 1; + volatile uint8_t claimed : 1; +}tu_edpt_state_t; + +//--------------------------------------------------------------------+ +// Internal Helper used by Host and Device Stack +//--------------------------------------------------------------------+ + +// Check if endpoint descriptor is valid per USB specs +bool tu_edpt_validate(tusb_desc_endpoint_t const * desc_ep, tusb_speed_t speed); + +// Bind all endpoint of a interface descriptor to class driver +void tu_edpt_bind_driver(uint8_t ep2drv[][2], tusb_desc_interface_t const* p_desc, uint16_t desc_len, uint8_t driver_id); + +// Calculate total length of n interfaces (depending on IAD) +uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, uint8_t itf_count, uint16_t max_len); + +bool tu_edpt_claim(tu_edpt_state_t* ep_state, osal_mutex_t mutex); + +#ifdef __cplusplus + } +#endif + +#endif /* _TUSB_PRIVATE_H_ */ diff --git a/src/device/usbd.c b/src/device/usbd.c index fc66f83c6..4b37e8bd9 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -29,6 +29,8 @@ #if CFG_TUD_ENABLED #include "tusb.h" +#include "common/tusb_private.h" + #include "device/usbd.h" #include "device/usbd_pvt.h" #include "device/dcd.h" @@ -70,6 +72,8 @@ typedef struct uint8_t itf2drv[16]; // map interface number to driver (0xff is invalid) uint8_t ep2drv[CFG_TUD_ENDPPOINT_MAX][2]; // map endpoint to driver ( 0xff is invalid ) + // TODO 4-bit should be sufficient for ep2drv if we want to save half its bytes + struct TU_ATTR_PACKED { volatile bool busy : 1; diff --git a/src/host/usbh.c b/src/host/usbh.c index 5d167408a..319031f5b 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -29,6 +29,8 @@ #if CFG_TUH_ENABLED #include "tusb.h" +#include "common/tusb_private.h" + #include "host/usbh.h" #include "host/usbh_classdriver.h" #include "hub.h" @@ -104,14 +106,7 @@ typedef struct { uint8_t itf2drv[CFG_TUH_INTERFACE_MAX]; // map interface number to driver (0xff is invalid) uint8_t ep2drv[CFG_TUH_ENDPOINT_MAX][2]; // map endpoint to driver ( 0xff is invalid ) - struct TU_ATTR_PACKED - { - volatile bool busy : 1; - volatile bool stalled : 1; - volatile bool claimed : 1; - - // TODO merge ep2drv here, 4-bit should be sufficient - }ep_status[CFG_TUH_ENDPOINT_MAX][2]; + tu_edpt_state_t ep_status[CFG_TUH_ENDPOINT_MAX][2]; } usbh_device_t; @@ -1189,25 +1184,19 @@ static bool parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configura // TODO has some duplication code with device, refactor later bool usbh_edpt_claim(uint8_t dev_addr, uint8_t ep_addr) { - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - usbh_device_t* dev = get_device(dev_addr); - - // pre-check to help reducing mutex lock - TU_VERIFY((dev->ep_status[epnum][dir].busy == 0) && (dev->ep_status[epnum][dir].claimed == 0)); - lock_device(dev_addr); - - // can only claim the endpoint if it is not busy and not claimed yet. - bool const ret = (dev->ep_status[epnum][dir].busy == 0) && (dev->ep_status[epnum][dir].claimed == 0); - if (ret) - { - dev->ep_status[epnum][dir].claimed = 1; - } + // addr0 is always available + if (dev_addr == 0) return true; - unlock_device(dev_addr); + usbh_device_t* dev = get_device(dev_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); + tu_edpt_state_t* ep_state = &dev->ep_status[epnum][dir]; - return ret; +#if TUSB_OPT_MUTEX + return tu_edpt_claim(ep_state, &_usbh_mutex[dev_addr-1]); +#else + return tu_edpt_claim(ep_state, NULL); +#endif } // TODO has some duplication code with device, refactor later @@ -1299,6 +1288,4 @@ bool usbh_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) return dev->ep_status[epnum][dir].busy; } - - #endif diff --git a/src/tusb.c b/src/tusb.c index c6c04262c..6ed2a3c05 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -29,6 +29,7 @@ #if CFG_TUH_ENABLED || CFG_TUD_ENABLED #include "tusb.h" +#include "common/tusb_private.h" // TODO clean up #if CFG_TUD_ENABLED @@ -67,6 +68,30 @@ bool tusb_inited(void) // Internal Helper for both Host and Device stack //--------------------------------------------------------------------+ +bool tu_edpt_claim(tu_edpt_state_t* ep_state, osal_mutex_t mutex) +{ + (void) mutex; + +#if TUSB_OPT_MUTEX + // pre-check to help reducing mutex lock + TU_VERIFY((ep_state->busy == 0) && (ep_state->claimed == 0)); + osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER); +#endif + + // can only claim the endpoint if it is not busy and not claimed yet. + bool const available = (ep_state->busy == 0) && (ep_state->claimed == 0); + if (available) + { + ep_state->claimed = 1; + } + +#if TUSB_OPT_MUTEX + osal_mutex_unlock(mutex); +#endif + + return available; +} + bool tu_edpt_validate(tusb_desc_endpoint_t const * desc_ep, tusb_speed_t speed) { uint16_t const max_packet_size = tu_edpt_packet_size(desc_ep); diff --git a/src/tusb.h b/src/tusb.h index 549f00b43..222855fcb 100644 --- a/src/tusb.h +++ b/src/tusb.h @@ -117,8 +117,6 @@ //--------------------------------------------------------------------+ // APPLICATION API //--------------------------------------------------------------------+ -/** \ingroup group_application_api - * @{ */ // Initialize device/host stack // Note: when using with RTOS, this should be called after scheduler/kernel is started. @@ -131,8 +129,6 @@ bool tusb_inited(void); // TODO // bool tusb_teardown(void); -/** @} */ - #ifdef __cplusplus } #endif -- cgit v1.3.1 From 110879074f3785c07bf3f125e26a2bbaa51897e4 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 9 Mar 2022 17:26:55 +0700 Subject: implement tu_edpt_release() --- src/common/tusb_private.h | 4 ++++ src/host/usbh.c | 26 +++++++++++--------------- src/tusb.c | 22 ++++++++++++++++++++++ 3 files changed, 37 insertions(+), 15 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_private.h b/src/common/tusb_private.h index 5315c352f..b34506f65 100644 --- a/src/common/tusb_private.h +++ b/src/common/tusb_private.h @@ -52,8 +52,12 @@ void tu_edpt_bind_driver(uint8_t ep2drv[][2], tusb_desc_interface_t const* p_des // Calculate total length of n interfaces (depending on IAD) uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, uint8_t itf_count, uint16_t max_len); +// Claim an endpoint with provided mutex bool tu_edpt_claim(tu_edpt_state_t* ep_state, osal_mutex_t mutex); +// Release an endpoint with provided mutex +bool tu_edpt_release(tu_edpt_state_t* ep_state, osal_mutex_t mutex); + #ifdef __cplusplus } #endif diff --git a/src/host/usbh.c b/src/host/usbh.c index 319031f5b..8206c06a4 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -1202,23 +1202,19 @@ bool usbh_edpt_claim(uint8_t dev_addr, uint8_t ep_addr) // TODO has some duplication code with device, refactor later bool usbh_edpt_release(uint8_t dev_addr, uint8_t ep_addr) { - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - usbh_device_t* dev = get_device(dev_addr); - - lock_device(dev_addr); - - // can only release the endpoint if it is claimed and not busy - bool const ret = (dev->ep_status[epnum][dir].busy == 0) && (dev->ep_status[epnum][dir].claimed == 1); - if (ret) - { - dev->ep_status[epnum][dir].claimed = 0; - } + // addr0 is always available + if (dev_addr == 0) return true; - unlock_device(dev_addr); + usbh_device_t* dev = get_device(dev_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); + tu_edpt_state_t* ep_state = &dev->ep_status[epnum][dir]; - return ret; +#if TUSB_OPT_MUTEX + return tu_edpt_release(ep_state, &_usbh_mutex[dev_addr-1]); +#else + return tu_edpt_release(ep_state, NULL); +#endif } // TODO has some duplication code with device, refactor later diff --git a/src/tusb.c b/src/tusb.c index 6ed2a3c05..c86bdd891 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -92,6 +92,28 @@ bool tu_edpt_claim(tu_edpt_state_t* ep_state, osal_mutex_t mutex) return available; } +bool tu_edpt_release(tu_edpt_state_t* ep_state, osal_mutex_t mutex) +{ + (void) mutex; + +#if TUSB_OPT_MUTEX + osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER); +#endif + + // can only release the endpoint if it is claimed and not busy + bool const ret = (ep_state->claimed == 1) && (ep_state->busy == 0); + if (ret) + { + ep_state->claimed = 0; + } + +#if TUSB_OPT_MUTEX + osal_mutex_unlock(mutex); +#endif + + return ret; +} + bool tu_edpt_validate(tusb_desc_endpoint_t const * desc_ep, tusb_speed_t speed) { uint16_t const max_packet_size = tu_edpt_packet_size(desc_ep); -- cgit v1.3.1 From b05401a5ab788a9b1a56bdb79b74e49b6909339f Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 10 Mar 2022 11:59:51 +0700 Subject: merge control stage host and device value --- src/common/tusb_types.h | 1 + src/host/usbh_control.c | 22 +++++++--------------- 2 files changed, 8 insertions(+), 15 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 5b26f5aec..f998eabfb 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -265,6 +265,7 @@ typedef enum enum { + CONTROL_STAGE_IDLE, CONTROL_STAGE_SETUP, CONTROL_STAGE_DATA, CONTROL_STAGE_ACK diff --git a/src/host/usbh_control.c b/src/host/usbh_control.c index f311cc257..741b0723a 100644 --- a/src/host/usbh_control.c +++ b/src/host/usbh_control.c @@ -31,14 +31,6 @@ #include "tusb.h" #include "usbh_classdriver.h" -enum -{ - STAGE_IDLE, - STAGE_SETUP, - STAGE_DATA, - STAGE_ACK -}; - typedef struct { tusb_control_request_t request TU_ATTR_ALIGNED(4); @@ -61,7 +53,7 @@ bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t const* request, _ctrl_xfer.request = (*request); _ctrl_xfer.buffer = buffer; - _ctrl_xfer.stage = STAGE_SETUP; + _ctrl_xfer.stage = CONTROL_STAGE_SETUP; _ctrl_xfer.complete_cb = complete_cb; // Send setup packet @@ -73,7 +65,7 @@ bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t const* request, static void _xfer_complete(uint8_t dev_addr, xfer_result_t result) { TU_LOG2("\r\n"); - _ctrl_xfer.stage = STAGE_IDLE; + _ctrl_xfer.stage = CONTROL_STAGE_IDLE; if (_ctrl_xfer.complete_cb) _ctrl_xfer.complete_cb(dev_addr, &_ctrl_xfer.request, result); } @@ -96,8 +88,8 @@ bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t resu { switch(_ctrl_xfer.stage) { - case STAGE_SETUP: - _ctrl_xfer.stage = STAGE_DATA; + case CONTROL_STAGE_SETUP: + _ctrl_xfer.stage = CONTROL_STAGE_DATA; if (request->wLength) { // DATA stage: initial data toggle is always 1 @@ -106,8 +98,8 @@ bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t resu } __attribute__((fallthrough)); - case STAGE_DATA: - _ctrl_xfer.stage = STAGE_ACK; + case CONTROL_STAGE_DATA: + _ctrl_xfer.stage = CONTROL_STAGE_ACK; if (request->wLength) { @@ -119,7 +111,7 @@ bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t resu hcd_edpt_xfer(rhport, dev_addr, tu_edpt_addr(0, 1-request->bmRequestType_bit.direction), NULL, 0); break; - case STAGE_ACK: + case CONTROL_STAGE_ACK: _xfer_complete(dev_addr, result); break; -- cgit v1.3.1 From b9ca301527040458bd369cf967732a76d5139222 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 10 Mar 2022 13:19:15 +0700 Subject: remove obsolete device state --- src/common/tusb_types.h | 8 -------- src/host/hcd.h | 3 ++- src/host/usbh.c | 36 ++++++++++++++++-------------------- 3 files changed, 18 insertions(+), 29 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index f998eabfb..da164145b 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -223,14 +223,6 @@ enum { #define TUSB_DESC_CONFIG_POWER_MA(x) ((x)/2) -/// Device State TODO remove -typedef enum -{ - TUSB_DEVICE_STATE_UNPLUG = 0 , - TUSB_DEVICE_STATE_CONFIGURED , - TUSB_DEVICE_STATE_SUSPENDED , -}tusb_device_state_t; - typedef enum { XFER_RESULT_SUCCESS, diff --git a/src/host/hcd.h b/src/host/hcd.h index 9819f5f2a..c40bea64c 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -94,7 +94,8 @@ typedef struct } hcd_event_t; -typedef struct { +typedef struct +{ uint8_t rhport; uint8_t hub_addr; uint8_t hub_port; diff --git a/src/host/usbh.c b/src/host/usbh.c index 9a2bc86a8..07baeee96 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -82,6 +82,7 @@ typedef struct { uint8_t hub_port; uint8_t speed; + // Device State struct TU_ATTR_PACKED { volatile uint8_t connected : 1; @@ -92,7 +93,7 @@ typedef struct { uint8_t control_stage; // state of control transfer - //------------- device descriptor -------------// + // Device Descriptor uint16_t vid; uint16_t pid; @@ -101,12 +102,10 @@ typedef struct { uint8_t i_product; uint8_t i_serial; - //------------- configuration descriptor -------------// + // Configuration Descriptor // uint8_t interface_count; // bNumInterfaces alias - //------------- device -------------// - volatile uint8_t state; // device state, value from enum tusbh_device_state_t - + // Endpoint & Interface uint8_t itf2drv[CFG_TUH_INTERFACE_MAX]; // map interface number to driver (0xff is invalid) uint8_t ep2drv[CFG_TUH_ENDPOINT_MAX][2]; // map endpoint to driver ( 0xff is invalid ), can use only 4-bit each @@ -685,9 +684,8 @@ void hcd_event_device_remove(uint8_t hostid, bool in_isr) } -// a device unplugged on hostid, hub_addr, hub_port -// return true if found and unmounted device, false if cannot find -void process_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t hub_port) +// a device unplugged from rhport:hub_addr:hub_port +static void process_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t hub_port) { //------------- find the all devices (star-network) under port that is unplugged -------------// // TODO mark as disconnected in ISR, also handle dev0 @@ -700,7 +698,7 @@ void process_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t hub_port if (dev->rhport == rhport && (hub_addr == 0 || dev->hub_addr == hub_addr) && // hub_addr == 0 & hub_port == 0 means roothub (hub_port == 0 || dev->hub_port == hub_port) && - dev->state != TUSB_DEVICE_STATE_UNPLUG) + dev->connected) { // Invoke callback before close driver if (tuh_umount_cb) tuh_umount_cb(dev_addr); @@ -729,7 +727,7 @@ static uint8_t get_new_address(bool is_hub) for (uint8_t i=0; i < count; i++) { uint8_t const addr = start + i; - if (get_device(addr)->state == TUSB_DEVICE_STATE_UNPLUG) return addr; + if (!get_device(addr)->connected) return addr; } return ADDR_INVALID; } @@ -951,17 +949,17 @@ static bool enum_hub_get_status0_complete(uint8_t dev_addr, tusb_control_request return true; } -#endif +#endif // hub static bool enum_new_device(hcd_event_t* event) { - _dev0.rhport = event->rhport; // TODO refractor integrate to device_pool + _dev0.rhport = event->rhport; _dev0.hub_addr = event->connection.hub_addr; _dev0.hub_port = event->connection.hub_port; - //------------- connected/disconnected directly with roothub -------------// if (_dev0.hub_addr == 0) { + // connected/disconnected directly with roothub // wait until device is stable TODO non blocking osal_task_delay(RESET_DELAY); @@ -974,14 +972,14 @@ static bool enum_new_device(hcd_event_t* event) enum_request_addr0_device_desc(); } #if CFG_TUH_HUB - //------------- connected/disconnected via hub -------------// else { + // connected/disconnected via external hub // wait until device is stable osal_task_delay(RESET_DELAY); TU_ASSERT( hub_port_get_status(_dev0.hub_addr, _dev0.hub_port, _usbh_ctrl_buf, enum_hub_get_status0_complete) ); } -#endif // CFG_TUH_HUB +#endif // hub return true; } @@ -994,7 +992,6 @@ static bool enum_request_addr0_device_desc(void) // Get first 8 bytes of device descriptor for Control Endpoint size TU_LOG2("Get 8 byte of Device Descriptor\r\n"); - TU_ASSERT(tuh_descriptor_get_device(addr0, _usbh_ctrl_buf, 8, enum_get_addr0_device_desc_complete)); return true; } @@ -1024,7 +1021,7 @@ static bool enum_get_addr0_device_desc_complete(uint8_t dev_addr, tusb_control_r if (_dev0.hub_addr == 0) { // connected directly to roothub - hcd_port_reset( _dev0.rhport ); // reset port after 8 byte descriptor + hcd_port_reset( _dev0.rhport ); osal_task_delay(RESET_DELAY); enum_request_set_addr(); @@ -1040,14 +1037,13 @@ static bool enum_get_addr0_device_desc_complete(uint8_t dev_addr, tusb_control_r TU_ASSERT( hub_port_get_status(_dev0.hub_addr, _dev0.hub_port, _usbh_ctrl_buf, enum_hub_get_status1_complete) ); } -#endif +#endif // hub return true; } static bool enum_request_set_addr(void) { - uint8_t const addr0 = 0; tusb_desc_device_t const * desc_device = (tusb_desc_device_t const*) _usbh_ctrl_buf; // Get new address @@ -1079,6 +1075,7 @@ static bool enum_request_set_addr(void) .wLength = 0 }; + uint8_t const addr0 = 0; TU_ASSERT( tuh_control_xfer(addr0, &new_request, NULL, enum_set_address_complete) ); return true; @@ -1172,7 +1169,6 @@ static bool enum_set_config_complete(uint8_t dev_addr, tusb_control_request_t co TU_LOG2("Device configured\r\n"); usbh_device_t* dev = get_device(dev_addr); dev->configured = 1; - dev->state = TUSB_DEVICE_STATE_CONFIGURED; // Start the Set Configuration process for interfaces (itf = DRVID_INVALID) // Since driver can perform control transfer within its set_config, this is done asynchronously. -- cgit v1.3.1 From 2929afe2fa2fc8425dcd1390cb3119bb1bd3b42b Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 13 Mar 2022 17:45:46 +0700 Subject: add synchronous (blocking) support for usbh control transfer - add synchronous version of all get descriptor API - update bare example to use sync API for string descriptor - change order of index, language_id in tuh_descriptor_get_string() to match similar API of libusb - add index to tuh_descriptor_get_hid_report() --- examples/host/bare_api/src/main.c | 43 +++------- src/class/hid/hid_host.c | 2 +- src/common/tusb_types.h | 2 + src/host/usbh.c | 172 +++++++++++++++++++++++++++++--------- src/host/usbh.h | 98 ++++++++++++++++------ src/tusb_option.h | 2 +- 6 files changed, 224 insertions(+), 95 deletions(-) (limited to 'src/common') diff --git a/examples/host/bare_api/src/main.c b/examples/host/bare_api/src/main.c index 6888d13a2..9e6209991 100644 --- a/examples/host/bare_api/src/main.c +++ b/examples/host/bare_api/src/main.c @@ -66,17 +66,9 @@ int main(void) #define LANGUAGE_ID 0x0409 //uint8_t usb_buf[256] TU_ATTR_ALIGNED(4); +TU_ATTR_ALIGNED(4) tusb_desc_device_t desc_device; -static volatile xfer_result_t _get_string_result; - -static bool _transfer_done_cb(uint8_t daddr, tuh_control_xfer_t const *xfer, xfer_result_t result) { - (void)daddr; - (void)xfer; - _get_string_result = result; - return true; -} - static void _convert_utf16le_to_utf8(const uint16_t *utf16, size_t utf16_len, uint8_t *utf8, size_t utf8_len) { // TODO: Check for runover. (void)utf8_len; @@ -116,14 +108,7 @@ static int _count_utf8_bytes(const uint16_t *buf, size_t len) { return total_bytes; } -static void _wait_and_convert(uint16_t *temp_buf, size_t buf_len) { - while (_get_string_result == 0xff) { - tuh_task(); - } - if (_get_string_result != XFER_RESULT_SUCCESS) { - temp_buf[0] = 0; - return; - } +static void utf16_to_utf8(uint16_t *temp_buf, size_t buf_len) { size_t utf16_len = ((temp_buf[0] & 0xff) - 2) / sizeof(uint16_t); size_t utf8_len = _count_utf8_bytes(temp_buf + 1, utf16_len); _convert_utf16le_to_utf8(temp_buf + 1, utf16_len, (uint8_t *) temp_buf, sizeof(uint16_t) * buf_len); @@ -153,31 +138,29 @@ bool print_device_descriptor(uint8_t daddr, tuh_control_xfer_t const * xfer, xfe printf(" idProduct 0x%04x\r\n" , desc_device.idProduct); printf(" bcdDevice %04x\r\n" , desc_device.bcdDevice); - _get_string_result = 0xff; + uint32_t timeout_ms = 10; uint16_t temp_buf[128]; printf(" iManufacturer %u " , desc_device.iManufacturer); - temp_buf[0] = 0; - if (tuh_descriptor_get_manufacturer_string(daddr, LANGUAGE_ID, temp_buf, TU_ARRAY_SIZE(temp_buf), _transfer_done_cb, 0)) { - _wait_and_convert(temp_buf, TU_ARRAY_SIZE(temp_buf)); + if (XFER_RESULT_SUCCESS == tuh_descriptor_get_manufacturer_string_sync(daddr, LANGUAGE_ID, temp_buf, TU_ARRAY_SIZE(temp_buf), timeout_ms) ) + { + utf16_to_utf8(temp_buf, TU_ARRAY_SIZE(temp_buf)); printf((const char*) temp_buf); } printf("\r\n"); printf(" iProduct %u " , desc_device.iProduct); - _get_string_result = 0xff; - temp_buf[0] = 0; - if (tuh_descriptor_get_product_string(daddr, LANGUAGE_ID, temp_buf, TU_ARRAY_SIZE(temp_buf), _transfer_done_cb, 0)) { - _wait_and_convert(temp_buf, TU_ARRAY_SIZE(temp_buf)); + if (XFER_RESULT_SUCCESS == tuh_descriptor_get_product_string_sync(daddr, LANGUAGE_ID, temp_buf, TU_ARRAY_SIZE(temp_buf), timeout_ms)) + { + utf16_to_utf8(temp_buf, TU_ARRAY_SIZE(temp_buf)); printf((const char*) temp_buf); } printf("\r\n"); printf(" iSerialNumber %u " , desc_device.iSerialNumber); - _get_string_result = 0xff; - temp_buf[0] = 0; - if (tuh_descriptor_get_serial_string(daddr, LANGUAGE_ID, temp_buf, TU_ARRAY_SIZE(temp_buf), _transfer_done_cb, 0)) { - _wait_and_convert(temp_buf, TU_ARRAY_SIZE(temp_buf)); + if (XFER_RESULT_SUCCESS == tuh_descriptor_get_serial_string_sync(daddr, LANGUAGE_ID, temp_buf, TU_ARRAY_SIZE(temp_buf), timeout_ms)) + { + utf16_to_utf8(temp_buf, TU_ARRAY_SIZE(temp_buf)); printf((const char*) temp_buf); } printf("\r\n"); @@ -192,7 +175,7 @@ void tuh_mount_cb (uint8_t daddr) { printf("Device attached, address = %d\r\n", daddr); - // Get Device Descriptor + // Get Device Descriptor using asynchronous API tuh_descriptor_get_device(daddr, &desc_device, 18, print_device_descriptor, 0); } diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index 4de3551c2..a825858ab 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -437,7 +437,7 @@ static bool config_get_report_desc(uint8_t dev_addr, tuh_control_xfer_t const * config_driver_mount_complete(dev_addr, instance, NULL, 0); }else { - TU_ASSERT(tuh_descriptor_get_hid_report(dev_addr, itf_num, hid_itf->report_desc_type, usbh_get_enum_buf(), hid_itf->report_desc_len, config_get_report_desc_complete, 0)); + TU_ASSERT(tuh_descriptor_get_hid_report(dev_addr, itf_num, hid_itf->report_desc_type, 0, usbh_get_enum_buf(), hid_itf->report_desc_len, config_get_report_desc_complete, 0)); } return true; diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index da164145b..e2fa17532 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -228,6 +228,8 @@ typedef enum XFER_RESULT_SUCCESS, XFER_RESULT_FAILED, XFER_RESULT_STALLED, + XFER_RESULT_TIMEOUT, + XFER_RESULT_INVALID }xfer_result_t; enum // TODO remove diff --git a/src/host/usbh.c b/src/host/usbh.c index 7485bb065..c7dfaddf6 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -243,7 +243,7 @@ struct { tuh_control_xfer_t xfer; uint8_t daddr; // device address that is transferring - uint8_t stage; + volatile uint8_t stage; }_ctrl_xfer; //------------- Helper Function -------------// @@ -300,8 +300,8 @@ void osal_task_delay(uint32_t msec) // Descriptors //--------------------------------------------------------------------+ -bool tuh_descriptor_get(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len, - tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg) +static bool _get_descriptor(uint8_t daddr, uint8_t type, uint8_t index, uint16_t language_id, void* buffer, uint16_t len, + tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg) { tuh_control_xfer_t const xfer = { @@ -315,7 +315,7 @@ bool tuh_descriptor_get(uint8_t daddr, uint8_t type, uint8_t index, void* buffer }, .bRequest = TUSB_REQ_GET_DESCRIPTOR, .wValue = tu_htole16( TU_U16(type, index) ), - .wIndex = 0, + .wIndex = tu_htole16(language_id), .wLength = tu_htole16(len) }, @@ -327,6 +327,12 @@ bool tuh_descriptor_get(uint8_t daddr, uint8_t type, uint8_t index, void* buffer return tuh_control_xfer(daddr, &xfer); } +bool tuh_descriptor_get(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len, + tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg) +{ + return _get_descriptor(daddr, type, index, 0x0000, buffer, len, complete_cb, user_arg); +} + bool tuh_descriptor_get_device(uint8_t daddr, void* buffer, uint16_t len, tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg) { @@ -340,31 +346,12 @@ bool tuh_descriptor_get_configuration(uint8_t daddr, uint8_t index, void* buffer return tuh_descriptor_get(daddr, TUSB_DESC_CONFIGURATION, index, buffer, len, complete_cb, user_arg); } -bool tuh_descriptor_get_string(uint8_t daddr, uint16_t language_id, uint8_t index, void* buffer, uint16_t len, +//------------- String Descriptor -------------// + +bool tuh_descriptor_get_string(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len, tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg) { - tuh_control_xfer_t const xfer = - { - .request = - { - .bmRequestType_bit = - { - .recipient = TUSB_REQ_RCPT_DEVICE, - .type = TUSB_REQ_TYPE_STANDARD, - .direction = TUSB_DIR_IN - }, - .bRequest = TUSB_REQ_GET_DESCRIPTOR, - .wValue = tu_htole16( TU_U16(TUSB_DESC_STRING, index) ), - .wIndex = tu_htole16(language_id), - .wLength = tu_htole16(len) - }, - - .buffer = buffer, - .complete_cb = complete_cb, - .user_arg = user_arg - }; - - return tuh_control_xfer(daddr, &xfer); + return _get_descriptor(daddr, TUSB_DESC_STRING, index, language_id, buffer, len, complete_cb, user_arg); } // Get manufacturer string descriptor @@ -376,7 +363,7 @@ bool tuh_descriptor_get_manufacturer_string(uint8_t daddr, uint16_t language_id, if (dev->i_manufacturer == 0) { return false; } - return tuh_descriptor_get_string(daddr, language_id, dev->i_manufacturer, buffer, len, complete_cb, user_arg); + return tuh_descriptor_get_string(daddr, dev->i_manufacturer, language_id, buffer, len, complete_cb, user_arg); } // Get product string descriptor @@ -388,7 +375,7 @@ bool tuh_descriptor_get_product_string(uint8_t daddr, uint16_t language_id, void if (dev->i_product == 0) { return false; } - return tuh_descriptor_get_string(daddr, language_id, dev->i_product, buffer, len, complete_cb, user_arg); + return tuh_descriptor_get_string(daddr, dev->i_product, language_id, buffer, len, complete_cb, user_arg); } // Get serial string descriptor @@ -400,11 +387,11 @@ bool tuh_descriptor_get_serial_string(uint8_t daddr, uint16_t language_id, void* if (dev->i_serial == 0) { return false; } - return tuh_descriptor_get_string(daddr, language_id, dev->i_serial, buffer, len, complete_cb, user_arg); + return tuh_descriptor_get_string(daddr, dev->i_serial, language_id, buffer, len, complete_cb, user_arg); } // Get HID report descriptor -bool tuh_descriptor_get_hid_report(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, void* buffer, uint16_t len, +bool tuh_descriptor_get_hid_report(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len, tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg) { TU_LOG2("HID Get Report Descriptor\r\n"); @@ -419,8 +406,8 @@ bool tuh_descriptor_get_hid_report(uint8_t daddr, uint8_t itf_num, uint8_t desc_ .direction = TUSB_DIR_IN }, .bRequest = TUSB_REQ_GET_DESCRIPTOR, - .wValue = tu_htole16(TU_U16(desc_type, 0)), - .wIndex = itf_num, + .wValue = tu_htole16(TU_U16(desc_type, index)), + .wIndex = tu_htole16((uint16_t) itf_num), .wLength = len }, @@ -461,6 +448,58 @@ bool tuh_configuration_set(uint8_t daddr, uint8_t config_num, return tuh_control_xfer(daddr, &xfer); } +//--------------------------------------------------------------------+ +// Asynchronous +//--------------------------------------------------------------------+ + +#define _CONTROL_SYNC_API(_async_func, _timeout, ...) \ + (void) _timeout; \ + xfer_result_t result = XFER_RESULT_INVALID;\ + /* TODO use timeout to wait */ \ + TU_VERIFY(_async_func(__VA_ARGS__, NULL, (uintptr_t) &result), XFER_RESULT_TIMEOUT); \ + return (uint8_t) result + +uint8_t tuh_descriptor_get_sync(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len, uint8_t timeout_ms) +{ + _CONTROL_SYNC_API(tuh_descriptor_get, timeout_ms, daddr, type, index, buffer, len); +} + +uint8_t tuh_descriptor_get_device_sync(uint8_t daddr, void* buffer, uint16_t len, uint8_t timeout_ms) +{ + len = tu_min16(len, sizeof(tusb_desc_device_t)); + return tuh_descriptor_get_sync(daddr, TUSB_DESC_DEVICE, 0, buffer, len, timeout_ms); +} + +uint8_t tuh_descriptor_get_configuration_sync(uint8_t daddr, uint8_t index, void* buffer, uint16_t len, uint8_t timeout_ms) +{ + return tuh_descriptor_get_sync(daddr, TUSB_DESC_CONFIGURATION, index, buffer, len, timeout_ms); +} + +uint8_t tuh_descriptor_get_hid_report_sync(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len, uint8_t timeout_ms) +{ + _CONTROL_SYNC_API(tuh_descriptor_get_hid_report, timeout_ms, daddr, itf_num, desc_type, index, buffer, len); +} + +uint8_t tuh_descriptor_get_string_sync(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len, uint8_t timeout_ms) +{ + _CONTROL_SYNC_API(tuh_descriptor_get_string, timeout_ms, daddr, index, language_id, buffer, len); +} + +uint8_t tuh_descriptor_get_manufacturer_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len, uint8_t timeout_ms) +{ + _CONTROL_SYNC_API(tuh_descriptor_get_manufacturer_string, timeout_ms, daddr, language_id, buffer, len); +} + +uint8_t tuh_descriptor_get_product_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len, uint8_t timeout_ms) +{ + _CONTROL_SYNC_API(tuh_descriptor_get_product_string, timeout_ms, daddr, language_id, buffer, len); +} + +uint8_t tuh_descriptor_get_serial_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len, uint8_t timeout_ms) +{ + _CONTROL_SYNC_API(tuh_descriptor_get_serial_string, timeout_ms, daddr, language_id, buffer, len); +} + //--------------------------------------------------------------------+ // CLASS-USBD API (don't require to verify parameters) //--------------------------------------------------------------------+ @@ -833,11 +872,22 @@ bool usbh_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) // Control transfer //--------------------------------------------------------------------+ +static bool _control_blocking_complete_cb(uint8_t daddr, tuh_control_xfer_t const * xfer, xfer_result_t result) +{ + (void) daddr; + + // update result + *((xfer_result_t*) xfer->user_arg) = result; + + return true; +} + bool tuh_control_xfer (uint8_t daddr, tuh_control_xfer_t const* xfer) { // pre-check to help reducing mutex lock TU_VERIFY(_ctrl_xfer.stage == CONTROL_STAGE_IDLE); + // TODO probably better to use semaphore as resource management than mutex usbh_lock(); bool const is_idle = (_ctrl_xfer.stage == CONTROL_STAGE_IDLE); @@ -855,7 +905,52 @@ bool tuh_control_xfer (uint8_t daddr, tuh_control_xfer_t const* xfer) _ctrl_xfer.daddr = daddr; _ctrl_xfer.xfer = (*xfer); - return hcd_setup_send(rhport, daddr, (uint8_t*) &_ctrl_xfer.xfer.request); + + if (xfer->complete_cb) + { + TU_ASSERT( hcd_setup_send(rhport, daddr, (uint8_t*) &_ctrl_xfer.xfer.request) ); + }else + { + // user_arg must point to xfer_result_t to hold result + TU_VERIFY(xfer->user_arg); + + // blocking if complete callback is not provided + // change callback to internal blocking, and result as user argument + volatile xfer_result_t* result = (volatile xfer_result_t*) xfer->user_arg; + + _ctrl_xfer.xfer.complete_cb = _control_blocking_complete_cb; + *result = XFER_RESULT_INVALID; + + TU_ASSERT( hcd_setup_send(rhport, daddr, (uint8_t*) &_ctrl_xfer.xfer.request) ); + + while ((*result) == XFER_RESULT_INVALID) + { + // only need to call task if not preempted RTOS + #if CFG_TUSB_OS == OPT_OS_NONE || CFG_TUSB_OS == OPT_OS_PICO + tuh_task(); + #endif + + // TODO probably some timeout to prevent hanged + } + } + + return true; +} + +uint8_t tuh_control_xfer_sync(uint8_t daddr, tuh_control_xfer_t const* xfer, uint32_t timeout_ms) +{ + (void) timeout_ms; + + xfer_result_t result = XFER_RESULT_INVALID; + tuh_control_xfer_t xfer_sync = (*xfer); + + xfer_sync.complete_cb = NULL; + xfer_sync.user_arg = (uintptr_t) &result; + + // TODO use timeout to wait + TU_VERIFY(tuh_control_xfer(daddr, &xfer_sync), XFER_RESULT_TIMEOUT); + + return result; } TU_ATTR_ALWAYS_INLINE static inline void set_control_xfer_stage(uint8_t stage) @@ -869,15 +964,16 @@ static void _xfer_complete(uint8_t dev_addr, xfer_result_t result) { TU_LOG2("\r\n"); + // duplicate xfer since user can execute control transfer within callback + tuh_control_xfer_t const xfer_temp = _ctrl_xfer.xfer; + usbh_lock(); _ctrl_xfer.stage = CONTROL_STAGE_IDLE; usbh_unlock(); - if (_ctrl_xfer.xfer.complete_cb) + if (xfer_temp.complete_cb) { - // duplicate xfer since user can execute control transfer within callback - tuh_control_xfer_t const xfer_temp = _ctrl_xfer.xfer; - _ctrl_xfer.xfer.complete_cb(dev_addr, &xfer_temp, result); + xfer_temp.complete_cb(dev_addr, &xfer_temp, result); } } diff --git a/src/host/usbh.h b/src/host/usbh.h index d836d9593..3bd40c50d 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -52,6 +52,18 @@ struct tuh_control_xfer_s uintptr_t user_arg; }; +//--------------------------------------------------------------------+ +// APPLICATION CALLBACK +//--------------------------------------------------------------------+ + +//TU_ATTR_WEAK uint8_t tuh_attach_cb (tusb_desc_device_t const *desc_device); + +// Invoked when device is mounted (configured) +TU_ATTR_WEAK void tuh_mount_cb (uint8_t daddr); + +/// Invoked when device is unmounted (bus reset/unplugged) +TU_ATTR_WEAK void tuh_umount_cb(uint8_t daddr); + //--------------------------------------------------------------------+ // APPLICATION API //--------------------------------------------------------------------+ @@ -93,65 +105,101 @@ static inline bool tuh_ready(uint8_t daddr) } // Carry out a control transfer -// true on success, false if there is on-going control transfer -// Note: function is blocking if complete callback is NULL +// true on success, false if there is on-going control transfer or incorrect parameters +// Blocking if complete callback is NULL, in this case 'user_arg' must contain xfer_result_t variable bool tuh_control_xfer (uint8_t daddr, tuh_control_xfer_t const* xfer); -// Carry out a control transfer -// true on success, false if there is on-going control transfer -// Note: function is blocking if complete callback is NULL -//bool tuh_control_xfer (uint8_t daddr, tusb_control_request_t const* request, void* buffer, -// tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg); +// Sync (blocking) version of tuh_control_xfer() +// return transfer result +uint8_t tuh_control_xfer_sync(uint8_t daddr, tuh_control_xfer_t const* xfer, uint32_t timeout_ms); -// Set Configuration +// Set Configuration (control transfer) // config_num = 0 will un-configure device. Note: config_num = config_descriptor_index + 1 +// true on success, false if there is on-going control transfer or incorrect parameters +// Blocking if complete callback is NULL, in this case 'user_arg' must contain xfer_result_t variable bool tuh_configuration_set(uint8_t daddr, uint8_t config_num, tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg); -//------------- descriptors -------------// +//--------------------------------------------------------------------+ +// Descriptors Asynchronous (non-blocking) +//--------------------------------------------------------------------+ -// Get an descriptor +// Get an descriptor (control transfer) +// true on success, false if there is on-going control transfer or incorrect parameters bool tuh_descriptor_get(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len, tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg); -// Get device descriptor +// Get device descriptor (control transfer) +// true on success, false if there is on-going control transfer or incorrect parameters bool tuh_descriptor_get_device(uint8_t daddr, void* buffer, uint16_t len, tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg); -// Get configuration descriptor +// Get configuration descriptor (control transfer) +// true on success, false if there is on-going control transfer or incorrect parameters bool tuh_descriptor_get_configuration(uint8_t daddr, uint8_t index, void* buffer, uint16_t len, tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg); -// Get HID report descriptor -bool tuh_descriptor_get_hid_report(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, void* buffer, uint16_t len, +// Get HID report descriptor (control transfer) +// true on success, false if there is on-going control transfer or incorrect parameters +bool tuh_descriptor_get_hid_report(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len, tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg); -// Get string descriptor -bool tuh_descriptor_get_string(uint8_t daddr, uint16_t language_id, uint8_t index, void* buffer, uint16_t len, +// Get string descriptor (control transfer) +// true on success, false if there is on-going control transfer or incorrect parameters +// Blocking if complete callback is NULL, in this case 'user_arg' must contain xfer_result_t variable +bool tuh_descriptor_get_string(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len, tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg); -// Get manufacturer string descriptor +// Get manufacturer string descriptor (control transfer) +// true on success, false if there is on-going control transfer or incorrect parameters bool tuh_descriptor_get_manufacturer_string(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len, tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg); -// Get product string descriptor +// Get product string descriptor (control transfer) +// true on success, false if there is on-going control transfer or incorrect parameters bool tuh_descriptor_get_product_string(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len, tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg); -// Get serial string descriptor +// Get serial string descriptor (control transfer) +// true on success, false if there is on-going control transfer or incorrect parameters bool tuh_descriptor_get_serial_string(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len, tuh_control_xfer_cb_t complete_cb, uintptr_t user_arg); //--------------------------------------------------------------------+ -// APPLICATION CALLBACK +// Descriptors Synchronous (blocking) //--------------------------------------------------------------------+ -//TU_ATTR_WEAK uint8_t tuh_attach_cb (tusb_desc_device_t const *desc_device); -// Invoked when device is mounted (configured) -TU_ATTR_WEAK void tuh_mount_cb (uint8_t daddr); +// Sync (blocking) version of tuh_descriptor_get() +// return transfer result +uint8_t tuh_descriptor_get_sync(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len, uint8_t timeout_ms); -/// Invoked when device is unmounted (bus reset/unplugged) -TU_ATTR_WEAK void tuh_umount_cb(uint8_t daddr); +// Sync (blocking) version of tuh_descriptor_get_device() +// return transfer result +uint8_t tuh_descriptor_get_device_sync(uint8_t daddr, void* buffer, uint16_t len, uint8_t timeout_ms); + +// Sync (blocking) version of tuh_descriptor_get_configuration() +// return transfer result +uint8_t tuh_descriptor_get_configuration_sync(uint8_t daddr, uint8_t index, void* buffer, uint16_t len, uint8_t timeout_ms); + +// Sync (blocking) version of tuh_descriptor_get_hid_report() +// return transfer result +uint8_t tuh_descriptor_get_hid_report_sync(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len, uint8_t timeout_ms); + +// Sync (blocking) version of tuh_descriptor_get_string() +// return transfer result +uint8_t tuh_descriptor_get_string_sync(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len, uint8_t timeout_ms); + +// Sync (blocking) version of tuh_descriptor_get_manufacturer_string() +// return transfer result +uint8_t tuh_descriptor_get_manufacturer_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len, uint8_t timeout_ms); + +// Sync (blocking) version of tuh_descriptor_get_product_string() +// return transfer result +uint8_t tuh_descriptor_get_product_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len, uint8_t timeout_ms); + +// Sync (blocking) version of tuh_descriptor_get_serial_string() +// return transfer result +uint8_t tuh_descriptor_get_serial_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len, uint8_t timeout_ms); #ifdef __cplusplus } diff --git a/src/tusb_option.h b/src/tusb_option.h index e5351b1c4..0352faaed 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -285,7 +285,7 @@ #define CFG_TUSB_OS_INC_PATH #endif -// mutex is only needed for RTOS +// mutex is only needed for RTOS TODO also required with multiple core MCUs #define TUSB_OPT_MUTEX (CFG_TUSB_OS != OPT_OS_NONE) //-------------------------------------------------------------------- -- cgit v1.3.1 From fdfde8883ff6d929f44706d1fd3ee3cec8702bac Mon Sep 17 00:00:00 2001 From: Reinhard Panhuber Date: Sat, 19 Mar 2022 13:37:54 +0100 Subject: Implement power of two, shift, and float calculation --- src/class/audio/audio_device.c | 68 +++++++++++++++++++++++++++++++++++------- src/class/audio/audio_device.h | 4 +-- src/common/tusb_common.h | 10 +++++++ 3 files changed, 69 insertions(+), 13 deletions(-) (limited to 'src/common') diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index f0cab4d93..a815f7557 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -308,11 +308,15 @@ typedef struct uint32_t fb_val; // Feedback value for asynchronous mode (in 16.16 format). #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_WITHIN_SOF_ISR - uint8_t n_frames; // Number of (micro)frames used to estimate feedback value - uint8_t n_frames_current; // Current (micro)frame number - uint32_t n_cycles_old; // Old cycle count - uint32_t feeback_param_factor_N; // Numerator of feedback parameter coefficient - uint32_t feeback_param_factor_D; // Denominator of feedback parameter coefficient + uint8_t n_frames; // Number of (micro)frames used to estimate feedback value + uint8_t n_frames_current; // Current (micro)frame number + uint32_t n_cycles_old; // Old cycle count + union { + uint32_t i; + float f; + } feedback_param_factor_N; // Numerator of feedback parameter coefficient + uint32_t feedback_param_factor_D; // Denominator of feedback parameter coefficient + uint32_t * feedback_param_p_cycle_count; // Pointer to cycle counter #endif #endif @@ -2010,14 +2014,39 @@ bool audiod_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint3 // f_s max is 2^19-1 = 524287 Hz // n_frames_min is ceil(2^10 * f_s / f_m) for full speed and ceil(2^13 * f_s / f_m) for high speed // f_m max is 2^29/(1 ms * n_frames) for full speed and 2^29/(125 us * n_frames) for high speed -bool tud_audio_set_feedback_params_fm_fs(uint8_t func_id, uint32_t f_m, uint32_t f_s) +bool tud_audio_set_feedback_params_fm_fs(uint8_t func_id, uint32_t f_m, uint32_t f_s, uint32_t * p_cycle_count, bool use_float) { audiod_function_t* audio = &_audiod_fct[func_id]; + audio->feedback_param_p_cycle_count = p_cycle_count; uint8_t n_frame = 1; // TODO: finalize that audio->n_frames = n_frame; - audio->feeback_param_factor_N = f_s << 13; - audio->feeback_param_factor_D = f_m * n_frame; + + + + // Check if parameters reduce to a power of two shift i.e. is n_f * f_m / f_s a power of two? + if ((f_m % f_s) == 0 && tu_is_power_of_two(n_frame * f_m / f_s)) + { + audio->feedback_param_factor_N.i = 0; // zero marks power of two option + audio->feedback_param_factor_D = 16 - tu_log2(n_frame * f_m / f_s); + } + else + { + // Next best option is to use float if a FPU is available - this has to be enabled by the user + if (use_float) + { + audio->feedback_param_factor_N.f = (float)f_s / n_frame / f_m * (1 << 16); + audio->feedback_param_factor_D = 0; // non zero marks float option + } + else + { + // Neither a power of two or floats - use fixed point number + audio->feedback_param_factor_N.i = f_s << 13; + audio->feedback_param_factor_D = f_m * n_frame; + } + } + return true; + } #endif @@ -2044,10 +2073,27 @@ void audiod_sof (uint8_t rhport, uint32_t frame_count) audio->n_frames_current++; if (audio->n_frames_current == audio->n_frames) { - uint32_t n_cylces = tud_audio_n_get_fm_n_cycles_cb(rhport, audio->ep_fb); - uint32_t feedback = ((n_cylces - audio->n_cycles_old) << 3) * audio->feeback_param_factor_N / audio->feeback_param_factor_D; // feeback_param_factor_N has scaling factor of 13 bits, n_cycles 3 and feeback_param_factor_D 1, hence 16.16 precision + uint32_t n_cylces = *audio->feedback_param_p_cycle_count; + uint32_t feedback; - // TODO: Implement fast computation in case n_frames * f_s / f_m is a power of two + if (audio->feedback_param_factor_N.i == 0) + { + // Power of two shift + feedback = n_cylces << audio->feedback_param_factor_D; + } + else + { + if (audio->feedback_param_factor_D == 0) + { + // Float computation + feedback = (uint32_t)(n_cylces * audio->feedback_param_factor_N.f); + } + else + { + // Fixed point computation + feedback = ((n_cylces - audio->n_cycles_old) << 3) * audio->feedback_param_factor_N.i / audio->feedback_param_factor_D; // feeback_param_factor_N has scaling factor of 13 bits, n_cycles 3 and feeback_param_factor_D 1, hence 16.16 precision + } + } tud_audio_n_fb_set(i, feedback); audio->n_frames_current = 0; diff --git a/src/class/audio/audio_device.h b/src/class/audio/audio_device.h index eba8a6488..3645bda46 100644 --- a/src/class/audio/audio_device.h +++ b/src/class/audio/audio_device.h @@ -193,7 +193,7 @@ // Determine feedback value within SOF ISR within audio driver - if disabled the user has to call tud_audio_n_fb_set() with a suitable feedback value on its own. If done within audio driver SOF ISR, tud_audio_n_fb_set() is disabled for user #ifndef CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_WITHIN_SOF_ISR -#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_WITHIN_SOF_ISR 0 // 0 or 1 +#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_WITHIN_SOF_ISR 1 // 0 or 1 #endif // Audio interrupt control EP size - disabled if 0 @@ -487,7 +487,7 @@ TU_ATTR_WEAK uint32_t tud_audio_n_get_fm_n_cycles_cb(uint8_t rhport, uint8_t ep_ // f_m : Main clock frequency in Hz i.e. master clock to which sample clock is locked // f_s : Current sample rate in Hz -bool tud_audio_set_feedback_params_fm_fs(uint8_t func_id, uint32_t f_m, uint32_t f_s); +bool tud_audio_set_feedback_params_fm_fs(uint8_t func_id, uint32_t f_m, uint32_t f_s, uint32_t * p_cycle_count, bool use_float); #endif #endif diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 58591f0be..bcdf8933a 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -149,6 +149,16 @@ static inline uint8_t tu_log2(uint32_t value) return result; } +//static inline uint8_t tu_log2(uint32_t value) +//{ +// return sizeof(uint32_t) * CHAR_BIT - __builtin_clz(x) - 1; +//} + +static inline bool tu_is_power_of_two(uint32_t value) +{ + return (value != 0) && ((value & (value - 1)) == 0); +} + //------------- Unaligned Access -------------// #if TUP_ARCH_STRICT_ALIGN -- cgit v1.3.1 From fccbcfc88977ebdfb1448f6787cb052cfa949788 Mon Sep 17 00:00:00 2001 From: Greg Davill Date: Mon, 21 Mar 2022 10:01:11 +1030 Subject: Add WCH CH32V307 port Add WCH mcu submodule Add CH32V307V-R1-1v0 bsp --- .gitmodules | 3 + hw/bsp/ch32v307/boards/CH32V307V-R1-1v0/board.mk | 3 + .../ch32v307/boards/CH32V307V-R1-1v0/debug_uart.c | 110 +++ .../ch32v307/boards/CH32V307V-R1-1v0/debug_uart.h | 31 + hw/bsp/ch32v307/ch32v30x_conf.h | 43 ++ hw/bsp/ch32v307/ch32v30x_it.c | 49 ++ hw/bsp/ch32v307/ch32v30x_it.h | 18 + hw/bsp/ch32v307/core_riscv.h | 384 ++++++++++ hw/bsp/ch32v307/family.c | 160 +++++ hw/bsp/ch32v307/family.mk | 62 ++ hw/bsp/ch32v307/system_ch32v30x.c | 776 +++++++++++++++++++++ hw/bsp/ch32v307/system_ch32v30x.h | 30 + hw/mcu/wch/ch32v307 | 1 + src/common/tusb_mcu.h | 4 + src/portable/wch/ch32v307/usb_ch32_usbhs_reg.h | 345 +++++++++ src/portable/wch/ch32v307/usb_dc_usbhs.c | 388 +++++++++++ src/tusb_option.h | 3 + 17 files changed, 2410 insertions(+) create mode 100644 hw/bsp/ch32v307/boards/CH32V307V-R1-1v0/board.mk create mode 100644 hw/bsp/ch32v307/boards/CH32V307V-R1-1v0/debug_uart.c create mode 100644 hw/bsp/ch32v307/boards/CH32V307V-R1-1v0/debug_uart.h create mode 100644 hw/bsp/ch32v307/ch32v30x_conf.h create mode 100644 hw/bsp/ch32v307/ch32v30x_it.c create mode 100644 hw/bsp/ch32v307/ch32v30x_it.h create mode 100644 hw/bsp/ch32v307/core_riscv.h create mode 100644 hw/bsp/ch32v307/family.c create mode 100644 hw/bsp/ch32v307/family.mk create mode 100644 hw/bsp/ch32v307/system_ch32v30x.c create mode 100644 hw/bsp/ch32v307/system_ch32v30x.h create mode 160000 hw/mcu/wch/ch32v307 create mode 100644 src/portable/wch/ch32v307/usb_ch32_usbhs_reg.h create mode 100644 src/portable/wch/ch32v307/usb_dc_usbhs.c (limited to 'src/common') diff --git a/.gitmodules b/.gitmodules index 21bbf08c0..fd2b75cb8 100644 --- a/.gitmodules +++ b/.gitmodules @@ -146,3 +146,6 @@ [submodule "hw/mcu/allwinner"] path = hw/mcu/allwinner url = https://github.com/hathach/allwinner_driver.git +[submodule "hw/mcu/wch/ch32v307"] + path = hw/mcu/wch/ch32v307 + url = https://github.com/openwch/ch32v307.git diff --git a/hw/bsp/ch32v307/boards/CH32V307V-R1-1v0/board.mk b/hw/bsp/ch32v307/boards/CH32V307V-R1-1v0/board.mk new file mode 100644 index 000000000..f71def2c7 --- /dev/null +++ b/hw/bsp/ch32v307/boards/CH32V307V-R1-1v0/board.mk @@ -0,0 +1,3 @@ +LINKER_SCRIPTS = $(CH32V307_SDK_SRC)/Ld + +LD_FILE = $(LINKER_SCRIPTS)/Link.ld # CH32V307 diff --git a/hw/bsp/ch32v307/boards/CH32V307V-R1-1v0/debug_uart.c b/hw/bsp/ch32v307/boards/CH32V307V-R1-1v0/debug_uart.c new file mode 100644 index 000000000..416782d0e --- /dev/null +++ b/hw/bsp/ch32v307/boards/CH32V307V-R1-1v0/debug_uart.c @@ -0,0 +1,110 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022 Greg Davill + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "debug_uart.h" +#include + + +#define UART_RINGBUFFER_SIZE_TX 64 +#define UART_RINGBUFFER_MASK_TX (UART_RINGBUFFER_SIZE_TX-1) + +static char tx_buf[UART_RINGBUFFER_SIZE_TX]; +static unsigned int tx_produce; +static volatile unsigned int tx_consume; + +void USART1_IRQHandler(void) __attribute__((naked)); +void USART1_IRQHandler(void) { + __asm volatile ("call USART1_IRQHandler_impl; mret"); +} + +__attribute__((used)) void USART1_IRQHandler_impl(void) +{ + if(USART_GetITStatus(USART1, USART_IT_TC) != RESET) + { + USART_ClearITPendingBit(USART1, USART_IT_TC); + + if(tx_consume != tx_produce) { + USART_SendData(USART1, tx_buf[tx_consume]); + tx_consume = (tx_consume + 1) & UART_RINGBUFFER_MASK_TX; + } + } + +} + +void uart_write(char c) +{ + unsigned int tx_produce_next = (tx_produce + 1) & UART_RINGBUFFER_MASK_TX; + + NVIC_DisableIRQ(USART1_IRQn); + if((tx_consume != tx_produce) || (USART_GetFlagStatus(USART1, USART_FLAG_TXE) == RESET)) { + tx_buf[tx_produce] = c; + tx_produce = tx_produce_next; + } else { + USART_SendData(USART1, c); + } + NVIC_EnableIRQ(USART1_IRQn); +} + + +void uart_sync(void) +{ + while(tx_consume != tx_produce); +} + + +void USART_Printf_Init(uint32_t baudrate) +{ + GPIO_InitTypeDef GPIO_InitStructure; + USART_InitTypeDef USART_InitStructure; + + tx_produce = 0; + tx_consume = 0; + + RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOA, &GPIO_InitStructure); + + USART_InitStructure.USART_BaudRate = baudrate; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Tx; + + USART_Init(USART1, &USART_InitStructure); + USART_ITConfig(USART1, USART_IT_TC, ENABLE); + USART_Cmd(USART1, ENABLE); + + NVIC_InitTypeDef NVIC_InitStructure = {0}; + NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); +} diff --git a/hw/bsp/ch32v307/boards/CH32V307V-R1-1v0/debug_uart.h b/hw/bsp/ch32v307/boards/CH32V307V-R1-1v0/debug_uart.h new file mode 100644 index 000000000..4348438bb --- /dev/null +++ b/hw/bsp/ch32v307/boards/CH32V307V-R1-1v0/debug_uart.h @@ -0,0 +1,31 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022 Greg Davill + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include + +void uart_write(char c); +void uart_sync(void); +void USART_Printf_Init(uint32_t baudrate); diff --git a/hw/bsp/ch32v307/ch32v30x_conf.h b/hw/bsp/ch32v307/ch32v30x_conf.h new file mode 100644 index 000000000..399feaf68 --- /dev/null +++ b/hw/bsp/ch32v307/ch32v30x_conf.h @@ -0,0 +1,43 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v30x_conf.h +* Author : WCH +* Version : V1.0.0 +* Date : 2021/06/06 +* Description : Library configuration file. +* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. +* SPDX-License-Identifier: Apache-2.0 +*******************************************************************************/ +#ifndef __CH32V30x_CONF_H +#define __CH32V30x_CONF_H + +#include "ch32v30x_adc.h" +#include "ch32v30x_bkp.h" +#include "ch32v30x_can.h" +#include "ch32v30x_crc.h" +#include "ch32v30x_dac.h" +#include "ch32v30x_dbgmcu.h" +#include "ch32v30x_dma.h" +#include "ch32v30x_exti.h" +#include "ch32v30x_flash.h" +#include "ch32v30x_fsmc.h" +#include "ch32v30x_gpio.h" +#include "ch32v30x_i2c.h" +#include "ch32v30x_iwdg.h" +#include "ch32v30x_pwr.h" +#include "ch32v30x_rcc.h" +#include "ch32v30x_rtc.h" +#include "ch32v30x_sdio.h" +#include "ch32v30x_spi.h" +#include "ch32v30x_tim.h" +#include "ch32v30x_usart.h" +#include "ch32v30x_wwdg.h" +#include "ch32v30x_it.h" +#include "ch32v30x_misc.h" + + +#endif /* __CH32V30x_CONF_H */ + + + + + diff --git a/hw/bsp/ch32v307/ch32v30x_it.c b/hw/bsp/ch32v307/ch32v30x_it.c new file mode 100644 index 000000000..d348dd989 --- /dev/null +++ b/hw/bsp/ch32v307/ch32v30x_it.c @@ -0,0 +1,49 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v30x_it.c +* Author : WCH +* Version : V1.0.0 +* Date : 2021/06/06 +* Description : Main Interrupt Service Routines. +* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. +* SPDX-License-Identifier: Apache-2.0 +*******************************************************************************/ +#include "ch32v30x_it.h" + +void NMI_Handler(void) __attribute__((naked)); +void HardFault_Handler(void) __attribute__((naked)); + +/********************************************************************* + * @fn NMI_Handler + * + * @brief This function handles NMI exception. + * + * @return none + */ +void NMI_Handle(void){ + __asm volatile ("call NMI_Handler_impl; mret"); +} + +__attribute__((used)) void NMI_Handler_impl(void) +{ + +} + +/********************************************************************* + * @fn HardFault_Handler + * + * @brief This function handles Hard Fault exception. + * + * @return none + */ +void HardFault_Handler(void){ + __asm volatile ("call HardFault_Handler_impl; mret"); +} + +__attribute__((used)) void HardFault_Handler_impl(void) +{ + while (1) + { + } +} + + diff --git a/hw/bsp/ch32v307/ch32v30x_it.h b/hw/bsp/ch32v307/ch32v30x_it.h new file mode 100644 index 000000000..6475c5f11 --- /dev/null +++ b/hw/bsp/ch32v307/ch32v30x_it.h @@ -0,0 +1,18 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v30x_it.h +* Author : WCH +* Version : V1.0.0 +* Date : 2021/06/06 +* Description : This file contains the headers of the interrupt handlers. +* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. +* SPDX-License-Identifier: Apache-2.0 +*******************************************************************************/ +#ifndef __CH32V30x_IT_H +#define __CH32V30x_IT_H + +#include "debug.h" + + +#endif /* __CH32V30x_IT_H */ + + diff --git a/hw/bsp/ch32v307/core_riscv.h b/hw/bsp/ch32v307/core_riscv.h new file mode 100644 index 000000000..2e94ec683 --- /dev/null +++ b/hw/bsp/ch32v307/core_riscv.h @@ -0,0 +1,384 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : core_riscv.h +* Author : WCH +* Version : V1.0.0 +* Date : 2021/06/06 +* Description : RISC-V Core Peripheral Access Layer Header File for CH32V30x +* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. +* SPDX-License-Identifier: Apache-2.0 +*******************************************************************************/ +#ifndef __CORE_RISCV_H__ +#define __CORE_RISCV_H__ + +/* IO definitions */ +#ifdef __cplusplus + #define __I volatile /* defines 'read only' permissions */ +#else + #define __I volatile const /* defines 'read only' permissions */ +#endif +#define __O volatile /* defines 'write only' permissions */ +#define __IO volatile /* defines 'read / write' permissions */ + +/* Standard Peripheral Library old types (maintained for legacy purpose) */ +typedef __I uint64_t vuc64; /* Read Only */ +typedef __I uint32_t vuc32; /* Read Only */ +typedef __I uint16_t vuc16; /* Read Only */ +typedef __I uint8_t vuc8; /* Read Only */ + +typedef const uint64_t uc64; /* Read Only */ +typedef const uint32_t uc32; /* Read Only */ +typedef const uint16_t uc16; /* Read Only */ +typedef const uint8_t uc8; /* Read Only */ + +typedef __I int64_t vsc64; /* Read Only */ +typedef __I int32_t vsc32; /* Read Only */ +typedef __I int16_t vsc16; /* Read Only */ +typedef __I int8_t vsc8; /* Read Only */ + +typedef const int64_t sc64; /* Read Only */ +typedef const int32_t sc32; /* Read Only */ +typedef const int16_t sc16; /* Read Only */ +typedef const int8_t sc8; /* Read Only */ + +typedef __IO uint64_t vu64; +typedef __IO uint32_t vu32; +typedef __IO uint16_t vu16; +typedef __IO uint8_t vu8; + +typedef uint64_t u64; +typedef uint32_t u32; +typedef uint16_t u16; +typedef uint8_t u8; + +typedef __IO int64_t vs64; +typedef __IO int32_t vs32; +typedef __IO int16_t vs16; +typedef __IO int8_t vs8; + +typedef int64_t s64; +typedef int32_t s32; +typedef int16_t s16; +typedef int8_t s8; + +typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus; + +typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; + +typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus; + +#define RV_STATIC_INLINE static inline + +/* memory mapped structure for Program Fast Interrupt Controller (PFIC) */ +typedef struct{ + __I uint32_t ISR[8]; + __I uint32_t IPR[8]; + __IO uint32_t ITHRESDR; + __IO uint32_t RESERVED; + __IO uint32_t CFGR; + __I uint32_t GISR; + uint8_t VTFIDR[4]; + uint8_t RESERVED0[12]; + __IO uint32_t VTFADDR[4]; + uint8_t RESERVED1[0x90]; + __O uint32_t IENR[8]; + uint8_t RESERVED2[0x60]; + __O uint32_t IRER[8]; + uint8_t RESERVED3[0x60]; + __O uint32_t IPSR[8]; + uint8_t RESERVED4[0x60]; + __O uint32_t IPRR[8]; + uint8_t RESERVED5[0x60]; + __IO uint32_t IACTR[8]; + uint8_t RESERVED6[0xE0]; + __IO uint8_t IPRIOR[256]; + uint8_t RESERVED7[0x810]; + __IO uint32_t SCTLR; +}PFIC_Type; + +/* memory mapped structure for SysTick */ +typedef struct +{ + __IO u32 CTLR; + __IO u32 SR; + __IO u64 CNT; + __IO u64 CMP; +}SysTick_Type; + + +#define PFIC ((PFIC_Type *) 0xE000E000 ) +#define NVIC PFIC +#define NVIC_KEY1 ((uint32_t)0xFA050000) +#define NVIC_KEY2 ((uint32_t)0xBCAF0000) +#define NVIC_KEY3 ((uint32_t)0xBEEF0000) + +#define SysTick ((SysTick_Type *) 0xE000F000) + + +/********************************************************************* + * @fn __enable_irq + * + * @brief Enable Global Interrupt + * + * @return none + */ +RV_STATIC_INLINE void __enable_irq(void) +{ + __asm volatile ("csrw 0x800, %0" : : "r" (0x6088) ); +} + +/********************************************************************* + * @fn __disable_irq + * + * @brief Disable Global Interrupt + * + * @return none + */ +RV_STATIC_INLINE void __disable_irq(void) +{ + __asm volatile ("csrw 0x800, %0" : : "r" (0x6000) ); +} + +/********************************************************************* + * @fn __NOP + * + * @brief nop + * + * @return none + */ +RV_STATIC_INLINE void __NOP(void) +{ + __asm volatile ("nop"); +} + +/********************************************************************* + * @fn NVIC_EnableIRQ + * + * @brief Enable Interrupt + * + * @param IRQn: Interrupt Numbers + * + * @return none + */ +RV_STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) +{ + NVIC->IENR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); +} + +/********************************************************************* + * @fn NVIC_DisableIRQ + * + * @brief Disable Interrupt + * + * @param IRQn: Interrupt Numbers + * + * @return none + */ +RV_STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) +{ + NVIC->IRER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); +} + +/********************************************************************* + * @fn NVIC_GetStatusIRQ + * + * @brief Get Interrupt Enable State + * + * @param IRQn: Interrupt Numbers + * + * @return 1 - Interrupt Enable + * 0 - Interrupt Disable + */ +RV_STATIC_INLINE uint32_t NVIC_GetStatusIRQ(IRQn_Type IRQn) +{ + return((uint32_t) ((NVIC->ISR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); +} + +/********************************************************************* + * @fn NVIC_GetPendingIRQ + * + * @brief Get Interrupt Pending State + * + * @param IRQn: Interrupt Numbers + * + * @return 1 - Interrupt Pending Enable + * 0 - Interrupt Pending Disable + */ +RV_STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + return((uint32_t) ((NVIC->IPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); +} + +/********************************************************************* + * @fn NVIC_SetPendingIRQ + * + * @brief Set Interrupt Pending + * + * @param IRQn: Interrupt Numbers + * + * @return None + */ +RV_STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + NVIC->IPSR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); +} + +/********************************************************************* + * @fn NVIC_ClearPendingIRQ + * + * @brief Clear Interrupt Pending + * + * @param IRQn: Interrupt Numbers + * + * @return None + */ +RV_STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + NVIC->IPRR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); +} + +/********************************************************************* + * @fn NVIC_GetActive + * + * @brief Get Interrupt Active State + * + * @param IRQn: Interrupt Numbers + * + * @return 1 - Interrupt Active + * 0 - Interrupt No Active + */ +RV_STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) +{ + return((uint32_t)((NVIC->IACTR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); +} + +/********************************************************************* + * @fn NVIC_SetPriority + * + * @brief Set Interrupt Priority + * + * @param IRQn - Interrupt Numbers + * priority - + * bit7 - pre-emption priority + * bit6~bit4 - subpriority + * @return None + */ +RV_STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint8_t priority) +{ + NVIC->IPRIOR[(uint32_t)(IRQn)] = priority; +} + +/********************************************************************* + * @fn __WFI + * + * @brief Wait for Interrupt + * + * @return None + */ +__attribute__( ( always_inline ) ) RV_STATIC_INLINE void __WFI(void) +{ + NVIC->SCTLR &= ~(1<<3); // wfi + asm volatile ("wfi"); +} + +/********************************************************************* + * @fn __WFE + * + * @brief Wait for Events + * + * @return None + */ +__attribute__( ( always_inline ) ) RV_STATIC_INLINE void __WFE(void) +{ + uint32_t t; + + t = NVIC->SCTLR; + NVIC->SCTLR |= (1<<3)|(1<<5); // (wfi->wfe)+(__sev) + NVIC->SCTLR = (NVIC->SCTLR & ~(1<<5)) | ( t & (1<<5)); + asm volatile ("wfi"); + asm volatile ("wfi"); +} + +/********************************************************************* + * @fn SetVTFIRQ + * + * @brief Set VTF Interrupt + * + * @param add - VTF interrupt service function base address. + * IRQn -Interrupt Numbers + * num - VTF Interrupt Numbers + * NewState - DISABLE or ENABLE + * @return None + */ +RV_STATIC_INLINE void SetVTFIRQ(uint32_t addr, IRQn_Type IRQn, uint8_t num, FunctionalState NewState){ + if(num > 3) return ; + + if (NewState != DISABLE) + { + NVIC->VTFIDR[num] = IRQn; + NVIC->VTFADDR[num] = ((addr&0xFFFFFFFE)|0x1); + } + else{ + NVIC->VTFIDR[num] = IRQn; + NVIC->VTFADDR[num] = ((addr&0xFFFFFFFE)&(~0x1)); + } +} + +/********************************************************************* + * @fn NVIC_SystemReset + * + * @brief Initiate a system reset request + * + * @return None + */ +RV_STATIC_INLINE void NVIC_SystemReset(void) +{ + NVIC->CFGR = NVIC_KEY3|(1<<7); +} + + +/* Core_Exported_Functions */ +extern uint32_t __get_FFLAGS(void); +extern void __set_FFLAGS(uint32_t value); +extern uint32_t __get_FRM(void); +extern void __set_FRM(uint32_t value); +extern uint32_t __get_FCSR(void); +extern void __set_FCSR(uint32_t value); +extern uint32_t __get_MSTATUS(void); +extern void __set_MSTATUS(uint32_t value); +extern uint32_t __get_MISA(void); +extern void __set_MISA(uint32_t value); +extern uint32_t __get_MIE(void); +extern void __set_MIE(uint32_t value); +extern uint32_t __get_MTVEC(void); +extern void __set_MTVEC(uint32_t value); +extern uint32_t __get_MSCRATCH(void); +extern void __set_MSCRATCH(uint32_t value); +extern uint32_t __get_MEPC(void); +extern void __set_MEPC(uint32_t value); +extern uint32_t __get_MCAUSE(void); +extern void __set_MCAUSE(uint32_t value); +extern uint32_t __get_MTVAL(void); +extern void __set_MTVAL(uint32_t value); +extern uint32_t __get_MIP(void); +extern void __set_MIP(uint32_t value); +extern uint32_t __get_MCYCLE(void); +extern void __set_MCYCLE(uint32_t value); +extern uint32_t __get_MCYCLEH(void); +extern void __set_MCYCLEH(uint32_t value); +extern uint32_t __get_MINSTRET(void); +extern void __set_MINSTRET(uint32_t value); +extern uint32_t __get_MINSTRETH(void); +extern void __set_MINSTRETH(uint32_t value); +extern uint32_t __get_MVENDORID(void); +extern uint32_t __get_MARCHID(void); +extern uint32_t __get_MIMPID(void); +extern uint32_t __get_MHARTID(void); +extern uint32_t __get_SP(void); + + +#endif + + + + + diff --git a/hw/bsp/ch32v307/family.c b/hw/bsp/ch32v307/family.c new file mode 100644 index 000000000..ea1c252c4 --- /dev/null +++ b/hw/bsp/ch32v307/family.c @@ -0,0 +1,160 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022 Greg Davill + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "stdio.h" +#include "debug_uart.h" +#include "ch32v30x.h" + +#include "../board.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ + +void USBHS_IRQHandler(void) __attribute__((naked)); +void USBHS_IRQHandler(void) { + __asm volatile ("call USBHS_IRQHandler_impl; mret"); +} + +__attribute__ ((used)) void USBHS_IRQHandler_impl(void) { + tud_int_handler(0); +} + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM +//--------------------------------------------------------------------+ + +uint32_t SysTick_Config(uint32_t ticks) +{ + NVIC_EnableIRQ(SysTicK_IRQn); + SysTick->CTLR=0; + SysTick->SR=0; + SysTick->CNT=0; + SysTick->CMP=ticks-1; + SysTick->CTLR=0xF; + return 0; +} + +void board_init(void) { + + /* Disable interrupts during init */ + __disable_irq(); + + +#if CFG_TUSB_OS == OPT_OS_NONE + SysTick_Config(SystemCoreClock / 1000); +#endif + + USART_Printf_Init(115200); + + RCC_USBCLK48MConfig(RCC_USBCLK48MCLKSource_USBPHY); + RCC_USBHSPLLCLKConfig(RCC_HSBHSPLLCLKSource_HSE); + RCC_USBHSConfig(RCC_USBPLL_Div2); + RCC_USBHSPLLCKREFCLKConfig(RCC_USBHSPLLCKREFCLK_4M); + RCC_USBHSPHYPLLALIVEcmd(ENABLE); + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_USBHS, ENABLE); + + GPIO_InitTypeDef GPIO_InitStructure = {0}; + + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOC, &GPIO_InitStructure); + + /* Enable interrupts globaly */ + __enable_irq(); + + board_delay(2); +} + +#if CFG_TUSB_OS == OPT_OS_NONE + +volatile uint32_t system_ticks = 0; + +/* Small workaround to support HW stack save/restore */ +void SysTick_Handler(void) __attribute__((naked)); +void SysTick_Handler(void) { + __asm volatile ("call SysTick_Handler_impl; mret"); +} + +__attribute__((used)) void SysTick_Handler_impl(void) { + SysTick->SR=0; + system_ticks++; +} + +uint32_t board_millis(void) { return system_ticks; } + +#endif + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) { + (void) state; + + GPIO_WriteBit(GPIOC, GPIO_Pin_0, state); +} + +uint32_t board_button_read(void) { + return false; +} + +int board_uart_read(uint8_t* buf, int len) { + (void)buf; + (void)len; + return 0; +} + +int board_uart_write(void const* buf, int len) { + int txsize = len; + while (txsize--) { + uart_write(*(uint8_t const*)buf); + buf++; + } + return len; +} + + + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(char* file, uint32_t line) { + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line + number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) + */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ diff --git a/hw/bsp/ch32v307/family.mk b/hw/bsp/ch32v307/family.mk new file mode 100644 index 000000000..dfb4853d9 --- /dev/null +++ b/hw/bsp/ch32v307/family.mk @@ -0,0 +1,62 @@ +# https://www.embecosm.com/resources/tool-chain-downloads/#riscv-stable +#CROSS_COMPILE ?= riscv32-unknown-elf- + +# Toolchain from https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack +CROSS_COMPILE ?= riscv-none-embed- + +# Submodules +CH32V307_SDK = hw/mcu/wch/ch32v307 +DEPS_SUBMODULES += $(CH32V307_SDK) + +# WCH-SDK paths +CH32V307_SDK_SRC = $(CH32V307_SDK)/EVT/EXAM/SRC +CH32V307_SDK_SRC_TOP = $(TOP)/$(CH32V307_SDK_SRC) +CH32V307_STARTUP_ASM = $(CH32V307_SDK_SRC)/Startup + +include $(TOP)/$(BOARD_PATH)/board.mk + +SKIP_NANOLIB = 1 + +CFLAGS += \ + -flto \ + -march=rv32imac \ + -mabi=ilp32 \ + -msmall-data-limit=8 \ + -mno-save-restore -Os \ + -fmessage-length=0 \ + -fsigned-char \ + -ffunction-sections \ + -fdata-sections \ + -nostdlib -nostartfiles \ + -DCFG_TUSB_MCU=OPT_MCU_CH32VF307 \ + -Xlinker --gc-sections \ + -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED + +LDFLAGS += \ + -Xlinker --gc-sections --specs=nano.specs --specs=nosys.specs + +SRC_C += \ + src/portable/wch/ch32v307/usb_dc_usbhs.c \ + $(CH32V307_SDK_SRC_TOP)/Core/core_riscv.c \ + $(CH32V307_SDK_SRC_TOP)/Peripheral/src/ch32v30x_gpio.c \ + $(CH32V307_SDK_SRC_TOP)/Peripheral/src/ch32v30x_misc.c \ + $(CH32V307_SDK_SRC_TOP)/Peripheral/src/ch32v30x_rcc.c \ + $(CH32V307_SDK_SRC_TOP)/Peripheral/src/ch32v30x_usart.c + +SRC_S += \ + $(CH32V307_STARTUP_ASM)/startup_ch32v30x_D8C.S + +INC += \ + src/portable/wch/ch32v307 \ + $(TOP)/$(BOARD_PATH)/.. \ + $(TOP)/$(BOARD_PATH) \ + $(CH32V307_SDK_SRC_TOP)/Peripheral/inc \ + $(CH32V307_SDK_SRC_TOP)/Debug \ + $(CH32V307_SDK_SRC_TOP) + +# For freeRTOS port source +FREERTOS_PORT = RISC-V + +# flash target ROM bootloader +flash: $(BUILD)/$(PROJECT).elf + openocd -f wch-riscv.cfg -c init -c halt -c "program $< 0x08000000" -c reset -c exit diff --git a/hw/bsp/ch32v307/system_ch32v30x.c b/hw/bsp/ch32v307/system_ch32v30x.c new file mode 100644 index 000000000..12b18d7b8 --- /dev/null +++ b/hw/bsp/ch32v307/system_ch32v30x.c @@ -0,0 +1,776 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : system_ch32v30x.c +* Author : WCH +* Version : V1.0.0 +* Date : 2021/06/06 +* Description : CH32V30x Device Peripheral Access Layer System Source File. +* For HSE = 8Mhz +* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. +* SPDX-License-Identifier: Apache-2.0 +*********************************************************************************/ +#include "ch32v30x.h" + +/* +* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after +* reset the HSI is used as SYSCLK source). +* If none of the define below is enabled, the HSI is used as System clock source. +*/ +// #define SYSCLK_FREQ_HSE HSE_VALUE +/* #define SYSCLK_FREQ_24MHz 24000000 */ +//#define SYSCLK_FREQ_48MHz 48000000 +/* #define SYSCLK_FREQ_56MHz 56000000 */ +//#define SYSCLK_FREQ_72MHz 72000000 +//#define SYSCLK_FREQ_96MHz 96000000 +//#define SYSCLK_FREQ_120MHz 120000000 +#define SYSCLK_FREQ_144MHz 144000000 + +/* Clock Definitions */ +#ifdef SYSCLK_FREQ_HSE + uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_24MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_48MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_56MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_72MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; /* System Clock Frequency (Core Clock) */ + +#elif defined SYSCLK_FREQ_96MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_96MHz; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_120MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_120MHz; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_144MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_144MHz; /* System Clock Frequency (Core Clock) */ + +#else /* HSI Selected as System Clock source */ + uint32_t SystemCoreClock = HSI_VALUE; /* System Clock Frequency (Core Clock) */ +#endif + +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + + +/* system_private_function_proto_types */ +static void SetSysClock(void); + +#ifdef SYSCLK_FREQ_HSE + static void SetSysClockToHSE(void); +#elif defined SYSCLK_FREQ_24MHz + static void SetSysClockTo24(void); +#elif defined SYSCLK_FREQ_48MHz + static void SetSysClockTo48(void); +#elif defined SYSCLK_FREQ_56MHz + static void SetSysClockTo56(void); +#elif defined SYSCLK_FREQ_72MHz + static void SetSysClockTo72(void); + +#elif defined SYSCLK_FREQ_96MHz + static void SetSysClockTo96(void); +#elif defined SYSCLK_FREQ_120MHz + static void SetSysClockTo120(void); +#elif defined SYSCLK_FREQ_144MHz + static void SetSysClockTo144(void); + +#endif + + +/********************************************************************* + * @fn SystemInit + * + * @brief Setup the microcontroller system Initialize the Embedded Flash Interface, + * the PLL and update the SystemCoreClock variable. + * + * @return none + */ +void SystemInit (void) +{ + RCC->CTLR |= (uint32_t)0x00000001; + +#ifdef CH32V30x_D8C + RCC->CFGR0 &= (uint32_t)0xF8FF0000; +#else + RCC->CFGR0 &= (uint32_t)0xF0FF0000; +#endif + + RCC->CTLR &= (uint32_t)0xFEF6FFFF; + RCC->CTLR &= (uint32_t)0xFFFBFFFF; + RCC->CFGR0 &= (uint32_t)0xFF80FFFF; + +#ifdef CH32V30x_D8C + RCC->CTLR &= (uint32_t)0xEBFFFFFF; + RCC->INTR = 0x00FF0000; + RCC->CFGR2 = 0x00000000; +#else + RCC->INTR = 0x009F0000; +#endif + SetSysClock(); +} + +/********************************************************************* + * @fn SystemCoreClockUpdate + * + * @brief Update SystemCoreClock variable according to Clock Register Values. + * + * @return none + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0, Pll_6_5 = 0; + + tmp = RCC->CFGR0 & RCC_SWS; + + switch (tmp) + { + case 0x00: + SystemCoreClock = HSI_VALUE; + break; + case 0x04: + SystemCoreClock = HSE_VALUE; + break; + case 0x08: + pllmull = RCC->CFGR0 & RCC_PLLMULL; + pllsource = RCC->CFGR0 & RCC_PLLSRC; + pllmull = ( pllmull >> 18) + 2; + +#ifdef CH32V30x_D8 + if(pllmull == 17) pllmull = 18; +#else + if(pllmull == 2) pllmull = 18; + if(pllmull == 15){ + pllmull = 13; /* *6.5 */ + Pll_6_5 = 1; + } + if(pllmull == 16) pllmull = 15; + if(pllmull == 17) pllmull = 16; +#endif + + if (pllsource == 0x00) + { + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + if ((RCC->CFGR0 & RCC_PLLXTPRE) != (uint32_t)RESET) + { + SystemCoreClock = (HSE_VALUE >> 1) * pllmull; + } + else + { + SystemCoreClock = HSE_VALUE * pllmull; + } + } + + if(Pll_6_5 == 1) SystemCoreClock = (SystemCoreClock / 2); + + break; + default: + SystemCoreClock = HSI_VALUE; + break; + } + + tmp = AHBPrescTable[((RCC->CFGR0 & RCC_HPRE) >> 4)]; + SystemCoreClock >>= tmp; +} + +/********************************************************************* + * @fn SetSysClock + * + * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClock(void) +{ +#ifdef SYSCLK_FREQ_HSE + SetSysClockToHSE(); +#elif defined SYSCLK_FREQ_24MHz + SetSysClockTo24(); +#elif defined SYSCLK_FREQ_48MHz + SetSysClockTo48(); +#elif defined SYSCLK_FREQ_56MHz + SetSysClockTo56(); +#elif defined SYSCLK_FREQ_72MHz + SetSysClockTo72(); +#elif defined SYSCLK_FREQ_96MHz + SetSysClockTo96(); +#elif defined SYSCLK_FREQ_120MHz + SetSysClockTo120(); +#elif defined SYSCLK_FREQ_144MHz + SetSysClockTo144(); + +#endif + + /* If none of the define above is enabled, the HSI is used as System clock + * source (default after reset) + */ +} + + +#ifdef SYSCLK_FREQ_HSE + +/********************************************************************* + * @fn SetSysClockToHSE + * + * @brief Sets HSE as System clock source and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockToHSE(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV1; + + /* Select HSE as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_HSE; + + /* Wait till HSE is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x04) + { + } + } + else + { + /* If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + +#elif defined SYSCLK_FREQ_24MHz + +/********************************************************************* + * @fn SetSysClockTo24 + * + * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo24(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + if (HSEStatus == (uint32_t)0x01) + { + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV1; + + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL)); + +#ifdef CH32V30x_D8 + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL3); +#else + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL3_EXTEN); +#endif + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CTLR & RCC_PLLRDY) == 0) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) + { + } + } + else + { + /* If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + +#elif defined SYSCLK_FREQ_48MHz + +/********************************************************************* + * @fn SetSysClockTo48 + * + * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo48(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSE * 6 = 48 MHz */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL)); + +#ifdef CH32V30x_D8 + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL6); +#else + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL6_EXTEN); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while((RCC->CTLR & RCC_PLLRDY) == 0) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) + { + } + } + else + { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + +#elif defined SYSCLK_FREQ_56MHz + +/********************************************************************* + * @fn SetSysClockTo56 + * + * @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo56(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL)); + +#ifdef CH32V30x_D8 + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL7); +#else + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL7_EXTEN); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while((RCC->CTLR & RCC_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) + { + } + } + else + { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + +#elif defined SYSCLK_FREQ_72MHz + +/********************************************************************* + * @fn SetSysClockTo72 + * + * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo72(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | + RCC_PLLMULL)); + +#ifdef CH32V30x_D8 + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL9); +#else + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL9_EXTEN); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while((RCC->CTLR & RCC_PLLRDY) == 0) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) + { + } + } + else + { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + + +#elif defined SYSCLK_FREQ_96MHz + +/********************************************************************* + * @fn SetSysClockTo96 + * + * @brief Sets System clock frequency to 96MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo96(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSE * 12 = 96 MHz */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | + RCC_PLLMULL)); + +#ifdef CH32V30x_D8 + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL12); +#else + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL12_EXTEN); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while((RCC->CTLR & RCC_PLLRDY) == 0) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) + { + } + } + else + { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + + +#elif defined SYSCLK_FREQ_120MHz + +/********************************************************************* + * @fn SetSysClockTo120 + * + * @brief Sets System clock frequency to 120MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo120(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSE * 15 = 120 MHz */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | + RCC_PLLMULL)); + +#ifdef CH32V30x_D8 + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL15); +#else + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL15_EXTEN); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while((RCC->CTLR & RCC_PLLRDY) == 0) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) + { + } + } + else + { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + + +#elif defined SYSCLK_FREQ_144MHz + +/********************************************************************* + * @fn SetSysClockTo144 + * + * @brief Sets System clock frequency to 144MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo144(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSE * 18 = 144 MHz */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | + RCC_PLLMULL)); + +#ifdef CH32V30x_D8 + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL18); +#else + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL18_EXTEN); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while((RCC->CTLR & RCC_PLLRDY) == 0) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) + { + } + } + else + { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + + +#endif diff --git a/hw/bsp/ch32v307/system_ch32v30x.h b/hw/bsp/ch32v307/system_ch32v30x.h new file mode 100644 index 000000000..0e0ef4e51 --- /dev/null +++ b/hw/bsp/ch32v307/system_ch32v30x.h @@ -0,0 +1,30 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : system_ch32v30x.h +* Author : WCH +* Version : V1.0.0 +* Date : 2021/06/06 +* Description : CH32V30x Device Peripheral Access Layer System Header File. +* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. +* SPDX-License-Identifier: Apache-2.0 +*******************************************************************************/ +#ifndef __SYSTEM_CH32V30x_H +#define __SYSTEM_CH32V30x_H + +#ifdef __cplusplus + extern "C" { +#endif + +extern uint32_t SystemCoreClock; /* System Clock Frequency (Core Clock) */ + +/* System_Exported_Functions */ +extern void SystemInit(void); +extern void SystemCoreClockUpdate(void); + +#ifdef __cplusplus +} +#endif + +#endif /*__CH32V30x_SYSTEM_H */ + + + diff --git a/hw/mcu/wch/ch32v307 b/hw/mcu/wch/ch32v307 new file mode 160000 index 000000000..17761f5cf --- /dev/null +++ b/hw/mcu/wch/ch32v307 @@ -0,0 +1 @@ +Subproject commit 17761f5cf9dbbf2dcf665b7c04934188add20082 diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 8eb4ad475..84d629eac 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -266,6 +266,10 @@ #elif TU_CHECK_MCU(OPT_MCU_F1C100S) #define TUP_DCD_ENDPOINT_MAX 4 +//------------- WCH -------------// +#elif TU_CHECK_MCU(OPT_MCU_CH32VF307) + #define TUP_DCD_ENDPOINT_MAX 8 + #endif //--------------------------------------------------------------------+ diff --git a/src/portable/wch/ch32v307/usb_ch32_usbhs_reg.h b/src/portable/wch/ch32v307/usb_ch32_usbhs_reg.h new file mode 100644 index 000000000..1b7c0e791 --- /dev/null +++ b/src/portable/wch/ch32v307/usb_ch32_usbhs_reg.h @@ -0,0 +1,345 @@ +#ifndef _USB_CH32_USBHS_REG_H +#define _USB_CH32_USBHS_REG_H + +#include + +/******************* GLOBAL ******************/ + +// USB CONTROL +#define USBHS_CONTROL_OFFSET 0x00 +#define USBHS_DMA_EN (1 << 0) +#define USBHS_ALL_CLR (1 << 1) +#define USBHS_FORCE_RST (1 << 2) +#define USBHS_INT_BUSY_EN (1 << 3) +#define USBHS_DEV_PU_EN (1 << 4) +#define USBHS_SPEED_MASK (3 << 5) +#define USBHS_FULL_SPEED (0 << 5) +#define USBHS_HIGH_SPEED (1 << 5) +#define USBHS_LOW_SPEED (2 << 5) +#define USBHS_HOST_MODE (1 << 7) + +// USB_INT_EN +#define USBHS_INT_EN_OFFSET 0x02 +#define USBHS_BUS_RST_EN (1 << 0) +#define USBHS_DETECT_EN (1 << 0) +#define USBHS_TRANSFER_EN (1 << 1) +#define USBHS_SUSPEND_EN (1 << 2) +#define USBHS_SOF_ACT_EN (1 << 3) +#define USBHS_FIFO_OV_EN (1 << 4) +#define USBHS_SETUP_ACT_EN (1 << 5) +#define USBHS_ISO_ACT_EN (1 << 6) +#define USBHS_DEV_NAK_EN (1 << 7) + +// USB DEV AD +#define USBHS_DEV_AD_OFFSET 0x03 +// USB FRAME_NO +#define USBHS_FRAME_NO_OFFSET 0x04 +// USB SUSPEND +#define USBHS_SUSPEND_OFFSET 0x06 +#define USBHS_DEV_REMOTE_WAKEUP (1 << 2) +#define USBHS_LINESTATE_MASK (2 << 4) /* Read Only */ + +// RESERVED0 + +// USB SPEED TYPE +#define USBHS_SPEED_TYPE_OFFSET 0x08 +#define USBSPEED_MASK (0x03) + +// USB_MIS_ST +#define USBHS_MIS_ST_OFFSET 0x09 +#define USBHS_SPLIT_CAN (1 << 0) +#define USBHS_ATTACH (1 << 1) +#define USBHS_SUSPEND (1 << 2) +#define USBHS_BUS_RESET (1 << 3) +#define USBHS_R_FIFO_RDY (1 << 4) +#define USBHS_SIE_FREE (1 << 5) +#define USBHS_SOF_ACT (1 << 6) +#define USBHS_SOF_PRES (1 << 7) + +// INT_FLAG +#define USBHS_INT_FLAG_OFFSET 0x0A +#define USBHS_BUS_RST_FLAG (1 << 0) +#define USBHS_DETECT_FLAG (1 << 0) +#define USBHS_TRANSFER_FLAG (1 << 1) +#define USBHS_SUSPEND_FLAG (1 << 2) +#define USBHS_HST_SOF_FLAG (1 << 3) +#define USBHS_FIFO_OV_FLAG (1 << 4) +#define USBHS_SETUP_FLAG (1 << 5) +#define USBHS_ISO_ACT_FLAG (1 << 6) + +// INT_ST +#define USBHS_INT_ST_OFFSET 0x0B +#define USBHS_DEV_UIS_IS_NAK (1 << 7) +#define USBHS_DEV_UIS_TOG_OK (1 << 6) +#define MASK_UIS_TOKEN (3 << 4) +#define MASK_UIS_ENDP (0x0F) +#define MASK_UIS_H_RES (0x0F) + +#define USBHS_TOGGLE_OK (0x40) +#define USBHS_HOST_RES (0x0f) + +//USB_RX_LEN +#define USBHS_RX_LEN_OFFSET 0x0C +/******************* DEVICE ******************/ + +//UEP_CONFIG +#define USBHS_UEP_CONFIG_OFFSET 0x10 +#define USBHS_EP0_T_EN (1 << 0) +#define USBHS_EP0_R_EN (1 << 16) + +#define USBHS_EP1_T_EN (1 << 1) +#define USBHS_EP1_R_EN (1 << 17) + +#define USBHS_EP2_T_EN (1 << 2) +#define USBHS_EP2_R_EN (1 << 18) + +#define USBHS_EP3_T_EN (1 << 3) +#define USBHS_EP3_R_EN (1 << 19) + +#define USBHS_EP4_T_EN (1 << 4) +#define USBHS_EP4_R_EN (1 << 20) + +#define USBHS_EP5_T_EN (1 << 5) +#define USBHS_EP5_R_EN (1 << 21) + +#define USBHS_EP6_T_EN (1 << 6) +#define USBHS_EP6_R_EN (1 << 22) + +#define USBHS_EP7_T_EN (1 << 7) +#define USBHS_EP7_R_EN (1 << 23) + +#define USBHS_EP8_T_EN (1 << 8) +#define USBHS_EP8_R_EN (1 << 24) + +#define USBHS_EP9_T_EN (1 << 9) +#define USBHS_EP9_R_EN (1 << 25) + +#define USBHS_EP10_T_EN (1 << 10) +#define USBHS_EP10_R_EN (1 << 26) + +#define USBHS_EP11_T_EN (1 << 11) +#define USBHS_EP11_R_EN (1 << 27) + +#define USBHS_EP12_T_EN (1 << 12) +#define USBHS_EP12_R_EN (1 << 28) + +#define USBHS_EP13_T_EN (1 << 13) +#define USBHS_EP13_R_EN (1 << 29) + +#define USBHS_EP14_T_EN (1 << 14) +#define USBHS_EP14_R_EN (1 << 30) + +#define USBHS_EP15_T_EN (1 << 15) +#define USBHS_EP15_R_EN (1 << 31) + +//UEP_TYPE +#define USBHS_UEP_TYPE_OFFSET 0x14 +#define USBHS_EP0_T_TYP (1 << 0) +#define USBHS_EP0_R_TYP (1 << 16) + +#define USBHS_EP1_T_TYP (1 << 1) +#define USBHS_EP1_R_TYP (1 << 17) + +#define USBHS_EP2_T_TYP (1 << 2) +#define USBHS_EP2_R_TYP (1 << 18) + +#define USBHS_EP3_T_TYP (1 << 3) +#define USBHS_EP3_R_TYP (1 << 19) + +#define USBHS_EP4_T_TYP (1 << 4) +#define USBHS_EP4_R_TYP (1 << 20) + +#define USBHS_EP5_T_TYP (1 << 5) +#define USBHS_EP5_R_TYP (1 << 21) + +#define USBHS_EP6_T_TYP (1 << 6) +#define USBHS_EP6_R_TYP (1 << 22) + +#define USBHS_EP7_T_TYP (1 << 7) +#define USBHS_EP7_R_TYP (1 << 23) + +#define USBHS_EP8_T_TYP (1 << 8) +#define USBHS_EP8_R_TYP (1 << 24) + +#define USBHS_EP9_T_TYP (1 << 8) +#define USBHS_EP9_R_TYP (1 << 25) + +#define USBHS_EP10_T_TYP (1 << 10) +#define USBHS_EP10_R_TYP (1 << 26) + +#define USBHS_EP11_T_TYP (1 << 11) +#define USBHS_EP11_R_TYP (1 << 27) + +#define USBHS_EP12_T_TYP (1 << 12) +#define USBHS_EP12_R_TYP (1 << 28) + +#define USBHS_EP13_T_TYP (1 << 13) +#define USBHS_EP13_R_TYP (1 << 29) + +#define USBHS_EP14_T_TYP (1 << 14) +#define USBHS_EP14_R_TYP (1 << 30) + +#define USBHS_EP15_T_TYP (1 << 15) +#define USBHS_EP15_R_TYP (1 << 31) + +/* BUF_MOD UEP1~15 */ +#define USBHS_BUF_MOD_OFFSET 0x18 +#define USBHS_EP0_BUF_MOD (1 << 0) +#define USBHS_EP0_ISO_BUF_MOD (1 << 16) + +#define USBHS_EP1_BUF_MOD (1 << 1) +#define USBHS_EP1_ISO_BUF_MOD (1 << 17) + +#define USBHS_EP2_BUF_MOD (1 << 2) +#define USBHS_EP2_ISO_BUF_MOD (1 << 18) + +#define USBHS_EP3_BUF_MOD (1 << 3) +#define USBHS_EP3_ISO_BUF_MOD (1 << 19) + +#define USBHS_EP4_BUF_MOD (1 << 4) +#define USBHS_EP4_ISO_BUF_MOD (1 << 20) + +#define USBHS_EP5_BUF_MOD (1 << 5) +#define USBHS_EP5_ISO_BUF_MOD (1 << 21) + +#define USBHS_EP6_BUF_MOD (1 << 6) +#define USBHS_EP6_ISO_BUF_MOD (1 << 22) + +#define USBHS_EP7_BUF_MOD (1 << 7) +#define USBHS_EP7_ISO_BUF_MOD (1 << 23) + +#define USBHS_EP8_BUF_MOD (1 << 8) +#define USBHS_EP8_ISO_BUF_MOD (1 << 24) + +#define USBHS_EP9_BUF_MOD (1 << 9) +#define USBHS_EP9_ISO_BUF_MOD (1 << 25) + +#define USBHS_EP10_BUF_MOD (1 << 10) +#define USBHS_EP10_ISO_BUF_MOD (1 << 26) + +#define USBHS_EP11_BUF_MOD (1 << 11) +#define USBHS_EP11_ISO_BUF_MOD (1 << 27) + +#define USBHS_EP12_BUF_MOD (1 << 12) +#define USBHS_EP12_ISO_BUF_MOD (1 << 28) + +#define USBHS_EP13_BUF_MOD (1 << 13) +#define USBHS_EP13_ISO_BUF_MOD (1 << 29) + +#define USBHS_EP14_BUF_MOD (1 << 14) +#define USBHS_EP14_ISO_BUF_MOD (1 << 30) + +#define USBHS_EP15_BUF_MOD (1 << 15) +#define USBHS_EP15_ISO_BUF_MOD (1 << 31) +//USBHS_EPn_T_EN USBHS_EPn_R_EN USBHS_EPn_BUF_MOD 锟斤拷锟斤拷锟斤拷锟斤拷UEPn_DMA为锟斤拷始锟斤拷址锟缴碉拷锟斤拷锟斤拷锟斤拷锟� +// 0 0 x 锟剿点被锟斤拷锟矫ｏ拷未锟矫碉拷UEPn_*_DMA锟斤拷锟斤拷锟斤拷锟斤拷 +// 1 0 0 锟斤拷锟秸ｏ拷OUT锟斤拷锟斤拷锟斤拷锟斤拷锟阶碉拷址为UEPn_RX_DMA +// 1 0 1 bUEPn_RX_TOG[0]=0,使锟矫伙拷锟斤拷锟斤拷UEPn_RX_DMA锟斤拷bUEPn_RX_TOG[0]=1,使锟矫伙拷锟斤拷锟斤拷UEPn_TX_DMA +// 0 1 0 锟斤拷锟斤拷(IN)锟斤拷锟斤拷锟斤拷锟阶碉拷址为UEPn_TX_DMA锟斤拷 +// 0 1 1 bUEPn_TX_TOG[0]=0,使锟矫伙拷锟斤拷锟斤拷UEPn_TX_DMA锟斤拷bUEPn_TX_TOG[0]=1,使锟矫伙拷锟斤拷锟斤拷UEPn_RX_DMA + +/* USB0_DMA */ +#define USBHS_UEP0_DMA_OFFSET(n) (0x1C) // endpoint 0 DMA buffer address + +/* USBX_RX_DMA */ +#define USBHS_UEPx_RX_DMA_OFFSET(n) (0x1C + 4 * (n)) // endpoint x DMA buffer address + +#define USBHS_UEPx_TX_DMA_OFFSET(n) (0x58 + 4 * (n)) // endpoint x DMA buffer address + +#define USBHS_UEPx_MAX_LEN_OFFSET(n) (0x98 + 4 * (n)) // endpoint x DMA buffer address + +#define USBHS_UEPx_T_LEN_OFFSET(n) (0xD8 + 4 * (n)) // endpoint x DMA buffer address +#define USBHS_UEPx_TX_CTRL_OFFSET(n) (0xD8 + 4 * (n) + 2) // endpoint x DMA buffer address +#define USBHS_UEPx_RX_CTRL_OFFSET(n) (0xD8 + 4 * (n) + 3) // endpoint x DMA buffer address + +// UEPn_T_LEN +#define USBHS_EP_T_LEN_MASK (0x7FF) + +//UEPn_TX_CTRL +#define USBHS_EP_T_RES_MASK (3 << 0) +#define USBHS_EP_T_RES_ACK (0 << 0) +#define USBHS_EP_T_RES_NYET (1 << 0) +#define USBHS_EP_T_RES_NAK (2 << 0) +#define USBHS_EP_T_RES_STALL (3 << 0) + +#define USBHS_EP_T_TOG_MASK (3 << 3) +#define USBHS_EP_T_TOG_0 (0 << 3) +#define USBHS_EP_T_TOG_1 (1 << 3) +#define USBHS_EP_T_TOG_2 (2 << 3) +#define USBHS_EP_T_TOG_M (3 << 3) + +#define USBHS_EP_T_AUTOTOG (1 << 5) + +//UEPn_RX_CTRL +#define USBHS_EP_R_RES_MASK (3 << 0) +#define USBHS_EP_R_RES_ACK (0 << 0) +#define USBHS_EP_R_RES_NYET (1 << 0) +#define USBHS_EP_R_RES_NAK (2 << 0) +#define USBHS_EP_R_RES_STALL (3 << 0) + +#define USBHS_EP_R_TOG_MASK (3 << 3) +#define USBHS_EP_R_TOG_0 (0 << 3) +#define USBHS_EP_R_TOG_1 (1 << 3) +#define USBHS_EP_R_TOG_2 (2 << 3) +#define USBHS_EP_R_TOG_M (3 << 3) + +#define USBHS_EP_R_AUTOTOG (1 << 5) + +#define USBHS_TOG_MATCH (1 << 6) + +/******************* HOST ******************/ +// USB HOST_CTRL +#define USBHS_SEND_BUS_RESET (1 << 0) +#define USBHS_SEND_BUS_SUSPEND (1 << 1) +#define USBHS_SEND_BUS_RESUME (1 << 2) +#define USBHS_REMOTE_WAKE (1 << 3) +#define USBHS_PHY_SUSPENDM (1 << 4) +#define USBHS_UH_SOFT_FREE (1 << 6) +#define USBHS_SEND_SOF_EN (1 << 7) + +//UH_CONFIG +#define USBHS_HOST_TX_EN (1 << 3) +#define USBHS_HOST_RX_EN (1 << 18) + +// HOST_EP_TYPE +#define USBHS_ENDP_TX_ISO (1 << 3) +#define USBHS_ENDP_RX_ISO (1 << (16 + 2)) + +// R32_UH_EP_PID +#define USBHS_HOST_MASK_TOKEN (0x0f) +#define USBHS_HOST_MASK_ENDP (0x0f << 4) + +//R8_UH_RX_CTRL +#define USBHS_EP_R_RES_MASK (3 << 0) +#define USBHS_EP_R_RES_ACK (0 << 0) +#define USBHS_EP_R_RES_NYET (1 << 0) +#define USBHS_EP_R_RES_NAK (2 << 0) +#define USBHS_EP_R_RES_STALL (3 << 0) + +#define USBHS_UH_R_RES_NO (1 << 2) +#define USBHS_UH_R_TOG_1 (1 << 3) +#define USBHS_UH_R_TOG_2 (2 << 3) +#define USBHS_UH_R_TOG_3 (3 << 3) +#define USBHS_UH_R_TOG_AUTO (1 << 5) +#define USBHS_UH_R_DATA_NO (1 << 6) +//R8_UH_TX_CTRL +#define USBHS_UH_T_RES_MASK (3 << 0) +#define USBHS_UH_T_RES_ACK (0 << 0) +#define USBHS_UH_T_RES_NYET (1 << 0) +#define USBHS_UH_T_RES_NAK (2 << 0) +#define USBHS_UH_T_RES_STALL (3 << 0) + +#define USBHS_UH_T_RES_NO (1 << 2) +#define USBHS_UH_T_TOG_1 (1 << 3) +#define USBHS_UH_T_TOG_2 (2 << 3) +#define USBHS_UH_T_TOG_3 (3 << 3) +#define USBHS_UH_T_TOG_AUTO (1 << 5) +#define USBHS_UH_T_DATA_NO (1 << 6) + +// 00: OUT, 01:SOF, 10:IN, 11:SETUP +#define PID_OUT 0 +#define PID_SOF 1 +#define PID_IN 2 +#define PID_SETUP 3 + +#endif diff --git a/src/portable/wch/ch32v307/usb_dc_usbhs.c b/src/portable/wch/ch32v307/usb_dc_usbhs.c new file mode 100644 index 000000000..32645dc5f --- /dev/null +++ b/src/portable/wch/ch32v307/usb_dc_usbhs.c @@ -0,0 +1,388 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022 Greg Davill + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "tusb_option.h" + +#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_CH32VF307) +#include "device/dcd.h" + +#include "usb_ch32_usbhs_reg.h" +#include "core_riscv.h" + +// Max number of bi-directional endpoints including EP0 +#define EP_MAX 16 + +typedef struct { + uint8_t *buffer; + // tu_fifo_t * ff; // TODO support dcd_edpt_xfer_fifo API + uint16_t total_len; + uint16_t queued_len; + uint16_t max_size; + bool short_packet; +} xfer_ctl_t; + +#define XFER_CTL_BASE(_ep, _dir) &xfer_status[_ep][_dir] +static xfer_ctl_t xfer_status[EP_MAX][2]; + +#define EP_TX_LEN(ep) *(volatile uint16_t *)((volatile uint16_t *)&(USBHSD->UEP0_TX_LEN) + (ep)*2) +#define EP_TX_CTRL(ep) *(volatile uint8_t *)((volatile uint8_t *)&(USBHSD->UEP0_TX_CTRL) + (ep)*4) +#define EP_RX_CTRL(ep) *(volatile uint8_t *)((volatile uint8_t *)&(USBHSD->UEP0_RX_CTRL) + (ep)*4) +#define EP_RX_MAX_LEN(ep) *(volatile uint16_t *)((volatile uint16_t *)&(USBHSD->UEP0_MAX_LEN) + (ep)*2) + +#define EP_TX_DMA_ADDR(ep) *(volatile uint32_t *)((volatile uint32_t *)&(USBHSD->UEP1_TX_DMA) + (ep - 1)) +#define EP_RX_DMA_ADDR(ep) *(volatile uint32_t *)((volatile uint32_t *)&(USBHSD->UEP1_RX_DMA) + (ep - 1)) + +/* Endpoint Buffer */ +__attribute__((aligned(4))) uint8_t setup[8]; // ep0(64) +__attribute__((aligned(4))) uint8_t EP0_DatabufHD[64]; // ep0(64) + +volatile uint8_t mps_over_flag = 0; +volatile uint8_t USBHS_Dev_Endp0_Tog = 0x01; + +void dcd_init(uint8_t rhport) { + (void)rhport; + + memset(&xfer_status, 0, sizeof(xfer_status)); + + // usb_dc_low_level_init(); + + USBHSD->HOST_CTRL = 0x00; + USBHSD->HOST_CTRL = USBHS_PHY_SUSPENDM; + + USBHSD->CONTROL = 0; +#if 1 + USBHSD->CONTROL = USBHS_DMA_EN | USBHS_INT_BUSY_EN | USBHS_HIGH_SPEED; +#else + USBHSD->CONTROL = USBHS_DMA_EN | USBHS_INT_BUSY_EN | USBHS_FULL_SPEED; +#endif + + USBHSD->INT_EN = 0; + USBHSD->INT_EN = USBHS_SETUP_ACT_EN | USBHS_TRANSFER_EN | USBHS_DETECT_EN | USBHS_SUSPEND_EN; + + /* ALL endpoint enable */ + USBHSD->ENDP_CONFIG = 0xffffffff; + + USBHSD->ENDP_CONFIG = USBHS_EP0_T_EN | USBHS_EP0_R_EN; + USBHSD->ENDP_TYPE = 0x00; + USBHSD->BUF_MODE = 0x00; + + USBHSD->UEP0_MAX_LEN = 64; + + USBHSD->UEP0_DMA = (uint32_t)EP0_DatabufHD; + + USBHSD->UEP0_TX_LEN = 0; + USBHSD->UEP0_TX_CTRL = USBHS_EP_T_RES_NAK; + USBHSD->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK; + + for (int ep = 1; ep < EP_MAX; ep++) { + EP_TX_LEN(ep) = 0; + EP_TX_CTRL(ep) = USBHS_EP_T_AUTOTOG | USBHS_EP_T_RES_NAK; + EP_RX_CTRL(ep) = USBHS_EP_R_AUTOTOG | USBHS_EP_R_RES_NAK; + + EP_RX_MAX_LEN(ep) = 512; + } + + USBHSD->DEV_AD = 0; + USBHSD->CONTROL |= USBHS_DEV_PU_EN; +} + +void dcd_int_enable(uint8_t rhport) { + (void)rhport; + + NVIC_EnableIRQ(USBHS_IRQn); +} + +void dcd_int_disable(uint8_t rhport) { + (void)rhport; + + NVIC_DisableIRQ(USBHS_IRQn); +} + +void dcd_edpt_close_all(uint8_t rhport) { + (void)rhport; +} + +void dcd_set_address(uint8_t rhport, uint8_t dev_addr) { + (void)dev_addr; + + // Response with zlp status + dcd_edpt_xfer(rhport, 0x80, NULL, 0); +} + +void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const *request) { + (void)rhport; + + if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE && + request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD && + request->bRequest == TUSB_REQ_SET_ADDRESS) { + USBHSD->DEV_AD = (uint8_t)request->wValue; + } + + EP_TX_CTRL(0) = USBHS_EP_T_RES_NAK; + EP_RX_CTRL(0) = USBHS_EP_R_RES_ACK; +} + +bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_edpt) { + (void)rhport; + + uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress); + uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress); + + TU_ASSERT(epnum < EP_MAX); + + xfer_ctl_t *xfer = XFER_CTL_BASE(epnum, dir); + xfer->max_size = tu_edpt_packet_size(desc_edpt); + + if (epnum != 0) { + if (tu_edpt_dir(desc_edpt->bEndpointAddress) == TUSB_DIR_OUT) { + EP_RX_CTRL(epnum) = USBHS_EP_R_AUTOTOG | USBHS_EP_R_RES_ACK; + } else { + EP_TX_LEN(epnum) = 0; + EP_TX_CTRL(epnum) = USBHS_EP_T_AUTOTOG | USBHS_EP_T_RES_NAK | USBHS_EP_T_TOG_0; + } + } + + return true; +} + +int usbd_ep_close(const uint8_t ep) { + (void)ep; + + return 0; +} +void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) { + (void)rhport; + + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); + + if (epnum == 0) { + if (dir == TUSB_DIR_OUT) { + USBHSD->UEP0_RX_CTRL = USBHS_EP_R_RES_STALL; + } else { + USBHSD->UEP0_TX_LEN = 0; + USBHSD->UEP0_TX_CTRL = USBHS_EP_T_RES_STALL; + } + } else { + if (dir == TUSB_DIR_OUT) { + EP_RX_CTRL(epnum) = (EP_RX_CTRL(epnum) & ~USBHS_EP_R_RES_MASK) | USBHS_EP_R_RES_STALL; + + } else { + EP_TX_CTRL(epnum) = (EP_TX_CTRL(epnum) & ~USBHS_EP_T_RES_MASK) | USBHS_EP_T_RES_STALL; + } + } +} + +void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { + (void)rhport; + + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); + + if (epnum == 0) { + if (dir == TUSB_DIR_OUT) { + USBHSD->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK; + } else { + } + } else { + if (dir == TUSB_DIR_OUT) { + EP_RX_CTRL(epnum) = (EP_RX_CTRL(epnum) & ~(USBHS_EP_R_RES_MASK | USBHS_EP_T_TOG_MASK)) | USBHS_EP_T_RES_ACK; + + } else { + EP_TX_CTRL(epnum) = (EP_TX_CTRL(epnum) & ~(USBHS_EP_T_RES_MASK | USBHS_EP_T_TOG_MASK)) | USBHS_EP_T_RES_NAK; + } + } +} + +bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes) { + (void)rhport; + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); + + xfer_ctl_t *xfer = XFER_CTL_BASE(epnum, dir); + xfer->buffer = buffer; + // xfer->ff = NULL; // TODO support dcd_edpt_xfer_fifo API + xfer->total_len = total_bytes; + xfer->queued_len = 0; + xfer->short_packet = false; + + // uint16_t num_packets = (total_bytes / xfer->max_size); + uint16_t short_packet_size = total_bytes % (xfer->max_size + 1); + + // Zero-size packet is special case. + if (short_packet_size == 0 || (total_bytes == 0)) { + xfer->short_packet = true; + } + + if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) { + if (!total_bytes) { + xfer->short_packet = true; + if (epnum == 0) { + USBHSD->UEP0_TX_LEN = 0; + USBHSD->UEP0_TX_CTRL = USBHS_EP_T_RES_ACK | (USBHS_Dev_Endp0_Tog ? USBHS_EP_T_TOG_1 : USBHS_EP_T_TOG_0); + USBHS_Dev_Endp0_Tog ^= 1; + } else { + EP_TX_LEN(epnum) = 0; + EP_TX_CTRL(epnum) = (EP_TX_CTRL(epnum) & ~(USBHS_EP_T_RES_MASK)) | USBHS_EP_T_RES_ACK; + } + } else { + if (epnum == 0) { + xfer->queued_len += short_packet_size; + memcpy(&EP0_DatabufHD[0], buffer, short_packet_size); + + USBHSD->UEP0_TX_LEN = short_packet_size; + USBHSD->UEP0_TX_CTRL = USBHS_EP_T_RES_ACK | (USBHS_Dev_Endp0_Tog ? USBHS_EP_T_TOG_1 : USBHS_EP_T_TOG_0); + USBHS_Dev_Endp0_Tog ^= 1; + } else { + xfer->queued_len += short_packet_size; + + EP_TX_DMA_ADDR(epnum) = (uint32_t)buffer; + USBHSD->ENDP_CONFIG |= (USBHS_EP0_T_EN << epnum); + EP_TX_LEN(epnum) = short_packet_size; + EP_TX_CTRL(epnum) = (EP_TX_CTRL(epnum) & ~(USBHS_EP_T_RES_MASK)) | USBHS_EP_T_RES_ACK; + } + } + } else { /* TUSB_DIR_OUT */ + if (epnum == 0) { + uint32_t read_count = USBHSD->RX_LEN; + read_count = TU_MIN(read_count, total_bytes); + + if ((total_bytes == 8)) { + read_count = 8; + memcpy(buffer, &EP0_DatabufHD[0], 8); + } else { + memcpy(buffer, &EP0_DatabufHD[0], read_count); + } + } else { + EP_RX_DMA_ADDR(epnum) = (uint32_t)xfer->buffer; + USBHSD->ENDP_CONFIG |= (USBHS_EP0_R_EN << epnum); + } + + // usbd_ep_read(ep_addr, buffer, total_bytes, &ret_bytes); + } + return true; +} + + +static void receive_packet(xfer_ctl_t *xfer, uint16_t xfer_size) { + // xfer->queued_len = xfer->total_len - remaining; + + uint16_t remaining = xfer->total_len - xfer->queued_len; + uint16_t to_recv_size; + + if (remaining <= xfer->max_size) { + // Avoid buffer overflow. + to_recv_size = (xfer_size > remaining) ? remaining : xfer_size; + } else { + // Room for full packet, choose recv_size based on what the microcontroller + // claims. + to_recv_size = (xfer_size > xfer->max_size) ? xfer->max_size : xfer_size; + } + + if (to_recv_size) { + } + + xfer->queued_len += xfer_size; + + // Per USB spec, a short OUT packet (including length 0) is always + // indicative of the end of a transfer (at least for ctl, bulk, int). + xfer->short_packet = (xfer_size < xfer->max_size); +} + +void dcd_int_handler(uint8_t rhport) { + (void)rhport; + + uint32_t end_num, rx_token; + uint8_t intflag = 0; + + intflag = USBHSD->INT_FG; + + if (intflag & USBHS_TRANSFER_FLAG) { + + end_num = (USBHSD->INT_ST) & MASK_UIS_ENDP; + rx_token = (((USBHSD->INT_ST) & MASK_UIS_TOKEN) >> 4) & 0x03; + + uint8_t endp = end_num | (rx_token == PID_IN ? TUSB_DIR_IN_MASK : 0); + + xfer_ctl_t *xfer = XFER_CTL_BASE(end_num, tu_edpt_dir(endp)); + + if (rx_token == PID_OUT) { + uint16_t rx_len = USBHSD->RX_LEN; + + receive_packet(xfer, rx_len); + + if (xfer->short_packet || (xfer->queued_len == xfer->total_len)) { + xfer->short_packet = false; + + dcd_event_xfer_complete(0, endp, xfer->queued_len, XFER_RESULT_SUCCESS, true); + } + + if (end_num == 0) { + USBHSD->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK | USBHS_EP_R_TOG_0; + } + + } else if (rx_token == PID_IN) { + if (xfer->short_packet || (xfer->queued_len == xfer->total_len)) { + xfer->short_packet = false; + xfer->total_len = 0; + dcd_event_xfer_complete(0, endp, xfer->queued_len, XFER_RESULT_SUCCESS, true); + + EP_TX_CTRL(end_num) = (EP_TX_CTRL(end_num) & ~(USBHS_EP_T_RES_MASK)) | USBHS_EP_T_RES_NAK; + + if (end_num == 0) { + } + } else { + dcd_edpt_xfer(0, endp, xfer->buffer + xfer->queued_len, xfer->total_len - xfer->queued_len); + } + } + + USBHSD->INT_FG = USBHS_TRANSFER_FLAG; /* Clear flag */ + } else if (intflag & USBHS_SETUP_FLAG) { + USBHS_Dev_Endp0_Tog = 1; + dcd_event_setup_received(0, EP0_DatabufHD, true); + + USBHSD->INT_FG = USBHS_SETUP_FLAG; /* Clear flag */ + } else if (intflag & USBHS_DETECT_FLAG) { + USBHS_Dev_Endp0_Tog = 1; + + xfer_status[0][TUSB_DIR_OUT].max_size = 64; + xfer_status[0][TUSB_DIR_IN].max_size = 64; + + dcd_event_bus_reset(0, TUSB_SPEED_HIGH, true); + + USBHSD->DEV_AD = 0; + USBHSD->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK | USBHS_EP_R_TOG_0; + + USBHSD->INT_FG = USBHS_DETECT_FLAG; /* Clear flag */ + } else if (intflag & USBHS_SUSPEND_FLAG) { + dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_SUSPEND }; + dcd_event_handler(&event, true); + + USBHSD->INT_FG = USBHS_SUSPEND_FLAG; /* Clear flag */ + } +} + +#endif \ No newline at end of file diff --git a/src/tusb_option.h b/src/tusb_option.h index bd87a953c..ffeec2241 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -149,6 +149,9 @@ // Allwinner #define OPT_MCU_F1C100S 2100 ///< Allwinner F1C100s family +// WCH +#define OPT_MCU_CH32VF307 2200 ///< WCH CH32V307 config + // Helper to check if configured MCU is one of listed // Apply _TU_CHECK_MCU with || as separator to list of input #define _TU_CHECK_MCU(_m) (CFG_TUSB_MCU == _m) -- cgit v1.3.1 From a09c1648f56580bcdb59b08af255442d9240281c Mon Sep 17 00:00:00 2001 From: Greg Davill Date: Tue, 22 Mar 2022 23:31:20 +1030 Subject: Fix typo --- hw/bsp/ch32v307/family.mk | 2 +- src/common/tusb_mcu.h | 2 +- src/portable/wch/ch32v307/usb_dc_usbhs.c | 2 +- src/tusb_option.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/common') diff --git a/hw/bsp/ch32v307/family.mk b/hw/bsp/ch32v307/family.mk index dfb4853d9..ef2af26e6 100644 --- a/hw/bsp/ch32v307/family.mk +++ b/hw/bsp/ch32v307/family.mk @@ -28,7 +28,7 @@ CFLAGS += \ -ffunction-sections \ -fdata-sections \ -nostdlib -nostartfiles \ - -DCFG_TUSB_MCU=OPT_MCU_CH32VF307 \ + -DCFG_TUSB_MCU=OPT_MCU_CH32V307 \ -Xlinker --gc-sections \ -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 84d629eac..9de092e34 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -267,7 +267,7 @@ #define TUP_DCD_ENDPOINT_MAX 4 //------------- WCH -------------// -#elif TU_CHECK_MCU(OPT_MCU_CH32VF307) +#elif TU_CHECK_MCU(OPT_MCU_CH32V307) #define TUP_DCD_ENDPOINT_MAX 8 #endif diff --git a/src/portable/wch/ch32v307/usb_dc_usbhs.c b/src/portable/wch/ch32v307/usb_dc_usbhs.c index 32645dc5f..3a2c9979e 100644 --- a/src/portable/wch/ch32v307/usb_dc_usbhs.c +++ b/src/portable/wch/ch32v307/usb_dc_usbhs.c @@ -26,7 +26,7 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_CH32VF307) +#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_CH32V307) #include "device/dcd.h" #include "usb_ch32_usbhs_reg.h" diff --git a/src/tusb_option.h b/src/tusb_option.h index ffeec2241..28bf8a60d 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -150,7 +150,7 @@ #define OPT_MCU_F1C100S 2100 ///< Allwinner F1C100s family // WCH -#define OPT_MCU_CH32VF307 2200 ///< WCH CH32V307 config +#define OPT_MCU_CH32V307 2200 ///< WCH CH32V307 config // Helper to check if configured MCU is one of listed // Apply _TU_CHECK_MCU with || as separator to list of input -- cgit v1.3.1 From cdb8a1a2a1dd863f35fd91d58c18ec83115f9326 Mon Sep 17 00:00:00 2001 From: Greg Davill Date: Wed, 23 Mar 2022 00:00:06 +1030 Subject: Clean up driver --- src/common/tusb_mcu.h | 2 +- src/portable/wch/ch32v307/usb_dc_usbhs.c | 10 ++++------ 2 files changed, 5 insertions(+), 7 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 9de092e34..fb0cdd361 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -268,7 +268,7 @@ //------------- WCH -------------// #elif TU_CHECK_MCU(OPT_MCU_CH32V307) - #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 16 #endif diff --git a/src/portable/wch/ch32v307/usb_dc_usbhs.c b/src/portable/wch/ch32v307/usb_dc_usbhs.c index 3a2c9979e..e647389ee 100644 --- a/src/portable/wch/ch32v307/usb_dc_usbhs.c +++ b/src/portable/wch/ch32v307/usb_dc_usbhs.c @@ -56,10 +56,8 @@ static xfer_ctl_t xfer_status[EP_MAX][2]; #define EP_RX_DMA_ADDR(ep) *(volatile uint32_t *)((volatile uint32_t *)&(USBHSD->UEP1_RX_DMA) + (ep - 1)) /* Endpoint Buffer */ -__attribute__((aligned(4))) uint8_t setup[8]; // ep0(64) -__attribute__((aligned(4))) uint8_t EP0_DatabufHD[64]; // ep0(64) +TU_ATTR_ALIGNED(4) uint8_t EP0_DatabufHD[64]; // ep0(64) -volatile uint8_t mps_over_flag = 0; volatile uint8_t USBHS_Dev_Endp0_Tog = 0x01; void dcd_init(uint8_t rhport) { @@ -67,15 +65,15 @@ void dcd_init(uint8_t rhport) { memset(&xfer_status, 0, sizeof(xfer_status)); - // usb_dc_low_level_init(); - USBHSD->HOST_CTRL = 0x00; USBHSD->HOST_CTRL = USBHS_PHY_SUSPENDM; USBHSD->CONTROL = 0; -#if 1 + +#if (BOARD_DEVICE_RHPORT_SPEED == OPT_MODE_HIGH_SPEED) USBHSD->CONTROL = USBHS_DMA_EN | USBHS_INT_BUSY_EN | USBHS_HIGH_SPEED; #else + #error OPT_MODE_FULL_SPEED not currently supported on CH32V307 USBHSD->CONTROL = USBHS_DMA_EN | USBHS_INT_BUSY_EN | USBHS_FULL_SPEED; #endif -- cgit v1.3.1 From 16c13bc110fb0959e704b417706dd303afc69981 Mon Sep 17 00:00:00 2001 From: Skyler Mansfield Date: Sun, 17 Apr 2022 01:16:49 +0100 Subject: tusb_types: Added descriptive strings for edpt_dir and edpt_type --- src/common/tusb_types.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'src/common') diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index e2fa17532..7eab396ef 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -513,6 +513,16 @@ static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) return tu_le16toh(desc_ep->wMaxPacketSize) & TU_GENMASK(10, 0); } +static inline const char *tu_edpt_dir_str(tusb_dir_t dir) { + static const char *str[] = {"out", "in"}; + return str[dir]; +} + +static inline const char *tu_edpt_type_str(tusb_xfer_type_t t) { + static const char *str[] = {"control", "isochronous", "bulk", "interrupt"}; + return str[t]; +} + //--------------------------------------------------------------------+ // Descriptor helper //--------------------------------------------------------------------+ -- cgit v1.3.1 From b034c18077ef1350f2678f245ed1b885e9be79fc Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 20 Apr 2022 18:29:41 +0700 Subject: add tud_task_ext(), tuh_task_ext() as exteneded version that take timeout and in_isr also allow exit tud_task,tuh_task after processing all events for running other background task for user --- examples/device/cdc_msc_freertos/src/main.c | 3 +++ src/common/tusb_verify.h | 10 +++++----- src/device/usbd.c | 11 +++++++++-- src/device/usbd.h | 11 ++++++++++- src/host/usbh.c | 11 +++++++++-- src/host/usbh.h | 19 ++++++++++++++----- 6 files changed, 50 insertions(+), 15 deletions(-) (limited to 'src/common') diff --git a/examples/device/cdc_msc_freertos/src/main.c b/examples/device/cdc_msc_freertos/src/main.c index c0fc722f4..0d40782ef 100644 --- a/examples/device/cdc_msc_freertos/src/main.c +++ b/examples/device/cdc_msc_freertos/src/main.c @@ -198,6 +198,9 @@ void cdc_task(void* params) tud_cdc_write(buf, count); } } + + // For ESP32-Sx this delay is essential to allow idle how to run and reset watchdog + vTaskDelay(1); } } diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index f4a08ce2f..568bac8cc 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -99,8 +99,8 @@ *------------------------------------------------------------------*/ // Helper to implement optional parameter for TU_VERIFY Macro family -#define GET_3RD_ARG(arg1, arg2, arg3, ...) arg3 -#define GET_4TH_ARG(arg1, arg2, arg3, arg4, ...) arg4 +#define _GET_3RD_ARG(arg1, arg2, arg3, ...) arg3 +#define _GET_4TH_ARG(arg1, arg2, arg3, arg4, ...) arg4 /*------------- Generator for TU_VERIFY and TU_VERIFY_HDLR -------------*/ #define TU_VERIFY_DEFINE(_cond, _handler, _ret) do \ @@ -116,7 +116,7 @@ #define TU_VERIFY_1ARGS(_cond) TU_VERIFY_DEFINE(_cond, , false) #define TU_VERIFY_2ARGS(_cond, _ret) TU_VERIFY_DEFINE(_cond, , _ret) -#define TU_VERIFY(...) GET_3RD_ARG(__VA_ARGS__, TU_VERIFY_2ARGS, TU_VERIFY_1ARGS, UNUSED)(__VA_ARGS__) +#define TU_VERIFY(...) _GET_3RD_ARG(__VA_ARGS__, TU_VERIFY_2ARGS, TU_VERIFY_1ARGS, UNUSED)(__VA_ARGS__) /*------------------------------------------------------------------*/ @@ -127,7 +127,7 @@ #define TU_VERIFY_HDLR_2ARGS(_cond, _handler) TU_VERIFY_DEFINE(_cond, _handler, false) #define TU_VERIFY_HDLR_3ARGS(_cond, _handler, _ret) TU_VERIFY_DEFINE(_cond, _handler, _ret) -#define TU_VERIFY_HDLR(...) GET_4TH_ARG(__VA_ARGS__, TU_VERIFY_HDLR_3ARGS, TU_VERIFY_HDLR_2ARGS,UNUSED)(__VA_ARGS__) +#define TU_VERIFY_HDLR(...) _GET_4TH_ARG(__VA_ARGS__, TU_VERIFY_HDLR_3ARGS, TU_VERIFY_HDLR_2ARGS,UNUSED)(__VA_ARGS__) /*------------------------------------------------------------------*/ /* ASSERT @@ -139,7 +139,7 @@ #define ASSERT_2ARGS(_cond, _ret) TU_VERIFY_DEFINE(_cond, _MESS_FAILED(); TU_BREAKPOINT(), _ret) #ifndef TU_ASSERT -#define TU_ASSERT(...) GET_3RD_ARG(__VA_ARGS__, ASSERT_2ARGS, ASSERT_1ARGS,UNUSED)(__VA_ARGS__) +#define TU_ASSERT(...) _GET_3RD_ARG(__VA_ARGS__, ASSERT_2ARGS, ASSERT_1ARGS,UNUSED)(__VA_ARGS__) #endif /*------------------------------------------------------------------*/ diff --git a/src/device/usbd.c b/src/device/usbd.c index 36b9c7cff..167a053e2 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -466,8 +466,10 @@ bool tud_task_event_ready(void) } @endcode */ -void tud_task (void) +void tud_task_ext(uint32_t timeout_ms, bool in_isr) { + (void) in_isr; // not implemented yet + // Skip if stack is not initialized if ( !tusb_inited() ) return; @@ -475,7 +477,7 @@ void tud_task (void) while (1) { dcd_event_t event; - if ( !osal_queue_receive(_usbd_q, &event, 1) ) return; + if ( !osal_queue_receive(_usbd_q, &event, timeout_ms) ) return; #if CFG_TUSB_DEBUG >= 2 if (event.event_id == DCD_EVENT_SETUP_RECEIVED) TU_LOG2("\r\n"); // extra line for setup @@ -592,6 +594,11 @@ void tud_task (void) TU_BREAKPOINT(); break; } + +#if CFG_TUSB_OS != OPT_OS_NONE && CFG_TUSB_OS != OPT_OS_PICO + // return if there is no more events, for application to run other background + if (osal_queue_empty(_usbd_q)) return; +#endif } } diff --git a/src/device/usbd.h b/src/device/usbd.h index b2bf8ba9d..30373abb9 100644 --- a/src/device/usbd.h +++ b/src/device/usbd.h @@ -43,8 +43,17 @@ bool tud_init (uint8_t rhport); // Check if device stack is already initialized bool tud_inited(void); +// Task function should be called in main/rtos loop, extended version of tud_task() +// - timeout_ms: millisecond to wait, zero = no wait, 0xFFFFFFFF = wait forever +// - in_isr: if function is called in ISR +void tud_task_ext(uint32_t timeout_ms, bool in_isr); + // Task function should be called in main/rtos loop -void tud_task (void); +TU_ATTR_ALWAYS_INLINE static inline +void tud_task (void) +{ + tud_task_ext(OSAL_TIMEOUT_WAIT_FOREVER, false); +} // Check if there is pending events need proccessing by tud_task() bool tud_task_event_ready(void); diff --git a/src/host/usbh.c b/src/host/usbh.c index ad90a1b1b..80d176142 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -392,8 +392,10 @@ bool tuh_init(uint8_t rhport) } @endcode */ -void tuh_task(void) +void tuh_task_ext(uint32_t timeout_ms, bool in_isr) { + (void) in_isr; // not implemented yet + // Skip if stack is not initialized if ( !tusb_inited() ) return; @@ -401,7 +403,7 @@ void tuh_task(void) while (1) { hcd_event_t event; - if ( !osal_queue_receive(_usbh_q, &event, 1) ) return; + if ( !osal_queue_receive(_usbh_q, &event, timeout_ms) ) return; switch (event.event_id) { @@ -497,6 +499,11 @@ void tuh_task(void) default: break; } + +#if CFG_TUSB_OS != OPT_OS_NONE && CFG_TUSB_OS != OPT_OS_PICO + // return if there is no more events, for application to run other background + if (osal_queue_empty(_usbh_q)) return; +#endif } } diff --git a/src/host/usbh.h b/src/host/usbh.h index e883ac90b..1580717fd 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -91,8 +91,17 @@ bool tuh_init(uint8_t rhport); // Check if host stack is already initialized bool tuh_inited(void); +// Task function should be called in main/rtos loop, extended version of tuh_task() +// - timeout_ms: millisecond to wait, zero = no wait, 0xFFFFFFFF = wait forever +// - in_isr: if function is called in ISR +void tuh_task_ext(uint32_t timeout_ms, bool in_isr); + // Task function should be called in main/rtos loop -void tuh_task(void); +TU_ATTR_ALWAYS_INLINE static inline +void tuh_task(void) +{ + tuh_task_ext(OSAL_TIMEOUT_WAIT_FOREVER, false); +} // Interrupt handler, name alias to HCD extern void hcd_int_handler(uint8_t rhport); @@ -106,8 +115,8 @@ tusb_speed_t tuh_speed_get(uint8_t daddr); bool tuh_mounted(uint8_t daddr); // Check if device is suspended -TU_ATTR_ALWAYS_INLINE -static inline bool tuh_suspended(uint8_t daddr) +TU_ATTR_ALWAYS_INLINE static inline +bool tuh_suspended(uint8_t daddr) { // TODO implement suspend & resume on host (void) daddr; @@ -115,8 +124,8 @@ static inline bool tuh_suspended(uint8_t daddr) } // Check if device is ready to communicate with -TU_ATTR_ALWAYS_INLINE -static inline bool tuh_ready(uint8_t daddr) +TU_ATTR_ALWAYS_INLINE static inline +bool tuh_ready(uint8_t daddr) { return tuh_mounted(daddr) && !tuh_suspended(daddr); } -- cgit v1.3.1 From 12debd7763bfc6f55566e5f4f8c982a55f206815 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 22 Apr 2022 01:06:17 +0700 Subject: keep up with pio usb --- hw/bsp/rp2040/family.cmake | 1 - lib/Pico-PIO-USB | 2 +- src/common/tusb_debug.h | 4 ++++ src/portable/raspberrypi/pio_usb/dcd_pio_usb.c | 10 +++++----- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 4 ++-- 5 files changed, 12 insertions(+), 9 deletions(-) (limited to 'src/common') diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index d872c35ea..70e18293f 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -32,7 +32,6 @@ if (NOT TARGET _rp2040_family_inclusion_marker) ${TOP}/lib/Pico-PIO-USB/pio_usb.c ${TOP}/lib/Pico-PIO-USB/pio_usb_host.c ${TOP}/lib/Pico-PIO-USB/pio_usb_device.c - ${TOP}/lib/Pico-PIO-USB/pio_usb_hw.c ${TOP}/lib/Pico-PIO-USB/usb_crc.c ) diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index d15fffd95..f656d703f 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit d15fffd950018c60cba5c98d676a4fafaeea2648 +Subproject commit f656d703f3cee1e589eebb6606e204f59afb5611 diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index 647e8a8db..1ea2c19f5 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -65,6 +65,7 @@ static inline void tu_print_var(uint8_t const* buf, uint32_t bufsize) // Log with Level #define TU_LOG(n, ...) TU_XSTRCAT(TU_LOG, n)(__VA_ARGS__) #define TU_LOG_MEM(n, ...) TU_XSTRCAT3(TU_LOG, n, _MEM)(__VA_ARGS__) +#define TU_LOG_ARR(n, ...) TU_XSTRCAT3(TU_LOG, n, _ARR)(__VA_ARGS__) #define TU_LOG_VAR(n, ...) TU_XSTRCAT3(TU_LOG, n, _VAR)(__VA_ARGS__) #define TU_LOG_INT(n, ...) TU_XSTRCAT3(TU_LOG, n, _INT)(__VA_ARGS__) #define TU_LOG_HEX(n, ...) TU_XSTRCAT3(TU_LOG, n, _HEX)(__VA_ARGS__) @@ -74,6 +75,7 @@ static inline void tu_print_var(uint8_t const* buf, uint32_t bufsize) // Log Level 1: Error #define TU_LOG1 tu_printf #define TU_LOG1_MEM tu_print_mem +#define TU_LOG1_ARR(_x, _n) tu_print_var((uint8_t const*)(_x), _n) #define TU_LOG1_VAR(_x) tu_print_var((uint8_t const*)(_x), sizeof(*(_x))) #define TU_LOG1_INT(_x) tu_printf(#_x " = %ld\r\n", (unsigned long) (_x) ) #define TU_LOG1_HEX(_x) tu_printf(#_x " = %lX\r\n", (unsigned long) (_x) ) @@ -82,6 +84,7 @@ static inline void tu_print_var(uint8_t const* buf, uint32_t bufsize) #if CFG_TUSB_DEBUG >= 2 #define TU_LOG2 TU_LOG1 #define TU_LOG2_MEM TU_LOG1_MEM + #define TU_LOG2_ARR TU_LOG1_ARR #define TU_LOG2_VAR TU_LOG1_VAR #define TU_LOG2_INT TU_LOG1_INT #define TU_LOG2_HEX TU_LOG1_HEX @@ -91,6 +94,7 @@ static inline void tu_print_var(uint8_t const* buf, uint32_t bufsize) #if CFG_TUSB_DEBUG >= 3 #define TU_LOG3 TU_LOG1 #define TU_LOG3_MEM TU_LOG1_MEM + #define TU_LOG3_ARR TU_LOG1_ARR #define TU_LOG3_VAR TU_LOG1_VAR #define TU_LOG3_INT TU_LOG1_INT #define TU_LOG3_HEX TU_LOG1_HEX diff --git a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c index 38867ea1c..1cb850654 100644 --- a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c @@ -119,8 +119,8 @@ void dcd_edpt_close_all (uint8_t rhport) bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) { (void) rhport; - pio_hw_endpoint_t *ep = pio_usb_device_get_ep(ep_addr); - return pio_usb_endpoint_transfer(ep, buffer, total_bytes); + endpoint_t *ep = pio_usb_device_get_ep(ep_addr); + return pio_usb_ll_endpoint_transfer(ep, buffer, total_bytes); } // Submit a transfer where is managed by FIFO, When complete dcd_event_xfer_complete() is invoked to notify the stack - optional, however, must be listed in usbd.c @@ -137,7 +137,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; - pio_hw_endpoint_t *ep = pio_usb_device_get_ep(ep_addr); + endpoint_t *ep = pio_usb_device_get_ep(ep_addr); ep->stalled = true; } @@ -145,7 +145,7 @@ void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; - pio_hw_endpoint_t *ep = pio_usb_device_get_ep(ep_addr); + endpoint_t *ep = pio_usb_device_get_ep(ep_addr); ep->data_id = 0; ep->stalled = false; } @@ -188,7 +188,7 @@ static void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_ if (ep_all & mask) { - pio_hw_endpoint_t* ep = PIO_USB_HW_EP(ep_idx); + endpoint_t* ep = PIO_USB_HW_EP(ep_idx); uint8_t const tu_rhport = port - PIO_USB_HW_RPORT(0) + 1; dcd_event_xfer_complete(tu_rhport, ep->ep_num, ep->actual_len, result, true); } diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index e311f16d0..2615b2356 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -73,7 +73,7 @@ bool hcd_port_connect_status(uint8_t rhport) rhport = RHPORT_PIO(rhport); pio_hw_root_port_t *root = PIO_USB_HW_RPORT(rhport); - port_pin_status_t line_state = pio_hw_get_line_state(root); + port_pin_status_t line_state = pio_usb_ll_get_line_state(root); return line_state != PORT_PIN_SE0; } @@ -187,7 +187,7 @@ static void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_ if (ep_all & mask) { - pio_hw_endpoint_t* ep = PIO_USB_HW_EP(ep_idx); + endpoint_t* ep = PIO_USB_HW_EP(ep_idx); hcd_event_xfer_complete(ep->dev_addr, ep->ep_num, ep->actual_len, result, true); } } -- cgit v1.3.1 From 4a661dead0899cb154325a8257d19281f2536af3 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 27 Apr 2022 17:57:52 +0700 Subject: add TU_ATTR_FAST_FUNC for rp2040 __not_in_flash() section --- examples/device/hid_boot_interface/src/main.c | 2 -- hw/bsp/rp2040/family.cmake | 2 +- src/common/tusb_mcu.h | 7 +++++++ src/device/usbd.c | 3 ++- 4 files changed, 10 insertions(+), 4 deletions(-) (limited to 'src/common') diff --git a/examples/device/hid_boot_interface/src/main.c b/examples/device/hid_boot_interface/src/main.c index 031b17a2e..e5e2f6856 100644 --- a/examples/device/hid_boot_interface/src/main.c +++ b/examples/device/hid_boot_interface/src/main.c @@ -31,8 +31,6 @@ #include "tusb.h" #include "usb_descriptors.h" -#include "pio_usb.h" - //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF PROTYPES //--------------------------------------------------------------------+ diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index 70e18293f..bb146d085 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -47,7 +47,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker) hardware_irq hardware_resets pico_sync - # for usb-pio + # for usb-pio hardware_dma hardware_pio pico_multicore diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 8eb4ad475..c1cf2a810 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -228,6 +228,8 @@ #elif TU_CHECK_MCU(OPT_MCU_RP2040) #define TUP_DCD_ENDPOINT_MAX 16 + #define TU_ATTR_FAST_FUNC __attribute__((section(".time_critical.tinyusb"))) + //------------- Silabs -------------// #elif TU_CHECK_MCU(OPT_MCU_EFM32GG) #define TUP_USBIP_DWC2 @@ -282,4 +284,9 @@ #define TUP_RHPORT_HIGHSPEED 0x00 #endif +// fast function, normally mean placing function in SRAM +#ifndef TU_ATTR_FAST_FUNC + #define TU_ATTR_FAST_FUNC +#endif + #endif diff --git a/src/device/usbd.c b/src/device/usbd.c index 12b4071af..4c2cd3abd 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -1071,7 +1071,8 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const //--------------------------------------------------------------------+ // DCD Event Handler //--------------------------------------------------------------------+ -void __no_inline_not_in_flash_func(dcd_event_handler)(dcd_event_t const * event, bool in_isr) +TU_ATTR_FAST_FUNC +void dcd_event_handler(dcd_event_t const * event, bool in_isr) { switch (event->event_id) { -- cgit v1.3.1 From ae5490e5a5cd8650a45578b4ac70dbe89b002fb1 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 27 Apr 2022 20:52:56 +0700 Subject: clean up --- examples/device/hid_boot_interface/src/tusb_config.h | 6 ++---- examples/host/cdc_msc_hid/src/tusb_config.h | 7 +++---- src/common/tusb_debug.h | 6 +++--- src/device/usbd.c | 2 +- src/host/usbh.c | 6 +++--- src/portable/raspberrypi/pio_usb/dcd_pio_usb.c | 1 - src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 1 - 7 files changed, 12 insertions(+), 17 deletions(-) (limited to 'src/common') diff --git a/examples/device/hid_boot_interface/src/tusb_config.h b/examples/device/hid_boot_interface/src/tusb_config.h index c8bb8a807..8bc85b722 100644 --- a/examples/device/hid_boot_interface/src/tusb_config.h +++ b/examples/device/hid_boot_interface/src/tusb_config.h @@ -40,10 +40,8 @@ #endif // Use raspberry pio-usb for device -#define CFG_TUD_RPI_PIO_USB 1 -#if CFG_TUD_RPI_PIO_USB -#define BOARD_DEVICE_RHPORT_NUM 1 -#endif +// #define CFG_TUD_RPI_PIO_USB 1 +// #define BOARD_DEVICE_RHPORT_NUM 1 // RHPort number used for device can be defined by board.mk, default to port 0 #ifndef BOARD_DEVICE_RHPORT_NUM diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index 9d083c771..e9e68cf5a 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -40,13 +40,12 @@ #endif // Use raspberry pio-usb for host -#define CFG_TUH_RPI_PIO_USB 1 -//#define CFG_TUSB_RPI_PIO_INC_PATH 1 - +// #define CFG_TUH_RPI_PIO_USB 1 +// #define CFG_TUH_RPI_PIO_USB 1 #if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST | OPT_MODE_HIGH_SPEED) -#elif CFG_TUH_RPI_PIO_USB +#elif defined(CFG_TUH_RPI_PIO_USB) && CFG_TUH_RPI_PIO_USB // rp2040: port0 is native, port 1 for PIO-USB #define CFG_TUSB_RHPORT1_MODE OPT_MODE_HOST #else diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index 1ea2c19f5..ac5bee6ec 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -57,7 +57,7 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent); #define tu_printf printf #endif -static inline void tu_print_var(uint8_t const* buf, uint32_t bufsize) +static inline void tu_print_arr(uint8_t const* buf, uint32_t bufsize) { for(uint32_t i=0; i Date: Sun, 1 May 2022 14:04:36 +0200 Subject: Add TU_BREAKPOINT for mips architecture _mips is provided by xc32-gcc --- src/common/tusb_verify.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/common') diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index 568bac8cc..a52a6d269 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -90,6 +90,9 @@ #elif defined(__riscv) #define TU_BREAKPOINT() do { __asm("ebreak\n"); } while(0) +#elif defined(_mips) + #define TU_BREAKPOINT() do { __asm("sdbbp 0"); } while (0) + #else #define TU_BREAKPOINT() do {} while (0) #endif -- cgit v1.3.1 From c5ba1ea8c17a379beb47d9689e85e2ce6e67206f Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 13 May 2022 22:54:47 +0700 Subject: changes proposal to audio feedback computation --- src/class/audio/audio_device.c | 239 +++++++++++++++++------------------------ src/class/audio/audio_device.h | 100 +++++------------ src/common/tusb_common.h | 6 -- src/device/usbd.c | 6 +- src/device/usbd.h | 2 +- 5 files changed, 129 insertions(+), 224 deletions(-) (limited to 'src/common') diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index b0a49fb04..c3a252a2c 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -261,6 +261,13 @@ osal_mutex_def_t rx_supp_ff_mutex_rd_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO]; #endif #endif +enum { + FEEDBACK_COMPUTE_DISABLED, + FEEDBACK_COMPUTE_FLOAT, + FEEDBACK_COMPUTE_FIXED, + FEEDBACK_COMPUTE_POWER_OF_2, +}; + typedef struct { uint8_t rhport; @@ -305,38 +312,22 @@ typedef struct #endif #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_NO_SOF_BY_USER - uint32_t fb_val; // Feedback value for asynchronous mode (in 16.16 format). - uint8_t fb_n_frames; // Number of (micro)frames used to estimate feedback value -#endif -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER - volatile uint32_t fb_val; // Feedback value for asynchronous mode (in 16.16 format). - uint32_t fb_val_min; // Maximum allowed feedback value according to UAC2 FMT-2.0 section 2.3.1.1. - uint32_t fb_val_max; // Maximum allowed feedback value according to UAC2 FMT-2.0 section 2.3.1.1. - uint8_t fb_n_frames; // Number of (micro)frames used to estimate feedback value - volatile uint8_t fb_n_frames_current; // Current (micro)frame number - volatile uint32_t fb_n_cycles_old; // Old cycle count - uint32_t * fb_param_p_cycle_count; // Pointer to cycle counter + uint32_t fb_val; // Feedback value for asynchronous mode (in 16.16 format). + uint8_t fb_n_frames; // Number of (micro)frames used to estimate feedback value + uint8_t fb_n_frames_shift; + uint8_t fb_compute_method; + + uint32_t fb_val_min; // Maximum allowed feedback value according to UAC2 FMT-2.0 section 2.3.1.1. + uint32_t fb_val_max; // Maximum allowed feedback value according to UAC2 FMT-2.0 section 2.3.1.1. -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_POWER_OF_TWO_SHIFT + // should be union uint8_t fb_power_of_two_val; -#endif -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_FLOAT float fb_float_val; -#endif -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_FIXED_POINT - uint64_t fb_param_factor_N; // Numerator of feedback parameter coefficient - uint64_t fb_param_factor_D; // Denominator of feedback parameter coefficient -#endif -#endif // CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER - -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_USER - volatile uint32_t fb_val; // Feedback value for asynchronous mode (in 16.16 format). - uint8_t fb_n_frames; // Number of (micro)frames used to estimate feedback value -#endif + uint32_t fb_param_factor_N; + uint32_t fb_param_factor_D; #endif // CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP #endif // CFG_TUD_AUDIO_ENABLE_EP_OUT @@ -453,8 +444,8 @@ static inline uint8_t tu_desc_subtype(void const* desc) } #endif -#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP && (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER) -static bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback); +#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP +bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback); #endif bool tud_audio_n_mounted(uint8_t func_id) @@ -1695,16 +1686,11 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const * if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN && desc_ep->bmAttributes.usage == 1) // Check if usage is explicit data feedback { audio->ep_fb = ep_addr; - audio->fb_n_frames = desc_ep->bInterval; - -#if ((CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_USER) || (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER)) - usbd_sof_enable(rhport, true); // Enable SOF interrupt -#endif + audio->fb_n_frames = 1 << (desc_ep->bInterval -1); + audio->fb_n_frames_shift = desc_ep->bInterval -1; -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER - audio->fb_n_frames_current = 0; - audio->fb_n_cycles_old = 0; -#endif + // Enable SOF interrupt if callback is implemented + if (tud_audio_sof_isr) usbd_sof_enable(rhport, true); // // Invoke callback after ep_out is set // if (audio->ep_out != 0) @@ -1725,6 +1711,24 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const * // Invoke one callback for a final set interface if (tud_audio_set_itf_cb) TU_VERIFY(tud_audio_set_itf_cb(rhport, p_request)); + // Prepare feedback computation if callback is available + if (tud_audio_feedback_params_cb) + { + uint32_t sample_freq = 0; + uint32_t mclk_freq = 0; + uint8_t fixed_point = 0; + tud_audio_feedback_params_cb(func_id, alt, &sample_freq, &mclk_freq, &fixed_point); + + if ( sample_freq == 0 || mclk_freq == 0 ) + { + audio->fb_compute_method = FEEDBACK_COMPUTE_DISABLED; + }else + { + audio->fb_compute_method = fixed_point ? FEEDBACK_COMPUTE_FIXED : FEEDBACK_COMPUTE_FLOAT; + set_fb_params(audio, sample_freq, mclk_freq); + } + } + // We are done - abort loop break; } @@ -1734,22 +1738,17 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const * } // Disable SOF interrupt if no driver has any enabled feedback EP -#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP && ((CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_USER) || (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER)) - bool disable = true; - for(uint8_t i=0; i < CFG_TUD_AUDIO; i++) { if (_audiod_fct[i].ep_fb != 0) { disable = false; + break; } } - if (disable) usbd_sof_enable(rhport, false); -#endif - tud_control_status(rhport, p_request); return true; @@ -2022,7 +2021,7 @@ bool audiod_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint3 // Transmission of feedback EP finished if (_audiod_fct[func_id].ep_fb == ep_addr) { - if (tud_audio_fb_done_cb) TU_VERIFY(tud_audio_fb_done_cb(rhport)); + if (tud_audio_fb_done_cb) tud_audio_fb_done_cb(func_id); // Schedule a transmit with the new value if EP is not busy if (!usbd_edpt_busy(rhport, _audiod_fct[func_id].ep_fb)) @@ -2038,81 +2037,93 @@ bool audiod_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint3 return false; } -#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP && ((CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_NO_SOF_BY_USER) || (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_USER)) +#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP uint8_t tud_audio_n_get_fb_n_frames(uint8_t func_id) { return _audiod_fct[func_id].fb_n_frames; } #endif -#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP && (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER) +#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP -// This function must be called from the user within the tud_audio_set_itf_cb(rhport, p_request) callback function, where p_request needs to be checked as -// uint8_t const itf = tu_u16_low(p_request->wIndex); -// uint8_t const alt = tu_u16_low(p_request->wValue); -// such that tud_audio_set_fb_params() gets called with the parameters corresponding to the defined interface and alternate setting -// Also, start the main clock cycle counter (or reset its value) within tud_audio_set_itf_cb() -TU_ATTR_WEAK bool tud_audio_set_fb_params(uint8_t func_id, uint32_t f_m, uint32_t f_s, uint32_t * p_cycle_count) +static bool set_fb_params(audiod_function_t* audio, uint32_t f_s, uint32_t f_m) { - audiod_function_t* audio = &_audiod_fct[func_id]; - audio->fb_param_p_cycle_count = p_cycle_count; - // Check if frame interval is within sane limits // The interval value audio->fb_n_frames was taken from the descriptors within audiod_set_interface() - // n_frames_min is ceil(2^10 * f_s / f_m) for full speed and ceil(2^13 * f_s / f_m) for high speed - this lower limit ensures the measures feedback value has sufficient precision - if ((TUSB_SPEED_FULL == tud_speed_get() && ((2^10 * f_s / f_m) + 1) > audio->fb_n_frames) || (TUSB_SPEED_HIGH == tud_speed_get() && ((2^13 * f_s / f_m) + 1) > audio->fb_n_frames)) + // n_frames_min is ceil(2^10 * f_s / f_m) for full speed and ceil(2^13 * f_s / f_m) for high speed + // this lower limit ensures the measures feedback value has sufficient precision + uint32_t const k = (TUSB_SPEED_FULL == tud_speed_get()) ? 10 : 13; + if ( (((1UL << k) * f_s / f_m) + 1) > audio->fb_n_frames ) { - TU_LOG2(" UAC2 feedback interval too small\r\n"); TU_BREAKPOINT(); return false; + TU_LOG1(" UAC2 feedback interval too small\r\n"); TU_BREAKPOINT(); return false; } - -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_POWER_OF_TWO_SHIFT // Check if parameters really allow for a power of two division - if ((f_m % f_s) != 0 || !tu_is_power_of_two(audio->fb_n_frames * f_m / f_s)) + if ((f_m % f_s) == 0 && tu_is_power_of_two(f_m / f_s)) { - TU_LOG2(" FEEDBACK_DETERMINATION_MODE_POWER_OF_TWO_SHIFT not possible!\r\n"); TU_BREAKPOINT(); return false; + audio->fb_compute_method = FEEDBACK_COMPUTE_POWER_OF_2; + audio->fb_power_of_two_val = 16 - audio->fb_n_frames_shift - tu_log2(f_m / f_s); + }else if ( audio->fb_compute_method == FEEDBACK_COMPUTE_FLOAT) + { + audio->fb_float_val = (float)f_s / f_m * (1UL << (16 - audio->fb_n_frames_shift)); + }else + { + audio->fb_param_factor_N = f_s; + audio->fb_param_factor_D = f_m; } - audio->fb_power_of_two_val = 16 - tu_log2(audio->fb_n_frames * f_m / f_s); -#endif + // Minimal/Maximum value in 16.16 format for full speed (1ms per frame) or high speed (125 us per frame) + uint32_t const frame_div = (TUSB_SPEED_FULL == tud_speed_get()) ? 1000 : 8000; + audio->fb_val_min = (f_s/frame_div - 1) << 16; + audio->fb_val_max = (f_s/frame_div + 1) << 16; -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_FLOAT - audio->fb_float_val = (float)f_s / audio->fb_n_frames / f_m * (1 << 16); + return true; +} #endif -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_FIXED_POINT - - // f_s max is 2^19-1 = 524287 Hz - // f_m max is 2^29/(1 ms * n_frames) for full speed and 2^29/(125 us * n_frames) for high speed, this means for f_m fitting in an uint32, n_frames must be < 125 for full speed and < 1000 for high speed (1000 does not fit into uint8 so the maximum possible value cannot even be reached by UAC2 - we don't need to check for it) +uint32_t tud_audio_feedback_update(uint8_t func_id, uint32_t cycles) +{ + audiod_function_t* audio = &_audiod_fct[func_id]; + uint32_t feedback; - if ((f_s > (2^19)-1) || (TUSB_SPEED_FULL == tud_speed_get() && (audio->fb_n_frames > 125))) + switch (audio->fb_compute_method) { - // If this check fails, not every thing is lost - you need to re-evaluate the scaling factors of the parameters such that the numbers fit into uint64 again. feedback = n_cycles * S_c / (n_frames * S_n) * f_s * S_s / (f_m * S_m). In the end S_c*S_s / (S_n * S_m) = 2^16 for a 16.16 fixed point precision. If you find something, define your own function of tud_audio_set_feedback_params_fm_fs() and audiod_sof() and use your values - TU_LOG2(" FEEDBACK_DETERMINATION_MODE_FIXED_POINT not possible!\r\n"); TU_BREAKPOINT(); return false; - } + case FEEDBACK_COMPUTE_POWER_OF_2: + feedback = cycles << audio->fb_power_of_two_val; + break; - audio->fb_param_factor_N = (uint64_t)f_s << 13; - audio->fb_param_factor_D = (uint64_t)f_m * audio->fb_n_frames; -#endif + case FEEDBACK_COMPUTE_FLOAT: + feedback = (uint32_t) ((float) cylces * audio->fb_float_val); + break; + + case FEEDBACK_COMPUTE_FIXED: + { + uint64_t fb64 = (((uint64_t) cycles) * audio->fb_param_factor_N) << (16 - audio->fb_n_frames_shift); + feedback = (uint32_t) (fb64 / audio->fb_param_factor_D); + } + break; - audio->fb_val_min = ((TUSB_SPEED_FULL == tud_speed_get() ? (f_s/1000) : (f_s/8000)) - 1) << 16; // Minimal value in 16.16 format for full speed (1ms per frame) or high speed (125 us per frame) - audio->fb_val_max = ((TUSB_SPEED_FULL == tud_speed_get() ? (f_s/1000) : (f_s/8000)) + 1) << 16; // Maximum value in 16.16 format + default: return 0; + } - return true; + // For Windows: https://docs.microsoft.com/en-us/windows-hardware/drivers/audio/usb-2-0-audio-drivers + // The size of isochronous packets created by the device must be within the limits specified in FMT-2.0 section 2.3.1.1. + // This means that the deviation of actual packet size from nominal size must not exceed +/- one audio slot + // (audio slot = channel count samples). + if ( feedback > audio->fb_val_max ) feedback = audio->fb_val_max; + if ( feedback < audio->fb_val_min ) feedback = audio->fb_val_min; + + tud_audio_n_fb_set(func_id, feedback); + return feedback; } -#endif -TU_ATTR_WEAK void audiod_sof (uint8_t rhport, uint32_t frame_count) +void audiod_sof_isr (uint8_t rhport, uint32_t frame_count) { (void) rhport; - (void) frame_count; // frame_count is not used since some devices may not provide the frame count value #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP - -#if (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER) - // Determine feedback value - The feedback method is described in 5.12.4.2 of the USB 2.0 spec // Boiled down, the feedback value Ff = n_samples / (micro)frame. // Since an accuracy of less than 1 Sample / second is desired, at least n_frames = ceil(2^K * f_s / f_m) frames need to be measured, where K = 10 for full speed and K = 13 for high speed, f_s is the sampling frequency e.g. 48 kHz and f_m is the cpu clock frequency e.g. 100 MHz (or any other master clock whose clock count is available and locked to f_s) @@ -2126,59 +2137,13 @@ TU_ATTR_WEAK void audiod_sof (uint8_t rhport, uint32_t frame_count) if (audio->ep_fb != 0) { - audio->fb_n_frames_current++; - if (audio->fb_n_frames_current == audio->fb_n_frames) + uint32_t const interval = (1UL << audio->fb_n_frames); + if ( 0 == (frame_count & (interval-1)) ) { - uint32_t n_cylces = *audio->fb_param_p_cycle_count; - uint32_t feedback; - -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_POWER_OF_TWO_SHIFT - feedback = (n_cylces - audio->fb_n_cycles_old) << audio->fb_power_of_two_val; -#endif - -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_FLOAT - feedback = (uint32_t)((float)(n_cylces - audio->fb_n_cycles_old) * audio->fb_float_val); -#endif - -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_FIXED_POINT - feedback = ((n_cylces - audio->fb_n_cycles_old) << 3) * audio->fb_param_factor_N / audio->fb_param_factor_D; // feeback_param_factor_N has scaling factor of 13 bits, n_cycles 3 and feeback_param_factor_D 1, hence 16.16 precision -#endif - - // For Windows: https://docs.microsoft.com/en-us/windows-hardware/drivers/audio/usb-2-0-audio-drivers - // The size of isochronous packets created by the device must be within the limits specified in FMT-2.0 section 2.3.1.1. This means that the deviation of actual packet size from nominal size must not exceed +/- one audio slot (audio slot = channel count samples). - - if (feedback > audio->fb_val_max){ - feedback = audio->fb_val_max; - } - if ( feedback < audio->fb_val_min) { - feedback = audio->fb_val_min; - } - - // Buffer count checks ? - - tud_audio_n_fb_set(i, feedback); - audio->fb_n_frames_current = 0; - audio->fb_n_cycles_old = n_cylces; + if(tud_audio_sof_isr) tud_audio_sof_isr(i, frame_count); } } } - -#endif // (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER) - -#if (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_USER) - // Iterate over audio functions and call callback function - for(uint8_t i=0; i < CFG_TUD_AUDIO; i++) - { - audiod_function_t* audio = &_audiod_fct[i]; - - if (audio->ep_fb != 0) - { - tud_audio_sof_isr_cb(i, frame_count); - } - } - -#endif // (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_USER) - #endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP } @@ -2459,11 +2424,7 @@ static void audiod_parse_for_AS_params(audiod_function_t* audio, uint8_t const * #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER -static bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback) -#else bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback) -#endif { TU_VERIFY(func_id < CFG_TUD_AUDIO && _audiod_fct[func_id].p_desc != NULL); diff --git a/src/class/audio/audio_device.h b/src/class/audio/audio_device.h index e8721cf27..9ed7d1da4 100644 --- a/src/class/audio/audio_device.h +++ b/src/class/audio/audio_device.h @@ -191,41 +191,6 @@ #define CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION 0 // 0 or 1 #endif -// Possible options for determination of feedback value -#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_NO_SOF_BY_USER 1 // Feedback value must be determined by the user itself and set by use of tud_audio_n_fb_set(). The feedback value may be determined e.g. from some fill status of some FIFO buffer. Advantage: No ISR interrupt is enabled, hence the CPU need not to handle an ISR every 1ms or 125us and thus less CPU load, disadvantage: typically a larger FIFO is needed to compensate for jitter (e.g. 8 frames), i.e. a larger delay is introduced. -#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER 2 // Feedback value is calculated within the audio driver by use of SOF interrupt. The driver needs information about the master clock f_m from which the audio sample frequency f_s is derived, f_s itself, and the cycle count of f_m at time of the SOF interrupt (e.g. by use of a hardware counter) - see tud_audio_set_fb_params(). Advantage: Reduced jitter in the feedback value computation, hence, the receive FIFO can be smaller (e.g. 2 frames) and thus a smaller delay is possible, disadvantage: higher CPU load due to SOF ISR handling every frame i.e. 1ms or 125us. This option is a great starting point to try the SOF ISR option but depending on your hardware setup (performance of the CPU) it might not work. If so, figure out why and use the next option. (The most critical point is the reading of the cycle counter value of f_m. It is read from within the SOF ISR - see: audiod_sof() -, hence, the ISR must has a high priority such that no software dependent "random" delay i.e. jitter is introduced). -#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_USER 3 // Feedback value is determined by the user by use of SOF interrupt. The user may use tud_audio_sof_isr_cb() which is called every SOF (of course only invoked when an alternate interface other than zero was set). The number of frames used to determine the feedback value for the currently active alternate setting can be get by tud_audio_get_fb_n_frames(). The feedback value must be set by use of tud_audio_n_fb_set(). - -// Determine feedback value within SOF ISR within audio driver - if disabled the user has to call tud_audio_n_fb_set() with a suitable feedback value on its own. If done within audio driver SOF ISR, tud_audio_n_fb_set() is disabled for user -#ifndef CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION -#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_NO_SOF_BY_USER -#endif - -#ifdef CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION -#if (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION != CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_NO_SOF_BY_USER && CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION != CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER && CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION != CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_USER) -#error Unknown CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION. Possible choices are: CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_NO_SOF_BY_USER, CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER, or CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_USER! -#endif -#endif - -// Feeback calculation mode -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER - -#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_POWER_OF_TWO_SHIFT 1 -#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_FLOAT 2 -#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_FIXED_POINT 3 - -#ifndef CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE -#error You must tell the driver the feedback determination mode! Possible choices are: CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_POWER_OF_TWO_SHIFT, CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_FLOAT, or CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_FIXED_POINT! -#endif - -#ifdef CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE -#if (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE != CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_POWER_OF_TWO_SHIFT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE != CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_FLOAT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE != CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_FIXED_POINT) -#error Unknown CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE. Possible choices are: CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_POWER_OF_TWO_SHIFT, CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_FLOAT, or CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_MODE_FIXED_POINT! -#endif -#endif - -#endif - // Audio interrupt control EP size - disabled if 0 #ifndef CFG_TUD_AUDIO_INT_CTR_EPSIZE_IN #define CFG_TUD_AUDIO_INT_CTR_EPSIZE_IN 0 // Audio interrupt control - if required - 6 Bytes according to UAC 2 specification (p. 74) @@ -493,45 +458,14 @@ TU_ATTR_WEAK bool tud_audio_rx_done_post_read_cb(uint8_t rhport, uint16_t n_byte #endif #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP -TU_ATTR_WEAK bool tud_audio_fb_done_cb(uint8_t rhport); - -#if (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_NO_SOF_BY_USER) - -// This function is used to provide data rate feedback from an asynchronous sink. Feedback value will be sent at FB endpoint interval till it's changed. -// -// The feedback format is specified to be 16.16 for HS and 10.14 for FS devices (see Universal Serial Bus Specification Revision 2.0 5.12.4.2). By default, -// the choice of format is left to the caller and feedback argument is sent as-is. If CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION is set, then tinyusb -// expects 16.16 format and handles the conversion to 10.14 on FS. -// -// Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0 devices. On Linux and macOS it seems the -// driver can work with either format. So a good compromise is to keep format correction disabled and stick to 16.16 format. - -// Feedback value can be determined from within the SOF ISR of the audio driver. This should reduce jitter. If the feature is used, the user can not set the feedback value. - -bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback); -static inline bool tud_audio_fb_set(uint32_t feedback); +TU_ATTR_WEAK void tud_audio_fb_done_cb(uint8_t func_id); -uint8_t tud_audio_n_get_fb_n_frames(uint8_t func_id); -static inline uint8_t tud_audio_get_fb_n_frames(); - -#endif // (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_NO_SOF_BY_USER) - -#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER - -// f_m : Main clock frequency in Hz i.e. master clock to which sample clock is locked -// f_s : Current sample rate in Hz -// p_cycle_count : Pointer to main clock cycle counter register where the current count can be read from (e.g. a timer register) -// This function must be called from the user within the tud_audio_set_itf_cb(rhport, p_request) callback function, where p_request needs to be checked as -// uint8_t const itf = tu_u16_low(p_request->wIndex); -// uint8_t const alt = tu_u16_low(p_request->wValue); -// such that tud_audio_set_fb_params() gets called with the parameters corresponding to the defined interface and alternate setting -// Also, start the main clock cycle counter (or reset its value) within tud_audio_set_itf_cb() -bool tud_audio_set_fb_params(uint8_t func_id, uint32_t f_m, uint32_t f_s, uint32_t * p_cycle_count); +// determined by the user itself and set by use of tud_audio_n_fb_set(). The feedback value may be determined e.g. from some fill status of some FIFO buffer. Advantage: No ISR interrupt is enabled, hence the CPU need not to handle an ISR every 1ms or 125us and thus less CPU load, disadvantage: typically a larger FIFO is needed to compensate for jitter (e.g. 8 frames), i.e. a larger delay is introduced. -#endif // CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_AUDIO_DRIVER +// Feedback value is calculated within the audio driver by use of SOF interrupt. The driver needs information about the master clock f_m from which the audio sample frequency f_s is derived, f_s itself, and the cycle count of f_m at time of the SOF interrupt (e.g. by use of a hardware counter) - see tud_audio_set_fb_params(). Advantage: Reduced jitter in the feedback value computation, hence, the receive FIFO can be smaller (e.g. 2 frames) and thus a smaller delay is possible, disadvantage: higher CPU load due to SOF ISR handling every frame i.e. 1ms or 125us. This option is a great starting point to try the SOF ISR option but depending on your hardware setup (performance of the CPU) it might not work. If so, figure out why and use the next option. (The most critical point is the reading of the cycle counter value of f_m. It is read from within the SOF ISR - see: audiod_sof() -, hence, the ISR must has a high priority such that no software dependent "random" delay i.e. jitter is introduced). -#if (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_USER) +// Feedback value is determined by the user by use of SOF interrupt. The user may use tud_audio_sof_isr() which is called every SOF (of course only invoked when an alternate interface other than zero was set). The number of frames used to determine the feedback value for the currently active alternate setting can be get by tud_audio_get_fb_n_frames(). The feedback value must be set by use of tud_audio_n_fb_set(). // This function is used to provide data rate feedback from an asynchronous sink. Feedback value will be sent at FB endpoint interval till it's changed. // @@ -539,20 +473,35 @@ bool tud_audio_set_fb_params(uint8_t func_id, uint32_t f_m, uint32_t f_s, uint32 // the choice of format is left to the caller and feedback argument is sent as-is. If CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION is set, then tinyusb // expects 16.16 format and handles the conversion to 10.14 on FS. // -// Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0 devices. On Linux and macOS it seems the +// Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0 devices. On Linux and macOS it seems the // driver can work with either format. So a good compromise is to keep format correction disabled and stick to 16.16 format. // Feedback value can be determined from within the SOF ISR of the audio driver. This should reduce jitter. If the feature is used, the user can not set the feedback value. +// Determine feedback value - The feedback method is described in 5.12.4.2 of the USB 2.0 spec +// Boiled down, the feedback value Ff = n_samples / (micro)frame. +// Since an accuracy of less than 1 Sample / second is desired, at least n_frames = ceil(2^K * f_s / f_m) frames need to be measured, where K = 10 for full speed and K = 13 for high speed, f_s is the sampling frequency e.g. 48 kHz and f_m is the cpu clock frequency e.g. 100 MHz (or any other master clock whose clock count is available and locked to f_s) +// The update interval in the (4.10.2.1) Feedback Endpoint Descriptor must be less or equal to 2^(K - P), where P = min( ceil(log2(f_m / f_s)), K) +// feedback = n_cycles / n_frames * f_s / f_m in 16.16 format, where n_cycles are the number of main clock cycles within fb_n_frames + bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback); static inline bool tud_audio_fb_set(uint32_t feedback); uint8_t tud_audio_n_get_fb_n_frames(uint8_t func_id); static inline uint8_t tud_audio_get_fb_n_frames(); -TU_ATTR_WEAK void tud_audio_sof_isr_cb(uint8_t func_id, uint32_t frame); +// Update feedback value with passed cycles since last time this update function is called. +// Typically called within tud_audio_sof_isr(). Required tud_audio_feedback_params_cb() is implemented +// This function will also call tud_audio_feedback_set() +// return feedback value in 16.16 for reference (0 for error) +uint32_t tud_audio_feedback_update(uint8_t func_id, uint32_t cycles); + +// mclk_freq : Main clock frequency in Hz i.e. master clock to which sample clock is locked +// sample_freq : sample frequency in Hz +// fixed_point : 0 float (default), 1 fixed point (for mcu without FPU) +TU_ATTR_WEAK void tud_audio_feedback_params_cb(uint8_t func_id, uint8_t alt_itf, uint32_t* sample_freq, uint32_t* mclk_freq, uint8_t* fixed_point); -#endif // (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_USER) +TU_ATTR_WEAK void tud_audio_sof_isr(uint8_t func_id, uint32_t frame); #endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP @@ -695,7 +644,8 @@ static inline uint16_t tud_audio_int_ctr_write(uint8_t const* buffer, uint16_t l } #endif -#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP && ((CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_NO_SOF_BY_USER) || (CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION == CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_OPTION_SOF_BY_USER)) +#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP + static inline bool tud_audio_fb_set(uint32_t feedback) { return tud_audio_n_fb_set(0, feedback); @@ -716,7 +666,7 @@ void audiod_reset (uint8_t rhport); uint16_t audiod_open (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len); bool audiod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request); bool audiod_xfer_cb (uint8_t rhport, uint8_t edpt_addr, xfer_result_t result, uint32_t xferred_bytes); -void audiod_sof (uint8_t rhport, uint32_t frame_count); +void audiod_sof_isr (uint8_t rhport, uint32_t frame_count); #ifdef __cplusplus } diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index bcdf8933a..b1ee40a1a 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -134,12 +134,6 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_offset4k(uint32_t value) { retur //------------- Mathematics -------------// TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_div_ceil(uint32_t v, uint32_t d) { return (v + d -1)/d; } -/// inclusive range checking TODO remove -TU_ATTR_ALWAYS_INLINE static inline bool tu_within(uint32_t lower, uint32_t value, uint32_t upper) -{ - return (lower <= value) && (value <= upper); -} - // log2 of a value is its MSB's position // TODO use clz TODO remove static inline uint8_t tu_log2(uint32_t value) diff --git a/src/device/usbd.c b/src/device/usbd.c index 8ab67c8de..b32cee813 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -69,7 +69,7 @@ typedef struct volatile uint8_t cfg_num; // current active configuration (0x00 is not configured) uint8_t speed; - uint8_t itf2drv[16]; // map interface number to driver (0xff is invalid) + uint8_t itf2drv[CFG_TUD_INTERFACE_MAX]; // map interface number to driver (0xff is invalid) uint8_t ep2drv[CFG_TUD_ENDPPOINT_MAX][2]; // map endpoint to driver ( 0xff is invalid ), can use only 4-bit each tu_edpt_state_t ep_status[CFG_TUD_ENDPPOINT_MAX][2]; @@ -134,7 +134,7 @@ static usbd_class_driver_t const _usbd_driver[] = .open = audiod_open, .control_xfer_cb = audiod_control_xfer_cb, .xfer_cb = audiod_xfer_cb, - .sof_isr = audiod_sof + .sof_isr = audiod_sof_isr }, #endif @@ -170,7 +170,7 @@ static usbd_class_driver_t const _usbd_driver[] = .open = vendord_open, .control_xfer_cb = tud_vendor_control_xfer_cb, .xfer_cb = vendord_xfer_cb, - .sof_isr = NULL + .sof_isr = NULL }, #endif diff --git a/src/device/usbd.h b/src/device/usbd.h index d485d8711..30a27c5ee 100644 --- a/src/device/usbd.h +++ b/src/device/usbd.h @@ -33,7 +33,7 @@ extern "C" { #endif -typedef void (*tud_sof_isr_t) (uint32_t frame_count); +// typedef void (*tud_sof_isr_t) (uint32_t frame_count); //--------------------------------------------------------------------+ // Application API -- cgit v1.3.1 From a936bafb8c1e0c6f125fdae90ffe57bf0deed57c Mon Sep 17 00:00:00 2001 From: Rafael Silva Date: Wed, 9 Mar 2022 12:19:45 +0000 Subject: add support for renesas ra family of mcus Signed-off-by: Rafael Silva --- src/common/tusb_mcu.h | 2 +- src/portable/renesas/link/dcd_link.c | 5 ++- src/portable/renesas/link/hcd_link.c | 5 ++- src/portable/renesas/link/link_ra.h | 64 ++++++++++++++++++++++++++++++++++++ src/tusb_option.h | 2 ++ 5 files changed, 75 insertions(+), 3 deletions(-) create mode 100644 src/portable/renesas/link/link_ra.h (limited to 'src/common') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index c1cf2a810..5daa37f04 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -236,7 +236,7 @@ #define TUP_DCD_ENDPOINT_MAX 7 //------------- Renesas -------------// -#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) +#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N, OPT_MCU_RAXXX) #define TUP_DCD_ENDPOINT_MAX 10 //------------- GigaDevice -------------// diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/link/dcd_link.c index 3aeda9e4c..19fbfe293 100644 --- a/src/portable/renesas/link/dcd_link.c +++ b/src/portable/renesas/link/dcd_link.c @@ -31,13 +31,16 @@ // We disable SOF for now until needed later on #define USE_SOF 0 -#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N) +#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N || \ + CFG_TUSB_MCU == OPT_MCU_RAXXX) #include "device/dcd.h" #include "link_type.h" #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) #include "link_rx.h" +#elif TU_CHECK_MCU(OPT_MCU_RAXXX) +#include "link_ra.h" #else #error "Unsupported MCU" #endif diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c index 46a4aae8f..2ada28105 100644 --- a/src/portable/renesas/link/hcd_link.c +++ b/src/portable/renesas/link/hcd_link.c @@ -27,13 +27,16 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N) +#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N || \ + CFG_TUSB_MCU == OPT_MCU_RAXXX) #include "host/hcd.h" #include "link_type.h" #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) #include "link_rx.h" +#elif TU_CHECK_MCU(OPT_MCU_RAXXX) +#include "link_ra.h" #else #error "Unsupported MCU" #endif diff --git a/src/portable/renesas/link/link_ra.h b/src/portable/renesas/link/link_ra.h new file mode 100644 index 000000000..b42def368 --- /dev/null +++ b/src/portable/renesas/link/link_ra.h @@ -0,0 +1,64 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022 Rafael Silva (@perigoso) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _LINK_RA_H_ +#define _LINK_RA_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "link_type.h" + +/* renesas fsp api */ +#include "bsp_api.h" + +#define LINK_REG_BASE (0x40090000) + +TU_ATTR_ALWAYS_INLINE +static inline void link_int_enable(uint8_t rhport) +{ + (void) rhport; + NVIC_EnableIRQ(TU_IRQn); +} + +TU_ATTR_ALWAYS_INLINE +static inline void link_int_disable(uint8_t rhport) +{ + (void) rhport; + NVIC_DisableIRQ(TU_IRQn); +} + +// MCU specific PHY init +static inline void link_phy_init(void) +{ +} + +#ifdef __cplusplus +} +#endif + +#endif /* _LINK_RA_H_ */ diff --git a/src/tusb_option.h b/src/tusb_option.h index 3b054fc78..16bdedce5 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -127,6 +127,8 @@ typedef int make_iso_compilers_happy ; #define OPT_MCU_RX63X 1400 ///< Renesas RX63N/631 #define OPT_MCU_RX65X 1401 ///< Renesas RX65N/RX651 #define OPT_MCU_RX72N 1402 ///< Renesas RX72N +#define OPT_MCU_RAXXX 1403 ///< Renesas RAxxx families + // Mind Motion #define OPT_MCU_MM32F327X 1500 ///< Mind Motion MM32F327 -- cgit v1.3.1 From 8b9cf152a0dedda573fb3374d8c873dce4b883d1 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 2 Jun 2022 16:51:17 +0700 Subject: rhport argument in usbd_ API() is not used (always use the initialized port) remove the usage of TUD_OPT_RHPORT in class driver --- examples/device/cdc_msc/src/tusb_config.h | 31 ++++++--------------- hw/bsp/lpc18/family.c | 35 +++++++++++++++-------- src/class/bth/bth_device.c | 6 ++-- src/class/cdc/cdc_device.c | 4 +-- src/class/hid/hid_device.c | 7 +++-- src/class/midi/midi_device.c | 4 +-- src/class/net/ecm_rndis_device.c | 10 ++++--- src/class/net/ncm_device.c | 9 +++--- src/class/vendor/vendor_device.c | 12 +++++--- src/common/tusb_mcu.h | 29 +++++++++---------- src/device/usbd.c | 14 +++++++++- src/device/usbd_pvt.h | 1 + src/tusb_option.h | 46 ++++++++++++++++--------------- 13 files changed, 114 insertions(+), 94 deletions(-) (limited to 'src/common') diff --git a/examples/device/cdc_msc/src/tusb_config.h b/examples/device/cdc_msc/src/tusb_config.h index 3849ad4d0..363da88d7 100644 --- a/examples/device/cdc_msc/src/tusb_config.h +++ b/examples/device/cdc_msc/src/tusb_config.h @@ -41,7 +41,12 @@ // This example doesn't use an RTOS #ifndef CFG_TUSB_OS -#define CFG_TUSB_OS OPT_OS_NONE + #define CFG_TUSB_OS OPT_OS_NONE +#endif + +// CFG_TUSB_DEBUG is defined by compiler in DEBUG build +#ifndef CFG_TUSB_DEBUG + #define CFG_TUSB_DEBUG 0 #endif // Enable Device stack @@ -53,34 +58,14 @@ #endif // RHPort max operational speed can defined by board.mk -// Default to max (auto) speed for MCU with internal HighSpeed PHY #ifndef BOARD_TUD_MAX_SPEED #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif -// Device mode with rhport and speed defined by board.mk -#if BOARD_TUD_RHPORT == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) -#elif BOARD_TUD_RHPORT == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) -#else - #error "Incorrect RHPort configuration" -#endif - +// Default is max speed that hardware controller could support with on-chip PHY +#define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED -// Device max speed, default is max speed that hardware controller could support without external PHY -// BOARD_TUD_MAX_SPEED can be used to change value (e.g for board features external PHY). -#ifdef BOARD_TUD_MAX_SPEED - #define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED -#else - #define CFG_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED -#endif - - -// CFG_TUSB_DEBUG is defined by compiler in DEBUG build -// #define CFG_TUSB_DEBUG 0 - /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. * Tinyusb use follows macros to declare transferring memory so that they can be put * into those specific section. diff --git a/hw/bsp/lpc18/family.c b/hw/bsp/lpc18/family.c index d74ebcd33..a59b6e89d 100644 --- a/hw/bsp/lpc18/family.c +++ b/hw/bsp/lpc18/family.c @@ -28,28 +28,40 @@ #include "bsp/board.h" #include "board.h" +#ifdef BOARD_TUD_RHPORT + #define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n) +#else + #define PORT_SUPPORT_DEVICE(_n) 0 +#endif + +#ifdef BOARD_TUH_RHPORT + #define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n) +#else + #define PORT_SUPPORT_HOST(_n) 0 +#endif + //--------------------------------------------------------------------+ // USB Interrupt Handler //--------------------------------------------------------------------+ void USB0_IRQHandler(void) { - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST - tuh_int_handler(0); + #if PORT_SUPPORT_DEVICE(0) + tud_int_handler(0); #endif - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE - tud_int_handler(0); + #if PORT_SUPPORT_HOST(0) + tuh_int_handler(0); #endif } void USB1_IRQHandler(void) { - #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST - tuh_int_handler(1); + #if PORT_SUPPORT_DEVICE(1) + tud_int_handler(1); #endif - #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE - tud_int_handler(1); + #if PORT_SUPPORT_HOST(1) + tuh_int_handler(1); #endif } @@ -84,7 +96,8 @@ void board_init(void) SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - //NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); + NVIC_SetPriority(USB1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif Chip_GPIO_Init(LPC_GPIO_PORT); @@ -102,11 +115,11 @@ void board_init(void) Chip_UART_TXEnable(UART_DEV); //------------- USB -------------// -#if CFG_TUSB_RHPORT0_MODE +#if PORT_SUPPORT_DEVICE(0) || PORT_SUPPORT_HOST(0) Chip_USB0_Init(); #endif -#if CFG_TUSB_RHPORT1_MODE +#if PORT_SUPPORT_DEVICE(1) || PORT_SUPPORT_HOST(1) Chip_USB1_Init(); #endif } diff --git a/src/class/bth/bth_device.c b/src/class/bth/bth_device.c index f40bfbd0d..f96bb3552 100755 --- a/src/class/bth/bth_device.c +++ b/src/class/bth/bth_device.c @@ -59,10 +59,12 @@ CFG_TUSB_MEM_SECTION btd_interface_t _btd_itf; static bool bt_tx_data(uint8_t ep, void *data, uint16_t len) { + uint8_t const rhport = 0; + // skip if previous transfer not complete - TU_VERIFY(!usbd_edpt_busy(TUD_OPT_RHPORT, ep)); + TU_VERIFY(!usbd_edpt_busy(rhport, ep)); - TU_ASSERT(usbd_edpt_xfer(TUD_OPT_RHPORT, ep, data, len)); + TU_ASSERT(usbd_edpt_xfer(rhport, ep, data, len)); return true; } diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c index 2b9b84e7a..7aa7a4860 100644 --- a/src/class/cdc/cdc_device.c +++ b/src/class/cdc/cdc_device.c @@ -82,7 +82,7 @@ CFG_TUSB_MEM_SECTION static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC]; static bool _prep_out_transaction (cdcd_interface_t* p_cdc) { - uint8_t const rhport = TUD_OPT_RHPORT; + uint8_t const rhport = 0; uint16_t available = tu_fifo_remaining(&p_cdc->rx_ff); // Prepare for incoming data but only allow what we can store in the ring buffer. @@ -189,7 +189,7 @@ uint32_t tud_cdc_n_write_flush (uint8_t itf) // No data to send if ( !tu_fifo_count(&p_cdc->tx_ff) ) return 0; - uint8_t const rhport = TUD_OPT_RHPORT; + uint8_t const rhport = 0; // Claim the endpoint TU_VERIFY( usbd_edpt_claim(rhport, p_cdc->ep_in), 0 ); diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c index 562ca7f36..cdf155e1c 100644 --- a/src/class/hid/hid_device.c +++ b/src/class/hid/hid_device.c @@ -76,8 +76,9 @@ static inline uint8_t get_index_by_itfnum(uint8_t itf_num) //--------------------------------------------------------------------+ bool tud_hid_n_ready(uint8_t instance) { + uint8_t const rhport = 0; uint8_t const ep_in = _hidd_itf[instance].ep_in; - return tud_ready() && (ep_in != 0) && !usbd_edpt_busy(TUD_OPT_RHPORT, ep_in); + return tud_ready() && (ep_in != 0) && !usbd_edpt_busy(rhport, ep_in); } bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const* report, uint8_t len) @@ -103,7 +104,7 @@ bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const* report, u memcpy(p_hid->epin_buf, report, len); } - return usbd_edpt_xfer(TUD_OPT_RHPORT, p_hid->ep_in, p_hid->epin_buf, len); + return usbd_edpt_xfer(rhport, p_hid->ep_in, p_hid->epin_buf, len); } uint8_t tud_hid_n_interface_protocol(uint8_t instance) @@ -172,7 +173,7 @@ bool tud_hid_n_gamepad_report(uint8_t instance, uint8_t report_id, //--------------------------------------------------------------------+ void hidd_init(void) { - hidd_reset(TUD_OPT_RHPORT); + hidd_reset(0); } void hidd_reset(uint8_t rhport) diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c index 2ce1376bd..28e6a92d2 100644 --- a/src/class/midi/midi_device.c +++ b/src/class/midi/midi_device.c @@ -92,7 +92,7 @@ bool tud_midi_n_mounted (uint8_t itf) static void _prep_out_transaction (midid_interface_t* p_midi) { - uint8_t const rhport = TUD_OPT_RHPORT; + uint8_t const rhport = 0; uint16_t available = tu_fifo_remaining(&p_midi->rx_ff); // Prepare for incoming data but only allow what we can store in the ring buffer. @@ -219,7 +219,7 @@ static uint32_t write_flush(midid_interface_t* midi) // No data to send if ( !tu_fifo_count(&midi->tx_ff) ) return 0; - uint8_t const rhport = TUD_OPT_RHPORT; + uint8_t const rhport = 0; // skip if previous transfer not complete TU_VERIFY( usbd_edpt_claim(rhport, midi->ep_in), 0 ); diff --git a/src/class/net/ecm_rndis_device.c b/src/class/net/ecm_rndis_device.c index f6b318058..d85a3f778 100644 --- a/src/class/net/ecm_rndis_device.c +++ b/src/class/net/ecm_rndis_device.c @@ -108,20 +108,22 @@ static bool can_xmit; void tud_network_recv_renew(void) { - usbd_edpt_xfer(TUD_OPT_RHPORT, _netd_itf.ep_out, received, sizeof(received)); + usbd_edpt_xfer(0, _netd_itf.ep_out, received, sizeof(received)); } static void do_in_xfer(uint8_t *buf, uint16_t len) { can_xmit = false; - usbd_edpt_xfer(TUD_OPT_RHPORT, _netd_itf.ep_in, buf, len); + usbd_edpt_xfer(0, _netd_itf.ep_in, buf, len); } void netd_report(uint8_t *buf, uint16_t len) { + uint8_t const rhport = 0; + // skip if previous report not yet acknowledged by host - if ( usbd_edpt_busy(TUD_OPT_RHPORT, _netd_itf.ep_notif) ) return; - usbd_edpt_xfer(TUD_OPT_RHPORT, _netd_itf.ep_notif, buf, len); + if ( usbd_edpt_busy(rhport, _netd_itf.ep_notif) ) return; + usbd_edpt_xfer(rhport, _netd_itf.ep_notif, buf, len); } //--------------------------------------------------------------------+ diff --git a/src/class/net/ncm_device.c b/src/class/net/ncm_device.c index 1987337f8..00892b49c 100644 --- a/src/class/net/ncm_device.c +++ b/src/class/net/ncm_device.c @@ -188,7 +188,7 @@ static void ncm_start_tx(void) { ntb->ndp.datagram[ncm_interface.datagram_count].wDatagramLength = 0; // Kick off an endpoint transfer - usbd_edpt_xfer(TUD_OPT_RHPORT, ncm_interface.ep_in, ntb->data, ntb_length); + usbd_edpt_xfer(0, ncm_interface.ep_in, ntb->data, ntb_length); ncm_interface.transferring = true; // Swap to the other NTB and clear it out @@ -229,7 +229,7 @@ void tud_network_recv_renew(void) { if (!ncm_interface.num_datagrams) { - usbd_edpt_xfer(TUD_OPT_RHPORT, ncm_interface.ep_out, receive_ntb, sizeof(receive_ntb)); + usbd_edpt_xfer(0, ncm_interface.ep_out, receive_ntb, sizeof(receive_ntb)); return; } @@ -316,14 +316,15 @@ uint16_t netd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint1 static void ncm_report(void) { + uint8_t const rhport = 0; if (ncm_interface.report_state == REPORT_SPEED) { ncm_notify_speed_change.header.wIndex = ncm_interface.itf_num; - usbd_edpt_xfer(TUD_OPT_RHPORT, ncm_interface.ep_notif, (uint8_t *) &ncm_notify_speed_change, sizeof(ncm_notify_speed_change)); + usbd_edpt_xfer(rhport, ncm_interface.ep_notif, (uint8_t *) &ncm_notify_speed_change, sizeof(ncm_notify_speed_change)); ncm_interface.report_state = REPORT_CONNECTED; ncm_interface.report_pending = true; } else if (ncm_interface.report_state == REPORT_CONNECTED) { ncm_notify_connected.header.wIndex = ncm_interface.itf_num; - usbd_edpt_xfer(TUD_OPT_RHPORT, ncm_interface.ep_notif, (uint8_t *) &ncm_notify_connected, sizeof(ncm_notify_connected)); + usbd_edpt_xfer(rhport, ncm_interface.ep_notif, (uint8_t *) &ncm_notify_connected, sizeof(ncm_notify_connected)); ncm_interface.report_state = REPORT_DONE; ncm_interface.report_pending = true; } diff --git a/src/class/vendor/vendor_device.c b/src/class/vendor/vendor_device.c index 6e3ceb1c4..c7dfa0062 100644 --- a/src/class/vendor/vendor_device.c +++ b/src/class/vendor/vendor_device.c @@ -84,14 +84,16 @@ bool tud_vendor_n_peek(uint8_t itf, uint8_t* u8) //--------------------------------------------------------------------+ static void _prep_out_transaction (vendord_interface_t* p_itf) { + uint8_t const rhport = 0; + // skip if previous transfer not complete - if ( usbd_edpt_busy(TUD_OPT_RHPORT, p_itf->ep_out) ) return; + if ( usbd_edpt_busy(rhport, p_itf->ep_out) ) return; // Prepare for incoming data but only allow what we can store in the ring buffer. uint16_t max_read = tu_fifo_remaining(&p_itf->rx_ff); if ( max_read >= CFG_TUD_VENDOR_EPSIZE ) { - usbd_edpt_xfer(TUD_OPT_RHPORT, p_itf->ep_out, p_itf->epout_buf, CFG_TUD_VENDOR_EPSIZE); + usbd_edpt_xfer(rhport, p_itf->ep_out, p_itf->epout_buf, CFG_TUD_VENDOR_EPSIZE); } } @@ -115,13 +117,15 @@ void tud_vendor_n_read_flush (uint8_t itf) //--------------------------------------------------------------------+ static uint16_t maybe_transmit(vendord_interface_t* p_itf) { + uint8_t const rhport = 0; + // skip if previous transfer not complete - TU_VERIFY( !usbd_edpt_busy(TUD_OPT_RHPORT, p_itf->ep_in) ); + TU_VERIFY( !usbd_edpt_busy(rhport, p_itf->ep_in) ); uint16_t count = tu_fifo_read_n(&p_itf->tx_ff, p_itf->epin_buf, CFG_TUD_VENDOR_EPSIZE); if (count > 0) { - TU_ASSERT( usbd_edpt_xfer(TUD_OPT_RHPORT, p_itf->ep_in, p_itf->epin_buf, count) ); + TU_ASSERT( usbd_edpt_xfer(rhport, p_itf->ep_in, p_itf->epin_buf, count) ); } return count; } diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index c1cf2a810..383a8d686 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -45,8 +45,7 @@ * - ENDPOINT_MAX: max (logical) number of endpoint * - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed, * e.g EP1 OUT & EP1 IN cannot exist together - * - RHPORT_HIGHSPEED: mask to indicate which port support highspeed mode (without external PHY) - * bit0 for port0 and so on. + * - RHPORT_HIGHSPEED: support highspeed with on-chip PHY */ //------------- NXP -------------// @@ -63,8 +62,7 @@ #define TUP_USBIP_EHCI #define TUP_DCD_ENDPOINT_MAX 6 - #define TUP_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS - + #define TUP_RHPORT_HIGHSPEED 1 // Port0 HS, Port1 FS #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX) #define TUP_DCD_ENDPOINT_MAX 5 @@ -82,8 +80,7 @@ #define TUP_USBIP_EHCI #define TUP_DCD_ENDPOINT_MAX 8 - #define TUP_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS - + #define TUP_RHPORT_HIGHSPEED 1 // Port0 HS, Port1 HS #elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX) #define TUP_DCD_ENDPOINT_MAX 16 @@ -107,7 +104,7 @@ #elif TU_CHECK_MCU(OPT_MCU_SAMX7X) #define TUP_DCD_ENDPOINT_MAX 10 - #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_RHPORT_HIGHSPEED 1 #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER #elif TU_CHECK_MCU(OPT_MCU_PIC32MZ) @@ -155,7 +152,7 @@ // MCU with on-chip HS Phy #if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx) - #define TUP_RHPORT_HIGHSPEED 0x02 // Port 0: FS, Port 1: HS + #define TUP_RHPORT_HIGHSPEED 1 // Port0: FS, Port1: HS #endif #elif TU_CHECK_MCU(OPT_MCU_STM32H7) @@ -185,12 +182,12 @@ #endif #elif TU_CHECK_MCU(OPT_MCU_STM32WB) -#define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 //------------- Sony -------------// #elif TU_CHECK_MCU(OPT_MCU_CXD56) #define TUP_DCD_ENDPOINT_MAX 7 - #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_RHPORT_HIGHSPEED 1 #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER //------------- TI -------------// @@ -213,7 +210,7 @@ #elif TU_CHECK_MCU(OPT_MCU_NUC505) #define TUP_DCD_ENDPOINT_MAX 12 - #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_RHPORT_HIGHSPEED 1 //------------- Espressif -------------// #elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) @@ -228,7 +225,7 @@ #elif TU_CHECK_MCU(OPT_MCU_RP2040) #define TUP_DCD_ENDPOINT_MAX 16 - #define TU_ATTR_FAST_FUNC __attribute__((section(".time_critical.tinyusb"))) + #define TU_ATTR_FAST_FUNC __attribute__((section(".time_critical.tinyusb"))) //------------- Silabs -------------// #elif TU_CHECK_MCU(OPT_MCU_EFM32GG) @@ -248,7 +245,7 @@ #elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837) #define TUP_USBIP_DWC2 #define TUP_DCD_ENDPOINT_MAX 8 - #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_RHPORT_HIGHSPEED 1 //------------- Broadcom -------------// #elif TU_CHECK_MCU(OPT_MCU_XMC4000) @@ -258,11 +255,11 @@ //------------- BridgeTek -------------// #elif TU_CHECK_MCU(OPT_MCU_FT90X) #define TUP_DCD_ENDPOINT_MAX 8 - #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_RHPORT_HIGHSPEED 1 #elif TU_CHECK_MCU(OPT_MCU_FT93X) #define TUP_DCD_ENDPOINT_MAX 16 - #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_RHPORT_HIGHSPEED 1 //------------ Allwinner -------------// #elif TU_CHECK_MCU(OPT_MCU_F1C100S) @@ -281,7 +278,7 @@ // Default to fullspeed if not defined #ifndef TUP_RHPORT_HIGHSPEED - #define TUP_RHPORT_HIGHSPEED 0x00 + #define TUP_RHPORT_HIGHSPEED 0 #endif // fast function, normally mean placing function in SRAM diff --git a/src/device/usbd.c b/src/device/usbd.c index fa75c0214..55e478a4e 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -428,7 +428,6 @@ bool tud_init (uint8_t rhport) dcd_init(rhport); dcd_int_enable(rhport); - return true; } @@ -1199,6 +1198,8 @@ void usbd_defer_func(osal_task_func_t func, void* param, bool in_isr) bool usbd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep) { + rhport = _usbd_rhport; + TU_ASSERT(tu_edpt_number(desc_ep->bEndpointAddress) < CFG_TUD_ENDPPOINT_MAX); TU_ASSERT(tu_edpt_validate(desc_ep, (tusb_speed_t) _usbd_dev.speed)); @@ -1240,6 +1241,8 @@ bool usbd_edpt_release(uint8_t rhport, uint8_t ep_addr) bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) { + rhport = _usbd_rhport; + uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const dir = tu_edpt_dir(ep_addr); @@ -1275,6 +1278,8 @@ bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t // into the USB buffer! bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes) { + rhport = _usbd_rhport; + uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const dir = tu_edpt_dir(ep_addr); @@ -1314,6 +1319,7 @@ bool usbd_edpt_busy(uint8_t rhport, uint8_t ep_addr) void usbd_edpt_stall(uint8_t rhport, uint8_t ep_addr) { + rhport = _usbd_rhport; uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const dir = tu_edpt_dir(ep_addr); @@ -1330,6 +1336,8 @@ void usbd_edpt_stall(uint8_t rhport, uint8_t ep_addr) void usbd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { + rhport = _usbd_rhport; + uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const dir = tu_edpt_dir(ep_addr); @@ -1361,6 +1369,8 @@ bool usbd_edpt_stalled(uint8_t rhport, uint8_t ep_addr) */ void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr) { + rhport = _usbd_rhport; + TU_ASSERT(dcd_edpt_close, /**/); TU_LOG2(" CLOSING Endpoint: 0x%02X\r\n", ep_addr); @@ -1377,6 +1387,8 @@ void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr) void usbd_sof_enable(uint8_t rhport, bool en) { + rhport = _usbd_rhport; + // TODO: Check needed if all drivers including the user sof_cb does not need an active SOF ISR any more. // Only if all drivers switched off SOF calls the SOF interrupt may be disabled dcd_sof_enable(rhport, en); diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h index 603ffc936..17ebbfcd4 100644 --- a/src/device/usbd_pvt.h +++ b/src/device/usbd_pvt.h @@ -62,6 +62,7 @@ void usbd_int_set(bool enabled); //--------------------------------------------------------------------+ // USBD Endpoint API +// Note: rhport should be 0 since device stack only support 1 rhport for now //--------------------------------------------------------------------+ // Open an endpoint diff --git a/src/tusb_option.h b/src/tusb_option.h index ce22a8a6a..c198e4ef3 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -195,25 +195,21 @@ typedef int make_iso_compilers_happy ; #define OPT_MODE_HIGH_SPEED 0x0400 ///< High Speed #define OPT_MODE_SPEED_MASK 0xff00 -#ifndef CFG_TUSB_RHPORT0_MODE - #define CFG_TUSB_RHPORT0_MODE OPT_MODE_NONE -#endif +//------------- Roothub as Device -------------// -#ifndef CFG_TUSB_RHPORT1_MODE - #define CFG_TUSB_RHPORT1_MODE OPT_MODE_NONE -#endif +//#ifndef CFG_TUSB_RHPORT0_MODE +// #define CFG_TUSB_RHPORT0_MODE OPT_MODE_NONE +//#endif +// +//#ifndef CFG_TUSB_RHPORT1_MODE +// #define CFG_TUSB_RHPORT1_MODE OPT_MODE_NONE +//#endif -#if (((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST ) && ((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST )) || \ - (((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_DEVICE) && ((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_DEVICE)) - #error "TinyUSB currently does not support same modes on more than 1 roothub port" -#endif -//------------- Roothub as Device -------------// - -#if (CFG_TUSB_RHPORT0_MODE) & OPT_MODE_DEVICE +#if defined(CFG_TUSB_RHPORT0_MODE) && ((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_DEVICE) #define TUD_RHPORT_MODE (CFG_TUSB_RHPORT0_MODE) #define TUD_OPT_RHPORT 0 -#elif (CFG_TUSB_RHPORT1_MODE) & OPT_MODE_DEVICE +#elif defined(CFG_TUSB_RHPORT1_MODE) && ((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_DEVICE) #define TUD_RHPORT_MODE (CFG_TUSB_RHPORT1_MODE) #define TUD_OPT_RHPORT 1 #else @@ -222,21 +218,24 @@ typedef int make_iso_compilers_happy ; #endif #ifndef CFG_TUD_ENABLED -#define CFG_TUD_ENABLED (TUD_RHPORT_MODE & OPT_MODE_DEVICE) + // fallback to use CFG_TUSB_RHPORTx_MODE + #define CFG_TUD_ENABLED (TUD_RHPORT_MODE & OPT_MODE_DEVICE) #endif -#if CFG_TUD_ENABLED - #define TUD_OPT_HIGH_SPEED ((TUD_RHPORT_MODE & OPT_MODE_SPEED_MASK) ? (TUD_RHPORT_MODE & OPT_MODE_HIGH_SPEED) : (TUP_RHPORT_HIGHSPEED & (1 << TUD_OPT_RHPORT))) -#else - #define TUD_OPT_HIGH_SPEED 0 +#ifndef CFG_TUD_MAX_SPEED + // fallback to use CFG_TUSB_RHPORTx_MODE + #define CFG_TUD_MAX_SPEED (TUD_RHPORT_MODE & OPT_MODE_SPEED_MASK) #endif +// highspeed support indicator +#define TUD_OPT_HIGH_SPEED (CFG_TUD_MAX_SPEED ? CFG_TUD_MAX_SPEED : TUP_RHPORT_HIGHSPEED) + //------------- Roothub as Host -------------// -#if (CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST +#if defined(CFG_TUSB_RHPORT0_MODE) && ((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST) #define TUH_RHPORT_MODE (CFG_TUSB_RHPORT0_MODE) #define TUH_OPT_RHPORT 0 -#elif (CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST +#elif defined(CFG_TUSB_RHPORT1_MODE) && ((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST) #define TUH_RHPORT_MODE (CFG_TUSB_RHPORT1_MODE) #define TUH_OPT_RHPORT 1 #else @@ -244,7 +243,10 @@ typedef int make_iso_compilers_happy ; #define TUH_OPT_RHPORT -1 #endif -#define CFG_TUH_ENABLED (TUH_RHPORT_MODE & OPT_MODE_HOST) +#ifndef CFG_TUH_ENABLED + // fallback to use CFG_TUSB_RHPORTx_MODE + #define CFG_TUH_ENABLED (TUH_RHPORT_MODE & OPT_MODE_HOST) +#endif // For backward compatible #define TUSB_OPT_DEVICE_ENABLED CFG_TUD_ENABLED -- cgit v1.3.1 From dd035b0eb2ed6ea7fee892d2a832e09f7c5c633c Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 8 Jun 2022 16:08:27 +0700 Subject: make all hcd/dcd function used in isr into ram with __no_inline_not_in_flash_func() for faster irq handling result is 1KB of code moved from rom -> ram --- src/common/tusb_types.h | 14 +++++++------- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 12 ++++++------ src/portable/raspberrypi/rp2040/hcd_rp2040.c | 18 ++++++++++++------ src/portable/raspberrypi/rp2040/rp2040_usb.c | 16 ++++++++-------- src/portable/raspberrypi/rp2040/rp2040_usb.h | 12 ++++++++---- 5 files changed, 41 insertions(+), 31 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index e2fa17532..1f2a38d4c 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -492,23 +492,23 @@ TU_ATTR_BIT_FIELD_ORDER_END //--------------------------------------------------------------------+ // Get direction from Endpoint address -static inline tusb_dir_t tu_edpt_dir(uint8_t addr) +TU_ATTR_ALWAYS_INLINE static inline tusb_dir_t tu_edpt_dir(uint8_t addr) { return (addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT; } // Get Endpoint number from address -static inline uint8_t tu_edpt_number(uint8_t addr) +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_number(uint8_t addr) { return (uint8_t)(addr & (~TUSB_DIR_IN_MASK)); } -static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) { return (uint8_t)(num | (dir ? TUSB_DIR_IN_MASK : 0)); } -static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) { return tu_le16toh(desc_ep->wMaxPacketSize) & TU_GENMASK(10, 0); } @@ -516,18 +516,18 @@ static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) //--------------------------------------------------------------------+ // Descriptor helper //--------------------------------------------------------------------+ -static inline uint8_t const * tu_desc_next(void const* desc) +TU_ATTR_ALWAYS_INLINE static inline uint8_t const * tu_desc_next(void const* desc) { uint8_t const* desc8 = (uint8_t const*) desc; return desc8 + desc8[DESC_OFFSET_LEN]; } -static inline uint8_t tu_desc_type(void const* desc) +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_type(void const* desc) { return ((uint8_t const*) desc)[DESC_OFFSET_TYPE]; } -static inline uint8_t tu_desc_len(void const* desc) +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_len(void const* desc) { return ((uint8_t const*) desc)[DESC_OFFSET_LEN]; } diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index 48793b0d0..3fefc972d 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -55,7 +55,7 @@ static uint8_t *next_buffer_ptr; // USB_MAX_ENDPOINTS Endpoints, direction TUSB_DIR_OUT for out and TUSB_DIR_IN for in. static struct hw_endpoint hw_endpoints[USB_MAX_ENDPOINTS][2]; -static inline struct hw_endpoint *hw_endpoint_get_by_num(uint8_t num, tusb_dir_t dir) +TU_ATTR_ALWAYS_INLINE static inline struct hw_endpoint *hw_endpoint_get_by_num(uint8_t num, tusb_dir_t dir) { return &hw_endpoints[num][dir]; } @@ -185,7 +185,7 @@ static void hw_endpoint_xfer(uint8_t ep_addr, uint8_t *buffer, uint16_t total_by hw_endpoint_xfer_start(ep, buffer, total_bytes); } -static void hw_handle_buff_status(void) +static void __no_inline_not_in_flash_func(hw_handle_buff_status)(void) { uint32_t remaining_buffers = usb_hw->buf_status; pico_trace("buf_status = 0x%08x\n", remaining_buffers); @@ -214,7 +214,7 @@ static void hw_handle_buff_status(void) } } -static void reset_ep0_pid(void) +TU_ATTR_ALWAYS_INLINE static inline void reset_ep0_pid(void) { // If we have finished this transfer on EP0 set pid back to 1 for next // setup transfer. Also clear a stall in case @@ -226,7 +226,7 @@ static void reset_ep0_pid(void) } } -static void reset_non_control_endpoints(void) +static void __no_inline_not_in_flash_func(reset_non_control_endpoints)(void) { // Disable all non-control for ( uint8_t i = 0; i < USB_MAX_ENDPOINTS-1; i++ ) @@ -242,7 +242,7 @@ static void reset_non_control_endpoints(void) next_buffer_ptr = &usb_dpram->epx_data[0]; } -static void dcd_rp2040_irq(void) +static void __no_inline_not_in_flash_func(dcd_rp2040_irq)(void) { uint32_t const status = usb_hw->ints; uint32_t handled = 0; @@ -524,7 +524,7 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) hw_endpoint_close(ep_addr); } -void dcd_int_handler(uint8_t rhport) +void __no_inline_not_in_flash_func(dcd_int_handler)(uint8_t rhport) { (void) rhport; dcd_rp2040_irq(); diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index 54c27ffe3..063a8acd0 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -79,7 +79,7 @@ static struct hw_endpoint *get_dev_ep(uint8_t dev_addr, uint8_t ep_addr) return NULL; } -static inline uint8_t dev_speed(void) +TU_ATTR_ALWAYS_INLINE static inline uint8_t dev_speed(void) { return (usb_hw->sie_status & USB_SIE_STATUS_SPEED_BITS) >> USB_SIE_STATUS_SPEED_LSB; } @@ -91,7 +91,7 @@ static bool need_pre(uint8_t dev_addr) return hcd_port_speed_get(0) != tuh_speed_get(dev_addr); } -static void hw_xfer_complete(struct hw_endpoint *ep, xfer_result_t xfer_result) +static void __no_inline_not_in_flash_func(hw_xfer_complete)(struct hw_endpoint *ep, xfer_result_t xfer_result) { // Mark transfer as done before we tell the tinyusb stack uint8_t dev_addr = ep->dev_addr; @@ -101,7 +101,7 @@ static void hw_xfer_complete(struct hw_endpoint *ep, xfer_result_t xfer_result) hcd_event_xfer_complete(dev_addr, ep_addr, xferred_len, xfer_result, true); } -static void _handle_buff_status_bit(uint bit, struct hw_endpoint *ep) +static void __no_inline_not_in_flash_func(_handle_buff_status_bit)(uint bit, struct hw_endpoint *ep) { usb_hw_clear->buf_status = bit; bool done = hw_endpoint_xfer_continue(ep); @@ -111,7 +111,7 @@ static void _handle_buff_status_bit(uint bit, struct hw_endpoint *ep) } } -static void hw_handle_buff_status(void) +static void __no_inline_not_in_flash_func(hw_handle_buff_status)(void) { uint32_t remaining_buffers = usb_hw->buf_status; pico_trace("buf_status 0x%08x\n", remaining_buffers); @@ -159,7 +159,7 @@ static void hw_handle_buff_status(void) } } -static void hw_trans_complete(void) +static void __no_inline_not_in_flash_func(hw_trans_complete)(void) { if (usb_hw->sie_ctrl & USB_SIE_CTRL_SEND_SETUP_BITS) { @@ -175,7 +175,7 @@ static void hw_trans_complete(void) } } -static void hcd_rp2040_irq(void) +static void __no_inline_not_in_flash_func(hcd_rp2040_irq)(void) { uint32_t status = usb_hw->ints; uint32_t handled = 0; @@ -240,6 +240,12 @@ static void hcd_rp2040_irq(void) } } +void __no_inline_not_in_flash_func(hcd_int_handler)(uint8_t rhport) +{ + (void) rhport; + hcd_rp2040_irq(); +} + static struct hw_endpoint *_next_free_interrupt_ep(void) { struct hw_endpoint *ep = NULL; diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index c93199fd0..ebcc76a4b 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -38,7 +38,7 @@ const char *ep_dir_string[] = { "in", }; -static inline void _hw_endpoint_lock_update(__unused struct hw_endpoint * ep, __unused int delta) { +TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_lock_update(__unused struct hw_endpoint * ep, __unused int delta) { // todo add critsec as necessary to prevent issues between worker and IRQ... // note that this is perhaps as simple as disabling IRQs because it would make // sense to have worker and IRQ on same core, however I think using critsec is about equivalent. @@ -69,7 +69,7 @@ void rp2040_usb_init(void) usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS; } -void hw_endpoint_reset_transfer(struct hw_endpoint *ep) +void __no_inline_not_in_flash_func(hw_endpoint_reset_transfer)(struct hw_endpoint *ep) { ep->active = false; ep->remaining_len = 0; @@ -77,7 +77,7 @@ void hw_endpoint_reset_transfer(struct hw_endpoint *ep) ep->user_buf = 0; } -void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask) { +void __no_inline_not_in_flash_func(_hw_endpoint_buffer_control_update32)(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask) { uint32_t value = 0; if (and_mask) { value = *ep->buffer_control & and_mask; @@ -108,7 +108,7 @@ void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_m } // prepare buffer, return buffer control -static uint32_t prepare_ep_buffer(struct hw_endpoint *ep, uint8_t buf_id) +static uint32_t __no_inline_not_in_flash_func(prepare_ep_buffer)(struct hw_endpoint *ep, uint8_t buf_id) { uint16_t const buflen = tu_min16(ep->remaining_len, ep->wMaxPacketSize); ep->remaining_len = (uint16_t)(ep->remaining_len - buflen); @@ -143,7 +143,7 @@ static uint32_t prepare_ep_buffer(struct hw_endpoint *ep, uint8_t buf_id) } // Prepare buffer control register value -static void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep) +static void __no_inline_not_in_flash_func(_hw_endpoint_start_next_buffer)(struct hw_endpoint *ep) { uint32_t ep_ctrl = *ep->endpoint_control; @@ -205,7 +205,7 @@ void hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t to } // sync endpoint buffer and return transferred bytes -static uint16_t sync_ep_buffer(struct hw_endpoint *ep, uint8_t buf_id) +static uint16_t __no_inline_not_in_flash_func(sync_ep_buffer)(struct hw_endpoint *ep, uint8_t buf_id) { uint32_t buf_ctrl = _hw_endpoint_buffer_control_get_value32(ep); if (buf_id) buf_ctrl = buf_ctrl >> 16; @@ -241,7 +241,7 @@ static uint16_t sync_ep_buffer(struct hw_endpoint *ep, uint8_t buf_id) return xferred_bytes; } -static void _hw_endpoint_xfer_sync (struct hw_endpoint *ep) +static void __no_inline_not_in_flash_func(_hw_endpoint_xfer_sync) (struct hw_endpoint *ep) { // Update hw endpoint struct with info from hardware // after a buff status interrupt @@ -292,7 +292,7 @@ static void _hw_endpoint_xfer_sync (struct hw_endpoint *ep) } // Returns true if transfer is complete -bool hw_endpoint_xfer_continue(struct hw_endpoint *ep) +bool __no_inline_not_in_flash_func(hw_endpoint_xfer_continue)(struct hw_endpoint *ep) { _hw_endpoint_lock_update(ep, 1); // Part way through a transfer diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.h b/src/portable/raspberrypi/rp2040/rp2040_usb.h index da1933ddd..4442e22dc 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.h +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.h @@ -72,16 +72,20 @@ bool hw_endpoint_xfer_continue(struct hw_endpoint *ep); void hw_endpoint_reset_transfer(struct hw_endpoint *ep); void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask); -static inline uint32_t _hw_endpoint_buffer_control_get_value32(struct hw_endpoint *ep) { + +TU_ATTR_ALWAYS_INLINE static inline uint32_t _hw_endpoint_buffer_control_get_value32(struct hw_endpoint *ep) { return *ep->buffer_control; } -static inline void _hw_endpoint_buffer_control_set_value32(struct hw_endpoint *ep, uint32_t value) { + +TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_set_value32(struct hw_endpoint *ep, uint32_t value) { return _hw_endpoint_buffer_control_update32(ep, 0, value); } -static inline void _hw_endpoint_buffer_control_set_mask32(struct hw_endpoint *ep, uint32_t value) { + +TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_set_mask32(struct hw_endpoint *ep, uint32_t value) { return _hw_endpoint_buffer_control_update32(ep, ~value, value); } -static inline void _hw_endpoint_buffer_control_clear_mask32(struct hw_endpoint *ep, uint32_t value) { + +TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_clear_mask32(struct hw_endpoint *ep, uint32_t value) { return _hw_endpoint_buffer_control_update32(ep, ~value, 0); } -- cgit v1.3.1 From 4f6e770eda9f8c605b238f35def1edaff93a8fb8 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 24 Jun 2022 19:45:49 +0700 Subject: add more warning option, also fix -Wconversion with rp2040 -Wuninitialized, -Wunused, -Wredundant-decls --- examples/device/cdc_msc/src/usb_descriptors.c | 2 +- examples/make.mk | 7 ++++- hw/bsp/broadcom_32bit/family.mk | 2 +- hw/bsp/broadcom_64bit/family.mk | 2 +- hw/bsp/imxrt/family.mk | 2 +- hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c | 1 - hw/bsp/nrf/family.mk | 3 ++ hw/bsp/rx/family.mk | 3 ++ hw/bsp/samd21/family.mk | 2 +- hw/bsp/saml2x/family.mk | 2 +- hw/mcu/raspberry_pi/Pico-PIO-USB | 2 +- src/class/cdc/cdc_device.c | 6 ++-- src/class/msc/msc_device.c | 33 +++++++++++----------- src/common/tusb_fifo.c | 12 ++++---- src/device/usbd.c | 16 +++++++---- src/device/usbd_control.c | 2 +- src/portable/synopsys/dwc2/dwc2_stm32.h | 3 +- 17 files changed, 58 insertions(+), 42 deletions(-) (limited to 'src/common') diff --git a/examples/device/cdc_msc/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c index 09894cf1b..6b59ed50f 100644 --- a/examples/device/cdc_msc/src/usb_descriptors.c +++ b/examples/device/cdc_msc/src/usb_descriptors.c @@ -282,7 +282,7 @@ uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid) } // first byte is length (including header), second byte is string type - _desc_str[0] = (TUSB_DESC_STRING << 8 ) | (2*chr_count + 2); + _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2)); return _desc_str; } diff --git a/examples/make.mk b/examples/make.mk index bed46d02b..26065c027 100644 --- a/examples/make.mk +++ b/examples/make.mk @@ -108,8 +108,13 @@ CFLAGS += \ -Wcast-align \ -Wcast-function-type \ -Wcast-qual \ - -Wnull-dereference + -Wnull-dereference \ + -Wuninitialized \ + -Wunused \ + -Wredundant-decls +# -Wconversion \ + # Debugging/Optimization ifeq ($(DEBUG), 1) CFLAGS += -Og diff --git a/hw/bsp/broadcom_32bit/family.mk b/hw/bsp/broadcom_32bit/family.mk index 98744c5d0..cf68e21ee 100644 --- a/hw/bsp/broadcom_32bit/family.mk +++ b/hw/bsp/broadcom_32bit/family.mk @@ -16,7 +16,7 @@ CFLAGS += \ CROSS_COMPILE = arm-none-eabi- # mcu driver cause following warnings -CFLAGS += -Wno-error=cast-qual +CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls SRC_C += \ src/portable/synopsys/dwc2/dcd_dwc2.c \ diff --git a/hw/bsp/broadcom_64bit/family.mk b/hw/bsp/broadcom_64bit/family.mk index 723926734..97af6d64a 100644 --- a/hw/bsp/broadcom_64bit/family.mk +++ b/hw/bsp/broadcom_64bit/family.mk @@ -15,7 +15,7 @@ CFLAGS += \ CROSS_COMPILE = aarch64-none-elf- # mcu driver cause following warnings -CFLAGS += -Wno-error=cast-qual +CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls SRC_C += \ src/portable/synopsys/dwc2/dcd_dwc2.c \ diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk index c81e67eb6..0a55b740b 100644 --- a/hw/bsp/imxrt/family.mk +++ b/hw/bsp/imxrt/family.mk @@ -23,7 +23,7 @@ CFLAGS += -DBOARD_TUH_RHPORT=$(BOARD_TUH_RHPORT) endif # mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=implicit-fallthrough= +CFLAGS += -Wno-error=unused-parameter -Wno-error=implicit-fallthrough -Wno-error=redundant-decls MCU_DIR = $(SDK_DIR)/devices/$(MCU_VARIANT) diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c index cff7bc15e..9793ba241 100644 --- a/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c +++ b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c @@ -52,7 +52,6 @@ void USB_DeviceClockInit (void) //--------------------------------------------------------------------+ // LED -void board_led_write (bool state); extern u32 SystemCoreClock; const int baudrate = 115200; diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk index d8283a9e6..609e2da0b 100644 --- a/hw/bsp/nrf/family.mk +++ b/hw/bsp/nrf/family.mk @@ -16,6 +16,9 @@ CFLAGS += \ # suppress warning caused by vendor mcu driver CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual +# warning caused by dcd_nrf5x.c due to include of usbd.h and re-declare of dcd_int_handler() +CFLAGS += -Wno-error=redundant-decls + # All source paths should be relative to the top level. LD_FILE ?= hw/bsp/nrf/boards/$(BOARD)/nrf52840_s140_v6.ld diff --git a/hw/bsp/rx/family.mk b/hw/bsp/rx/family.mk index aba05812d..f4f8ae088 100644 --- a/hw/bsp/rx/family.mk +++ b/hw/bsp/rx/family.mk @@ -13,6 +13,9 @@ CFLAGS += \ -mlittle-endian-data \ -DSSIZE_MAX=__INT_MAX__ +# suppress warning caused by vendor mcu driver +CFLAGS += -Wno-error=redundant-decls + SRC_C += \ src/portable/renesas/usba/dcd_usba.c \ src/portable/renesas/usba/hcd_usba.c \ diff --git a/hw/bsp/samd21/family.mk b/hw/bsp/samd21/family.mk index 208f23789..95421e753 100644 --- a/hw/bsp/samd21/family.mk +++ b/hw/bsp/samd21/family.mk @@ -13,7 +13,7 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_SAMD21 # suppress warning caused by vendor mcu driver -CFLAGS += -Wno-error=cast-qual +CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls SRC_C += \ src/portable/microchip/samd/dcd_samd.c \ diff --git a/hw/bsp/saml2x/family.mk b/hw/bsp/saml2x/family.mk index bb1faeb7f..afb0afc03 100644 --- a/hw/bsp/saml2x/family.mk +++ b/hw/bsp/saml2x/family.mk @@ -14,7 +14,7 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_SAML22 # suppress warning caused by vendor mcu driver -CFLAGS += -Wno-error=cast-qual +CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls SRC_C += \ src/portable/microchip/samd/dcd_samd.c \ diff --git a/hw/mcu/raspberry_pi/Pico-PIO-USB b/hw/mcu/raspberry_pi/Pico-PIO-USB index 2a9fefd6c..92bd3b4c3 160000 --- a/hw/mcu/raspberry_pi/Pico-PIO-USB +++ b/hw/mcu/raspberry_pi/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit 2a9fefd6ccf42e5d8570ae83fdc54c9c875ebdd1 +Subproject commit 92bd3b4c3ad2fce36166e4a357749b6d4fe9013b diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c index 7aa7a4860..fab6f0035 100644 --- a/src/class/cdc/cdc_device.c +++ b/src/class/cdc/cdc_device.c @@ -145,7 +145,7 @@ uint32_t tud_cdc_n_available(uint8_t itf) uint32_t tud_cdc_n_read(uint8_t itf, void* buffer, uint32_t bufsize) { cdcd_interface_t* p_cdc = &_cdcd_itf[itf]; - uint32_t num_read = tu_fifo_read_n(&p_cdc->rx_ff, buffer, bufsize); + uint32_t num_read = tu_fifo_read_n(&p_cdc->rx_ff, buffer, (uint16_t) bufsize); _prep_out_transaction(p_cdc); return num_read; } @@ -168,7 +168,7 @@ void tud_cdc_n_read_flush (uint8_t itf) uint32_t tud_cdc_n_write(uint8_t itf, void const* buffer, uint32_t bufsize) { cdcd_interface_t* p_cdc = &_cdcd_itf[itf]; - uint16_t ret = tu_fifo_write_n(&p_cdc->tx_ff, buffer, bufsize); + uint16_t ret = tu_fifo_write_n(&p_cdc->tx_ff, buffer, (uint16_t) bufsize); // flush if queue more than packet size if ( tu_fifo_count(&p_cdc->tx_ff) >= BULK_PACKET_SIZE ) @@ -435,7 +435,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_ // Received new data if ( ep_addr == p_cdc->ep_out ) { - tu_fifo_write_n(&p_cdc->rx_ff, &p_cdc->epout_buf, xferred_bytes); + tu_fifo_write_n(&p_cdc->rx_ff, &p_cdc->epout_buf, (uint16_t) xferred_bytes); // Check for wanted char and invoke callback if needed if ( tud_cdc_rx_wanted_cb && (((signed char) p_cdc->wanted_char) != -1) ) diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index 3facb76d6..33dd4ac37 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -463,7 +463,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t { // Didn't check for case 9 (Ho > Dn), which requires examining scsi command first // but it is OK to just receive data then responded with failed status - TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_out, _mscd_buf, p_msc->total_len) ); + TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_out, _mscd_buf, (uint16_t) p_msc->total_len) ); } }else { @@ -473,7 +473,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t // Invoke user callback if not built-in if ( (resplen < 0) && (p_msc->sense_key == 0) ) { - resplen = tud_msc_scsi_cb(p_cbw->lun, p_cbw->command, _mscd_buf, p_msc->total_len); + resplen = tud_msc_scsi_cb(p_cbw->lun, p_cbw->command, _mscd_buf, (uint16_t) p_msc->total_len); } if ( resplen < 0 ) @@ -506,7 +506,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t { // cannot return more than host expect p_msc->total_len = tu_min32((uint32_t) resplen, p_cbw->total_bytes); - TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_in, _mscd_buf, p_msc->total_len) ); + TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_in, _mscd_buf, (uint16_t) p_msc->total_len) ); } } } @@ -541,7 +541,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t // OUT transfer, invoke callback if needed if ( !is_data_in(p_cbw->dir) ) { - int32_t cb_result = tud_msc_scsi_cb(p_cbw->lun, p_cbw->command, _mscd_buf, p_msc->total_len); + int32_t cb_result = tud_msc_scsi_cb(p_cbw->lun, p_cbw->command, _mscd_buf, (uint16_t) p_msc->total_len); if ( cb_result < 0 ) { @@ -707,7 +707,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ read_capa10.block_size = tu_htonl(block_size); resplen = sizeof(read_capa10); - memcpy(buffer, &read_capa10, resplen); + memcpy(buffer, &read_capa10, (size_t) resplen); } } break; @@ -741,7 +741,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ read_fmt_capa.block_size_u16 = tu_htons(block_size); resplen = sizeof(read_fmt_capa); - memcpy(buffer, &read_fmt_capa, resplen); + memcpy(buffer, &read_fmt_capa, (size_t) resplen); } } break; @@ -764,7 +764,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ tud_msc_inquiry_cb(lun, inquiry_rsp.vendor_id, inquiry_rsp.product_id, inquiry_rsp.product_rev); resplen = sizeof(inquiry_rsp); - memcpy(buffer, &inquiry_rsp, resplen); + memcpy(buffer, &inquiry_rsp, (size_t) resplen); } break; @@ -788,7 +788,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ mode_resp.write_protected = !writable; resplen = sizeof(mode_resp); - memcpy(buffer, &mode_resp, resplen); + memcpy(buffer, &mode_resp, (size_t) resplen); } break; @@ -801,17 +801,17 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ }; sense_rsp.add_sense_len = sizeof(scsi_sense_fixed_resp_t) - 8; - sense_rsp.sense_key = p_msc->sense_key; + sense_rsp.sense_key = (uint8_t) (p_msc->sense_key & 0x0F); sense_rsp.add_sense_code = p_msc->add_sense_code; sense_rsp.add_sense_qualifier = p_msc->add_sense_qualifier; resplen = sizeof(sense_rsp); - memcpy(buffer, &sense_rsp, resplen); + memcpy(buffer, &sense_rsp, (size_t) resplen); // request sense callback could overwrite the sense data if (tud_msc_request_sense_cb) { - resplen = tud_msc_request_sense_cb(lun, buffer, bufsize); + resplen = tud_msc_request_sense_cb(lun, buffer, (uint16_t) bufsize); } // Clear sense data after copy @@ -859,7 +859,7 @@ static void proc_read10_cmd(uint8_t rhport, mscd_interface_t* p_msc) } else { - TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_in, _mscd_buf, nbytes), ); + TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_in, _mscd_buf, (uint16_t) nbytes), ); } } @@ -883,7 +883,7 @@ static void proc_write10_cmd(uint8_t rhport, mscd_interface_t* p_msc) } // remaining bytes capped at class buffer - int32_t nbytes = (int32_t) tu_min32(sizeof(_mscd_buf), p_cbw->total_bytes-p_msc->xferred_len); + uint16_t nbytes = (uint16_t) tu_min32(sizeof(_mscd_buf), p_cbw->total_bytes-p_msc->xferred_len); // Write10 callback will be called later when usb transfer complete TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_out, _mscd_buf, nbytes), ); @@ -921,14 +921,15 @@ static void proc_write10_new_data(uint8_t rhport, mscd_interface_t* p_msc, uint3 // Application consume less than what we got (including zero) if ( (uint32_t) nbytes < xferred_bytes ) { + uint32_t const left_over = xferred_bytes - (uint32_t) nbytes; if ( nbytes > 0 ) { - p_msc->xferred_len += nbytes; - memmove(_mscd_buf, _mscd_buf+nbytes, xferred_bytes-nbytes); + p_msc->xferred_len += (uint16_t) nbytes; + memmove(_mscd_buf, _mscd_buf+nbytes, left_over); } // simulate an transfer complete with adjusted parameters --> callback will be invoked with adjusted parameter - dcd_event_xfer_complete(rhport, p_msc->ep_out, xferred_bytes-nbytes, XFER_RESULT_SUCCESS, false); + dcd_event_xfer_complete(rhport, p_msc->ep_out, left_over, XFER_RESULT_SUCCESS, false); } else { diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 183c9c6fc..895b9208b 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -79,7 +79,7 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si // Limit index space to 2*depth - this allows for a fast "modulo" calculation // but limits the maximum depth to 2^16/2 = 2^15 and buffer overflows are detectable // only if overflow happens once (important for unsupervised DMA applications) - f->max_pointer_idx = 2*depth - 1; + f->max_pointer_idx = (uint16_t) (2*depth - 1); f->non_used_index_space = UINT16_MAX - f->max_pointer_idx; f->rd_idx = f->wr_idx = 0; @@ -205,7 +205,7 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t uint8_t rem = nLin_bytes & 0x03; if (rem > 0) { - uint8_t remrem = tu_min16(nWrap_bytes, 4-rem); + uint8_t remrem = (uint8_t) tu_min16(nWrap_bytes, 4-rem); nWrap_bytes -= remrem; uint32_t tmp32 = *rx_fifo; @@ -288,7 +288,7 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rel, tu uint8_t rem = nLin_bytes & 0x03; if (rem > 0) { - uint8_t remrem = tu_min16(nWrap_bytes, 4-rem); + uint8_t remrem = (uint8_t) tu_min16(nWrap_bytes, 4-rem); nWrap_bytes -= remrem; uint32_t tmp32=0; @@ -325,7 +325,7 @@ static uint16_t advance_pointer(tu_fifo_t* f, uint16_t p, uint16_t offset) // We are exploiting the wrap around to the correct index if ((p > (uint16_t)(p + offset)) || ((uint16_t)(p + offset) > f->max_pointer_idx)) { - p = (p + offset) + f->non_used_index_space; + p = (uint16_t) ((p + offset) + f->non_used_index_space); } else { @@ -342,7 +342,7 @@ static uint16_t backward_pointer(tu_fifo_t* f, uint16_t p, uint16_t offset) // We are exploiting the wrap around to the correct index if ((p < (uint16_t)(p - offset)) || ((uint16_t)(p - offset) > f->max_pointer_idx)) { - p = (p - offset) - f->non_used_index_space; + p = (uint16_t) ((p - offset) - f->non_used_index_space); } else { @@ -818,7 +818,7 @@ bool tu_fifo_clear(tu_fifo_t *f) _ff_lock(f->mutex_rd); f->rd_idx = f->wr_idx = 0; - f->max_pointer_idx = 2*f->depth-1; + f->max_pointer_idx = (uint16_t) (2*f->depth-1); f->non_used_index_space = UINT16_MAX - f->max_pointer_idx; _ff_unlock(f->mutex_wr); diff --git a/src/device/usbd.c b/src/device/usbd.c index 1806281ff..fa894accc 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -409,6 +409,7 @@ bool tud_init (uint8_t rhport) for (uint8_t i = 0; i < TOTAL_DRIVER_COUNT; i++) { usbd_class_driver_t const * driver = get_driver(i); + TU_ASSERT(driver); TU_LOG2("%s init\r\n", driver->name); driver->init(); } @@ -426,7 +427,9 @@ static void configuration_reset(uint8_t rhport) { for ( uint8_t i = 0; i < TOTAL_DRIVER_COUNT; i++ ) { - get_driver(i)->reset(rhport); + usbd_class_driver_t const * driver = get_driver(i); + TU_ASSERT(driver, ); + driver->reset(rhport); } tu_varclr(&_usbd_dev); @@ -735,7 +738,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const // Device status bit mask // - Bit 0: Self Powered // - Bit 1: Remote Wakeup enabled - uint16_t status = (_usbd_dev.self_powered ? 1 : 0) | (_usbd_dev.remote_wakeup_en ? 2 : 0); + uint16_t status = (uint16_t) ((_usbd_dev.self_powered ? 1u : 0u) | (_usbd_dev.remote_wakeup_en ? 2u : 0u)); tud_control_xfer(rhport, p_request, &status, 2); } break; @@ -867,8 +870,8 @@ static bool process_set_config(uint8_t rhport, uint8_t cfg_num) TU_ASSERT(desc_cfg != NULL && desc_cfg->bDescriptorType == TUSB_DESC_CONFIGURATION); // Parse configuration descriptor - _usbd_dev.remote_wakeup_support = (desc_cfg->bmAttributes & TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP) ? 1 : 0; - _usbd_dev.self_powered = (desc_cfg->bmAttributes & TUSB_DESC_CONFIG_ATT_SELF_POWERED ) ? 1 : 0; + _usbd_dev.remote_wakeup_support = (desc_cfg->bmAttributes & TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP) ? 1u : 0u; + _usbd_dev.self_powered = (desc_cfg->bmAttributes & TUSB_DESC_CONFIG_ATT_SELF_POWERED ) ? 1u : 0u; // Parse interface descriptor uint8_t const * p_desc = ((uint8_t const*) desc_cfg) + sizeof(tusb_desc_configuration_t); @@ -895,11 +898,12 @@ static bool process_set_config(uint8_t rhport, uint8_t cfg_num) tusb_desc_interface_t const * desc_itf = (tusb_desc_interface_t const*) p_desc; // Find driver for this interface - uint16_t const remaining_len = desc_end-p_desc; + uint16_t const remaining_len = (uint16_t) (desc_end-p_desc); uint8_t drv_id; for (drv_id = 0; drv_id < TOTAL_DRIVER_COUNT; drv_id++) { usbd_class_driver_t const *driver = get_driver(drv_id); + TU_ASSERT(driver); uint16_t const drv_len = driver->open(rhport, desc_itf, remaining_len); if ( (sizeof(tusb_desc_interface_t) <= drv_len) && (drv_len <= remaining_len) ) @@ -1101,7 +1105,7 @@ TU_ATTR_FAST_FUNC void dcd_event_handler(dcd_event_t const * event, bool in_isr) for (uint8_t i = 0; i < TOTAL_DRIVER_COUNT; i++) { usbd_class_driver_t const * driver = get_driver(i); - if (driver->sof) + if (driver && driver->sof) { driver->sof(event->rhport, event->sof.frame_count); } diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c index 4f4108090..94a952df7 100644 --- a/src/device/usbd_control.c +++ b/src/device/usbd_control.c @@ -189,7 +189,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result TU_LOG_MEM(2, _usbd_ctrl_buf, xferred_bytes, 2); } - _ctrl_xfer.total_xferred += xferred_bytes; + _ctrl_xfer.total_xferred += (uint16_t) xferred_bytes; _ctrl_xfer.buffer += xferred_bytes; // Data Stage is complete when all request's length are transferred or diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index b500ddc46..1d849541e 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -103,7 +103,8 @@ static const dwc2_controller_t _dwc2_controller[] = // //--------------------------------------------------------------------+ -extern uint32_t SystemCoreClock; +// SystemCoreClock is alrady included by family header +// extern uint32_t SystemCoreClock; TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_enable(uint8_t rhport) -- cgit v1.3.1 From 60c1750a9bd79e46385680b35e12f116808894f7 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Thu, 30 Jun 2022 22:18:23 +0200 Subject: mimxrt: Add/change definitions for MIMXRT11XX boards. These are mostly identical to the MIMXRT10XX, with one tiny difference. --- hw/bsp/board_mcu.h | 2 +- src/class/audio/audio_device.c | 3 ++- src/common/tusb_mcu.h | 2 +- src/portable/chipidea/ci_hs/ci_hs_imxrt.h | 5 +++++ src/portable/chipidea/ci_hs/dcd_ci_hs.c | 2 +- src/portable/chipidea/ci_hs/hcd_ci_hs.c | 2 +- src/tusb_option.h | 1 + 7 files changed, 12 insertions(+), 5 deletions(-) (limited to 'src/common') diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index 8202479cb..93b1d595f 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -110,7 +110,7 @@ #elif CFG_TUSB_MCU == OPT_MCU_VALENTYUSB_EPTRI // no header needed -#elif CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#elif CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX #include "fsl_device_registers.h" #elif CFG_TUSB_MCU == OPT_MCU_NUC120 diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index 6df68c559..ef0f9c4b7 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -66,7 +66,7 @@ // Use ring buffer if it's available, some MCUs need extra RAM requirements #ifndef TUD_AUDIO_PREFER_RING_BUFFER -#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX #define TUD_AUDIO_PREFER_RING_BUFFER 0 #else #define TUD_AUDIO_PREFER_RING_BUFFER 1 @@ -103,6 +103,7 @@ CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ CFG_TUSB_MCU == OPT_MCU_LPC43XX || \ CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || \ + CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX || \ CFG_TUSB_MCU == OPT_MCU_MSP432E4 #if TUD_AUDIO_PREFER_RING_BUFFER #define USE_LINEAR_BUFFER 0 diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 383a8d686..37866f2a3 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -75,7 +75,7 @@ // TODO USB0 has 5, USB1 has 6 #define TUP_DCD_ENDPOINT_MAX 6 -#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX) +#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX, OPT_MCU_MIMXRT11XX) #define TUP_USBIP_CHIPIDEA_HS #define TUP_USBIP_EHCI diff --git a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h index 78ca5a5a2..a2a0c98f4 100644 --- a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h +++ b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h @@ -29,6 +29,11 @@ #include "fsl_device_registers.h" +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX +#define USB1_BASE USB_OTG1_BASE +#define USB2_BASE USB_OTG2_BASE +#endif + static const ci_hs_controller_t _ci_controller[] = { // RT1010 and RT1020 only has 1 USB controller diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 41d2f1870..0925215ae 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -34,7 +34,7 @@ #include "device/dcd.h" #include "ci_hs_type.h" -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX #include "ci_hs_imxrt.h" #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) #include "ci_hs_lpc18_43.h" diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c index 221721b0f..39b490f72 100644 --- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -29,7 +29,7 @@ // Chipidea Highspeed USB IP implement EHCI for host functionality #if CFG_TUH_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) + (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX) //--------------------------------------------------------------------+ // INCLUDE diff --git a/src/tusb_option.h b/src/tusb_option.h index 206d23e72..0749a5e52 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -99,6 +99,7 @@ typedef int make_iso_compilers_happy; // NXP iMX RT #define OPT_MCU_MIMXRT10XX 700 ///< NXP iMX RT10xx +#define OPT_MCU_MIMXRT11XX 701 ///< NXP iMX RT11xx // Nuvoton #define OPT_MCU_NUC121 800 -- cgit v1.3.1 From ec6f56768a03fcc43158b0d429e8b826825d02f7 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Fri, 1 Jul 2022 08:42:46 +0200 Subject: mimxrt: Change OPT_MCU_MIMXRT1xXX to OPT_MCU_MIMXRT. Which fits both MIMXRT10XX and MIMXRT11XX. --- hw/bsp/board_mcu.h | 2 +- hw/bsp/f1c100s/README.md | 2 +- hw/bsp/imxrt/family.mk | 2 +- src/class/audio/audio_device.c | 5 ++--- src/common/tusb_mcu.h | 2 +- src/portable/chipidea/ci_hs/ci_hs_imxrt.h | 2 +- src/portable/chipidea/ci_hs/dcd_ci_hs.c | 2 +- src/portable/chipidea/ci_hs/hcd_ci_hs.c | 4 ++-- src/portable/nxp/transdimension/dcd_transdimension.c | 6 +++--- src/portable/nxp/transdimension/hcd_transdimension.c | 6 +++--- src/tusb_option.h | 4 ++-- 11 files changed, 18 insertions(+), 19 deletions(-) (limited to 'src/common') diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index 93b1d595f..5c309a21d 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -110,7 +110,7 @@ #elif CFG_TUSB_MCU == OPT_MCU_VALENTYUSB_EPTRI // no header needed -#elif CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX +#elif CFG_TUSB_MCU == OPT_MCU_MIMXRT #include "fsl_device_registers.h" #elif CFG_TUSB_MCU == OPT_MCU_NUC120 diff --git a/hw/bsp/f1c100s/README.md b/hw/bsp/f1c100s/README.md index 325044716..4aa1e153b 100644 --- a/hw/bsp/f1c100s/README.md +++ b/hw/bsp/f1c100s/README.md @@ -17,4 +17,4 @@ Flash: `make BOARD=f1c100s flash` will write the image to SPI flash, and then re ## TODO -* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX` high speed MCU check in examples (maybe we should extract the logic?) \ No newline at end of file +* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT` high speed MCU check in examples (maybe we should extract the logic?) \ No newline at end of file diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk index 0a55b740b..846ecd255 100644 --- a/hw/bsp/imxrt/family.mk +++ b/hw/bsp/imxrt/family.mk @@ -13,7 +13,7 @@ CFLAGS += \ -D__ARMVFP__=0 -D__ARMFPV5__=0\ -DXIP_EXTERNAL_FLASH=1 \ -DXIP_BOOT_HEADER_ENABLE=1 \ - -DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX + -DCFG_TUSB_MCU=OPT_MCU_MIMXRT ifdef BOARD_TUD_RHPORT CFLAGS += -DBOARD_TUD_RHPORT=$(BOARD_TUD_RHPORT) diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index ef0f9c4b7..473d1e910 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -66,7 +66,7 @@ // Use ring buffer if it's available, some MCUs need extra RAM requirements #ifndef TUD_AUDIO_PREFER_RING_BUFFER -#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX +#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT #define TUD_AUDIO_PREFER_RING_BUFFER 0 #else #define TUD_AUDIO_PREFER_RING_BUFFER 1 @@ -102,8 +102,7 @@ CFG_TUSB_MCU == OPT_MCU_GD32VF103 || \ CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ CFG_TUSB_MCU == OPT_MCU_LPC43XX || \ - CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || \ - CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX || \ + CFG_TUSB_MCU == OPT_MCU_MIMXRT || \ CFG_TUSB_MCU == OPT_MCU_MSP432E4 #if TUD_AUDIO_PREFER_RING_BUFFER #define USE_LINEAR_BUFFER 0 diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 37866f2a3..baa82fc14 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -75,7 +75,7 @@ // TODO USB0 has 5, USB1 has 6 #define TUP_DCD_ENDPOINT_MAX 6 -#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX, OPT_MCU_MIMXRT11XX) +#elif TU_CHECK_MCU(OPT_MCU_MIMXRT) #define TUP_USBIP_CHIPIDEA_HS #define TUP_USBIP_EHCI diff --git a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h index a2a0c98f4..53bc8bd00 100644 --- a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h +++ b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h @@ -29,7 +29,7 @@ #include "fsl_device_registers.h" -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX +#if !defined(USB1_BASE) && defined(USB_OTG1_BASE) #define USB1_BASE USB_OTG1_BASE #define USB2_BASE USB_OTG2_BASE #endif diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 0925215ae..c7cc3e0e8 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -34,7 +34,7 @@ #include "device/dcd.h" #include "ci_hs_type.h" -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT #include "ci_hs_imxrt.h" #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) #include "ci_hs_lpc18_43.h" diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c index 39b490f72..d0396daea 100644 --- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -29,7 +29,7 @@ // Chipidea Highspeed USB IP implement EHCI for host functionality #if CFG_TUH_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX) + (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT) //--------------------------------------------------------------------+ // INCLUDE @@ -39,7 +39,7 @@ #include "portable/ehci/ehci_api.h" #include "ci_hs_type.h" -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT #include "ci_hs_imxrt.h" #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) #include "ci_hs_lpc18_43.h" diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c index 2347e1dae..1f27a6872 100644 --- a/src/portable/nxp/transdimension/dcd_transdimension.c +++ b/src/portable/nxp/transdimension/dcd_transdimension.c @@ -27,14 +27,14 @@ #include "tusb_option.h" #if CFG_TUD_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) + (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT) #warning "transdimenion is renamed to chipidea (portable/chipidea/ci_hs) to match other opensource naming convention such as linux. This file will be removed in the future, please update your makefile accordingly" //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT #include "fsl_device_registers.h" #define INCLUDE_FSL_DEVICE_REGISTERS #else @@ -153,7 +153,7 @@ typedef struct const uint8_t ep_count; // Max bi-directional Endpoints }dcd_controller_t; -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT static const dcd_controller_t _dcd_controller[] = { // RT1010 and RT1020 only has 1 USB controller diff --git a/src/portable/nxp/transdimension/hcd_transdimension.c b/src/portable/nxp/transdimension/hcd_transdimension.c index 2d0830981..392764ff6 100644 --- a/src/portable/nxp/transdimension/hcd_transdimension.c +++ b/src/portable/nxp/transdimension/hcd_transdimension.c @@ -29,14 +29,14 @@ // NXP Trans-Dimension USB IP implement EHCI for host functionality #if CFG_TUH_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) + (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT) #warning "transdimenion is renamed to chipidea (portable/chipidea/ci_hs) to match other opensource naming convention such as linux. This file will be removed in the future, please update your makefile accordingly" //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT #include "fsl_device_registers.h" #else // LPCOpen for 18xx & 43xx @@ -58,7 +58,7 @@ typedef struct const IRQn_Type irqnum; // IRQ number }hcd_controller_t; -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT static const hcd_controller_t _hcd_controller[] = { // RT1010 and RT1020 only has 1 USB controller diff --git a/src/tusb_option.h b/src/tusb_option.h index 0749a5e52..a030197f6 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -98,8 +98,8 @@ typedef int make_iso_compilers_happy; #define OPT_MCU_VALENTYUSB_EPTRI 600 ///< Fomu eptri config // NXP iMX RT -#define OPT_MCU_MIMXRT10XX 700 ///< NXP iMX RT10xx -#define OPT_MCU_MIMXRT11XX 701 ///< NXP iMX RT11xx +#define OPT_MCU_MIMXRT 700 ///< NXP iMX RT Series +#define OPT_MCU_MIMXRT10XX OPT_MCU_MIMXRT // Nuvoton #define OPT_MCU_NUC121 800 -- cgit v1.3.1 From 7e4c0f64cd32ee0c73da37703dda2f83ed760132 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 14 Jul 2022 18:39:47 +0700 Subject: abtract attribute fallthrough --- src/common/tusb_compiler.h | 10 ++++++++++ src/host/usbh.c | 4 +--- 2 files changed, 11 insertions(+), 3 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index ae00f4e75..2c30daf6f 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -131,6 +131,12 @@ #define TU_ATTR_BIT_FIELD_ORDER_BEGIN #define TU_ATTR_BIT_FIELD_ORDER_END + #if __has_attribute(__fallthrough__) + #define TU_ATTR_FALLTHROUGH __attribute__((fallthrough)) + #else + #define TU_ATTR_FALLTHROUGH do {} while (0) /* fallthrough */ + #endif + // Endian conversion use well-known host to network (big endian) naming #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ #define TU_BYTE_ORDER TU_LITTLE_ENDIAN @@ -156,6 +162,7 @@ #define TU_ATTR_DEPRECATED(mess) __attribute__ ((deprecated(mess))) // warn if function with this attribute is used #define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused #define TU_ATTR_USED __attribute__ ((used)) + #define TU_ATTR_FALLTHROUGH __attribute__((fallthrough)) #define TU_ATTR_PACKED_BEGIN #define TU_ATTR_PACKED_END @@ -182,6 +189,7 @@ #define TU_ATTR_DEPRECATED(mess) __attribute__ ((deprecated(mess))) // warn if function with this attribute is used #define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused #define TU_ATTR_USED __attribute__ ((used)) // Function/Variable is meant to be used + #define TU_ATTR_FALLTHROUGH __attribute__((fallthrough)) #define TU_ATTR_PACKED_BEGIN #define TU_ATTR_PACKED_END @@ -207,6 +215,7 @@ #define TU_ATTR_DEPRECATED(mess) #define TU_ATTR_UNUSED #define TU_ATTR_USED + #define TU_ATTR_FALLTHROUGH do {} while (0) /* fallthrough */ #define TU_ATTR_PACKED_BEGIN _Pragma("pack") #define TU_ATTR_PACKED_END _Pragma("packoption") @@ -227,6 +236,7 @@ #error "Compiler attribute porting is required" #endif + #if (TU_BYTE_ORDER == TU_LITTLE_ENDIAN) #define tu_htons(u16) (TU_BSWAP16(u16)) diff --git a/src/host/usbh.c b/src/host/usbh.c index 26351d16a..9d618db92 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -655,9 +655,7 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result TU_ASSERT( hcd_edpt_xfer(rhport, dev_addr, tu_edpt_addr(0, request->bmRequestType_bit.direction), _ctrl_xfer.buffer, request->wLength) ); return true; } -#if __GNUC__ >= 7 - __attribute__((fallthrough)); -#endif + TU_ATTR_FALLTHROUGH; case CONTROL_STAGE_DATA: if (request->wLength) -- cgit v1.3.1 From 01edbb8af6b22fa213bcbbaccd92c9be5f72b376 Mon Sep 17 00:00:00 2001 From: Ben Avison Date: Thu, 1 Sep 2022 17:10:26 +0100 Subject: IAR doesn't support __attribute__((fallthrough)) IAR generates warning Pa167 'the "fallthrough" attribute is not supported'. It doesn't generate warnings when one switch case falls through to another, so simply make TU_ATTR_FALLTHROUGH expand to an empty string. Also replace one instance of __attribute__ with the macro. --- src/common/tusb_compiler.h | 2 +- src/host/usbh.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 2c30daf6f..894d0178a 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -189,7 +189,7 @@ #define TU_ATTR_DEPRECATED(mess) __attribute__ ((deprecated(mess))) // warn if function with this attribute is used #define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused #define TU_ATTR_USED __attribute__ ((used)) // Function/Variable is meant to be used - #define TU_ATTR_FALLTHROUGH __attribute__((fallthrough)) + #define TU_ATTR_FALLTHROUGH #define TU_ATTR_PACKED_BEGIN #define TU_ATTR_PACKED_END diff --git a/src/host/usbh.c b/src/host/usbh.c index 32f701248..fb8479419 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -1273,7 +1273,7 @@ static void process_enumeration(tuh_xfer_t* xfer) break; } #endif - __attribute__((fallthrough)); + TU_ATTR_FALLTHROUGH; #endif case ENUM_SET_ADDR: -- cgit v1.3.1 From 8096afc6dea975e95e0b50dc4b55926236b90b62 Mon Sep 17 00:00:00 2001 From: ReimuNotMoe <34613827+ReimuNotMoe@users.noreply.github.com> Date: Thu, 6 Oct 2022 03:45:51 +0800 Subject: Microchip PIC24/dsPIC33 device mode support --- src/common/tusb_mcu.h | 5 ++ src/portable/microchip/pic/dcd_pic.c | 139 +++++++++++++++++++++++++++-------- 2 files changed, 112 insertions(+), 32 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index baa82fc14..514ffcd4d 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -111,6 +111,11 @@ #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER +#elif TU_CHECK_MCU(OPT_MCU_PIC32MX, OPT_MCU_PIC32MM, OPT_MCU_PIC32MK) || \ + TU_CHECK_MCU(OPT_MCU_PIC24, OPT_MCU_DSPIC33) + #define TUP_DCD_ENDPOINT_MAX 16 + #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER + //------------- ST -------------// #elif TU_CHECK_MCU(OPT_MCU_STM32F0) #define TUP_DCD_ENDPOINT_MAX 8 diff --git a/src/portable/microchip/pic/dcd_pic.c b/src/portable/microchip/pic/dcd_pic.c index df9b2ff01..6cf0e6285 100644 --- a/src/portable/microchip/pic/dcd_pic.c +++ b/src/portable/microchip/pic/dcd_pic.c @@ -39,14 +39,10 @@ #if (CFG_TUSB_MCU == OPT_MCU_PIC32MX || CFG_TUSB_MCU == OPT_MCU_PIC32MM || CFG_TUSB_MCU == OPT_MCU_PIC32MK) -#define TU_PIC_HAS_MMU 1 -#define TU_PIC_HAS_HW_RMW 1 #define TU_PIC_INT_SIZE 4 #elif (CFG_TUSB_MCU == OPT_MCU_PIC24 || CFG_TUSB_MCU == OPT_MCU_DSPIC33) -#define TU_PIC_HAS_MMU 0 -#define TU_PIC_HAS_HW_RMW 0 #define TU_PIC_INT_SIZE 2 #else @@ -56,7 +52,7 @@ #endif -#if TU_PIC_HAS_MMU +#if TU_PIC_INT_SIZE == 4 #ifndef KVA_TO_PA #define KVA_TO_PA(kva) ((uint32_t)(kva) & 0x1fffffff) @@ -89,6 +85,8 @@ enum { TOK_PID_SETUP = 0xDu, }; +// The BDT is 8 bytes on 32bit PICs and 4 bytes on 8/16bit PICs +#if TU_PIC_INT_SIZE == 4 typedef struct TU_ATTR_PACKED { union { @@ -119,6 +117,37 @@ typedef struct TU_ATTR_PACKED } buffer_descriptor_t; TU_VERIFY_STATIC( sizeof(buffer_descriptor_t) == 8, "size is not correct" ); +#else +typedef struct TU_ATTR_PACKED +{ + union { + uint16_t head; + + struct { + uint16_t : 10; + uint16_t tok_pid : 4; + uint16_t data : 1; + uint16_t own : 1; + }; + struct { + uint16_t : 10; + uint16_t bdt_stall : 1; + uint16_t dts : 1; + uint16_t ninc : 1; + uint16_t keep : 1; + }; + + struct { + uint16_t bc : 10; + uint16_t : 6; + }; + }; + uint8_t *addr; +} buffer_descriptor_t; + +TU_VERIFY_STATIC( sizeof(buffer_descriptor_t) == 4, "size is not correct" ); +#endif + typedef struct TU_ATTR_PACKED { @@ -142,7 +171,11 @@ typedef struct union { /* [#EP][OUT,IN][EVEN,ODD] */ buffer_descriptor_t bdt[16][2][2]; - uint16_t bda[512]; +#if TU_PIC_INT_SIZE == 4 + uint16_t bda[256]; +#else + uint8_t bda[256]; +#endif }; TU_ATTR_ALIGNED(4) union { endpoint_state_t endpoint[16][2]; @@ -158,7 +191,11 @@ typedef struct // BDT(Buffer Descriptor Table) must be 256-byte aligned CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(512) volatile static dcd_data_t _dcd; +#if TU_PIC_INT_SIZE == 4 TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 512, "size is not correct" ); +#else +TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 256, "size is not correct" ); +#endif #if TU_PIC_INT_SIZE == 4 typedef uint32_t ep_reg_t; @@ -172,7 +209,12 @@ static inline volatile void *ep_addr(uint8_t rhport, uint8_t ep_num) { #else volatile void *ep_reg_base = &U1EP0; #endif - return ep_reg_base + 0x10 * ep_num; +#if TU_PIC_INT_SIZE == 4 + const size_t offset = 0x10; +#else + const size_t offset = 0x2; +#endif + return ep_reg_base + offset * ep_num; } static inline ep_reg_t ep_read(uint8_t rhport, uint8_t ep_num) { @@ -186,7 +228,7 @@ static inline void ep_write(uint8_t rhport, uint8_t ep_num, ep_reg_t val) { } static inline void ep_clear(uint8_t rhport, uint8_t ep_num, ep_reg_t val) { -#if TU_PIC_HAS_HW_RMW +#if TU_PIC_INT_SIZE == 4 volatile ep_reg_t *ep_clr = (ep_addr(rhport, ep_num) + 0x4); *ep_clr = val; #else @@ -197,7 +239,7 @@ static inline void ep_clear(uint8_t rhport, uint8_t ep_num, ep_reg_t val) { } static inline void ep_set(uint8_t rhport, uint8_t ep_num, ep_reg_t val) { -#if TU_PIC_HAS_HW_RMW +#if TU_PIC_INT_SIZE == 4 volatile ep_reg_t *ep_s = (ep_addr(rhport, ep_num) + 0x8); *ep_s = val; #else @@ -278,7 +320,7 @@ static void prepare_next_setup_packet(uint8_t rhport) _dcd.bdt[0][1][in_odd].data = 1; _dcd.bdt[0][1][in_odd ^ 1].data = 0; dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_OUT), - _dcd.setup_packet, sizeof(_dcd.setup_packet)); + _dcd.setup_packet, sizeof(_dcd.setup_packet)); } static void process_stall(uint8_t rhport) @@ -298,7 +340,7 @@ static void process_stall(uint8_t rhport) static void process_tokdne(uint8_t rhport) { - uint32_t s = U1STAT; + ep_reg_t s = U1STAT; U1IR = _U1IR_TRNIF_MASK; @@ -321,7 +363,11 @@ static void process_tokdne(uint8_t rhport) ep->odd = odd ^ 1; if (pid == TOK_PID_SETUP) { dcd_event_setup_received(rhport, (uint8_t *)PA_TO_KVA1(bd->addr), true); +#if TU_PIC_INT_SIZE == 4 U1CONCLR = _U1CON_PKTDIS_TOKBUSY_MASK; +#else + U1CONbits.PKTDIS = 0; +#endif return; } @@ -341,8 +387,8 @@ static void process_tokdne(uint8_t rhport) } const unsigned length = ep->length; dcd_event_xfer_complete(rhport, - tu_edpt_addr(epnum, dir), - length - remaining, XFER_RESULT_SUCCESS, true); + tu_edpt_addr(epnum, dir), + length - remaining, XFER_RESULT_SUCCESS, true); if (0 == epnum && 0 == length) { /* After completion a ZLP of control transfer, * it prepares for the next steup transfer. */ @@ -358,11 +404,16 @@ static void process_tokdne(uint8_t rhport) static void process_bus_reset(uint8_t rhport) { +#if TU_PIC_INT_SIZE == 4 U1PWRCCLR = _U1PWRC_USUSPEND_MASK; U1CONSET = _U1CON_PPBRST_MASK; +#else + U1PWRCbits.USUSPND = 0; + U1CONbits.PPBRST = 1; +#endif U1ADDR = 0; - U1IE = _U1IE_URSTIE_DETACHIE_MASK | _U1IE_TRNIE_MASK | _U1IE_IDLEIE_MASK | + U1IE = _U1IE_URSTIE_MASK | _U1IE_TRNIE_MASK | _U1IE_IDLEIE_MASK | _U1IE_UERRIE_MASK | _U1IE_STALLIE_MASK; U1EP0 = _U1EP0_EPHSHK_MASK | _U1EP0_EPRXEN_MASK | _U1EP0_EPTXEN_MASK; @@ -386,7 +437,11 @@ static void process_bus_reset(uint8_t rhport) tu_memclr(_dcd.endpoint[1], sizeof(_dcd.endpoint) - sizeof(_dcd.endpoint[0])); _dcd.addr = 0; prepare_next_setup_packet(rhport); +#if TU_PIC_INT_SIZE == 4 U1CONCLR = _U1CON_PPBRST_MASK; +#else + U1CONbits.PPBRST = 0; +#endif dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true); } @@ -399,9 +454,15 @@ static void process_bus_sleep(uint8_t rhport) static void process_bus_resume(uint8_t rhport) { // Enable suspend & disable resume interrupt +#if TU_PIC_INT_SIZE == 4 U1PWRCCLR = _U1PWRC_USUSPEND_MASK; U1IECLR = _U1IE_RESUMEIE_MASK; U1IESET = _U1IE_IDLEIE_MASK; +#else + U1PWRCbits.USUSPND = 0; + U1IEbits.RESUMEIE = 0; + U1IEbits.IDLEIE = 1; +#endif dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); } @@ -418,26 +479,29 @@ void dcd_init(uint8_t rhport) TRISBbits.TRISB6 = 1; #endif -#if (CFG_TUSB_MCU == OPT_MCU_PIC32MX) || (CFG_TUSB_MCU == OPT_MCU_PIC32MM) + tu_memclr(&_dcd, sizeof(_dcd)); + +#if TU_PIC_INT_SIZE == 4 U1PWRCSET = _U1PWRC_USBPWR_MASK; -#elif CFG_TUSB_MCU == OPT_MCU_PIC32MK - // TODO -#elif (CFG_TUSB_MCU == OPT_MCU_PIC24) || (CFG_TUSB_MCU == OPT_MCU_DSPIC33) +#else U1PWRCbits.USBPWR = 1; #endif - - tu_memclr(&_dcd, sizeof(_dcd)); - + +#if TU_PIC_INT_SIZE == 4 uint32_t bdt_phys = KVA_TO_PA((uintptr_t)_dcd.bdt); U1BDTP1 = (uint8_t)(bdt_phys >> 8); U1BDTP2 = (uint8_t)(bdt_phys >> 16); U1BDTP3 = (uint8_t)(bdt_phys >> 24); +#else + U1BDTP1 = (uint8_t)((uint16_t)(void *)_dcd.bdt >> 8); - U1IE = _U1IE_URSTIE_DETACHIE_MASK; + U1CNFG1bits.PPB = 2; +#endif - dcd_connect(rhport); + U1IE = _U1IE_URSTIE_MASK; + dcd_connect(rhport); } void dcd_int_enable(uint8_t rhport) @@ -459,18 +523,30 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr) void dcd_remote_wakeup(uint8_t rhport) { +#if TU_PIC_INT_SIZE == 4 U1CONSET = _U1CON_RESUME_MASK; - +#else + U1CONbits.RESUME = 1; +#endif unsigned cnt = 25000000 / 1000; while (cnt--) asm volatile("nop"); +#if TU_PIC_INT_SIZE == 4 U1CONCLR = _U1CON_RESUME_MASK; +#else + U1CONbits.RESUME = 0; +#endif } void dcd_connect(uint8_t rhport) { - while (!U1CONbits.USBEN) + while (!U1CONbits.USBEN) { +#if TU_PIC_INT_SIZE == 4 U1CONSET = _U1CON_USBEN_SOFEN_MASK; +#else + U1CONbits.USBEN = 1; +#endif + } } void dcd_disconnect(uint8_t rhport) @@ -502,14 +578,14 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) ep->max_packet_size = tu_edpt_packet_size(ep_desc); + unsigned val = _U1EP0_EPCONDIS_MASK; val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? _U1EP0_EPHSHK_MASK : 0; val |= dir ? _U1EP0_EPTXEN_MASK : _U1EP0_EPRXEN_MASK; - volatile void *ep_reg_base = &U1EP0; - volatile uint32_t *reg_ep = (ep_reg_base + 0x10 * epn); - - *reg_ep |= val; + ep_reg_t tmp = ep_read(rhport, epn); + tmp |= val; + ep_write(rhport, epn, tmp); if (xfer != TUSB_XFER_ISOCHRONOUS) { bd[odd].dts = 1; @@ -569,6 +645,7 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) { + const unsigned epn = tu_edpt_number(ep_addr); const unsigned dir = tu_edpt_dir(ep_addr); endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; @@ -593,7 +670,6 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to } bd->bc = total_bytes >= mps ? mps: total_bytes; bd->addr = (uint8_t *)KVA_TO_PA(buffer); -// __DSB(); bd->own = 1; /* This bit must be set last */ if (ie) intr_enable(rhport); @@ -673,7 +749,7 @@ void dcd_int_handler(uint8_t rhport) U1IR = is; /* discard any pending events */ } - if (is & _U1IR_URSTIF_DETACHIF_MASK) { + if (is & _U1IR_URSTIF_MASK) { U1IR = is; /* discard any pending events */ process_bus_reset(rhport); } @@ -705,7 +781,6 @@ void dcd_int_handler(uint8_t rhport) } intr_clear(rhport); - } #endif -- cgit v1.3.1 From 4238467b2d78fcb11ba63026daa525d1c09e17ac Mon Sep 17 00:00:00 2001 From: LynnL4 Date: Thu, 13 Oct 2022 17:37:28 +0800 Subject: Add support for STM32U5 mcu --- hw/bsp/board_mcu.h | 3 + .../boards/stm32u575eval/STM32U575AIIXQ_FLASH.ld | 167 +++++++ hw/bsp/stm32u5/boards/stm32u575eval/board.h | 112 +++++ hw/bsp/stm32u5/boards/stm32u575eval/board.mk | 10 + hw/bsp/stm32u5/family.c | 200 ++++++++ hw/bsp/stm32u5/family.mk | 45 ++ hw/bsp/stm32u5/stm32u5xx_hal_conf.h | 506 +++++++++++++++++++++ src/common/tusb_mcu.h | 5 + src/portable/synopsys/dwc2/dwc2_stm32.h | 6 + src/tusb_option.h | 1 + 10 files changed, 1055 insertions(+) create mode 100644 hw/bsp/stm32u5/boards/stm32u575eval/STM32U575AIIXQ_FLASH.ld create mode 100644 hw/bsp/stm32u5/boards/stm32u575eval/board.h create mode 100644 hw/bsp/stm32u5/boards/stm32u575eval/board.mk create mode 100644 hw/bsp/stm32u5/family.c create mode 100644 hw/bsp/stm32u5/family.mk create mode 100644 hw/bsp/stm32u5/stm32u5xx_hal_conf.h (limited to 'src/common') diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index 5c309a21d..18f071a22 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -98,6 +98,9 @@ #elif CFG_TUSB_MCU == OPT_MCU_STM32WB #include "stm32wbxx.h" +#elif CFG_TUSB_MCU == OPT_MCU_STM32U5 + #include "stm32u5xx.h" + #elif CFG_TUSB_MCU == OPT_MCU_CXD56 // no header needed diff --git a/hw/bsp/stm32u5/boards/stm32u575eval/STM32U575AIIXQ_FLASH.ld b/hw/bsp/stm32u5/boards/stm32u575eval/STM32U575AIIXQ_FLASH.ld new file mode 100644 index 000000000..03c022bc2 --- /dev/null +++ b/hw/bsp/stm32u5/boards/stm32u575eval/STM32U575AIIXQ_FLASH.ld @@ -0,0 +1,167 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Author : STM32CubeIDE +** +** Abstract : Linker script for STM32U575xI Device from STM32U5 series +** 2048Kbytes FLASH +** 784Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +** Copyright (c) 2022 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200 ; /* required amount of heap */ +_Min_Stack_Size = 0x400 ; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 768K + SRAM4 (xrw) : ORIGIN = 0x28000000, LENGTH = 16K + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + KEEP(*(.isr_vector)) /* Startup code */ + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + } >FLASH + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } >FLASH + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/hw/bsp/stm32u5/boards/stm32u575eval/board.h b/hw/bsp/stm32u5/boards/stm32u575eval/board.h new file mode 100644 index 000000000..5c348b812 --- /dev/null +++ b/hw/bsp/stm32u5/boards/stm32u575eval/board.h @@ -0,0 +1,112 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022, Hongtai Liu + * Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus +extern "C" +{ +#endif + +// LED GREEN +#define LED_PORT GPIOB +#define LED_PIN GPIO_PIN_7 +#define LED_STATE_ON 1 + +// // LED +#define BUTTON_PORT GPIOC +#define BUTTON_PIN GPIO_PIN_13 +#define BUTTON_STATE_ACTIVE 1 + +// UART Enable for STLink VCOM +#define UART_DEV USART1 +#define UART_CLK_EN __HAL_RCC_USART1_CLK_ENABLE +#define UART_GPIO_PORT GPIOA +#define UART_GPIO_AF GPIO_AF7_USART1 +#define UART_TX_PIN GPIO_PIN_9 +#define UART_RX_PIN GPIO_PIN_10 + +//--------------------------------------------------------------------+ +// RCC Clock +//--------------------------------------------------------------------+ + +static inline void board_clock_init(void) +{ + + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + + /* Enable Power Clock*/ + __HAL_RCC_PWR_CLK_ENABLE(); + + /** Configure the main internal regulator output voltage + */ + HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); + + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 10; + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 2; + RCC_OscInitStruct.PLL.PLLR = 1; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_1; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_CLK48; + PeriphClkInit.IclkClockSelection = RCC_CLK48CLKSOURCE_HSI48; + + HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit); + + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; + + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4); +} + + +#ifdef __cplusplus +} +#endif + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/stm32u5/boards/stm32u575eval/board.mk b/hw/bsp/stm32u5/boards/stm32u575eval/board.mk new file mode 100644 index 000000000..19cd2a5b0 --- /dev/null +++ b/hw/bsp/stm32u5/boards/stm32u575eval/board.mk @@ -0,0 +1,10 @@ +CFLAGS += \ + -DSTM32U575xx \ + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/STM32U575AIIXQ_FLASH.ld + +SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u575xx.s + +# For flash-jlink target +JLINK_DEVICE = stm32u575 diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c new file mode 100644 index 000000000..9bc94cfa3 --- /dev/null +++ b/hw/bsp/stm32u5/family.c @@ -0,0 +1,200 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022, Hongtai Liu + * Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "stm32u5xx_hal.h" +#include "bsp/board.h" +#include "board.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void OTG_FS_IRQHandler(void) +{ + tud_int_handler(0); +} + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM +//--------------------------------------------------------------------+ + +UART_HandleTypeDef UartHandle; + +void board_init(void) +{ + + board_clock_init(); + + // Enable All GPIOs clocks + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + + UART_CLK_EN(); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(OTG_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); +#endif + + GPIO_InitTypeDef GPIO_InitStruct; + + // LED + GPIO_InitStruct.Pin = LED_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); + + // Button + GPIO_InitStruct.Pin = BUTTON_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); + + // IOSV bit MUST be set to access GPIO port G[2:15] */ + HAL_PWREx_EnableVddIO2(); + + // Uart + GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = UART_GPIO_AF; + HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct); + + UartHandle.Instance = UART_DEV; + UartHandle.Init.BaudRate = CFG_BOARD_UART_BAUDRATE; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + UartHandle.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + UartHandle.Init.ClockPrescaler = UART_PRESCALER_DIV1; + UartHandle.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + + HAL_UART_Init(&UartHandle); + + /* Configure USB FS GPIOs */ + /* Configure DM DP Pins */ + GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF10_USB; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* Configure ID pin */ + GPIO_InitStruct.Pin = GPIO_PIN_10; + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Alternate = GPIO_AF10_USB; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + +#if OTG_FS_VBUS_SENSE + // Configure VBUS Pin + GPIO_InitStruct.Pin = GPIO_PIN_9; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + // Enable VBUS sense (B device) via pin PA9 + USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN; +#else + // Disable VBUS sense (B device) via pin PA9 + USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN; + + // B-peripheral session valid override enable + USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN; + USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL; +#endif // vbus sense + + /* Enable USB power on Pwrctrl CR2 register */ + HAL_PWREx_EnableVddUSB(); + + /* USB_OTG_FS clock enable */ + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN); +} + +int board_uart_read(uint8_t *buf, int len) +{ + (void)buf; + (void)len; + return 0; +} + +int board_uart_write(void const *buf, int len) +{ + HAL_UART_Transmit(&UartHandle, (uint8_t *)(uintptr_t)buf, len, 0xffff); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif + +void HardFault_Handler(void) +{ + asm("bkpt"); +} + +// Required by __libc_init_array in startup code if we are compiling using +// -nostdlib/-nostartfiles. +void _init(void) +{ +} diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk new file mode 100644 index 000000000..1cfb81e43 --- /dev/null +++ b/hw/bsp/stm32u5/family.mk @@ -0,0 +1,45 @@ +ST_FAMILY = u5 +DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver + +ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) +ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver + +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m33 \ + -mfloat-abi=hard \ + -mfpu=fpv5-sp-d16 \ + -nostdlib -nostartfiles \ + -DCFG_TUSB_MCU=OPT_MCU_STM32U5 + +# suppress warning caused by vendor mcu driver +CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align -Wno-error=undef -Wno-error=unused-parameter + +#src/portable/st/synopsys/dcd_synopsys.c +SRC_C += \ + src/portable/synopsys/dwc2/dcd_dwc2.c \ + $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c + +INC += \ + $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ + $(TOP)/$(ST_CMSIS)/Include \ + $(TOP)/$(ST_HAL_DRIVER)/Inc \ + $(TOP)/$(BOARD_PATH) + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM33_NTZ/non_secure + +# flash target using on-board stlink +flash: flash-stlink diff --git a/hw/bsp/stm32u5/stm32u5xx_hal_conf.h b/hw/bsp/stm32u5/stm32u5xx_hal_conf.h new file mode 100644 index 000000000..15dffa813 --- /dev/null +++ b/hw/bsp/stm32u5/stm32u5xx_hal_conf.h @@ -0,0 +1,506 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32u5xx_hal_conf.h + * @author MCD Application Team + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32U5xx_HAL_CONF_H +#define STM32U5xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ + +#define HAL_MODULE_ENABLED + +/*#define HAL_ADC_MODULE_ENABLED */ +/*#define HAL_MDF_MODULE_ENABLED */ +/*#define HAL_COMP_MODULE_ENABLED */ +/*#define HAL_CORDIC_MODULE_ENABLED */ +/*#define HAL_CRC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_DAC_MODULE_ENABLED */ +/*#define HAL_DMA2D_MODULE_ENABLED */ +/*#define HAL_DSI_MODULE_ENABLED */ +/*#define HAL_FDCAN_MODULE_ENABLED */ +/*#define HAL_FMAC_MODULE_ENABLED */ +/*#define HAL_GFXMMU_MODULE_ENABLED */ +/*#define HAL_GPU2D_MODULE_ENABLED */ +/*#define HAL_GTZC_MODULE_ENABLED */ +/*#define HAL_HASH_MODULE_ENABLED */ +/*#define HAL_HRTIM_MODULE_ENABLED */ +/*#define HAL_IRDA_MODULE_ENABLED */ +/*#define HAL_IWDG_MODULE_ENABLED */ +/*#define HAL_I2C_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_LPTIM_MODULE_ENABLED */ +/*#define HAL_LTDC_MODULE_ENABLED */ +/*#define HAL_NAND_MODULE_ENABLED */ +/*#define HAL_NOR_MODULE_ENABLED */ +/*#define HAL_OPAMP_MODULE_ENABLED */ +#define HAL_OSPI_MODULE_ENABLED +/*#define HAL_OTFDEC_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/*#define HAL_PKA_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_RNG_MODULE_ENABLED */ +/*#define HAL_RTC_MODULE_ENABLED */ +/*#define HAL_SAI_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_SD_MODULE_ENABLED */ +/*#define HAL_MMC_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +/*#define HAL_SMBUS_MODULE_ENABLED */ +/*#define HAL_SPI_MODULE_ENABLED */ +/*#define HAL_SRAM_MODULE_ENABLED */ +/*#define HAL_TIM_MODULE_ENABLED */ +/*#define HAL_TSC_MODULE_ENABLED */ +/*#define HAL_RAMCFG_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED +/*#define HAL_USART_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ +/*#define HAL_DCMI_MODULE_ENABLED */ +/*#define HAL_PSSI_MODULE_ENABLED */ +#define HAL_ICACHE_MODULE_ENABLED +/*#define HAL_DCACHE_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/*#define HAL_HCD_MODULE_ENABLED */ +/*#define HAL_XSPI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE 16000000UL /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT 100UL /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal Multiple Speed oscillator (MSI) default value. + * This value is the default MSI range value after Reset. + */ +#if !defined (MSI_VALUE) + #define MSI_VALUE 4000000UL /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE 16000000UL /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG. + * This internal oscillator is mainly dedicated to provide a high precision clock to + * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry. + * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency + * which is subject to manufacturing process variations. + */ +#if !defined (HSI48_VALUE) + #define HSI48_VALUE 48000000UL /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. + The real value my vary depending on manufacturing process variations.*/ +#endif /* HSI48_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE 32000UL /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE 32768UL /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT 5000UL /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for SAI1 peripheral + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * frequency. + */ +#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) + #define EXTERNAL_SAI1_CLOCK_VALUE 48000UL /*!< Value of the SAI1 External clock source in Hz*/ +#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ + +#define VDD_VALUE 3300UL /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY (15UL) /*!< tick interrupt priority (lowest by default) */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U /*!< Enable prefetch */ + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ + +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Register callback feature configuration ############### */ +/** + * @brief Set below the peripheral configuration to "1U" to add the support + * of HAL callback registration/unregistration feature for the HAL + * driver(s). This allows user application to provide specific callback + * functions thanks to HAL_PPP_RegisterCallback() rather than overwriting + * the default weak callback functions (see each stm32u5xx_hal_ppp.h file + * for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef + * for each PPP peripheral). + */ +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ +#define USE_HAL_COMP_REGISTER_CALLBACKS 0U /* COMP register callback disabled */ +#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U /* CORDIC register callback disabled */ +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ +#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ +#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ +#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ +#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ +#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U /* FDCAN register callback disabled */ +#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U /* FMAC register callback disabled */ +#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ +#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ +#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U /* GFXMMU register callback disabled */ +#define USE_HAL_GPU2D_REGISTER_CALLBACKS 0U /* GPU2D register callback disabled */ +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ +#define USE_HAL_IWDG_REGISTER_CALLBACKS 0U /* IWDG register callback disabled */ +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ +#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ +#define USE_HAL_MDF_REGISTER_CALLBACKS 0U /* MDF register callback disabled */ +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ +#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ +#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ +#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */ +#define USE_HAL_OTFDEC_REGISTER_CALLBACKS 0U /* OTFDEC register callback disabled */ +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ +#define USE_HAL_PKA_REGISTER_CALLBACKS 0U /* PKA register callback disabled */ +#define USE_HAL_RAMCFG_REGISTER_CALLBACKS 0U /* RAMCFG register callback disabled */ +#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ +#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ +#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ +#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ +#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ +#define USE_HAL_TSC_REGISTER_CALLBACKS 0U /* TSC register callback disabled */ +#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ +#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver + * Activated: CRC code is present inside driver + * Deactivated: CRC code cleaned from driver + */ +#define USE_SPI_CRC 0U + +/* ################## SDMMC peripheral configuration ######################### */ + +#define USE_SD_TRANSCEIVER 0U /*!< use uSD Transceiver */ + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32u5xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32u5xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_ICACHE_MODULE_ENABLED + #include "stm32u5xx_hal_icache.h" +#endif /* HAL_ICACHE_MODULE_ENABLED */ + +#ifdef HAL_DCACHE_MODULE_ENABLED + #include "stm32u5xx_hal_dcache.h" +#endif /* HAL_DCACHE_MODULE_ENABLED */ + +#ifdef HAL_GTZC_MODULE_ENABLED + #include "stm32u5xx_hal_gtzc.h" +#endif /* HAL_GTZC_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32u5xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32u5xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED +#include "stm32u5xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32u5xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_PKA_MODULE_ENABLED + #include "stm32u5xx_hal_pka.h" +#endif /* HAL_PKA_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32u5xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED + #include "stm32u5xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32u5xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32u5xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32u5xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32u5xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32u5xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32u5xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32u5xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32u5xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32u5xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32u5xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32u5xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED +#include "stm32u5xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED +#include "stm32u5xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_OPAMP_MODULE_ENABLED +#include "stm32u5xx_hal_opamp.h" +#endif /* HAL_OPAMP_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32u5xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_OSPI_MODULE_ENABLED + #include "stm32u5xx_hal_ospi.h" +#endif /* HAL_OSPI_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32u5xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32u5xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32u5xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32u5xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32u5xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32u5xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32u5xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_TSC_MODULE_ENABLED + #include "stm32u5xx_hal_tsc.h" +#endif /* HAL_TSC_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32u5xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32u5xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32u5xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32u5xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32u5xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32u5xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32u5xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_CORDIC_MODULE_ENABLED + #include "stm32u5xx_hal_cordic.h" +#endif /* HAL_CORDIC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32u5xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32u5xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_FDCAN_MODULE_ENABLED + #include "stm32u5xx_hal_fdcan.h" +#endif /* HAL_FDCAN_MODULE_ENABLED */ + +#ifdef HAL_FMAC_MODULE_ENABLED + #include "stm32u5xx_hal_fmac.h" +#endif /* HAL_FMAC_MODULE_ENABLED */ + +#ifdef HAL_GFXMMU_MODULE_ENABLED + #include "stm32u5xx_hal_gfxmmu.h" +#endif /* HAL_GFXMMU_MODULE_ENABLED */ + +#ifdef HAL_GPU2D_MODULE_ENABLED + #include "stm32u5xx_hal_gpu2d.h" +#endif /* HAL_GPU2D_MODULE_ENABLED */ + +#ifdef HAL_OTFDEC_MODULE_ENABLED + #include "stm32u5xx_hal_otfdec.h" +#endif /* HAL_OTFDEC_MODULE_ENABLED */ + +#ifdef HAL_PSSI_MODULE_ENABLED + #include "stm32u5xx_hal_pssi.h" +#endif /* HAL_PSSI_MODULE_ENABLED */ + +#ifdef HAL_RAMCFG_MODULE_ENABLED + #include "stm32u5xx_hal_ramcfg.h" +#endif /* HAL_RAMCFG_MODULE_ENABLED */ + +#ifdef HAL_MDF_MODULE_ENABLED + #include "stm32u5xx_hal_mdf.h" +#endif /* HAL_MDF_MODULE_ENABLED */ + +#ifdef HAL_XSPI_MODULE_ENABLED + #include "stm32u5xx_hal_xspi.h" +#endif /* HAL_XSPI_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t *file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32U5xx_HAL_CONF_H */ + diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 514ffcd4d..86c68baf8 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -189,6 +189,11 @@ #elif TU_CHECK_MCU(OPT_MCU_STM32WB) #define TUP_DCD_ENDPOINT_MAX 8 +#elif TU_CHECK_MCU(OPT_MCU_STM32U5) + #define TUP_USBIP_DWC2 + #define TUP_USBIP_DWC2_STM32 + #define TUP_DCD_ENDPOINT_MAX 6 + //------------- Sony -------------// #elif TU_CHECK_MCU(OPT_MCU_CXD56) #define TUP_DCD_ENDPOINT_MAX 7 diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index 337f611d8..ea786362e 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -82,6 +82,12 @@ #define EP_MAX_FS 6 #define EP_FIFO_SIZE_FS 1280 +#elif CFG_TUSB_MCU == OPT_MCU_STM32U5 + #include "stm32u5xx.h" + #define USB_OTG_FS_PERIPH_BASE USB_OTG_FS_BASE + #define EP_MAX_FS 6 + #define EP_FIFO_SIZE_FS 1280 + #else #error "Unsupported MCUs" #endif diff --git a/src/tusb_option.h b/src/tusb_option.h index 4c2dd0258..f95ae6273 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -84,6 +84,7 @@ typedef int make_iso_compilers_happy; #define OPT_MCU_STM32G0 310 ///< ST G0 #define OPT_MCU_STM32G4 311 ///< ST G4 #define OPT_MCU_STM32WB 312 ///< ST WB +#define OPT_MCU_STM32U5 313 ///< ST U5 // Sony #define OPT_MCU_CXD56 400 ///< SONY CXD56 -- cgit v1.3.1 From d2c9b8bcfba42ebc0023154493383b8bcb892020 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 4 Nov 2022 16:14:35 +0700 Subject: fix -wconversion-int and add minor comment --- src/common/tusb_types.h | 8 ++++++-- src/portable/raspberrypi/rp2040/hcd_rp2040.c | 18 ++++++++++-------- 2 files changed, 16 insertions(+), 10 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index cfa24bd82..e11f08dd1 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -513,15 +513,19 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpo return tu_le16toh(desc_ep->wMaxPacketSize) & TU_GENMASK(10, 0); } -static inline const char *tu_edpt_dir_str(tusb_dir_t dir) { +#if CFG_TUSB_DEBUG +TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_dir_str(tusb_dir_t dir) +{ static const char *str[] = {"out", "in"}; return str[dir]; } -static inline const char *tu_edpt_type_str(tusb_xfer_type_t t) { +TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_t t) +{ static const char *str[] = {"control", "isochronous", "bulk", "interrupt"}; return str[t]; } +#endif //--------------------------------------------------------------------+ // Descriptor helper diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index 1125d30b6..10237d1f9 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -138,10 +138,10 @@ static void __tusb_irq_path_func(hw_handle_buff_status)(void) _handle_buff_status_bit(bit, ep); } - // Check interrupt endpoints + // Check "interrupt" (asynchronous) endpoints for both IN and OUT for (uint i = 1; i <= USB_HOST_INTERRUPT_ENDPOINTS && remaining_buffers; i++) { - // EPX is bit 0 + // EPX is bit 0 & 1 // IEP1 IN is bit 2 // IEP1 OUT is bit 3 // IEP2 IN is bit 4 @@ -149,7 +149,8 @@ static void __tusb_irq_path_func(hw_handle_buff_status)(void) // IEP3 IN is bit 6 // IEP3 OUT is bit 7 // etc - for(int j = 0; j < 2; j++){ + for(uint j = 0; j < 2; j++) + { bit = 1 << (i*2+j); if (remaining_buffers & bit) { @@ -279,6 +280,8 @@ static struct hw_endpoint *_hw_endpoint_allocate(uint8_t transfer_type) if (transfer_type != TUSB_XFER_CONTROL) { + // Note: even though datasheet name these "Interrupt" endpoints. These are actually + // "Asynchronous" endpoints and can be used for other type such as: Bulk (ISO need confirmation) ep = _next_free_interrupt_ep(); pico_info("Allocate %s ep %d\n", tu_edpt_type_str(transfer_type), ep->interrupt_num); assert(ep); @@ -344,11 +347,10 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t if (ep != &epx) { // Endpoint has its own addr_endp and interrupt bits to be setup! - // This is an interrupt endpoint - // so need to set up interrupt endpoint address control register with: - // device address - // endpoint number / direction - // preamble + // This is an interrupt/async endpoint. so need to set up ADDR_ENDP register with: + // - device address + // - endpoint number / direction + // - preamble uint32_t reg = (uint32_t) (dev_addr | (num << USB_ADDR_ENDP1_ENDPOINT_LSB)); if (dir == TUSB_DIR_OUT) -- cgit v1.3.1 From b2a3f33046fe736557ad1a4bc9c0da76e47e68f3 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 28 Nov 2022 23:22:10 +0700 Subject: Retry a few times with transfers in enumeration since device can be unstable when starting up --- src/common/tusb_types.h | 2 +- src/host/usbh.c | 24 +++++++++++++++++++----- src/host/usbh.h | 12 ++++++++---- 3 files changed, 28 insertions(+), 10 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index e11f08dd1..1bfa7c7d1 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -225,7 +225,7 @@ enum { typedef enum { - XFER_RESULT_SUCCESS, + XFER_RESULT_SUCCESS = 0, XFER_RESULT_FAILED, XFER_RESULT_STALLED, XFER_RESULT_TIMEOUT, diff --git a/src/host/usbh.c b/src/host/usbh.c index 9d618db92..a5abac843 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -620,9 +620,7 @@ static void _xfer_complete(uint8_t daddr, xfer_result_t result) .user_data = _ctrl_xfer.user_data }; - usbh_lock(); - _ctrl_xfer.stage = CONTROL_STAGE_IDLE; - usbh_unlock(); + _set_control_xfer_stage(CONTROL_STAGE_IDLE); if (xfer_temp.complete_cb) { @@ -1182,12 +1180,28 @@ static void enum_full_complete(void); // process device enumeration static void process_enumeration(tuh_xfer_t* xfer) { + // Retry a few times with transfers in enumeration since device can be unstable when starting up + enum { + ATTEMPT_COUNT_MAX = 3, + ATTEMPT_DELAY_MS = 10 + }; + static uint8_t failed_count = 0; + if (XFER_RESULT_SUCCESS != xfer->result) { - // stop enumeration, maybe we could retry this - enum_full_complete(); + // retry if not reaching max attempt + if ( failed_count < ATTEMPT_COUNT_MAX ) + { + failed_count++; + osal_task_delay(ATTEMPT_DELAY_MS); // delay a bit + TU_ASSERT(tuh_control_xfer(xfer), ); + }else + { + enum_full_complete(); + } return; } + failed_count = 0; uint8_t const daddr = xfer->daddr; uintptr_t const state = xfer->user_data; diff --git a/src/host/usbh.h b/src/host/usbh.h index 1a26a69b4..37de7093c 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -51,14 +51,15 @@ struct tuh_xfer_s { uint8_t daddr; uint8_t ep_addr; - + uint8_t TU_RESERVED; // reserved xfer_result_t result; + uint32_t actual_len; // excluding setup packet union { tusb_control_request_t const* setup; // setup packet pointer if control transfer - uint32_t buflen; // expected length if not control transfer (not available in callback) + uint32_t buflen; // expected length if not control transfer (not available in callback) }; uint8_t* buffer; // not available in callback if not control transfer @@ -80,10 +81,13 @@ enum //TU_ATTR_WEAK uint8_t tuh_attach_cb (tusb_desc_device_t const *desc_device); -// Invoked when device is mounted (configured) +// Invoked when a device is mounted (configured) TU_ATTR_WEAK void tuh_mount_cb (uint8_t daddr); -/// Invoked when device is unmounted (bus reset/unplugged) +// Invoked when a device failed to mount during enumeration process +// TU_ATTR_WEAK void tuh_mount_failed_cb (uint8_t daddr); + +/// Invoked when a device is unmounted (detached) TU_ATTR_WEAK void tuh_umount_cb(uint8_t daddr); //--------------------------------------------------------------------+ -- cgit v1.3.1 From 6a2cf6728906aa61b44ecfe43b4ceef287b29bf8 Mon Sep 17 00:00:00 2001 From: Bastien Nocera Date: Sun, 4 Dec 2022 13:58:47 +0700 Subject: Fix typos --- .github/ISSUE_TEMPLATE/bug_report.yml | 2 +- docs/contributing/porting.rst | 4 ++-- docs/info/changelog.rst | 22 +++++++++++----------- examples/device/cdc_msc/src/main.c | 2 +- examples/device/cdc_msc_freertos/CMakeLists.txt | 2 +- examples/device/dfu_runtime/src/main.c | 2 +- examples/device/hid_boot_interface/src/main.c | 6 +++--- examples/host/cdc_msc_hid/src/hid_app.c | 2 +- hw/bsp/ansi_escape.h | 2 +- .../led_strip/src/led_strip_rmt_ws2812.c | 2 +- .../led_strip/src/led_strip_rmt_ws2812.c | 2 +- hw/bsp/family_support.cmake | 4 ++-- hw/bsp/gd32vf103/family.c | 2 +- hw/bsp/gd32vf103/system_gd32vf103.c | 2 +- .../evkmimxrt1010_flexspi_nor_config.h | 10 +++++----- .../evkmimxrt1015_flexspi_nor_config.h | 10 +++++----- .../evkmimxrt1020_flexspi_nor_config.h | 10 +++++----- .../evkbimxrt1050_flexspi_nor_config.h | 10 +++++----- .../evkmimxrt1060_flexspi_nor_config.h | 10 +++++----- .../evkmimxrt1064_flexspi_nor_config.h | 10 +++++----- .../boards/teensy_40/teensy40_flexspi_nor_config.h | 10 +++++----- .../boards/teensy_41/teensy41_flexspi_nor_config.h | 10 +++++----- hw/bsp/imxrt/family.mk | 2 +- hw/bsp/lpc54/family.c | 4 ++-- hw/bsp/lpc55/family.c | 4 ++-- hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld | 2 +- hw/bsp/rp2040/family.c | 2 +- .../stm32f070rbnucleo/stm32F070rbtx_flash.ld | 2 +- .../boards/stm32f072disco/STM32F072RBTx_FLASH.ld | 2 +- .../boards/stm32f103_bluepill/STM32F103X8_FLASH.ld | 2 +- .../boards/stm32f103_mini_2/STM32F103XC_FLASH.ld | 2 +- hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld | 2 +- hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld | 2 +- .../feather_stm32f405/STM32F405RGTx_FLASH.ld | 2 +- .../boards/pyboardv11/STM32F405RGTx_FLASH.ld | 2 +- .../stm32f401blackpill/STM32F401VCTx_FLASH.ld | 2 +- hw/bsp/stm32f4/boards/stm32f401blackpill/board.h | 2 +- .../boards/stm32f407disco/STM32F407VGTx_FLASH.ld | 2 +- .../stm32f411blackpill/STM32F411CEUx_FLASH.ld | 2 +- hw/bsp/stm32f4/boards/stm32f411blackpill/board.h | 2 +- .../boards/stm32f411disco/STM32F411VETx_FLASH.ld | 2 +- .../boards/stm32f412disco/STM32F412ZGTx_FLASH.ld | 2 +- .../boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld | 2 +- .../boards/stlinkv3mini/STM32F723xE_FLASH.ld | 2 +- .../boards/stm32f723disco/STM32F723xE_FLASH.ld | 2 +- .../boards/stm32f746disco/STM32F746ZGTx_FLASH.ld | 2 +- .../boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld | 2 +- .../boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld | 2 +- .../boards/stm32f769disco/STM32F769ZITx_FLASH.ld | 2 +- hw/bsp/stm32g4/boards/stm32g474nucleo/board.h | 4 ++-- .../boards/stm32h743eval/stm32h743xx_flash.ld | 2 +- .../boards/stm32h743nucleo/stm32h743xx_flash.ld | 2 +- .../waveshare_openh743i/STM32H743IITX_FLASH.ld | 2 +- hw/bsp/stm32h7/boards/waveshare_openh743i/board.h | 2 +- .../boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld | 2 +- hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld | 2 +- .../boards/stm32l476disco/STM32L476VGTx_FLASH.ld | 2 +- .../boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld | 2 +- hw/bsp/stm32wb/boards/stm32wb55nucleo/board.h | 4 ++-- hw/bsp/tm4c123/family.c | 2 +- lib/SEGGER_RTT/RTT/SEGGER_RTT.c | 2 +- lib/networking/dnserver.c | 8 ++++---- lib/networking/ndis.h | 2 +- lib/networking/rndis_reports.c | 2 +- src/class/cdc/cdc.h | 2 +- src/class/cdc/cdc_rndis_host.c | 2 +- src/class/hid/hid_host.h | 2 +- src/class/msc/msc_host.c | 4 ++-- src/class/msc/msc_host.h | 2 +- src/class/net/ecm_rndis_device.c | 2 +- src/class/usbtmc/usbtmc.h | 2 +- src/class/usbtmc/usbtmc_device.h | 2 +- src/common/tusb_fifo.c | 8 ++++---- src/common/tusb_fifo.h | 4 ++-- src/device/usbd.h | 2 +- src/host/usbh.c | 4 ++-- src/portable/bridgetek/ft9xx/dcd_ft9xx.c | 6 +++--- src/portable/ehci/ehci.c | 4 ++-- src/portable/ehci/ehci.h | 10 +++++----- src/portable/espressif/esp32sx/dcd_esp32sx.c | 2 +- src/portable/microchip/pic32mz/usbhs_registers.h | 6 +++--- src/portable/microchip/samx7x/dcd_samx7x.c | 6 +++--- src/portable/nuvoton/nuc505/dcd_nuc505.c | 2 +- src/portable/ohci/ohci.c | 2 +- src/portable/ohci/ohci.h | 2 +- src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 2 +- src/portable/sunxi/dcd_sunxi_musb.c | 2 +- src/portable/sunxi/musb_def.h | 2 +- src/portable/synopsys/dwc2/dcd_dwc2.c | 2 +- src/portable/synopsys/dwc2/dwc2_stm32.h | 2 +- 90 files changed, 160 insertions(+), 160 deletions(-) (limited to 'src/common') diff --git a/.github/ISSUE_TEMPLATE/bug_report.yml b/.github/ISSUE_TEMPLATE/bug_report.yml index 2958d3b12..8c39b95e1 100644 --- a/.github/ISSUE_TEMPLATE/bug_report.yml +++ b/.github/ISSUE_TEMPLATE/bug_report.yml @@ -64,7 +64,7 @@ body: placeholder: | Attach your debug log txt file here, where the issue occurred, best with comments to explain the actual events. - Note1: Please DO NOT paste your lengthy log contents here since it hurts the readibility. + Note1: Please DO NOT paste your lengthy log contents here since it hurts the readability. Note2: To enable logging, add `LOG=3` to to the make command if building with stock examples or set `CFG_TUSB_DEBUG=3` in your tusb_config.h. More information can be found at [example's readme](https://github.com/hathach/tinyusb/blob/master/docs/getting_started.md) validations: diff --git a/docs/contributing/porting.rst b/docs/contributing/porting.rst index 7e9e462f0..710af51c3 100644 --- a/docs/contributing/porting.rst +++ b/docs/contributing/porting.rst @@ -195,7 +195,7 @@ Others (like the nRF52) may need each USB packet queued individually. To make th some state for yourself and queue up an intermediate USB packet from the interrupt handler. Once the transaction is going, the interrupt handler will notify TinyUSB of transfer completion. -During transmission, the IN data buffer is guarenteed to remain unchanged in memory until the ``dcd_xfer_complete`` function is called. +During transmission, the IN data buffer is guaranteed to remain unchanged in memory until the ``dcd_xfer_complete`` function is called. The dcd_edpt_xfer function must never add zero-length-packets (ZLP) on its own to a transfer. If a ZLP is required, then it must be explicitly sent by the stack calling dcd_edpt_xfer(), by calling dcd_edpt_xfer() a second time with len=0. @@ -238,4 +238,4 @@ Use `WireShark `_ or `a Beagle PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK; CLOCK_DisableClock(kCLOCK_Usbhsl0); /* disable usb0 host clock */ @@ -182,7 +182,7 @@ void board_init(void) // Port1 is High Speed POWER_DisablePD(kPDRUNCFG_PD_USB1_PHY); - /*According to reference mannual, device mode setting has to be set by access usb host register */ + /*According to reference manual, device mode setting has to be set by access usb host register */ CLOCK_EnableClock(kCLOCK_Usbh1); /* enable usb1 host clock */ USBHSH->PORTMODE |= USBHSH_PORTMODE_DEV_ENABLE_MASK; CLOCK_DisableClock(kCLOCK_Usbh1); /* enable usb1 host clock */ diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c index e7aed5759..5b6c56dd3 100644 --- a/hw/bsp/lpc55/family.c +++ b/hw/bsp/lpc55/family.c @@ -192,7 +192,7 @@ void board_init(void) CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false); CLOCK_AttachClk(kFRO_HF_to_USB0_CLK); - /*According to reference mannual, device mode setting has to be set by access usb host register */ + /*According to reference manual, device mode setting has to be set by access usb host register */ CLOCK_EnableClock(kCLOCK_Usbhsl0); // enable usb0 host clock USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK; CLOCK_DisableClock(kCLOCK_Usbhsl0); // disable usb0 host clock @@ -213,7 +213,7 @@ void board_init(void) RESET_PeripheralReset(kUSB1_RST_SHIFT_RSTn); RESET_PeripheralReset(kUSB1RAM_RST_SHIFT_RSTn); - /* According to reference mannual, device mode setting has to be set by access usb host register */ + /* According to reference manual, device mode setting has to be set by access usb host register */ CLOCK_EnableClock(kCLOCK_Usbh1); // enable usb0 host clock USBHSH->PORTMODE = USBHSH_PORTMODE_SW_PDCOM_MASK; // Put PHY powerdown under software control diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld b/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld index d96d6e43d..0b45ee7bd 100644 --- a/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld +++ b/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld @@ -126,7 +126,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c index 26008168d..f7ee56990 100644 --- a/hw/bsp/rp2040/family.c +++ b/hw/bsp/rp2040/family.c @@ -226,6 +226,6 @@ int board_getchar(void) //--------------------------------------------------------------------+ // USB Interrupt Handler -// rp2040 implementation will install approriate handler when initializing +// rp2040 implementation will install appropriate handler when initializing // tinyusb. There is no need to forward IRQ from application //--------------------------------------------------------------------+ diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld index 59e18f375..4a6491510 100644 --- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld +++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld @@ -165,7 +165,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld b/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld index 8d31f6a00..f0879e929 100644 --- a/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld +++ b/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld b/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld index ca1804905..c434ca038 100644 --- a/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld +++ b/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld b/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld index da40d1eb2..da637d1b0 100644 --- a/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld +++ b/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld b/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld index 29e387f28..5010435ae 100644 --- a/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld +++ b/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld b/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld index ca9046d29..7f46c71b2 100644 --- a/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld +++ b/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld @@ -150,7 +150,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld b/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld index 57ef61e26..9eb53bcc0 100644 --- a/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld @@ -150,7 +150,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld b/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld index 57ef61e26..9eb53bcc0 100644 --- a/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld @@ -150,7 +150,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld index f51f1ab41..2bc5f6c14 100644 --- a/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h index 0f820512c..e1fef7277 100644 --- a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h +++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h @@ -93,7 +93,7 @@ static inline void board_clock_init(void) static inline void board_vbus_sense_init(void) { - // Blackpill doens't use VBUS sense (B device) explicitly disable it + // Blackpill doesn't use VBUS sense (B device) explicitly disable it USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS; USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN; USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN; diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld index c41602720..aac6577ea 100644 --- a/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld @@ -150,7 +150,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld index efea1e067..56dcea605 100644 --- a/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h index 0f820512c..e1fef7277 100644 --- a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h +++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h @@ -93,7 +93,7 @@ static inline void board_clock_init(void) static inline void board_vbus_sense_init(void) { - // Blackpill doens't use VBUS sense (B device) explicitly disable it + // Blackpill doesn't use VBUS sense (B device) explicitly disable it USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS; USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN; USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN; diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld index 3a0ce526f..4477229ea 100644 --- a/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld index b00b5dbe0..2372cc1d9 100644 --- a/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld index b00b5dbe0..2372cc1d9 100644 --- a/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f7/boards/stlinkv3mini/STM32F723xE_FLASH.ld b/hw/bsp/stm32f7/boards/stlinkv3mini/STM32F723xE_FLASH.ld index 8645ce5c5..f4be85703 100644 --- a/hw/bsp/stm32f7/boards/stlinkv3mini/STM32F723xE_FLASH.ld +++ b/hw/bsp/stm32f7/boards/stlinkv3mini/STM32F723xE_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f7/boards/stm32f723disco/STM32F723xE_FLASH.ld b/hw/bsp/stm32f7/boards/stm32f723disco/STM32F723xE_FLASH.ld index 8645ce5c5..f4be85703 100644 --- a/hw/bsp/stm32f7/boards/stm32f723disco/STM32F723xE_FLASH.ld +++ b/hw/bsp/stm32f7/boards/stm32f723disco/STM32F723xE_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/STM32F746ZGTx_FLASH.ld b/hw/bsp/stm32f7/boards/stm32f746disco/STM32F746ZGTx_FLASH.ld index 045ec76f9..eeb0e29f3 100644 --- a/hw/bsp/stm32f7/boards/stm32f746disco/STM32F746ZGTx_FLASH.ld +++ b/hw/bsp/stm32f7/boards/stm32f746disco/STM32F746ZGTx_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld b/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld index b434a01b7..e1e60bc78 100644 --- a/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld +++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld b/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld index 0b6d5a494..3785f9cbf 100644 --- a/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld +++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32f7/boards/stm32f769disco/STM32F769ZITx_FLASH.ld b/hw/bsp/stm32f7/boards/stm32f769disco/STM32F769ZITx_FLASH.ld index 378ed80dd..520a75539 100644 --- a/hw/bsp/stm32f7/boards/stm32f769disco/STM32F769ZITx_FLASH.ld +++ b/hw/bsp/stm32f7/boards/stm32f769disco/STM32F769ZITx_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.h b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.h index eab0bd5f0..aa2bf20bb 100644 --- a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.h +++ b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.h @@ -66,7 +66,7 @@ static inline void board_clock_init(void) // Configure the main internal regulator output voltage HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST); - // Initializes the CPU, AHB and APB busses clocks + // Initializes the CPU, AHB and APB buses clocks RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; @@ -79,7 +79,7 @@ static inline void board_clock_init(void) RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; HAL_RCC_OscConfig(&RCC_OscInitStruct); - // Initializes the CPU, AHB and APB busses clocks + // Initializes the CPU, AHB and APB buses clocks RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld b/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld index 59b9ff4df..7ee40671c 100644 --- a/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld +++ b/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld @@ -134,7 +134,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld b/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld index 59b9ff4df..7ee40671c 100644 --- a/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld +++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld @@ -134,7 +134,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld b/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld index 73d2dedb2..e99bb977b 100644 --- a/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld +++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld @@ -138,7 +138,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h index 09442c233..2b072e07c 100644 --- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h +++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h @@ -186,7 +186,7 @@ static inline void timer_board_delay(TIM_HandleTypeDef* tim_hdl, uint32_t ms) static inline void board_stm32h7_post_init(void) { - // walkaround for reseting the ULPI PHY using Timer since systick is not + // walkaround for resetting the ULPI PHY using Timer since systick is not // available when RTOS is used. // Init timer diff --git a/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld b/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld index 1bc16cc7b..dfefe59f1 100644 --- a/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld +++ b/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld b/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld index 787418e09..79427d80b 100644 --- a/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld +++ b/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld index 98f468ac0..d6865f49d 100644 --- a/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld +++ b/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld @@ -144,7 +144,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld index f93a16041..f77c72d1b 100644 --- a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld +++ b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld @@ -130,7 +130,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/hw/bsp/stm32wb/boards/stm32wb55nucleo/board.h b/hw/bsp/stm32wb/boards/stm32wb55nucleo/board.h index f42c7d6dd..ea975df03 100644 --- a/hw/bsp/stm32wb/boards/stm32wb55nucleo/board.h +++ b/hw/bsp/stm32wb/boards/stm32wb55nucleo/board.h @@ -59,7 +59,7 @@ static inline void board_clock_init(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - // Initializes the CPU, AHB and APB busses clocks + // Initializes the CPU, AHB and APB buses clocks RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; @@ -72,7 +72,7 @@ static inline void board_clock_init(void) RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3; HAL_RCC_OscConfig(&RCC_OscInitStruct); - // Initializes the CPU, AHB and APB busses clocks + // Initializes the CPU, AHB and APB buses clocks RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; diff --git a/hw/bsp/tm4c123/family.c b/hw/bsp/tm4c123/family.c index b0947d6c4..87b94289b 100644 --- a/hw/bsp/tm4c123/family.c +++ b/hw/bsp/tm4c123/family.c @@ -39,7 +39,7 @@ static void board_uart_init (void) UART0->LCRH = (0x3 << 5); // 8-bit, no parity, 1 stop bit UART0->CC = 0x0; // Configure the UART clock source as system clock - UART0->CTL = (1 << 0) | (1 << 8) | (1 << 9); // UART0 Enable, Transmit Enable, Recieve Enable + UART0->CTL = (1 << 0) | (1 << 8) | (1 << 9); // UART0 Enable, Transmit Enable, Receive Enable } static void initialize_board_led (GPIOA_Type *port, uint8_t PinMsk, uint8_t dirmsk) diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c index 3ad2b1a12..a7ae013dd 100644 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c +++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c @@ -1404,7 +1404,7 @@ int SEGGER_RTT_GetKey(void) { * SEGGER_RTT_WaitKey * * Function description -* Waits until at least one character is avaible in the SEGGER RTT buffer. +* Waits until at least one character is available in the SEGGER RTT buffer. * Once a character is available, it is read and this function returns. * * Return value diff --git a/lib/networking/dnserver.c b/lib/networking/dnserver.c index e4e7c3492..539cc2cea 100644 --- a/lib/networking/dnserver.c +++ b/lib/networking/dnserver.c @@ -93,11 +93,11 @@ static uint16_t get_uint16(const uint8_t *pnt) static int parse_next_query(void *data, int size, dns_query_t *query) { int len; - int lables; + int labels; uint8_t *ptr; len = 0; - lables = 0; + labels = 0; ptr = (uint8_t *)data; while (true) @@ -107,7 +107,7 @@ static int parse_next_query(void *data, int size, dns_query_t *query) lable_len = *ptr++; size--; if (lable_len == 0) break; - if (lables > 0) + if (labels > 0) { if (len == DNS_MAX_HOST_NAME_LEN) return -2; query->name[len++] = '.'; @@ -118,7 +118,7 @@ static int parse_next_query(void *data, int size, dns_query_t *query) len += lable_len; ptr += lable_len; size -= lable_len; - lables++; + labels++; } if (size < 4) return -1; diff --git a/lib/networking/ndis.h b/lib/networking/ndis.h index 1c737574c..06258e6bb 100644 --- a/lib/networking/ndis.h +++ b/lib/networking/ndis.h @@ -22,7 +22,7 @@ * ntddndis.h modified by Benedikt Spranger * * Thanks to the cygwin development team, - * espacially to Casper S. Hornstrup + * especially to Casper S. Hornstrup * * THIS SOFTWARE IS NOT COPYRIGHTED * diff --git a/lib/networking/rndis_reports.c b/lib/networking/rndis_reports.c index ee611c883..d129466c8 100644 --- a/lib/networking/rndis_reports.c +++ b/lib/networking/rndis_reports.c @@ -220,7 +220,7 @@ static void rndis_handle_set_msg(void) case OID_802_3_MULTICAST_LIST: break; - /* Power Managment: fails for now */ + /* Power Management: fails for now */ case OID_PNP_ADD_WAKE_UP_PATTERN: case OID_PNP_REMOVE_WAKE_UP_PATTERN: case OID_PNP_ENABLE_WAKE_UP: diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h index e345139ea..c428af865 100644 --- a/src/class/cdc/cdc.h +++ b/src/class/cdc/cdc.h @@ -193,7 +193,7 @@ typedef enum }cdc_management_request_t; //--------------------------------------------------------------------+ -// Management Elemenent Notification (Notification Endpoint) +// Management Element Notification (Notification Endpoint) //--------------------------------------------------------------------+ /// 6.3 Notification Codes diff --git a/src/class/cdc/cdc_rndis_host.c b/src/class/cdc/cdc_rndis_host.c index 8f28f51ac..44de85b45 100644 --- a/src/class/cdc/cdc_rndis_host.c +++ b/src/class/cdc/cdc_rndis_host.c @@ -117,7 +117,7 @@ void rndish_init(void) //------------- Task creation -------------// - //------------- semaphore creation for notificaiton pipe -------------// + //------------- semaphore creation for notification pipe -------------// for(uint8_t i=0; iMSC0CFG = SYS->MSC0CFG | MASK_SYS_MSC0CFG_DEV_RMWAKEUP; - // Atleast 2 ms of delay needed for RESUME Data K state. + // At least 2 ms of delay needed for RESUME Data K state. delayms(2); SYS->MSC0CFG &= ~MASK_SYS_MSC0CFG_DEV_RMWAKEUP; @@ -720,7 +720,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc) else total_ram = USBD_RAMTOTAL_OUT; // Work out how much has been allocated to existing endpoints. - // The total RAM allocated shoudl alsyes be a positive number as this + // The total RAM allocated should always be a positive number as this // algorithm should not let it go below zero. for (int i = 1; i < USBD_MAX_ENDPOINT_COUNT; i++) { @@ -976,7 +976,7 @@ void dcd_int_handler(uint8_t rhport) USBD_EP_SR_REG(USBD_EP_0) = MASK_USBD_EP0SR_STALL; } - // Host has sent a SETUP packet. Recieve this into the setup packet store. + // Host has sent a SETUP packet. Receive this into the setup packet store. _ft90x_dusb_out(USBD_EP_0, (uint8_t *)_ft90x_setup_packet, sizeof(USB_device_request)); // Send the packet to tinyusb. diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index 76ba2a921..80f616478 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -199,7 +199,7 @@ static void list_remove_qhd_by_addr(ehci_link_t* list_head, uint8_t dev_addr) #pragma GCC diagnostic pop if ( qhd->dev_addr == dev_addr ) { - // TODO deactive all TD, wait for QHD to inactive before removal + // TODO deactivate all TD, wait for QHD to inactive before removal prev->address = qhd->next.address; // EHCI 4.8.2 link the removed qhd to async head (which always reachable by Host Controller) @@ -839,7 +839,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c if (TUSB_SPEED_HIGH == p_qhd->ep_speed) { TU_ASSERT( interval <= 16, ); - if ( interval < 4) // sub milisecond interval + if ( interval < 4) // sub millisecond interval { p_qhd->interval_ms = 0; p_qhd->int_smask = (interval == 1) ? TU_BIN8(11111111) : diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h index ff9ae12e7..36f8649be 100644 --- a/src/portable/ehci/ehci.h +++ b/src/portable/ehci/ehci.h @@ -114,7 +114,7 @@ typedef struct volatile uint32_t current_page : 3 ; ///< Index into the qTD buffer pointer list uint32_t int_on_complete : 1 ; ///< Interrupt on complete volatile uint32_t total_bytes : 15 ; ///< Transfer bytes, decreased during transaction - volatile uint32_t data_toggle : 1 ; ///< Data Toogle bit + volatile uint32_t data_toggle : 1 ; ///< Data Toggle bit /// Buffer Page Pointer List, Each element in the list is a 4K page aligned, physical memory address. The lower 12 bits in each pointer are reserved (except for the first one) as each memory pointer must reference the start of a 4K page @@ -160,7 +160,7 @@ typedef struct TU_ATTR_ALIGNED(32) uint8_t used; uint8_t removing; // removed from asyn list, waiting for async advance uint8_t pid; - uint8_t interval_ms; // polling interval in frames (or milisecond) + uint8_t interval_ms; // polling interval in frames (or millisecond) uint16_t total_xferred_bytes; // number of bytes xferred until a qtd with ioc bit set uint8_t reserved2[2]; @@ -225,7 +225,7 @@ typedef struct TU_ATTR_ALIGNED(32) uint16_t reserved ; ///< reserved // Word 3: siTD Transfer Status and Control - // Status [7:0] TODO indentical to qTD Token'status --> refractor later + // Status [7:0] TODO identical to qTD Token'status --> refactor later volatile uint32_t : 1 ; // reserved volatile uint32_t split_state : 1 ; volatile uint32_t missed_uframe : 1 ; @@ -350,8 +350,8 @@ typedef volatile struct uint32_t periodic_status : 1 ; ///< Periodic schedule status uint32_t async_status : 1 ; ///< Async schedule status uint32_t : 2 ; - uint32_t nxp_int_async : 1 ; ///< NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set andthe TD was from the asynchronous schedule. This bit is also set by the Host when a short packet is detected andthe packet is on the asynchronous schedule. - uint32_t nxp_int_period : 1 ; ///< NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set andthe TD was from the periodic schedule. + uint32_t nxp_int_async : 1 ; ///< NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set and the TD was from the asynchronous schedule. This bit is also set by the Host when a short packet is detected and the packet is on the asynchronous schedule. + uint32_t nxp_int_period : 1 ; ///< NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set and the TD was from the periodic schedule. uint32_t : 12 ; }status_bm; }; diff --git a/src/portable/espressif/esp32sx/dcd_esp32sx.c b/src/portable/espressif/esp32sx/dcd_esp32sx.c index 0b75af627..41240f737 100644 --- a/src/portable/espressif/esp32sx/dcd_esp32sx.c +++ b/src/portable/espressif/esp32sx/dcd_esp32sx.c @@ -741,7 +741,7 @@ static void handle_epin_ints(void) // XFER Timeout if (USB0.in_ep_reg[n].diepint & USB_D_TIMEOUT0_M) { - // Clear interrupt or enpoint will hang. + // Clear interrupt or endpoint will hang. USB0.in_ep_reg[n].diepint = USB_D_TIMEOUT0_M; // Maybe retry? } diff --git a/src/portable/microchip/pic32mz/usbhs_registers.h b/src/portable/microchip/pic32mz/usbhs_registers.h index 757e3f083..93b552322 100644 --- a/src/portable/microchip/pic32mz/usbhs_registers.h +++ b/src/portable/microchip/pic32mz/usbhs_registers.h @@ -21,16 +21,16 @@ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. *******************************************************************************/ /******************************************************************************* - USBHS Peripheral Library Register Defintions + USBHS Peripheral Library Register Definitions File Name: usbhs_registers.h Summary: - USBHS PLIB Register Defintions + USBHS PLIB Register Definitions Description: - This file contains the constants and defintions which are required by the + This file contains the constants and definitions which are required by the the USBHS library. *******************************************************************************/ diff --git a/src/portable/microchip/samx7x/dcd_samx7x.c b/src/portable/microchip/samx7x/dcd_samx7x.c index 7507c0f69..24657872b 100644 --- a/src/portable/microchip/samx7x/dcd_samx7x.c +++ b/src/portable/microchip/samx7x/dcd_samx7x.c @@ -42,7 +42,7 @@ # define USE_SOF 0 #endif -// Dual bank can imporve performance, but need 2 times bigger packet buffer +// Dual bank can improve performance, but need 2 times bigger packet buffer // As SAM7x has only 4KB packet buffer, use with caution ! // Enable in FS mode as packets are smaller #ifndef USE_DUAL_BANK @@ -644,7 +644,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t } __set_PRIMASK(irq_state); - // Here a ZLP has been recieved + // Here a ZLP has been received // and the DMA transfer must be not started. // It is the end of transfer return false; @@ -734,7 +734,7 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16 } __set_PRIMASK(irq_state); - // Here a ZLP has been recieved + // Here a ZLP has been received // and the DMA transfer must be not started. // It is the end of transfer return false; diff --git a/src/portable/nuvoton/nuc505/dcd_nuc505.c b/src/portable/nuvoton/nuc505/dcd_nuc505.c index 886720e33..3fa7c1ec1 100644 --- a/src/portable/nuvoton/nuc505/dcd_nuc505.c +++ b/src/portable/nuvoton/nuc505/dcd_nuc505.c @@ -181,7 +181,7 @@ static void dcd_userEP_in_xfer(struct xfer_ctl_t *xfer, USBD_EP_T *ep) ep->EPINTEN = USBD_EPINTEN_TXPKIEN_Msk; } - /* provided buffers are thankfully 32-bit aligned, allowing most data to be transfered as 32-bit */ + /* provided buffers are thankfully 32-bit aligned, allowing most data to be transferred as 32-bit */ #if 0 // TODO support dcd_edpt_xfer_fifo API if (xfer->ff) { diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c index 3e523ebc2..228da6ae0 100644 --- a/src/portable/ohci/ohci.c +++ b/src/portable/ohci/ohci.c @@ -165,7 +165,7 @@ bool hcd_init(uint8_t rhport) //------------- Data Structure init -------------// tu_memclr(&ohci_data, sizeof(ohci_data_t)); for(uint8_t i=0; i<32; i++) - { // assign all interrupt pointes to period head ed + { // assign all interrupt pointers to period head ed ohci_data.hcca.interrupt_table[i] = (uint32_t) &ohci_data.period_head_ed; } diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h index 9fc954c8f..f40ae24cc 100644 --- a/src/portable/ohci/ohci.h +++ b/src/portable/ohci/ohci.h @@ -34,7 +34,7 @@ //--------------------------------------------------------------------+ // OHCI CONFIGURATION & CONSTANTS //--------------------------------------------------------------------+ -#define HOST_HCD_XFER_INTERRUPT // TODO interrupt is used widely, should always be enalbed +#define HOST_HCD_XFER_INTERRUPT // TODO interrupt is used widely, should always be enabled #define OHCI_PERIODIC_LIST (defined HOST_HCD_XFER_INTERRUPT || defined HOST_HCD_XFER_ISOCHRONOUS) // TODO merge OHCI with EHCI diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index c88a8a3a2..54c3c95e7 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -122,7 +122,7 @@ (TU_CHECK_MCU(OPT_MCU_STM32L4) && defined(STM32L4_FSDEV)) \ ) -// In order to reduce the dependance on HAL, we undefine this. +// In order to reduce the dependence on HAL, we undefine this. // Some definitions are copied to our private include file. #undef USE_HAL_DRIVER diff --git a/src/portable/sunxi/dcd_sunxi_musb.c b/src/portable/sunxi/dcd_sunxi_musb.c index a0be846a5..2d0e379ad 100644 --- a/src/portable/sunxi/dcd_sunxi_musb.c +++ b/src/portable/sunxi/dcd_sunxi_musb.c @@ -243,7 +243,7 @@ static void USBC_Dev_SetAddress(u8 address) static void __USBC_Dev_Tx_SendStall(void) { - //send stall, and fifo is flushed automaticly + //send stall, and fifo is flushed automatically USBC_REG_set_bit_w(USBC_BP_TXCSR_D_SEND_STALL, USBC_REG_TXCSR(USBC0_BASE)); } static u32 __USBC_Dev_Tx_IsEpStall(void) diff --git a/src/portable/sunxi/musb_def.h b/src/portable/sunxi/musb_def.h index 602b4f113..53da5ded2 100644 --- a/src/portable/sunxi/musb_def.h +++ b/src/portable/sunxi/musb_def.h @@ -93,7 +93,7 @@ #define USBC1_BASE 0x01c14000 #define USBC2_BASE 0x01c1E000 -//Some reg whithin musb +//Some reg within musb #define USBPHY_CLK_REG 0x01c200CC #define USBPHY_CLK_RST_BIT 0 #define USBPHY_CLK_GAT_BIT 1 diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index f5ecdfe4f..b53735a5e 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -1003,7 +1003,7 @@ static void handle_rxflvl_irq(uint8_t rhport) switch ( pktsts ) { - // Global OUT NAK: do nothign + // Global OUT NAK: do nothing case GRXSTS_PKTSTS_GLOBALOUTNAK: break; case GRXSTS_PKTSTS_SETUPRX: diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index ea786362e..b63d1fcd0 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -116,7 +116,7 @@ static const dwc2_controller_t _dwc2_controller[] = // //--------------------------------------------------------------------+ -// SystemCoreClock is alrady included by family header +// SystemCoreClock is already included by family header // extern uint32_t SystemCoreClock; TU_ATTR_ALWAYS_INLINE -- cgit v1.3.1 From 3e32fa36b86c502a35341f7f1aba62b89dae8fcb Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 8 Dec 2022 16:39:24 +0700 Subject: enhance tu fifo - rename wr/rd absolute to index, and rel to pointer. - fix crash with _tu_fifo_remaining() - change get_relative_pointer() to idx2ptr() and merge with _ff_mod() --- src/common/tusb_fifo.c | 205 +++++++++++++++++++++++++++++-------------------- src/common/tusb_fifo.h | 6 +- 2 files changed, 124 insertions(+), 87 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index b857c6444..853614d28 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -34,6 +34,8 @@ #pragma diag_suppress = Pa082 #endif +#define TU_FIFO_DBG 0 + // implement mutex lock and unlock #if CFG_FIFO_MUTEX @@ -90,12 +92,9 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si return true; } -// Static functions are intended to work on local variables -static inline uint16_t _ff_mod(uint16_t idx, uint16_t depth) -{ - while ( idx >= depth) idx -= depth; - return idx; -} +//--------------------------------------------------------------------+ +// Pull & Push +//--------------------------------------------------------------------+ // Intended to be used to read from hardware USB FIFO in e.g. STM32 where all data is read from a constant address // Code adapted from dcd_synopsys.c @@ -179,7 +178,7 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t // Write data to linear part of buffer memcpy(ff_buf, app_buf, nLin_bytes); - // Write data wrapped around + TU_ASSERT(nWrap_bytes <= f->depth, ); memcpy(f->buffer, ((uint8_t const*) app_buf) + nLin_bytes, nWrap_bytes); } break; @@ -317,21 +316,24 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rel, tu } } +//--------------------------------------------------------------------+ +// Index (free-running and real buffer pointer) +//--------------------------------------------------------------------+ + // Advance an absolute pointer +// "absolute" index is only in the range of [0..2*depth) static uint16_t advance_pointer(tu_fifo_t* f, uint16_t p, uint16_t offset) { // We limit the index space of p such that a correct wrap around happens // Check for a wrap around or if we are in unused index space - This has to be checked first!! // We are exploiting the wrap around to the correct index - if ((p > (uint16_t)(p + offset)) || ((uint16_t)(p + offset) > f->max_pointer_idx)) - { - p = (uint16_t) ((p + offset) + f->non_used_index_space); - } - else + uint16_t next_p = (uint16_t) (p + offset); + if ( (p > next_p) || (next_p > f->max_pointer_idx) ) { - p += offset; + next_p = (uint16_t) (next_p + f->non_used_index_space); } - return p; + + return next_p; } // Backward an absolute pointer @@ -340,30 +342,33 @@ static uint16_t backward_pointer(tu_fifo_t* f, uint16_t p, uint16_t offset) // We limit the index space of p such that a correct wrap around happens // Check for a wrap around or if we are in unused index space - This has to be checked first!! // We are exploiting the wrap around to the correct index - if ((p < (uint16_t)(p - offset)) || ((uint16_t)(p - offset) > f->max_pointer_idx)) - { - p = (uint16_t) ((p - offset) - f->non_used_index_space); - } - else + uint16_t new_p = (uint16_t) (p - offset); + if ( (p < new_p) || (new_p > f->max_pointer_idx) ) { - p -= offset; + new_p = (uint16_t) (new_p - f->non_used_index_space); } - return p; + + return new_p; } -// get relative from absolute pointer -static uint16_t get_relative_pointer(tu_fifo_t* f, uint16_t p) +// index to pointer, simply an modulo with minus +static inline uint16_t idx2ptr(uint16_t idx, uint16_t depth) { - return _ff_mod(p, f->depth); + while ( idx >= depth ) idx -= depth; + return idx; } // Works on local copies of w and r - return only the difference and as such can be used to determine an overflow -static inline uint16_t _tu_fifo_count(tu_fifo_t* f, uint16_t wAbs, uint16_t rAbs) +static inline uint16_t _tu_fifo_count(tu_fifo_t* f, uint16_t wr_idx, uint16_t rd_idx) { - uint16_t cnt = wAbs-rAbs; + uint16_t cnt = (uint16_t) (wr_idx-rd_idx); // In case we have non-power of two depth we need a further modification - if (rAbs > wAbs) cnt -= f->non_used_index_space; + if (rd_idx > wr_idx) + { + // 2*f->depth - (rd_idx - wr_idx); + cnt = (uint16_t) (cnt - f->non_used_index_space); + } return cnt; } @@ -400,39 +405,39 @@ static inline void _tu_fifo_correct_read_pointer(tu_fifo_t* f, uint16_t wAbs) // Works on local copies of w and r // Must be protected by mutexes since in case of an overflow read pointer gets modified -static bool _tu_fifo_peek(tu_fifo_t* f, void * p_buffer, uint16_t wAbs, uint16_t rAbs) +static bool _tu_fifo_peek(tu_fifo_t* f, void * p_buffer, uint16_t wr_idx, uint16_t rd_idx) { - uint16_t cnt = _tu_fifo_count(f, wAbs, rAbs); + uint16_t cnt = _tu_fifo_count(f, wr_idx, rd_idx); // Check overflow and correct if required if (cnt > f->depth) { - _tu_fifo_correct_read_pointer(f, wAbs); + _tu_fifo_correct_read_pointer(f, wr_idx); cnt = f->depth; } // Skip beginning of buffer if (cnt == 0) return false; - uint16_t rRel = get_relative_pointer(f, rAbs); + uint16_t rd_ptr = idx2ptr(rd_idx, f->depth); // Peek data - _ff_pull(f, p_buffer, rRel); + _ff_pull(f, p_buffer, rd_ptr); return true; } // Works on local copies of w and r // Must be protected by mutexes since in case of an overflow read pointer gets modified -static uint16_t _tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n, uint16_t wAbs, uint16_t rAbs, tu_fifo_copy_mode_t copy_mode) +static uint16_t _tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n, uint16_t wr_idx, uint16_t rd_idx, tu_fifo_copy_mode_t copy_mode) { - uint16_t cnt = _tu_fifo_count(f, wAbs, rAbs); + uint16_t cnt = _tu_fifo_count(f, wr_idx, rd_idx); // Check overflow and correct if required if (cnt > f->depth) { - _tu_fifo_correct_read_pointer(f, wAbs); - rAbs = f->rd_idx; + _tu_fifo_correct_read_pointer(f, wr_idx); + rd_idx = f->rd_idx; cnt = f->depth; } @@ -442,53 +447,80 @@ static uint16_t _tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n, uint1 // Check if we can read something at and after offset - if too less is available we read what remains if (cnt < n) n = cnt; - uint16_t rRel = get_relative_pointer(f, rAbs); + uint16_t rd_ptr = idx2ptr(rd_idx, f->depth); // Peek data - _ff_pull_n(f, p_buffer, n, rRel, copy_mode); + _ff_pull_n(f, p_buffer, n, rd_ptr, copy_mode); return n; } // Works on local copies of w and r -static inline uint16_t _tu_fifo_remaining(tu_fifo_t* f, uint16_t wAbs, uint16_t rAbs) +static inline uint16_t _tu_fifo_remaining(tu_fifo_t* f, uint16_t wr_idx, uint16_t rd_idx) { - return f->depth - _tu_fifo_count(f, wAbs, rAbs); + uint16_t const count = _tu_fifo_count(f, wr_idx, rd_idx); + return (f->depth > count) ? (f->depth - count) : 0; } static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu_fifo_copy_mode_t copy_mode) { if ( n == 0 ) return 0; + TU_LOG(TU_FIFO_DBG, "rd = %u, wr = %02u, n = %u: ", f->rd_idx, f->wr_idx, n); + _ff_lock(f->mutex_wr); - uint16_t w = f->wr_idx, r = f->rd_idx; + uint16_t wr_idx = f->wr_idx; + uint16_t rd_idx = f->rd_idx; + uint8_t const* buf8 = (uint8_t const*) data; + uint16_t const remain = _tu_fifo_remaining(f, wr_idx, rd_idx); - if (!f->overwritable) + if ( n > remain) { - // Not overwritable limit up to full - n = tu_min16(n, _tu_fifo_remaining(f, w, r)); + if ( !f->overwritable ) + { + // limit up to full + n = remain; + } + else + { + // oldest data in fifo i.e read pointer data will be overwritten + // Note: we modify read data but we do not want to modify the read pointer within a write function! + // since it would end up in a race condition with read functions! + // Note2: race condition could still occur if tu_fifo_read() is called while we modify its buffer (corrupted data) + + if ( n >= f->depth ) + { + // Only copy last part + buf8 = buf8 + (n - f->depth) * f->item_size; + n = f->depth; + + // We start writing at the read pointer's position since we fill the complete + // buffer and we do not want to modify the read pointer within a write function! + // This would end up in a race condition with read functions! + wr_idx = rd_idx; + }else + { + // TODO shift out oldest data from read pointer !!! + } + } } - else if (n >= f->depth) + + if (n) { - // Only copy last part - buf8 = buf8 + (n - f->depth) * f->item_size; - n = f->depth; - - // We start writing at the read pointer's position since we fill the complete - // buffer and we do not want to modify the read pointer within a write function! - // This would end up in a race condition with read functions! - w = r; - } + uint16_t wr_ptr = idx2ptr(wr_idx, f->depth); - uint16_t wRel = get_relative_pointer(f, w); + TU_LOG(TU_FIFO_DBG, "actual_n = %u, wr_rel = %u", n, wr_ptr); - // Write data - _ff_push_n(f, buf8, n, wRel, copy_mode); + // Write data + _ff_push_n(f, buf8, n, wr_ptr, copy_mode); - // Advance pointer - f->wr_idx = advance_pointer(f, w, n); + // Advance pointer + f->wr_idx = advance_pointer(f, wr_idx, n); + + TU_LOG(TU_FIFO_DBG, "\tnew_wr = %u\n", f->wr_idx); + } _ff_unlock(f->mutex_wr); @@ -742,20 +774,20 @@ bool tu_fifo_write(tu_fifo_t* f, const void * data) _ff_lock(f->mutex_wr); bool ret; - uint16_t const w = f->wr_idx; + uint16_t const wr_idx = f->wr_idx; - if ( _tu_fifo_full(f, w, f->rd_idx) && !f->overwritable ) + if ( _tu_fifo_full(f, wr_idx, f->rd_idx) && !f->overwritable ) { ret = false; }else { - uint16_t wRel = get_relative_pointer(f, w); + uint16_t wr_ptr = idx2ptr(wr_idx, f->depth); // Write data - _ff_push(f, data, wRel); + _ff_push(f, data, wr_ptr); // Advance pointer - f->wr_idx = advance_pointer(f, w, 1); + f->wr_idx = advance_pointer(f, wr_idx, 1); ret = true; } @@ -909,17 +941,19 @@ void tu_fifo_advance_read_pointer(tu_fifo_t *f, uint16_t n) void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) { // Operate on temporary values in case they change in between - uint16_t w = f->wr_idx, r = f->rd_idx; + uint16_t wr_idx = f->wr_idx; + uint16_t rd_idx = f->rd_idx; - uint16_t cnt = _tu_fifo_count(f, w, r); + uint16_t cnt = _tu_fifo_count(f, wr_idx, rd_idx); // Check overflow and correct if required - may happen in case a DMA wrote too fast if (cnt > f->depth) { _ff_lock(f->mutex_rd); - _tu_fifo_correct_read_pointer(f, w); + _tu_fifo_correct_read_pointer(f, wr_idx); _ff_unlock(f->mutex_rd); - r = f->rd_idx; + + rd_idx = f->rd_idx; cnt = f->depth; } @@ -934,22 +968,24 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) } // Get relative pointers - w = get_relative_pointer(f, w); - r = get_relative_pointer(f, r); + uint16_t wr_ptr = idx2ptr(wr_idx, f->depth); + uint16_t rd_ptr = idx2ptr(rd_idx, f->depth); // Copy pointer to buffer to start reading from - info->ptr_lin = &f->buffer[r]; + info->ptr_lin = &f->buffer[rd_ptr]; // Check if there is a wrap around necessary - if (w > r) { + if (wr_ptr > rd_ptr) { // Non wrapping case info->len_lin = cnt; + info->len_wrap = 0; info->ptr_wrap = NULL; } else { - info->len_lin = f->depth - r; // Also the case if FIFO was full + info->len_lin = f->depth - rd_ptr; // Also the case if FIFO was full + info->len_wrap = cnt - info->len_lin; info->ptr_wrap = f->buffer; } @@ -972,10 +1008,11 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) /******************************************************************************/ void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) { - uint16_t w = f->wr_idx, r = f->rd_idx; - uint16_t free = _tu_fifo_remaining(f, w, r); + uint16_t wr_idx = f->wr_idx; + uint16_t rd_idx = f->rd_idx; + uint16_t remain = _tu_fifo_remaining(f, wr_idx, rd_idx); - if (free == 0) + if (remain == 0) { info->len_lin = 0; info->len_wrap = 0; @@ -985,23 +1022,23 @@ void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) } // Get relative pointers - w = get_relative_pointer(f, w); - r = get_relative_pointer(f, r); + uint16_t wr_ptr = idx2ptr(wr_idx, f->depth); + uint16_t rd_ptr = idx2ptr(rd_idx, f->depth); // Copy pointer to buffer to start writing to - info->ptr_lin = &f->buffer[w]; + info->ptr_lin = &f->buffer[wr_ptr]; - if (w < r) + if (wr_ptr < rd_ptr) { // Non wrapping case - info->len_lin = r-w; + info->len_lin = rd_ptr-wr_ptr; info->len_wrap = 0; info->ptr_wrap = NULL; } else { - info->len_lin = f->depth - w; - info->len_wrap = free - info->len_lin; // Remaining length - n already was limited to free or FIFO depth - info->ptr_wrap = f->buffer; // Always start of buffer + info->len_lin = f->depth - wr_ptr; + info->len_wrap = remain - info->len_lin; // Remaining length - n already was limited to remain or FIFO depth + info->ptr_wrap = f->buffer; // Always start of buffer } } diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h index e64ab4b6d..204d53081 100644 --- a/src/common/tusb_fifo.h +++ b/src/common/tusb_fifo.h @@ -101,10 +101,10 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si #if CFG_FIFO_MUTEX TU_ATTR_ALWAYS_INLINE static inline -void tu_fifo_config_mutex(tu_fifo_t *f, tu_fifo_mutex_t write_mutex_hdl, tu_fifo_mutex_t read_mutex_hdl) +void tu_fifo_config_mutex(tu_fifo_t *f, tu_fifo_mutex_t wr_mutex, tu_fifo_mutex_t rd_mutex) { - f->mutex_wr = write_mutex_hdl; - f->mutex_rd = read_mutex_hdl; + f->mutex_wr = wr_mutex; + f->mutex_rd = rd_mutex; } #endif -- cgit v1.3.1 From 82852774a74631e0916254022339c9713c44cb57 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 9 Dec 2022 18:20:09 +0700 Subject: add fifo implementation note - handle/fix double overflowed with write() - other minor clean upp --- src/common/tusb_fifo.c | 94 +++++++++++++++++++++++++++++--------------------- src/common/tusb_fifo.h | 63 ++++++++++++++++++++++++++++++--- 2 files changed, 113 insertions(+), 44 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 853614d28..df07a990c 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -81,8 +81,8 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si // Limit index space to 2*depth - this allows for a fast "modulo" calculation // but limits the maximum depth to 2^16/2 = 2^15 and buffer overflows are detectable // only if overflow happens once (important for unsupervised DMA applications) - f->max_pointer_idx = (uint16_t) (2*depth - 1); - f->non_used_index_space = UINT16_MAX - f->max_pointer_idx; + //f->max_pointer_idx = (uint16_t) (2*depth - 1); + f->non_used_index_space = UINT16_MAX - (2*f->depth-1); f->rd_idx = f->wr_idx = 0; @@ -320,15 +320,15 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rel, tu // Index (free-running and real buffer pointer) //--------------------------------------------------------------------+ -// Advance an absolute pointer +// Advance an absolute index // "absolute" index is only in the range of [0..2*depth) -static uint16_t advance_pointer(tu_fifo_t* f, uint16_t p, uint16_t offset) +static uint16_t advance_pointer(tu_fifo_t* f, uint16_t idx, uint16_t offset) { // We limit the index space of p such that a correct wrap around happens // Check for a wrap around or if we are in unused index space - This has to be checked first!! // We are exploiting the wrap around to the correct index - uint16_t next_p = (uint16_t) (p + offset); - if ( (p > next_p) || (next_p > f->max_pointer_idx) ) + uint16_t next_p = (uint16_t) (idx + offset); + if ( (idx > next_p) || (next_p >= 2*f->depth) ) { next_p = (uint16_t) (next_p + f->non_used_index_space); } @@ -343,7 +343,7 @@ static uint16_t backward_pointer(tu_fifo_t* f, uint16_t p, uint16_t offset) // Check for a wrap around or if we are in unused index space - This has to be checked first!! // We are exploiting the wrap around to the correct index uint16_t new_p = (uint16_t) (p - offset); - if ( (p < new_p) || (new_p > f->max_pointer_idx) ) + if ( (p < new_p) || (new_p >= 2*f->depth) ) { new_p = (uint16_t) (new_p - f->non_used_index_space); } @@ -374,15 +374,15 @@ static inline uint16_t _tu_fifo_count(tu_fifo_t* f, uint16_t wr_idx, uint16_t rd } // Works on local copies of w and r -static inline bool _tu_fifo_empty(uint16_t wAbs, uint16_t rAbs) +static inline bool _tu_fifo_empty(uint16_t wr_idx, uint16_t rd_idx) { - return wAbs == rAbs; + return wr_idx == rd_idx; } // Works on local copies of w and r static inline bool _tu_fifo_full(tu_fifo_t* f, uint16_t wAbs, uint16_t rAbs) { - return (_tu_fifo_count(f, wAbs, rAbs) == f->depth); + return _tu_fifo_count(f, wAbs, rAbs) == f->depth; } // Works on local copies of w and r @@ -391,9 +391,9 @@ static inline bool _tu_fifo_full(tu_fifo_t* f, uint16_t wAbs, uint16_t rAbs) // write more than 2*depth-1 items in one rush without updating write pointer. Otherwise // write pointer wraps and you pointer states are messed up. This can only happen if you // use DMAs, write functions do not allow such an error. -static inline bool _tu_fifo_overflowed(tu_fifo_t* f, uint16_t wAbs, uint16_t rAbs) +static inline bool _tu_fifo_overflowed(tu_fifo_t* f, uint16_t wr_idx, uint16_t rd_idx) { - return (_tu_fifo_count(f, wAbs, rAbs) > f->depth); + return (_tu_fifo_count(f, wr_idx, rd_idx) > f->depth); } // Works on local copies of w @@ -466,44 +466,58 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu { if ( n == 0 ) return 0; - TU_LOG(TU_FIFO_DBG, "rd = %u, wr = %02u, n = %u: ", f->rd_idx, f->wr_idx, n); - _ff_lock(f->mutex_wr); uint16_t wr_idx = f->wr_idx; uint16_t rd_idx = f->rd_idx; uint8_t const* buf8 = (uint8_t const*) data; + uint16_t overflowable_count = _tu_fifo_count(f, wr_idx, rd_idx); uint16_t const remain = _tu_fifo_remaining(f, wr_idx, rd_idx); - if ( n > remain) + TU_LOG(TU_FIFO_DBG, "rd = %3u, wr = %3u, count = %3u, remain = %3u, n = %3u: ", rd_idx, wr_idx, _tu_fifo_count(f, wr_idx, rd_idx), remain, n); + + if ( !f->overwritable ) { - if ( !f->overwritable ) - { - // limit up to full - n = remain; - } - else + // limit up to full + n = tu_min16(n, remain); + } + else + { + // In over-writable mode, fifo_write() is allowed even when fifo is full. In such case, + // oldest data in fifo i.e at read pointer data will be overwritten + // Note: we can modify read buffer contents but we must not modify the read index itself within a write function! + // Since it would end up in a race condition with read functions! + if ( n >= f->depth ) { - // oldest data in fifo i.e read pointer data will be overwritten - // Note: we modify read data but we do not want to modify the read pointer within a write function! - // since it would end up in a race condition with read functions! - // Note2: race condition could still occur if tu_fifo_read() is called while we modify its buffer (corrupted data) - - if ( n >= f->depth ) + // Only copy last part + if ( copy_mode == TU_FIFO_COPY_INC ) { - // Only copy last part - buf8 = buf8 + (n - f->depth) * f->item_size; - n = f->depth; - - // We start writing at the read pointer's position since we fill the complete - // buffer and we do not want to modify the read pointer within a write function! - // This would end up in a race condition with read functions! - wr_idx = rd_idx; + buf8 += (n - f->depth) * f->item_size; }else { - // TODO shift out oldest data from read pointer !!! + // TODO should read from hw fifo to discard data, however reading an odd number could + // accidentally discard data. } + + n = f->depth; + + // We start writing at the read pointer's position since we fill the whole buffer + wr_idx = rd_idx; + }else if (overflowable_count + n >= 2*f->depth) + { + // Double overflowed + // re-position write index to have a full fifo after pushed + wr_idx = advance_pointer(f, rd_idx, f->depth - n); + + // TODO we should also shift out n bytes from read index since we avoid changing rd index !! + // However memmove() is expensive due to actual copying + wrapping consideration. + // Also race condition could happen anyway if read() is invoke while moving result in corrupted memory + // currently deliberately not implemented --> result in incorrect data read back + }else + { + // normal + single overflowed: just increase write index + // we will correct (re-position) read index later on in fifo_read() function } } @@ -511,12 +525,12 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu { uint16_t wr_ptr = idx2ptr(wr_idx, f->depth); - TU_LOG(TU_FIFO_DBG, "actual_n = %u, wr_rel = %u", n, wr_ptr); + TU_LOG(TU_FIFO_DBG, "actual_n = %u, wr_ptr = %u", n, wr_ptr); // Write data _ff_push_n(f, buf8, n, wr_ptr, copy_mode); - // Advance pointer + // Advance index f->wr_idx = advance_pointer(f, wr_idx, n); TU_LOG(TU_FIFO_DBG, "\tnew_wr = %u\n", f->wr_idx); @@ -850,8 +864,8 @@ bool tu_fifo_clear(tu_fifo_t *f) _ff_lock(f->mutex_rd); f->rd_idx = f->wr_idx = 0; - f->max_pointer_idx = (uint16_t) (2*f->depth-1); - f->non_used_index_space = UINT16_MAX - f->max_pointer_idx; + //f->max_pointer_idx = (uint16_t) (2*f->depth-1); + f->non_used_index_space = UINT16_MAX - (2*f->depth-1); _ff_unlock(f->mutex_wr); _ff_unlock(f->mutex_rd); diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h index 204d53081..fd149b75c 100644 --- a/src/common/tusb_fifo.h +++ b/src/common/tusb_fifo.h @@ -52,18 +52,74 @@ extern "C" { #define tu_fifo_mutex_t osal_mutex_t #endif +/* Write/Read index is always in the range of: + * 0 .. 2*depth-1 + * The extra window allow us to determine the fifo state of empty or full with only 2 indexes + * Following are examples with depth = 3 + * + * - empty: W = R + * | + * ------------------------- + * | 0 | RW| 2 | 3 | 4 | 5 | + * + * - full 1: W > R + * | + * ------------------------- + * | 0 | R | 2 | 3 | W | 5 | + * + * - full 2: W < R + * | + * ------------------------- + * | 0 | 1 | W | 3 | 4 | R | + * + * - Number of items in the fifo can be determined in either cases: + * - case W > R: Count = W - R + * - case W < R: Count = 2*depth - (R - W) + * + * In non-overwritable mode, computed Count (in above 2 cases) is at most equal to depth. + * However, in over-writable mode, write index can be repeatedly increased and count can be + * temporarily larger than depth (overflowed condition) e.g + * + * - Overflowed 1: write(3), write(1) + * In this case we will adjust Read index when read()/peek() is called so that count = depth. + * | + * ------------------------- + * | R | 1 | 2 | 3 | W | 5 | + * + * - Double Overflowed: write(3), write(1), write(2) + * Continue to write after overflowed to 2nd overflowed. + * We must prevent 2nd overflowed since it will cause incorrect computed of count, in above example + * if not handled the fifo will be empty instead of continue-to-be full. Since we must not modify + * read index in write() function, which cause race condition. We will re-position write index so that + * after data is written it is a full fifo i.e W = depth - R + * + * re-position W = 1 before write(2) + * Note: we should also move data from mem[4] to read index as well, but deliberately skipped here + * since it is an expensive operation !!! + * | + * ------------------------- + * | R | W | 2 | 3 | 4 | 5 | + * + * perform write(2), result is still a full fifo. + * + * | + * ------------------------- + * | R | 1 | 2 | W | 4 | 5 | + + */ typedef struct { uint8_t* buffer ; ///< buffer pointer uint16_t depth ; ///< max items uint16_t item_size ; ///< size of each item + bool overwritable ; uint16_t non_used_index_space ; ///< required for non-power-of-two buffer length - uint16_t max_pointer_idx ; ///< maximum absolute pointer index + //uint16_t max_pointer_idx ; ///< maximum absolute pointer index - volatile uint16_t wr_idx ; ///< write pointer - volatile uint16_t rd_idx ; ///< read pointer + volatile uint16_t wr_idx ; ///< write index + volatile uint16_t rd_idx ; ///< read index #if CFG_FIFO_MUTEX tu_fifo_mutex_t mutex_wr; @@ -87,7 +143,6 @@ typedef struct .item_size = sizeof(_type), \ .overwritable = _overwritable, \ .non_used_index_space = UINT16_MAX - (2*(_depth)-1), \ - .max_pointer_idx = 2*(_depth)-1, \ } #define TU_FIFO_DEF(_name, _depth, _type, _overwritable) \ -- cgit v1.3.1 From ce064de6fd4416bb5368a2aaff4283f8e4b9fc36 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 10 Dec 2022 00:18:11 +0700 Subject: clean up --- src/common/tusb_fifo.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index df07a990c..a3933416c 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -178,7 +178,8 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t // Write data to linear part of buffer memcpy(ff_buf, app_buf, nLin_bytes); - TU_ASSERT(nWrap_bytes <= f->depth, ); + // Write data wrapped around + // TU_ASSERT(nWrap_bytes <= f->depth, ); memcpy(f->buffer, ((uint8_t const*) app_buf) + nLin_bytes, nWrap_bytes); } break; @@ -504,7 +505,8 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu // We start writing at the read pointer's position since we fill the whole buffer wr_idx = rd_idx; - }else if (overflowable_count + n >= 2*f->depth) + } + else if (overflowable_count + n >= 2*f->depth) { // Double overflowed // re-position write index to have a full fifo after pushed -- cgit v1.3.1 From 04a5c03ea8ea70510c332f0fafb44daf0ec7c7fb Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 12 Dec 2022 11:54:33 +0700 Subject: fix int conversion warnings --- src/common/tusb_fifo.c | 4 ++-- src/common/tusb_fifo.h | 14 +++++++------- 2 files changed, 9 insertions(+), 9 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index a3933416c..70f514df2 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -82,7 +82,7 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si // but limits the maximum depth to 2^16/2 = 2^15 and buffer overflows are detectable // only if overflow happens once (important for unsupervised DMA applications) //f->max_pointer_idx = (uint16_t) (2*depth - 1); - f->non_used_index_space = UINT16_MAX - (2*f->depth-1); + f->non_used_index_space = (uint16_t) (UINT16_MAX - (2*f->depth-1)); f->rd_idx = f->wr_idx = 0; @@ -867,7 +867,7 @@ bool tu_fifo_clear(tu_fifo_t *f) f->rd_idx = f->wr_idx = 0; //f->max_pointer_idx = (uint16_t) (2*f->depth-1); - f->non_used_index_space = UINT16_MAX - (2*f->depth-1); + f->non_used_index_space = (uint16_t) (UINT16_MAX - (2*f->depth-1)); _ff_unlock(f->mutex_wr); _ff_unlock(f->mutex_rd); diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h index fd149b75c..932214c81 100644 --- a/src/common/tusb_fifo.h +++ b/src/common/tusb_fifo.h @@ -136,13 +136,13 @@ typedef struct void * ptr_wrap ; ///< wrapped part start pointer } tu_fifo_buffer_info_t; -#define TU_FIFO_INIT(_buffer, _depth, _type, _overwritable) \ -{ \ - .buffer = _buffer, \ - .depth = _depth, \ - .item_size = sizeof(_type), \ - .overwritable = _overwritable, \ - .non_used_index_space = UINT16_MAX - (2*(_depth)-1), \ +#define TU_FIFO_INIT(_buffer, _depth, _type, _overwritable) \ +{ \ + .buffer = _buffer, \ + .depth = _depth, \ + .item_size = sizeof(_type), \ + .overwritable = _overwritable, \ + .non_used_index_space = (uint16_t)(UINT16_MAX - (2*(_depth)-1)), \ } #define TU_FIFO_DEF(_name, _depth, _type, _overwritable) \ -- cgit v1.3.1 From 88e6da727370114b427287e74c3ade176c483b17 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 15 Dec 2022 18:03:01 +0700 Subject: use OSAL_MUTEX_REQUIRED to replace CFG_FIFO_MUTEX/TUSB_OPT_MUTEX add macro to swallow mutex API in order to simplify code with mutex --- src/class/cdc/cdc_device.c | 8 ++------ src/common/tusb_fifo.h | 19 +++++++++++-------- src/common/tusb_mcu.h | 4 ++++ src/device/usbd.c | 20 +++++++------------- src/host/usbh.c | 41 +++++++++++------------------------------ src/osal/osal.h | 21 ++++++++++++++------- src/osal/osal_none.h | 12 ++++++++++++ src/tusb.c | 16 ++++------------ src/tusb_option.h | 3 --- 9 files changed, 65 insertions(+), 79 deletions(-) (limited to 'src/common') diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c index 7b1e08d5d..0bbbaaa83 100644 --- a/src/class/cdc/cdc_device.c +++ b/src/class/cdc/cdc_device.c @@ -62,10 +62,8 @@ typedef struct uint8_t rx_ff_buf[CFG_TUD_CDC_RX_BUFSIZE]; uint8_t tx_ff_buf[CFG_TUD_CDC_TX_BUFSIZE]; -#if CFG_FIFO_MUTEX - osal_mutex_def_t rx_ff_mutex; - osal_mutex_def_t tx_ff_mutex; -#endif + OSAL_MUTEX_DEF(rx_ff_mutex); + OSAL_MUTEX_DEF(tx_ff_mutex); // Endpoint Transfer buffer CFG_TUSB_MEM_ALIGN uint8_t epout_buf[CFG_TUD_CDC_EP_BUFSIZE]; @@ -248,10 +246,8 @@ void cdcd_init(void) // In this way, the most current data is prioritized. tu_fifo_config(&p_cdc->tx_ff, p_cdc->tx_ff_buf, TU_ARRAY_SIZE(p_cdc->tx_ff_buf), 1, true); -#if CFG_FIFO_MUTEX tu_fifo_config_mutex(&p_cdc->rx_ff, NULL, osal_mutex_create(&p_cdc->rx_ff_mutex)); tu_fifo_config_mutex(&p_cdc->tx_ff, osal_mutex_create(&p_cdc->tx_ff_mutex), NULL); -#endif } } diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h index e64ab4b6d..e36e3a7f3 100644 --- a/src/common/tusb_fifo.h +++ b/src/common/tusb_fifo.h @@ -42,15 +42,13 @@ extern "C" { // within a certain number (see tu_fifo_overflow()). #include "common/tusb_common.h" +#include "osal/osal.h" + +#define tu_fifo_mutex_t osal_mutex_t // mutex is only needed for RTOS // for OS None, we don't get preempted -#define CFG_FIFO_MUTEX (CFG_TUSB_OS != OPT_OS_NONE) - -#if CFG_FIFO_MUTEX -#include "osal/osal.h" -#define tu_fifo_mutex_t osal_mutex_t -#endif +#define CFG_FIFO_MUTEX OSAL_MUTEX_REQUIRED typedef struct { @@ -65,7 +63,7 @@ typedef struct volatile uint16_t wr_idx ; ///< write pointer volatile uint16_t rd_idx ; ///< read pointer -#if CFG_FIFO_MUTEX +#if OSAL_MUTEX_REQUIRED tu_fifo_mutex_t mutex_wr; tu_fifo_mutex_t mutex_rd; #endif @@ -99,13 +97,18 @@ bool tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable); bool tu_fifo_clear(tu_fifo_t *f); bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_size, bool overwritable); -#if CFG_FIFO_MUTEX +#if OSAL_MUTEX_REQUIRED TU_ATTR_ALWAYS_INLINE static inline void tu_fifo_config_mutex(tu_fifo_t *f, tu_fifo_mutex_t write_mutex_hdl, tu_fifo_mutex_t read_mutex_hdl) { f->mutex_wr = write_mutex_hdl; f->mutex_rd = read_mutex_hdl; } + +#else + +#define tu_fifo_config_mutex(_f, _wr_mutex, _rd_mutex) + #endif bool tu_fifo_write (tu_fifo_t* f, void const * p_data); diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 86c68baf8..bb4225ad5 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -281,6 +281,10 @@ // Default Values //--------------------------------------------------------------------+ +#ifndef TUP_MCU_MULTIPLE_CORE +#define TUP_MCU_MULTIPLE_CORE 0 +#endif + #ifndef TUP_DCD_ENDPOINT_MAX #warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8" #define TUP_DCD_ENDPOINT_MAX 8 diff --git a/src/device/usbd.c b/src/device/usbd.c index c199e647e..f9a7af21b 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -272,10 +272,12 @@ static uint8_t _usbd_rhport = RHPORT_INVALID; OSAL_QUEUE_DEF(usbd_int_set, _usbd_qdef, CFG_TUD_TASK_QUEUE_SZ, dcd_event_t); static osal_queue_t _usbd_q; -// Mutex for claiming endpoint, only needed when using with preempted RTOS -#if CFG_TUSB_OS != OPT_OS_NONE -static osal_mutex_def_t _ubsd_mutexdef; -static osal_mutex_t _usbd_mutex; +// Mutex for claiming endpoint +#if OSAL_MUTEX_REQUIRED + static osal_mutex_def_t _ubsd_mutexdef; + static osal_mutex_t _usbd_mutex; +#else + #define _usbd_mutex NULL #endif @@ -389,7 +391,7 @@ bool tud_init (uint8_t rhport) tu_varclr(&_usbd_dev); -#if CFG_TUSB_OS != OPT_OS_NONE +#if OSAL_MUTEX_REQUIRED // Init device mutex _usbd_mutex = osal_mutex_create(&_ubsd_mutexdef); TU_ASSERT(_usbd_mutex); @@ -1209,11 +1211,7 @@ bool usbd_edpt_claim(uint8_t rhport, uint8_t ep_addr) uint8_t const dir = tu_edpt_dir(ep_addr); tu_edpt_state_t* ep_state = &_usbd_dev.ep_status[epnum][dir]; -#if TUSB_OPT_MUTEX return tu_edpt_claim(ep_state, _usbd_mutex); -#else - return tu_edpt_claim(ep_state, NULL); -#endif } bool usbd_edpt_release(uint8_t rhport, uint8_t ep_addr) @@ -1224,11 +1222,7 @@ bool usbd_edpt_release(uint8_t rhport, uint8_t ep_addr) uint8_t const dir = tu_edpt_dir(ep_addr); tu_edpt_state_t* ep_state = &_usbd_dev.ep_status[epnum][dir]; -#if TUSB_OPT_MUTEX return tu_edpt_release(ep_state, _usbd_mutex); -#else - return tu_edpt_release(ep_state, NULL); -#endif } bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) diff --git a/src/host/usbh.c b/src/host/usbh.c index 9065e5241..ff8fbaef3 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -212,28 +212,12 @@ static usbh_dev0_t _dev0; // TODO: hub can has its own simpler struct to save memory CFG_TUSB_MEM_SECTION usbh_device_t _usbh_devices[TOTAL_DEVICES]; -// Mutex for claiming endpoint, only needed when using with preempted RTOS -#if TUSB_OPT_MUTEX -static osal_mutex_def_t _usbh_mutexdef; -static osal_mutex_t _usbh_mutex; - -TU_ATTR_ALWAYS_INLINE static inline void usbh_lock(void) -{ - osal_mutex_lock(_usbh_mutex, OSAL_TIMEOUT_WAIT_FOREVER); -} - -TU_ATTR_ALWAYS_INLINE static inline void usbh_unlock(void) -{ - osal_mutex_unlock(_usbh_mutex); -} - +// Mutex for claiming endpoint +#if OSAL_MUTEX_REQUIRED + static osal_mutex_def_t _usbh_mutexdef; + static osal_mutex_t _usbh_mutex; #else - -#define _usbh_mutex NULL - -#define usbh_lock() -#define usbh_unlock() - + #define _usbh_mutex NULL #endif // Event queue @@ -277,8 +261,6 @@ static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t // TODO rework time-related function later void osal_task_delay(uint32_t msec) { - (void) msec; - const uint32_t start = hcd_frame_number(_usbh_controller); while ( ( hcd_frame_number(_usbh_controller) - start ) < msec ) {} } @@ -352,8 +334,8 @@ bool tuh_init(uint8_t controller_id) _usbh_q = osal_queue_create( &_usbh_qdef ); TU_ASSERT(_usbh_q != NULL); -#if TUSB_OPT_MUTEX - // Mutex +#if OSAL_MUTEX_REQUIRED + // Init mutex _usbh_mutex = osal_mutex_create(&_usbh_mutexdef); TU_ASSERT(_usbh_mutex); #endif @@ -537,8 +519,7 @@ bool tuh_control_xfer (tuh_xfer_t* xfer) uint8_t const daddr = xfer->daddr; - // TODO probably better to use semaphore as resource management than mutex - usbh_lock(); + (void) osal_mutex_lock(_usbh_mutex, OSAL_TIMEOUT_WAIT_FOREVER); bool const is_idle = (_ctrl_xfer.stage == CONTROL_STAGE_IDLE); if (is_idle) @@ -553,7 +534,7 @@ bool tuh_control_xfer (tuh_xfer_t* xfer) _ctrl_xfer.user_data = xfer->user_data; } - usbh_unlock(); + (void) osal_mutex_unlock(_usbh_mutex); TU_VERIFY(is_idle); const uint8_t rhport = usbh_get_rhport(daddr); @@ -597,9 +578,9 @@ bool tuh_control_xfer (tuh_xfer_t* xfer) TU_ATTR_ALWAYS_INLINE static inline void _set_control_xfer_stage(uint8_t stage) { - usbh_lock(); + osal_mutex_lock(_usbh_mutex, OSAL_TIMEOUT_WAIT_FOREVER); _ctrl_xfer.stage = stage; - usbh_unlock(); + osal_mutex_unlock(_usbh_mutex); } static void _xfer_complete(uint8_t daddr, xfer_result_t result) diff --git a/src/osal/osal.h b/src/osal/osal.h index 9d11866df..9cdab2882 100644 --- a/src/osal/osal.h +++ b/src/osal/osal.h @@ -33,17 +33,24 @@ #include "common/tusb_common.h" -// Return immediately -#define OSAL_TIMEOUT_NOTIMEOUT (0) -// Default timeout -#define OSAL_TIMEOUT_NORMAL (10) -// Wait forever -#define OSAL_TIMEOUT_WAIT_FOREVER (UINT32_MAX) +typedef void (*osal_task_func_t)( void * ); +// Timeout +#define OSAL_TIMEOUT_NOTIMEOUT (0) // Return immediately +#define OSAL_TIMEOUT_NORMAL (10) // Default timeout +#define OSAL_TIMEOUT_WAIT_FOREVER (UINT32_MAX) // Wait forever #define OSAL_TIMEOUT_CONTROL_XFER OSAL_TIMEOUT_WAIT_FOREVER -typedef void (*osal_task_func_t)( void * ); +// Mutex is required when using a preempted RTOS or MCU has multiple cores +#if (CFG_TUSB_OS == OPT_OS_NONE) && !TUP_MCU_MULTIPLE_CORE + #define OSAL_MUTEX_REQUIRED 0 + #define OSAL_MUTEX_DEF(_name) +#else + #define OSAL_MUTEX_REQUIRED 1 + #define OSAL_MUTEX_DEF(_name) osal_mutex_def_t _name +#endif +// OS thin implementation #if CFG_TUSB_OS == OPT_OS_NONE #include "osal_none.h" #elif CFG_TUSB_OS == OPT_OS_FREERTOS diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h index 9c80e4548..1ad130557 100644 --- a/src/osal/osal_none.h +++ b/src/osal/osal_none.h @@ -82,6 +82,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t s typedef osal_semaphore_def_t osal_mutex_def_t; typedef osal_semaphore_t osal_mutex_t; +#if OSAL_MUTEX_REQUIRED +// Note: multiple cores MCUs usually do provide IPC API for mutex +// or we can use std atomic function + TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) { mdef->count = 1; @@ -98,6 +102,14 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hd return osal_semaphore_post(mutex_hdl, false); } +#else + +#define osal_mutex_create(_mdef) (NULL) +#define osal_mutex_lock(_mutex_hdl, _ms) (true) +#define osal_mutex_unlock(_mutex_hdl) (true) + +#endif + //--------------------------------------------------------------------+ // QUEUE API //--------------------------------------------------------------------+ diff --git a/src/tusb.c b/src/tusb.c index c3787ff8f..f4380f89c 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -74,11 +74,9 @@ bool tu_edpt_claim(tu_edpt_state_t* ep_state, osal_mutex_t mutex) { (void) mutex; -#if TUSB_OPT_MUTEX // pre-check to help reducing mutex lock TU_VERIFY((ep_state->busy == 0) && (ep_state->claimed == 0)); - osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER); -#endif + (void) osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER); // can only claim the endpoint if it is not busy and not claimed yet. bool const available = (ep_state->busy == 0) && (ep_state->claimed == 0); @@ -87,9 +85,7 @@ bool tu_edpt_claim(tu_edpt_state_t* ep_state, osal_mutex_t mutex) ep_state->claimed = 1; } -#if TUSB_OPT_MUTEX - osal_mutex_unlock(mutex); -#endif + (void) osal_mutex_unlock(mutex); return available; } @@ -98,9 +94,7 @@ bool tu_edpt_release(tu_edpt_state_t* ep_state, osal_mutex_t mutex) { (void) mutex; -#if TUSB_OPT_MUTEX - osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER); -#endif + (void) osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER); // can only release the endpoint if it is claimed and not busy bool const ret = (ep_state->claimed == 1) && (ep_state->busy == 0); @@ -109,9 +103,7 @@ bool tu_edpt_release(tu_edpt_state_t* ep_state, osal_mutex_t mutex) ep_state->claimed = 0; } -#if TUSB_OPT_MUTEX - osal_mutex_unlock(mutex); -#endif + (void) osal_mutex_unlock(mutex); return ret; } diff --git a/src/tusb_option.h b/src/tusb_option.h index f95ae6273..9ca6c794b 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -299,9 +299,6 @@ typedef int make_iso_compilers_happy; #define CFG_TUSB_OS_INC_PATH #endif -// mutex is only needed for RTOS TODO also required with multiple core MCUs -#define TUSB_OPT_MUTEX (CFG_TUSB_OS != OPT_OS_NONE) - //-------------------------------------------------------------------- // Device Options (Default) //-------------------------------------------------------------------- -- cgit v1.3.1 From 660343d2001c0ee943bf3e24cab6f235d3930b33 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 16 Dec 2022 16:55:25 +0700 Subject: update fifo per PanRe review --- src/common/tusb_fifo.c | 8 ++++++-- src/common/tusb_fifo.h | 7 ++++--- 2 files changed, 10 insertions(+), 5 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 70f514df2..bbdd82982 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -352,9 +352,10 @@ static uint16_t backward_pointer(tu_fifo_t* f, uint16_t p, uint16_t offset) return new_p; } -// index to pointer, simply an modulo with minus +// index to pointer, simply an modulo with minus. static inline uint16_t idx2ptr(uint16_t idx, uint16_t depth) { + // Only run at most 3 times since index is limit in the range of [0..2*depth) while ( idx >= depth ) idx -= depth; return idx; } @@ -509,6 +510,7 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu else if (overflowable_count + n >= 2*f->depth) { // Double overflowed + // Index is bigger than the allowed range [0,2*depth) // re-position write index to have a full fifo after pushed wr_idx = advance_pointer(f, rd_idx, f->depth - n); @@ -518,7 +520,9 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu // currently deliberately not implemented --> result in incorrect data read back }else { - // normal + single overflowed: just increase write index + // normal + single overflowed: + // Index is in the range of [0,2*depth) and thus detect and recoverable. Recovering is handled in read() + // Therefore we just increase write index // we will correct (re-position) read index later on in fifo_read() function } } diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h index 932214c81..972d29d50 100644 --- a/src/common/tusb_fifo.h +++ b/src/common/tusb_fifo.h @@ -54,7 +54,7 @@ extern "C" { /* Write/Read index is always in the range of: * 0 .. 2*depth-1 - * The extra window allow us to determine the fifo state of empty or full with only 2 indexes + * The extra window allow us to determine the fifo state of empty or full with only 2 indices * Following are examples with depth = 3 * * - empty: W = R @@ -86,7 +86,8 @@ extern "C" { * ------------------------- * | R | 1 | 2 | 3 | W | 5 | * - * - Double Overflowed: write(3), write(1), write(2) + * - Double Overflowed i.e index is out of allowed range [0,2*depth) e.g: + * write(3), write(1), write(2) * Continue to write after overflowed to 2nd overflowed. * We must prevent 2nd overflowed since it will cause incorrect computed of count, in above example * if not handled the fifo will be empty instead of continue-to-be full. Since we must not modify @@ -94,7 +95,7 @@ extern "C" { * after data is written it is a full fifo i.e W = depth - R * * re-position W = 1 before write(2) - * Note: we should also move data from mem[4] to read index as well, but deliberately skipped here + * Note: we should also move data from mem[3] to read index as well, but deliberately skipped here * since it is an expensive operation !!! * | * ------------------------- -- cgit v1.3.1 From bd1f7f86ce1b6e82c3942d545e984b74b050004e Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 15 Dec 2022 15:27:39 +0700 Subject: add common EPSIZE for bulk/iso in full and highspeed adding cdc host fifo tx/rx --- src/class/cdc/cdc_device.h | 1 - src/class/cdc/cdc_host.c | 71 ++++++++++++++++++++------------------------- src/class/cdc/cdc_host.h | 19 ++++++++++++ src/common/tusb_types.h | 10 ++++++- src/host/usbh_classdriver.h | 4 +++ 5 files changed, 64 insertions(+), 41 deletions(-) (limited to 'src/common') diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h index fbc7162a3..f625a7554 100644 --- a/src/class/cdc/cdc_device.h +++ b/src/class/cdc/cdc_device.h @@ -27,7 +27,6 @@ #ifndef _TUSB_CDC_DEVICE_H_ #define _TUSB_CDC_DEVICE_H_ -#include "common/tusb_common.h" #include "cdc.h" //--------------------------------------------------------------------+ diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 9678b756c..da8ad726b 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -37,7 +37,7 @@ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ typedef struct { - // uint8_t daddr; + uint8_t daddr; uint8_t itf_num; uint8_t itf_protocol; @@ -49,7 +49,6 @@ typedef struct { // Bit 0: DTR (Data Terminal Ready), Bit 1: RTS (Request to Send) // uint8_t line_state; -#if 0 // FIFO tu_fifo_t rx_ff; @@ -64,54 +63,48 @@ typedef struct { #endif // Endpoint Transfer buffer - CFG_TUSB_MEM_ALIGN uint8_t epout_buf[CFG_TUH_CDC_EP_BUFSIZE]; - CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUH_CDC_EP_BUFSIZE]; -#endif + CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUH_CDC_RX_EPSIZE]; + CFG_TUSB_MEM_ALIGN uint8_t epout_buf[CFG_TUH_CDC_TX_EPSIZE]; } cdch_interface_t; //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -static cdch_interface_t cdch_data[CFG_TUH_DEVICE_MAX]; + +CFG_TUSB_MEM_SECTION +static cdch_interface_t cdch_data[CFG_TUH_CDC]; static inline cdch_interface_t* get_itf(uint8_t dev_addr) { - return &cdch_data[dev_addr-1]; -} + for(size_t i=0; iep_in && cdc->ep_out; + return NULL; } -bool tuh_cdc_is_busy(uint8_t dev_addr, cdc_pipeid_t pipeid) +static cdch_interface_t* find_new_itf(void) { - if ( !tuh_cdc_mounted(dev_addr) ) return false; - - cdch_interface_t const * p_cdc = get_itf(dev_addr); - - switch (pipeid) + for(size_t i=0; iep_notif ); - - case CDC_PIPE_DATA_IN: - return usbh_edpt_busy(dev_addr, p_cdc->ep_in ); - - case CDC_PIPE_DATA_OUT: - return usbh_edpt_busy(dev_addr, p_cdc->ep_out ); - - default: - return false; + if (cdch_data[i].daddr == 0) return &cdch_data[i]; } + + return NULL; } //--------------------------------------------------------------------+ // APPLICATION API (parameter validation needed) //--------------------------------------------------------------------+ +bool tuh_cdc_mounted(uint8_t dev_addr) +{ + cdch_interface_t* p_cdc = get_itf(dev_addr); + return p_cdc != NULL; +} + uint32_t tuh_cdc_write(uint8_t dev_addr, void const* buffer, uint32_t bufsize) { (void) dev_addr; @@ -121,7 +114,6 @@ uint32_t tuh_cdc_write(uint8_t dev_addr, void const* buffer, uint32_t bufsize) return 0; } - bool tuh_cdc_serial_is_mounted(uint8_t dev_addr) { // TODO consider all AT Command as serial candidate @@ -156,6 +148,7 @@ bool tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is bool tuh_cdc_set_control_line_state(uint8_t dev_addr, bool dtr, bool rts, tuh_xfer_cb_t complete_cb) { cdch_interface_t const * p_cdc = get_itf(dev_addr); + TU_VERIFY(p_cdc && p_cdc->acm_capability.support_line_request); tusb_control_request_t const request = { @@ -195,17 +188,13 @@ void cdch_init(void) void cdch_close(uint8_t dev_addr) { - TU_VERIFY(dev_addr <= CFG_TUH_DEVICE_MAX, ); - cdch_interface_t * p_cdc = get_itf(dev_addr); + TU_VERIFY(p_cdc, ); // Invoke application callback if (tuh_cdc_umount_cb) { - if (p_cdc->ep_out || p_cdc->ep_in || p_cdc->ep_notif) - { - tuh_cdc_umount_cb(dev_addr); - } + tuh_cdc_umount_cb(dev_addr); } tu_memclr(p_cdc, sizeof(cdch_interface_t)); @@ -233,8 +222,10 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL == itf_desc->bInterfaceSubClass && 0xFF != itf_desc->bInterfaceProtocol); - cdch_interface_t * p_cdc = get_itf(dev_addr); + cdch_interface_t * p_cdc = find_new_itf(); + TU_VERIFY(p_cdc); + p_cdc->daddr = dev_addr; p_cdc->itf_num = itf_desc->bInterfaceNumber; p_cdc->itf_protocol = itf_desc->bInterfaceProtocol; @@ -302,9 +293,11 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it bool cdch_set_config(uint8_t dev_addr, uint8_t itf_num) { - (void) dev_addr; (void) itf_num; - if (tuh_cdc_mount_cb) tuh_cdc_mount_cb(dev_addr); + + // notify usbh that driver enumeration is complete + usbh_driver_set_config_complete(dev_addr, itf_num); + return true; } diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index ce1f0f309..b2e75902d 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -37,6 +37,25 @@ // Class Driver Configuration //--------------------------------------------------------------------+ +// RX FIFO size +#ifndef CFG_TUH_CDC_RX_BUFSIZE +#define CFG_TUH_CDC_RX_BUFSIZE USBH_EPSIZE_BULK_MAX +#endif + +// RX Endpoint size +#ifndef CFG_TUH_CDC_RX_EPSIZE +#define CFG_TUH_CDC_RX_EPSIZE USBH_EPSIZE_BULK_MAX +#endif + +// TX FIFO size +#ifndef CFG_TUH_CDC_TX_BUFSIZE +#define CFG_TUH_CDC_TX_BUFSIZE USBH_EPSIZE_BULK_MAX +#endif + +// TX Endpoint size +#ifndef CFG_TUH_CDC_TX_EPSIZE +#define CFG_TUH_CDC_TX_EPSIZE USBH_EPSIZE_BULK_MAX +#endif //--------------------------------------------------------------------+ // Application API diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 1bfa7c7d1..c4c9d4133 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -69,6 +69,15 @@ typedef enum TUSB_DIR_IN_MASK = 0x80 }tusb_dir_t; +enum +{ + TUSB_EPSIZE_BULK_FS = 64, + TUSB_EPSIZE_BULK_HS= 512, + + TUSB_EPSIZE_ISO_FS_MAX = 1023, + TUSB_EPSIZE_ISO_HS_MAX = 1024, +}; + /// Isochronous End Point Attributes typedef enum { @@ -243,7 +252,6 @@ enum INTERFACE_INVALID_NUMBER = 0xff }; - typedef enum { MS_OS_20_SET_HEADER_DESCRIPTOR = 0x00, diff --git a/src/host/usbh_classdriver.h b/src/host/usbh_classdriver.h index c156afea0..7f72560c3 100644 --- a/src/host/usbh_classdriver.h +++ b/src/host/usbh_classdriver.h @@ -34,6 +34,10 @@ extern "C" { #endif +enum { + USBH_EPSIZE_BULK_MAX = (TUH_OPT_HIGH_SPEED ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS) +}; + //--------------------------------------------------------------------+ // Class Driver API //--------------------------------------------------------------------+ -- cgit v1.3.1 From 7004914d8c6c7d88908776eb153661b6b987e513 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 20 Dec 2022 12:06:59 +0700 Subject: fix hid host incorrect edpt release if failed to transmit add CDC_CONTROL_LINE_STATE_DTR/RTS, TUSB_INDEX_INVALID enum --- src/class/cdc/cdc.h | 10 ++++++++-- src/class/hid/hid_host.c | 2 +- src/common/tusb_types.h | 5 +++++ 3 files changed, 14 insertions(+), 3 deletions(-) (limited to 'src/common') diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h index c428af865..6a9669cf2 100644 --- a/src/class/cdc/cdc.h +++ b/src/class/cdc/cdc.h @@ -192,6 +192,12 @@ typedef enum CDC_REQUEST_MDLM_SEMANTIC_MODEL = 0x60, }cdc_management_request_t; +enum +{ + CDC_CONTROL_LINE_STATE_DTR = 0x01, + CDC_CONTROL_LINE_STATE_RTS = 0x02, +}; + //--------------------------------------------------------------------+ // Management Element Notification (Notification Endpoint) //--------------------------------------------------------------------+ @@ -390,8 +396,8 @@ TU_VERIFY_STATIC(sizeof(cdc_line_coding_t) == 7, "size is not correct"); typedef struct TU_ATTR_PACKED { - uint16_t dte_is_present : 1; ///< Indicates to DCE if DTE is presentor not. This signal corresponds to V.24 signal 108/2 and RS-232 signal DTR. - uint16_t half_duplex_carrier_control : 1; + uint16_t dtr : 1; + uint16_t rts : 1; uint16_t : 14; } cdc_line_control_state_t; diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index 504ddca1e..42b5e2f4e 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -259,7 +259,7 @@ bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance) if ( !usbh_edpt_xfer(dev_addr, hid_itf->ep_in, hid_itf->epin_buf, hid_itf->epin_size) ) { - usbh_edpt_claim(dev_addr, hid_itf->ep_in); + usbh_edpt_release(dev_addr, hid_itf->ep_in); return false; } diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index c4c9d4133..32cdba450 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -273,6 +273,11 @@ enum CONTROL_STAGE_ACK }; +enum +{ + TUSB_INDEX_INVALID = 0xff +}; + //--------------------------------------------------------------------+ // USB Descriptors //--------------------------------------------------------------------+ -- cgit v1.3.1 From d1ea3844f70a5add6e073aa8fa6b562413db4929 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 21 Dec 2022 11:04:57 +0700 Subject: rename TU_LOG_VAR to TU_LOG_PTR, print out setup of failed control transfer when LOG=1 --- src/common/tusb_debug.h | 18 +++++++++--------- src/host/usbh.c | 8 ++++++-- 2 files changed, 15 insertions(+), 11 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index ac5bee6ec..65fd1920d 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -66,7 +66,7 @@ static inline void tu_print_arr(uint8_t const* buf, uint32_t bufsize) #define TU_LOG(n, ...) TU_XSTRCAT(TU_LOG, n)(__VA_ARGS__) #define TU_LOG_MEM(n, ...) TU_XSTRCAT3(TU_LOG, n, _MEM)(__VA_ARGS__) #define TU_LOG_ARR(n, ...) TU_XSTRCAT3(TU_LOG, n, _ARR)(__VA_ARGS__) -#define TU_LOG_VAR(n, ...) TU_XSTRCAT3(TU_LOG, n, _VAR)(__VA_ARGS__) +#define TU_LOG_PTR(n, ...) TU_XSTRCAT3(TU_LOG, n, _PTR)(__VA_ARGS__) #define TU_LOG_INT(n, ...) TU_XSTRCAT3(TU_LOG, n, _INT)(__VA_ARGS__) #define TU_LOG_HEX(n, ...) TU_XSTRCAT3(TU_LOG, n, _HEX)(__VA_ARGS__) #define TU_LOG_LOCATION() tu_printf("%s: %d:\r\n", __PRETTY_FUNCTION__, __LINE__) @@ -76,7 +76,7 @@ static inline void tu_print_arr(uint8_t const* buf, uint32_t bufsize) #define TU_LOG1 tu_printf #define TU_LOG1_MEM tu_print_mem #define TU_LOG1_ARR(_x, _n) tu_print_arr((uint8_t const*)(_x), _n) -#define TU_LOG1_VAR(_x) tu_print_arr((uint8_t const*)(_x), sizeof(*(_x))) +#define TU_LOG1_PTR(_x) tu_print_arr((uint8_t const*)(_x), sizeof(*(_x))) #define TU_LOG1_INT(_x) tu_printf(#_x " = %ld\r\n", (unsigned long) (_x) ) #define TU_LOG1_HEX(_x) tu_printf(#_x " = %lX\r\n", (unsigned long) (_x) ) @@ -85,7 +85,7 @@ static inline void tu_print_arr(uint8_t const* buf, uint32_t bufsize) #define TU_LOG2 TU_LOG1 #define TU_LOG2_MEM TU_LOG1_MEM #define TU_LOG2_ARR TU_LOG1_ARR - #define TU_LOG2_VAR TU_LOG1_VAR + #define TU_LOG2_PTR TU_LOG1_PTR #define TU_LOG2_INT TU_LOG1_INT #define TU_LOG2_HEX TU_LOG1_HEX #endif @@ -95,7 +95,7 @@ static inline void tu_print_arr(uint8_t const* buf, uint32_t bufsize) #define TU_LOG3 TU_LOG1 #define TU_LOG3_MEM TU_LOG1_MEM #define TU_LOG3_ARR TU_LOG1_ARR - #define TU_LOG3_VAR TU_LOG1_VAR + #define TU_LOG3_PTR TU_LOG1_PTR #define TU_LOG3_INT TU_LOG1_INT #define TU_LOG3_HEX TU_LOG1_HEX #endif @@ -132,7 +132,7 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3 #ifndef TU_LOG #define TU_LOG(n, ...) #define TU_LOG_MEM(n, ...) - #define TU_LOG_VAR(n, ...) + #define TU_LOG_PTR(n, ...) #define TU_LOG_INT(n, ...) #define TU_LOG_HEX(n, ...) #define TU_LOG_LOCATION() @@ -143,14 +143,14 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3 #define TU_LOG0(...) #define TU_LOG0_MEM(...) -#define TU_LOG0_VAR(...) +#define TU_LOG0_PTR(...) #define TU_LOG0_INT(...) #define TU_LOG0_HEX(...) #ifndef TU_LOG1 #define TU_LOG1(...) #define TU_LOG1_MEM(...) - #define TU_LOG1_VAR(...) + #define TU_LOG1_PTR(...) #define TU_LOG1_INT(...) #define TU_LOG1_HEX(...) #endif @@ -158,7 +158,7 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3 #ifndef TU_LOG2 #define TU_LOG2(...) #define TU_LOG2_MEM(...) - #define TU_LOG2_VAR(...) + #define TU_LOG2_PTR(...) #define TU_LOG2_INT(...) #define TU_LOG2_HEX(...) #endif @@ -166,7 +166,7 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3 #ifndef TU_LOG3 #define TU_LOG3(...) #define TU_LOG3_MEM(...) - #define TU_LOG3_VAR(...) + #define TU_LOG3_PTR(...) #define TU_LOG3_INT(...) #define TU_LOG3_HEX(...) #endif diff --git a/src/host/usbh.c b/src/host/usbh.c index 4b278f2da..59b1c3280 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -540,7 +540,7 @@ bool tuh_control_xfer (tuh_xfer_t* xfer) const uint8_t rhport = usbh_get_rhport(daddr); TU_LOG2("[%u:%u] %s: ", rhport, daddr, xfer->setup->bRequest <= TUSB_REQ_SYNCH_FRAME ? tu_str_std_request[xfer->setup->bRequest] : "Unknown Request"); - TU_LOG2_VAR(xfer->setup); + TU_LOG2_PTR(xfer->setup); TU_LOG2("\r\n"); if (xfer->complete_cb) @@ -618,7 +618,11 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result if (XFER_RESULT_SUCCESS != result) { - TU_LOG1("[%u:%u] Control %s\r\n", rhport, dev_addr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED"); + TU_LOG1("[%u:%u] Control %s, xferred_bytes = %lu\r\n", rhport, dev_addr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED", xferred_bytes); + #if CFG_TUSB_DEBUG == 1 + TU_LOG1_PTR(request); + TU_LOG1("\r\n"); + #endif // terminate transfer if any stage failed _xfer_complete(dev_addr, result); -- cgit v1.3.1 From 8323e4b79a2052aee814ca8811e841bceb6a7a7d Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 22 Dec 2022 00:34:35 +0700 Subject: moving edpt_stream API into common tusb.c --- src/class/cdc/cdc_host.c | 179 ++++++++++---------------------------------- src/common/tusb_private.h | 92 ++++++++++++++++++++++- src/host/usbh.c | 1 - src/host/usbh_classdriver.h | 1 + src/tusb.c | 112 +++++++++++++++++++++++++-- 5 files changed, 239 insertions(+), 146 deletions(-) (limited to 'src/common') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 2f3406378..54d81dc0d 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -42,56 +42,23 @@ //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ -typedef struct { - tu_fifo_t ff; - - // mutex: read if ep rx, write if e tx - OSAL_MUTEX_DEF(ff_mutex); - - // TODO xfer_fifo can skip this buffer - uint8_t* ep_buf; - uint16_t ep_bufsize; - uint8_t ep_addr; -}tu_edpt_stream_t; - -bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool use_wr_mutex, bool overwritable, - void* ff_buf, uint16_t ff_bufsize, - uint8_t* ep_buf, uint16_t ep_bufsize) -{ - osal_mutex_t new_mutex = osal_mutex_create(&s->ff_mutex); - (void) new_mutex; - (void) use_wr_mutex; - - tu_fifo_config(&s->ff, ff_buf, ff_bufsize, 1, overwritable); - tu_fifo_config_mutex(&s->ff, use_wr_mutex ? new_mutex : NULL, use_wr_mutex ? NULL : new_mutex); - - s->ep_buf = ep_buf; - s->ep_bufsize = ep_bufsize; - - return true; -} - -bool tu_edpt_stream_clear(tu_edpt_stream_t* s) -{ - return tu_fifo_clear(&s->ff); -} -bool tu_edpt_stream_write_zlp_if_needed(uint8_t daddr, tu_edpt_stream_t* s, uint32_t last_xferred_bytes) +bool tu_edpt_stream_write_zlp_if_needed(tu_edpt_stream_t* s, uint32_t last_xferred_bytes) { - uint16_t const bulk_packet_size = (tuh_speed_get(daddr) == TUSB_SPEED_HIGH) ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS; + uint16_t const bulk_packet_size = (s->ep_speed == TUSB_SPEED_HIGH) ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS; // ZLP condition: no pending data, last transferred bytes is multiple of packet size TU_VERIFY( !tu_fifo_count(&s->ff) && last_xferred_bytes && (0 == (last_xferred_bytes & (bulk_packet_size-1))) ); - if ( usbh_edpt_claim(daddr, s->ep_addr) ) + if ( usbh_edpt_claim(s->daddr, s->ep_addr) ) { - TU_ASSERT( usbh_edpt_xfer(daddr, s->ep_addr, NULL, 0) ); + TU_ASSERT( usbh_edpt_xfer(s->daddr, s->ep_addr, NULL, 0) ); } return true; } -uint32_t tu_edpt_stream_write_xfer(uint8_t daddr, tu_edpt_stream_t* s) +uint32_t tu_edpt_stream_write_xfer(tu_edpt_stream_t* s) { // skip if no data TU_VERIFY( tu_fifo_count(&s->ff), 0 ); @@ -99,7 +66,7 @@ uint32_t tu_edpt_stream_write_xfer(uint8_t daddr, tu_edpt_stream_t* s) // Claim the endpoint // uint8_t const rhport = 0; // TU_VERIFY( usbd_edpt_claim(rhport, p_cdc->ep_in), 0 ); - TU_VERIFY( usbh_edpt_claim(daddr, s->ep_addr) ); + TU_VERIFY( usbh_edpt_claim(s->daddr, s->ep_addr) ); // Pull data from FIFO -> EP buf uint16_t const count = tu_fifo_read_n(&s->ff, s->ep_buf, s->ep_bufsize); @@ -107,7 +74,7 @@ uint32_t tu_edpt_stream_write_xfer(uint8_t daddr, tu_edpt_stream_t* s) if ( count ) { //TU_ASSERT( usbd_edpt_xfer(rhport, p_cdc->ep_in, p_cdc->epin_buf, count), 0 ); - TU_ASSERT( usbh_edpt_xfer(daddr, s->ep_addr, s->ep_buf, count), 0 ); + TU_ASSERT( usbh_edpt_xfer(s->daddr, s->ep_addr, s->ep_buf, count), 0 ); return count; }else { @@ -115,93 +82,28 @@ uint32_t tu_edpt_stream_write_xfer(uint8_t daddr, tu_edpt_stream_t* s) // Note: data is dropped if terminal is not connected //usbd_edpt_release(rhport, p_cdc->ep_in); - usbh_edpt_release(daddr, s->ep_addr); + usbh_edpt_release(s->daddr, s->ep_addr); return 0; } } -uint32_t tu_edpt_stream_write(uint8_t daddr, tu_edpt_stream_t* s, void const *buffer, uint32_t bufsize) -{ - uint16_t ret = tu_fifo_write_n(&s->ff, buffer, (uint16_t) bufsize); - - // flush if queue more than packet size - uint16_t const bulk_packet_size = (tuh_speed_get(daddr) == TUSB_SPEED_HIGH) ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS; - if ( (tu_fifo_count(&s->ff) >= bulk_packet_size) - /* || ((CFG_TUD_CDC_TX_BUFSIZE < BULK_PACKET_SIZE) && tu_fifo_full(&p_cdc->tx_ff)) */ ) - { - tu_edpt_stream_write_xfer(daddr, s); - } - - return ret; -} - -void tu_edpt_stream_read_xfer_complete(tu_edpt_stream_t* s, uint32_t xferred_bytes) -{ - tu_fifo_write_n(&s->ff, s->ep_buf, (uint16_t) xferred_bytes); -} - -uint32_t tu_edpt_stream_read_xfer(uint8_t daddr, tu_edpt_stream_t* s) +uint32_t tu_edpt_stream_write(tu_edpt_stream_t* s, void const *buffer, uint32_t bufsize) { - uint16_t available = tu_fifo_remaining(&s->ff); + TU_VERIFY(bufsize); // TODO support ZLP - // Prepare for incoming data but only allow what we can store in the ring buffer. - // TODO Actually we can still carry out the transfer, keeping count of received bytes - // and slowly move it to the FIFO when read(). - // This pre-check reduces endpoint claiming - uint16_t const bulk_packet_size = (tuh_speed_get(daddr) == TUSB_SPEED_HIGH) ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS; - TU_VERIFY(available >= bulk_packet_size); - - // claim endpoint - TU_VERIFY(usbh_edpt_claim(daddr, s->ep_addr), 0); - - // fifo can be changed before endpoint is claimed - available = tu_fifo_remaining(&s->ff); - - if ( available >= bulk_packet_size ) - { - // multiple of packet size limit by ep bufsize - uint16_t count = (uint16_t) (available & (bulk_packet_size -1)); - count = tu_min16(count, s->ep_bufsize); + uint16_t ret = tu_fifo_write_n(&s->ff, buffer, (uint16_t) bufsize); - TU_ASSERT( usbh_edpt_xfer(daddr, s->ep_addr, s->ep_buf, count), 0 ); - return count; - }else + // flush if fifo has more than packet size or + // in rare case: fifo depth is configured too small (which never reach packet size) + uint16_t const bulk_packet_size = (s->ep_speed == TUSB_SPEED_HIGH) ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS; + if ( (tu_fifo_count(&s->ff) >= bulk_packet_size) || ( tu_fifo_depth(&s->ff) < bulk_packet_size) ) { - // Release endpoint since we don't make any transfer - usbh_edpt_release(daddr, s->ep_addr); - return 0; + tu_edpt_stream_write_xfer(s); } -} - -uint32_t tu_edpt_stream_read(uint8_t daddr, tu_edpt_stream_t* s, void* buffer, uint32_t bufsize) -{ - uint32_t num_read = tu_fifo_read_n(&s->ff, buffer, (uint16_t) bufsize); - tu_edpt_stream_read_xfer(daddr, s); - return num_read; -} - -uint32_t tu_edpt_stream_read_available(tu_edpt_stream_t* s) -{ - return (uint32_t) tu_fifo_count(&s->ff); -} - -uint32_t tu_edpt_stream_write_available(tu_edpt_stream_t* s) -{ - return (uint32_t) tu_fifo_remaining(&s->ff); -} -bool tu_edpt_stream_read_clear(uint8_t daddr, tu_edpt_stream_t* s) -{ - bool ret = tu_fifo_clear(&s->ff); - tu_edpt_stream_read_xfer(daddr, s); return ret; } -bool tu_edpt_stream_write_clear(tu_edpt_stream_t* s) -{ - return tu_fifo_clear(&s->ff); -} - typedef struct { uint8_t daddr; uint8_t bInterfaceNumber; @@ -326,7 +228,7 @@ uint32_t tuh_cdc_write(uint8_t idx, void const* buffer, uint32_t bufsize) cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); - return tu_edpt_stream_write(p_cdc->daddr, &p_cdc->stream.tx, buffer, bufsize); + return tu_edpt_stream_write(&p_cdc->stream.tx, buffer, bufsize); } uint32_t tuh_cdc_write_flush(uint8_t idx) @@ -334,7 +236,7 @@ uint32_t tuh_cdc_write_flush(uint8_t idx) cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); - return tu_edpt_stream_write_xfer(p_cdc->daddr, &p_cdc->stream.tx); + return tu_edpt_stream_write_xfer(&p_cdc->stream.tx); } bool tuh_cdc_write_clear(uint8_t idx) @@ -342,7 +244,7 @@ bool tuh_cdc_write_clear(uint8_t idx) cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); - return tu_edpt_stream_write_clear(&p_cdc->stream.tx); + return tu_edpt_stream_clear(&p_cdc->stream.tx); } uint32_t tuh_cdc_write_available(uint8_t idx) @@ -358,7 +260,7 @@ uint32_t tuh_cdc_read (uint8_t idx, void* buffer, uint32_t bufsize) cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); - return tu_edpt_stream_read(p_cdc->daddr, &p_cdc->stream.rx, buffer, bufsize); + return tu_edpt_stream_read(&p_cdc->stream.rx, buffer, bufsize); } uint32_t tuh_cdc_read_available(uint8_t idx) @@ -374,7 +276,9 @@ bool tuh_cdc_read_clear (uint8_t idx) cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); - return tu_edpt_stream_read_clear(p_cdc->daddr, &p_cdc->stream.rx); + bool ret = tu_edpt_stream_clear(&p_cdc->stream.rx); + tu_edpt_stream_read_xfer(&p_cdc->stream.rx); + return ret; } //--------------------------------------------------------------------+ @@ -452,13 +356,13 @@ void cdch_init(void) { cdch_interface_t* p_cdc = &cdch_data[i]; - tu_edpt_stream_init(&p_cdc->stream.tx, true, false, - p_cdc->stream.tx_ff_buf, CFG_TUH_CDC_TX_BUFSIZE, - p_cdc->stream.tx_ep_buf, CFG_TUH_CDC_TX_EPSIZE); + tu_edpt_stream_init(&p_cdc->stream.tx, true, true, false, + p_cdc->stream.tx_ff_buf, CFG_TUH_CDC_TX_BUFSIZE, + p_cdc->stream.tx_ep_buf, CFG_TUH_CDC_TX_EPSIZE); - tu_edpt_stream_init(&p_cdc->stream.rx, false, false, - p_cdc->stream.rx_ff_buf, CFG_TUH_CDC_RX_BUFSIZE, - p_cdc->stream.rx_ep_buf, CFG_TUH_CDC_RX_EPSIZE); + tu_edpt_stream_init(&p_cdc->stream.rx, true, false, false, + p_cdc->stream.rx_ff_buf, CFG_TUH_CDC_RX_BUFSIZE, + p_cdc->stream.rx_ep_buf, CFG_TUH_CDC_RX_EPSIZE); } } @@ -475,8 +379,6 @@ void cdch_close(uint8_t daddr) //tu_memclr(p_cdc, sizeof(cdch_interface_t)); p_cdc->daddr = 0; p_cdc->bInterfaceNumber = 0; - tu_edpt_stream_clear(&p_cdc->stream.tx); - tu_edpt_stream_clear(&p_cdc->stream.rx); } } } @@ -495,23 +397,22 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t // invoke tx complete callback to possibly refill tx fifo if (tuh_cdc_tx_complete_cb) tuh_cdc_tx_complete_cb(idx); - if ( 0 == tu_edpt_stream_write_xfer(daddr, &p_cdc->stream.tx) ) + if ( 0 == tu_edpt_stream_write_xfer(&p_cdc->stream.tx) ) { // If there is no data left, a ZLP should be sent if needed // xferred_bytes is multiple of EP Packet size and not zero - tu_edpt_stream_write_zlp_if_needed(daddr, &p_cdc->stream.tx, xferred_bytes); + tu_edpt_stream_write_zlp_if_needed(&p_cdc->stream.tx, xferred_bytes); } } else if ( ep_addr == p_cdc->stream.rx.ep_addr ) { - // skip if ZLP - if (xferred_bytes) tu_edpt_stream_read_xfer_complete(&p_cdc->stream.rx, xferred_bytes); + tu_edpt_stream_read_xfer_complete(&p_cdc->stream.rx, xferred_bytes); // invoke receive callback if (tuh_cdc_rx_cb) tuh_cdc_rx_cb(idx); // prepare for next transfer if needed - tu_edpt_stream_read_xfer(daddr, &p_cdc->stream.rx); + tu_edpt_stream_read_xfer(&p_cdc->stream.rx); }else if ( ep_addr == p_cdc->ep_notif ) { // TODO handle notification endpoint @@ -527,7 +428,7 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t // Enumeration //--------------------------------------------------------------------+ -bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) +bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) { (void) rhport; @@ -542,7 +443,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it cdch_interface_t * p_cdc = find_new_itf(); TU_VERIFY(p_cdc); - p_cdc->daddr = dev_addr; + p_cdc->daddr = daddr; p_cdc->bInterfaceNumber = itf_desc->bInterfaceNumber; p_cdc->bInterfaceSubClass = itf_desc->bInterfaceSubClass; p_cdc->bInterfaceProtocol = itf_desc->bInterfaceProtocol; @@ -569,7 +470,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it TU_ASSERT(TUSB_DESC_ENDPOINT == tu_desc_type(p_desc)); tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) p_desc; - TU_ASSERT( tuh_edpt_open(dev_addr, desc_ep) ); + TU_ASSERT( tuh_edpt_open(daddr, desc_ep) ); p_cdc->ep_notif = desc_ep->bEndpointAddress; p_desc = tu_desc_next(p_desc); @@ -589,14 +490,14 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it TU_ASSERT(TUSB_DESC_ENDPOINT == desc_ep->bDescriptorType && TUSB_XFER_BULK == desc_ep->bmAttributes.xfer); - TU_ASSERT(tuh_edpt_open(dev_addr, desc_ep)); + TU_ASSERT(tuh_edpt_open(daddr, desc_ep)); if ( tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN ) { - p_cdc->stream.rx.ep_addr = desc_ep->bEndpointAddress; + tu_edpt_stream_open(&p_cdc->stream.rx, daddr, desc_ep); }else { - p_cdc->stream.tx.ep_addr = desc_ep->bEndpointAddress; + tu_edpt_stream_open(&p_cdc->stream.tx, daddr, desc_ep); } p_desc = tu_desc_next(p_desc); @@ -616,7 +517,7 @@ static void config_cdc_complete(uint8_t daddr, uint8_t itf_num) // Prepare for incoming data cdch_interface_t* p_cdc = get_itf(idx); - tu_edpt_stream_read_xfer(daddr, &p_cdc->stream.rx); + tu_edpt_stream_read_xfer(&p_cdc->stream.rx); } // notify usbh that driver enumeration is complete diff --git a/src/common/tusb_private.h b/src/common/tusb_private.h index b34506f65..01078eed3 100644 --- a/src/common/tusb_private.h +++ b/src/common/tusb_private.h @@ -28,6 +28,8 @@ #ifndef _TUSB_PRIVATE_H_ #define _TUSB_PRIVATE_H_ +// Internal Helper used by Host and Device Stack + #ifdef __cplusplus extern "C" { #endif @@ -39,8 +41,31 @@ typedef struct TU_ATTR_PACKED volatile uint8_t claimed : 1; }tu_edpt_state_t; +typedef struct { + bool is_host; // host or device most + union { + uint8_t daddr; + uint8_t rhport; + uint8_t hwid; + }; + uint8_t ep_addr; + uint8_t ep_speed; + + uint16_t ep_packetsize; + uint16_t ep_bufsize; + + // TODO xfer_fifo can skip this buffer + uint8_t* ep_buf; + + tu_fifo_t ff; + + // mutex: read if ep rx, write if e tx + OSAL_MUTEX_DEF(ff_mutex); + +}tu_edpt_stream_t; + //--------------------------------------------------------------------+ -// Internal Helper used by Host and Device Stack +// Endpoint //--------------------------------------------------------------------+ // Check if endpoint descriptor is valid per USB specs @@ -58,6 +83,71 @@ bool tu_edpt_claim(tu_edpt_state_t* ep_state, osal_mutex_t mutex); // Release an endpoint with provided mutex bool tu_edpt_release(tu_edpt_state_t* ep_state, osal_mutex_t mutex); +//--------------------------------------------------------------------+ +// Endpoint Stream +//--------------------------------------------------------------------+ + +// Init an stream, should only called once +bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool overwritable, + void* ff_buf, uint16_t ff_bufsize, uint8_t* ep_buf, uint16_t ep_bufsize); + +// Open an stream for an endpoint +// hwid is either device address (host mode) or rhport (device mode) +TU_ATTR_ALWAYS_INLINE static inline +void tu_edpt_stream_open(tu_edpt_stream_t* s, uint8_t hwid, tusb_desc_endpoint_t const *desc_ep) +{ + tu_fifo_clear(&s->ff); + s->hwid = hwid; + s->ep_addr = desc_ep->bEndpointAddress; + s->ep_packetsize = tu_edpt_packet_size(desc_ep); +} + +// Clear fifo +TU_ATTR_ALWAYS_INLINE static inline +bool tu_edpt_stream_clear(tu_edpt_stream_t* s) +{ + return tu_fifo_clear(&s->ff); +} + +//------------- Write -------------// + +// Write to stream +uint32_t tu_edpt_stream_write(tu_edpt_stream_t* s, void const *buffer, uint32_t bufsize); + +// Start an usb transfer if endpoint is not busy +uint32_t tu_edpt_stream_write_xfer(tu_edpt_stream_t* s); + +// Get the number of bytes available for writing +TU_ATTR_ALWAYS_INLINE static inline +uint32_t tu_edpt_stream_write_available(tu_edpt_stream_t* s) +{ + return (uint32_t) tu_fifo_remaining(&s->ff); +} + + +//------------- Read -------------// + +// Read from stream +uint32_t tu_edpt_stream_read(tu_edpt_stream_t* s, void* buffer, uint32_t bufsize); + +// Start an usb transfer if endpoint is not busy +uint32_t tu_edpt_stream_read_xfer(tu_edpt_stream_t* s); + +// Must be called in the transfer complete callback +TU_ATTR_ALWAYS_INLINE static inline +void tu_edpt_stream_read_xfer_complete(tu_edpt_stream_t* s, uint32_t xferred_bytes) +{ + tu_fifo_write_n(&s->ff, s->ep_buf, (uint16_t) xferred_bytes); +} + +// Get the number of bytes available for reading +TU_ATTR_ALWAYS_INLINE static inline +uint32_t tu_edpt_stream_read_available(tu_edpt_stream_t* s) +{ + return (uint32_t) tu_fifo_count(&s->ff); +} + + #ifdef __cplusplus } #endif diff --git a/src/host/usbh.c b/src/host/usbh.c index 36fc5fded..f0ca7be2e 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -30,7 +30,6 @@ #include "host/hcd.h" #include "tusb.h" -#include "common/tusb_private.h" #include "host/usbh_classdriver.h" #include "hub.h" diff --git a/src/host/usbh_classdriver.h b/src/host/usbh_classdriver.h index 7f72560c3..be9811641 100644 --- a/src/host/usbh_classdriver.h +++ b/src/host/usbh_classdriver.h @@ -29,6 +29,7 @@ #include "osal/osal.h" #include "common/tusb_fifo.h" +#include "common/tusb_private.h" #ifdef __cplusplus extern "C" { diff --git a/src/tusb.c b/src/tusb.c index f4380f89c..05e0d4c1f 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -31,11 +31,18 @@ #include "tusb.h" #include "common/tusb_private.h" -// TODO clean up #if CFG_TUD_ENABLED #include "device/usbd_pvt.h" #endif +#if CFG_TUH_ENABLED +#include "host/usbh_classdriver.h" +#endif + +//--------------------------------------------------------------------+ +// Public API +//--------------------------------------------------------------------+ + bool tusb_init(void) { #if CFG_TUD_ENABLED && defined(TUD_OPT_RHPORT) @@ -67,7 +74,7 @@ bool tusb_inited(void) } //--------------------------------------------------------------------+ -// Internal Helper for both Host and Device stack +// Endpoint Helper for both Host and Device stack //--------------------------------------------------------------------+ bool tu_edpt_claim(tu_edpt_state_t* ep_state, osal_mutex_t mutex) @@ -196,9 +203,104 @@ uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, return len; } -/*------------------------------------------------------------------*/ -/* Debug - *------------------------------------------------------------------*/ +//--------------------------------------------------------------------+ +// Endpoint Stream Helper for both Host and Device stack +//--------------------------------------------------------------------+ + +bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool overwritable, + void* ff_buf, uint16_t ff_bufsize, uint8_t* ep_buf, uint16_t ep_bufsize) +{ + osal_mutex_t new_mutex = osal_mutex_create(&s->ff_mutex); + (void) new_mutex; + (void) is_tx; + + s->is_host = is_host; + tu_fifo_config(&s->ff, ff_buf, ff_bufsize, 1, overwritable); + tu_fifo_config_mutex(&s->ff, is_tx ? new_mutex : NULL, is_tx ? NULL : new_mutex); + + s->ep_buf = ep_buf; + s->ep_bufsize = ep_bufsize; + + return true; +} + +//------------- Stream Write -------------// + +//------------- Stream Read -------------// + +uint32_t tu_edpt_stream_read_xfer(tu_edpt_stream_t* s) +{ + uint16_t available = tu_fifo_remaining(&s->ff); + + // Prepare for incoming data but only allow what we can store in the ring buffer. + // TODO Actually we can still carry out the transfer, keeping count of received bytes + // and slowly move it to the FIFO when read(). + // This pre-check reduces endpoint claiming + TU_VERIFY(available >= s->ep_packetsize); + + // claim endpoint + if (s->is_host) + { + #if CFG_TUH_ENABLED + TU_VERIFY(usbh_edpt_claim(s->daddr, s->ep_addr), 0); + #endif + }else + { + #if CFG_TUD_ENABLED + TU_VERIFY(usbd_edpt_claim(s->rhport, s->ep_addr), 0); + #endif + } + + // get available again since fifo can be changed before endpoint is claimed + available = tu_fifo_remaining(&s->ff); + + if ( available >= s->ep_packetsize ) + { + // multiple of packet size limit by ep bufsize + uint16_t count = (uint16_t) (available & (s->ep_packetsize -1)); + count = tu_min16(count, s->ep_bufsize); + + if (s->is_host) + { + #if CFG_TUH_ENABLED + TU_ASSERT( usbh_edpt_xfer(s->daddr, s->ep_addr, s->ep_buf, count), 0 ); + #endif + }else + { + #if CFG_TUD_ENABLED + TU_ASSERT( usbd_edpt_xfer(s->rhport, s->ep_addr, s->ep_buf, count), 0 ); + #endif + } + return count; + }else + { + // Release endpoint since we don't make any transfer + if (s->is_host) + { + #if CFG_TUH_ENABLED + usbh_edpt_release(s->daddr, s->ep_addr); + #endif + }else + { + #if CFG_TUD_ENABLED + usbd_edpt_release(s->rhport, s->ep_addr); + #endif + } + + return 0; + } +} + +uint32_t tu_edpt_stream_read(tu_edpt_stream_t* s, void* buffer, uint32_t bufsize) +{ + uint32_t num_read = tu_fifo_read_n(&s->ff, buffer, (uint16_t) bufsize); + tu_edpt_stream_read_xfer(s); + return num_read; +} + +//--------------------------------------------------------------------+ +// Debug +//--------------------------------------------------------------------+ #if CFG_TUSB_DEBUG #include -- cgit v1.3.1 From e3c9d9450009f757b9ddf5f94a00f14e7cfb0471 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 22 Dec 2022 11:16:39 +0700 Subject: fix stream read count computation --- src/class/cdc/cdc_host.c | 63 +------------------------------ src/common/tusb_private.h | 21 +++++++++-- src/tusb.c | 96 ++++++++++++++++++++++++++++++++++++++++------- 3 files changed, 101 insertions(+), 79 deletions(-) (limited to 'src/common') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 54d81dc0d..469725e72 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -43,67 +43,6 @@ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ -bool tu_edpt_stream_write_zlp_if_needed(tu_edpt_stream_t* s, uint32_t last_xferred_bytes) -{ - uint16_t const bulk_packet_size = (s->ep_speed == TUSB_SPEED_HIGH) ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS; - - // ZLP condition: no pending data, last transferred bytes is multiple of packet size - TU_VERIFY( !tu_fifo_count(&s->ff) && last_xferred_bytes && (0 == (last_xferred_bytes & (bulk_packet_size-1))) ); - - if ( usbh_edpt_claim(s->daddr, s->ep_addr) ) - { - TU_ASSERT( usbh_edpt_xfer(s->daddr, s->ep_addr, NULL, 0) ); - } - - return true; -} - -uint32_t tu_edpt_stream_write_xfer(tu_edpt_stream_t* s) -{ - // skip if no data - TU_VERIFY( tu_fifo_count(&s->ff), 0 ); - - // Claim the endpoint - // uint8_t const rhport = 0; - // TU_VERIFY( usbd_edpt_claim(rhport, p_cdc->ep_in), 0 ); - TU_VERIFY( usbh_edpt_claim(s->daddr, s->ep_addr) ); - - // Pull data from FIFO -> EP buf - uint16_t const count = tu_fifo_read_n(&s->ff, s->ep_buf, s->ep_bufsize); - - if ( count ) - { - //TU_ASSERT( usbd_edpt_xfer(rhport, p_cdc->ep_in, p_cdc->epin_buf, count), 0 ); - TU_ASSERT( usbh_edpt_xfer(s->daddr, s->ep_addr, s->ep_buf, count), 0 ); - return count; - }else - { - // Release endpoint since we don't make any transfer - // Note: data is dropped if terminal is not connected - //usbd_edpt_release(rhport, p_cdc->ep_in); - - usbh_edpt_release(s->daddr, s->ep_addr); - return 0; - } -} - -uint32_t tu_edpt_stream_write(tu_edpt_stream_t* s, void const *buffer, uint32_t bufsize) -{ - TU_VERIFY(bufsize); // TODO support ZLP - - uint16_t ret = tu_fifo_write_n(&s->ff, buffer, (uint16_t) bufsize); - - // flush if fifo has more than packet size or - // in rare case: fifo depth is configured too small (which never reach packet size) - uint16_t const bulk_packet_size = (s->ep_speed == TUSB_SPEED_HIGH) ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS; - if ( (tu_fifo_count(&s->ff) >= bulk_packet_size) || ( tu_fifo_depth(&s->ff) < bulk_packet_size) ) - { - tu_edpt_stream_write_xfer(s); - } - - return ret; -} - typedef struct { uint8_t daddr; uint8_t bInterfaceNumber; @@ -379,6 +318,8 @@ void cdch_close(uint8_t daddr) //tu_memclr(p_cdc, sizeof(cdch_interface_t)); p_cdc->daddr = 0; p_cdc->bInterfaceNumber = 0; + tu_edpt_stream_close(&p_cdc->stream.tx); + tu_edpt_stream_close(&p_cdc->stream.rx); } } } diff --git a/src/common/tusb_private.h b/src/common/tusb_private.h index 01078eed3..d0c7a84fb 100644 --- a/src/common/tusb_private.h +++ b/src/common/tusb_private.h @@ -87,7 +87,7 @@ bool tu_edpt_release(tu_edpt_state_t* ep_state, osal_mutex_t mutex); // Endpoint Stream //--------------------------------------------------------------------+ -// Init an stream, should only called once +// Init an stream, should only be called once bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool overwritable, void* ff_buf, uint16_t ff_bufsize, uint8_t* ep_buf, uint16_t ep_bufsize); @@ -102,6 +102,13 @@ void tu_edpt_stream_open(tu_edpt_stream_t* s, uint8_t hwid, tusb_desc_endpoint_t s->ep_packetsize = tu_edpt_packet_size(desc_ep); } +TU_ATTR_ALWAYS_INLINE static inline +void tu_edpt_stream_close(tu_edpt_stream_t* s) +{ + s->hwid = 0; + s->ep_addr = 0; +} + // Clear fifo TU_ATTR_ALWAYS_INLINE static inline bool tu_edpt_stream_clear(tu_edpt_stream_t* s) @@ -109,7 +116,9 @@ bool tu_edpt_stream_clear(tu_edpt_stream_t* s) return tu_fifo_clear(&s->ff); } -//------------- Write -------------// +//--------------------------------------------------------------------+ +// Stream Write +//--------------------------------------------------------------------+ // Write to stream uint32_t tu_edpt_stream_write(tu_edpt_stream_t* s, void const *buffer, uint32_t bufsize); @@ -117,6 +126,9 @@ uint32_t tu_edpt_stream_write(tu_edpt_stream_t* s, void const *buffer, uint32_t // Start an usb transfer if endpoint is not busy uint32_t tu_edpt_stream_write_xfer(tu_edpt_stream_t* s); +// Start an zero-length packet if needed +bool tu_edpt_stream_write_zlp_if_needed(tu_edpt_stream_t* s, uint32_t last_xferred_bytes); + // Get the number of bytes available for writing TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_edpt_stream_write_available(tu_edpt_stream_t* s) @@ -124,8 +136,9 @@ uint32_t tu_edpt_stream_write_available(tu_edpt_stream_t* s) return (uint32_t) tu_fifo_remaining(&s->ff); } - -//------------- Read -------------// +//--------------------------------------------------------------------+ +// Stream Read +//--------------------------------------------------------------------+ // Read from stream uint32_t tu_edpt_stream_read(tu_edpt_stream_t* s, void* buffer, uint32_t bufsize); diff --git a/src/tusb.c b/src/tusb.c index 05e0d4c1f..0d0e84a49 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -224,9 +224,86 @@ bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool ove return true; } -//------------- Stream Write -------------// +TU_ATTR_ALWAYS_INLINE static inline +bool stream_claim(tu_edpt_stream_t* s) +{ + if (s->is_host) + { + #if CFG_TUH_ENABLED + return usbh_edpt_claim(s->daddr, s->ep_addr); + #endif + }else + { + #if CFG_TUD_ENABLED + return usbd_edpt_claim(s->rhport, s->ep_addr); + #endif + } + + return false; +} -//------------- Stream Read -------------// + +//--------------------------------------------------------------------+ +// Stream Write +//--------------------------------------------------------------------+ + +bool tu_edpt_stream_write_zlp_if_needed(tu_edpt_stream_t* s, uint32_t last_xferred_bytes) +{ + // ZLP condition: no pending data, last transferred bytes is multiple of packet size + TU_VERIFY( !tu_fifo_count(&s->ff) && last_xferred_bytes && (0 == (last_xferred_bytes & (s->ep_packetsize-1))) ); + + TU_VERIFY( stream_claim(s) ); + TU_ASSERT( usbh_edpt_xfer(s->daddr, s->ep_addr, NULL, 0) ); + + return true; +} + +uint32_t tu_edpt_stream_write_xfer(tu_edpt_stream_t* s) +{ + // skip if no data + TU_VERIFY( tu_fifo_count(&s->ff), 0 ); + + // Claim the endpoint + TU_VERIFY( stream_claim(s), 0 ); + + // Pull data from FIFO -> EP buf + uint16_t const count = tu_fifo_read_n(&s->ff, s->ep_buf, s->ep_bufsize); + + if ( count ) + { + //TU_ASSERT( usbd_edpt_xfer(rhport, p_cdc->ep_in, p_cdc->epin_buf, count), 0 ); + TU_ASSERT( usbh_edpt_xfer(s->daddr, s->ep_addr, s->ep_buf, count), 0 ); + return count; + }else + { + // Release endpoint since we don't make any transfer + // Note: data is dropped if terminal is not connected + //usbd_edpt_release(rhport, p_cdc->ep_in); + + usbh_edpt_release(s->daddr, s->ep_addr); + return 0; + } +} + +uint32_t tu_edpt_stream_write(tu_edpt_stream_t* s, void const *buffer, uint32_t bufsize) +{ + TU_VERIFY(bufsize); // TODO support ZLP + + uint16_t ret = tu_fifo_write_n(&s->ff, buffer, (uint16_t) bufsize); + + // flush if fifo has more than packet size or + // in rare case: fifo depth is configured too small (which never reach packet size) + if ( (tu_fifo_count(&s->ff) >= s->ep_packetsize) || (tu_fifo_depth(&s->ff) < s->ep_packetsize) ) + { + tu_edpt_stream_write_xfer(s); + } + + return ret; +} + +//--------------------------------------------------------------------+ +// Stream Read +//--------------------------------------------------------------------+ uint32_t tu_edpt_stream_read_xfer(tu_edpt_stream_t* s) { @@ -239,17 +316,7 @@ uint32_t tu_edpt_stream_read_xfer(tu_edpt_stream_t* s) TU_VERIFY(available >= s->ep_packetsize); // claim endpoint - if (s->is_host) - { - #if CFG_TUH_ENABLED - TU_VERIFY(usbh_edpt_claim(s->daddr, s->ep_addr), 0); - #endif - }else - { - #if CFG_TUD_ENABLED - TU_VERIFY(usbd_edpt_claim(s->rhport, s->ep_addr), 0); - #endif - } + TU_VERIFY(stream_claim(s), 0); // get available again since fifo can be changed before endpoint is claimed available = tu_fifo_remaining(&s->ff); @@ -257,7 +324,7 @@ uint32_t tu_edpt_stream_read_xfer(tu_edpt_stream_t* s) if ( available >= s->ep_packetsize ) { // multiple of packet size limit by ep bufsize - uint16_t count = (uint16_t) (available & (s->ep_packetsize -1)); + uint16_t count = (uint16_t) (available & ~(s->ep_packetsize -1)); count = tu_min16(count, s->ep_bufsize); if (s->is_host) @@ -301,6 +368,7 @@ uint32_t tu_edpt_stream_read(tu_edpt_stream_t* s, void* buffer, uint32_t bufsize //--------------------------------------------------------------------+ // Debug //--------------------------------------------------------------------+ + #if CFG_TUSB_DEBUG #include -- cgit v1.3.1 From 48d4a67ec5468f9fd7c073acd599a1271b9e877f Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Dec 2022 01:11:13 +0700 Subject: add tuh_cdc_peek() --- src/class/cdc/cdc_device.h | 2 +- src/class/cdc/cdc_host.c | 8 ++++++++ src/class/cdc/cdc_host.h | 3 +++ src/common/tusb_fifo.c | 2 -- src/common/tusb_private.h | 5 +++++ 5 files changed, 17 insertions(+), 3 deletions(-) (limited to 'src/common') diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h index a7d25bd32..f8a004df4 100644 --- a/src/class/cdc/cdc_device.h +++ b/src/class/cdc/cdc_device.h @@ -80,7 +80,7 @@ int32_t tud_cdc_n_read_char (uint8_t itf); // Clear the received FIFO void tud_cdc_n_read_flush (uint8_t itf); -// Get a byte from FIFO at the specified position without removing it +// Get a byte from FIFO without removing it bool tud_cdc_n_peek (uint8_t itf, uint8_t* ui8); // Write bytes to TX FIFO, data may remain in the FIFO for a while diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 17dc877f8..e9c3d34cb 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -228,6 +228,14 @@ uint32_t tuh_cdc_read_available(uint8_t idx) return tu_edpt_stream_read_available(&p_cdc->stream.rx); } +bool tuh_cdc_peek(uint8_t idx, uint8_t* ch) +{ + cdch_interface_t* p_cdc = get_itf(idx); + TU_VERIFY(p_cdc); + + return tu_edpt_stream_peek(&p_cdc->stream.rx, ch); +} + bool tuh_cdc_read_clear (uint8_t idx) { cdch_interface_t* p_cdc = get_itf(idx); diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index 502ad430d..c759527e6 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -134,6 +134,9 @@ uint32_t tuh_cdc_read_available(uint8_t idx); // Read from cdc interface uint32_t tuh_cdc_read (uint8_t idx, void* buffer, uint32_t bufsize); +// Get a byte from RX FIFO without removing it +bool tuh_cdc_peek(uint8_t idx, uint8_t* ch); + // Clear the received FIFO bool tuh_cdc_read_clear (uint8_t idx); diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index b857c6444..d45ca09ed 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -682,8 +682,6 @@ uint16_t tu_fifo_read_n_const_addr_full_words(tu_fifo_t* f, void * buffer, uint1 @param[in] f Pointer to the FIFO buffer to manipulate - @param[in] offset - Position to read from in the FIFO buffer with respect to read pointer @param[in] p_buffer Pointer to the place holder for data read from the buffer diff --git a/src/common/tusb_private.h b/src/common/tusb_private.h index d0c7a84fb..d5541856c 100644 --- a/src/common/tusb_private.h +++ b/src/common/tusb_private.h @@ -160,6 +160,11 @@ uint32_t tu_edpt_stream_read_available(tu_edpt_stream_t* s) return (uint32_t) tu_fifo_count(&s->ff); } +TU_ATTR_ALWAYS_INLINE static inline +bool tu_edpt_stream_peek(tu_edpt_stream_t* s, uint8_t* ch) +{ + return tu_fifo_peek(&s->ff, ch); +} #ifdef __cplusplus } -- cgit v1.3.1 From 9c73c1a532649630de5e55400632bcca90ebea06 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 6 Jan 2023 10:56:19 +0700 Subject: minor clean up --- src/common/tusb_fifo.c | 4 ++-- src/common/tusb_fifo.h | 8 +++----- 2 files changed, 5 insertions(+), 7 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 6862a6f43..d3875a7d4 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -39,12 +39,12 @@ // implement mutex lock and unlock #if CFG_FIFO_MUTEX -static inline void _ff_lock(tu_fifo_mutex_t mutex) +static inline void _ff_lock(osal_mutex_t mutex) { if (mutex) osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER); } -static inline void _ff_unlock(tu_fifo_mutex_t mutex) +static inline void _ff_unlock(osal_mutex_t mutex) { if (mutex) osal_mutex_unlock(mutex); } diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h index f1810e39c..f72ff295b 100644 --- a/src/common/tusb_fifo.h +++ b/src/common/tusb_fifo.h @@ -44,8 +44,6 @@ extern "C" { #include "common/tusb_common.h" #include "osal/osal.h" -#define tu_fifo_mutex_t osal_mutex_t - // mutex is only needed for RTOS // for OS None, we don't get preempted #define CFG_FIFO_MUTEX OSAL_MUTEX_REQUIRED @@ -121,8 +119,8 @@ typedef struct volatile uint16_t rd_idx ; ///< read index #if OSAL_MUTEX_REQUIRED - tu_fifo_mutex_t mutex_wr; - tu_fifo_mutex_t mutex_rd; + osal_mutex_t mutex_wr; + osal_mutex_t mutex_rd; #endif } tu_fifo_t; @@ -155,7 +153,7 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si #if OSAL_MUTEX_REQUIRED TU_ATTR_ALWAYS_INLINE static inline -void tu_fifo_config_mutex(tu_fifo_t *f, tu_fifo_mutex_t wr_mutex, tu_fifo_mutex_t rd_mutex) +void tu_fifo_config_mutex(tu_fifo_t *f, osal_mutex_t wr_mutex, osal_mutex_t rd_mutex) { f->mutex_wr = wr_mutex; f->mutex_rd = rd_mutex; -- cgit v1.3.1 From 2a1b81e3c50f5e37530c8318b7fb7767ba771979 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 6 Jan 2023 11:51:17 +0700 Subject: minimize tu_fifo size to 16 - remove non_used_index_space - packed overwritable with item_size --- src/common/tusb_fifo.c | 37 ++++++++++++++++++------------------- src/common/tusb_fifo.h | 40 +++++++++++++++++++--------------------- src/device/usbd.c | 2 ++ 3 files changed, 39 insertions(+), 40 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index d3875a7d4..4dfe7bd81 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -68,22 +68,19 @@ typedef enum bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_size, bool overwritable) { - if (depth > 0x8000) return false; // Maximum depth is 2^15 items + // Limit index space to 2*depth - this allows for a fast "modulo" calculation + // but limits the maximum depth to 2^16/2 = 2^15 and buffer overflows are detectable + // only if overflow happens once (important for unsupervised DMA applications) + if (depth > 0x8000) return false; _ff_lock(f->mutex_wr); _ff_lock(f->mutex_rd); - f->buffer = (uint8_t*) buffer; - f->depth = depth; - f->item_size = item_size; + f->buffer = (uint8_t*) buffer; + f->depth = depth; + f->item_size = (uint16_t) (item_size & 0x7FFF); f->overwritable = overwritable; - // Limit index space to 2*depth - this allows for a fast "modulo" calculation - // but limits the maximum depth to 2^16/2 = 2^15 and buffer overflows are detectable - // only if overflow happens once (important for unsupervised DMA applications) - //f->max_pointer_idx = (uint16_t) (2*depth - 1); - f->non_used_index_space = (uint16_t) (UINT16_MAX - (2*f->depth-1)); - f->rd_idx = f->wr_idx = 0; _ff_unlock(f->mutex_wr); @@ -331,7 +328,8 @@ static uint16_t advance_pointer(tu_fifo_t* f, uint16_t idx, uint16_t offset) uint16_t next_p = (uint16_t) (idx + offset); if ( (idx > next_p) || (next_p >= 2*f->depth) ) { - next_p = (uint16_t) (next_p + f->non_used_index_space); + uint16_t const non_used_index_space = (uint16_t) (UINT16_MAX - (2*f->depth-1)); + next_p = (uint16_t) (next_p + non_used_index_space); } return next_p; @@ -346,7 +344,8 @@ static uint16_t backward_pointer(tu_fifo_t* f, uint16_t p, uint16_t offset) uint16_t new_p = (uint16_t) (p - offset); if ( (p < new_p) || (new_p >= 2*f->depth) ) { - new_p = (uint16_t) (new_p - f->non_used_index_space); + uint16_t const non_used_index_space = (uint16_t) (UINT16_MAX - (2*f->depth-1)); + new_p = (uint16_t) (new_p - non_used_index_space); } return new_p; @@ -363,13 +362,15 @@ static inline uint16_t idx2ptr(uint16_t idx, uint16_t depth) // Works on local copies of w and r - return only the difference and as such can be used to determine an overflow static inline uint16_t _tu_fifo_count(tu_fifo_t* f, uint16_t wr_idx, uint16_t rd_idx) { - uint16_t cnt = (uint16_t) (wr_idx-rd_idx); + uint16_t cnt; // In case we have non-power of two depth we need a further modification - if (rd_idx > wr_idx) + if (wr_idx >= rd_idx) + { + cnt = (uint16_t) (wr_idx - rd_idx); + } else { - // 2*f->depth - (rd_idx - wr_idx); - cnt = (uint16_t) (cnt - f->non_used_index_space); + cnt = (uint16_t) (2*f->depth - (rd_idx - wr_idx)); } return cnt; @@ -395,7 +396,7 @@ static inline bool _tu_fifo_full(tu_fifo_t* f, uint16_t wAbs, uint16_t rAbs) // use DMAs, write functions do not allow such an error. static inline bool _tu_fifo_overflowed(tu_fifo_t* f, uint16_t wr_idx, uint16_t rd_idx) { - return (_tu_fifo_count(f, wr_idx, rd_idx) > f->depth); + return _tu_fifo_count(f, wr_idx, rd_idx) > f->depth; } // Works on local copies of w @@ -868,8 +869,6 @@ bool tu_fifo_clear(tu_fifo_t *f) _ff_lock(f->mutex_rd); f->rd_idx = f->wr_idx = 0; - //f->max_pointer_idx = (uint16_t) (2*f->depth-1); - f->non_used_index_space = (uint16_t) (UINT16_MAX - (2*f->depth-1)); _ff_unlock(f->mutex_wr); _ff_unlock(f->mutex_rd); diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h index f72ff295b..2f60ec2f4 100644 --- a/src/common/tusb_fifo.h +++ b/src/common/tusb_fifo.h @@ -69,8 +69,8 @@ extern "C" { * | 0 | 1 | W | 3 | 4 | R | * * - Number of items in the fifo can be determined in either cases: - * - case W > R: Count = W - R - * - case W < R: Count = 2*depth - (R - W) + * - case W >= R: Count = W - R + * - case W < R: Count = 2*depth - (R - W) * * In non-overwritable mode, computed Count (in above 2 cases) is at most equal to depth. * However, in over-writable mode, write index can be repeatedly increased and count can be @@ -82,10 +82,10 @@ extern "C" { * ------------------------- * | R | 1 | 2 | 3 | W | 5 | * - * - Double Overflowed i.e index is out of allowed range [0,2*depth) e.g: + * - Double Overflowed i.e index is out of allowed range [0,2*depth) + * This occurs when we continue to write after 1st overflowed to 2nd overflowed. e.g: * write(3), write(1), write(2) - * Continue to write after overflowed to 2nd overflowed. - * We must prevent 2nd overflowed since it will cause incorrect computed of count, in above example + * This must be prevented since it will cause unrecoverable state, in above example * if not handled the fifo will be empty instead of continue-to-be full. Since we must not modify * read index in write() function, which cause race condition. We will re-position write index so that * after data is written it is a full fifo i.e W = depth - R @@ -106,17 +106,16 @@ extern "C" { */ typedef struct { - uint8_t* buffer ; ///< buffer pointer - uint16_t depth ; ///< max items - uint16_t item_size ; ///< size of each item + uint8_t* buffer ; // buffer pointer + uint16_t depth ; // max items - bool overwritable ; + struct TU_ATTR_PACKED { + uint16_t item_size : 15; // size of each item + bool overwritable : 1 ; // ovwerwritable when full + }; - uint16_t non_used_index_space ; ///< required for non-power-of-two buffer length - //uint16_t max_pointer_idx ; ///< maximum absolute pointer index - - volatile uint16_t wr_idx ; ///< write index - volatile uint16_t rd_idx ; ///< read index + volatile uint16_t wr_idx ; // write index + volatile uint16_t rd_idx ; // read index #if OSAL_MUTEX_REQUIRED osal_mutex_t mutex_wr; @@ -133,13 +132,12 @@ typedef struct void * ptr_wrap ; ///< wrapped part start pointer } tu_fifo_buffer_info_t; -#define TU_FIFO_INIT(_buffer, _depth, _type, _overwritable) \ -{ \ - .buffer = _buffer, \ - .depth = _depth, \ - .item_size = sizeof(_type), \ - .overwritable = _overwritable, \ - .non_used_index_space = (uint16_t)(UINT16_MAX - (2*(_depth)-1)), \ +#define TU_FIFO_INIT(_buffer, _depth, _type, _overwritable) \ +{ \ + .buffer = _buffer, \ + .depth = _depth, \ + .item_size = sizeof(_type), \ + .overwritable = _overwritable, \ } #define TU_FIFO_DEF(_name, _depth, _type, _overwritable) \ diff --git a/src/device/usbd.c b/src/device/usbd.c index f652a878e..6e0c6710d 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -388,6 +388,8 @@ bool tud_init (uint8_t rhport) TU_LOG(USBD_DBG, "USBD init on controller %u\r\n", rhport); TU_LOG_INT(USBD_DBG, sizeof(usbd_device_t)); + TU_LOG_INT(USBD_DBG, sizeof(tu_fifo_t)); + TU_LOG_INT(USBD_DBG, sizeof(tu_edpt_stream_t)); tu_varclr(&_usbd_dev); -- cgit v1.3.1 From 82457519fa050b2efd1b462ba88f7f258047c715 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 6 Jan 2023 12:11:55 +0700 Subject: minor clean up --- src/common/tusb_fifo.c | 68 ++++++++++++++++++++++++++------------------------ 1 file changed, 36 insertions(+), 32 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 4dfe7bd81..f72c8a12f 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -28,16 +28,15 @@ #include "osal/osal.h" #include "tusb_fifo.h" +#define TU_FIFO_DBG 0 + // Suppress IAR warning // Warning[Pa082]: undefined behavior: the order of volatile accesses is undefined in this statement #if defined(__ICCARM__) #pragma diag_suppress = Pa082 #endif -#define TU_FIFO_DBG 0 - -// implement mutex lock and unlock -#if CFG_FIFO_MUTEX +#if OSAL_MUTEX_REQUIRED static inline void _ff_lock(osal_mutex_t mutex) { @@ -80,8 +79,8 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si f->depth = depth; f->item_size = (uint16_t) (item_size & 0x7FFF); f->overwritable = overwritable; - - f->rd_idx = f->wr_idx = 0; + f->rd_idx = 0; + f->wr_idx = 0; _ff_unlock(f->mutex_wr); _ff_unlock(f->mutex_rd); @@ -142,13 +141,13 @@ static void _ff_pull_const_addr(void * app_buf, const uint8_t * ff_buf, uint16_t } } -// send one item to FIFO WITHOUT updating write pointer +// send one item to fifo WITHOUT updating write pointer static inline void _ff_push(tu_fifo_t* f, void const * app_buf, uint16_t rel) { memcpy(f->buffer + (rel * f->item_size), app_buf, f->item_size); } -// send n items to FIFO WITHOUT updating write pointer +// send n items to fifo WITHOUT updating write pointer static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t rel, tu_fifo_copy_mode_t copy_mode) { uint16_t const nLin = f->depth - rel; @@ -227,13 +226,13 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t } } -// get one item from FIFO WITHOUT updating read pointer +// get one item from fifo WITHOUT updating read pointer static inline void _ff_pull(tu_fifo_t* f, void * app_buf, uint16_t rel) { memcpy(app_buf, f->buffer + (rel * f->item_size), f->item_size); } -// get n items from FIFO WITHOUT updating read pointer +// get n items from fifo WITHOUT updating read pointer static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rel, tu_fifo_copy_mode_t copy_mode) { uint16_t const nLin = f->depth - rel; @@ -475,14 +474,14 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu uint16_t rd_idx = f->rd_idx; uint8_t const* buf8 = (uint8_t const*) data; - uint16_t overflowable_count = _tu_fifo_count(f, wr_idx, rd_idx); - uint16_t const remain = _tu_fifo_remaining(f, wr_idx, rd_idx); - TU_LOG(TU_FIFO_DBG, "rd = %3u, wr = %3u, count = %3u, remain = %3u, n = %3u: ", rd_idx, wr_idx, _tu_fifo_count(f, wr_idx, rd_idx), remain, n); + TU_LOG(TU_FIFO_DBG, "rd = %3u, wr = %3u, count = %3u, remain = %3u, n = %3u: ", + rd_idx, wr_idx, _tu_fifo_count(f, wr_idx, rd_idx), _tu_fifo_remaining(f, wr_idx, rd_idx), n); if ( !f->overwritable ) { // limit up to full + uint16_t const remain = _tu_fifo_remaining(f, wr_idx, rd_idx); n = tu_min16(n, remain); } else @@ -508,23 +507,27 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu // We start writing at the read pointer's position since we fill the whole buffer wr_idx = rd_idx; } - else if (overflowable_count + n >= 2*f->depth) - { - // Double overflowed - // Index is bigger than the allowed range [0,2*depth) - // re-position write index to have a full fifo after pushed - wr_idx = advance_pointer(f, rd_idx, f->depth - n); - - // TODO we should also shift out n bytes from read index since we avoid changing rd index !! - // However memmove() is expensive due to actual copying + wrapping consideration. - // Also race condition could happen anyway if read() is invoke while moving result in corrupted memory - // currently deliberately not implemented --> result in incorrect data read back - }else + else { - // normal + single overflowed: - // Index is in the range of [0,2*depth) and thus detect and recoverable. Recovering is handled in read() - // Therefore we just increase write index - // we will correct (re-position) read index later on in fifo_read() function + uint16_t const overflowable_count = _tu_fifo_count(f, wr_idx, rd_idx); + if (overflowable_count + n >= 2*f->depth) + { + // Double overflowed + // Index is bigger than the allowed range [0,2*depth) + // re-position write index to have a full fifo after pushed + wr_idx = advance_pointer(f, rd_idx, f->depth - n); + + // TODO we should also shift out n bytes from read index since we avoid changing rd index !! + // However memmove() is expensive due to actual copying + wrapping consideration. + // Also race condition could happen anyway if read() is invoke while moving result in corrupted memory + // currently deliberately not implemented --> result in incorrect data read back + }else + { + // normal + single overflowed: + // Index is in the range of [0,2*depth) and thus detect and recoverable. Recovering is handled in read() + // Therefore we just increase write index + // we will correct (re-position) read index later on in fifo_read() function + } } } @@ -868,7 +871,8 @@ bool tu_fifo_clear(tu_fifo_t *f) _ff_lock(f->mutex_wr); _ff_lock(f->mutex_rd); - f->rd_idx = f->wr_idx = 0; + f->rd_idx = 0; + f->wr_idx = 0; _ff_unlock(f->mutex_wr); _ff_unlock(f->mutex_rd); @@ -1031,9 +1035,9 @@ void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) if (remain == 0) { - info->len_lin = 0; + info->len_lin = 0; info->len_wrap = 0; - info->ptr_lin = NULL; + info->ptr_lin = NULL; info->ptr_wrap = NULL; return; } -- cgit v1.3.1 From a804a1ac09c34a4f69c0d2873a552a2a505d0492 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 7 Jan 2023 16:48:07 +0700 Subject: simplify and remove _tu_fifo_empty, _tu_fifo_full. Also correct full condition check --- src/common/tusb_fifo.c | 30 +++++++----------------------- 1 file changed, 7 insertions(+), 23 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index f72c8a12f..4b27bc589 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -38,12 +38,12 @@ #if OSAL_MUTEX_REQUIRED -static inline void _ff_lock(osal_mutex_t mutex) +TU_ATTR_ALWAYS_INLINE static inline void _ff_lock(osal_mutex_t mutex) { if (mutex) osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER); } -static inline void _ff_unlock(osal_mutex_t mutex) +TU_ATTR_ALWAYS_INLINE static inline void _ff_unlock(osal_mutex_t mutex) { if (mutex) osal_mutex_unlock(mutex); } @@ -361,30 +361,14 @@ static inline uint16_t idx2ptr(uint16_t idx, uint16_t depth) // Works on local copies of w and r - return only the difference and as such can be used to determine an overflow static inline uint16_t _tu_fifo_count(tu_fifo_t* f, uint16_t wr_idx, uint16_t rd_idx) { - uint16_t cnt; - // In case we have non-power of two depth we need a further modification if (wr_idx >= rd_idx) { - cnt = (uint16_t) (wr_idx - rd_idx); + return (uint16_t) (wr_idx - rd_idx); } else { - cnt = (uint16_t) (2*f->depth - (rd_idx - wr_idx)); + return (uint16_t) (2*f->depth - (rd_idx - wr_idx)); } - - return cnt; -} - -// Works on local copies of w and r -static inline bool _tu_fifo_empty(uint16_t wr_idx, uint16_t rd_idx) -{ - return wr_idx == rd_idx; -} - -// Works on local copies of w and r -static inline bool _tu_fifo_full(tu_fifo_t* f, uint16_t wAbs, uint16_t rAbs) -{ - return _tu_fifo_count(f, wAbs, rAbs) == f->depth; } // Works on local copies of w and r @@ -601,7 +585,7 @@ uint16_t tu_fifo_count(tu_fifo_t* f) /******************************************************************************/ bool tu_fifo_empty(tu_fifo_t* f) { - return _tu_fifo_empty(f->wr_idx, f->rd_idx); + return f->wr_idx == f->rd_idx; } /******************************************************************************/ @@ -619,7 +603,7 @@ bool tu_fifo_empty(tu_fifo_t* f) /******************************************************************************/ bool tu_fifo_full(tu_fifo_t* f) { - return _tu_fifo_full(f, f->wr_idx, f->rd_idx); + return _tu_fifo_count(f, f->wr_idx, f->rd_idx) >= f->depth; } /******************************************************************************/ @@ -798,7 +782,7 @@ bool tu_fifo_write(tu_fifo_t* f, const void * data) bool ret; uint16_t const wr_idx = f->wr_idx; - if ( _tu_fifo_full(f, wr_idx, f->rd_idx) && !f->overwritable ) + if ( tu_fifo_full(f) && !f->overwritable ) { ret = false; }else -- cgit v1.3.1 From 507d5b10b049d865e5bb24f99038eed07d092e8f Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 7 Jan 2023 17:14:17 +0700 Subject: simplify _tu_fifo_count() and _tu_fifo_remaining(), also rename to _ff_count() and _ff_remaining() --- src/common/tusb_fifo.c | 57 ++++++++++++++++++++++++++++---------------------- 1 file changed, 32 insertions(+), 25 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 4b27bc589..cdb0df73f 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -358,8 +358,9 @@ static inline uint16_t idx2ptr(uint16_t idx, uint16_t depth) return idx; } -// Works on local copies of w and r - return only the difference and as such can be used to determine an overflow -static inline uint16_t _tu_fifo_count(tu_fifo_t* f, uint16_t wr_idx, uint16_t rd_idx) +// return only the index difference and as such can be used to determine an overflow i.e overflowable count +TU_ATTR_ALWAYS_INLINE static inline +uint16_t _ff_count(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) { // In case we have non-power of two depth we need a further modification if (wr_idx >= rd_idx) @@ -367,24 +368,33 @@ static inline uint16_t _tu_fifo_count(tu_fifo_t* f, uint16_t wr_idx, uint16_t rd return (uint16_t) (wr_idx - rd_idx); } else { - return (uint16_t) (2*f->depth - (rd_idx - wr_idx)); + return (uint16_t) (2*depth - (rd_idx - wr_idx)); } } -// Works on local copies of w and r // BE AWARE - THIS FUNCTION MIGHT NOT GIVE A CORRECT ANSWERE IN CASE WRITE POINTER "OVERFLOWS" // Only one overflow is allowed for this function to work e.g. if depth = 100, you must not // write more than 2*depth-1 items in one rush without updating write pointer. Otherwise // write pointer wraps and you pointer states are messed up. This can only happen if you // use DMAs, write functions do not allow such an error. -static inline bool _tu_fifo_overflowed(tu_fifo_t* f, uint16_t wr_idx, uint16_t rd_idx) +TU_ATTR_ALWAYS_INLINE static inline +bool _ff_overflowed(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) +{ + return _ff_count(depth, wr_idx, rd_idx) > depth; +} + +// return remaining slot in fifo +TU_ATTR_ALWAYS_INLINE static inline +uint16_t _ff_remaining(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) { - return _tu_fifo_count(f, wr_idx, rd_idx) > f->depth; + uint16_t const count = _ff_count(depth, wr_idx, rd_idx); + return (depth > count) ? (depth - count) : 0; } // Works on local copies of w // For more details see _tu_fifo_overflow()! -static inline void _tu_fifo_correct_read_pointer(tu_fifo_t* f, uint16_t wAbs) +TU_ATTR_ALWAYS_INLINE static inline +void _tu_fifo_correct_read_pointer(tu_fifo_t* f, uint16_t wAbs) { f->rd_idx = backward_pointer(f, wAbs, f->depth); } @@ -393,7 +403,7 @@ static inline void _tu_fifo_correct_read_pointer(tu_fifo_t* f, uint16_t wAbs) // Must be protected by mutexes since in case of an overflow read pointer gets modified static bool _tu_fifo_peek(tu_fifo_t* f, void * p_buffer, uint16_t wr_idx, uint16_t rd_idx) { - uint16_t cnt = _tu_fifo_count(f, wr_idx, rd_idx); + uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx); // Check overflow and correct if required if (cnt > f->depth) @@ -417,7 +427,7 @@ static bool _tu_fifo_peek(tu_fifo_t* f, void * p_buffer, uint16_t wr_idx, uint16 // Must be protected by mutexes since in case of an overflow read pointer gets modified static uint16_t _tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n, uint16_t wr_idx, uint16_t rd_idx, tu_fifo_copy_mode_t copy_mode) { - uint16_t cnt = _tu_fifo_count(f, wr_idx, rd_idx); + uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx); // Check overflow and correct if required if (cnt > f->depth) @@ -441,13 +451,6 @@ static uint16_t _tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n, uint1 return n; } -// Works on local copies of w and r -static inline uint16_t _tu_fifo_remaining(tu_fifo_t* f, uint16_t wr_idx, uint16_t rd_idx) -{ - uint16_t const count = _tu_fifo_count(f, wr_idx, rd_idx); - return (f->depth > count) ? (f->depth - count) : 0; -} - static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu_fifo_copy_mode_t copy_mode) { if ( n == 0 ) return 0; @@ -460,12 +463,12 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu uint8_t const* buf8 = (uint8_t const*) data; TU_LOG(TU_FIFO_DBG, "rd = %3u, wr = %3u, count = %3u, remain = %3u, n = %3u: ", - rd_idx, wr_idx, _tu_fifo_count(f, wr_idx, rd_idx), _tu_fifo_remaining(f, wr_idx, rd_idx), n); + rd_idx, wr_idx, _ff_count(f->depth, wr_idx, rd_idx), _ff_remaining(f->depth, wr_idx, rd_idx), n); if ( !f->overwritable ) { // limit up to full - uint16_t const remain = _tu_fifo_remaining(f, wr_idx, rd_idx); + uint16_t const remain = _ff_remaining(f->depth, wr_idx, rd_idx); n = tu_min16(n, remain); } else @@ -493,7 +496,7 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu } else { - uint16_t const overflowable_count = _tu_fifo_count(f, wr_idx, rd_idx); + uint16_t const overflowable_count = _ff_count(f->depth, wr_idx, rd_idx); if (overflowable_count + n >= 2*f->depth) { // Double overflowed @@ -550,6 +553,10 @@ static uint16_t _tu_fifo_read_n(tu_fifo_t* f, void * buffer, uint16_t n, tu_fifo return n; } +//--------------------------------------------------------------------+ +// Application API +//--------------------------------------------------------------------+ + /******************************************************************************/ /*! @brief Get number of items in FIFO. @@ -567,7 +574,7 @@ static uint16_t _tu_fifo_read_n(tu_fifo_t* f, void * buffer, uint16_t n, tu_fifo /******************************************************************************/ uint16_t tu_fifo_count(tu_fifo_t* f) { - return tu_min16(_tu_fifo_count(f, f->wr_idx, f->rd_idx), f->depth); + return tu_min16(_ff_count(f->depth, f->wr_idx, f->rd_idx), f->depth); } /******************************************************************************/ @@ -603,7 +610,7 @@ bool tu_fifo_empty(tu_fifo_t* f) /******************************************************************************/ bool tu_fifo_full(tu_fifo_t* f) { - return _tu_fifo_count(f, f->wr_idx, f->rd_idx) >= f->depth; + return _ff_count(f->depth, f->wr_idx, f->rd_idx) >= f->depth; } /******************************************************************************/ @@ -621,7 +628,7 @@ bool tu_fifo_full(tu_fifo_t* f) /******************************************************************************/ uint16_t tu_fifo_remaining(tu_fifo_t* f) { - return _tu_fifo_remaining(f, f->wr_idx, f->rd_idx); + return _ff_remaining(f->depth, f->wr_idx, f->rd_idx); } /******************************************************************************/ @@ -647,7 +654,7 @@ uint16_t tu_fifo_remaining(tu_fifo_t* f) /******************************************************************************/ bool tu_fifo_overflowed(tu_fifo_t* f) { - return _tu_fifo_overflowed(f, f->wr_idx, f->rd_idx); + return _ff_overflowed(f->depth, f->wr_idx, f->rd_idx); } // Only use in case tu_fifo_overflow() returned true! @@ -949,7 +956,7 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) uint16_t wr_idx = f->wr_idx; uint16_t rd_idx = f->rd_idx; - uint16_t cnt = _tu_fifo_count(f, wr_idx, rd_idx); + uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx); // Check overflow and correct if required - may happen in case a DMA wrote too fast if (cnt > f->depth) @@ -1015,7 +1022,7 @@ void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) { uint16_t wr_idx = f->wr_idx; uint16_t rd_idx = f->rd_idx; - uint16_t remain = _tu_fifo_remaining(f, wr_idx, rd_idx); + uint16_t remain = _ff_remaining(f->depth, wr_idx, rd_idx); if (remain == 0) { -- cgit v1.3.1 From 24bd1c95623377a81286f9d516da57c34451c515 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 7 Jan 2023 17:27:26 +0700 Subject: update advance_pointer/backward_pointer to use depth instead of fifo, also rename to advance/backward_index --- src/common/tusb_fifo.c | 44 ++++++++++++++++++++++---------------------- 1 file changed, 22 insertions(+), 22 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index cdb0df73f..8de58c4a4 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -319,35 +319,35 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rel, tu // Advance an absolute index // "absolute" index is only in the range of [0..2*depth) -static uint16_t advance_pointer(tu_fifo_t* f, uint16_t idx, uint16_t offset) +static uint16_t advance_index(uint16_t depth, uint16_t idx, uint16_t offset) { // We limit the index space of p such that a correct wrap around happens // Check for a wrap around or if we are in unused index space - This has to be checked first!! // We are exploiting the wrap around to the correct index - uint16_t next_p = (uint16_t) (idx + offset); - if ( (idx > next_p) || (next_p >= 2*f->depth) ) + uint16_t new_idx = (uint16_t) (idx + offset); + if ( (idx > new_idx) || (new_idx >= 2*depth) ) { - uint16_t const non_used_index_space = (uint16_t) (UINT16_MAX - (2*f->depth-1)); - next_p = (uint16_t) (next_p + non_used_index_space); + uint16_t const non_used_index_space = (uint16_t) (UINT16_MAX - (2*depth-1)); + new_idx = (uint16_t) (new_idx + non_used_index_space); } - return next_p; + return new_idx; } -// Backward an absolute pointer -static uint16_t backward_pointer(tu_fifo_t* f, uint16_t p, uint16_t offset) +// Backward an absolute index +static uint16_t backward_index(uint16_t depth, uint16_t idx, uint16_t offset) { // We limit the index space of p such that a correct wrap around happens // Check for a wrap around or if we are in unused index space - This has to be checked first!! // We are exploiting the wrap around to the correct index - uint16_t new_p = (uint16_t) (p - offset); - if ( (p < new_p) || (new_p >= 2*f->depth) ) + uint16_t new_idx = (uint16_t) (idx - offset); + if ( (idx < new_idx) || (new_idx >= 2*depth) ) { - uint16_t const non_used_index_space = (uint16_t) (UINT16_MAX - (2*f->depth-1)); - new_p = (uint16_t) (new_p - non_used_index_space); + uint16_t const non_used_index_space = (uint16_t) (UINT16_MAX - (2*depth-1)); + new_idx = (uint16_t) (new_idx - non_used_index_space); } - return new_p; + return new_idx; } // index to pointer, simply an modulo with minus. @@ -394,9 +394,9 @@ uint16_t _ff_remaining(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) // Works on local copies of w // For more details see _tu_fifo_overflow()! TU_ATTR_ALWAYS_INLINE static inline -void _tu_fifo_correct_read_pointer(tu_fifo_t* f, uint16_t wAbs) +void _tu_fifo_correct_read_pointer(tu_fifo_t* f, uint16_t wr_idx) { - f->rd_idx = backward_pointer(f, wAbs, f->depth); + f->rd_idx = backward_index(f->depth, wr_idx, f->depth); } // Works on local copies of w and r @@ -502,7 +502,7 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu // Double overflowed // Index is bigger than the allowed range [0,2*depth) // re-position write index to have a full fifo after pushed - wr_idx = advance_pointer(f, rd_idx, f->depth - n); + wr_idx = advance_index(f->depth, rd_idx, f->depth - n); // TODO we should also shift out n bytes from read index since we avoid changing rd index !! // However memmove() is expensive due to actual copying + wrapping consideration. @@ -528,7 +528,7 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu _ff_push_n(f, buf8, n, wr_ptr, copy_mode); // Advance index - f->wr_idx = advance_pointer(f, wr_idx, n); + f->wr_idx = advance_index(f->depth, wr_idx, n); TU_LOG(TU_FIFO_DBG, "\tnew_wr = %u\n", f->wr_idx); } @@ -547,7 +547,7 @@ static uint16_t _tu_fifo_read_n(tu_fifo_t* f, void * buffer, uint16_t n, tu_fifo n = _tu_fifo_peek_n(f, buffer, n, f->wr_idx, f->rd_idx, copy_mode); // Advance read pointer - f->rd_idx = advance_pointer(f, f->rd_idx, n); + f->rd_idx = advance_index(f->depth, f->rd_idx, n); _ff_unlock(f->mutex_rd); return n; @@ -690,7 +690,7 @@ bool tu_fifo_read(tu_fifo_t* f, void * buffer) bool ret = _tu_fifo_peek(f, buffer, f->wr_idx, f->rd_idx); // Advance pointer - f->rd_idx = advance_pointer(f, f->rd_idx, ret); + f->rd_idx = advance_index(f->depth, f->rd_idx, ret); _ff_unlock(f->mutex_rd); return ret; @@ -800,7 +800,7 @@ bool tu_fifo_write(tu_fifo_t* f, const void * data) _ff_push(f, data, wr_ptr); // Advance pointer - f->wr_idx = advance_pointer(f, wr_idx, 1); + f->wr_idx = advance_index(f->depth, wr_idx, 1); ret = true; } @@ -911,7 +911,7 @@ bool tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable) /******************************************************************************/ void tu_fifo_advance_write_pointer(tu_fifo_t *f, uint16_t n) { - f->wr_idx = advance_pointer(f, f->wr_idx, n); + f->wr_idx = advance_index(f->depth, f->wr_idx, n); } /******************************************************************************/ @@ -932,7 +932,7 @@ void tu_fifo_advance_write_pointer(tu_fifo_t *f, uint16_t n) /******************************************************************************/ void tu_fifo_advance_read_pointer(tu_fifo_t *f, uint16_t n) { - f->rd_idx = advance_pointer(f, f->rd_idx, n); + f->rd_idx = advance_index(f->depth, f->rd_idx, n); } /******************************************************************************/ -- cgit v1.3.1 From 248025bb6cdf361e93603204d89cbf58e9e3b0af Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 7 Jan 2023 17:29:43 +0700 Subject: reverse idx2ptr() arguments to be consistent --- src/common/tusb_fifo.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 8de58c4a4..a0ce73ba0 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -351,7 +351,8 @@ static uint16_t backward_index(uint16_t depth, uint16_t idx, uint16_t offset) } // index to pointer, simply an modulo with minus. -static inline uint16_t idx2ptr(uint16_t idx, uint16_t depth) +TU_ATTR_ALWAYS_INLINE static inline +uint16_t idx2ptr(uint16_t depth, uint16_t idx) { // Only run at most 3 times since index is limit in the range of [0..2*depth) while ( idx >= depth ) idx -= depth; @@ -415,7 +416,7 @@ static bool _tu_fifo_peek(tu_fifo_t* f, void * p_buffer, uint16_t wr_idx, uint16 // Skip beginning of buffer if (cnt == 0) return false; - uint16_t rd_ptr = idx2ptr(rd_idx, f->depth); + uint16_t rd_ptr = idx2ptr(f->depth, rd_idx); // Peek data _ff_pull(f, p_buffer, rd_ptr); @@ -443,7 +444,7 @@ static uint16_t _tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n, uint1 // Check if we can read something at and after offset - if too less is available we read what remains if (cnt < n) n = cnt; - uint16_t rd_ptr = idx2ptr(rd_idx, f->depth); + uint16_t rd_ptr = idx2ptr(f->depth, rd_idx); // Peek data _ff_pull_n(f, p_buffer, n, rd_ptr, copy_mode); @@ -520,7 +521,7 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu if (n) { - uint16_t wr_ptr = idx2ptr(wr_idx, f->depth); + uint16_t wr_ptr = idx2ptr(f->depth, wr_idx); TU_LOG(TU_FIFO_DBG, "actual_n = %u, wr_ptr = %u", n, wr_ptr); @@ -794,7 +795,7 @@ bool tu_fifo_write(tu_fifo_t* f, const void * data) ret = false; }else { - uint16_t wr_ptr = idx2ptr(wr_idx, f->depth); + uint16_t wr_ptr = idx2ptr(f->depth, wr_idx); // Write data _ff_push(f, data, wr_ptr); @@ -980,8 +981,8 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) } // Get relative pointers - uint16_t wr_ptr = idx2ptr(wr_idx, f->depth); - uint16_t rd_ptr = idx2ptr(rd_idx, f->depth); + uint16_t wr_ptr = idx2ptr(f->depth, wr_idx); + uint16_t rd_ptr = idx2ptr(f->depth, rd_idx); // Copy pointer to buffer to start reading from info->ptr_lin = &f->buffer[rd_ptr]; @@ -1034,8 +1035,8 @@ void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) } // Get relative pointers - uint16_t wr_ptr = idx2ptr(wr_idx, f->depth); - uint16_t rd_ptr = idx2ptr(rd_idx, f->depth); + uint16_t wr_ptr = idx2ptr(f->depth, wr_idx); + uint16_t rd_ptr = idx2ptr(f->depth, rd_idx); // Copy pointer to buffer to start writing to info->ptr_lin = &f->buffer[wr_ptr]; -- cgit v1.3.1 From c29b7643a59f4baa266d13ef0a7bed864ad83eb2 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 7 Jan 2023 18:50:19 +0700 Subject: simplify _ff_correct_read_index() --- src/common/tusb_fifo.c | 107 ++++++++++++++++++++++++++++--------------------- 1 file changed, 62 insertions(+), 45 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index a0ce73ba0..22d6e8e55 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -314,7 +314,44 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rel, tu } //--------------------------------------------------------------------+ -// Index (free-running and real buffer pointer) +// Helper +//--------------------------------------------------------------------+ + +// return only the index difference and as such can be used to determine an overflow i.e overflowable count +TU_ATTR_ALWAYS_INLINE static inline +uint16_t _ff_count(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) +{ + // In case we have non-power of two depth we need a further modification + if (wr_idx >= rd_idx) + { + return (uint16_t) (wr_idx - rd_idx); + } else + { + return (uint16_t) (2*depth - (rd_idx - wr_idx)); + } +} + +// BE AWARE - THIS FUNCTION MIGHT NOT GIVE A CORRECT ANSWERE IN CASE WRITE POINTER "OVERFLOWS" +// Only one overflow is allowed for this function to work e.g. if depth = 100, you must not +// write more than 2*depth-1 items in one rush without updating write pointer. Otherwise +// write pointer wraps and you pointer states are messed up. This can only happen if you +// use DMAs, write functions do not allow such an error. +TU_ATTR_ALWAYS_INLINE static inline +bool _ff_overflowed(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) +{ + return _ff_count(depth, wr_idx, rd_idx) > depth; +} + +// return remaining slot in fifo +TU_ATTR_ALWAYS_INLINE static inline +uint16_t _ff_remaining(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) +{ + uint16_t const count = _ff_count(depth, wr_idx, rd_idx); + return (depth > count) ? (depth - count) : 0; +} + +//--------------------------------------------------------------------+ +// Index Helper //--------------------------------------------------------------------+ // Advance an absolute index @@ -334,6 +371,7 @@ static uint16_t advance_index(uint16_t depth, uint16_t idx, uint16_t offset) return new_idx; } +#if 0 // not used but // Backward an absolute index static uint16_t backward_index(uint16_t depth, uint16_t idx, uint16_t offset) { @@ -349,6 +387,7 @@ static uint16_t backward_index(uint16_t depth, uint16_t idx, uint16_t offset) return new_idx; } +#endif // index to pointer, simply an modulo with minus. TU_ATTR_ALWAYS_INLINE static inline @@ -359,45 +398,24 @@ uint16_t idx2ptr(uint16_t depth, uint16_t idx) return idx; } -// return only the index difference and as such can be used to determine an overflow i.e overflowable count +// Works on local copies of w +// When an overwritable fifo is overflowed, rd_idx will be re-index so that it forms +// an full fifo i.e _ff_count() = depth TU_ATTR_ALWAYS_INLINE static inline -uint16_t _ff_count(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) +uint16_t _ff_correct_read_index(tu_fifo_t* f, uint16_t wr_idx) { - // In case we have non-power of two depth we need a further modification - if (wr_idx >= rd_idx) + uint16_t rd_idx; + if ( wr_idx >= f->depth ) { - return (uint16_t) (wr_idx - rd_idx); - } else + rd_idx = wr_idx - f->depth; + }else { - return (uint16_t) (2*depth - (rd_idx - wr_idx)); + rd_idx = wr_idx + f->depth; } -} -// BE AWARE - THIS FUNCTION MIGHT NOT GIVE A CORRECT ANSWERE IN CASE WRITE POINTER "OVERFLOWS" -// Only one overflow is allowed for this function to work e.g. if depth = 100, you must not -// write more than 2*depth-1 items in one rush without updating write pointer. Otherwise -// write pointer wraps and you pointer states are messed up. This can only happen if you -// use DMAs, write functions do not allow such an error. -TU_ATTR_ALWAYS_INLINE static inline -bool _ff_overflowed(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) -{ - return _ff_count(depth, wr_idx, rd_idx) > depth; -} + f->rd_idx = rd_idx; -// return remaining slot in fifo -TU_ATTR_ALWAYS_INLINE static inline -uint16_t _ff_remaining(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) -{ - uint16_t const count = _ff_count(depth, wr_idx, rd_idx); - return (depth > count) ? (depth - count) : 0; -} - -// Works on local copies of w -// For more details see _tu_fifo_overflow()! -TU_ATTR_ALWAYS_INLINE static inline -void _tu_fifo_correct_read_pointer(tu_fifo_t* f, uint16_t wr_idx) -{ - f->rd_idx = backward_index(f->depth, wr_idx, f->depth); + return rd_idx; } // Works on local copies of w and r @@ -407,14 +425,14 @@ static bool _tu_fifo_peek(tu_fifo_t* f, void * p_buffer, uint16_t wr_idx, uint16 uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx); // Check overflow and correct if required - if (cnt > f->depth) + if ( cnt > f->depth ) { - _tu_fifo_correct_read_pointer(f, wr_idx); + rd_idx = _ff_correct_read_index(f, wr_idx); cnt = f->depth; } // Skip beginning of buffer - if (cnt == 0) return false; + if ( cnt == 0 ) return false; uint16_t rd_ptr = idx2ptr(f->depth, rd_idx); @@ -431,18 +449,17 @@ static uint16_t _tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n, uint1 uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx); // Check overflow and correct if required - if (cnt > f->depth) + if ( cnt > f->depth ) { - _tu_fifo_correct_read_pointer(f, wr_idx); - rd_idx = f->rd_idx; + rd_idx = _ff_correct_read_index(f, wr_idx); cnt = f->depth; } // Skip beginning of buffer - if (cnt == 0) return 0; + if ( cnt == 0 ) return 0; // Check if we can read something at and after offset - if too less is available we read what remains - if (cnt < n) n = cnt; + if ( cnt < n ) n = cnt; uint16_t rd_ptr = idx2ptr(f->depth, rd_idx); @@ -662,7 +679,7 @@ bool tu_fifo_overflowed(tu_fifo_t* f) void tu_fifo_correct_read_pointer(tu_fifo_t* f) { _ff_lock(f->mutex_rd); - _tu_fifo_correct_read_pointer(f, f->wr_idx); + _ff_correct_read_index(f, f->wr_idx); _ff_unlock(f->mutex_rd); } @@ -963,10 +980,9 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) if (cnt > f->depth) { _ff_lock(f->mutex_rd); - _tu_fifo_correct_read_pointer(f, wr_idx); + rd_idx = _ff_correct_read_index(f, wr_idx); _ff_unlock(f->mutex_rd); - rd_idx = f->rd_idx; cnt = f->depth; } @@ -988,7 +1004,8 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) info->ptr_lin = &f->buffer[rd_ptr]; // Check if there is a wrap around necessary - if (wr_ptr > rd_ptr) { + if (wr_ptr > rd_ptr) + { // Non wrapping case info->len_lin = cnt; -- cgit v1.3.1 From 9e551c9f5cda2bd2bb1f53e34c5010babc534eb9 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 7 Jan 2023 19:00:04 +0700 Subject: remove _ff_overflowed() due to lack of use --- src/common/tusb_fifo.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 22d6e8e55..d5eea83f7 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -331,17 +331,6 @@ uint16_t _ff_count(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) } } -// BE AWARE - THIS FUNCTION MIGHT NOT GIVE A CORRECT ANSWERE IN CASE WRITE POINTER "OVERFLOWS" -// Only one overflow is allowed for this function to work e.g. if depth = 100, you must not -// write more than 2*depth-1 items in one rush without updating write pointer. Otherwise -// write pointer wraps and you pointer states are messed up. This can only happen if you -// use DMAs, write functions do not allow such an error. -TU_ATTR_ALWAYS_INLINE static inline -bool _ff_overflowed(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) -{ - return _ff_count(depth, wr_idx, rd_idx) > depth; -} - // return remaining slot in fifo TU_ATTR_ALWAYS_INLINE static inline uint16_t _ff_remaining(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) @@ -672,7 +661,7 @@ uint16_t tu_fifo_remaining(tu_fifo_t* f) /******************************************************************************/ bool tu_fifo_overflowed(tu_fifo_t* f) { - return _ff_overflowed(f->depth, f->wr_idx, f->rd_idx); + return _ff_count(f->depth, f->wr_idx, f->rd_idx) > f->depth; } // Only use in case tu_fifo_overflow() returned true! -- cgit v1.3.1 From c84de8f06bb42de78fec22dec8026f3a0c0899cc Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 7 Jan 2023 19:40:06 +0700 Subject: minor clean up --- src/common/tusb_fifo.c | 100 +++++++++++++++++++++++++------------------------ 1 file changed, 51 insertions(+), 49 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index d5eea83f7..a52c92267 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -97,13 +97,13 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si // TODO generalize with configurable 1 byte or 4 byte each read static void _ff_push_const_addr(uint8_t * ff_buf, const void * app_buf, uint16_t len) { - volatile const uint32_t * rx_fifo = (volatile const uint32_t *) app_buf; + volatile const uint32_t * reg_rx = (volatile const uint32_t *) app_buf; // Reading full available 32 bit words from const app address uint16_t full_words = len >> 2; while(full_words--) { - tu_unaligned_write32(ff_buf, *rx_fifo); + tu_unaligned_write32(ff_buf, *reg_rx); ff_buf += 4; } @@ -111,7 +111,7 @@ static void _ff_push_const_addr(uint8_t * ff_buf, const void * app_buf, uint16_t uint8_t const bytes_rem = len & 0x03; if ( bytes_rem ) { - uint32_t tmp32 = *rx_fifo; + uint32_t tmp32 = *reg_rx; memcpy(ff_buf, &tmp32, bytes_rem); } } @@ -120,24 +120,24 @@ static void _ff_push_const_addr(uint8_t * ff_buf, const void * app_buf, uint16_t // where all data is written to a constant address in full word copies static void _ff_pull_const_addr(void * app_buf, const uint8_t * ff_buf, uint16_t len) { - volatile uint32_t * tx_fifo = (volatile uint32_t *) app_buf; + volatile uint32_t * reg_tx = (volatile uint32_t *) app_buf; - // Pushing full available 32 bit words to const app address + // Write full available 32 bit words to const address uint16_t full_words = len >> 2; while(full_words--) { - *tx_fifo = tu_unaligned_read32(ff_buf); + *reg_tx = tu_unaligned_read32(ff_buf); ff_buf += 4; } - // Write the remaining 1-3 bytes into const app address + // Write the remaining 1-3 bytes into const address uint8_t const bytes_rem = len & 0x03; if ( bytes_rem ) { uint32_t tmp32 = 0; memcpy(&tmp32, ff_buf, bytes_rem); - *tx_fifo = tmp32; + *reg_tx = tmp32; } } @@ -148,21 +148,21 @@ static inline void _ff_push(tu_fifo_t* f, void const * app_buf, uint16_t rel) } // send n items to fifo WITHOUT updating write pointer -static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t rel, tu_fifo_copy_mode_t copy_mode) +static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t wr_ptr, tu_fifo_copy_mode_t copy_mode) { - uint16_t const nLin = f->depth - rel; - uint16_t const nWrap = n - nLin; + uint16_t const lin_count = f->depth - wr_ptr; + uint16_t const wrap_count = n - lin_count; - uint16_t nLin_bytes = nLin * f->item_size; - uint16_t nWrap_bytes = nWrap * f->item_size; + uint16_t lin_bytes = lin_count * f->item_size; + uint16_t wrap_bytes = wrap_count * f->item_size; // current buffer of fifo - uint8_t* ff_buf = f->buffer + (rel * f->item_size); + uint8_t* ff_buf = f->buffer + (wr_ptr * f->item_size); switch (copy_mode) { case TU_FIFO_COPY_INC: - if(n <= nLin) + if(n <= lin_count) { // Linear only memcpy(ff_buf, app_buf, n*f->item_size); @@ -172,17 +172,17 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t // Wrap around // Write data to linear part of buffer - memcpy(ff_buf, app_buf, nLin_bytes); + memcpy(ff_buf, app_buf, lin_bytes); // Write data wrapped around // TU_ASSERT(nWrap_bytes <= f->depth, ); - memcpy(f->buffer, ((uint8_t const*) app_buf) + nLin_bytes, nWrap_bytes); + memcpy(f->buffer, ((uint8_t const*) app_buf) + lin_bytes, wrap_bytes); } break; case TU_FIFO_COPY_CST_FULL_WORDS: // Intended for hardware buffers from which it can be read word by word only - if(n <= nLin) + if(n <= lin_count) { // Linear only _ff_push_const_addr(ff_buf, app_buf, n*f->item_size); @@ -192,17 +192,18 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t // Wrap around case // Write full words to linear part of buffer - uint16_t nLin_4n_bytes = nLin_bytes & 0xFFFC; + uint16_t nLin_4n_bytes = lin_bytes & 0xFFFC; _ff_push_const_addr(ff_buf, app_buf, nLin_4n_bytes); ff_buf += nLin_4n_bytes; // There could be odd 1-3 bytes before the wrap-around boundary - volatile const uint32_t * rx_fifo = (volatile const uint32_t *) app_buf; - uint8_t rem = nLin_bytes & 0x03; + uint8_t rem = lin_bytes & 0x03; if (rem > 0) { - uint8_t remrem = (uint8_t) tu_min16(nWrap_bytes, 4-rem); - nWrap_bytes -= remrem; + volatile const uint32_t * rx_fifo = (volatile const uint32_t *) app_buf; + + uint8_t remrem = (uint8_t) tu_min16(wrap_bytes, 4-rem); + wrap_bytes -= remrem; uint32_t tmp32 = *rx_fifo; uint8_t * src_u8 = ((uint8_t *) &tmp32); @@ -220,7 +221,7 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t } // Write data wrapped part - if (nWrap_bytes > 0) _ff_push_const_addr(ff_buf, app_buf, nWrap_bytes); + if (wrap_bytes > 0) _ff_push_const_addr(ff_buf, app_buf, wrap_bytes); } break; } @@ -233,21 +234,21 @@ static inline void _ff_pull(tu_fifo_t* f, void * app_buf, uint16_t rel) } // get n items from fifo WITHOUT updating read pointer -static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rel, tu_fifo_copy_mode_t copy_mode) +static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rd_ptr, tu_fifo_copy_mode_t copy_mode) { - uint16_t const nLin = f->depth - rel; - uint16_t const nWrap = n - nLin; // only used if wrapped + uint16_t const lin_count = f->depth - rd_ptr; + uint16_t const wrap_count = n - lin_count; // only used if wrapped - uint16_t nLin_bytes = nLin * f->item_size; - uint16_t nWrap_bytes = nWrap * f->item_size; + uint16_t lin_bytes = lin_count * f->item_size; + uint16_t wrap_bytes = wrap_count * f->item_size; // current buffer of fifo - uint8_t* ff_buf = f->buffer + (rel * f->item_size); + uint8_t* ff_buf = f->buffer + (rd_ptr * f->item_size); switch (copy_mode) { case TU_FIFO_COPY_INC: - if ( n <= nLin ) + if ( n <= lin_count ) { // Linear only memcpy(app_buf, ff_buf, n*f->item_size); @@ -257,15 +258,15 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rel, tu // Wrap around // Read data from linear part of buffer - memcpy(app_buf, ff_buf, nLin_bytes); + memcpy(app_buf, ff_buf, lin_bytes); // Read data wrapped part - memcpy((uint8_t*) app_buf + nLin_bytes, f->buffer, nWrap_bytes); + memcpy((uint8_t*) app_buf + lin_bytes, f->buffer, wrap_bytes); } break; case TU_FIFO_COPY_CST_FULL_WORDS: - if ( n <= nLin ) + if ( n <= lin_count ) { // Linear only _ff_pull_const_addr(app_buf, ff_buf, n*f->item_size); @@ -275,17 +276,18 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rel, tu // Wrap around case // Read full words from linear part of buffer - uint16_t nLin_4n_bytes = nLin_bytes & 0xFFFC; - _ff_pull_const_addr(app_buf, ff_buf, nLin_4n_bytes); - ff_buf += nLin_4n_bytes; + uint16_t lin_4n_bytes = lin_bytes & 0xFFFC; + _ff_pull_const_addr(app_buf, ff_buf, lin_4n_bytes); + ff_buf += lin_4n_bytes; // There could be odd 1-3 bytes before the wrap-around boundary - volatile uint32_t * tx_fifo = (volatile uint32_t *) app_buf; - uint8_t rem = nLin_bytes & 0x03; + uint8_t rem = lin_bytes & 0x03; if (rem > 0) { - uint8_t remrem = (uint8_t) tu_min16(nWrap_bytes, 4-rem); - nWrap_bytes -= remrem; + volatile uint32_t * reg_tx = (volatile uint32_t *) app_buf; + + uint8_t remrem = (uint8_t) tu_min16(wrap_bytes, 4-rem); + wrap_bytes -= remrem; uint32_t tmp32=0; uint8_t * dst_u8 = (uint8_t *)&tmp32; @@ -297,7 +299,7 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rel, tu ff_buf = f->buffer; while(remrem--) *dst_u8++ = *ff_buf++; - *tx_fifo = tmp32; + *reg_tx = tmp32; } else { @@ -305,7 +307,7 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rel, tu } // Read data wrapped part - if (nWrap_bytes > 0) _ff_pull_const_addr(app_buf, ff_buf, nWrap_bytes); + if (wrap_bytes > 0) _ff_pull_const_addr(app_buf, ff_buf, wrap_bytes); } break; @@ -413,6 +415,9 @@ static bool _tu_fifo_peek(tu_fifo_t* f, void * p_buffer, uint16_t wr_idx, uint16 { uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx); + // nothing to peek + if ( cnt == 0 ) return false; + // Check overflow and correct if required if ( cnt > f->depth ) { @@ -420,9 +425,6 @@ static bool _tu_fifo_peek(tu_fifo_t* f, void * p_buffer, uint16_t wr_idx, uint16 cnt = f->depth; } - // Skip beginning of buffer - if ( cnt == 0 ) return false; - uint16_t rd_ptr = idx2ptr(f->depth, rd_idx); // Peek data @@ -437,6 +439,9 @@ static uint16_t _tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n, uint1 { uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx); + // nothing to peek + if ( cnt == 0 ) return 0; + // Check overflow and correct if required if ( cnt > f->depth ) { @@ -444,9 +449,6 @@ static uint16_t _tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n, uint1 cnt = f->depth; } - // Skip beginning of buffer - if ( cnt == 0 ) return 0; - // Check if we can read something at and after offset - if too less is available we read what remains if ( cnt < n ) n = cnt; -- cgit v1.3.1 From b1021d53f3617491656c50f6a1cb2c21da029f6a Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 12 Jan 2023 15:38:18 +0700 Subject: add TUP_RHPORT_HIGHSPEED for ch32v307 --- src/common/tusb_mcu.h | 2 +- src/tusb_option.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index b37ce9a34..0b10c5118 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -278,7 +278,7 @@ //------------- WCH -------------// #elif TU_CHECK_MCU(OPT_MCU_CH32V307) #define TUP_DCD_ENDPOINT_MAX 16 - + #define TUP_RHPORT_HIGHSPEED 1 #endif //--------------------------------------------------------------------+ diff --git a/src/tusb_option.h b/src/tusb_option.h index 92fbbd33f..67377b7ec 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -161,7 +161,7 @@ typedef int make_iso_compilers_happy; #define OPT_MCU_F1C100S 2100 ///< Allwinner F1C100s family // WCH -#define OPT_MCU_CH32V307 2200 ///< WCH CH32V307 config +#define OPT_MCU_CH32V307 2200 ///< WCH CH32V307 // Helper to check if configured MCU is one of listed // Apply _TU_CHECK_MCU with || as separator to list of input -- cgit v1.3.1 From 2e47210c1af88b88b6f2d92fe2b6d08117041363 Mon Sep 17 00:00:00 2001 From: Nathaniel Brough Date: Fri, 13 Jan 2023 13:37:55 -0800 Subject: fix: Replace device calls to memcpy with tu_memcpy_s Introduces a new function tu_memcpy_s, which is effectively a backport of memcpy_s. The change also refactors calls to memcpy over to the more secure tu_memcpy_s. --- src/class/audio/audio_device.c | 7 ++----- src/class/dfu/dfu_rt_device.c | 2 +- src/class/hid/hid_device.c | 18 +++++++----------- src/class/midi/midi_device.c | 2 +- src/class/msc/msc_device.c | 10 +++++----- src/common/tusb_common.h | 8 ++++++++ src/device/dcd.h | 2 +- src/device/usbd_control.c | 4 +++- src/tusb.c | 23 ++++++++++++++++++++++- 9 files changed, 50 insertions(+), 26 deletions(-) (limited to 'src/common') diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index 698fba566..81df95139 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -823,10 +823,7 @@ uint16_t tud_audio_int_ctr_n_write(uint8_t func_id, uint8_t const* buffer, uint1 // We write directly into the EP's buffer - abort if previous transfer not complete TU_VERIFY(!usbd_edpt_busy(_audiod_fct[func_id].rhport, _audiod_fct[func_id].ep_int_ctr)); - // Check length - TU_VERIFY(len <= CFG_TUD_AUDIO_INT_CTR_EP_IN_SW_BUFFER_SIZE); - - memcpy(_audiod_fct[func_id].ep_int_ctr_buf, buffer, len); + TU_VERIFY(tu_memcpy_s(_audiod_fct[func_id].ep_int_ctr_buf, CFG_TUD_AUDIO_INT_CTR_EP_IN_SW_BUFFER_SIZE, buffer, len)==0); // Schedule transmit TU_VERIFY(usbd_edpt_xfer(_audiod_fct[func_id].rhport, _audiod_fct[func_id].ep_int_ctr, _audiod_fct[func_id].ep_int_ctr_buf, len)); @@ -2202,7 +2199,7 @@ bool tud_audio_buffer_and_schedule_control_xfer(uint8_t rhport, tusb_control_req if (len > _audiod_fct[func_id].ctrl_buf_sz) len = _audiod_fct[func_id].ctrl_buf_sz; // Copy into buffer - memcpy((void *)_audiod_fct[func_id].ctrl_buf, data, (size_t)len); + TU_VERIFY(tu_memcpy_s(_audiod_fct[func_id].ctrl_buf, sizeof(_audiod_fct[func_id].ctrl_buf), data, (size_t)len)==0); // Schedule transmit return tud_control_xfer(rhport, p_request, (void*)_audiod_fct[func_id].ctrl_buf, len); diff --git a/src/class/dfu/dfu_rt_device.c b/src/class/dfu/dfu_rt_device.c index b9cd6096b..7b77b3f8f 100644 --- a/src/class/dfu/dfu_rt_device.c +++ b/src/class/dfu/dfu_rt_device.c @@ -110,7 +110,7 @@ bool dfu_rtd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request TU_LOG2(" DFU RT Request: GETSTATUS\r\n"); dfu_status_response_t resp; // Status = OK, Poll timeout is ignored during RT, State = APP_IDLE, IString = 0 - memset(&resp, 0x00, sizeof(dfu_status_response_t)); + TU_VERIFY(tu_memset_s(&resp, sizeof(resp), 0x00, sizeof(resp))==0); tud_control_xfer(rhport, request, &resp, sizeof(dfu_status_response_t)); } break; diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c index 8077e4deb..40654eef9 100644 --- a/src/class/hid/hid_device.c +++ b/src/class/hid/hid_device.c @@ -92,16 +92,12 @@ bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const* report, u // prepare data if (report_id) { - len = tu_min16(len, CFG_TUD_HID_EP_BUFSIZE-1); - p_hid->epin_buf[0] = report_id; - memcpy(p_hid->epin_buf+1, report, len); + TU_VERIFY(tu_memcpy_s(p_hid->epin_buf+1, CFG_TUD_HID_EP_BUFSIZE-1, report, len)==0); len++; }else { - // If report id = 0, skip ID field - len = tu_min16(len, CFG_TUD_HID_EP_BUFSIZE); - memcpy(p_hid->epin_buf, report, len); + TU_VERIFY(tu_memcpy_s(p_hid->epin_buf, CFG_TUD_HID_EP_BUFSIZE, report, len)==0); } return usbd_edpt_xfer(rhport, p_hid->ep_in, p_hid->epin_buf, len); @@ -126,7 +122,7 @@ bool tud_hid_n_keyboard_report(uint8_t instance, uint8_t report_id, uint8_t modi if ( keycode ) { - memcpy(report.keycode, keycode, 6); + TU_VERIFY(tu_memcpy_s(report.keycode, sizeof(report.keycode), keycode, sizeof(report.keycode))==0); }else { tu_memclr(report.keycode, 6); @@ -151,8 +147,7 @@ bool tud_hid_n_mouse_report(uint8_t instance, uint8_t report_id, } bool tud_hid_n_gamepad_report(uint8_t instance, uint8_t report_id, - int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint32_t buttons) -{ + int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint32_t buttons) { hid_gamepad_report_t report = { .x = x, @@ -183,11 +178,12 @@ void hidd_reset(uint8_t rhport) } uint16_t hidd_open(uint8_t rhport, tusb_desc_interface_t const * desc_itf, uint16_t max_len) -{ + { TU_VERIFY(TUSB_CLASS_HID == desc_itf->bInterfaceClass, 0); // len = interface + hid + n*endpoints - uint16_t const drv_len = (uint16_t) (sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + + uint16_t const drv_len = + (uint16_t) (sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + desc_itf->bNumEndpoints * sizeof(tusb_desc_endpoint_t)); TU_ASSERT(max_len >= drv_len, 0); diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c index de41706e8..0b52be181 100644 --- a/src/class/midi/midi_device.c +++ b/src/class/midi/midi_device.c @@ -182,7 +182,7 @@ uint32_t tud_midi_n_stream_read(uint8_t itf, uint8_t cable_num, void* buffer, ui uint8_t const count = (uint8_t) tu_min32(stream->total - stream->index, bufsize); // Skip the header (1st byte) in the buffer - memcpy(buf8, stream->buffer + 1 + stream->index, count); + TU_VERIFY(tu_memcpy_s(buf8, bufsize, stream->buffer + 1 + stream->index, count)==0); total_read += count; stream->index += count; diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index 00b0a1d06..ed4a3e86c 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -707,7 +707,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ read_capa10.block_size = tu_htonl(block_size); resplen = sizeof(read_capa10); - memcpy(buffer, &read_capa10, (size_t) resplen); + TU_VERIFY(tu_memcpy_s(buffer, bufsize, &read_capa10, (size_t) resplen)); } } break; @@ -741,7 +741,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ read_fmt_capa.block_size_u16 = tu_htons(block_size); resplen = sizeof(read_fmt_capa); - memcpy(buffer, &read_fmt_capa, (size_t) resplen); + TU_VERIFY(tu_memcpy_s(buffer, bufsize, &read_fmt_capa, (size_t) resplen)==0); } } break; @@ -764,7 +764,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ tud_msc_inquiry_cb(lun, inquiry_rsp.vendor_id, inquiry_rsp.product_id, inquiry_rsp.product_rev); resplen = sizeof(inquiry_rsp); - memcpy(buffer, &inquiry_rsp, (size_t) resplen); + TU_VERIFY(tu_memcpy_s(buffer, bufsize, &inquiry_rsp, (size_t) resplen)==0); } break; @@ -788,7 +788,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ mode_resp.write_protected = !writable; resplen = sizeof(mode_resp); - memcpy(buffer, &mode_resp, (size_t) resplen); + TU_VERIFY(tu_memcpy_s(buffer, bufsize, &mode_resp, (size_t) resplen)==0); } break; @@ -806,7 +806,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ sense_rsp.add_sense_qualifier = p_msc->add_sense_qualifier; resplen = sizeof(sense_rsp); - memcpy(buffer, &sense_rsp, (size_t) resplen); + TU_VERIFY(tu_memcpy_s(buffer, bufsize, &sense_rsp, (size_t) resplen)==0); // request sense callback could overwrite the sense data if (tud_msc_request_sense_cb) diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index b1ee40a1a..78fdcfe36 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -83,6 +83,14 @@ #define tu_memclr(buffer, size) memset((buffer), 0, (size)) #define tu_varclr(_var) tu_memclr(_var, sizeof(*(_var))) +// This is a backport of memset_s from c11 +int32_t tu_memset_s(void *dest, size_t destsz, int ch, size_t count); + +// This is a backport of memcpy_s from c11 +int32_t tu_memcpy_s(void *dest, size_t destsz, + const void * src, size_t count ); + + //------------- Bytes -------------// TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_u32(uint8_t b3, uint8_t b2, uint8_t b1, uint8_t b0) { diff --git a/src/device/dcd.h b/src/device/dcd.h index c1780f656..3a7e6c5df 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -193,7 +193,7 @@ TU_ATTR_ALWAYS_INLINE static inline void dcd_event_bus_reset (uint8_t rhport, t TU_ATTR_ALWAYS_INLINE static inline void dcd_event_setup_received(uint8_t rhport, uint8_t const * setup, bool in_isr) { dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_SETUP_RECEIVED }; - memcpy(&event.setup_received, setup, 8); + memcpy(&event.setup_received, setup, sizeof(tusb_control_request_t)); dcd_event_handler(&event, in_isr); } diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c index 0995ef669..ce4ddab66 100644 --- a/src/device/usbd_control.c +++ b/src/device/usbd_control.c @@ -93,7 +93,9 @@ static bool _data_stage_xact(uint8_t rhport) if ( _ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_IN ) { ep_addr = EDPT_CTRL_IN; - if ( xact_len ) memcpy(_usbd_ctrl_buf, _ctrl_xfer.buffer, xact_len); + if ( xact_len ) { + TU_VERIFY(tu_memcpy_s(_usbd_ctrl_buf, CFG_TUD_ENDPOINT0_SIZE, _ctrl_xfer.buffer, xact_len)==0); + } } return usbd_edpt_xfer(rhport, ep_addr, xact_len ? _usbd_ctrl_buf : NULL, xact_len); diff --git a/src/tusb.c b/src/tusb.c index a5c820b8d..c918b0248 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -24,6 +24,7 @@ * This file is part of the TinyUSB stack. */ +#include "common/tusb_common.h" #include "tusb_option.h" #if CFG_TUH_ENABLED || CFG_TUD_ENABLED @@ -460,7 +461,7 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent) tu_printf("%04X: ", 16*i/item_per_line); } - memcpy(&value, buf8, size); + tu_memcpy_s(&value, sizeof(value), buf8, size); buf8 += size; tu_printf(" "); @@ -486,3 +487,23 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent) #endif #endif // host or device enabled + +//--------------------------------------------------------------------+ +// Common +//--------------------------------------------------------------------+ + +int32_t tu_memset_s(void *dest, size_t destsz, int ch, size_t count) { + if (count > destsz) { + return -1; + } + memset(dest, ch, count); + return 0; +} + +int32_t tu_memcpy_s(void *dest, size_t destsz, const void *src, size_t count) { + if (count > destsz) { + return -1; + } + memcpy(dest, src, count); + return 0; +} \ No newline at end of file -- cgit v1.3.1 From 074289caa31297b7261d9484f529f481d0fc9f06 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 20 Jan 2023 15:30:24 +0700 Subject: add helper tu_desc_find/find2/find3 --- src/common/tusb_types.h | 13 +++++++++++++ src/tusb.c | 35 +++++++++++++++++++++++++++++++++++ 2 files changed, 48 insertions(+) (limited to 'src/common') diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 32cdba450..82798a484 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -543,22 +543,35 @@ TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_ //--------------------------------------------------------------------+ // Descriptor helper //--------------------------------------------------------------------+ + +// return next descriptor TU_ATTR_ALWAYS_INLINE static inline uint8_t const * tu_desc_next(void const* desc) { uint8_t const* desc8 = (uint8_t const*) desc; return desc8 + desc8[DESC_OFFSET_LEN]; } +// get descriptor type TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_type(void const* desc) { return ((uint8_t const*) desc)[DESC_OFFSET_TYPE]; } +// get descriptor length TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_len(void const* desc) { return ((uint8_t const*) desc)[DESC_OFFSET_LEN]; } +// find descriptor that match byte1 (type) +uint8_t const * tu_desc_find(uint8_t const* desc, uint8_t const* end, uint8_t byte1); + +// find descriptor that match byte1 (type) and byte2 +uint8_t const * tu_desc_find2(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2); + +// find descriptor that match byte1 (type) and byte2 +uint8_t const * tu_desc_find3(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2, uint8_t byte3); + #ifdef __cplusplus } #endif diff --git a/src/tusb.c b/src/tusb.c index a5c820b8d..44b34b0e6 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -73,6 +73,41 @@ bool tusb_inited(void) return ret; } +//--------------------------------------------------------------------+ +// Descriptor helper +//--------------------------------------------------------------------+ + +uint8_t const * tu_desc_find(uint8_t const* desc, uint8_t const* end, uint8_t byte1) +{ + while(desc+1 < end) + { + if ( desc[1] == byte1 ) return desc; + desc += desc[DESC_OFFSET_LEN]; + } + return NULL; +} + +uint8_t const * tu_desc_find2(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2) +{ + while(desc+2 < end) + { + if ( desc[1] == byte1 && desc[2] == byte2) return desc; + desc += desc[DESC_OFFSET_LEN]; + } + return NULL; +} + +uint8_t const * tu_desc_find3(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2, uint8_t byte3) +{ + while(desc+3 < end) + { + if (desc[1] == byte1 && desc[2] == byte2 && desc[3] == byte3) return desc; + desc += desc[DESC_OFFSET_LEN]; + } + return NULL; +} + + //--------------------------------------------------------------------+ // Endpoint Helper for both Host and Device stack //--------------------------------------------------------------------+ -- cgit v1.3.1 From 18c3095346159a4f5c3db9775b4f7c6aebca77c2 Mon Sep 17 00:00:00 2001 From: Nathaniel Brough Date: Fri, 20 Jan 2023 15:40:32 -0800 Subject: fix: Change all static variables to thread when fuzzing --- .vscode/settings.json | 3 +++ src/class/cdc/cdc_device.c | 2 +- src/class/dfu/dfu_device.c | 14 +++++++------- src/class/hid/hid_device.c | 2 +- src/class/msc/msc_device.c | 8 ++++---- src/class/net/ecm_rndis_device.c | 14 +++++++------- src/class/net/ncm_device.c | 12 ++++++------ src/class/usbtmc/usbtmc_device.c | 8 ++++---- src/class/vendor/vendor_device.c | 2 +- src/class/vendor/vendor_device.h | 2 +- src/class/video/video_device.c | 8 ++++---- src/common/tusb_compiler.h | 7 +++++++ src/common/tusb_debug.h | 2 +- src/common/tusb_types.h | 4 ++-- src/device/usbd.c | 18 +++++++++--------- src/device/usbd_control.c | 4 ++-- test/fuzz/dcd_fuzz.cc | 2 +- test/fuzz/device/msc/src/usb_descriptors.cc | 4 ++-- test/fuzz/device/net/src/usb_descriptors.cc | 4 ++-- test/fuzz/make.mk | 3 ++- 20 files changed, 67 insertions(+), 56 deletions(-) create mode 100644 .vscode/settings.json (limited to 'src/common') diff --git a/.vscode/settings.json b/.vscode/settings.json new file mode 100644 index 000000000..97924983a --- /dev/null +++ b/.vscode/settings.json @@ -0,0 +1,3 @@ +{ + "editor.formatOnSave": false +} \ No newline at end of file diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c index 8d10a416c..b943c1caf 100644 --- a/src/class/cdc/cdc_device.c +++ b/src/class/cdc/cdc_device.c @@ -76,7 +76,7 @@ typedef struct //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC]; +CFG_TUSB_MEM_SECTION TU_STATIC cdcd_interface_t _cdcd_itf[CFG_TUD_CDC]; static bool _prep_out_transaction (cdcd_interface_t* p_cdc) { diff --git a/src/class/dfu/dfu_device.c b/src/class/dfu/dfu_device.c index aa5891ca9..a318603d3 100644 --- a/src/class/dfu/dfu_device.c +++ b/src/class/dfu/dfu_device.c @@ -56,7 +56,7 @@ typedef struct } dfu_state_ctx_t; // Only a single dfu state is allowed -CFG_TUSB_MEM_SECTION static dfu_state_ctx_t _dfu_ctx; +CFG_TUSB_MEM_SECTION TU_STATIC dfu_state_ctx_t _dfu_ctx; static void reset_state(void) { @@ -74,7 +74,7 @@ static bool process_manifest_get_status(uint8_t rhport, uint8_t stage, tusb_cont //--------------------------------------------------------------------+ #if CFG_TUSB_DEBUG >= 2 -static tu_lookup_entry_t const _dfu_request_lookup[] = +TU_STATIC tu_lookup_entry_t const _dfu_request_lookup[] = { { .key = DFU_REQUEST_DETACH , .data = "DETACH" }, { .key = DFU_REQUEST_DNLOAD , .data = "DNLOAD" }, @@ -85,13 +85,13 @@ static tu_lookup_entry_t const _dfu_request_lookup[] = { .key = DFU_REQUEST_ABORT , .data = "ABORT" }, }; -static tu_lookup_table_t const _dfu_request_table = +TU_STATIC tu_lookup_table_t const _dfu_request_table = { .count = TU_ARRAY_SIZE(_dfu_request_lookup), .items = _dfu_request_lookup }; -static tu_lookup_entry_t const _dfu_state_lookup[] = +TU_STATIC tu_lookup_entry_t const _dfu_state_lookup[] = { { .key = APP_IDLE , .data = "APP_IDLE" }, { .key = APP_DETACH , .data = "APP_DETACH" }, @@ -106,13 +106,13 @@ static tu_lookup_entry_t const _dfu_state_lookup[] = { .key = DFU_ERROR , .data = "ERROR" }, }; -static tu_lookup_table_t const _dfu_state_table = +TU_STATIC tu_lookup_table_t const _dfu_state_table = { .count = TU_ARRAY_SIZE(_dfu_state_lookup), .items = _dfu_state_lookup }; -static tu_lookup_entry_t const _dfu_status_lookup[] = +TU_STATIC tu_lookup_entry_t const _dfu_status_lookup[] = { { .key = DFU_STATUS_OK , .data = "OK" }, { .key = DFU_STATUS_ERR_TARGET , .data = "errTARGET" }, @@ -132,7 +132,7 @@ static tu_lookup_entry_t const _dfu_status_lookup[] = { .key = DFU_STATUS_ERR_STALLEDPKT , .data = "errSTALLEDPKT" }, }; -static tu_lookup_table_t const _dfu_status_table = +TU_STATIC tu_lookup_table_t const _dfu_status_table = { .count = TU_ARRAY_SIZE(_dfu_status_lookup), .items = _dfu_status_lookup diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c index 8077e4deb..c42d1b6de 100644 --- a/src/class/hid/hid_device.c +++ b/src/class/hid/hid_device.c @@ -58,7 +58,7 @@ typedef struct tusb_hid_descriptor_hid_t const * hid_descriptor; } hidd_interface_t; -CFG_TUSB_MEM_SECTION static hidd_interface_t _hidd_itf[CFG_TUD_HID]; +CFG_TUSB_MEM_SECTION TU_STATIC hidd_interface_t _hidd_itf[CFG_TUD_HID]; /*------------- Helpers -------------*/ static inline uint8_t get_index_by_itfnum(uint8_t itf_num) diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index 00b0a1d06..bf56ed9bf 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -71,8 +71,8 @@ typedef struct uint8_t add_sense_qualifier; }mscd_interface_t; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static mscd_interface_t _mscd_itf; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t _mscd_buf[CFG_TUD_MSC_EP_BUFSIZE]; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC mscd_interface_t _mscd_itf; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t _mscd_buf[CFG_TUD_MSC_EP_BUFSIZE]; //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION @@ -202,7 +202,7 @@ uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw) //--------------------------------------------------------------------+ #if CFG_TUSB_DEBUG >= 2 -TU_ATTR_UNUSED static tu_lookup_entry_t const _msc_scsi_cmd_lookup[] = +TU_ATTR_UNUSED TU_STATIC tu_lookup_entry_t const _msc_scsi_cmd_lookup[] = { { .key = SCSI_CMD_TEST_UNIT_READY , .data = "Test Unit Ready" }, { .key = SCSI_CMD_INQUIRY , .data = "Inquiry" }, @@ -217,7 +217,7 @@ TU_ATTR_UNUSED static tu_lookup_entry_t const _msc_scsi_cmd_lookup[] = { .key = SCSI_CMD_WRITE_10 , .data = "Write10" } }; -TU_ATTR_UNUSED static tu_lookup_table_t const _msc_scsi_cmd_table = +TU_ATTR_UNUSED TU_STATIC tu_lookup_table_t const _msc_scsi_cmd_table = { .count = TU_ARRAY_SIZE(_msc_scsi_cmd_lookup), .items = _msc_scsi_cmd_lookup diff --git a/src/class/net/ecm_rndis_device.c b/src/class/net/ecm_rndis_device.c index c7428bcda..560e1768d 100644 --- a/src/class/net/ecm_rndis_device.c +++ b/src/class/net/ecm_rndis_device.c @@ -61,8 +61,8 @@ typedef struct #define CFG_TUD_NET_PACKET_PREFIX_LEN sizeof(rndis_data_packet_t) #define CFG_TUD_NET_PACKET_SUFFIX_LEN 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t received[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN]; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t transmitted[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN]; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t received[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN]; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t transmitted[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN]; struct ecm_notify_struct { @@ -70,7 +70,7 @@ struct ecm_notify_struct uint32_t downlink, uplink; }; -static const struct ecm_notify_struct ecm_notify_nc = +TU_STATIC const struct ecm_notify_struct ecm_notify_nc = { .header = { .bmRequestType = 0xA1, @@ -80,7 +80,7 @@ static const struct ecm_notify_struct ecm_notify_nc = }, }; -static const struct ecm_notify_struct ecm_notify_csc = +TU_STATIC const struct ecm_notify_struct ecm_notify_csc = { .header = { .bmRequestType = 0xA1, @@ -92,7 +92,7 @@ static const struct ecm_notify_struct ecm_notify_csc = }; // TODO remove CFG_TUSB_MEM_SECTION, control internal buffer is already in this special section -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static union +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC union { uint8_t rndis_buf[120]; struct ecm_notify_struct ecm_buf; @@ -102,9 +102,9 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static union // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ // TODO remove CFG_TUSB_MEM_SECTION -CFG_TUSB_MEM_SECTION static netd_interface_t _netd_itf; +CFG_TUSB_MEM_SECTION TU_STATIC netd_interface_t _netd_itf; -static bool can_xmit; +TU_STATIC bool can_xmit; void tud_network_recv_renew(void) { diff --git a/src/class/net/ncm_device.c b/src/class/net/ncm_device.c index 1cbc0ce01..236232191 100644 --- a/src/class/net/ncm_device.c +++ b/src/class/net/ncm_device.c @@ -130,7 +130,7 @@ typedef struct // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static const ntb_parameters_t ntb_parameters = { +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC const ntb_parameters_t ntb_parameters = { .wLength = sizeof(ntb_parameters_t), .bmNtbFormatsSupported = 0x01, .dwNtbInMaxSize = CFG_TUD_NCM_IN_NTB_MAX_SIZE, @@ -145,11 +145,11 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static const ntb_parameters_t ntb_parame .wNtbOutMaxDatagrams = 0 }; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static transmit_ntb_t transmit_ntb[2]; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC transmit_ntb_t transmit_ntb[2]; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t receive_ntb[CFG_TUD_NCM_OUT_NTB_MAX_SIZE]; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t receive_ntb[CFG_TUD_NCM_OUT_NTB_MAX_SIZE]; -static ncm_interface_t ncm_interface; +TU_STATIC ncm_interface_t ncm_interface; /* * Set up the NTB state in ncm_interface to be ready to add datagrams. @@ -196,7 +196,7 @@ static void ncm_start_tx(void) { ncm_prepare_for_tx(); } -static struct ecm_notify_struct ncm_notify_connected = +TU_STATIC struct ecm_notify_struct ncm_notify_connected = { .header = { .bmRequestType_bit = { @@ -210,7 +210,7 @@ static struct ecm_notify_struct ncm_notify_connected = }, }; -static struct ecm_notify_struct ncm_notify_speed_change = +TU_STATIC struct ecm_notify_struct ncm_notify_speed_change = { .header = { .bmRequestType_bit = { diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c index 0cf0743a7..fd8220c1f 100644 --- a/src/class/usbtmc/usbtmc_device.c +++ b/src/class/usbtmc/usbtmc_device.c @@ -78,7 +78,7 @@ #ifdef xDEBUG #include "uart_util.h" -static char logMsg[150]; +TU_STATIC char logMsg[150]; #endif // Buffer size must be an exact multiple of the max packet size for both @@ -143,7 +143,7 @@ typedef struct usbtmc_capabilities_specific_t const * capabilities; } usbtmc_interface_state_t; -CFG_TUSB_MEM_SECTION static usbtmc_interface_state_t usbtmc_state = +CFG_TUSB_MEM_SECTION TU_STATIC usbtmc_interface_state_t usbtmc_state = { .itf_id = 0xFF, }; @@ -154,8 +154,8 @@ TU_VERIFY_STATIC(USBTMCD_BUFFER_SIZE >= 32u,"USBTMC dev buffer size too small"); static bool handle_devMsgOutStart(uint8_t rhport, void *data, size_t len); static bool handle_devMsgOut(uint8_t rhport, void *data, size_t len, size_t packetLen); -static uint8_t termChar; -static uint8_t termCharRequested = false; +TU_STATIC uint8_t termChar; +TU_STATIC uint8_t termCharRequested = false; #if OSAL_MUTEX_REQUIRED static OSAL_MUTEX_DEF(usbtmcLockBuffer); diff --git a/src/class/vendor/vendor_device.c b/src/class/vendor/vendor_device.c index 3b81a108f..b33cbcf13 100644 --- a/src/class/vendor/vendor_device.c +++ b/src/class/vendor/vendor_device.c @@ -59,7 +59,7 @@ typedef struct CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_VENDOR_EPSIZE]; } vendord_interface_t; -CFG_TUSB_MEM_SECTION static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR]; +CFG_TUSB_MEM_SECTION TU_STATIC vendord_interface_t _vendord_itf[CFG_TUD_VENDOR]; #define ITF_MEM_RESET_SIZE offsetof(vendord_interface_t, rx_ff) diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h index 4a873e5fc..543500f0c 100644 --- a/src/class/vendor/vendor_device.h +++ b/src/class/vendor/vendor_device.h @@ -50,7 +50,7 @@ void tud_vendor_n_read_flush (uint8_t itf); uint32_t tud_vendor_n_write (uint8_t itf, void const* buffer, uint32_t bufsize); uint32_t tud_vendor_n_write_available (uint8_t itf); -static inline +TU_STATIC inline uint32_t tud_vendor_n_write_str (uint8_t itf, char const* str); uint32_t tud_vendor_n_flush (uint8_t itf); diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index e17d0a90f..14518deac 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -125,11 +125,11 @@ typedef struct TU_ATTR_PACKED { //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION static videod_interface_t _videod_itf[CFG_TUD_VIDEO]; -CFG_TUSB_MEM_SECTION static videod_streaming_interface_t _videod_streaming_itf[CFG_TUD_VIDEO_STREAMING]; +CFG_TUSB_MEM_SECTION TU_STATIC videod_interface_t _videod_itf[CFG_TUD_VIDEO]; +CFG_TUSB_MEM_SECTION TU_STATIC videod_streaming_interface_t _videod_streaming_itf[CFG_TUD_VIDEO_STREAMING]; -static uint8_t const _cap_get = 0x1u; /* support for GET */ -static uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */ +TU_STATIC uint8_t const _cap_get = 0x1u; /* support for GET */ +TU_STATIC uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */ /** Get interface number from the interface descriptor * diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 2c30daf6f..6a02959ca 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -61,6 +61,13 @@ #define TU_VERIFY_STATIC(const_expr, _mess) enum { TU_XSTRCAT(_verify_static_, _TU_COUNTER_) = 1/(!!(const_expr)) } #endif +/* --------------------- Fuzzing types -------------------------------------- */ +#ifdef FUZZ + #define TU_STATIC __thread static +#else + #define TU_STATIC static +#endif + // for declaration of reserved field, make use of _TU_COUNTER_ #define TU_RESERVED TU_XSTRCAT(reserved, _TU_COUNTER_) diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index 65fd1920d..8587b6771 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -114,7 +114,7 @@ typedef struct static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key) { - static char not_found[11]; + TU_STATIC char not_found[11]; for(uint16_t i=0; icount; i++) { diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 32cdba450..56f782ca3 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -529,13 +529,13 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpo #if CFG_TUSB_DEBUG TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_dir_str(tusb_dir_t dir) { - static const char *str[] = {"out", "in"}; + TU_STATIC const char *str[] = {"out", "in"}; return str[dir]; } TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_t t) { - static const char *str[] = {"control", "isochronous", "bulk", "interrupt"}; + TU_STATIC const char *str[] = {"control", "isochronous", "bulk", "interrupt"}; return str[t]; } #endif diff --git a/src/device/usbd.c b/src/device/usbd.c index 6e0c6710d..72fa2bd4c 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -76,7 +76,7 @@ typedef struct }usbd_device_t; -static usbd_device_t _usbd_dev; +TU_STATIC usbd_device_t _usbd_dev; //--------------------------------------------------------------------+ // Class Driver @@ -88,7 +88,7 @@ static usbd_device_t _usbd_dev; #endif // Built-in class drivers -static usbd_class_driver_t const _usbd_driver[] = +TU_STATIC usbd_class_driver_t const _usbd_driver[] = { #if CFG_TUD_CDC { @@ -238,8 +238,8 @@ static usbd_class_driver_t const _usbd_driver[] = enum { BUILTIN_DRIVER_COUNT = TU_ARRAY_SIZE(_usbd_driver) }; // Additional class drivers implemented by application -static usbd_class_driver_t const * _app_driver = NULL; -static uint8_t _app_driver_count = 0; +TU_STATIC usbd_class_driver_t const * _app_driver = NULL; +TU_STATIC uint8_t _app_driver_count = 0; // virtually joins built-in and application drivers together. // Application is positioned first to allow overwriting built-in ones. @@ -265,17 +265,17 @@ static inline usbd_class_driver_t const * get_driver(uint8_t drvid) //--------------------------------------------------------------------+ enum { RHPORT_INVALID = 0xFFu }; -static uint8_t _usbd_rhport = RHPORT_INVALID; +TU_STATIC uint8_t _usbd_rhport = RHPORT_INVALID; // Event queue // usbd_int_set() is used as mutex in OS NONE config OSAL_QUEUE_DEF(usbd_int_set, _usbd_qdef, CFG_TUD_TASK_QUEUE_SZ, dcd_event_t); -static osal_queue_t _usbd_q; +TU_STATIC osal_queue_t _usbd_q; // Mutex for claiming endpoint #if OSAL_MUTEX_REQUIRED - static osal_mutex_def_t _ubsd_mutexdef; - static osal_mutex_t _usbd_mutex; + TU_STATIC osal_mutex_def_t _ubsd_mutexdef; + TU_STATIC osal_mutex_t _usbd_mutex; #else #define _usbd_mutex NULL #endif @@ -299,7 +299,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t event, // Debug //--------------------------------------------------------------------+ #if CFG_TUSB_DEBUG >= 2 -static char const* const _usbd_event_str[DCD_EVENT_COUNT] = +TU_STATIC char const* const _usbd_event_str[DCD_EVENT_COUNT] = { "Invalid" , "Bus Reset" , diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c index 0995ef669..c3ff7459d 100644 --- a/src/device/usbd_control.c +++ b/src/device/usbd_control.c @@ -53,10 +53,10 @@ typedef struct usbd_control_xfer_cb_t complete_cb; } usbd_control_xfer_t; -static usbd_control_xfer_t _ctrl_xfer; +TU_STATIC usbd_control_xfer_t _ctrl_xfer; CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN -static uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE]; +TU_STATIC uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE]; //--------------------------------------------------------------------+ // Application API diff --git a/test/fuzz/dcd_fuzz.cc b/test/fuzz/dcd_fuzz.cc index 7153e20f0..04b5ce6d7 100644 --- a/test/fuzz/dcd_fuzz.cc +++ b/test/fuzz/dcd_fuzz.cc @@ -39,7 +39,7 @@ struct State { uint8_t address; }; -static State state = {false, 0, 0}; +TU_STATIC State state = {false, 0, 0}; //--------------------------------------------------------------------+ // Controller API diff --git a/test/fuzz/device/msc/src/usb_descriptors.cc b/test/fuzz/device/msc/src/usb_descriptors.cc index ded401fc9..91db232ac 100644 --- a/test/fuzz/device/msc/src/usb_descriptors.cc +++ b/test/fuzz/device/msc/src/usb_descriptors.cc @@ -44,7 +44,7 @@ // Invoked when received GET DEVICE DESCRIPTOR // Application return pointer to descriptor uint8_t const *tud_descriptor_device_cb(void) { - static tusb_desc_device_t const desc_device = { + TU_STATIC tusb_desc_device_t const desc_device = { .bLength = sizeof(tusb_desc_device_t), .bDescriptorType = TUSB_DESC_DEVICE, .bcdUSB = USB_BCD, @@ -184,7 +184,7 @@ char const *string_desc_arr[] = { }; -static uint16_t _desc_str[32]; +TU_STATIC uint16_t _desc_str[32]; // Invoked when received GET STRING DESCRIPTOR request // Application return pointer to descriptor, whose contents must exist long diff --git a/test/fuzz/device/net/src/usb_descriptors.cc b/test/fuzz/device/net/src/usb_descriptors.cc index c600bd801..0223ed298 100644 --- a/test/fuzz/device/net/src/usb_descriptors.cc +++ b/test/fuzz/device/net/src/usb_descriptors.cc @@ -45,7 +45,7 @@ // Invoked when received GET DEVICE DESCRIPTOR // Application return pointer to descriptor uint8_t const *tud_descriptor_device_cb(void) { - static tusb_desc_device_t const desc_device = { + TU_STATIC tusb_desc_device_t const desc_device = { .bLength = sizeof(tusb_desc_device_t), .bDescriptorType = TUSB_DESC_DEVICE, .bcdUSB = USB_BCD, @@ -189,7 +189,7 @@ char const *string_desc_arr[] = { "TinyUSB CDC", // 4: CDC Interface }; -static uint16_t _desc_str[32]; +TU_STATIC uint16_t _desc_str[32]; // Invoked when received GET STRING DESCRIPTOR request // Application return pointer to descriptor, whose contents must exist long diff --git a/test/fuzz/make.mk b/test/fuzz/make.mk index 6717ebc80..5e8658ad0 100644 --- a/test/fuzz/make.mk +++ b/test/fuzz/make.mk @@ -78,7 +78,8 @@ CFLAGS += \ CFLAGS += \ -Wno-error=unreachable-code \ -DOPT_MCU_FUZZ=1 \ - -DCFG_TUSB_MCU=OPT_MCU_FUZZ + -DCFG_TUSB_MCU=OPT_MCU_FUZZ \ + -DFUZZ CXXFLAGS += \ -xc++ \ -- cgit v1.3.1 From 1bbeb6ad79fa1e76c109592773e0834e1ec00a0c Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 21 Jan 2023 11:32:37 +0700 Subject: update stm32f1 to support iar build --- .github/workflows/build_iar.yml | 1 + examples/rules.mk | 4 +++ hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk | 4 ++- hw/bsp/stm32f0/boards/stm32f072disco/board.mk | 2 +- hw/bsp/stm32f0/boards/stm32f072eval/board.mk | 2 +- hw/bsp/stm32f0/family.mk | 11 +++++--- hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk | 10 ++++--- .../stm32f103_bluepill/stm32f103x8_flash.icf | 31 ++++++++++++++++++++++ hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk | 10 ++++--- hw/bsp/stm32f1/family.c | 5 ++-- hw/bsp/stm32f1/family.mk | 15 ++++++++--- src/common/tusb_compiler.h | 4 +-- 12 files changed, 79 insertions(+), 20 deletions(-) create mode 100644 hw/bsp/stm32f1/boards/stm32f103_bluepill/stm32f103x8_flash.icf (limited to 'src/common') diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index 4c43400ab..40c7d7f26 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -28,6 +28,7 @@ jobs: family: # Alphabetical order - 'stm32f0' + - 'stm32f1' steps: - name: Clean workspace run: | diff --git a/examples/rules.mk b/examples/rules.mk index 19ecbc9e1..6a62288ce 100644 --- a/examples/rules.mk +++ b/examples/rules.mk @@ -72,6 +72,10 @@ ifdef LD_FILE LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE) endif +ifdef GCC_LD_FILE +LDFLAGS += -Wl,-T,$(TOP)/$(GCC_LD_FILE) +endif + ifneq ($(SKIP_NANOLIB), 1) LDFLAGS += -specs=nosys.specs -specs=nano.specs endif diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk index f470b80f0..cf787a103 100644 --- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk +++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk @@ -1,8 +1,10 @@ CFLAGS += -DSTM32F070xB -DCFG_EXAMPLE_VIDEO_READONLY +# GCC GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f070xb.s -LD_FILE = $(BOARD_PATH)/stm32F070rbtx_flash.ld +GCC_LD_FILE = $(BOARD_PATH)/stm32F070rbtx_flash.ld +# IAR IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f070xb.s IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f070xb_flash.icf diff --git a/hw/bsp/stm32f0/boards/stm32f072disco/board.mk b/hw/bsp/stm32f0/boards/stm32f072disco/board.mk index edee9b0e8..4216ba186 100644 --- a/hw/bsp/stm32f0/boards/stm32f072disco/board.mk +++ b/hw/bsp/stm32f0/boards/stm32f072disco/board.mk @@ -1,7 +1,7 @@ CFLAGS += -DSTM32F072xB -DCFG_EXAMPLE_VIDEO_READONLY GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f072xb.s -LD_FILE = $(BOARD_PATH)/STM32F072RBTx_FLASH.ld +GCC_LD_FILE = $(BOARD_PATH)/STM32F072RBTx_FLASH.ld IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f072xb.s IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f072xb_flash.icf diff --git a/hw/bsp/stm32f0/boards/stm32f072eval/board.mk b/hw/bsp/stm32f0/boards/stm32f072eval/board.mk index 6503d3273..bb9cba22a 100644 --- a/hw/bsp/stm32f0/boards/stm32f072eval/board.mk +++ b/hw/bsp/stm32f0/boards/stm32f072eval/board.mk @@ -1,7 +1,7 @@ CFLAGS += -DSTM32F072xB -DLSI_VALUE=40000 -DCFG_EXAMPLE_VIDEO_READONLY GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f072xb.s -LD_FILE = $(BOARD_PATH)/STM32F072VBTx_FLASH.ld +GCC_LD_FILE = $(BOARD_PATH)/STM32F072VBTx_FLASH.ld IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f072xb.s IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f072xb_flash.icf diff --git a/hw/bsp/stm32f0/family.mk b/hw/bsp/stm32f0/family.mk index a81ab426f..2983af49e 100644 --- a/hw/bsp/stm32f0/family.mk +++ b/hw/bsp/stm32f0/family.mk @@ -7,13 +7,14 @@ ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver include $(TOP)/$(BOARD_PATH)/board.mk +# -------------- +# Compiler Flags +# -------------- CFLAGS += \ -DCFG_EXAMPLE_MSC_READONLY \ -DCFG_TUSB_MCU=OPT_MCU_STM32F0 -# -------------- # GCC Flags -# -------------- GCC_CFLAGS += \ -flto \ -mthumb \ @@ -25,12 +26,14 @@ GCC_CFLAGS += \ # suppress warning caused by vendor mcu driver GCC_CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual -# -------------- # IAR Flags -# -------------- IAR_CFLAGS += --cpu cortex-m0 IAR_ASFLAGS += --cpu cortex-m0 +# ------------------------ +# All source paths should be relative to the top level. +# ------------------------ + SRC_C += \ src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \ $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \ diff --git a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk index db64b3a3f..159b3ecb6 100644 --- a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk +++ b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk @@ -1,8 +1,12 @@ CFLAGS += -DSTM32F103xB -DHSE_VALUE=8000000U -DCFG_EXAMPLE_VIDEO_READONLY -# All source paths should be relative to the top level. -LD_FILE = $(BOARD_PATH)/STM32F103X8_FLASH.ld -SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f103xb.s +# GCC +GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f103xb.s +GCC_LD_FILE = $(BOARD_PATH)/STM32F103X8_FLASH.ld + +# IAR +IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f103xb.s +IAR_LD_FILE = $(BOARD_PATH)/stm32f103x8_flash.icf # For flash-jlink target JLINK_DEVICE = stm32f103c8 diff --git a/hw/bsp/stm32f1/boards/stm32f103_bluepill/stm32f103x8_flash.icf b/hw/bsp/stm32f1/boards/stm32f103_bluepill/stm32f103x8_flash.icf new file mode 100644 index 000000000..07601c2e8 --- /dev/null +++ b/hw/bsp/stm32f1/boards/stm32f103_bluepill/stm32f103x8_flash.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; +define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; diff --git a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk index eeda87080..efea75be7 100644 --- a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk +++ b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk @@ -1,8 +1,12 @@ CFLAGS += -DSTM32F103xB -DHSE_VALUE=8000000U -# All source paths should be relative to the top level. -LD_FILE = $(BOARD_PATH)/STM32F103XC_FLASH.ld -SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f103xb.s +# GCC +GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f103xb.s +GCC_LD_FILE = $(BOARD_PATH)/STM32F103XC_FLASH.ld + +# IAR +IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f103xb.s +IAR_LD_FILE = $(BOARD_PATH)/stm32f103xc_flash.icf # For flash-jlink target JLINK_DEVICE = stm32f103rc diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c index 8fcf9ebd6..246d496c8 100644 --- a/hw/bsp/stm32f1/family.c +++ b/hw/bsp/stm32f1/family.c @@ -104,7 +104,8 @@ void board_init(void) void board_led_write(bool state) { - HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); + GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON)); + HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state); } uint32_t board_button_read(void) @@ -139,7 +140,7 @@ uint32_t board_millis(void) void HardFault_Handler (void) { - asm("bkpt"); + __asm("BKPT #0\n"); } #ifdef USE_FULL_ASSERT diff --git a/hw/bsp/stm32f1/family.mk b/hw/bsp/stm32f1/family.mk index 3fb2e6e70..4327f1cf8 100644 --- a/hw/bsp/stm32f1/family.mk +++ b/hw/bsp/stm32f1/family.mk @@ -6,19 +6,28 @@ ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver include $(TOP)/$(BOARD_PATH)/board.mk +# -------------- +# Compiler Flags +# -------------- CFLAGS += \ + -DCFG_TUSB_MCU=OPT_MCU_STM32F1 + +# GCC Flags +GCC_CFLAGS += \ -flto \ -mthumb \ -mabi=aapcs \ -mcpu=cortex-m3 \ -mfloat-abi=soft \ -nostdlib -nostartfiles \ - -DCFG_TUSB_MCU=OPT_MCU_STM32F1 -# mcu driver cause following warnings -#CFLAGS += -Wno-error=unused-parameter +# IAR Flags +IAR_CFLAGS += --cpu cortex-m3 +IAR_ASFLAGS += --cpu cortex-m3 +# ------------------------ # All source paths should be relative to the top level. +# ------------------------ SRC_C += \ src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \ $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \ diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 2c30daf6f..a0a49d7ec 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -76,9 +76,9 @@ * - ##__VA_ARGS__ is used to deal with 0 paramerter (swallows comma) *------------------------------------------------------------------*/ #if !defined(__CCRX__) -#define TU_ARGS_NUM(...) _TU_NARG(_0, ##__VA_ARGS__,_RSEQ_N()) +#define TU_ARGS_NUM(...) _TU_NARG(_0, ##__VA_ARGS__, _RSEQ_N()) #else -#define TU_ARGS_NUM(...) _TU_NARG(_0, __VA_ARGS__,_RSEQ_N()) +#define TU_ARGS_NUM(...) _TU_NARG(_0, __VA_ARGS__, _RSEQ_N()) #endif #define _TU_NARG(...) _GET_NTH_ARG(__VA_ARGS__) -- cgit v1.3.1 From c820c8769267644af049e0be73b04b45d57e8d98 Mon Sep 17 00:00:00 2001 From: Ryzee119 Date: Sat, 4 Jun 2022 13:47:02 +0930 Subject: ohci: Support configurable number of roothub ports --- src/common/tusb_mcu.h | 1 + src/portable/ohci/ohci.c | 39 ++++++++++++++++++++++----------------- src/portable/ohci/ohci.h | 6 +++--- 3 files changed, 26 insertions(+), 20 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 0b10c5118..ee2b896ac 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -55,6 +55,7 @@ #elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) #define TUP_DCD_ENDPOINT_MAX 16 #define TUP_USBIP_OHCI + #define OHCI_RHPORTS 2 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) // TODO USB0 has 6, USB1 has 4 diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c index 228da6ae0..45600c03b 100644 --- a/src/portable/ohci/ohci.c +++ b/src/portable/ohci/ohci.c @@ -28,6 +28,10 @@ #if CFG_TUH_ENABLED && defined(TUP_USBIP_OHCI) +#ifndef OHCI_RHPORTS +#error OHCI is enabled, but OHCI_RHPORTS is not defined. +#endif + //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ @@ -620,29 +624,30 @@ void hcd_int_handler(uint8_t hostid) //------------- RootHub status -------------// if ( int_status & OHCI_INT_RHPORT_STATUS_CHANGE_MASK ) { - uint32_t const rhport_status = OHCI_REG->rhport_status[0] & RHPORT_ALL_CHANGE_MASK; - - // TODO dual port is not yet supported - if ( rhport_status & RHPORT_CONNECT_STATUS_CHANGE_MASK ) + for (int i = 0; i < OHCI_RHPORTS; i++) { - // TODO check if remote wake-up - if ( OHCI_REG->rhport_status_bit[0].current_connect_status ) + uint32_t const rhport_status = OHCI_REG->rhport_status[i] & RHPORT_ALL_CHANGE_MASK; + if ( rhport_status & RHPORT_CONNECT_STATUS_CHANGE_MASK ) { - // TODO reset port immediately, without this controller will got 2-3 (debouncing connection status change) - OHCI_REG->rhport_status[0] = RHPORT_PORT_RESET_STATUS_MASK; - hcd_event_device_attach(hostid, true); - }else - { - hcd_event_device_remove(hostid, true); + // TODO check if remote wake-up + if ( OHCI_REG->rhport_status_bit[i].current_connect_status ) + { + // TODO reset port immediately, without this controller will got 2-3 (debouncing connection status change) + OHCI_REG->rhport_status[i] = RHPORT_PORT_RESET_STATUS_MASK; + hcd_event_device_attach(i, true); + }else + { + hcd_event_device_remove(i, true); + } } - } - if ( rhport_status & RHPORT_PORT_SUSPEND_CHANGE_MASK) - { + if ( rhport_status & RHPORT_PORT_SUSPEND_CHANGE_MASK) + { - } + } - OHCI_REG->rhport_status[0] = rhport_status; // acknowledge all interrupt + OHCI_REG->rhport_status[i] = rhport_status; // acknowledge all interrupt + } } //------------- Transfer Complete -------------// diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h index c42db141a..b7706b636 100644 --- a/src/portable/ohci/ohci.h +++ b/src/portable/ohci/ohci.h @@ -267,7 +267,7 @@ typedef volatile struct }; union { - uint32_t rhport_status[2]; // TODO NXP OHCI controller only has 2 ports + uint32_t rhport_status[OHCI_RHPORTS]; struct { uint32_t current_connect_status : 1; uint32_t port_enable_status : 1; @@ -284,11 +284,11 @@ typedef volatile struct uint32_t port_over_current_indicator_change : 1; uint32_t port_reset_status_change : 1; uint32_t TU_RESERVED : 11; - }rhport_status_bit[2]; + }rhport_status_bit[OHCI_RHPORTS]; }; }ohci_registers_t; -TU_VERIFY_STATIC( sizeof(ohci_registers_t) == 0x5c, "size is not correct"); +TU_VERIFY_STATIC( sizeof(ohci_registers_t) == (0x54 + (4 * OHCI_RHPORTS)), "size is not correct"); #ifdef __cplusplus } -- cgit v1.3.1 From 03ec49450d2109a0e6ede3672e95426fd87aa48f Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 22 Feb 2023 11:47:09 +0700 Subject: rename maros from FUZZ to _FUZZ, change TU_STATIC to static _fuzz_thread --- .vscode/settings.json | 3 --- src/class/cdc/cdc_device.c | 2 +- src/class/dfu/dfu_device.c | 14 +++++++------- src/class/hid/hid_device.c | 2 +- src/class/msc/msc_device.c | 8 ++++---- src/class/net/ecm_rndis_device.c | 17 ++++++++++------- src/class/net/ncm_device.c | 12 ++++++------ src/class/usbtmc/usbtmc_device.c | 8 ++++---- src/class/vendor/vendor_device.c | 2 +- src/class/vendor/vendor_device.h | 3 +-- src/class/video/video_device.c | 8 ++++---- src/common/tusb_compiler.h | 6 +++--- src/common/tusb_debug.h | 2 +- src/common/tusb_types.h | 4 ++-- src/device/usbd.c | 18 +++++++++--------- src/device/usbd_control.c | 4 ++-- test/fuzz/make.mk | 2 +- 17 files changed, 57 insertions(+), 58 deletions(-) delete mode 100644 .vscode/settings.json (limited to 'src/common') diff --git a/.vscode/settings.json b/.vscode/settings.json deleted file mode 100644 index 97924983a..000000000 --- a/.vscode/settings.json +++ /dev/null @@ -1,3 +0,0 @@ -{ - "editor.formatOnSave": false -} \ No newline at end of file diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c index b943c1caf..59ed2a74c 100644 --- a/src/class/cdc/cdc_device.c +++ b/src/class/cdc/cdc_device.c @@ -76,7 +76,7 @@ typedef struct //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION TU_STATIC cdcd_interface_t _cdcd_itf[CFG_TUD_CDC]; +CFG_TUSB_MEM_SECTION static _fuzz_thread cdcd_interface_t _cdcd_itf[CFG_TUD_CDC]; static bool _prep_out_transaction (cdcd_interface_t* p_cdc) { diff --git a/src/class/dfu/dfu_device.c b/src/class/dfu/dfu_device.c index a318603d3..9e7b8b5b1 100644 --- a/src/class/dfu/dfu_device.c +++ b/src/class/dfu/dfu_device.c @@ -56,7 +56,7 @@ typedef struct } dfu_state_ctx_t; // Only a single dfu state is allowed -CFG_TUSB_MEM_SECTION TU_STATIC dfu_state_ctx_t _dfu_ctx; +CFG_TUSB_MEM_SECTION static _fuzz_thread dfu_state_ctx_t _dfu_ctx; static void reset_state(void) { @@ -74,7 +74,7 @@ static bool process_manifest_get_status(uint8_t rhport, uint8_t stage, tusb_cont //--------------------------------------------------------------------+ #if CFG_TUSB_DEBUG >= 2 -TU_STATIC tu_lookup_entry_t const _dfu_request_lookup[] = +static _fuzz_thread tu_lookup_entry_t const _dfu_request_lookup[] = { { .key = DFU_REQUEST_DETACH , .data = "DETACH" }, { .key = DFU_REQUEST_DNLOAD , .data = "DNLOAD" }, @@ -85,13 +85,13 @@ TU_STATIC tu_lookup_entry_t const _dfu_request_lookup[] = { .key = DFU_REQUEST_ABORT , .data = "ABORT" }, }; -TU_STATIC tu_lookup_table_t const _dfu_request_table = +static _fuzz_thread tu_lookup_table_t const _dfu_request_table = { .count = TU_ARRAY_SIZE(_dfu_request_lookup), .items = _dfu_request_lookup }; -TU_STATIC tu_lookup_entry_t const _dfu_state_lookup[] = +static _fuzz_thread tu_lookup_entry_t const _dfu_state_lookup[] = { { .key = APP_IDLE , .data = "APP_IDLE" }, { .key = APP_DETACH , .data = "APP_DETACH" }, @@ -106,13 +106,13 @@ TU_STATIC tu_lookup_entry_t const _dfu_state_lookup[] = { .key = DFU_ERROR , .data = "ERROR" }, }; -TU_STATIC tu_lookup_table_t const _dfu_state_table = +static _fuzz_thread tu_lookup_table_t const _dfu_state_table = { .count = TU_ARRAY_SIZE(_dfu_state_lookup), .items = _dfu_state_lookup }; -TU_STATIC tu_lookup_entry_t const _dfu_status_lookup[] = +static _fuzz_thread tu_lookup_entry_t const _dfu_status_lookup[] = { { .key = DFU_STATUS_OK , .data = "OK" }, { .key = DFU_STATUS_ERR_TARGET , .data = "errTARGET" }, @@ -132,7 +132,7 @@ TU_STATIC tu_lookup_entry_t const _dfu_status_lookup[] = { .key = DFU_STATUS_ERR_STALLEDPKT , .data = "errSTALLEDPKT" }, }; -TU_STATIC tu_lookup_table_t const _dfu_status_table = +static _fuzz_thread tu_lookup_table_t const _dfu_status_table = { .count = TU_ARRAY_SIZE(_dfu_status_lookup), .items = _dfu_status_lookup diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c index c42d1b6de..546c93010 100644 --- a/src/class/hid/hid_device.c +++ b/src/class/hid/hid_device.c @@ -58,7 +58,7 @@ typedef struct tusb_hid_descriptor_hid_t const * hid_descriptor; } hidd_interface_t; -CFG_TUSB_MEM_SECTION TU_STATIC hidd_interface_t _hidd_itf[CFG_TUD_HID]; +CFG_TUSB_MEM_SECTION static _fuzz_thread hidd_interface_t _hidd_itf[CFG_TUD_HID]; /*------------- Helpers -------------*/ static inline uint8_t get_index_by_itfnum(uint8_t itf_num) diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index bf56ed9bf..e77342777 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -71,8 +71,8 @@ typedef struct uint8_t add_sense_qualifier; }mscd_interface_t; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC mscd_interface_t _mscd_itf; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t _mscd_buf[CFG_TUD_MSC_EP_BUFSIZE]; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread mscd_interface_t _mscd_itf; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread uint8_t _mscd_buf[CFG_TUD_MSC_EP_BUFSIZE]; //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION @@ -202,7 +202,7 @@ uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw) //--------------------------------------------------------------------+ #if CFG_TUSB_DEBUG >= 2 -TU_ATTR_UNUSED TU_STATIC tu_lookup_entry_t const _msc_scsi_cmd_lookup[] = +TU_ATTR_UNUSED static _fuzz_thread tu_lookup_entry_t const _msc_scsi_cmd_lookup[] = { { .key = SCSI_CMD_TEST_UNIT_READY , .data = "Test Unit Ready" }, { .key = SCSI_CMD_INQUIRY , .data = "Inquiry" }, @@ -217,7 +217,7 @@ TU_ATTR_UNUSED TU_STATIC tu_lookup_entry_t const _msc_scsi_cmd_lookup[] = { .key = SCSI_CMD_WRITE_10 , .data = "Write10" } }; -TU_ATTR_UNUSED TU_STATIC tu_lookup_table_t const _msc_scsi_cmd_table = +TU_ATTR_UNUSED static _fuzz_thread tu_lookup_table_t const _msc_scsi_cmd_table = { .count = TU_ARRAY_SIZE(_msc_scsi_cmd_lookup), .items = _msc_scsi_cmd_lookup diff --git a/src/class/net/ecm_rndis_device.c b/src/class/net/ecm_rndis_device.c index 560e1768d..e2a57cb50 100644 --- a/src/class/net/ecm_rndis_device.c +++ b/src/class/net/ecm_rndis_device.c @@ -61,8 +61,11 @@ typedef struct #define CFG_TUD_NET_PACKET_PREFIX_LEN sizeof(rndis_data_packet_t) #define CFG_TUD_NET_PACKET_SUFFIX_LEN 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t received[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN]; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t transmitted[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN]; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread +uint8_t received[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN]; + +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread +uint8_t transmitted[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN]; struct ecm_notify_struct { @@ -70,7 +73,7 @@ struct ecm_notify_struct uint32_t downlink, uplink; }; -TU_STATIC const struct ecm_notify_struct ecm_notify_nc = +static _fuzz_thread const struct ecm_notify_struct ecm_notify_nc = { .header = { .bmRequestType = 0xA1, @@ -80,7 +83,7 @@ TU_STATIC const struct ecm_notify_struct ecm_notify_nc = }, }; -TU_STATIC const struct ecm_notify_struct ecm_notify_csc = +static _fuzz_thread const struct ecm_notify_struct ecm_notify_csc = { .header = { .bmRequestType = 0xA1, @@ -92,7 +95,7 @@ TU_STATIC const struct ecm_notify_struct ecm_notify_csc = }; // TODO remove CFG_TUSB_MEM_SECTION, control internal buffer is already in this special section -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC union +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread union { uint8_t rndis_buf[120]; struct ecm_notify_struct ecm_buf; @@ -102,9 +105,9 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC union // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ // TODO remove CFG_TUSB_MEM_SECTION -CFG_TUSB_MEM_SECTION TU_STATIC netd_interface_t _netd_itf; +CFG_TUSB_MEM_SECTION static _fuzz_thread netd_interface_t _netd_itf; -TU_STATIC bool can_xmit; +static _fuzz_thread bool can_xmit; void tud_network_recv_renew(void) { diff --git a/src/class/net/ncm_device.c b/src/class/net/ncm_device.c index 236232191..b8a5c6d3a 100644 --- a/src/class/net/ncm_device.c +++ b/src/class/net/ncm_device.c @@ -130,7 +130,7 @@ typedef struct // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC const ntb_parameters_t ntb_parameters = { +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread const ntb_parameters_t ntb_parameters = { .wLength = sizeof(ntb_parameters_t), .bmNtbFormatsSupported = 0x01, .dwNtbInMaxSize = CFG_TUD_NCM_IN_NTB_MAX_SIZE, @@ -145,11 +145,11 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC const ntb_parameters_t ntb_par .wNtbOutMaxDatagrams = 0 }; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC transmit_ntb_t transmit_ntb[2]; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread transmit_ntb_t transmit_ntb[2]; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t receive_ntb[CFG_TUD_NCM_OUT_NTB_MAX_SIZE]; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread uint8_t receive_ntb[CFG_TUD_NCM_OUT_NTB_MAX_SIZE]; -TU_STATIC ncm_interface_t ncm_interface; +static _fuzz_thread ncm_interface_t ncm_interface; /* * Set up the NTB state in ncm_interface to be ready to add datagrams. @@ -196,7 +196,7 @@ static void ncm_start_tx(void) { ncm_prepare_for_tx(); } -TU_STATIC struct ecm_notify_struct ncm_notify_connected = +static _fuzz_thread struct ecm_notify_struct ncm_notify_connected = { .header = { .bmRequestType_bit = { @@ -210,7 +210,7 @@ TU_STATIC struct ecm_notify_struct ncm_notify_connected = }, }; -TU_STATIC struct ecm_notify_struct ncm_notify_speed_change = +static _fuzz_thread struct ecm_notify_struct ncm_notify_speed_change = { .header = { .bmRequestType_bit = { diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c index fd8220c1f..416cb9bb9 100644 --- a/src/class/usbtmc/usbtmc_device.c +++ b/src/class/usbtmc/usbtmc_device.c @@ -78,7 +78,7 @@ #ifdef xDEBUG #include "uart_util.h" -TU_STATIC char logMsg[150]; +static _fuzz_thread char logMsg[150]; #endif // Buffer size must be an exact multiple of the max packet size for both @@ -143,7 +143,7 @@ typedef struct usbtmc_capabilities_specific_t const * capabilities; } usbtmc_interface_state_t; -CFG_TUSB_MEM_SECTION TU_STATIC usbtmc_interface_state_t usbtmc_state = +CFG_TUSB_MEM_SECTION static _fuzz_thread usbtmc_interface_state_t usbtmc_state = { .itf_id = 0xFF, }; @@ -154,8 +154,8 @@ TU_VERIFY_STATIC(USBTMCD_BUFFER_SIZE >= 32u,"USBTMC dev buffer size too small"); static bool handle_devMsgOutStart(uint8_t rhport, void *data, size_t len); static bool handle_devMsgOut(uint8_t rhport, void *data, size_t len, size_t packetLen); -TU_STATIC uint8_t termChar; -TU_STATIC uint8_t termCharRequested = false; +static _fuzz_thread uint8_t termChar; +static _fuzz_thread uint8_t termCharRequested = false; #if OSAL_MUTEX_REQUIRED static OSAL_MUTEX_DEF(usbtmcLockBuffer); diff --git a/src/class/vendor/vendor_device.c b/src/class/vendor/vendor_device.c index b33cbcf13..22124d193 100644 --- a/src/class/vendor/vendor_device.c +++ b/src/class/vendor/vendor_device.c @@ -59,7 +59,7 @@ typedef struct CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_VENDOR_EPSIZE]; } vendord_interface_t; -CFG_TUSB_MEM_SECTION TU_STATIC vendord_interface_t _vendord_itf[CFG_TUD_VENDOR]; +CFG_TUSB_MEM_SECTION static _fuzz_thread vendord_interface_t _vendord_itf[CFG_TUD_VENDOR]; #define ITF_MEM_RESET_SIZE offsetof(vendord_interface_t, rx_ff) diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h index 543500f0c..2bb6afa67 100644 --- a/src/class/vendor/vendor_device.h +++ b/src/class/vendor/vendor_device.h @@ -50,8 +50,7 @@ void tud_vendor_n_read_flush (uint8_t itf); uint32_t tud_vendor_n_write (uint8_t itf, void const* buffer, uint32_t bufsize); uint32_t tud_vendor_n_write_available (uint8_t itf); -TU_STATIC inline -uint32_t tud_vendor_n_write_str (uint8_t itf, char const* str); +static inline uint32_t tud_vendor_n_write_str (uint8_t itf, char const* str); uint32_t tud_vendor_n_flush (uint8_t itf); //--------------------------------------------------------------------+ diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index 14518deac..54b45bc8e 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -125,11 +125,11 @@ typedef struct TU_ATTR_PACKED { //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION TU_STATIC videod_interface_t _videod_itf[CFG_TUD_VIDEO]; -CFG_TUSB_MEM_SECTION TU_STATIC videod_streaming_interface_t _videod_streaming_itf[CFG_TUD_VIDEO_STREAMING]; +CFG_TUSB_MEM_SECTION static _fuzz_thread videod_interface_t _videod_itf[CFG_TUD_VIDEO]; +CFG_TUSB_MEM_SECTION static _fuzz_thread videod_streaming_interface_t _videod_streaming_itf[CFG_TUD_VIDEO_STREAMING]; -TU_STATIC uint8_t const _cap_get = 0x1u; /* support for GET */ -TU_STATIC uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */ +static _fuzz_thread uint8_t const _cap_get = 0x1u; /* support for GET */ +static _fuzz_thread uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */ /** Get interface number from the interface descriptor * diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 6a02959ca..c1a321a40 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -62,10 +62,10 @@ #endif /* --------------------- Fuzzing types -------------------------------------- */ -#ifdef FUZZ - #define TU_STATIC __thread static +#ifdef _FUZZ + #define _fuzz_thread __thread #else - #define TU_STATIC static + #define _fuzz_thread #endif // for declaration of reserved field, make use of _TU_COUNTER_ diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index 8587b6771..e5f718f79 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -114,7 +114,7 @@ typedef struct static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key) { - TU_STATIC char not_found[11]; + static _fuzz_thread char not_found[11]; for(uint16_t i=0; icount; i++) { diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 56f782ca3..c4e131134 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -529,13 +529,13 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpo #if CFG_TUSB_DEBUG TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_dir_str(tusb_dir_t dir) { - TU_STATIC const char *str[] = {"out", "in"}; + static _fuzz_thread const char *str[] = {"out", "in"}; return str[dir]; } TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_t t) { - TU_STATIC const char *str[] = {"control", "isochronous", "bulk", "interrupt"}; + static _fuzz_thread const char *str[] = {"control", "isochronous", "bulk", "interrupt"}; return str[t]; } #endif diff --git a/src/device/usbd.c b/src/device/usbd.c index 72fa2bd4c..3176239e7 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -76,7 +76,7 @@ typedef struct }usbd_device_t; -TU_STATIC usbd_device_t _usbd_dev; +static _fuzz_thread usbd_device_t _usbd_dev; //--------------------------------------------------------------------+ // Class Driver @@ -88,7 +88,7 @@ TU_STATIC usbd_device_t _usbd_dev; #endif // Built-in class drivers -TU_STATIC usbd_class_driver_t const _usbd_driver[] = +static _fuzz_thread usbd_class_driver_t const _usbd_driver[] = { #if CFG_TUD_CDC { @@ -238,8 +238,8 @@ TU_STATIC usbd_class_driver_t const _usbd_driver[] = enum { BUILTIN_DRIVER_COUNT = TU_ARRAY_SIZE(_usbd_driver) }; // Additional class drivers implemented by application -TU_STATIC usbd_class_driver_t const * _app_driver = NULL; -TU_STATIC uint8_t _app_driver_count = 0; +static _fuzz_thread usbd_class_driver_t const * _app_driver = NULL; +static _fuzz_thread uint8_t _app_driver_count = 0; // virtually joins built-in and application drivers together. // Application is positioned first to allow overwriting built-in ones. @@ -265,17 +265,17 @@ static inline usbd_class_driver_t const * get_driver(uint8_t drvid) //--------------------------------------------------------------------+ enum { RHPORT_INVALID = 0xFFu }; -TU_STATIC uint8_t _usbd_rhport = RHPORT_INVALID; +static _fuzz_thread uint8_t _usbd_rhport = RHPORT_INVALID; // Event queue // usbd_int_set() is used as mutex in OS NONE config OSAL_QUEUE_DEF(usbd_int_set, _usbd_qdef, CFG_TUD_TASK_QUEUE_SZ, dcd_event_t); -TU_STATIC osal_queue_t _usbd_q; +static _fuzz_thread osal_queue_t _usbd_q; // Mutex for claiming endpoint #if OSAL_MUTEX_REQUIRED - TU_STATIC osal_mutex_def_t _ubsd_mutexdef; - TU_STATIC osal_mutex_t _usbd_mutex; + static _fuzz_thread osal_mutex_def_t _ubsd_mutexdef; + static _fuzz_thread osal_mutex_t _usbd_mutex; #else #define _usbd_mutex NULL #endif @@ -299,7 +299,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t event, // Debug //--------------------------------------------------------------------+ #if CFG_TUSB_DEBUG >= 2 -TU_STATIC char const* const _usbd_event_str[DCD_EVENT_COUNT] = +static _fuzz_thread char const* const _usbd_event_str[DCD_EVENT_COUNT] = { "Invalid" , "Bus Reset" , diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c index c3ff7459d..8b071d9c6 100644 --- a/src/device/usbd_control.c +++ b/src/device/usbd_control.c @@ -53,10 +53,10 @@ typedef struct usbd_control_xfer_cb_t complete_cb; } usbd_control_xfer_t; -TU_STATIC usbd_control_xfer_t _ctrl_xfer; +static _fuzz_thread usbd_control_xfer_t _ctrl_xfer; CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN -TU_STATIC uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE]; +static _fuzz_thread uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE]; //--------------------------------------------------------------------+ // Application API diff --git a/test/fuzz/make.mk b/test/fuzz/make.mk index 5e8658ad0..e7c5518e7 100644 --- a/test/fuzz/make.mk +++ b/test/fuzz/make.mk @@ -79,7 +79,7 @@ CFLAGS += \ -Wno-error=unreachable-code \ -DOPT_MCU_FUZZ=1 \ -DCFG_TUSB_MCU=OPT_MCU_FUZZ \ - -DFUZZ + -D_FUZZ CXXFLAGS += \ -xc++ \ -- cgit v1.3.1 From 4c846af53e993d635e6fff7e2611a554b55fc441 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 22 Feb 2023 16:18:45 +0700 Subject: rename OHCI_RHPORTS to TUP_OHCI_RHPORTS --- src/common/tusb_mcu.h | 2 +- src/portable/ohci/ohci.c | 17 ++++++++--------- src/portable/ohci/ohci.h | 6 +++--- 3 files changed, 12 insertions(+), 13 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index ee2b896ac..a599c4fe9 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -55,7 +55,7 @@ #elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) #define TUP_DCD_ENDPOINT_MAX 16 #define TUP_USBIP_OHCI - #define OHCI_RHPORTS 2 + #define TUP_OHCI_RHPORTS 2 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) // TODO USB0 has 6, USB1 has 4 diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c index 76f97844c..792ef65ff 100644 --- a/src/portable/ohci/ohci.c +++ b/src/portable/ohci/ohci.c @@ -28,8 +28,8 @@ #if CFG_TUH_ENABLED && defined(TUP_USBIP_OHCI) -#ifndef OHCI_RHPORTS -#error OHCI is enabled, but OHCI_RHPORTS is not defined. +#ifndef TUP_OHCI_RHPORTS +#error OHCI is enabled, but TUP_OHCI_RHPORTS is not defined. #endif //--------------------------------------------------------------------+ @@ -393,21 +393,20 @@ static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr) if (ed->dev_addr == dev_addr) { - //Prevent Host Controller from processing this ED while we remove it + // Prevent Host Controller from processing this ED while we remove it ed->skip = 1; - // unlink ed + // unlink ed, will also move up p_prev p_prev->next = ed->next; // point the removed ED's next pointer to list head to make sure HC can always safely move away from this ED ed->next = (uint32_t) _phys_addr(p_head); ed->used = 0; ed->skip = 0; - continue; + }else + { + p_prev = (ohci_ed_t*) _virt_addr((void *)p_prev->next); } - - // check next valid since we could remove it - if (p_prev->next) p_prev = (ohci_ed_t*) _virt_addr((void *)p_prev->next); } } @@ -665,7 +664,7 @@ void hcd_int_handler(uint8_t hostid) //------------- RootHub status -------------// if ( int_status & OHCI_INT_RHPORT_STATUS_CHANGE_MASK ) { - for (int i = 0; i < OHCI_RHPORTS; i++) + for (int i = 0; i < TUP_OHCI_RHPORTS; i++) { uint32_t const rhport_status = OHCI_REG->rhport_status[i] & RHPORT_ALL_CHANGE_MASK; if ( rhport_status & RHPORT_CONNECT_STATUS_CHANGE_MASK ) diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h index b7706b636..38c258e80 100644 --- a/src/portable/ohci/ohci.h +++ b/src/portable/ohci/ohci.h @@ -267,7 +267,7 @@ typedef volatile struct }; union { - uint32_t rhport_status[OHCI_RHPORTS]; + uint32_t rhport_status[TUP_OHCI_RHPORTS]; struct { uint32_t current_connect_status : 1; uint32_t port_enable_status : 1; @@ -284,11 +284,11 @@ typedef volatile struct uint32_t port_over_current_indicator_change : 1; uint32_t port_reset_status_change : 1; uint32_t TU_RESERVED : 11; - }rhport_status_bit[OHCI_RHPORTS]; + }rhport_status_bit[TUP_OHCI_RHPORTS]; }; }ohci_registers_t; -TU_VERIFY_STATIC( sizeof(ohci_registers_t) == (0x54 + (4 * OHCI_RHPORTS)), "size is not correct"); +TU_VERIFY_STATIC( sizeof(ohci_registers_t) == (0x54 + (4 * TUP_OHCI_RHPORTS)), "size is not correct"); #ifdef __cplusplus } -- cgit v1.3.1 From 498989ee009c388a770e7a312ae04d0a51ba745a Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 22 Feb 2023 16:23:40 +0700 Subject: use tu_static instead of static _fuzz_thread --- src/class/cdc/cdc_device.c | 2 +- src/class/dfu/dfu_device.c | 14 +++++++------- src/class/hid/hid_device.c | 2 +- src/class/msc/msc_device.c | 8 ++++---- src/class/net/ecm_rndis_device.c | 14 +++++++------- src/class/net/ncm_device.c | 12 ++++++------ src/class/usbtmc/usbtmc_device.c | 8 ++++---- src/class/vendor/vendor_device.c | 2 +- src/class/video/video_device.c | 8 ++++---- src/common/tusb_compiler.h | 4 ++-- src/common/tusb_debug.h | 2 +- src/common/tusb_types.h | 4 ++-- src/device/usbd.c | 18 +++++++++--------- src/device/usbd_control.c | 4 ++-- test/fuzz/dcd_fuzz.cc | 2 +- test/fuzz/device/msc/src/usb_descriptors.cc | 4 ++-- test/fuzz/device/net/src/usb_descriptors.cc | 4 ++-- 17 files changed, 56 insertions(+), 56 deletions(-) (limited to 'src/common') diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c index 59ed2a74c..f372fe462 100644 --- a/src/class/cdc/cdc_device.c +++ b/src/class/cdc/cdc_device.c @@ -76,7 +76,7 @@ typedef struct //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION static _fuzz_thread cdcd_interface_t _cdcd_itf[CFG_TUD_CDC]; +CFG_TUSB_MEM_SECTION tu_static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC]; static bool _prep_out_transaction (cdcd_interface_t* p_cdc) { diff --git a/src/class/dfu/dfu_device.c b/src/class/dfu/dfu_device.c index 9e7b8b5b1..464c4bd6b 100644 --- a/src/class/dfu/dfu_device.c +++ b/src/class/dfu/dfu_device.c @@ -56,7 +56,7 @@ typedef struct } dfu_state_ctx_t; // Only a single dfu state is allowed -CFG_TUSB_MEM_SECTION static _fuzz_thread dfu_state_ctx_t _dfu_ctx; +CFG_TUSB_MEM_SECTION tu_static dfu_state_ctx_t _dfu_ctx; static void reset_state(void) { @@ -74,7 +74,7 @@ static bool process_manifest_get_status(uint8_t rhport, uint8_t stage, tusb_cont //--------------------------------------------------------------------+ #if CFG_TUSB_DEBUG >= 2 -static _fuzz_thread tu_lookup_entry_t const _dfu_request_lookup[] = +tu_static tu_lookup_entry_t const _dfu_request_lookup[] = { { .key = DFU_REQUEST_DETACH , .data = "DETACH" }, { .key = DFU_REQUEST_DNLOAD , .data = "DNLOAD" }, @@ -85,13 +85,13 @@ static _fuzz_thread tu_lookup_entry_t const _dfu_request_lookup[] = { .key = DFU_REQUEST_ABORT , .data = "ABORT" }, }; -static _fuzz_thread tu_lookup_table_t const _dfu_request_table = +tu_static tu_lookup_table_t const _dfu_request_table = { .count = TU_ARRAY_SIZE(_dfu_request_lookup), .items = _dfu_request_lookup }; -static _fuzz_thread tu_lookup_entry_t const _dfu_state_lookup[] = +tu_static tu_lookup_entry_t const _dfu_state_lookup[] = { { .key = APP_IDLE , .data = "APP_IDLE" }, { .key = APP_DETACH , .data = "APP_DETACH" }, @@ -106,13 +106,13 @@ static _fuzz_thread tu_lookup_entry_t const _dfu_state_lookup[] = { .key = DFU_ERROR , .data = "ERROR" }, }; -static _fuzz_thread tu_lookup_table_t const _dfu_state_table = +tu_static tu_lookup_table_t const _dfu_state_table = { .count = TU_ARRAY_SIZE(_dfu_state_lookup), .items = _dfu_state_lookup }; -static _fuzz_thread tu_lookup_entry_t const _dfu_status_lookup[] = +tu_static tu_lookup_entry_t const _dfu_status_lookup[] = { { .key = DFU_STATUS_OK , .data = "OK" }, { .key = DFU_STATUS_ERR_TARGET , .data = "errTARGET" }, @@ -132,7 +132,7 @@ static _fuzz_thread tu_lookup_entry_t const _dfu_status_lookup[] = { .key = DFU_STATUS_ERR_STALLEDPKT , .data = "errSTALLEDPKT" }, }; -static _fuzz_thread tu_lookup_table_t const _dfu_status_table = +tu_static tu_lookup_table_t const _dfu_status_table = { .count = TU_ARRAY_SIZE(_dfu_status_lookup), .items = _dfu_status_lookup diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c index 6fae5862d..ef44585f9 100644 --- a/src/class/hid/hid_device.c +++ b/src/class/hid/hid_device.c @@ -58,7 +58,7 @@ typedef struct tusb_hid_descriptor_hid_t const * hid_descriptor; } hidd_interface_t; -CFG_TUSB_MEM_SECTION static _fuzz_thread hidd_interface_t _hidd_itf[CFG_TUD_HID]; +CFG_TUSB_MEM_SECTION tu_static hidd_interface_t _hidd_itf[CFG_TUD_HID]; /*------------- Helpers -------------*/ static inline uint8_t get_index_by_itfnum(uint8_t itf_num) diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index e77342777..d3c8124df 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -71,8 +71,8 @@ typedef struct uint8_t add_sense_qualifier; }mscd_interface_t; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread mscd_interface_t _mscd_itf; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread uint8_t _mscd_buf[CFG_TUD_MSC_EP_BUFSIZE]; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static mscd_interface_t _mscd_itf; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static uint8_t _mscd_buf[CFG_TUD_MSC_EP_BUFSIZE]; //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION @@ -202,7 +202,7 @@ uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw) //--------------------------------------------------------------------+ #if CFG_TUSB_DEBUG >= 2 -TU_ATTR_UNUSED static _fuzz_thread tu_lookup_entry_t const _msc_scsi_cmd_lookup[] = +TU_ATTR_UNUSED tu_static tu_lookup_entry_t const _msc_scsi_cmd_lookup[] = { { .key = SCSI_CMD_TEST_UNIT_READY , .data = "Test Unit Ready" }, { .key = SCSI_CMD_INQUIRY , .data = "Inquiry" }, @@ -217,7 +217,7 @@ TU_ATTR_UNUSED static _fuzz_thread tu_lookup_entry_t const _msc_scsi_cmd_lookup[ { .key = SCSI_CMD_WRITE_10 , .data = "Write10" } }; -TU_ATTR_UNUSED static _fuzz_thread tu_lookup_table_t const _msc_scsi_cmd_table = +TU_ATTR_UNUSED tu_static tu_lookup_table_t const _msc_scsi_cmd_table = { .count = TU_ARRAY_SIZE(_msc_scsi_cmd_lookup), .items = _msc_scsi_cmd_lookup diff --git a/src/class/net/ecm_rndis_device.c b/src/class/net/ecm_rndis_device.c index e2a57cb50..a072bfd79 100644 --- a/src/class/net/ecm_rndis_device.c +++ b/src/class/net/ecm_rndis_device.c @@ -61,10 +61,10 @@ typedef struct #define CFG_TUD_NET_PACKET_PREFIX_LEN sizeof(rndis_data_packet_t) #define CFG_TUD_NET_PACKET_SUFFIX_LEN 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static uint8_t received[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN]; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static uint8_t transmitted[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN]; struct ecm_notify_struct @@ -73,7 +73,7 @@ struct ecm_notify_struct uint32_t downlink, uplink; }; -static _fuzz_thread const struct ecm_notify_struct ecm_notify_nc = +tu_static const struct ecm_notify_struct ecm_notify_nc = { .header = { .bmRequestType = 0xA1, @@ -83,7 +83,7 @@ static _fuzz_thread const struct ecm_notify_struct ecm_notify_nc = }, }; -static _fuzz_thread const struct ecm_notify_struct ecm_notify_csc = +tu_static const struct ecm_notify_struct ecm_notify_csc = { .header = { .bmRequestType = 0xA1, @@ -95,7 +95,7 @@ static _fuzz_thread const struct ecm_notify_struct ecm_notify_csc = }; // TODO remove CFG_TUSB_MEM_SECTION, control internal buffer is already in this special section -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread union +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static union { uint8_t rndis_buf[120]; struct ecm_notify_struct ecm_buf; @@ -105,9 +105,9 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread union // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ // TODO remove CFG_TUSB_MEM_SECTION -CFG_TUSB_MEM_SECTION static _fuzz_thread netd_interface_t _netd_itf; +CFG_TUSB_MEM_SECTION tu_static netd_interface_t _netd_itf; -static _fuzz_thread bool can_xmit; +tu_static bool can_xmit; void tud_network_recv_renew(void) { diff --git a/src/class/net/ncm_device.c b/src/class/net/ncm_device.c index b8a5c6d3a..aa13c9535 100644 --- a/src/class/net/ncm_device.c +++ b/src/class/net/ncm_device.c @@ -130,7 +130,7 @@ typedef struct // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread const ntb_parameters_t ntb_parameters = { +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static const ntb_parameters_t ntb_parameters = { .wLength = sizeof(ntb_parameters_t), .bmNtbFormatsSupported = 0x01, .dwNtbInMaxSize = CFG_TUD_NCM_IN_NTB_MAX_SIZE, @@ -145,11 +145,11 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread const ntb_parameters .wNtbOutMaxDatagrams = 0 }; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread transmit_ntb_t transmit_ntb[2]; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static transmit_ntb_t transmit_ntb[2]; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread uint8_t receive_ntb[CFG_TUD_NCM_OUT_NTB_MAX_SIZE]; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static uint8_t receive_ntb[CFG_TUD_NCM_OUT_NTB_MAX_SIZE]; -static _fuzz_thread ncm_interface_t ncm_interface; +tu_static ncm_interface_t ncm_interface; /* * Set up the NTB state in ncm_interface to be ready to add datagrams. @@ -196,7 +196,7 @@ static void ncm_start_tx(void) { ncm_prepare_for_tx(); } -static _fuzz_thread struct ecm_notify_struct ncm_notify_connected = +tu_static struct ecm_notify_struct ncm_notify_connected = { .header = { .bmRequestType_bit = { @@ -210,7 +210,7 @@ static _fuzz_thread struct ecm_notify_struct ncm_notify_connected = }, }; -static _fuzz_thread struct ecm_notify_struct ncm_notify_speed_change = +tu_static struct ecm_notify_struct ncm_notify_speed_change = { .header = { .bmRequestType_bit = { diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c index 416cb9bb9..a4e6eaeb3 100644 --- a/src/class/usbtmc/usbtmc_device.c +++ b/src/class/usbtmc/usbtmc_device.c @@ -78,7 +78,7 @@ #ifdef xDEBUG #include "uart_util.h" -static _fuzz_thread char logMsg[150]; +tu_static char logMsg[150]; #endif // Buffer size must be an exact multiple of the max packet size for both @@ -143,7 +143,7 @@ typedef struct usbtmc_capabilities_specific_t const * capabilities; } usbtmc_interface_state_t; -CFG_TUSB_MEM_SECTION static _fuzz_thread usbtmc_interface_state_t usbtmc_state = +CFG_TUSB_MEM_SECTION tu_static usbtmc_interface_state_t usbtmc_state = { .itf_id = 0xFF, }; @@ -154,8 +154,8 @@ TU_VERIFY_STATIC(USBTMCD_BUFFER_SIZE >= 32u,"USBTMC dev buffer size too small"); static bool handle_devMsgOutStart(uint8_t rhport, void *data, size_t len); static bool handle_devMsgOut(uint8_t rhport, void *data, size_t len, size_t packetLen); -static _fuzz_thread uint8_t termChar; -static _fuzz_thread uint8_t termCharRequested = false; +tu_static uint8_t termChar; +tu_static uint8_t termCharRequested = false; #if OSAL_MUTEX_REQUIRED static OSAL_MUTEX_DEF(usbtmcLockBuffer); diff --git a/src/class/vendor/vendor_device.c b/src/class/vendor/vendor_device.c index 22124d193..d07bd75ec 100644 --- a/src/class/vendor/vendor_device.c +++ b/src/class/vendor/vendor_device.c @@ -59,7 +59,7 @@ typedef struct CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_VENDOR_EPSIZE]; } vendord_interface_t; -CFG_TUSB_MEM_SECTION static _fuzz_thread vendord_interface_t _vendord_itf[CFG_TUD_VENDOR]; +CFG_TUSB_MEM_SECTION tu_static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR]; #define ITF_MEM_RESET_SIZE offsetof(vendord_interface_t, rx_ff) diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index ecee73d51..02a490aee 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -125,11 +125,11 @@ typedef struct TU_ATTR_PACKED { //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION static _fuzz_thread videod_interface_t _videod_itf[CFG_TUD_VIDEO]; -CFG_TUSB_MEM_SECTION static _fuzz_thread videod_streaming_interface_t _videod_streaming_itf[CFG_TUD_VIDEO_STREAMING]; +CFG_TUSB_MEM_SECTION tu_static videod_interface_t _videod_itf[CFG_TUD_VIDEO]; +CFG_TUSB_MEM_SECTION tu_static videod_streaming_interface_t _videod_streaming_itf[CFG_TUD_VIDEO_STREAMING]; -static _fuzz_thread uint8_t const _cap_get = 0x1u; /* support for GET */ -static _fuzz_thread uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */ +tu_static uint8_t const _cap_get = 0x1u; /* support for GET */ +tu_static uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */ /** Get interface number from the interface descriptor * diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 3eb6b41f7..30478ba6d 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -63,9 +63,9 @@ /* --------------------- Fuzzing types -------------------------------------- */ #ifdef _FUZZ - #define _fuzz_thread __thread + #define tu_static static __thread #else - #define _fuzz_thread + #define tu_static static #endif // for declaration of reserved field, make use of _TU_COUNTER_ diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index e5f718f79..82f682043 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -114,7 +114,7 @@ typedef struct static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key) { - static _fuzz_thread char not_found[11]; + tu_static char not_found[11]; for(uint16_t i=0; icount; i++) { diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 14d4365a0..7266a525e 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -529,13 +529,13 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpo #if CFG_TUSB_DEBUG TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_dir_str(tusb_dir_t dir) { - static _fuzz_thread const char *str[] = {"out", "in"}; + tu_static const char *str[] = {"out", "in"}; return str[dir]; } TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_t t) { - static _fuzz_thread const char *str[] = {"control", "isochronous", "bulk", "interrupt"}; + tu_static const char *str[] = {"control", "isochronous", "bulk", "interrupt"}; return str[t]; } #endif diff --git a/src/device/usbd.c b/src/device/usbd.c index 3176239e7..384daccb8 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -76,7 +76,7 @@ typedef struct }usbd_device_t; -static _fuzz_thread usbd_device_t _usbd_dev; +tu_static usbd_device_t _usbd_dev; //--------------------------------------------------------------------+ // Class Driver @@ -88,7 +88,7 @@ static _fuzz_thread usbd_device_t _usbd_dev; #endif // Built-in class drivers -static _fuzz_thread usbd_class_driver_t const _usbd_driver[] = +tu_static usbd_class_driver_t const _usbd_driver[] = { #if CFG_TUD_CDC { @@ -238,8 +238,8 @@ static _fuzz_thread usbd_class_driver_t const _usbd_driver[] = enum { BUILTIN_DRIVER_COUNT = TU_ARRAY_SIZE(_usbd_driver) }; // Additional class drivers implemented by application -static _fuzz_thread usbd_class_driver_t const * _app_driver = NULL; -static _fuzz_thread uint8_t _app_driver_count = 0; +tu_static usbd_class_driver_t const * _app_driver = NULL; +tu_static uint8_t _app_driver_count = 0; // virtually joins built-in and application drivers together. // Application is positioned first to allow overwriting built-in ones. @@ -265,17 +265,17 @@ static inline usbd_class_driver_t const * get_driver(uint8_t drvid) //--------------------------------------------------------------------+ enum { RHPORT_INVALID = 0xFFu }; -static _fuzz_thread uint8_t _usbd_rhport = RHPORT_INVALID; +tu_static uint8_t _usbd_rhport = RHPORT_INVALID; // Event queue // usbd_int_set() is used as mutex in OS NONE config OSAL_QUEUE_DEF(usbd_int_set, _usbd_qdef, CFG_TUD_TASK_QUEUE_SZ, dcd_event_t); -static _fuzz_thread osal_queue_t _usbd_q; +tu_static osal_queue_t _usbd_q; // Mutex for claiming endpoint #if OSAL_MUTEX_REQUIRED - static _fuzz_thread osal_mutex_def_t _ubsd_mutexdef; - static _fuzz_thread osal_mutex_t _usbd_mutex; + tu_static osal_mutex_def_t _ubsd_mutexdef; + tu_static osal_mutex_t _usbd_mutex; #else #define _usbd_mutex NULL #endif @@ -299,7 +299,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t event, // Debug //--------------------------------------------------------------------+ #if CFG_TUSB_DEBUG >= 2 -static _fuzz_thread char const* const _usbd_event_str[DCD_EVENT_COUNT] = +tu_static char const* const _usbd_event_str[DCD_EVENT_COUNT] = { "Invalid" , "Bus Reset" , diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c index 8b071d9c6..e709658b9 100644 --- a/src/device/usbd_control.c +++ b/src/device/usbd_control.c @@ -53,10 +53,10 @@ typedef struct usbd_control_xfer_cb_t complete_cb; } usbd_control_xfer_t; -static _fuzz_thread usbd_control_xfer_t _ctrl_xfer; +tu_static usbd_control_xfer_t _ctrl_xfer; CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN -static _fuzz_thread uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE]; +tu_static uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE]; //--------------------------------------------------------------------+ // Application API diff --git a/test/fuzz/dcd_fuzz.cc b/test/fuzz/dcd_fuzz.cc index 294977269..6403015dd 100644 --- a/test/fuzz/dcd_fuzz.cc +++ b/test/fuzz/dcd_fuzz.cc @@ -39,7 +39,7 @@ struct State { uint8_t address; }; -static _fuzz_thread State state = {false, 0, 0}; +tu_static State state = {false, 0, 0}; //--------------------------------------------------------------------+ // Controller API diff --git a/test/fuzz/device/msc/src/usb_descriptors.cc b/test/fuzz/device/msc/src/usb_descriptors.cc index 8f4be9655..efe4d0a3c 100644 --- a/test/fuzz/device/msc/src/usb_descriptors.cc +++ b/test/fuzz/device/msc/src/usb_descriptors.cc @@ -44,7 +44,7 @@ // Invoked when received GET DEVICE DESCRIPTOR // Application return pointer to descriptor uint8_t const *tud_descriptor_device_cb(void) { - static _fuzz_thread tusb_desc_device_t const desc_device = { + tu_static tusb_desc_device_t const desc_device = { .bLength = sizeof(tusb_desc_device_t), .bDescriptorType = TUSB_DESC_DEVICE, .bcdUSB = USB_BCD, @@ -184,7 +184,7 @@ char const *string_desc_arr[] = { }; -static _fuzz_thread uint16_t _desc_str[32]; +tu_static uint16_t _desc_str[32]; // Invoked when received GET STRING DESCRIPTOR request // Application return pointer to descriptor, whose contents must exist long diff --git a/test/fuzz/device/net/src/usb_descriptors.cc b/test/fuzz/device/net/src/usb_descriptors.cc index 903d49271..5597d49d5 100644 --- a/test/fuzz/device/net/src/usb_descriptors.cc +++ b/test/fuzz/device/net/src/usb_descriptors.cc @@ -45,7 +45,7 @@ // Invoked when received GET DEVICE DESCRIPTOR // Application return pointer to descriptor uint8_t const *tud_descriptor_device_cb(void) { - static _fuzz_thread tusb_desc_device_t const desc_device = { + tu_static tusb_desc_device_t const desc_device = { .bLength = sizeof(tusb_desc_device_t), .bDescriptorType = TUSB_DESC_DEVICE, .bcdUSB = USB_BCD, @@ -189,7 +189,7 @@ char const *string_desc_arr[] = { "TinyUSB CDC", // 4: CDC Interface }; -static _fuzz_thread uint16_t _desc_str[32]; +tu_static uint16_t _desc_str[32]; // Invoked when received GET STRING DESCRIPTOR request // Application return pointer to descriptor, whose contents must exist long -- cgit v1.3.1 From 1466afafeb927621f9cbb6efd2a0d7e4b6cf8d41 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 22 Feb 2023 22:14:50 +0700 Subject: move and add optional tusb_app_virt_to_phys/tusb_app_phys_to_virt also add place holder for tusb_app_dcache_flush() and tusb_app_dcache_invalidate() --- src/common/tusb_common.h | 15 +++++++++++++++ src/common/tusb_mcu.h | 4 ++-- src/host/hcd.h | 2 +- src/osal/osal_none.h | 4 ++++ src/portable/ohci/ohci.c | 21 +++++++++++++-------- src/portable/ohci/ohci.h | 4 +++- 6 files changed, 38 insertions(+), 12 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index b1ee40a1a..270339cca 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -75,6 +75,21 @@ #include "tusb_timeout.h" // TODO remove +//--------------------------------------------------------------------+ +// Optional API implemented by application if needed +// TODO move to a more ovious place/file +//--------------------------------------------------------------------+ + +// flush data cache +TU_ATTR_WEAK extern void tusb_app_dcache_flush(uintptr_t addr, uint32_t data_size); + +// invalidate data cache +TU_ATTR_WEAK extern void tusb_app_dcache_invalidate(uintptr_t addr, uint32_t data_size); + +// Optional physical <-> virtual address translation +TU_ATTR_WEAK extern void* tusb_app_virt_to_phys(void *virt_addr); +TU_ATTR_WEAK extern void* tusb_app_phys_to_virt(void *phys_addr); + //--------------------------------------------------------------------+ // Internal Inline Functions //--------------------------------------------------------------------+ diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index a599c4fe9..e7d4e2c32 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -28,8 +28,8 @@ #define TUSB_MCU_H_ //--------------------------------------------------------------------+ -// Port Specific -// TUP stand for TinyUSB Port (can be renamed) +// Port/Platform Specific +// TUP stand for TinyUSB Port/Platform (can be renamed) //--------------------------------------------------------------------+ //------------- Unaligned Memory Access -------------// diff --git a/src/host/hcd.h b/src/host/hcd.h index deebc59d4..a400626e4 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -106,7 +106,7 @@ typedef struct // Controller API //--------------------------------------------------------------------+ -// optional hcd configuration, called by tuh_config() +// optional hcd configuration, called by tuh_configure() bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) TU_ATTR_WEAK; // Initialize controller to host mode diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h index 1ad130557..2e2b3c7ce 100644 --- a/src/osal/osal_none.h +++ b/src/osal/osal_none.h @@ -35,6 +35,10 @@ // TASK API //--------------------------------------------------------------------+ +#if CFG_TUH_ENABLED +// currently only needed/available in host mode +void osal_task_delay(uint32_t msec); +#endif //--------------------------------------------------------------------+ // Binary Semaphore API diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c index 792ef65ff..339f8e896 100644 --- a/src/portable/ohci/ohci.c +++ b/src/portable/ohci/ohci.c @@ -162,18 +162,16 @@ static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr); // USBH-HCD API //--------------------------------------------------------------------+ -//If your system requires separation of virtual and physical memory, implement -//tuh_get_phys_addr and tuh_get_virt_addr in your application. -TU_ATTR_WEAK void *tuh_get_phys_addr(void *virtual_address); -TU_ATTR_WEAK void *tuh_get_virt_addr(void *physical_address); -TU_ATTR_ALWAYS_INLINE static void *_phys_addr(void *virtual_address) +// If your system requires separation of virtual and physical memory, implement +// tusb_app_virt_to_phys and tusb_app_virt_to_phys in your application. +TU_ATTR_ALWAYS_INLINE static inline void *_phys_addr(void *virtual_address) { - if (tuh_get_phys_addr) return tuh_get_phys_addr(virtual_address); + if (tusb_app_virt_to_phys) return tusb_app_virt_to_phys(virtual_address); return virtual_address; } -TU_ATTR_ALWAYS_INLINE static void *_virt_addr(void *physical_address) +TU_ATTR_ALWAYS_INLINE static inline void *_virt_addr(void *physical_address) { - if (tuh_get_virt_addr) return tuh_get_virt_addr(physical_address); + if (tusb_app_phys_to_virt) return tusb_app_phys_to_virt(physical_address); return physical_address; } @@ -206,7 +204,13 @@ bool hcd_init(uint8_t rhport) { //Wait 20 ms. (Ref Usb spec 7.1.7.7) OHCI_REG->control_bit.hc_functional_state = OHCI_CONTROL_FUNCSTATE_RESUME; + +#if CFG_TUSB_OS != OPT_OS_NONE + // os_none implement task delay using usb frame counter which is not started yet + // therefore cause infinite delay. + // TODO find a way to delay in case of os none e.g __nop osal_task_delay(20); +#endif } // reset controller @@ -233,6 +237,7 @@ bool hcd_init(uint8_t rhport) OHCI_REG->control_bit.hc_functional_state = OHCI_CONTROL_FUNCSTATE_OPERATIONAL; // make HC's state to operational state TODO use this to suspend (save power) OHCI_REG->rh_status_bit.local_power_status_change = 1; // set global power for ports + osal_task_delay(OHCI_REG->rh_descriptorA_bit.power_on_to_good_time * 2); // Wait POTG after power up return true; diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h index 38c258e80..2081ffabb 100644 --- a/src/portable/ohci/ohci.h +++ b/src/portable/ohci/ohci.h @@ -58,7 +58,9 @@ typedef struct { TU_VERIFY_STATIC( sizeof(ohci_hcca_t) == 256, "size is not correct" ); -typedef struct { +// common link item for gtd and itd for list travel +// use as pointer only +typedef struct TU_ATTR_ALIGNED(16) { uint32_t reserved[2]; volatile uint32_t next; uint32_t reserved2; -- cgit v1.3.1 From 4caa6063b092de2a9efadb6a4ac247543662731f Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 22 Feb 2023 22:17:45 +0700 Subject: white space --- src/common/tusb_mcu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/common') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index e7d4e2c32..1f27afa4e 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -55,7 +55,7 @@ #elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) #define TUP_DCD_ENDPOINT_MAX 16 #define TUP_USBIP_OHCI - #define TUP_OHCI_RHPORTS 2 + #define TUP_OHCI_RHPORTS 2 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) // TODO USB0 has 6, USB1 has 4 -- cgit v1.3.1 From e34aeb5cf69315d2d7711f0a1d040a28492d026d Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 27 Feb 2023 09:11:35 +0700 Subject: minor clean up --- src/class/audio/audio_device.c | 2 +- src/class/hid/hid_device.c | 6 +++--- src/class/midi/midi_device.c | 2 +- src/class/msc/msc_device.c | 10 +++++----- src/common/tusb_common.h | 21 ++++++++++++++++++--- src/device/usbd_control.c | 2 +- src/tusb.c | 21 --------------------- 7 files changed, 29 insertions(+), 35 deletions(-) (limited to 'src/common') diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index 81df95139..de5a20d6d 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -2199,7 +2199,7 @@ bool tud_audio_buffer_and_schedule_control_xfer(uint8_t rhport, tusb_control_req if (len > _audiod_fct[func_id].ctrl_buf_sz) len = _audiod_fct[func_id].ctrl_buf_sz; // Copy into buffer - TU_VERIFY(tu_memcpy_s(_audiod_fct[func_id].ctrl_buf, sizeof(_audiod_fct[func_id].ctrl_buf), data, (size_t)len)==0); + TU_VERIFY(0 == tu_memcpy_s(_audiod_fct[func_id].ctrl_buf, sizeof(_audiod_fct[func_id].ctrl_buf), data, (size_t)len)); // Schedule transmit return tud_control_xfer(rhport, p_request, (void*)_audiod_fct[func_id].ctrl_buf, len); diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c index 40654eef9..37a22b609 100644 --- a/src/class/hid/hid_device.c +++ b/src/class/hid/hid_device.c @@ -93,11 +93,11 @@ bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const* report, u if (report_id) { p_hid->epin_buf[0] = report_id; - TU_VERIFY(tu_memcpy_s(p_hid->epin_buf+1, CFG_TUD_HID_EP_BUFSIZE-1, report, len)==0); + TU_VERIFY(0 == tu_memcpy_s(p_hid->epin_buf+1, CFG_TUD_HID_EP_BUFSIZE-1, report, len)); len++; }else { - TU_VERIFY(tu_memcpy_s(p_hid->epin_buf, CFG_TUD_HID_EP_BUFSIZE, report, len)==0); + TU_VERIFY(0 == tu_memcpy_s(p_hid->epin_buf, CFG_TUD_HID_EP_BUFSIZE, report, len)); } return usbd_edpt_xfer(rhport, p_hid->ep_in, p_hid->epin_buf, len); @@ -122,7 +122,7 @@ bool tud_hid_n_keyboard_report(uint8_t instance, uint8_t report_id, uint8_t modi if ( keycode ) { - TU_VERIFY(tu_memcpy_s(report.keycode, sizeof(report.keycode), keycode, sizeof(report.keycode))==0); + memcpy(report.keycode, keycode, sizeof(report.keycode)); }else { tu_memclr(report.keycode, 6); diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c index 0b52be181..92689dfb0 100644 --- a/src/class/midi/midi_device.c +++ b/src/class/midi/midi_device.c @@ -182,7 +182,7 @@ uint32_t tud_midi_n_stream_read(uint8_t itf, uint8_t cable_num, void* buffer, ui uint8_t const count = (uint8_t) tu_min32(stream->total - stream->index, bufsize); // Skip the header (1st byte) in the buffer - TU_VERIFY(tu_memcpy_s(buf8, bufsize, stream->buffer + 1 + stream->index, count)==0); + TU_VERIFY(0 == tu_memcpy_s(buf8, bufsize, stream->buffer + 1 + stream->index, count)); total_read += count; stream->index += count; diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index ed4a3e86c..ecc95377f 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -707,7 +707,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ read_capa10.block_size = tu_htonl(block_size); resplen = sizeof(read_capa10); - TU_VERIFY(tu_memcpy_s(buffer, bufsize, &read_capa10, (size_t) resplen)); + TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &read_capa10, (size_t) resplen)); } } break; @@ -741,7 +741,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ read_fmt_capa.block_size_u16 = tu_htons(block_size); resplen = sizeof(read_fmt_capa); - TU_VERIFY(tu_memcpy_s(buffer, bufsize, &read_fmt_capa, (size_t) resplen)==0); + TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &read_fmt_capa, (size_t) resplen)); } } break; @@ -764,7 +764,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ tud_msc_inquiry_cb(lun, inquiry_rsp.vendor_id, inquiry_rsp.product_id, inquiry_rsp.product_rev); resplen = sizeof(inquiry_rsp); - TU_VERIFY(tu_memcpy_s(buffer, bufsize, &inquiry_rsp, (size_t) resplen)==0); + TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &inquiry_rsp, (size_t) resplen)); } break; @@ -788,7 +788,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ mode_resp.write_protected = !writable; resplen = sizeof(mode_resp); - TU_VERIFY(tu_memcpy_s(buffer, bufsize, &mode_resp, (size_t) resplen)==0); + TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &mode_resp, (size_t) resplen)); } break; @@ -806,7 +806,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ sense_rsp.add_sense_qualifier = p_msc->add_sense_qualifier; resplen = sizeof(sense_rsp); - TU_VERIFY(tu_memcpy_s(buffer, bufsize, &sense_rsp, (size_t) resplen)==0); + TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &sense_rsp, (size_t) resplen)); // request sense callback could overwrite the sense data if (tud_msc_request_sense_cb) diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 78fdcfe36..3e5e1d427 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -84,11 +84,26 @@ #define tu_varclr(_var) tu_memclr(_var, sizeof(*(_var))) // This is a backport of memset_s from c11 -int32_t tu_memset_s(void *dest, size_t destsz, int ch, size_t count); +TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count) +{ + // TODO may check if desst and src is not NULL + if (count > destsz) { + return -1; + } + memset(dest, ch, count); + return 0; +} // This is a backport of memcpy_s from c11 -int32_t tu_memcpy_s(void *dest, size_t destsz, - const void * src, size_t count ); +TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, const void * src, size_t count ) +{ + // TODO may check if desst and src is not NULL + if (count > destsz) { + return -1; + } + memcpy(dest, src, count); + return 0; +} //------------- Bytes -------------// diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c index ce4ddab66..b8a200845 100644 --- a/src/device/usbd_control.c +++ b/src/device/usbd_control.c @@ -94,7 +94,7 @@ static bool _data_stage_xact(uint8_t rhport) { ep_addr = EDPT_CTRL_IN; if ( xact_len ) { - TU_VERIFY(tu_memcpy_s(_usbd_ctrl_buf, CFG_TUD_ENDPOINT0_SIZE, _ctrl_xfer.buffer, xact_len)==0); + TU_VERIFY(0 == tu_memcpy_s(_usbd_ctrl_buf, CFG_TUD_ENDPOINT0_SIZE, _ctrl_xfer.buffer, xact_len)); } } diff --git a/src/tusb.c b/src/tusb.c index c918b0248..8318e5275 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -24,7 +24,6 @@ * This file is part of the TinyUSB stack. */ -#include "common/tusb_common.h" #include "tusb_option.h" #if CFG_TUH_ENABLED || CFG_TUD_ENABLED @@ -487,23 +486,3 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent) #endif #endif // host or device enabled - -//--------------------------------------------------------------------+ -// Common -//--------------------------------------------------------------------+ - -int32_t tu_memset_s(void *dest, size_t destsz, int ch, size_t count) { - if (count > destsz) { - return -1; - } - memset(dest, ch, count); - return 0; -} - -int32_t tu_memcpy_s(void *dest, size_t destsz, const void *src, size_t count) { - if (count > destsz) { - return -1; - } - memcpy(dest, src, count); - return 0; -} \ No newline at end of file -- cgit v1.3.1 From 5d3084a714eaa16b04e222ac4dc965ef29499e06 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 1 Mar 2023 11:21:46 +0700 Subject: add TUP_USBIP_FSDEV and TUP_USBIP_FSDEV_STM32, clean up ifdef with stm32 --- src/class/audio/audio_device.c | 284 ++++++++++----------- src/common/tusb_mcu.h | 100 ++++++-- src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 34 +-- .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 19 +- 4 files changed, 227 insertions(+), 210 deletions(-) (limited to 'src/common') diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index 5bccc66b7..d9c873851 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -66,71 +66,41 @@ // Use ring buffer if it's available, some MCUs need extra RAM requirements #ifndef TUD_AUDIO_PREFER_RING_BUFFER -#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT -#define TUD_AUDIO_PREFER_RING_BUFFER 0 -#else -#define TUD_AUDIO_PREFER_RING_BUFFER 1 -#endif + #if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT + #define TUD_AUDIO_PREFER_RING_BUFFER 0 + #else + #define TUD_AUDIO_PREFER_RING_BUFFER 1 + #endif #endif // Linear buffer in case target MCU is not capable of handling a ring buffer FIFO e.g. no hardware buffer // is available or driver is would need to be changed dramatically // Only STM32 and dcd_transdimension use non-linear buffer for now -#if CFG_TUSB_MCU == OPT_MCU_STM32F0 || \ - CFG_TUSB_MCU == OPT_MCU_STM32F1 || \ - CFG_TUSB_MCU == OPT_MCU_STM32F2 || \ - CFG_TUSB_MCU == OPT_MCU_STM32F3 || \ - CFG_TUSB_MCU == OPT_MCU_STM32F4 || \ - CFG_TUSB_MCU == OPT_MCU_STM32F7 || \ - CFG_TUSB_MCU == OPT_MCU_STM32H7 || \ - CFG_TUSB_MCU == OPT_MCU_STM32L0 || \ - CFG_TUSB_MCU == OPT_MCU_STM32L1 || \ - CFG_TUSB_MCU == OPT_MCU_STM32L4 || \ - CFG_TUSB_MCU == OPT_MCU_STM32G4 || \ - CFG_TUSB_MCU == OPT_MCU_STM32WB || \ - CFG_TUSB_MCU == OPT_MCU_RX63X || \ - CFG_TUSB_MCU == OPT_MCU_RX65X || \ - CFG_TUSB_MCU == OPT_MCU_RX72N || \ - CFG_TUSB_MCU == OPT_MCU_GD32VF103 || \ - CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ - CFG_TUSB_MCU == OPT_MCU_LPC43XX || \ - CFG_TUSB_MCU == OPT_MCU_MIMXRT || \ +// dwc2 except esp32sx (since it may use dcd_esp32sx) +#if (defined(TUP_USBIP_DWC2) && !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)) || \ + defined(TUP_USBIP_FSDEV) || \ + CFG_TUSB_MCU == OPT_MCU_RX63X || \ + CFG_TUSB_MCU == OPT_MCU_RX65X || \ + CFG_TUSB_MCU == OPT_MCU_RX72N || \ + CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ + CFG_TUSB_MCU == OPT_MCU_LPC43XX || \ + CFG_TUSB_MCU == OPT_MCU_MIMXRT || \ CFG_TUSB_MCU == OPT_MCU_MSP432E4 -#if TUD_AUDIO_PREFER_RING_BUFFER -#define USE_LINEAR_BUFFER 0 -#else -#define USE_LINEAR_BUFFER 1 -#endif + #if TUD_AUDIO_PREFER_RING_BUFFER + #define USE_LINEAR_BUFFER 0 + #else + #define USE_LINEAR_BUFFER 1 + #endif #else -#define USE_LINEAR_BUFFER 1 -#endif - -#if defined(STM32F102x6) || defined(STM32F102xB) || \ - defined(STM32F103x6) || defined(STM32F103xB) || \ - defined(STM32F103xE) || defined(STM32F103xG) -#define STM32F1_FSDEV -#endif - -#if defined(STM32L412xx) || defined(STM32L422xx) || \ - defined(STM32L432xx) || defined(STM32L433xx) || \ - defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) -#define STM32L4_FSDEV + #define USE_LINEAR_BUFFER 1 #endif // Temporarily put the check here for stm32_fsdev -#if CFG_TUSB_MCU == OPT_MCU_STM32F0 || \ - CFG_TUSB_MCU == OPT_MCU_STM32F3 || \ - CFG_TUSB_MCU == OPT_MCU_STM32L0 || \ - CFG_TUSB_MCU == OPT_MCU_STM32L1 || \ - CFG_TUSB_MCU == OPT_MCU_STM32G4 || \ - CFG_TUSB_MCU == OPT_MCU_STM32WB || \ - (TU_CHECK_MCU(OPT_MCU_STM32F1) && defined(STM32F1_FSDEV)) || \ - (TU_CHECK_MCU(OPT_MCU_STM32L4) && defined(STM32L4_FSDEV)) -#define USE_ISO_EP_ALLOCATION 1 +#ifdef TUP_USBIP_FSDEV + #define USE_ISO_EP_ALLOCATION 1 #else -#define USE_ISO_EP_ALLOCATION 0 + #define USE_ISO_EP_ALLOCATION 0 #endif // Declaration of buffers @@ -142,143 +112,159 @@ // EP IN software buffers and mutexes #if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING -#if CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ]; -#if CFG_FIFO_MUTEX -osal_mutex_def_t ep_in_ff_mutex_wr_1; // No need for read mutex as only USB driver reads from FIFO -#endif -#endif // CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0 -#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ]; -#if CFG_FIFO_MUTEX -osal_mutex_def_t ep_in_ff_mutex_wr_2; // No need for read mutex as only USB driver reads from FIFO -#endif -#endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0 -#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ]; -#if CFG_FIFO_MUTEX -osal_mutex_def_t ep_in_ff_mutex_wr_3; // No need for read mutex as only USB driver reads from FIFO -#endif -#endif // CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ > 0 + #if CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ]; + #if CFG_FIFO_MUTEX + osal_mutex_def_t ep_in_ff_mutex_wr_1; // No need for read mutex as only USB driver reads from FIFO + #endif + #endif // CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0 + + #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ]; + #if CFG_FIFO_MUTEX + osal_mutex_def_t ep_in_ff_mutex_wr_2; // No need for read mutex as only USB driver reads from FIFO + #endif + #endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0 + + #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ]; + #if CFG_FIFO_MUTEX + osal_mutex_def_t ep_in_ff_mutex_wr_3; // No need for read mutex as only USB driver reads from FIFO + #endif + #endif // CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ > 0 #endif // CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING // Linear buffer TX in case: // - target MCU is not capable of handling a ring buffer FIFO e.g. no hardware buffer is available or driver is would need to be changed dramatically OR // - the software encoding is used - in this case the linear buffers serve as a target memory where logical channels are encoded into #if CFG_TUD_AUDIO_ENABLE_EP_IN && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_ENCODING) -#if CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX]; -#endif -#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX]; -#endif -#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX]; -#endif + #if CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX]; + #endif + + #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX]; + #endif + + #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX]; + #endif #endif // CFG_TUD_AUDIO_ENABLE_EP_IN && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING) // EP OUT software buffers and mutexes #if CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING -#if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ]; -#if CFG_FIFO_MUTEX -osal_mutex_def_t ep_out_ff_mutex_rd_1; // No need for write mutex as only USB driver writes into FIFO -#endif -#endif // CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0 -#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ]; -#if CFG_FIFO_MUTEX -osal_mutex_def_t ep_out_ff_mutex_rd_2; // No need for write mutex as only USB driver writes into FIFO -#endif -#endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0 -#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ]; -#if CFG_FIFO_MUTEX -osal_mutex_def_t ep_out_ff_mutex_rd_3; // No need for write mutex as only USB driver writes into FIFO -#endif -#endif // CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0 + #if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ]; + #if CFG_FIFO_MUTEX + osal_mutex_def_t ep_out_ff_mutex_rd_1; // No need for write mutex as only USB driver writes into FIFO + #endif + #endif // CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0 + + #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ]; + #if CFG_FIFO_MUTEX + osal_mutex_def_t ep_out_ff_mutex_rd_2; // No need for write mutex as only USB driver writes into FIFO + #endif + #endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0 + + #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ]; + #if CFG_FIFO_MUTEX + osal_mutex_def_t ep_out_ff_mutex_rd_3; // No need for write mutex as only USB driver writes into FIFO + #endif + #endif // CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0 #endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING // Linear buffer RX in case: // - target MCU is not capable of handling a ring buffer FIFO e.g. no hardware buffer is available or driver is would need to be changed dramatically OR // - the software encoding is used - in this case the linear buffers serve as a target memory where logical channels are encoded into #if CFG_TUD_AUDIO_ENABLE_EP_OUT && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING) -#if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX]; -#endif -#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX]; -#endif -#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX]; -#endif + #if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX]; + #endif + + #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX]; + #endif + + #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX]; + #endif #endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING) // Control buffers CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_1[CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ]; + #if CFG_TUD_AUDIO > 1 CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_2[CFG_TUD_AUDIO_FUNC_2_CTRL_BUF_SZ]; #endif + #if CFG_TUD_AUDIO > 2 CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_3[CFG_TUD_AUDIO_FUNC_3_CTRL_BUF_SZ]; #endif // Active alternate setting of interfaces uint8_t alt_setting_1[CFG_TUD_AUDIO_FUNC_1_N_AS_INT]; + #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_N_AS_INT > 0 uint8_t alt_setting_2[CFG_TUD_AUDIO_FUNC_2_N_AS_INT]; #endif + #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_N_AS_INT > 0 uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT]; #endif // Software encoding/decoding support FIFOs #if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING -#if CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ]; -tu_fifo_t tx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO]; -#if CFG_FIFO_MUTEX -osal_mutex_def_t tx_supp_ff_mutex_wr_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO -#endif -#endif -#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ]; -tu_fifo_t tx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO]; -#if CFG_FIFO_MUTEX -osal_mutex_def_t tx_supp_ff_mutex_wr_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO -#endif -#endif -#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ]; -tu_fifo_t tx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO]; -#if CFG_FIFO_MUTEX -osal_mutex_def_t tx_supp_ff_mutex_wr_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO -#endif -#endif + #if CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ]; + tu_fifo_t tx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO]; + #if CFG_FIFO_MUTEX + osal_mutex_def_t tx_supp_ff_mutex_wr_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO + #endif + #endif + + #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ]; + tu_fifo_t tx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO]; + #if CFG_FIFO_MUTEX + osal_mutex_def_t tx_supp_ff_mutex_wr_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO + #endif + #endif + + #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ]; + tu_fifo_t tx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO]; + #if CFG_FIFO_MUTEX + osal_mutex_def_t tx_supp_ff_mutex_wr_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO + #endif + #endif #endif #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING -#if CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ]; -tu_fifo_t rx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO]; -#if CFG_FIFO_MUTEX -osal_mutex_def_t rx_supp_ff_mutex_rd_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO -#endif -#endif -#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ]; -tu_fifo_t rx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO]; -#if CFG_FIFO_MUTEX -osal_mutex_def_t rx_supp_ff_mutex_rd_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO -#endif -#endif -#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ > 0 -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ]; -tu_fifo_t rx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO]; -#if CFG_FIFO_MUTEX -osal_mutex_def_t rx_supp_ff_mutex_rd_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO -#endif -#endif + #if CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ]; + tu_fifo_t rx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO]; + #if CFG_FIFO_MUTEX + osal_mutex_def_t rx_supp_ff_mutex_rd_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO + #endif + #endif + + #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ]; + tu_fifo_t rx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO]; + #if CFG_FIFO_MUTEX + osal_mutex_def_t rx_supp_ff_mutex_rd_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO + #endif + #endif + + #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ > 0 + CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ]; + tu_fifo_t rx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO]; + #if CFG_FIFO_MUTEX + osal_mutex_def_t rx_supp_ff_mutex_rd_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO + #endif + #endif #endif typedef struct diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 1f27afa4e..257d08a85 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -48,7 +48,9 @@ * - RHPORT_HIGHSPEED: support highspeed with on-chip PHY */ -//------------- NXP -------------// +//--------------------------------------------------------------------+ +// NXP +//--------------------------------------------------------------------+ #if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) #define TUP_DCD_ENDPOINT_MAX 5 @@ -89,12 +91,16 @@ #elif TU_CHECK_MCU(OPT_MCU_MM32F327X) #define TUP_DCD_ENDPOINT_MAX 16 -//------------- Nordic -------------// +//--------------------------------------------------------------------+ +// Nordic +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_NRF5X) // 8 CBI + 1 ISO #define TUP_DCD_ENDPOINT_MAX 9 -//------------- Microchip -------------// +//--------------------------------------------------------------------+ +// Microchip +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \ TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22) #define TUP_DCD_ENDPOINT_MAX 8 @@ -117,19 +123,30 @@ #define TUP_DCD_ENDPOINT_MAX 16 #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER -//------------- ST -------------// +//--------------------------------------------------------------------+ +// ST +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_STM32F0) + #define TUP_USBIP_FSDEV + #define TUP_USBIP_FSDEV_STM32 #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32F1) + // - F102, F103 use fsdev + // - F105, F107 use dwc2 #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \ defined (STM32F107xB) || defined (STM32F107xC) #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_STM32 #define TUP_DCD_ENDPOINT_MAX 4 - #else + #elif defined(STM32F102x6) || defined(STM32F102xB) || \ + defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) + #define TUP_USBIP_FSDEV + #define TUP_USBIP_FSDEV_STM32 #define TUP_DCD_ENDPOINT_MAX 8 + #else + #error "Unsupported STM32F1 mcu" #endif #elif TU_CHECK_MCU(OPT_MCU_STM32F2) @@ -140,6 +157,8 @@ #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_STM32F3) + #define TUP_USBIP_FSDEV + #define TUP_USBIP_FSDEV_STM32 #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32F4) @@ -168,12 +187,18 @@ #define TUP_DCD_ENDPOINT_MAX 9 #elif TU_CHECK_MCU(OPT_MCU_STM32G4) + #define TUP_USBIP_FSDEV + #define TUP_USBIP_FSDEV_STM32 #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1) + #define TUP_USBIP_FSDEV + #define TUP_USBIP_FSDEV_STM32 #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32L4) + // - L4x2, L4x3 use fsdev + // - L4x4, L4x6, L4x7, L4x9 use dwc2 #if defined (STM32L475xx) || defined (STM32L476xx) || \ defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \ defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \ @@ -183,11 +208,18 @@ #define TUP_USBIP_DWC2_STM32 #define TUP_DCD_ENDPOINT_MAX 6 - #else + #elif defined(STM32L412xx) || defined(STM32L422xx) || defined(STM32L432xx) || defined(STM32L433xx) || \ + defined(STM32L442xx) || defined(STM32L443xx) || defined(STM32L452xx) || defined(STM32L462xx) + #define TUP_USBIP_FSDEV + #define TUP_USBIP_FSDEV_STM32 #define TUP_DCD_ENDPOINT_MAX 8 + #else + #error "Unsupported STM32L4 mcu" #endif #elif TU_CHECK_MCU(OPT_MCU_STM32WB) + #define TUP_USBIP_FSDEV + #define TUP_USBIP_FSDEV_STM32 #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32U5) @@ -195,24 +227,32 @@ #define TUP_USBIP_DWC2_STM32 #define TUP_DCD_ENDPOINT_MAX 6 -//------------- Sony -------------// +//--------------------------------------------------------------------+ +// Sony +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_CXD56) #define TUP_DCD_ENDPOINT_MAX 7 #define TUP_RHPORT_HIGHSPEED 1 #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER -//------------- TI -------------// +//--------------------------------------------------------------------+ +// TI +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx) #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129) #define TUP_DCD_ENDPOINT_MAX 8 -//------------- ValentyUSB -------------// +//--------------------------------------------------------------------+ +// ValentyUSB (Litex) +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI) #define TUP_DCD_ENDPOINT_MAX 16 -//------------- Nuvoton -------------// +//--------------------------------------------------------------------+ +// Nuvoton +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126) #define TUP_DCD_ENDPOINT_MAX 8 @@ -223,47 +263,65 @@ #define TUP_DCD_ENDPOINT_MAX 12 #define TUP_RHPORT_HIGHSPEED 1 -//------------- Espressif -------------// +//--------------------------------------------------------------------+ +// Espressif +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) #define TUP_USBIP_DWC2 #define TUP_DCD_ENDPOINT_MAX 6 -//------------- Dialog -------------// +//--------------------------------------------------------------------+ +// Dialog +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_DA1469X) #define TUP_DCD_ENDPOINT_MAX 4 -//------------- Raspberry Pi -------------// +//--------------------------------------------------------------------+ +// Raspberry Pi +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_RP2040) #define TUP_DCD_ENDPOINT_MAX 16 #define TU_ATTR_FAST_FUNC __attribute__((section(".time_critical.tinyusb"))) -//------------- Silabs -------------// +//--------------------------------------------------------------------+ +// Silabs +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_EFM32GG) #define TUP_USBIP_DWC2 #define TUP_DCD_ENDPOINT_MAX 7 -//------------- Renesas -------------// +//--------------------------------------------------------------------+ +// Renesas +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) #define TUP_DCD_ENDPOINT_MAX 10 -//------------- GigaDevice -------------// +//--------------------------------------------------------------------+ +// GigaDevice +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_GD32VF103) #define TUP_USBIP_DWC2 #define TUP_DCD_ENDPOINT_MAX 4 -//------------- Broadcom -------------// +//--------------------------------------------------------------------+ +// Broadcom +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837) #define TUP_USBIP_DWC2 #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_RHPORT_HIGHSPEED 1 -//------------- Broadcom -------------// +//--------------------------------------------------------------------+ +// Infineon +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_XMC4000) #define TUP_USBIP_DWC2 #define TUP_DCD_ENDPOINT_MAX 8 -//------------- BridgeTek -------------// +//--------------------------------------------------------------------+ +// BridgeTek +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_FT90X) #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_RHPORT_HIGHSPEED 1 @@ -272,7 +330,9 @@ #define TUP_DCD_ENDPOINT_MAX 16 #define TUP_RHPORT_HIGHSPEED 1 -//------------ Allwinner -------------// +//--------------------------------------------------------------------+ +// Allwinner +//--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_F1C100S) #define TUP_DCD_ENDPOINT_MAX 4 diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index 78da9d0e5..e49c0b52e 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -101,32 +101,15 @@ #include "tusb_option.h" -#if defined(STM32F102x6) || defined(STM32F102xB) || \ - defined(STM32F103x6) || defined(STM32F103xB) || \ - defined(STM32F103xE) || defined(STM32F103xG) -#define STM32F1_FSDEV -#endif - -#if defined(STM32L412xx) || defined(STM32L422xx) || \ - defined(STM32L432xx) || defined(STM32L433xx) || \ - defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) -#define STM32L4_FSDEV -#endif - -#if CFG_TUD_ENABLED && \ - ( TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F3, OPT_MCU_STM32L0, OPT_MCU_STM32L1, OPT_MCU_STM32G4, OPT_MCU_STM32WB) || \ - (TU_CHECK_MCU(OPT_MCU_STM32F1) && defined(STM32F1_FSDEV)) || \ - (TU_CHECK_MCU(OPT_MCU_STM32L4) && defined(STM32L4_FSDEV)) \ - ) - -// In order to reduce the dependence on HAL, we undefine this. -// Some definitions are copied to our private include file. -#undef USE_HAL_DRIVER +#if CFG_TUD_ENABLED && defined(TUP_USBIP_FSDEV) #include "device/dcd.h" -#include "portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h" +#ifdef TUP_USBIP_FSDEV_STM32 + // Undefine to reduce the dependence on HAL + #undef USE_HAL_DRIVER + #include "portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h" +#endif /***************************************************** * Configuration @@ -153,10 +136,7 @@ */ TU_VERIFY_STATIC((MAX_EP_COUNT) <= STFSDEV_EP_COUNT, "Only 8 endpoints supported on the hardware"); - -TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) + (DCD_STM32_BTABLE_LENGTH))<=(PMA_LENGTH), - "BTABLE does not fit in PMA RAM"); - +TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) + (DCD_STM32_BTABLE_LENGTH))<=(PMA_LENGTH), "BTABLE does not fit in PMA RAM"); TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) % 8) == 0, "BTABLE base must be aligned to 8 bytes"); //--------------------------------------------------------------------+ diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h index 039fb13d2..015b177cf 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h @@ -1,12 +1,6 @@ /** - ****************************************************************************** - * @file dcd_stm32f0_pvt_st.h - * @brief DCD utilities from ST code - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2016 STMicroelectronics

- *

© parts COPYRIGHT(c) N Conrad

+ * Copyright(c) 2016 STMicroelectronics + * Copyright(c) N Conrad * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: @@ -30,7 +24,7 @@ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - **********/ + */ // This file contains source copied from ST's HAL, and thus should have their copyright statement. @@ -41,10 +35,7 @@ #ifndef PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ #define PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ -#if defined(STM32F042x6) || \ - defined(STM32F070x6) || defined(STM32F070xB) || \ - defined(STM32F072xB) || \ - defined(STM32F078xx) +#if CFG_TUSB_MCU == OPT_MCU_STM32F0 #include "stm32f0xx.h" #define PMA_LENGTH (1024u) // F0x2 models are crystal-less @@ -52,7 +43,7 @@ // 070RB: 2 x 16 bits/word memory LPM Support, BCD Support // PMA dedicated to USB (no sharing with CAN) -#elif defined(STM32F1_FSDEV) +#elif CFG_TUSB_MCU == OPT_MCU_STM32F1 #include "stm32f1xx.h" #define PMA_LENGTH (512u) // NO internal Pull-ups -- cgit v1.3.1 From 8ae4f8f0699351e5bba349ccb0fab65b557afed6 Mon Sep 17 00:00:00 2001 From: Hubert Denkmair Date: Wed, 8 Mar 2023 12:05:58 +0100 Subject: add basic STM32G0 support --- src/common/tusb_mcu.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/common') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 257d08a85..957df5e9e 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -191,6 +191,11 @@ #define TUP_USBIP_FSDEV_STM32 #define TUP_DCD_ENDPOINT_MAX 8 +#elif TU_CHECK_MCU(OPT_MCU_STM32G0) + #define TUP_USBIP_FSDEV + #define TUP_USBIP_FSDEV_STM32 + #define TUP_DCD_ENDPOINT_MAX 8 + #elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1) #define TUP_USBIP_FSDEV #define TUP_USBIP_FSDEV_STM32 -- cgit v1.3.1 From 317177c83d3c28d66bfe60be971ff37a44bd84df Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 14:06:25 +0700 Subject: update host example, add pio-pico-usb for rp2040 --- examples/host/bare_api/CMakeLists.txt | 5 +++++ examples/host/bare_api/src/tusb_config.h | 4 ++-- examples/host/cdc_msc_hid/CMakeLists.txt | 5 +++++ examples/host/cdc_msc_hid/src/tusb_config.h | 6 +++--- examples/host/hid_controller/CMakeLists.txt | 5 +++++ examples/host/hid_controller/src/tusb_config.h | 7 +++---- examples/host/msc_file_explorer/CMakeLists.txt | 4 ++++ examples/host/msc_file_explorer/src/tusb_config.h | 6 +++--- hw/bsp/rp2040/family.mk | 3 --- src/class/cdc/cdc_host.c | 8 ++++---- src/common/tusb_common.h | 6 ++++++ src/common/tusb_types.h | 5 ----- 12 files changed, 40 insertions(+), 24 deletions(-) (limited to 'src/common') diff --git a/examples/host/bare_api/CMakeLists.txt b/examples/host/bare_api/CMakeLists.txt index 4879613b4..616edd4ac 100644 --- a/examples/host/bare_api/CMakeLists.txt +++ b/examples/host/bare_api/CMakeLists.txt @@ -25,3 +25,8 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_host_example(${PROJECT}) + +# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host +if(FAMILY STREQUAL "rp2040") + family_add_pico_pio_usb(${PROJECT}) +endif() diff --git a/examples/host/bare_api/src/tusb_config.h b/examples/host/bare_api/src/tusb_config.h index 701aa6d90..64be41a4e 100644 --- a/examples/host/bare_api/src/tusb_config.h +++ b/examples/host/bare_api/src/tusb_config.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -100,7 +100,7 @@ // max device support (excluding hub device) // 1 hub typically has 4 ports -#define CFG_TUH_DEVICE_MAX (CFG_TUH_HUB ? 4 : 1) +#define CFG_TUH_DEVICE_MAX (3*CFG_TUH_HUB + 1) // Max endpoint per device #define CFG_TUH_ENDPOINT_MAX 8 diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt index dbba6bf44..d7d1a54d7 100644 --- a/examples/host/cdc_msc_hid/CMakeLists.txt +++ b/examples/host/cdc_msc_hid/CMakeLists.txt @@ -28,3 +28,8 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_host_example(${PROJECT}) + +# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host +if(FAMILY STREQUAL "rp2040") + family_add_pico_pio_usb(${PROJECT}) +endif() diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index 139a921d1..4b50f2096 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -101,8 +101,8 @@ #define CFG_TUH_MSC 1 #define CFG_TUH_VENDOR 0 -// max device support (excluding hub device) -#define CFG_TUH_DEVICE_MAX (CFG_TUH_HUB ? 4 : 1) // hub typically has 4 ports +// max device support (excluding hub device): 1 hub typically has 4 ports +#define CFG_TUH_DEVICE_MAX (3*CFG_TUH_HUB + 1) //------------- HID -------------// #define CFG_TUH_HID_EPIN_BUFSIZE 64 diff --git a/examples/host/hid_controller/CMakeLists.txt b/examples/host/hid_controller/CMakeLists.txt index aa50b5a52..ac3070b82 100644 --- a/examples/host/hid_controller/CMakeLists.txt +++ b/examples/host/hid_controller/CMakeLists.txt @@ -26,3 +26,8 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_host_example(${PROJECT}) + +# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host +if(FAMILY STREQUAL "rp2040") + family_add_pico_pio_usb(${PROJECT}) +endif() diff --git a/examples/host/hid_controller/src/tusb_config.h b/examples/host/hid_controller/src/tusb_config.h index e6d6f873d..2e0dd0dbe 100644 --- a/examples/host/hid_controller/src/tusb_config.h +++ b/examples/host/hid_controller/src/tusb_config.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -101,9 +101,8 @@ #define CFG_TUH_MSC 0 #define CFG_TUH_VENDOR 0 -// max device support (excluding hub device) -// 1 hub typically has 4 ports -#define CFG_TUH_DEVICE_MAX (CFG_TUH_HUB ? 4 : 1) +// max device support (excluding hub device): 1 hub typically has 4 ports +#define CFG_TUH_DEVICE_MAX (3*CFG_TUH_HUB + 1) //------------- HID -------------// diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt index 2c06eafee..7955b3078 100644 --- a/examples/host/msc_file_explorer/CMakeLists.txt +++ b/examples/host/msc_file_explorer/CMakeLists.txt @@ -32,3 +32,7 @@ target_include_directories(${PROJECT} PUBLIC # in hw/bsp/FAMILY/family.cmake for details. family_configure_host_example(${PROJECT}) +# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host +if(FAMILY STREQUAL "rp2040") + family_add_pico_pio_usb(${PROJECT}) +endif() diff --git a/examples/host/msc_file_explorer/src/tusb_config.h b/examples/host/msc_file_explorer/src/tusb_config.h index ddf8368f4..eaf3ea6d4 100644 --- a/examples/host/msc_file_explorer/src/tusb_config.h +++ b/examples/host/msc_file_explorer/src/tusb_config.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -101,8 +101,8 @@ #define CFG_TUH_HID 0 // typical keyboard + mouse device can have 3-4 HID interfaces #define CFG_TUH_VENDOR 0 -// max device support (excluding hub device) -#define CFG_TUH_DEVICE_MAX (CFG_TUH_HUB ? 4 : 1) // hub typically has 4 ports +// max device support (excluding hub device): 1 hub typically has 4 ports +#define CFG_TUH_DEVICE_MAX (3*CFG_TUH_HUB + 1) //------------- MSC -------------// #define CFG_TUH_MSC_MAXLUN 4 // typical for most card reader diff --git a/hw/bsp/rp2040/family.mk b/hw/bsp/rp2040/family.mk index cf6b53793..25d1ad9c5 100644 --- a/hw/bsp/rp2040/family.mk +++ b/hw/bsp/rp2040/family.mk @@ -13,9 +13,6 @@ $(BUILD): all: $(BUILD) $(MAKE) -C $(BUILD) -clean: - $(RM) -rf $(BUILD) - flash: flash-pyocd flash-uf2: @$(CP) $(BUILD)/$(PROJECT).uf2 /media/$(USER)/RPI-RP2 diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index e9c3d34cb..011ee49dc 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -97,7 +97,7 @@ static inline uint8_t get_idx_by_ep_addr(uint8_t daddr, uint8_t ep_addr) } } - return TUSB_INDEX_INVALID; + return TU_INDEX_INVALID_8; } @@ -124,7 +124,7 @@ uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num) if (p_cdc->daddr == daddr && p_cdc->bInterfaceNumber == itf_num) return i; } - return TUSB_INDEX_INVALID; + return TU_INDEX_INVALID_8; } bool tuh_cdc_itf_get_info(uint8_t idx, tuh_cdc_itf_info_t* info) @@ -533,7 +533,7 @@ static void process_cdc_config(tuh_xfer_t* xfer) uintptr_t const state = xfer->user_data; uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex); uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num); - TU_ASSERT(idx != TUSB_INDEX_INVALID, ); + TU_ASSERT(idx != TU_INDEX_INVALID_8, ); switch(state) { diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 957491aa9..faccf8726 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -75,6 +75,12 @@ #include "tusb_timeout.h" // TODO remove +enum +{ + TU_INDEX_INVALID_8 = 0xFFu +}; + + //--------------------------------------------------------------------+ // Optional API implemented by application if needed // TODO move to a more ovious place/file diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 7266a525e..d567bd482 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -273,11 +273,6 @@ enum CONTROL_STAGE_ACK }; -enum -{ - TUSB_INDEX_INVALID = 0xff -}; - //--------------------------------------------------------------------+ // USB Descriptors //--------------------------------------------------------------------+ -- cgit v1.3.1 From 3623ba1884ddff23e9b64766cb6dd032f1425846 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 17 Mar 2023 16:12:49 +0700 Subject: fix trailing space and new line temporarily disable codespell --- .gitattributes | 6 +- .github/ISSUE_TEMPLATE/bug_report.yml | 6 +- .github/workflows/trigger.yml | 4 +- .pre-commit-config.yaml | 10 +- .readthedocs.yaml | 1 - docs/assets/stack.svg | 2 +- docs/contributing/code_of_conduct.rst | 2 +- docs/info/changelog.rst | 54 +- docs/info/contributors.rst | 2 +- docs/reference/getting_started.rst | 14 +- examples/device/audio_4_channel_mic/skip.txt | 2 +- examples/device/audio_4_channel_mic/src/main.c | 2 +- .../audio_4_channel_mic/src/plot_audio_samples.py | 1 - .../audio_4_channel_mic/src/usb_descriptors.c | 2 +- examples/device/audio_test/CMakeLists.txt | 2 +- examples/device/audio_test/skip.txt | 2 +- examples/device/audio_test/src/main.c | 2 +- .../device/audio_test/src/plot_audio_samples.py | 3 +- examples/device/audio_test/src/usb_descriptors.c | 2 +- .../device/audio_test_multi_rate/CMakeLists.txt | 2 +- examples/device/audio_test_multi_rate/skip.txt | 2 +- examples/device/audio_test_multi_rate/src/main.c | 10 +- .../src/plot_audio_samples.py | 3 +- .../device/audio_test_multi_rate/src/tusb_config.h | 2 +- .../audio_test_multi_rate/src/usb_descriptors.c | 2 +- .../audio_test_multi_rate/src/usb_descriptors.h | 4 +- examples/device/board_test/src/CMakeLists.txt | 2 +- examples/device/board_test/src/main.c | 2 +- examples/device/cdc_dual_ports/CMakeLists.txt | 2 +- examples/device/cdc_dual_ports/src/main.c | 2 +- .../device/cdc_dual_ports/src/usb_descriptors.c | 2 +- examples/device/cdc_msc/CMakeLists.txt | 2 +- examples/device/cdc_msc/skip.txt | 2 +- examples/device/cdc_msc/src/main.c | 2 +- examples/device/cdc_msc/src/msc_disk.c | 2 +- examples/device/cdc_msc/src/usb_descriptors.c | 2 +- examples/device/cdc_msc_freertos/src/main.c | 2 +- examples/device/cdc_msc_freertos/src/msc_disk.c | 2 +- .../device/cdc_msc_freertos/src/usb_descriptors.c | 2 +- examples/device/dfu_runtime/CMakeLists.txt | 2 +- examples/device/dfu_runtime/src/main.c | 2 +- .../device/dynamic_configuration/CMakeLists.txt | 2 +- examples/device/dynamic_configuration/skip.txt | 2 +- examples/device/dynamic_configuration/src/main.c | 2 +- .../device/dynamic_configuration/src/msc_disk.c | 2 +- .../dynamic_configuration/src/usb_descriptors.c | 2 +- examples/device/hid_boot_interface/CMakeLists.txt | 2 +- examples/device/hid_boot_interface/Makefile | 2 +- examples/device/hid_boot_interface/src/main.c | 2 +- .../hid_boot_interface/src/usb_descriptors.c | 2 +- .../hid_boot_interface/src/usb_descriptors.h | 2 +- examples/device/hid_composite/CMakeLists.txt | 2 +- examples/device/hid_composite/src/main.c | 2 +- .../device/hid_composite/src/usb_descriptors.c | 2 +- .../device/hid_composite/src/usb_descriptors.h | 2 +- examples/device/hid_composite_freertos/src/main.c | 2 +- .../hid_composite_freertos/src/usb_descriptors.c | 2 +- .../hid_composite_freertos/src/usb_descriptors.h | 2 +- examples/device/hid_generic_inout/CMakeLists.txt | 2 +- examples/device/hid_generic_inout/hid_test.js | 3 +- examples/device/hid_generic_inout/src/main.c | 2 +- .../device/hid_generic_inout/src/usb_descriptors.c | 2 +- .../device/hid_multiple_interface/CMakeLists.txt | 2 +- examples/device/midi_test/CMakeLists.txt | 2 +- examples/device/midi_test/src/main.c | 2 +- examples/device/midi_test/src/usb_descriptors.c | 2 +- examples/device/msc_dual_lun/CMakeLists.txt | 2 +- examples/device/msc_dual_lun/skip.txt | 2 +- examples/device/msc_dual_lun/src/main.c | 2 +- examples/device/msc_dual_lun/src/msc_disk_dual.c | 2 +- examples/device/msc_dual_lun/src/usb_descriptors.c | 2 +- examples/device/net_lwip_webserver/CMakeLists.txt | 2 +- examples/device/net_lwip_webserver/skip.txt | 2 +- examples/device/net_lwip_webserver/src/arch/cc.h | 32 +- examples/device/net_lwip_webserver/src/lwipopts.h | 28 +- examples/device/net_lwip_webserver/src/main.c | 6 +- .../net_lwip_webserver/src/usb_descriptors.c | 4 +- examples/device/uac2_headset/CMakeLists.txt | 2 +- examples/device/uac2_headset/src/main.c | 4 +- examples/device/uac2_headset/src/usb_descriptors.c | 2 +- examples/device/uac2_headset/src/usb_descriptors.h | 2 +- examples/device/usbtmc/CMakeLists.txt | 2 +- examples/device/usbtmc/src/main.c | 2 +- examples/device/usbtmc/visaQuery.py | 26 +- examples/device/video_capture/CMakeLists.txt | 2 +- examples/device/video_capture/src/main.c | 2 +- .../device/video_capture/src/usb_descriptors.c | 2 +- .../device/video_capture/src/usb_descriptors.h | 2 +- examples/device/webusb_serial/CMakeLists.txt | 2 +- examples/device/webusb_serial/src/main.c | 2 +- .../device/webusb_serial/src/usb_descriptors.c | 2 +- .../device/webusb_serial/src/usb_descriptors.h | 2 +- examples/dual/host_hid_to_device_cdc/src/main.c | 2 +- .../host_hid_to_device_cdc/src/usb_descriptors.c | 2 +- examples/host/bare_api/src/main.c | 2 +- examples/host/cdc_msc_hid/src/main.c | 2 +- examples/host/cdc_msc_hid/src/msc_app.c | 3 +- examples/host/hid_controller/src/main.c | 2 +- examples/host/msc_file_explorer/src/main.c | 2 +- examples/host/msc_file_explorer/src/msc_app.c | 2 +- examples/rules.mk | 2 +- hw/bsp/ansi_escape.h | 2 +- hw/bsp/board.c | 2 +- hw/bsp/board.h | 2 +- .../boards/raspberrypi_zero_w/board.h | 2 +- .../boards/raspberrypi_zero_w/board.mk | 2 +- hw/bsp/broadcom_32bit/family.c | 2 +- .../broadcom_64bit/boards/raspberrypi_cm4/board.h | 2 +- .../boards/raspberrypi_zero2w/board.h | 2 +- hw/bsp/broadcom_64bit/family.c | 2 +- hw/bsp/brtmm90x/family.c | 7 +- hw/bsp/brtmm90x/family.mk | 8 +- hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.h | 2 +- .../ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c | 4 +- hw/bsp/ch32v307/ch32v307.ld | 35 +- hw/bsp/ch32v307/ch32v30x_conf.h | 7 +- hw/bsp/ch32v307/ch32v30x_it.c | 2 - hw/bsp/ch32v307/ch32v30x_it.h | 2 - hw/bsp/ch32v307/core_riscv.h | 7 +- hw/bsp/ch32v307/system_ch32v30x.c | 140 ++--- hw/bsp/ch32v307/system_ch32v30x.h | 9 +- hw/bsp/da14695_dk_usb/da14695_dk_usb.c | 2 +- hw/bsp/da14695_dk_usb/da1469x.ld | 1 - hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c | 2 +- hw/bsp/da1469x_dk_pro/da1469x.ld | 1 - hw/bsp/ea4088qs/ea4088qs.c | 2 +- hw/bsp/ea4088qs/lpc4088.ld | 54 +- hw/bsp/ea4357/ea4357.c | 2 +- hw/bsp/ea4357/lpc4357.ld | 106 ++-- hw/bsp/ea4357/pca9532.c | 6 +- hw/bsp/ea4357/pca9532.h | 2 +- hw/bsp/esp32s2/boards/CMakeLists.txt | 2 +- .../boards/adafruit_feather_esp32s2/board.cmake | 2 +- .../boards/adafruit_feather_esp32s2/board.h | 2 +- .../boards/adafruit_magtag_29gray/board.cmake | 2 +- .../esp32s2/boards/adafruit_magtag_29gray/board.h | 2 +- .../boards/adafruit_metro_esp32s2/board.cmake | 2 +- .../esp32s2/boards/adafruit_metro_esp32s2/board.h | 2 +- hw/bsp/esp32s2/boards/esp32s2.c | 3 +- .../esp32s2/boards/espressif_kaluga_1/board.cmake | 2 +- hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h | 2 +- .../esp32s2/boards/espressif_saola_1/board.cmake | 2 +- hw/bsp/esp32s2/boards/espressif_saola_1/board.h | 2 +- hw/bsp/esp32s2/components/led_strip/CMakeLists.txt | 1 - hw/bsp/esp32s2/family.cmake | 2 +- hw/bsp/esp32s2/family.mk | 1 - hw/bsp/esp32s3/boards/CMakeLists.txt | 2 +- hw/bsp/esp32s3/boards/esp32s3.c | 3 +- .../esp32s3/boards/espressif_addax_1/board.cmake | 2 +- hw/bsp/esp32s3/boards/espressif_addax_1/board.h | 2 +- .../boards/espressif_s3_devkitc/board.cmake | 2 +- hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h | 2 +- .../boards/espressif_s3_devkitm/board.cmake | 2 +- hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h | 2 +- hw/bsp/esp32s3/components/led_strip/CMakeLists.txt | 1 - hw/bsp/esp32s3/family.cmake | 2 +- hw/bsp/esp32s3/family.mk | 1 - hw/bsp/f1c100s/README.md | 2 +- hw/bsp/f1c100s/board.h | 2 +- hw/bsp/f1c100s/board.mk | 6 +- hw/bsp/f1c100s/f1c100s.c | 4 +- hw/bsp/family_support.cmake | 2 +- hw/bsp/fomu/boards/fomu/board.mk | 2 +- hw/bsp/fomu/fomu.c | 2 +- hw/bsp/fomu/include/hw/common.h | 2 +- hw/bsp/fomu/include/irq.h | 2 +- hw/bsp/frdm_k32l2b/board.h | 2 +- hw/bsp/frdm_k32l2b/frdm_k32l2b.c | 12 +- hw/bsp/frdm_kl25z/frdm_kl25z.c | 4 +- hw/bsp/gd32vf103/family.c | 2 +- hw/bsp/gd32vf103/system_gd32vf103.c | 10 +- hw/bsp/imxrt/boards/metro_m7_1011/board.h | 2 +- hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld | 2 +- hw/bsp/imxrt/boards/mimxrt1010_evk/board.h | 2 +- hw/bsp/imxrt/boards/mimxrt1015_evk/board.h | 2 +- hw/bsp/imxrt/boards/mimxrt1020_evk/board.h | 2 +- hw/bsp/imxrt/boards/mimxrt1024_evk/board.h | 2 +- hw/bsp/imxrt/boards/mimxrt1050_evkb/board.h | 2 +- hw/bsp/imxrt/boards/mimxrt1060_evk/board.h | 2 +- hw/bsp/imxrt/boards/mimxrt1064_evk/board.h | 2 +- hw/bsp/imxrt/boards/teensy_40/board.h | 2 +- hw/bsp/imxrt/boards/teensy_40/board.mk | 2 +- hw/bsp/imxrt/boards/teensy_41/board.h | 2 +- hw/bsp/imxrt/boards/teensy_41/board.mk | 2 +- hw/bsp/imxrt/family.c | 2 +- hw/bsp/kuiic/K32L2B31xxxxA_flash.ld | 1 - hw/bsp/kuiic/board.h | 2 +- hw/bsp/kuiic/kuiic.c | 16 +- hw/bsp/lpc15/boards/lpcxpresso1549/lpc1549.ld | 60 +- hw/bsp/lpc15/family.c | 2 +- hw/bsp/lpc18/boards/lpcxpresso18s37/lpc1837.ld | 86 +-- hw/bsp/lpc18/boards/mcb1800/lpc1857.ld | 106 ++-- hw/bsp/lpc18/family.c | 2 +- hw/bsp/lpc54/boards/lpcxpresso54628/board.mk | 2 +- hw/bsp/lpc54/family.c | 2 +- .../double_m33_express/LPC55S69_cm33_core0_uf2.ld | 1 - hw/bsp/lpc55/family.c | 2 +- hw/bsp/lpcxpresso11u37/lpc11u37.ld | 50 +- hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c | 2 +- hw/bsp/lpcxpresso11u68/lpc11u68.ld | 68 +-- hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c | 2 +- hw/bsp/lpcxpresso1347/lpc1347.ld | 68 +-- hw/bsp/lpcxpresso1347/lpcxpresso1347.c | 4 +- hw/bsp/lpcxpresso1769/lpc1769.ld | 54 +- hw/bsp/lpcxpresso1769/lpcxpresso1769.c | 2 +- hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c | 2 +- hw/bsp/mbed1768/lpc1768.ld | 54 +- hw/bsp/mbed1768/mbed1768.c | 2 +- hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld | 8 +- hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c | 4 +- hw/bsp/ngx4330/ngx4330.c | 2 +- hw/bsp/ngx4330/ngx4330.ld | 80 +-- hw/bsp/nrf/boards/adafruit_clue/board.h | 2 +- .../nrf/boards/adafruit_clue/nrf52840_s140_v6.ld | 4 +- .../arduino_nano33_ble/arduino_nano33_ble.ld | 2 +- hw/bsp/nrf/boards/arduino_nano33_ble/board.h | 2 +- .../nrf/boards/circuitplayground_bluefruit/board.h | 2 +- .../nrf52840_s140_v6.ld | 4 +- hw/bsp/nrf/boards/feather_nrf52840_express/board.h | 2 +- .../feather_nrf52840_express/nrf52840_s140_v6.ld | 4 +- hw/bsp/nrf/boards/feather_nrf52840_sense/board.h | 2 +- .../feather_nrf52840_sense/nrf52840_s140_v6.ld | 4 +- hw/bsp/nrf/boards/itsybitsy_nrf52840/board.h | 2 +- .../boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld | 4 +- hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h | 2 +- hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk | 2 +- hw/bsp/nrf/boards/pca10056/board.h | 2 +- hw/bsp/nrf/boards/pca10059/board.h | 2 +- hw/bsp/nrf/boards/pca10100/board.h | 2 +- hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h | 2 +- hw/bsp/nrf/family.c | 2 +- hw/bsp/nutiny_nuc121s/nuc121_flash.ld | 2 +- hw/bsp/nutiny_nuc121s/nutiny_nuc121.c | 2 +- hw/bsp/nutiny_nuc125s/nuc125_flash.ld | 2 +- hw/bsp/nutiny_nuc125s/nutiny_nuc125.c | 2 +- hw/bsp/nutiny_nuc126v/nutiny_nuc126.c | 2 +- hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c | 2 +- hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c | 2 +- hw/bsp/pic32mz/boards/olimex_emz64/olimex_emz64.c | 2 +- hw/bsp/pic32mz/family.c | 2 +- hw/bsp/rp2040/board.h | 2 +- hw/bsp/rp2040/boards/raspberry_pi_pico/board.cmake | 2 +- hw/bsp/rp2040/family.cmake | 2 +- hw/bsp/rx/boards/gr_citrus/gr_citrus.c | 6 +- hw/bsp/rx/boards/rx65n_target/rx65n_target.c | 2 +- .../boards/samd11_xplained/samd11d14am_flash.ld | 4 +- hw/bsp/samd21/boards/atsamd21_xpro/board.h | 2 +- .../boards/circuitplayground_express/board.h | 2 +- hw/bsp/samd21/boards/curiosity_nano/board.h | 2 +- hw/bsp/samd21/boards/feather_m0_express/board.h | 2 +- hw/bsp/samd21/boards/itsybitsy_m0/board.h | 2 +- hw/bsp/samd21/boards/luna_d21/board.h | 2 +- hw/bsp/samd21/boards/luna_d21/board.mk | 1 - hw/bsp/samd21/boards/metro_m0_express/board.h | 2 +- hw/bsp/samd21/boards/qtpy/board.h | 2 +- hw/bsp/samd21/boards/seeeduino_xiao/board.h | 2 +- hw/bsp/samd21/boards/trinket_m0/board.h | 1 - hw/bsp/samd21/boards/trinket_m0/board.mk | 1 - hw/bsp/samd21/family.c | 2 +- hw/bsp/samd51/boards/feather_m4_express/board.h | 2 +- hw/bsp/samd51/boards/itsybitsy_m4/board.h | 2 +- hw/bsp/samd51/boards/metro_m4_express/board.h | 2 +- hw/bsp/samd51/boards/metro_m4_express/board.mk | 1 - hw/bsp/samd51/boards/pybadge/board.h | 2 +- hw/bsp/samd51/boards/pyportal/board.h | 2 +- hw/bsp/samd51/family.c | 2 +- hw/bsp/same54xplainedpro/same54p20a_flash.ld | 4 +- hw/bsp/same54xplainedpro/same54p20a_sram.ld | 4 +- hw/bsp/samg55xplained/samg55xplained.c | 2 +- hw/bsp/saml2x/boards/atsaml21_xpro/board.h | 2 +- hw/bsp/saml2x/boards/saml22_feather/board.h | 2 +- .../saml2x/boards/saml22_feather/saml22_feather.ld | 4 +- hw/bsp/saml2x/boards/sensorwatch_m0/board.h | 2 +- .../saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld | 4 +- hw/bsp/saml2x/family.c | 2 +- hw/bsp/sltb009a/sltb009a.c | 4 +- hw/bsp/spresense/board_spresense.c | 6 +- hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h | 2 +- hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk | 2 +- .../stm32f070rbnucleo/stm32F070rbtx_flash.ld | 14 +- .../boards/stm32f072disco/STM32F072RBTx_FLASH.ld | 8 +- hw/bsp/stm32f0/boards/stm32f072disco/board.h | 2 +- hw/bsp/stm32f0/boards/stm32f072eval/board.h | 2 +- hw/bsp/stm32f0/family.c | 2 +- hw/bsp/stm32f0/stm32f0xx_hal_conf.h | 51 +- .../boards/stm32f103_bluepill/STM32F103X8_FLASH.ld | 6 +- hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h | 2 +- .../boards/stm32f103_mini_2/STM32F103XC_FLASH.ld | 6 +- hw/bsp/stm32f1/boards/stm32f103_mini_2/board.h | 2 +- hw/bsp/stm32f1/family.c | 8 +- hw/bsp/stm32f1/stm32f1xx_hal_conf.h | 44 +- hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld | 8 +- hw/bsp/stm32f207nucleo/stm32f207nucleo.c | 4 +- hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h | 56 +- hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld | 18 +- hw/bsp/stm32f303disco/stm32f303disco.c | 2 +- hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h | 38 +- .../feather_stm32f405/STM32F405RGTx_FLASH.ld | 18 +- hw/bsp/stm32f4/boards/feather_stm32f405/board.h | 2 +- .../boards/pyboardv11/STM32F405RGTx_FLASH.ld | 18 +- hw/bsp/stm32f4/boards/pyboardv11/board.h | 2 +- .../stm32f401blackpill/STM32F401VCTx_FLASH.ld | 8 +- hw/bsp/stm32f4/boards/stm32f401blackpill/board.h | 2 +- .../boards/stm32f401blackpill/stm32f4xx_hal_conf.h | 82 +-- .../boards/stm32f407disco/STM32F407VGTx_FLASH.ld | 18 +- hw/bsp/stm32f4/boards/stm32f407disco/board.h | 2 +- .../boards/stm32f407disco/stm32f4xx_hal_conf.h | 82 +-- .../stm32f411blackpill/STM32F411CEUx_FLASH.ld | 8 +- hw/bsp/stm32f4/boards/stm32f411blackpill/board.h | 2 +- .../boards/stm32f411blackpill/stm32f4xx_hal_conf.h | 82 +-- .../boards/stm32f411disco/STM32F411VETx_FLASH.ld | 8 +- hw/bsp/stm32f4/boards/stm32f411disco/board.h | 2 +- .../boards/stm32f411disco/stm32f4xx_hal_conf.h | 82 +-- .../boards/stm32f412disco/STM32F412ZGTx_FLASH.ld | 8 +- hw/bsp/stm32f4/boards/stm32f412disco/board.h | 2 +- .../boards/stm32f412disco/stm32f4xx_hal_conf.h | 82 +-- .../boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld | 8 +- .../boards/stm32f412nucleo/stm32f4xx_hal_conf.h | 82 +-- .../boards/stm32f439nucleo/stm32f4xx_hal_conf.h | 70 +-- hw/bsp/stm32f4/family.c | 2 +- hw/bsp/stm32f7/boards/stlinkv3mini/board.h | 2 +- hw/bsp/stm32f7/boards/stm32f723disco/board.h | 2 +- hw/bsp/stm32f7/boards/stm32f746disco/board.h | 2 +- .../boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld | 6 +- hw/bsp/stm32f7/boards/stm32f746nucleo/board.h | 2 +- .../boards/stm32f746nucleo/stm32f7xx_hal_conf.h | 52 +- .../boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld | 8 +- hw/bsp/stm32f7/boards/stm32f767nucleo/board.h | 2 +- hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk | 2 +- .../boards/stm32f767nucleo/stm32f7xx_hal_conf.h | 52 +- hw/bsp/stm32f7/boards/stm32f769disco/board.h | 2 +- .../boards/stm32g474nucleo/STM32G474RETx_FLASH.ld | 8 +- hw/bsp/stm32g4/family.c | 2 +- hw/bsp/stm32g4/stm32g4xx_hal_conf.h | 26 +- hw/bsp/stm32h7/boards/daisyseed/board.mk | 1 - .../boards/daisyseed/stm32h750ibkx_flash.ld | 2 - .../boards/stm32h743eval/stm32h743xx_flash.ld | 8 +- .../boards/stm32h743nucleo/stm32h743xx_flash.ld | 8 +- hw/bsp/stm32h7/boards/stm32h745disco/board.mk | 1 - .../waveshare_openh743i/STM32H743IITX_FLASH.ld | 2 - hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk | 2 +- hw/bsp/stm32h7/family.c | 2 +- hw/bsp/stm32h7/stm32h7xx_hal_conf.h | 6 +- .../boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld | 8 +- hw/bsp/stm32l0/boards/stm32l052dap52/board.h | 34 +- hw/bsp/stm32l0/family.c | 2 +- hw/bsp/stm32l0/stm32l0xx_hal_conf.h | 49 +- hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld | 8 +- hw/bsp/stm32l0538disco/stm32l0538disco.c | 2 +- hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h | 102 ++-- .../boards/stm32l412nucleo/STM32L412KBUx_FLASH.ld | 14 +- hw/bsp/stm32l4/boards/stm32l412nucleo/board.h | 6 +- .../boards/stm32l476disco/STM32L476VGTx_FLASH.ld | 14 +- hw/bsp/stm32l4/boards/stm32l476disco/board.h | 2 +- .../boards/stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld | 12 +- hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h | 2 +- .../boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld | 6 +- hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h | 2 +- hw/bsp/stm32l4/stm32l4xx_hal_conf.h | 10 +- hw/bsp/stm32u5/stm32u5xx_hal_conf.h | 1 - .../stm32wb55nucleo/stm32wb55xx_flash_cm4.ld | 8 +- hw/bsp/stm32wb/family.c | 2 +- hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk | 2 +- hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld | 24 +- hw/bsp/tm4c123/family.c | 1 - hw/bsp/xmc4000/boards/xmc4500_relax/board.h | 2 +- hw/mcu/bridgetek/ft9xx/Readme.md | 4 +- hw/mcu/bridgetek/ft9xx/scripts/crt0.S | 8 +- hw/mcu/dialog/README.md | 4 +- .../da1469x/SDK_10.0.8.105/sdk/bsp/arm_license.txt | 1 - .../sdk/bsp/include/cmsis_compiler.h | 1 - .../SDK_10.0.8.105/sdk/bsp/include/cmsis_gcc.h | 10 +- .../SDK_10.0.8.105/sdk/bsp/include/core_cm0.h | 2 +- .../SDK_10.0.8.105/sdk/bsp/include/core_cm33.h | 4 +- .../SDK_10.0.8.105/sdk/bsp/include/mpu_armv8.h | 33 +- hw/mcu/dialog/da1469x/da1469x.ld | 1 - hw/mcu/dialog/da1469x/include/mcu/mcu.h | 1 - .../nrf5x/s140_nrf52_6.1.1_API/include/ble.h | 2 +- .../nrf5x/s140_nrf52_6.1.1_API/include/ble_gap.h | 2 +- lib/SEGGER_RTT/RTT/SEGGER_RTT.c | 16 +- lib/SEGGER_RTT/RTT/SEGGER_RTT.h | 2 +- lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S | 6 +- lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h | 12 +- lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c | 4 +- lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c | 42 +- lib/fatfs/source/00history.txt | 1 - lib/fatfs/source/00readme.txt | 1 - lib/fatfs/source/diskio.c | 1 - lib/fatfs/source/ff.c | 1 - lib/fatfs/source/ffsystem.c | 1 - lib/networking/dhserver.c | 10 +- lib/networking/dhserver.h | 6 +- lib/networking/dnserver.c | 8 +- lib/networking/dnserver.h | 6 +- lib/networking/ndis.h | 10 +- lib/networking/rndis_protocol.h | 28 +- lib/networking/rndis_reports.c | 14 +- src/class/audio/audio.h | 6 +- src/class/audio/audio_device.c | 6 +- src/class/audio/audio_device.h | 4 +- src/class/bth/bth_device.h | 2 +- src/class/cdc/cdc_device.c | 12 +- src/class/cdc/cdc_device.h | 2 +- src/class/cdc/cdc_host.h | 2 +- src/class/cdc/cdc_rndis.h | 2 +- src/class/cdc/cdc_rndis_host.c | 2 +- src/class/cdc/cdc_rndis_host.h | 2 +- src/class/hid/hid.h | 2 +- src/class/midi/midi.h | 2 +- src/class/midi/midi_device.c | 2 +- src/class/midi/midi_device.h | 2 +- src/class/msc/msc.h | 2 +- src/class/msc/msc_device.h | 2 +- src/class/msc/msc_host.c | 12 +- src/class/msc/msc_host.h | 2 +- src/class/net/ecm_rndis_device.c | 2 +- src/class/net/ncm_device.c | 2 +- src/class/net/net_device.h | 2 +- src/class/usbtmc/usbtmc.h | 1 - src/class/usbtmc/usbtmc_device.c | 4 +- src/class/vendor/vendor_device.h | 2 +- src/class/vendor/vendor_host.c | 2 +- src/class/vendor/vendor_host.h | 2 +- src/class/video/video_device.c | 2 +- src/common/tusb_compiler.h | 4 +- src/common/tusb_timeout.h | 2 +- src/common/tusb_verify.h | 2 +- src/device/dcd.h | 2 +- src/device/usbd.c | 4 +- src/device/usbd_pvt.h | 2 +- src/host/hcd.h | 2 +- src/host/hub.c | 4 +- src/host/usbh.h | 2 +- src/osal/osal.h | 2 +- src/osal/osal_freertos.h | 2 +- src/osal/osal_none.h | 2 +- src/osal/osal_pico.h | 2 +- src/osal/osal_rtx4.h | 4 +- src/portable/bridgetek/ft9xx/dcd_ft9xx.c | 78 +-- src/portable/chipidea/ci_hs/ci_hs_type.h | 2 +- src/portable/chipidea/ci_hs/dcd_ci_hs.c | 2 +- src/portable/chipidea/ci_hs/hcd_ci_hs.c | 2 +- src/portable/ehci/ehci.c | 6 +- src/portable/espressif/esp32sx/dcd_esp32sx.c | 1 - src/portable/mentor/musb/dcd_musb.c | 8 +- src/portable/mentor/musb/hcd_musb.c | 4 +- src/portable/microchip/pic/dcd_pic.c | 4 +- src/portable/microchip/pic32mz/usbhs_registers.h | 40 +- src/portable/microchip/samg/dcd_samg.c | 2 +- src/portable/microchip/samx7x/common_usb_regs.h | 6 +- src/portable/microchip/samx7x/dcd_samx7x.c | 36 +- src/portable/nordic/nrf5x/dcd_nrf5x.c | 2 +- src/portable/nuvoton/nuc120/dcd_nuc120.c | 6 +- src/portable/nuvoton/nuc121/dcd_nuc121.c | 6 +- src/portable/nuvoton/nuc505/dcd_nuc505.c | 6 +- src/portable/nxp/khci/dcd_khci.c | 6 +- src/portable/nxp/khci/hcd_khci.c | 4 +- src/portable/nxp/lpc17_40/dcd_lpc17_40.c | 2 +- src/portable/nxp/lpc17_40/dcd_lpc17_40.h | 2 +- src/portable/nxp/lpc17_40/hcd_lpc17_40.c | 3 +- src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 7 +- .../nxp/transdimension/common_transdimension.h | 2 +- .../nxp/transdimension/dcd_transdimension.c | 2 +- .../nxp/transdimension/hcd_transdimension.c | 2 +- src/portable/ohci/ohci.c | 3 +- src/portable/raspberrypi/pio_usb/dcd_pio_usb.c | 2 +- src/portable/raspberrypi/rp2040/rp2040_usb.h | 2 +- src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 45 +- src/portable/st/synopsys/synopsys_common.h | 672 ++++++++++----------- src/portable/sunxi/dcd_sunxi_musb.c | 6 +- src/portable/template/dcd_template.c | 2 +- src/portable/valentyusb/eptri/dcd_eptri.c | 2 +- src/portable/valentyusb/eptri/dcd_eptri.h | 2 +- src/portable/wch/ch32v307/dcd_usbhs.c | 8 +- test/fuzz/dcd_fuzz.cc | 4 +- test/fuzz/device/cdc/CMakeLists.txt | 2 +- test/fuzz/device/cdc/src/fuzz.cc | 4 +- test/fuzz/device/msc/CMakeLists.txt | 2 +- test/fuzz/device/msc/src/fuzz.cc | 1 - test/fuzz/device/net/CMakeLists.txt | 2 +- test/fuzz/device/net/src/arch/cc.h | 32 +- test/fuzz/device/net/src/fuzz.cc | 2 +- test/fuzz/device/net/src/lwipopts.h | 28 +- test/fuzz/dicts/cdc.dict | 1 - test/fuzz/make.mk | 3 +- test/fuzz/msc_fuzz.cc | 2 +- test/fuzz/net_fuzz.cc | 2 +- test/fuzz/rules.mk | 6 +- test/unit-test/test/device/msc/test_msc_device.c | 2 +- test/unit-test/test/device/usbd/test_usbd.c | 2 +- test/unit-test/test/test_fifo.c | 2 +- test/unit-test/vendor/ceedling/lib/ceedling.rb | 1 - .../ceedling/lib/ceedling/build_invoker_utils.rb | 14 +- .../vendor/ceedling/lib/ceedling/cacheinator.rb | 10 +- .../ceedling/lib/ceedling/cacheinator_helper.rb | 2 +- .../vendor/ceedling/lib/ceedling/cmock_builder.rb | 8 +- .../vendor/ceedling/lib/ceedling/configurator.rb | 1 - .../ceedling/lib/ceedling/configurator_plugins.rb | 2 +- .../ceedling/lib/ceedling/configurator_setup.rb | 2 +- .../lib/ceedling/configurator_validator.rb | 78 +-- .../vendor/ceedling/lib/ceedling/erb_wrapper.rb | 2 +- .../vendor/ceedling/lib/ceedling/file_finder.rb | 1 - .../ceedling/lib/ceedling/file_finder_helper.rb | 22 +- .../ceedling/lib/ceedling/file_system_utils.rb | 14 +- .../ceedling/lib/ceedling/file_system_wrapper.rb | 2 +- .../vendor/ceedling/lib/ceedling/flaginator.rb | 14 +- .../ceedling/lib/ceedling/generator_helper.rb | 8 +- .../lib/ceedling/generator_test_results.rb | 2 +- .../generator_test_results_sanity_checker.rb | 22 +- .../vendor/ceedling/lib/ceedling/loginator.rb | 6 +- .../vendor/ceedling/lib/ceedling/makefile.rb | 4 +- .../vendor/ceedling/lib/ceedling/objects.yml | 2 +- .../vendor/ceedling/lib/ceedling/par_map.rb | 1 - .../vendor/ceedling/lib/ceedling/plugin.rb | 8 +- .../vendor/ceedling/lib/ceedling/plugin_builder.rb | 4 +- .../ceedling/lib/ceedling/plugin_reportinator.rb | 40 +- .../lib/ceedling/plugin_reportinator_helper.rb | 10 +- .../ceedling/preprocessinator_includes_handler.rb | 2 +- .../lib/ceedling/project_config_manager.rb | 2 +- .../vendor/ceedling/lib/ceedling/rake_utils.rb | 2 +- .../vendor/ceedling/lib/ceedling/reportinator.rb | 4 +- .../vendor/ceedling/lib/ceedling/rules_cmock.rake | 2 +- .../ceedling/lib/ceedling/rules_preprocess.rake | 5 +- .../ceedling/lib/ceedling/rules_release.rake | 1 - .../ceedling/rules_release_deep_dependencies.rake | 3 +- .../vendor/ceedling/lib/ceedling/rules_tests.rake | 1 - .../ceedling/rules_tests_deep_dependencies.rake | 1 - .../vendor/ceedling/lib/ceedling/setupinator.rb | 8 +- .../vendor/ceedling/lib/ceedling/stream_wrapper.rb | 2 +- .../vendor/ceedling/lib/ceedling/streaminator.rb | 2 +- .../ceedling/lib/ceedling/streaminator_helper.rb | 2 +- .../vendor/ceedling/lib/ceedling/system_utils.rb | 6 +- .../vendor/ceedling/lib/ceedling/task_invoker.rb | 20 +- .../vendor/ceedling/lib/ceedling/tasks_base.rake | 1 - .../ceedling/lib/ceedling/tasks_filesystem.rake | 2 - .../ceedling/lib/ceedling/tasks_release.rake | 11 +- .../vendor/ceedling/lib/ceedling/tasks_tests.rake | 1 - .../ceedling/lib/ceedling/test_invoker_helper.rb | 8 +- .../vendor/ceedling/plugins/beep/lib/beep.rb | 1 - .../vendor/ceedling/plugins/bullseye/README.md | 2 +- .../ceedling/plugins/bullseye/assets/template.erb | 1 - .../ceedling/plugins/bullseye/lib/bullseye.rb | 26 +- .../ceedling/plugins/colour_report/README.md | 2 +- .../plugins/command_hooks/lib/command_hooks.rb | 1 - .../plugins/compile_commands_json/README.md | 2 +- .../plugins/fake_function_framework/Rakefile | 2 +- .../examples/fff_example/project.yml | 2 +- .../examples/fff_example/src/display.c | 2 +- .../lib/fff_mock_generator.rb | 2 +- .../spec/fff_mock_header_generator_spec.rb | 2 +- .../spec/fff_mock_source_generator_spec.rb | 2 +- .../spec/header_generator.rb | 2 +- .../fake_function_framework/src/fff_unity_helper.h | 2 +- .../ceedling/plugins/gcov/assets/template.erb | 1 - .../plugins/gcov/lib/reportinator_helper.rb | 2 +- .../ceedling/plugins/json_tests_report/README.md | 4 +- .../json_tests_report/lib/json_tests_report.rb | 4 +- .../ceedling/plugins/module_generator/README.md | 4 +- .../module_generator/config/module_generator.yml | 2 +- .../stdout_gtestlike_tests_report/README.md | 4 +- .../plugins/stdout_ide_tests_report/README.md | 2 +- .../plugins/stdout_pretty_tests_report/README.md | 2 +- .../stdout_pretty_tests_report/assets/template.erb | 1 - .../lib/stdout_pretty_tests_report.rb | 8 +- .../vendor/ceedling/plugins/subprojects/README.md | 14 +- .../ceedling/plugins/subprojects/subprojects.rake | 3 +- .../plugins/teamcity_tests_report/README.md | 2 +- .../ceedling/vendor/c_exception/lib/CException.c | 1 - .../ceedling/vendor/c_exception/lib/meson.build | 2 +- .../vendor/ceedling/vendor/cmock/src/cmock.c | 1 - .../vendor/ceedling/vendor/cmock/src/meson.build | 2 +- .../vendor/ceedling/vendor/diy/lib/diy.rb | 60 +- .../vendor/ceedling/vendor/diy/lib/diy/factory.rb | 5 +- .../ceedling/vendor/unity/auto/generate_config.yml | 2 +- .../vendor/ceedling/vendor/unity/src/meson.build | 2 +- tools/build_board.py | 2 +- tools/build_utils.py | 2 +- tools/iar_template.ipcf | 2 +- tools/mksunxi.py | 2 +- tools/pcapng_to_corpus.py | 10 +- tools/usb_drivers/tinyusb_win_usbser.inf | 2 +- 581 files changed, 2553 insertions(+), 2694 deletions(-) (limited to 'src/common') diff --git a/.gitattributes b/.gitattributes index 2342decc3..140ae8929 100644 --- a/.gitattributes +++ b/.gitattributes @@ -1,10 +1,10 @@ # Set the default behavior, in case people don't have core.autocrlf set. * text=auto -*.c text -*.cpp text +*.c text +*.cpp text *.h text -*.icf text +*.icf text *.js text *.json text *.ld text diff --git a/.github/ISSUE_TEMPLATE/bug_report.yml b/.github/ISSUE_TEMPLATE/bug_report.yml index 8c39b95e1..dc5f0ee16 100644 --- a/.github/ISSUE_TEMPLATE/bug_report.yml +++ b/.github/ISSUE_TEMPLATE/bug_report.yml @@ -54,7 +54,7 @@ body: Exact steps in chronological order, details should be specific e.g if you use a command/script to test with, please post it as well. 1. Go to '...' 2. Click on '....' - 3. See error + 3. See error validations: required: true @@ -63,9 +63,9 @@ body: label: Debug Log as txt file placeholder: | Attach your debug log txt file here, where the issue occurred, best with comments to explain the actual events. - + Note1: Please DO NOT paste your lengthy log contents here since it hurts the readability. - Note2: To enable logging, add `LOG=3` to to the make command if building with stock examples or set `CFG_TUSB_DEBUG=3` in your tusb_config.h. + Note2: To enable logging, add `LOG=3` to to the make command if building with stock examples or set `CFG_TUSB_DEBUG=3` in your tusb_config.h. More information can be found at [example's readme](https://github.com/hathach/tinyusb/blob/master/docs/getting_started.md) validations: required: false diff --git a/.github/workflows/trigger.yml b/.github/workflows/trigger.yml index 11e58d86c..86c699dac 100644 --- a/.github/workflows/trigger.yml +++ b/.github/workflows/trigger.yml @@ -43,7 +43,7 @@ jobs: if [ -n "$(git status --porcelain)" ]; then git add . git commit --message "Update from https://github.com/$GITHUB_REPOSITORY/commit/$GITHUB_SHA" - git push + git push fi - name: Create tinyusb_src Release @@ -53,7 +53,7 @@ jobs: cd tinyusb_src git tag ${{ github.event.release.tag_name }} git push origin ${{ github.event.release.tag_name }} - + # Send POST reqwuest to release https://docs.github.com/en/rest/reference/repos#create-a-release bb="For release note, please checkout https://github.com/hathach/tinyusb/releases/tag/${{ github.event.release.tag_name }}" curl -X POST -H "Authorization: token ${{ secrets.API_TOKEN_GITHUB }}" -H "Accept: application/vnd.github.v3+json" --data '{"tag_name": "${{ github.event.release.tag_name }}", "name": "${{ github.event.release.name }}", "body": "$bb", "draft": ${{ github.event.release.draft }}, "prerelease": ${{ github.event.release.prerelease }}}' https://api.github.com/repos/hathach/tinyusb_src/releases diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index ea2372f07..976f04e63 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -13,11 +13,11 @@ repos: - repo: local hooks: - - id: codespell - name: codespell - entry: codespell - types_or: [c, header] - language: system + #- id: codespell + # name: codespell + # entry: codespell + # types_or: [c, header] + # language: system - id: unit-test name: unit-test diff --git a/.readthedocs.yaml b/.readthedocs.yaml index e83cd90fd..1421b397a 100644 --- a/.readthedocs.yaml +++ b/.readthedocs.yaml @@ -15,4 +15,3 @@ python: submodules: include: [] recursive: false - \ No newline at end of file diff --git a/docs/assets/stack.svg b/docs/assets/stack.svg index 85fe35e96..ed46c8649 100644 --- a/docs/assets/stack.svg +++ b/docs/assets/stack.svg @@ -1 +1 @@ - \ No newline at end of file + diff --git a/docs/contributing/code_of_conduct.rst b/docs/contributing/code_of_conduct.rst index b52bf14c5..82627099f 120000 --- a/docs/contributing/code_of_conduct.rst +++ b/docs/contributing/code_of_conduct.rst @@ -1 +1 @@ -../../CODE_OF_CONDUCT.rst \ No newline at end of file +../../CODE_OF_CONDUCT.rst diff --git a/docs/info/changelog.rst b/docs/info/changelog.rst index 451e3dace..ca715cb58 100644 --- a/docs/info/changelog.rst +++ b/docs/info/changelog.rst @@ -15,7 +15,7 @@ Changelog - Fix tu_fifo memory overflown when repeatedly write to overwritable fifo (accumulated more than 2 depths) - Better support for IAR (ARM) with ci build check for stm32 mcus. - Fix Windows build for some mingw gnu make situations - + Controller Driver (DCD & HCD) ----------------------------- @@ -27,7 +27,7 @@ Controller Driver (DCD & HCD) - Fix endpoint internal state when closed - Fix reception of large ISO packets -- [rp2040] +- [rp2040] - [dcd] Implement workaround for Errata 15. This enable SOF when bulk-in endpoint is in use and reduce its bandwidth to only 80% - [hcd] Fix shared irq slots filling up when hcd_init() is called multiple times @@ -51,7 +51,7 @@ Device Stack - Support port name strings - fix MS Header wTotalLength computation - + - [HID] - Add FIDO descriptor template @@ -60,7 +60,7 @@ Device Stack - [CDC] - Fix autoflush for FIFO < MPS - - Fix tx fifo memory overflown when DTR is not set and tud_cdc_write() is called repeatedly with large enough data + - Fix tx fifo memory overflown when DTR is not set and tud_cdc_write() is called repeatedly with large enough data - [USBTMC] Fix packet size with highspeed @@ -100,14 +100,14 @@ Controller Driver (DCD & HCD) - Fix overwrite with grstctl when disable endpoint - [EHCI] Fix an issue with EHCI driver - [msp430] Fix for possible bug in msp430-elf-gcc 9.3.0 -- [nrf5x] Fix DMA access race condition using atomic function +- [nrf5x] Fix DMA access race condition using atomic function - [pic32] Fix PIC32 santiy - [rp2040] - Add PICO-PIO-USB as controller (device/host) support for rp2040 - Use shared IRQ handlers, so user can also hook the USB IRQ - Fix resumed signal not reported to device stack -- [stm32fsdev] Add support for stm32wb55 +- [stm32fsdev] Add support for stm32wb55 Device Stack ------------ @@ -159,7 +159,7 @@ Controller Driver (DCD & HCD) - [F1C100s] Add new DCD for Allwinner F1C100s family - [PIC32MZ] Add new DCD for PIC32MZ - [nRF] Fix/Enhance various race condition with: EASY DMA, request HFXO, EPOUT -- [ChipIdea] rename Transdimension to more popular ChipIdea Highspeed, +- [ChipIdea] rename Transdimension to more popular ChipIdea Highspeed, - [RP2040] various update/fix for hcd/dcd - [FT9XX] new DCD port for Bridgetek FT90x and FT93x devices - [DA1469X] Fix resume @@ -246,7 +246,7 @@ RP2040 ^^^^^^ - Add RP2040 suspend & resume support -- Implement double buffer for both host and device (#891). However device EPOUT is still single buffered due to techinical issue with short packet +- Implement double buffer for both host and device (#891). However device EPOUT is still single buffered due to techinical issue with short packet Device Stack ------------ @@ -267,7 +267,7 @@ DFU ^^^ - Enhance DFU implementation to support multiple alternate interface and better support bwPollTimeout -- Rename CFG_TUD_DFU_MODE to simply CFG_TUD_DFU +- Rename CFG_TUD_DFU_MODE to simply CFG_TUD_DFU HID ^^^ @@ -287,7 +287,7 @@ UAC2 ^^^^ - Fix bug and enhance of UAC2 - + Vendor ^^^^^^ @@ -479,7 +479,7 @@ Host Controller Driver (HCD) - Move echi/ohci files to portable/ - Rename hcd_lpc18_43 to hcd_transdimension - Sub hcd API with hcd_ehci_init(), hcd_ehci_register_addr() - + - Update NXP transdimention hcd_init() to reset controller to host mode - Ported hcd to rt10xx @@ -529,13 +529,13 @@ Device Controller Driver - ESP32-S2: - Add bus suspend and wakeup support - + - SAMD21: - Fix (walkaround) samd21 setup_packet overflow by USB DMA - + - STM32 Synopsys: - Rework USB FIFO allocation scheme and allow RX FIFO size reduction - + - Sony CXD56 - Update Update Spresense SDK to 2.0.2 - Fix dcd issues with setup packets @@ -554,17 +554,17 @@ USB Device - CDC - Allow to transmit data, even if the host does not support control line states i.e set DTR - + - HID - change default CFG_TUD_HID_EP_BUFSIZE from 16 to 64 - + - MIDI - Fix midi sysex sending bug - + - MSC - Invoke only scsi complete callback after status transaction is complete. - Fix scsi_mode_sense6_t padding, which cause IAR compiler internal error. - + - USBTMC - Change interrupt endpoint example size to 8 instead of 2 for better compatibility with mcu @@ -614,20 +614,20 @@ Device Controller Driver - Fix FIFO flush during stall - Implement dcd_edpt_close() API - Support F105, F107 - + - Enhance STM32 fsdev - Improve dcd fifo allocation - Fix ISTR race condition - Support remap USB IRQ on supported MCUs - Implement dcd_edpt_close() API - + - Enhance NUC 505: enhance set configure behavior - Enhance SAMD - Fix race condition with setup packet - Add SAMD11 option `OPT_MCU_SAMD11` - Add SAME5x option `OPT_MCU_SAME5X` - + - Fix SAMG control data toggle and stall race condition - Enhance nRF @@ -659,7 +659,7 @@ USB Device - `usbd_driver_open()` add max length argument, and return length of interface (0 for not supported). Return value is used for finding appropriate driver - Add application implemented class driver via `usbd_app_driver_get_cb()` - IAD is handled to assign driver id - + - Added `tud_descriptor_device_qualifier_cb()` callback - Optimize `tu_fifo` bulk write/read transfer - Forward non-std control request to class driver @@ -675,12 +675,12 @@ USB Device - Send zero length packet for end of data when needed - Add `tud_cdc_tx_complete_cb()` callback - Change tud_cdc_n_write_flush() return number of bytes forced to transfer, and flush when writing enough data to fifo - + - MIDI: - Add packet interface - Add multiple jack descriptors - Fix MIDI driver for sysex - + - DFU Runtime: fix response to SET_INTERFACE and DFU_GETSTATUS request - Rename some configure macro to make it clear that those are used directly for endpoint transfer @@ -688,7 +688,7 @@ USB Device - CFG_TUD_CDC_EPSIZE to CFG_TUD_CDC_EP_BUFSIZE - CFG_TUD_MSC_BUFSIZE to CFG_TUD_MSC_EP_BUFSIZE - CFG_TUD_MIDI_EPSIZE to CFG_TUD_MIDI_EP_BUFSIZE - + - HID: - Fix gamepad template descriptor - Add multiple HID interface API @@ -700,7 +700,7 @@ USB Host - Rework USB host stack (still work in progress) - Fix compile error with pipehandle - Rework usbh control and enumeration as non-blocking - + - Improve Hub, MSC, HID host driver Examples @@ -713,7 +713,7 @@ Examples - Enhance `net_lwip_webserver` example - Add multiple configuration: RNDIS for Windows, CDC-ECM for macOS (Linux will work with both) - Update lwip to STABLE-2_1_2_RELEASE for net_lwip_webserver - + - Added new Audio example: audio_test uac2_headsest New Boards diff --git a/docs/info/contributors.rst b/docs/info/contributors.rst index b3748ccb5..02608919f 120000 --- a/docs/info/contributors.rst +++ b/docs/info/contributors.rst @@ -1 +1 @@ -../../CONTRIBUTORS.rst \ No newline at end of file +../../CONTRIBUTORS.rst diff --git a/docs/reference/getting_started.rst b/docs/reference/getting_started.rst index e328757ba..ef4a6ba61 100644 --- a/docs/reference/getting_started.rst +++ b/docs/reference/getting_started.rst @@ -44,18 +44,18 @@ For your convenience, TinyUSB contains a handful of examples for both host and d $ git clone https://github.com/hathach/tinyusb tinyusb $ cd tinyusb -Some TinyUSB examples also requires external submodule libraries in ``/lib`` such as FreeRTOS, Lightweight IP to build. Run following command to fetch them +Some TinyUSB examples also requires external submodule libraries in ``/lib`` such as FreeRTOS, Lightweight IP to build. Run following command to fetch them .. code-block:: $ git submodule update --init lib -Some ports will also require a port-specific SDK (e.g. RP2040) or binary (e.g. Sony Spresense) to build examples. They are out of scope for tinyusb, you should download/install it first according to its manufacturer guide. +Some ports will also require a port-specific SDK (e.g. RP2040) or binary (e.g. Sony Spresense) to build examples. They are out of scope for tinyusb, you should download/install it first according to its manufacturer guide. Build ^^^^^ -To build example, first change directory to an example folder. +To build example, first change directory to an example folder. .. code-block:: @@ -118,7 +118,7 @@ To compile for debugging add ``DEBUG=1``\ , for example Log ~~~ -Should you have an issue running example and/or submitting an bug report. You could enable TinyUSB built-in debug logging with optional ``LOG=``. LOG=1 will only print out error message, LOG=2 print more information with on-going events. LOG=3 or higher is not used yet. +Should you have an issue running example and/or submitting an bug report. You could enable TinyUSB built-in debug logging with optional ``LOG=``. LOG=1 will only print out error message, LOG=2 print more information with on-going events. LOG=3 or higher is not used yet. .. code-block:: @@ -127,7 +127,7 @@ Should you have an issue running example and/or submitting an bug report. You co Logger ~~~~~~ -By default log message is printed via on-board UART which is slow and take lots of CPU time comparing to USB speed. If your board support on-board/external debugger, it would be more efficient to use it for logging. There are 2 protocols: +By default log message is printed via on-board UART which is slow and take lots of CPU time comparing to USB speed. If your board support on-board/external debugger, it would be more efficient to use it for logging. There are 2 protocols: * `LOGGER=rtt`: use `Segger RTT protocol `_ @@ -178,12 +178,12 @@ IAR Project Connection files are provided to import TinyUSB stack into your proj * Take example of STM32F0: - + - You need `stm32l0xx.h`, `startup_stm32f0xx.s`, `system_stm32f0xx.c`. - `STM32L0xx_HAL_Driver` is only needed to run examples, TinyUSB stack itself doesn't rely on MCU's SDKs. -* Open `Tools -> Configure Custom Argument Variables` (Switch to `Global` tab if you want to do it for all your projects) +* Open `Tools -> Configure Custom Argument Variables` (Switch to `Global` tab if you want to do it for all your projects) Click `New Group ...`, name it to `TUSB`, Click `Add Variable ...`, name it to `TUSB_DIR`, change it's value to the path of your TinyUSB stack, for example `C:\\tinyusb` diff --git a/examples/device/audio_4_channel_mic/skip.txt b/examples/device/audio_4_channel_mic/skip.txt index ae9b57f1f..1ee86a485 100644 --- a/examples/device/audio_4_channel_mic/skip.txt +++ b/examples/device/audio_4_channel_mic/skip.txt @@ -1,3 +1,3 @@ mcu:SAMD11 mcu:SAME5X -mcu:SAMG \ No newline at end of file +mcu:SAMG diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c index a6af5fd19..26d8c48c5 100644 --- a/examples/device/audio_4_channel_mic/src/main.c +++ b/examples/device/audio_4_channel_mic/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Reinhard Panhuber diff --git a/examples/device/audio_4_channel_mic/src/plot_audio_samples.py b/examples/device/audio_4_channel_mic/src/plot_audio_samples.py index 9ab15135d..8312b4e28 100644 --- a/examples/device/audio_4_channel_mic/src/plot_audio_samples.py +++ b/examples/device/audio_4_channel_mic/src/plot_audio_samples.py @@ -31,4 +31,3 @@ if __name__ == '__main__': plt.ylabel('Amplitude') plt.title('MicNode 4 Channel') plt.show() - \ No newline at end of file diff --git a/examples/device/audio_4_channel_mic/src/usb_descriptors.c b/examples/device/audio_4_channel_mic/src/usb_descriptors.c index 8929f3057..8bf9eebc4 100644 --- a/examples/device/audio_4_channel_mic/src/usb_descriptors.c +++ b/examples/device/audio_4_channel_mic/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/audio_test/CMakeLists.txt b/examples/device/audio_test/CMakeLists.txt index cb321f9a8..f6e10e2ea 100644 --- a/examples/device/audio_test/CMakeLists.txt +++ b/examples/device/audio_test/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/audio_test/skip.txt b/examples/device/audio_test/skip.txt index ae9b57f1f..1ee86a485 100644 --- a/examples/device/audio_test/skip.txt +++ b/examples/device/audio_test/skip.txt @@ -1,3 +1,3 @@ mcu:SAMD11 mcu:SAME5X -mcu:SAMG \ No newline at end of file +mcu:SAMG diff --git a/examples/device/audio_test/src/main.c b/examples/device/audio_test/src/main.c index 56961e427..f9cc63cdd 100644 --- a/examples/device/audio_test/src/main.c +++ b/examples/device/audio_test/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Reinhard Panhuber diff --git a/examples/device/audio_test/src/plot_audio_samples.py b/examples/device/audio_test/src/plot_audio_samples.py index 2303df3d0..1504684a6 100644 --- a/examples/device/audio_test/src/plot_audio_samples.py +++ b/examples/device/audio_test/src/plot_audio_samples.py @@ -32,7 +32,6 @@ if __name__ == '__main__': plt.ylabel('Amplitude') plt.title('MicNode') plt.show() - + samples = np.array(myrecording) np.savetxt('Output.csv', samples, delimiter=",", fmt='%s') - \ No newline at end of file diff --git a/examples/device/audio_test/src/usb_descriptors.c b/examples/device/audio_test/src/usb_descriptors.c index da3e203d7..891e90802 100644 --- a/examples/device/audio_test/src/usb_descriptors.c +++ b/examples/device/audio_test/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/audio_test_multi_rate/CMakeLists.txt b/examples/device/audio_test_multi_rate/CMakeLists.txt index cb321f9a8..f6e10e2ea 100644 --- a/examples/device/audio_test_multi_rate/CMakeLists.txt +++ b/examples/device/audio_test_multi_rate/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/audio_test_multi_rate/skip.txt b/examples/device/audio_test_multi_rate/skip.txt index ae9b57f1f..1ee86a485 100644 --- a/examples/device/audio_test_multi_rate/skip.txt +++ b/examples/device/audio_test_multi_rate/skip.txt @@ -1,3 +1,3 @@ mcu:SAMD11 mcu:SAME5X -mcu:SAMG \ No newline at end of file +mcu:SAMG diff --git a/examples/device/audio_test_multi_rate/src/main.c b/examples/device/audio_test_multi_rate/src/main.c index 0e11a509b..4dd53dd34 100644 --- a/examples/device/audio_test_multi_rate/src/main.c +++ b/examples/device/audio_test_multi_rate/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Reinhard Panhuber @@ -165,7 +165,7 @@ bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const * p_reque (void)rhport; //uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex)); uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue)); - + // Clear buffer when streaming format is changed if(alt != 0) { @@ -257,7 +257,7 @@ bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const * return false; } } - + // Clock Source unit if ( entityID == UAC2_ENTITY_CLOCK ) { @@ -279,7 +279,7 @@ bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const * return false; } } - + return false; // Yet not implemented } @@ -491,7 +491,7 @@ bool tud_audio_tx_done_post_load_cb(uint8_t rhport, uint16_t n_bytes_copied, uin pData_32[cnt] = (uint32_t)startVal++ << 16U; } } - + return true; } diff --git a/examples/device/audio_test_multi_rate/src/plot_audio_samples.py b/examples/device/audio_test_multi_rate/src/plot_audio_samples.py index 4a5f15a9c..c92e49957 100644 --- a/examples/device/audio_test_multi_rate/src/plot_audio_samples.py +++ b/examples/device/audio_test_multi_rate/src/plot_audio_samples.py @@ -32,7 +32,6 @@ if __name__ == '__main__': plt.ylabel('Amplitude') plt.title('MicNode') plt.show() - + samples = np.array(myrecording) np.savetxt('Output.csv', samples, delimiter=",", fmt='%s') - \ No newline at end of file diff --git a/examples/device/audio_test_multi_rate/src/tusb_config.h b/examples/device/audio_test_multi_rate/src/tusb_config.h index d8b6511d6..1c8288bce 100644 --- a/examples/device/audio_test_multi_rate/src/tusb_config.h +++ b/examples/device/audio_test_multi_rate/src/tusb_config.h @@ -111,7 +111,7 @@ extern "C" { // How many formats are used, need to adjust USB descriptor if changed #define CFG_TUD_AUDIO_FUNC_1_N_FORMATS 2 - + // 16bit in 16bit slots #define CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX 2 #define CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_RX 16 diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.c b/examples/device/audio_test_multi_rate/src/usb_descriptors.c index 92e791a72..276bf8aa0 100644 --- a/examples/device/audio_test_multi_rate/src/usb_descriptors.c +++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.h b/examples/device/audio_test_multi_rate/src/usb_descriptors.h index 77e2fe6c1..8d8a03e49 100644 --- a/examples/device/audio_test_multi_rate/src/usb_descriptors.h +++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2022 HiFiPhile @@ -99,4 +99,4 @@ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000) -#endif \ No newline at end of file +#endif diff --git a/examples/device/board_test/src/CMakeLists.txt b/examples/device/board_test/src/CMakeLists.txt index e4e1f4e9a..37625f441 100644 --- a/examples/device/board_test/src/CMakeLists.txt +++ b/examples/device/board_test/src/CMakeLists.txt @@ -2,7 +2,7 @@ idf_component_register(SRCS "main.c" INCLUDE_DIRS "." REQUIRES freertos soc) - + file(TO_NATIVE_PATH "${TOP}/hw/bsp/${FAMILY}/boards/${BOARD}/board.cmake" board_cmake) if(EXISTS ${board_cmake}) diff --git a/examples/device/board_test/src/main.c b/examples/device/board_test/src/main.c index 0289ca15f..e8e393717 100644 --- a/examples/device/board_test/src/main.c +++ b/examples/device/board_test/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_dual_ports/CMakeLists.txt b/examples/device/cdc_dual_ports/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/cdc_dual_ports/CMakeLists.txt +++ b/examples/device/cdc_dual_ports/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/cdc_dual_ports/src/main.c b/examples/device/cdc_dual_ports/src/main.c index 0264f0566..c0296191b 100644 --- a/examples/device/cdc_dual_ports/src/main.c +++ b/examples/device/cdc_dual_ports/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_dual_ports/src/usb_descriptors.c b/examples/device/cdc_dual_ports/src/usb_descriptors.c index 4eb8c7c27..8be404cc9 100644 --- a/examples/device/cdc_dual_ports/src/usb_descriptors.c +++ b/examples/device/cdc_dual_ports/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_msc/CMakeLists.txt b/examples/device/cdc_msc/CMakeLists.txt index fa6e83b7e..8e4db9d29 100644 --- a/examples/device/cdc_msc/CMakeLists.txt +++ b/examples/device/cdc_msc/CMakeLists.txt @@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/cdc_msc/skip.txt b/examples/device/cdc_msc/skip.txt index d844feae8..eadb6e74a 100644 --- a/examples/device/cdc_msc/skip.txt +++ b/examples/device/cdc_msc/skip.txt @@ -1 +1 @@ -mcu:SAMD11 \ No newline at end of file +mcu:SAMD11 diff --git a/examples/device/cdc_msc/src/main.c b/examples/device/cdc_msc/src/main.c index c83299e59..207dd728c 100644 --- a/examples/device/cdc_msc/src/main.c +++ b/examples/device/cdc_msc/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_msc/src/msc_disk.c b/examples/device/cdc_msc/src/msc_disk.c index e67e381ce..f8f37a577 100644 --- a/examples/device/cdc_msc/src/msc_disk.c +++ b/examples/device/cdc_msc/src/msc_disk.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_msc/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c index 6b59ed50f..44c849277 100644 --- a/examples/device/cdc_msc/src/usb_descriptors.c +++ b/examples/device/cdc_msc/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_msc_freertos/src/main.c b/examples/device/cdc_msc_freertos/src/main.c index cfb14aa2b..0e8a24d02 100644 --- a/examples/device/cdc_msc_freertos/src/main.c +++ b/examples/device/cdc_msc_freertos/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_msc_freertos/src/msc_disk.c b/examples/device/cdc_msc_freertos/src/msc_disk.c index a895f4738..707c8d578 100644 --- a/examples/device/cdc_msc_freertos/src/msc_disk.c +++ b/examples/device/cdc_msc_freertos/src/msc_disk.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/cdc_msc_freertos/src/usb_descriptors.c b/examples/device/cdc_msc_freertos/src/usb_descriptors.c index 30a712275..822442724 100644 --- a/examples/device/cdc_msc_freertos/src/usb_descriptors.c +++ b/examples/device/cdc_msc_freertos/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/dfu_runtime/CMakeLists.txt b/examples/device/dfu_runtime/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/dfu_runtime/CMakeLists.txt +++ b/examples/device/dfu_runtime/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/dfu_runtime/src/main.c b/examples/device/dfu_runtime/src/main.c index bd9a91c27..4ec2fa31d 100644 --- a/examples/device/dfu_runtime/src/main.c +++ b/examples/device/dfu_runtime/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/dynamic_configuration/CMakeLists.txt b/examples/device/dynamic_configuration/CMakeLists.txt index fa6e83b7e..8e4db9d29 100644 --- a/examples/device/dynamic_configuration/CMakeLists.txt +++ b/examples/device/dynamic_configuration/CMakeLists.txt @@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/dynamic_configuration/skip.txt b/examples/device/dynamic_configuration/skip.txt index d844feae8..eadb6e74a 100644 --- a/examples/device/dynamic_configuration/skip.txt +++ b/examples/device/dynamic_configuration/skip.txt @@ -1 +1 @@ -mcu:SAMD11 \ No newline at end of file +mcu:SAMD11 diff --git a/examples/device/dynamic_configuration/src/main.c b/examples/device/dynamic_configuration/src/main.c index 33a603343..90794e979 100644 --- a/examples/device/dynamic_configuration/src/main.c +++ b/examples/device/dynamic_configuration/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/dynamic_configuration/src/msc_disk.c b/examples/device/dynamic_configuration/src/msc_disk.c index e8cb03fdd..27856a1a4 100644 --- a/examples/device/dynamic_configuration/src/msc_disk.c +++ b/examples/device/dynamic_configuration/src/msc_disk.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/dynamic_configuration/src/usb_descriptors.c b/examples/device/dynamic_configuration/src/usb_descriptors.c index 092229b99..0590bd679 100644 --- a/examples/device/dynamic_configuration/src/usb_descriptors.c +++ b/examples/device/dynamic_configuration/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_boot_interface/CMakeLists.txt b/examples/device/hid_boot_interface/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/hid_boot_interface/CMakeLists.txt +++ b/examples/device/hid_boot_interface/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/hid_boot_interface/Makefile b/examples/device/hid_boot_interface/Makefile index d58a539e8..b3f2cc588 100644 --- a/examples/device/hid_boot_interface/Makefile +++ b/examples/device/hid_boot_interface/Makefile @@ -8,7 +8,7 @@ INC += \ EXAMPLE_SOURCE = \ src/main.c \ src/usb_descriptors.c - + SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE)) include ../../rules.mk diff --git a/examples/device/hid_boot_interface/src/main.c b/examples/device/hid_boot_interface/src/main.c index b13428041..1a155996a 100644 --- a/examples/device/hid_boot_interface/src/main.c +++ b/examples/device/hid_boot_interface/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_boot_interface/src/usb_descriptors.c b/examples/device/hid_boot_interface/src/usb_descriptors.c index a0d7e9f15..10345ab41 100644 --- a/examples/device/hid_boot_interface/src/usb_descriptors.c +++ b/examples/device/hid_boot_interface/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_boot_interface/src/usb_descriptors.h b/examples/device/hid_boot_interface/src/usb_descriptors.h index 57cf0e2c0..6fee9e223 100644 --- a/examples/device/hid_boot_interface/src/usb_descriptors.h +++ b/examples/device/hid_boot_interface/src/usb_descriptors.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_composite/CMakeLists.txt b/examples/device/hid_composite/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/hid_composite/CMakeLists.txt +++ b/examples/device/hid_composite/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/hid_composite/src/main.c b/examples/device/hid_composite/src/main.c index 05315f266..4edb045c2 100644 --- a/examples/device/hid_composite/src/main.c +++ b/examples/device/hid_composite/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_composite/src/usb_descriptors.c b/examples/device/hid_composite/src/usb_descriptors.c index 2988baee2..347bbf29a 100644 --- a/examples/device/hid_composite/src/usb_descriptors.c +++ b/examples/device/hid_composite/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_composite/src/usb_descriptors.h b/examples/device/hid_composite/src/usb_descriptors.h index ca8925ad9..e733d31dd 100644 --- a/examples/device/hid_composite/src/usb_descriptors.h +++ b/examples/device/hid_composite/src/usb_descriptors.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_composite_freertos/src/main.c b/examples/device/hid_composite_freertos/src/main.c index 7c9619c4b..ca02af100 100644 --- a/examples/device/hid_composite_freertos/src/main.c +++ b/examples/device/hid_composite_freertos/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_composite_freertos/src/usb_descriptors.c b/examples/device/hid_composite_freertos/src/usb_descriptors.c index 4df12d3db..30f327d5e 100644 --- a/examples/device/hid_composite_freertos/src/usb_descriptors.c +++ b/examples/device/hid_composite_freertos/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_composite_freertos/src/usb_descriptors.h b/examples/device/hid_composite_freertos/src/usb_descriptors.h index ca8925ad9..e733d31dd 100644 --- a/examples/device/hid_composite_freertos/src/usb_descriptors.h +++ b/examples/device/hid_composite_freertos/src/usb_descriptors.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_generic_inout/CMakeLists.txt b/examples/device/hid_generic_inout/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/hid_generic_inout/CMakeLists.txt +++ b/examples/device/hid_generic_inout/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/hid_generic_inout/hid_test.js b/examples/device/hid_generic_inout/hid_test.js index daa958fd5..16bc723e2 100644 --- a/examples/device/hid_generic_inout/hid_test.js +++ b/examples/device/hid_generic_inout/hid_test.js @@ -48,7 +48,7 @@ if( deviceInfo ) { function anySupportedBoard(d) { - + for (var key in boards) { if (boards.hasOwnProperty(key)) { if (isDevice(boards[key],d)) { @@ -65,4 +65,3 @@ function isDevice(board,d){ // product id 0xff is matches all return d.vendorId==board[0] && (d.productId==board[1] || board[1] == 0xFFFF); } - diff --git a/examples/device/hid_generic_inout/src/main.c b/examples/device/hid_generic_inout/src/main.c index 5b7daf118..6649b49b5 100644 --- a/examples/device/hid_generic_inout/src/main.c +++ b/examples/device/hid_generic_inout/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_generic_inout/src/usb_descriptors.c b/examples/device/hid_generic_inout/src/usb_descriptors.c index cd4838407..8377a0f47 100644 --- a/examples/device/hid_generic_inout/src/usb_descriptors.c +++ b/examples/device/hid_generic_inout/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/hid_multiple_interface/CMakeLists.txt b/examples/device/hid_multiple_interface/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/hid_multiple_interface/CMakeLists.txt +++ b/examples/device/hid_multiple_interface/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/midi_test/CMakeLists.txt b/examples/device/midi_test/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/midi_test/CMakeLists.txt +++ b/examples/device/midi_test/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/midi_test/src/main.c b/examples/device/midi_test/src/main.c index 3310348bd..66fa72063 100644 --- a/examples/device/midi_test/src/main.c +++ b/examples/device/midi_test/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/midi_test/src/usb_descriptors.c b/examples/device/midi_test/src/usb_descriptors.c index c84a873b1..4845dcf57 100644 --- a/examples/device/midi_test/src/usb_descriptors.c +++ b/examples/device/midi_test/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/msc_dual_lun/CMakeLists.txt b/examples/device/msc_dual_lun/CMakeLists.txt index 9e834ae21..9188ab06c 100644 --- a/examples/device/msc_dual_lun/CMakeLists.txt +++ b/examples/device/msc_dual_lun/CMakeLists.txt @@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/msc_dual_lun/skip.txt b/examples/device/msc_dual_lun/skip.txt index 3549c702a..47e561cf0 100644 --- a/examples/device/msc_dual_lun/skip.txt +++ b/examples/device/msc_dual_lun/skip.txt @@ -1,2 +1,2 @@ mcu:SAMD11 -mcu:MKL25ZXX \ No newline at end of file +mcu:MKL25ZXX diff --git a/examples/device/msc_dual_lun/src/main.c b/examples/device/msc_dual_lun/src/main.c index 96790d20c..0a7284939 100644 --- a/examples/device/msc_dual_lun/src/main.c +++ b/examples/device/msc_dual_lun/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/msc_dual_lun/src/msc_disk_dual.c b/examples/device/msc_dual_lun/src/msc_disk_dual.c index 2b773b43b..b1047acdb 100644 --- a/examples/device/msc_dual_lun/src/msc_disk_dual.c +++ b/examples/device/msc_dual_lun/src/msc_disk_dual.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/msc_dual_lun/src/usb_descriptors.c b/examples/device/msc_dual_lun/src/usb_descriptors.c index d8dbb5ce3..2de81111c 100644 --- a/examples/device/msc_dual_lun/src/usb_descriptors.c +++ b/examples/device/msc_dual_lun/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/net_lwip_webserver/CMakeLists.txt b/examples/device/net_lwip_webserver/CMakeLists.txt index 9fe1a325e..5f1e37931 100644 --- a/examples/device/net_lwip_webserver/CMakeLists.txt +++ b/examples/device/net_lwip_webserver/CMakeLists.txt @@ -80,4 +80,4 @@ if (EXISTS ${TOP}/lib/lwip/src) # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) -endif() \ No newline at end of file +endif() diff --git a/examples/device/net_lwip_webserver/skip.txt b/examples/device/net_lwip_webserver/skip.txt index 68761b058..b0e5235ac 100644 --- a/examples/device/net_lwip_webserver/skip.txt +++ b/examples/device/net_lwip_webserver/skip.txt @@ -7,4 +7,4 @@ mcu:STM32L0 mcu:MKL25ZXX family:broadcom_64bit family:broadcom_32bit -board:curiosity_nano \ No newline at end of file +board:curiosity_nano diff --git a/examples/device/net_lwip_webserver/src/arch/cc.h b/examples/device/net_lwip_webserver/src/arch/cc.h index 56a0cacf7..9f30b91cb 100644 --- a/examples/device/net_lwip_webserver/src/arch/cc.h +++ b/examples/device/net_lwip_webserver/src/arch/cc.h @@ -1,8 +1,8 @@ /* * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, @@ -11,21 +11,21 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. + * derived from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY * OF SUCH DAMAGE. * * This file is part of the lwIP TCP/IP stack. - * + * * Author: Adam Dunkels * */ @@ -42,7 +42,7 @@ typedef int sys_prot_t; #if defined (__ICCARM__) #define PACK_STRUCT_BEGIN -#define PACK_STRUCT_STRUCT +#define PACK_STRUCT_STRUCT #define PACK_STRUCT_END #define PACK_STRUCT_FIELD(x) x #define PACK_STRUCT_USE_INCLUDES @@ -50,7 +50,7 @@ typedef int sys_prot_t; #elif defined (__CC_ARM) #define PACK_STRUCT_BEGIN __packed -#define PACK_STRUCT_STRUCT +#define PACK_STRUCT_STRUCT #define PACK_STRUCT_END #define PACK_STRUCT_FIELD(x) x diff --git a/examples/device/net_lwip_webserver/src/lwipopts.h b/examples/device/net_lwip_webserver/src/lwipopts.h index a215017c7..336c9243d 100644 --- a/examples/device/net_lwip_webserver/src/lwipopts.h +++ b/examples/device/net_lwip_webserver/src/lwipopts.h @@ -1,8 +1,8 @@ /* * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, @@ -11,21 +11,21 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. + * derived from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY * OF SUCH DAMAGE. * * This file is part of the lwIP TCP/IP stack. - * + * * Author: Simon Goldschmidt * */ diff --git a/examples/device/net_lwip_webserver/src/main.c b/examples/device/net_lwip_webserver/src/main.c index 33b4d38b6..88081ffe2 100644 --- a/examples/device/net_lwip_webserver/src/main.c +++ b/examples/device/net_lwip_webserver/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Peter Lawrence @@ -39,7 +39,7 @@ and likely their manufacturer has not tested such functionality. Some code work The smartphone may only have an ECM driver, but refuse to automatically pick ECM (unlike the OSes above); try modifying ./examples/devices/net_lwip_webserver/usb_descriptors.c so that CONFIG_ID_ECM is default. -The smartphone may be artificially picky about which Ethernet MAC address to recognize; if this happens, +The smartphone may be artificially picky about which Ethernet MAC address to recognize; if this happens, try changing the first byte of tud_network_mac_address[] below from 0x02 to 0x00 (clearing bit 1). */ @@ -170,7 +170,7 @@ bool dns_query_proc(const char *name, ip4_addr_t *addr) bool tud_network_recv_cb(const uint8_t *src, uint16_t size) { - /* this shouldn't happen, but if we get another packet before + /* this shouldn't happen, but if we get another packet before parsing the previous, we must signal our inability to accept it */ if (received_frame) return false; diff --git a/examples/device/net_lwip_webserver/src/usb_descriptors.c b/examples/device/net_lwip_webserver/src/usb_descriptors.c index bee51790a..3c0ed3db7 100644 --- a/examples/device/net_lwip_webserver/src/usb_descriptors.c +++ b/examples/device/net_lwip_webserver/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -77,7 +77,7 @@ tusb_desc_device_t const desc_device = .bDeviceClass = TUSB_CLASS_MISC, .bDeviceSubClass = MISC_SUBCLASS_COMMON, .bDeviceProtocol = MISC_PROTOCOL_IAD, - + .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE, .idVendor = 0xCafe, diff --git a/examples/device/uac2_headset/CMakeLists.txt b/examples/device/uac2_headset/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/uac2_headset/CMakeLists.txt +++ b/examples/device/uac2_headset/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/uac2_headset/src/main.c b/examples/device/uac2_headset/src/main.c index 01707d51b..bafd40d34 100644 --- a/examples/device/uac2_headset/src/main.c +++ b/examples/device/uac2_headset/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Jerzy Kasenberg @@ -176,7 +176,7 @@ static bool tud_audio_clock_get_request(uint8_t rhport, audio_control_request_t rangef.subrange[i].bRes = 0; TU_LOG1("Range %d (%d, %d, %d)\r\n", i, (int)rangef.subrange[i].bMin, (int)rangef.subrange[i].bMax, (int)rangef.subrange[i].bRes); } - + return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &rangef, sizeof(rangef)); } } diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c index 07c86b903..0a0b4c602 100644 --- a/examples/device/uac2_headset/src/usb_descriptors.c +++ b/examples/device/uac2_headset/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) diff --git a/examples/device/uac2_headset/src/usb_descriptors.h b/examples/device/uac2_headset/src/usb_descriptors.h index 342b4fac1..5525c916a 100644 --- a/examples/device/uac2_headset/src/usb_descriptors.h +++ b/examples/device/uac2_headset/src/usb_descriptors.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Jerzy Kasenbreg diff --git a/examples/device/usbtmc/CMakeLists.txt b/examples/device/usbtmc/CMakeLists.txt index c49603c26..b4678dc5e 100644 --- a/examples/device/usbtmc/CMakeLists.txt +++ b/examples/device/usbtmc/CMakeLists.txt @@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/usbtmc/src/main.c b/examples/device/usbtmc/src/main.c index 6945d8743..da7f0418a 100644 --- a/examples/device/usbtmc/src/main.c +++ b/examples/device/usbtmc/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/usbtmc/visaQuery.py b/examples/device/usbtmc/visaQuery.py index c4e5ad2b9..ca65daf97 100644 --- a/examples/device/usbtmc/visaQuery.py +++ b/examples/device/usbtmc/visaQuery.py @@ -36,8 +36,8 @@ def test_trig(): time.sleep(0.3) # SRQ may have some delay assert (inst.read_stb() & 0x40), "SRQ not set after 0.3 seconds" assert (inst.read_stb() == 0) - - + + def test_mav(): inst.write("delay 50") inst.read_stb() # clear STB @@ -45,15 +45,15 @@ def test_mav(): inst.write("123") time.sleep(0.3) assert (inst.read_stb() & 0x10), "MAV not set after 0.5 seconds" - + rsp = inst.read() assert(rsp == "123\r\n") - - + + def test_srq(): assert (inst.read_stb() == 0) inst.write("123") - + #inst.enable_event(pyvisa.constants.VI_EVENT_SERVICE_REQ, pyvisa.constants.VI_QUEUE) #waitrsp = inst.wait_on_event(pyvisa.constants.VI_EVENT_SERVICE_REQ, 5000) #inst.discard_events(pyvisa.constants.VI_EVENT_SERVICE_REQ, pyvisa.constants.VI_QUEUE) @@ -64,7 +64,7 @@ def test_srq(): assert (stb == 0x50),msg assert (inst.read_stb() == 0x10), "SRQ set at second read!" - + rsp = inst.read() assert(rsp == "123\r\n") @@ -110,7 +110,7 @@ def test_abort_in(): inst.timeout = 800 y = inst.read() assert(y == "xxx\r\n") - + def test_indicate(): # perform indicator pulse usb_iface = inst.get_visa_attribute(pyvisa.constants.VI_ATTR_USB_INTFC_NUM) @@ -120,8 +120,8 @@ def test_indicate(): assert(retv == b'\x01') else: assert((retv[1] == pyvisa.constants.StatusCode(0)) and (retv[0] == b'\x01')), f"indicator pulse failed: retv={retv}" - - + + def test_multi_read(): old_chunk_size = inst.chunk_size longstr = "0123456789abcdefghijklmnopqrstuvwxyz" * 10 @@ -133,7 +133,7 @@ def test_multi_read(): y = inst.read() assert (x + "\r\n" == y) #inst.chunk_size = old_chunk_size - + def test_stall_ep0(): usb_iface = inst.get_visa_attribute(pyvisa.constants.VI_ATTR_USB_INTFC_NUM) inst.read_stb() @@ -143,7 +143,7 @@ def test_stall_ep0(): assert(False) except pyvisa.VisaIOError: pass - + assert (inst.read_stb() == 0) @@ -153,7 +153,7 @@ print(reslist) if (len(reslist) == 0): sys.exit() - + inst = rm.open_resource(reslist[0]); inst.timeout = 3000 diff --git a/examples/device/video_capture/CMakeLists.txt b/examples/device/video_capture/CMakeLists.txt index b92a2b804..f1ef247e1 100644 --- a/examples/device/video_capture/CMakeLists.txt +++ b/examples/device/video_capture/CMakeLists.txt @@ -31,4 +31,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/video_capture/src/main.c b/examples/device/video_capture/src/main.c index 3ceebe821..08db1b00f 100644 --- a/examples/device/video_capture/src/main.c +++ b/examples/device/video_capture/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c index 0cf772010..af18d15d1 100644 --- a/examples/device/video_capture/src/usb_descriptors.c +++ b/examples/device/video_capture/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/video_capture/src/usb_descriptors.h b/examples/device/video_capture/src/usb_descriptors.h index f1ed3c8e9..93f148a82 100644 --- a/examples/device/video_capture/src/usb_descriptors.h +++ b/examples/device/video_capture/src/usb_descriptors.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Jerzy Kasenbreg diff --git a/examples/device/webusb_serial/CMakeLists.txt b/examples/device/webusb_serial/CMakeLists.txt index abc4d91da..acaa54198 100644 --- a/examples/device/webusb_serial/CMakeLists.txt +++ b/examples/device/webusb_serial/CMakeLists.txt @@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/examples/device/webusb_serial/src/main.c b/examples/device/webusb_serial/src/main.c index 604d30a83..24456f9f3 100644 --- a/examples/device/webusb_serial/src/main.c +++ b/examples/device/webusb_serial/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/webusb_serial/src/usb_descriptors.c b/examples/device/webusb_serial/src/usb_descriptors.c index 99f5caaf9..b2593001c 100644 --- a/examples/device/webusb_serial/src/usb_descriptors.c +++ b/examples/device/webusb_serial/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/device/webusb_serial/src/usb_descriptors.h b/examples/device/webusb_serial/src/usb_descriptors.h index 19f1ff3f3..a1c4a2cf1 100644 --- a/examples/device/webusb_serial/src/usb_descriptors.h +++ b/examples/device/webusb_serial/src/usb_descriptors.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/dual/host_hid_to_device_cdc/src/main.c b/examples/dual/host_hid_to_device_cdc/src/main.c index bd7870274..817c63c70 100644 --- a/examples/dual/host_hid_to_device_cdc/src/main.c +++ b/examples/dual/host_hid_to_device_cdc/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c b/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c index 6b0a89127..63b6bc603 100644 --- a/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c +++ b/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/host/bare_api/src/main.c b/examples/host/bare_api/src/main.c index 51cab2de0..bb7fa850e 100644 --- a/examples/host/bare_api/src/main.c +++ b/examples/host/bare_api/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c index b34810252..23312296f 100644 --- a/examples/host/cdc_msc_hid/src/main.c +++ b/examples/host/cdc_msc_hid/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/host/cdc_msc_hid/src/msc_app.c b/examples/host/cdc_msc_hid/src/msc_app.c index 797d55f8a..e9c9676b8 100644 --- a/examples/host/cdc_msc_hid/src/msc_app.c +++ b/examples/host/cdc_msc_hid/src/msc_app.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -68,4 +68,3 @@ void tuh_msc_umount_cb(uint8_t dev_addr) (void) dev_addr; printf("A MassStorage device is unmounted\r\n"); } - diff --git a/examples/host/hid_controller/src/main.c b/examples/host/hid_controller/src/main.c index 299a3ff10..3380e9246 100644 --- a/examples/host/hid_controller/src/main.c +++ b/examples/host/hid_controller/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/host/msc_file_explorer/src/main.c b/examples/host/msc_file_explorer/src/main.c index ab2cfd498..40c88a7d3 100644 --- a/examples/host/msc_file_explorer/src/main.c +++ b/examples/host/msc_file_explorer/src/main.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/host/msc_file_explorer/src/msc_app.c b/examples/host/msc_file_explorer/src/msc_app.c index eef28fe12..003e2865b 100644 --- a/examples/host/msc_file_explorer/src/msc_app.c +++ b/examples/host/msc_file_explorer/src/msc_app.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/examples/rules.mk b/examples/rules.mk index f8e4001ec..56ad89fd0 100644 --- a/examples/rules.mk +++ b/examples/rules.mk @@ -283,4 +283,4 @@ copy-artifact: $(BIN) # Print out the value of a make variable. # https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile print-%: - @echo $* = $($*) \ No newline at end of file + @echo $* = $($*) diff --git a/hw/bsp/ansi_escape.h b/hw/bsp/ansi_escape.h index 6e62ee20a..15af2f3ab 100644 --- a/hw/bsp/ansi_escape.h +++ b/hw/bsp/ansi_escape.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/board.c b/hw/bsp/board.c index 14858c2b6..e715bdf2e 100644 --- a/hw/bsp/board.c +++ b/hw/bsp/board.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) diff --git a/hw/bsp/board.h b/hw/bsp/board.h index 0a10294d0..036556731 100644 --- a/hw/bsp/board.h +++ b/hw/bsp/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h index 1d3565d5c..84a106346 100644 --- a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h +++ b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk index 52e9e45c4..77811d18d 100644 --- a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk +++ b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk @@ -2,4 +2,4 @@ CFLAGS += -mcpu=arm1176jzf-s \ -DBCM_VERSION=2835 \ -DCFG_TUSB_MCU=OPT_MCU_BCM2835 -SUFFIX = +SUFFIX = diff --git a/hw/bsp/broadcom_32bit/family.c b/hw/bsp/broadcom_32bit/family.c index f7a11fb49..42ad4b666 100644 --- a/hw/bsp/broadcom_32bit/family.c +++ b/hw/bsp/broadcom_32bit/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.h b/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.h index 1d3565d5c..84a106346 100644 --- a/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.h +++ b/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.h b/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.h index 1d3565d5c..84a106346 100644 --- a/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.h +++ b/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/broadcom_64bit/family.c b/hw/bsp/broadcom_64bit/family.c index f7a11fb49..42ad4b666 100644 --- a/hw/bsp/broadcom_64bit/family.c +++ b/hw/bsp/broadcom_64bit/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/brtmm90x/family.c b/hw/bsp/brtmm90x/family.c index 3b6b03904..f812c922f 100644 --- a/hw/bsp/brtmm90x/family.c +++ b/hw/bsp/brtmm90x/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright 2021 Bridgetek Pte Ltd @@ -70,7 +70,7 @@ void board_init(void) board_uart_write(WELCOME_MSG, sizeof(WELCOME_MSG)); #ifdef BOARD_GPIO_LED - gpio_function(BOARD_GPIO_LED, pad_func_0); + gpio_function(BOARD_GPIO_LED, pad_func_0); gpio_idrive(BOARD_GPIO_LED, pad_drive_12mA); gpio_dir(BOARD_GPIO_LED, pad_dir_output); #endif @@ -233,7 +233,7 @@ int board_uart_write(void const *buf, int len) uint32_t board_millis(void) { uint32_t safe_ms; - + CRITICAL_SECTION_BEGIN safe_ms = timer_ms; CRITICAL_SECTION_END @@ -254,4 +254,3 @@ void chip_reboot(void) dbg_memory_copy(0xfe, 0, 0, 255); #endif } - diff --git a/hw/bsp/brtmm90x/family.mk b/hw/bsp/brtmm90x/family.mk index 0ddf47a3a..6df0bfdfe 100644 --- a/hw/bsp/brtmm90x/family.mk +++ b/hw/bsp/brtmm90x/family.mk @@ -5,7 +5,7 @@ SKIP_NANOLIB = 1 # Set to use FT90X prebuilt libraries. FT9XX_PREBUILT_LIBS = 0 ifeq ($(FT9XX_PREBUILT_LIBS),1) -# If the FT90X toolchain is installed on Windows systems then the SDK +# If the FT90X toolchain is installed on Windows systems then the SDK # include files and prebuilt libraries are at: %FT90X_TOOLCHAIN%/hardware FT9XX_SDK = $(FT90X_TOOLCHAIN)/hardware INC += "$(FT9XX_SDK)/include" @@ -21,7 +21,7 @@ endif # Add include files which are within the TinyUSB directory structure. INC += \ - $(TOP)/$(BOARD_PATH) + $(TOP)/$(BOARD_PATH) # Add required C Compiler flags for FT90X. CFLAGS += \ @@ -30,7 +30,7 @@ CFLAGS += \ -fvar-tracking-assignments \ -fmessage-length=0 \ -ffunction-sections \ - -DCFG_TUSB_MCU=OPT_MCU_FT90X + -DCFG_TUSB_MCU=OPT_MCU_FT90X # Maximum USB device speed supported by the board CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED @@ -45,7 +45,7 @@ LDFLAGS += $(addprefix -L,$(LDINC)) \ -Wl,-lc # Additional Source files for FT90X. -SRC_C += src/portable/bridgetek/ft9xx/dcd_ft9xx.c +SRC_C += src/portable/bridgetek/ft9xx/dcd_ft9xx.c # Linker library. ifneq ($(FT9XX_PREBUILT_LIBS),1) diff --git a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.h b/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.h index 0eab34916..7b488096e 100644 --- a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.h +++ b/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2023 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c b/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c index 45fc9e3aa..db3551ca7 100644 --- a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c +++ b/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c @@ -36,7 +36,7 @@ static unsigned int tx_produce; static volatile unsigned int tx_consume; void USART1_IRQHandler(void) __attribute__((naked)); -void USART1_IRQHandler(void) { +void USART1_IRQHandler(void) { __asm volatile ("call USART1_IRQHandler_impl; mret"); } @@ -57,7 +57,7 @@ __attribute__((used)) void USART1_IRQHandler_impl(void) void uart_write(char c) { unsigned int tx_produce_next = (tx_produce + 1) & UART_RINGBUFFER_MASK_TX; - + NVIC_DisableIRQ(USART1_IRQn); if((tx_consume != tx_produce) || (USART_GetFlagStatus(USART1, USART_FLAG_TXE) == RESET)) { tx_buf[tx_produce] = c; diff --git a/hw/bsp/ch32v307/ch32v307.ld b/hw/bsp/ch32v307/ch32v307.ld index af7c06615..55bd10cd0 100644 --- a/hw/bsp/ch32v307/ch32v307.ld +++ b/hw/bsp/ch32v307/ch32v307.ld @@ -41,7 +41,7 @@ SECTIONS *(.glue_7t) *(.gnu.linkonce.t.*) . = ALIGN(4); - } >FLASH AT>FLASH + } >FLASH AT>FLASH .fini : { @@ -50,31 +50,31 @@ SECTIONS } >FLASH AT>FLASH PROVIDE( _etext = . ); - PROVIDE( _eitcm = . ); + PROVIDE( _eitcm = . ); .preinit_array : { PROVIDE_HIDDEN (__preinit_array_start = .); KEEP (*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - } >FLASH AT>FLASH - + } >FLASH AT>FLASH + .init_array : { PROVIDE_HIDDEN (__init_array_start = .); KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) PROVIDE_HIDDEN (__init_array_end = .); - } >FLASH AT>FLASH - + } >FLASH AT>FLASH + .fini_array : { PROVIDE_HIDDEN (__fini_array_start = .); KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) PROVIDE_HIDDEN (__fini_array_end = .); - } >FLASH AT>FLASH - + } >FLASH AT>FLASH + .ctors : { /* gcc uses crtbegin.o to find the start of @@ -95,8 +95,8 @@ SECTIONS KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) - } >FLASH AT>FLASH - + } >FLASH AT>FLASH + .dtors : { KEEP (*crtbegin.o(.dtors)) @@ -104,17 +104,17 @@ SECTIONS KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) - } >FLASH AT>FLASH + } >FLASH AT>FLASH .dalign : { . = ALIGN(4); PROVIDE(_data_vma = .); - } >RAM AT>FLASH + } >RAM AT>FLASH .dlalign : { - . = ALIGN(4); + . = ALIGN(4); PROVIDE(_data_lma = .); } >FLASH AT>FLASH @@ -145,7 +145,7 @@ SECTIONS *(.sbss*) *(.gnu.linkonce.sb.*) *(.bss*) - *(.gnu.linkonce.b.*) + *(.gnu.linkonce.b.*) *(COMMON*) . = ALIGN(4); PROVIDE( _ebss = .); @@ -156,15 +156,12 @@ SECTIONS .stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size : { - PROVIDE( _heap_end = . ); + PROVIDE( _heap_end = . ); . = ALIGN(4); PROVIDE(_susrstack = . ); . = . + __stack_size; PROVIDE( _eusrstack = .); __freertos_irq_stack_top = .; - } >RAM + } >RAM } - - - diff --git a/hw/bsp/ch32v307/ch32v30x_conf.h b/hw/bsp/ch32v307/ch32v30x_conf.h index 399feaf68..0b86ad390 100644 --- a/hw/bsp/ch32v307/ch32v30x_conf.h +++ b/hw/bsp/ch32v307/ch32v30x_conf.h @@ -6,7 +6,7 @@ * Description : Library configuration file. * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. * SPDX-License-Identifier: Apache-2.0 -*******************************************************************************/ +*******************************************************************************/ #ifndef __CH32V30x_CONF_H #define __CH32V30x_CONF_H @@ -36,8 +36,3 @@ #endif /* __CH32V30x_CONF_H */ - - - - - diff --git a/hw/bsp/ch32v307/ch32v30x_it.c b/hw/bsp/ch32v307/ch32v30x_it.c index d348dd989..c329c5613 100644 --- a/hw/bsp/ch32v307/ch32v30x_it.c +++ b/hw/bsp/ch32v307/ch32v30x_it.c @@ -45,5 +45,3 @@ __attribute__((used)) void HardFault_Handler_impl(void) { } } - - diff --git a/hw/bsp/ch32v307/ch32v30x_it.h b/hw/bsp/ch32v307/ch32v30x_it.h index 42f285edf..f3977a8be 100644 --- a/hw/bsp/ch32v307/ch32v30x_it.h +++ b/hw/bsp/ch32v307/ch32v30x_it.h @@ -14,5 +14,3 @@ #endif /* __CH32V30x_IT_H */ - - diff --git a/hw/bsp/ch32v307/core_riscv.h b/hw/bsp/ch32v307/core_riscv.h index 2e94ec683..a7ce10a00 100644 --- a/hw/bsp/ch32v307/core_riscv.h +++ b/hw/bsp/ch32v307/core_riscv.h @@ -336,7 +336,7 @@ RV_STATIC_INLINE void NVIC_SystemReset(void) } -/* Core_Exported_Functions */ +/* Core_Exported_Functions */ extern uint32_t __get_FFLAGS(void); extern void __set_FFLAGS(uint32_t value); extern uint32_t __get_FRM(void); @@ -377,8 +377,3 @@ extern uint32_t __get_SP(void); #endif - - - - - diff --git a/hw/bsp/ch32v307/system_ch32v30x.c b/hw/bsp/ch32v307/system_ch32v30x.c index 12b18d7b8..23f783df4 100644 --- a/hw/bsp/ch32v307/system_ch32v30x.c +++ b/hw/bsp/ch32v307/system_ch32v30x.c @@ -8,17 +8,17 @@ * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. * SPDX-License-Identifier: Apache-2.0 *********************************************************************************/ -#include "ch32v30x.h" +#include "ch32v30x.h" -/* -* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after +/* +* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after * reset the HSI is used as SYSCLK source). -* If none of the define below is enabled, the HSI is used as System clock source. +* If none of the define below is enabled, the HSI is used as System clock source. */ // #define SYSCLK_FREQ_HSE HSE_VALUE -/* #define SYSCLK_FREQ_24MHz 24000000 */ +/* #define SYSCLK_FREQ_24MHz 24000000 */ //#define SYSCLK_FREQ_48MHz 48000000 -/* #define SYSCLK_FREQ_56MHz 56000000 */ +/* #define SYSCLK_FREQ_56MHz 56000000 */ //#define SYSCLK_FREQ_72MHz 72000000 //#define SYSCLK_FREQ_96MHz 96000000 //#define SYSCLK_FREQ_120MHz 120000000 @@ -60,7 +60,7 @@ static void SetSysClock(void); #elif defined SYSCLK_FREQ_48MHz static void SetSysClockTo48(void); #elif defined SYSCLK_FREQ_56MHz - static void SetSysClockTo56(void); + static void SetSysClockTo56(void); #elif defined SYSCLK_FREQ_72MHz static void SetSysClockTo72(void); @@ -90,7 +90,7 @@ void SystemInit (void) RCC->CFGR0 &= (uint32_t)0xF8FF0000; #else RCC->CFGR0 &= (uint32_t)0xF0FF0000; -#endif +#endif RCC->CTLR &= (uint32_t)0xFEF6FFFF; RCC->CTLR &= (uint32_t)0xFFFBFFFF; @@ -101,8 +101,8 @@ void SystemInit (void) RCC->INTR = 0x00FF0000; RCC->CFGR2 = 0x00000000; #else - RCC->INTR = 0x009F0000; -#endif + RCC->INTR = 0x009F0000; +#endif SetSysClock(); } @@ -118,18 +118,18 @@ void SystemCoreClockUpdate (void) uint32_t tmp = 0, pllmull = 0, pllsource = 0, Pll_6_5 = 0; tmp = RCC->CFGR0 & RCC_SWS; - + switch (tmp) { case 0x00: SystemCoreClock = HSI_VALUE; break; - case 0x04: + case 0x04: SystemCoreClock = HSE_VALUE; break; - case 0x08: + case 0x08: pllmull = RCC->CFGR0 & RCC_PLLMULL; - pllsource = RCC->CFGR0 & RCC_PLLSRC; + pllsource = RCC->CFGR0 & RCC_PLLSRC; pllmull = ( pllmull >> 18) + 2; #ifdef CH32V30x_D8 @@ -149,7 +149,7 @@ void SystemCoreClockUpdate (void) SystemCoreClock = (HSI_VALUE >> 1) * pllmull; } else - { + { if ((RCC->CFGR0 & RCC_PLLXTPRE) != (uint32_t)RESET) { SystemCoreClock = (HSE_VALUE >> 1) * pllmull; @@ -167,9 +167,9 @@ void SystemCoreClockUpdate (void) SystemCoreClock = HSI_VALUE; break; } - + tmp = AHBPrescTable[((RCC->CFGR0 & RCC_HPRE) >> 4)]; - SystemCoreClock >>= tmp; + SystemCoreClock >>= tmp; } /********************************************************************* @@ -188,7 +188,7 @@ static void SetSysClock(void) #elif defined SYSCLK_FREQ_48MHz SetSysClockTo48(); #elif defined SYSCLK_FREQ_56MHz - SetSysClockTo56(); + SetSysClockTo56(); #elif defined SYSCLK_FREQ_72MHz SetSysClockTo72(); #elif defined SYSCLK_FREQ_96MHz @@ -199,9 +199,9 @@ static void SetSysClock(void) SetSysClockTo144(); #endif - + /* If none of the define above is enabled, the HSI is used as System clock - * source (default after reset) + * source (default after reset) */ } @@ -218,14 +218,14 @@ static void SetSysClock(void) static void SetSysClockToHSE(void) { __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - + RCC->CTLR |= ((uint32_t)RCC_HSEON); - + /* Wait till HSE is ready and if Time out is reached exit */ do { HSEStatus = RCC->CTLR & RCC_HSERDY; - StartUpCounter++; + StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); if ((RCC->CTLR & RCC_HSERDY) != RESET) @@ -235,20 +235,20 @@ static void SetSysClockToHSE(void) else { HSEStatus = (uint32_t)0x00; - } + } if (HSEStatus == (uint32_t)0x01) { /* HCLK = SYSCLK */ - RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; /* PCLK2 = HCLK */ RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; /* PCLK1 = HCLK */ RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV1; - + /* Select HSE as system clock source */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); - RCC->CFGR0 |= (uint32_t)RCC_SW_HSE; + RCC->CFGR0 |= (uint32_t)RCC_SW_HSE; /* Wait till HSE is used as system clock source */ while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x04) @@ -256,11 +256,11 @@ static void SetSysClockToHSE(void) } } else - { + { /* If HSE fails to start-up, the application will have wrong clock - * configuration. User can add here some code to deal with this error + * configuration. User can add here some code to deal with this error */ - } + } } #elif defined SYSCLK_FREQ_24MHz @@ -275,14 +275,14 @@ static void SetSysClockToHSE(void) static void SetSysClockTo24(void) { __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - + RCC->CTLR |= ((uint32_t)RCC_HSEON); - + /* Wait till HSE is ready and if Time out is reached exit */ do { HSEStatus = RCC->CTLR & RCC_HSERDY; - StartUpCounter++; + StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); if ((RCC->CTLR & RCC_HSERDY) != RESET) @@ -292,13 +292,13 @@ static void SetSysClockTo24(void) else { HSEStatus = (uint32_t)0x00; - } + } if (HSEStatus == (uint32_t)0x01) { /* HCLK = SYSCLK */ - RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; /* PCLK2 = HCLK */ - RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; /* PCLK1 = HCLK */ RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV1; @@ -318,18 +318,18 @@ static void SetSysClockTo24(void) } /* Select PLL as system clock source */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); - RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; /* Wait till PLL is used as system clock source */ while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) { } } else - { + { /* If HSE fails to start-up, the application will have wrong clock - * configuration. User can add here some code to deal with this error + * configuration. User can add here some code to deal with this error */ - } + } } #elif defined SYSCLK_FREQ_48MHz @@ -344,14 +344,14 @@ static void SetSysClockTo24(void) static void SetSysClockTo48(void) { __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - + + RCC->CTLR |= ((uint32_t)RCC_HSEON); /* Wait till HSE is ready and if Time out is reached exit */ do { HSEStatus = RCC->CTLR & RCC_HSERDY; - StartUpCounter++; + StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); if ((RCC->CTLR & RCC_HSERDY) != RESET) @@ -361,14 +361,14 @@ static void SetSysClockTo48(void) else { HSEStatus = (uint32_t)0x00; - } + } if (HSEStatus == (uint32_t)0x01) { /* HCLK = SYSCLK */ - RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; /* PCLK2 = HCLK */ - RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; /* PCLK1 = HCLK */ RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; @@ -389,19 +389,19 @@ static void SetSysClockTo48(void) } /* Select PLL as system clock source */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); - RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; /* Wait till PLL is used as system clock source */ while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) { } } else - { + { /* * If HSE fails to start-up, the application will have wrong clock - * configuration. User can add here some code to deal with this error + * configuration. User can add here some code to deal with this error */ - } + } } #elif defined SYSCLK_FREQ_56MHz @@ -416,14 +416,14 @@ static void SetSysClockTo48(void) static void SetSysClockTo56(void) { __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - + RCC->CTLR |= ((uint32_t)RCC_HSEON); /* Wait till HSE is ready and if Time out is reached exit */ do { HSEStatus = RCC->CTLR & RCC_HSERDY; - StartUpCounter++; + StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); if ((RCC->CTLR & RCC_HSERDY) != RESET) @@ -433,17 +433,17 @@ static void SetSysClockTo56(void) else { HSEStatus = (uint32_t)0x00; - } + } if (HSEStatus == (uint32_t)0x01) { /* HCLK = SYSCLK */ - RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; /* PCLK2 = HCLK */ RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; /* PCLK1 = HCLK */ RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; - + /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL)); @@ -462,19 +462,19 @@ static void SetSysClockTo56(void) /* Select PLL as system clock source */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); - RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; /* Wait till PLL is used as system clock source */ while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) { } } else - { + { /* * If HSE fails to start-up, the application will have wrong clock - * configuration. User can add here some code to deal with this error + * configuration. User can add here some code to deal with this error */ - } + } } #elif defined SYSCLK_FREQ_72MHz @@ -489,14 +489,14 @@ static void SetSysClockTo56(void) static void SetSysClockTo72(void) { __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - + RCC->CTLR |= ((uint32_t)RCC_HSEON); - + /* Wait till HSE is ready and if Time out is reached exit */ do { HSEStatus = RCC->CTLR & RCC_HSERDY; - StartUpCounter++; + StartUpCounter++; } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); if ((RCC->CTLR & RCC_HSERDY) != RESET) @@ -506,17 +506,17 @@ static void SetSysClockTo72(void) else { HSEStatus = (uint32_t)0x00; - } + } if (HSEStatus == (uint32_t)0x01) { /* HCLK = SYSCLK */ - RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; /* PCLK2 = HCLK */ - RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; /* PCLK1 = HCLK */ RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; - + /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL)); @@ -532,20 +532,20 @@ static void SetSysClockTo72(void) /* Wait till PLL is ready */ while((RCC->CTLR & RCC_PLLRDY) == 0) { - } + } /* Select PLL as system clock source */ RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); - RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; /* Wait till PLL is used as system clock source */ while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) { } } else - { + { /* * If HSE fails to start-up, the application will have wrong clock - * configuration. User can add here some code to deal with this error + * configuration. User can add here some code to deal with this error */ } } diff --git a/hw/bsp/ch32v307/system_ch32v30x.h b/hw/bsp/ch32v307/system_ch32v30x.h index 0e0ef4e51..ad81058c7 100644 --- a/hw/bsp/ch32v307/system_ch32v30x.h +++ b/hw/bsp/ch32v307/system_ch32v30x.h @@ -7,16 +7,16 @@ * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. * SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ -#ifndef __SYSTEM_CH32V30x_H +#ifndef __SYSTEM_CH32V30x_H #define __SYSTEM_CH32V30x_H #ifdef __cplusplus extern "C" { -#endif +#endif extern uint32_t SystemCoreClock; /* System Clock Frequency (Core Clock) */ -/* System_Exported_Functions */ +/* System_Exported_Functions */ extern void SystemInit(void); extern void SystemCoreClockUpdate(void); @@ -25,6 +25,3 @@ extern void SystemCoreClockUpdate(void); #endif #endif /*__CH32V30x_SYSTEM_H */ - - - diff --git a/hw/bsp/da14695_dk_usb/da14695_dk_usb.c b/hw/bsp/da14695_dk_usb/da14695_dk_usb.c index a4d996810..3abb488f2 100644 --- a/hw/bsp/da14695_dk_usb/da14695_dk_usb.c +++ b/hw/bsp/da14695_dk_usb/da14695_dk_usb.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Jerzy Kasenberg diff --git a/hw/bsp/da14695_dk_usb/da1469x.ld b/hw/bsp/da14695_dk_usb/da1469x.ld index 96507d6e7..8cc1d9d99 100644 --- a/hw/bsp/da14695_dk_usb/da1469x.ld +++ b/hw/bsp/da14695_dk_usb/da1469x.ld @@ -242,4 +242,3 @@ SECTIONS /* Check that intvect is at the beginning of RAM */ ASSERT(__intvect_start__ == ORIGIN(RAM), "intvect is not at beginning of RAM") } - diff --git a/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c b/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c index 13113fb95..abe7f54cb 100644 --- a/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c +++ b/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Jerzy Kasenberg diff --git a/hw/bsp/da1469x_dk_pro/da1469x.ld b/hw/bsp/da1469x_dk_pro/da1469x.ld index 96507d6e7..8cc1d9d99 100644 --- a/hw/bsp/da1469x_dk_pro/da1469x.ld +++ b/hw/bsp/da1469x_dk_pro/da1469x.ld @@ -242,4 +242,3 @@ SECTIONS /* Check that intvect is at the beginning of RAM */ ASSERT(__intvect_start__ == ORIGIN(RAM), "intvect is not at beginning of RAM") } - diff --git a/hw/bsp/ea4088qs/ea4088qs.c b/hw/bsp/ea4088qs/ea4088qs.c index 7150ed393..ace72fef0 100644 --- a/hw/bsp/ea4088qs/ea4088qs.c +++ b/hw/bsp/ea4088qs/ea4088qs.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/ea4088qs/lpc4088.ld b/hw/bsp/ea4088qs/lpc4088.ld index 4b1cddd6e..5897707f6 100644 --- a/hw/bsp/ea4088qs/lpc4088.ld +++ b/hw/bsp/ea4088qs/lpc4088.ld @@ -11,24 +11,24 @@ MEMORY { /* Define each memory region */ - MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ - RamLoc64 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x10000 /* 64K bytes (alias RAM) */ - RamPeriph32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */ + MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ + RamLoc64 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x10000 /* 64K bytes (alias RAM) */ + RamPeriph32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */ } /* Define a symbol for the top of each memory region */ - __base_MFlash512 = 0x0 ; /* MFlash512 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */ - __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */ - __base_RamLoc64 = 0x10000000 ; /* RamLoc64 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_RamLoc64 = 0x10000000 + 0x10000 ; /* 64K bytes */ - __top_RAM = 0x10000000 + 0x10000 ; /* 64K bytes */ - __base_RamPeriph32 = 0x20000000 ; /* RamPeriph32 */ - __base_RAM2 = 0x20000000 ; /* RAM2 */ - __top_RamPeriph32 = 0x20000000 + 0x8000 ; /* 32K bytes */ - __top_RAM2 = 0x20000000 + 0x8000 ; /* 32K bytes */ + __base_MFlash512 = 0x0 ; /* MFlash512 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */ + __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */ + __base_RamLoc64 = 0x10000000 ; /* RamLoc64 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc64 = 0x10000000 + 0x10000 ; /* 64K bytes */ + __top_RAM = 0x10000000 + 0x10000 ; /* 64K bytes */ + __base_RamPeriph32 = 0x20000000 ; /* RamPeriph32 */ + __base_RAM2 = 0x20000000 ; /* RAM2 */ + __top_RamPeriph32 = 0x20000000 + 0x8000 ; /* 32K bytes */ + __top_RAM2 = 0x20000000 + 0x8000 ; /* 32K bytes */ ENTRY(ResetISR) @@ -72,9 +72,9 @@ SECTIONS } > MFlash512 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlash512 @@ -88,7 +88,7 @@ SECTIONS __exidx_end = .; _etext = .; - + /* DATA section for RamPeriph32 */ .data_RAM2 : ALIGN(4) @@ -130,7 +130,7 @@ SECTIONS *(.bss.$RamPeriph32*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM2 = .) ; - } > RamPeriph32 + } > RamPeriph32 /* MAIN BSS SECTION */ .bss : ALIGN(4) @@ -149,13 +149,13 @@ SECTIONS *(.noinit.$RAM2*) *(.noinit.$RamPeriph32*) . = ALIGN(4) ; - } > RamPeriph32 + } > RamPeriph32 /* DEFAULT NOINIT SECTION */ .noinit (NOLOAD): ALIGN(4) { _noinit = .; - *(.noinit*) + *(.noinit*) . = ALIGN(4) ; _end_noinit = .; } > RamLoc64 @@ -163,11 +163,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc64 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -181,4 +181,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/ea4357/ea4357.c b/hw/bsp/ea4357/ea4357.c index f88d3b89e..68bcaa123 100644 --- a/hw/bsp/ea4357/ea4357.c +++ b/hw/bsp/ea4357/ea4357.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/ea4357/lpc4357.ld b/hw/bsp/ea4357/lpc4357.ld index 14a0df328..e3dfbfda1 100644 --- a/hw/bsp/ea4357/lpc4357.ld +++ b/hw/bsp/ea4357/lpc4357.ld @@ -11,44 +11,44 @@ MEMORY { /* Define each memory region */ - MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ - MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */ - RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ - RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */ - RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ - RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ - RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ + MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ + MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */ + RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ + RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */ + RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ + RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ + RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ } /* Define a symbol for the top of each memory region */ - __base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */ - __base_Flash = 0x1a000000 ; /* Flash */ - __top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */ - __top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */ - __base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */ - __base_Flash2 = 0x1b000000 ; /* Flash2 */ - __top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */ - __top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */ - __base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ - __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ - __base_RamLoc40 = 0x10080000 ; /* RamLoc40 */ - __base_RAM2 = 0x10080000 ; /* RAM2 */ - __top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */ - __top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */ - __base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ - __base_RAM3 = 0x20000000 ; /* RAM3 */ - __top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ - __top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ - __base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ - __base_RAM4 = 0x20008000 ; /* RAM4 */ - __top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ - __top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ - __base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ - __base_RAM5 = 0x2000c000 ; /* RAM5 */ - __top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ - __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */ + __base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */ + __base_Flash = 0x1a000000 ; /* Flash */ + __top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */ + __top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */ + __base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */ + __base_Flash2 = 0x1b000000 ; /* Flash2 */ + __top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */ + __top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */ + __base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ + __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ + __base_RamLoc40 = 0x10080000 ; /* RamLoc40 */ + __base_RAM2 = 0x10080000 ; /* RAM2 */ + __top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */ + __top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */ + __base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ + __base_RAM3 = 0x20000000 ; /* RAM3 */ + __top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ + __top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ + __base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ + __base_RAM4 = 0x20008000 ; /* RAM4 */ + __top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ + __top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ + __base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ + __base_RAM5 = 0x2000c000 ; /* RAM5 */ + __top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ + __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */ ENTRY(ResetISR) @@ -119,9 +119,9 @@ SECTIONS } > MFlashA512 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlashA512 @@ -135,7 +135,7 @@ SECTIONS __exidx_end = .; _etext = .; - + /* DATA section for RamLoc40 */ .data_RAM2 : ALIGN(4) @@ -216,7 +216,7 @@ SECTIONS *(.bss.$RamLoc40*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM2 = .) ; - } > RamLoc40 + } > RamLoc40 /* BSS section for RamAHB32 */ .bss_RAM3 : ALIGN(4) @@ -226,7 +226,7 @@ SECTIONS *(.bss.$RamAHB32*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM3 = .) ; - } > RamAHB32 + } > RamAHB32 /* BSS section for RamAHB16 */ .bss_RAM4 : ALIGN(4) @@ -236,7 +236,7 @@ SECTIONS *(.bss.$RamAHB16*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM4 = .) ; - } > RamAHB16 + } > RamAHB16 /* BSS section for RamAHB_ETB16 */ .bss_RAM5 : ALIGN(4) @@ -246,7 +246,7 @@ SECTIONS *(.bss.$RamAHB_ETB16*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM5 = .) ; - } > RamAHB_ETB16 + } > RamAHB_ETB16 /* MAIN BSS SECTION */ .bss : ALIGN(4) @@ -265,7 +265,7 @@ SECTIONS *(.noinit.$RAM2*) *(.noinit.$RamLoc40*) . = ALIGN(4) ; - } > RamLoc40 + } > RamLoc40 /* NOINIT section for RamAHB32 */ .noinit_RAM3 (NOLOAD) : ALIGN(4) @@ -273,7 +273,7 @@ SECTIONS *(.noinit.$RAM3*) *(.noinit.$RamAHB32*) . = ALIGN(4) ; - } > RamAHB32 + } > RamAHB32 /* NOINIT section for RamAHB16 */ .noinit_RAM4 (NOLOAD) : ALIGN(4) @@ -281,7 +281,7 @@ SECTIONS *(.noinit.$RAM4*) *(.noinit.$RamAHB16*) . = ALIGN(4) ; - } > RamAHB16 + } > RamAHB16 /* NOINIT section for RamAHB_ETB16 */ .noinit_RAM5 (NOLOAD) : ALIGN(4) @@ -289,13 +289,13 @@ SECTIONS *(.noinit.$RAM5*) *(.noinit.$RamAHB_ETB16*) . = ALIGN(4) ; - } > RamAHB_ETB16 + } > RamAHB_ETB16 /* DEFAULT NOINIT SECTION */ .noinit (NOLOAD): ALIGN(4) { _noinit = .; - *(.noinit*) + *(.noinit*) . = ALIGN(4) ; _end_noinit = .; } > RamLoc32 @@ -303,11 +303,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -321,4 +321,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/ea4357/pca9532.c b/hw/bsp/ea4357/pca9532.c index eae3805c2..150167cde 100644 --- a/hw/bsp/ea4357/pca9532.c +++ b/hw/bsp/ea4357/pca9532.c @@ -57,7 +57,7 @@ static uint16_t ledStateShadow = 0; * Local Functions *****************************************************************************/ -static Status I2CWrite(uint32_t addr, uint8_t* buf, uint32_t len) +static Status I2CWrite(uint32_t addr, uint8_t* buf, uint32_t len) { I2CM_XFER_T i2cData; @@ -75,7 +75,7 @@ static Status I2CWrite(uint32_t addr, uint8_t* buf, uint32_t len) return SUCCESS; } -static Status I2CRead(uint32_t addr, uint8_t* buf, uint32_t len) +static Status I2CRead(uint32_t addr, uint8_t* buf, uint32_t len) { I2CM_XFER_T i2cData; @@ -181,7 +181,7 @@ uint16_t pca9532_getLedState (uint32_t shadow) * A blinking LED may be reported as on or off depending on * its state when reading the Input register. */ - + buf[0] = PCA9532_INPUT0; I2CWrite(PCA9532_I2C_ADDR, buf, 1); diff --git a/hw/bsp/ea4357/pca9532.h b/hw/bsp/ea4357/pca9532.h index 7a7c6e145..f21c1ff09 100644 --- a/hw/bsp/ea4357/pca9532.h +++ b/hw/bsp/ea4357/pca9532.h @@ -48,7 +48,7 @@ #define KEY_MASK 0x000F /* - * MMC Card Detect and MMC Write Protect are mapped to LED4 + * MMC Card Detect and MMC Write Protect are mapped to LED4 * and LED5 on the PCA9532. Please note that WP is active low. */ diff --git a/hw/bsp/esp32s2/boards/CMakeLists.txt b/hw/bsp/esp32s2/boards/CMakeLists.txt index c3c687a70..ff90acbde 100644 --- a/hw/bsp/esp32s2/boards/CMakeLists.txt +++ b/hw/bsp/esp32s2/boards/CMakeLists.txt @@ -8,5 +8,5 @@ include("${BOARD}/board.cmake") target_include_directories(${COMPONENT_TARGET} PUBLIC "${TOP}/hw" - "${TOP}/src" + "${TOP}/src" ) diff --git a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake b/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake index d33962676..e39ceb887 100644 --- a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake +++ b/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake @@ -14,4 +14,4 @@ set(IDF_TARGET "esp32s2" FORCE) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h b/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h index 43e00901d..1f8dc2cea 100644 --- a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h +++ b/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake b/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake index d33962676..e39ceb887 100644 --- a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake +++ b/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake @@ -14,4 +14,4 @@ set(IDF_TARGET "esp32s2" FORCE) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h b/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h index 16e30b685..084a7aaf2 100644 --- a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h +++ b/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake b/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake index d5c17b9be..16b0e9cdd 100644 --- a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake +++ b/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake @@ -14,4 +14,4 @@ set(IDF_TARGET "esp32s2" FORCE) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h b/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h index 49a2474bc..2ec80ef47 100644 --- a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h +++ b/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s2/boards/esp32s2.c b/hw/bsp/esp32s2/boards/esp32s2.c index a7ca82deb..015d8305b 100644 --- a/hw/bsp/esp32s2/boards/esp32s2.c +++ b/hw/bsp/esp32s2/boards/esp32s2.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) @@ -150,4 +150,3 @@ int board_uart_write(void const * buf, int len) (void) buf; (void) len; return 0; } - diff --git a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake b/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake index d5c17b9be..16b0e9cdd 100644 --- a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake +++ b/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake @@ -14,4 +14,4 @@ set(IDF_TARGET "esp32s2" FORCE) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h b/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h index 6bb44f76d..0acb9c439 100644 --- a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h +++ b/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake b/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake index d5c17b9be..16b0e9cdd 100644 --- a/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake +++ b/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake @@ -14,4 +14,4 @@ set(IDF_TARGET "esp32s2" FORCE) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s2/boards/espressif_saola_1/board.h b/hw/bsp/esp32s2/boards/espressif_saola_1/board.h index f450b9a8b..e068efef9 100644 --- a/hw/bsp/esp32s2/boards/espressif_saola_1/board.h +++ b/hw/bsp/esp32s2/boards/espressif_saola_1/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s2/components/led_strip/CMakeLists.txt b/hw/bsp/esp32s2/components/led_strip/CMakeLists.txt index 6d0fcbc86..8266c5a1c 100644 --- a/hw/bsp/esp32s2/components/led_strip/CMakeLists.txt +++ b/hw/bsp/esp32s2/components/led_strip/CMakeLists.txt @@ -5,4 +5,3 @@ idf_component_register(SRCS "${component_srcs}" PRIV_INCLUDE_DIRS "" PRIV_REQUIRES "driver" REQUIRES "") - diff --git a/hw/bsp/esp32s2/family.cmake b/hw/bsp/esp32s2/family.cmake index f3d41d041..0973adcac 100644 --- a/hw/bsp/esp32s2/family.cmake +++ b/hw/bsp/esp32s2/family.cmake @@ -1,7 +1,7 @@ cmake_minimum_required(VERSION 3.5) # Add example src and bsp directories -set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s2/boards" "${TOP}/hw/bsp/esp32s2/components") +set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s2/boards" "${TOP}/hw/bsp/esp32s2/components") include($ENV{IDF_PATH}/tools/cmake/project.cmake) set(SUPPORTED_TARGETS esp32s2) set(FAMILY_MCUS ESP32S2) diff --git a/hw/bsp/esp32s2/family.mk b/hw/bsp/esp32s2/family.mk index b95098e15..fba0f038b 100644 --- a/hw/bsp/esp32s2/family.mk +++ b/hw/bsp/esp32s2/family.mk @@ -21,4 +21,3 @@ UF2_FAMILY_ID = 0xbfdd4eee $(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).bin @echo CREATE $@ $(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -b 0x0 -c -o $@ $^ - diff --git a/hw/bsp/esp32s3/boards/CMakeLists.txt b/hw/bsp/esp32s3/boards/CMakeLists.txt index e1b921ae9..311c6e900 100644 --- a/hw/bsp/esp32s3/boards/CMakeLists.txt +++ b/hw/bsp/esp32s3/boards/CMakeLists.txt @@ -10,5 +10,5 @@ idf_component_get_property( FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PAT target_include_directories(${COMPONENT_TARGET} PUBLIC "${FREERTOS_ORIG_INCLUDE_PATH}" "${TOP}/hw" - "${TOP}/src" + "${TOP}/src" ) diff --git a/hw/bsp/esp32s3/boards/esp32s3.c b/hw/bsp/esp32s3/boards/esp32s3.c index a7ca82deb..015d8305b 100644 --- a/hw/bsp/esp32s3/boards/esp32s3.c +++ b/hw/bsp/esp32s3/boards/esp32s3.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) @@ -150,4 +150,3 @@ int board_uart_write(void const * buf, int len) (void) buf; (void) len; return 0; } - diff --git a/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake b/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake index 8996ff9dc..2bff4f836 100644 --- a/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake +++ b/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake @@ -4,4 +4,4 @@ target_include_directories(${COMPONENT_LIB} PRIVATE .) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S3" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s3/boards/espressif_addax_1/board.h b/hw/bsp/esp32s3/boards/espressif_addax_1/board.h index fff24ba44..d4690f732 100644 --- a/hw/bsp/esp32s3/boards/espressif_addax_1/board.h +++ b/hw/bsp/esp32s3/boards/espressif_addax_1/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake b/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake index 8996ff9dc..2bff4f836 100644 --- a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake +++ b/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake @@ -4,4 +4,4 @@ target_include_directories(${COMPONENT_LIB} PRIVATE .) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S3" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h b/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h index c7940c56e..fe33b5c43 100644 --- a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h +++ b/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake b/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake index 8996ff9dc..2bff4f836 100644 --- a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake +++ b/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake @@ -4,4 +4,4 @@ target_include_directories(${COMPONENT_LIB} PRIVATE .) target_compile_options(${COMPONENT_TARGET} PUBLIC "-DCFG_TUSB_MCU=OPT_MCU_ESP32S3" "-DCFG_TUSB_OS=OPT_OS_FREERTOS" -) \ No newline at end of file +) diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h b/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h index c7940c56e..fe33b5c43 100644 --- a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h +++ b/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt b/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt index 6d0fcbc86..8266c5a1c 100644 --- a/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt +++ b/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt @@ -5,4 +5,3 @@ idf_component_register(SRCS "${component_srcs}" PRIV_INCLUDE_DIRS "" PRIV_REQUIRES "driver" REQUIRES "") - diff --git a/hw/bsp/esp32s3/family.cmake b/hw/bsp/esp32s3/family.cmake index 511dd58bb..0bcad035e 100644 --- a/hw/bsp/esp32s3/family.cmake +++ b/hw/bsp/esp32s3/family.cmake @@ -1,7 +1,7 @@ cmake_minimum_required(VERSION 3.5) # Add example src and bsp directories -set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s3/boards" "${TOP}/hw/bsp/esp32s3/components") +set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s3/boards" "${TOP}/hw/bsp/esp32s3/components") include($ENV{IDF_PATH}/tools/cmake/project.cmake) set(SUPPORTED_TARGETS esp32s3) set(FAMILY_MCUS ESP32S3) diff --git a/hw/bsp/esp32s3/family.mk b/hw/bsp/esp32s3/family.mk index cf153ffc2..d82a1c969 100644 --- a/hw/bsp/esp32s3/family.mk +++ b/hw/bsp/esp32s3/family.mk @@ -23,4 +23,3 @@ UF2_FAMILY_ID = 0xc47e5767 $(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).bin @echo CREATE $@ $(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -b 0x0 -c -o $@ $^ - diff --git a/hw/bsp/f1c100s/README.md b/hw/bsp/f1c100s/README.md index 4aa1e153b..f7a863c34 100644 --- a/hw/bsp/f1c100s/README.md +++ b/hw/bsp/f1c100s/README.md @@ -17,4 +17,4 @@ Flash: `make BOARD=f1c100s flash` will write the image to SPI flash, and then re ## TODO -* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT` high speed MCU check in examples (maybe we should extract the logic?) \ No newline at end of file +* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT` high speed MCU check in examples (maybe we should extract the logic?) diff --git a/hw/bsp/f1c100s/board.h b/hw/bsp/f1c100s/board.h index 238ac796d..0ef9a1700 100644 --- a/hw/bsp/f1c100s/board.h +++ b/hw/bsp/f1c100s/board.h @@ -1 +1 @@ -// Nothing valuable here \ No newline at end of file +// Nothing valuable here diff --git a/hw/bsp/f1c100s/board.mk b/hw/bsp/f1c100s/board.mk index 5fe26a9ea..9062483b0 100644 --- a/hw/bsp/f1c100s/board.mk +++ b/hw/bsp/f1c100s/board.mk @@ -32,7 +32,7 @@ SRC_C += \ $(MCU_DIR)/machine/sys-spi-flash.c \ $(MCU_DIR)/machine/f1c100s-intc.c \ $(MCU_DIR)/lib/malloc.c \ - $(MCU_DIR)/lib/printf.c + $(MCU_DIR)/lib/printf.c SRC_S += \ $(MCU_DIR)/machine/start.S \ @@ -47,6 +47,6 @@ INC += \ flash: flash-xfel exec: $(BUILD)/$(PROJECT).bin - xfel ddr + xfel ddr xfel write 0x80000000 $< - xfel exec 0x80000000 \ No newline at end of file + xfel exec 0x80000000 diff --git a/hw/bsp/f1c100s/f1c100s.c b/hw/bsp/f1c100s/f1c100s.c index d45072ecb..5dcae33f7 100644 --- a/hw/bsp/f1c100s/f1c100s.c +++ b/hw/bsp/f1c100s/f1c100s.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -125,6 +125,6 @@ static void timer_init(void) { f1c100s_intc_set_isr(F1C100S_IRQ_TIMER0, timer_handler); f1c100s_intc_enable_irq(F1C100S_IRQ_TIMER0); } -#else +#else static void timer_init(void) { } #endif diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index 601cd54f5..08bb20bc3 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -139,4 +139,4 @@ if (NOT TARGET _family_support_marker) # save it in case of re-inclusion set(FAMILY_MCUS ${FAMILY_MCUS} CACHE INTERNAL "") -endif() \ No newline at end of file +endif() diff --git a/hw/bsp/fomu/boards/fomu/board.mk b/hw/bsp/fomu/boards/fomu/board.mk index 8ced11412..b5545c89a 100644 --- a/hw/bsp/fomu/boards/fomu/board.mk +++ b/hw/bsp/fomu/boards/fomu/board.mk @@ -1 +1 @@ -# place holder \ No newline at end of file +# place holder diff --git a/hw/bsp/fomu/fomu.c b/hw/bsp/fomu/fomu.c index 33c630303..e079e7c5b 100644 --- a/hw/bsp/fomu/fomu.c +++ b/hw/bsp/fomu/fomu.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/fomu/include/hw/common.h b/hw/bsp/fomu/include/hw/common.h index 6a97ca2e9..b902bc4f2 100644 --- a/hw/bsp/fomu/include/hw/common.h +++ b/hw/bsp/fomu/include/hw/common.h @@ -30,4 +30,4 @@ static inline uint32_t csr_readl(uint32_t addr) { return *(volatile uint32_t *)addr; } -#endif /* _HW_COMMON_H_ */ \ No newline at end of file +#endif /* _HW_COMMON_H_ */ diff --git a/hw/bsp/fomu/include/irq.h b/hw/bsp/fomu/include/irq.h index a82218907..dc96c228d 100644 --- a/hw/bsp/fomu/include/irq.h +++ b/hw/bsp/fomu/include/irq.h @@ -68,4 +68,4 @@ static inline unsigned int irq_pending(void) } #endif -#endif /* __IRQ_H */ \ No newline at end of file +#endif /* __IRQ_H */ diff --git a/hw/bsp/frdm_k32l2b/board.h b/hw/bsp/frdm_k32l2b/board.h index 825367915..8d21fdcd4 100644 --- a/hw/bsp/frdm_k32l2b/board.h +++ b/hw/bsp/frdm_k32l2b/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/frdm_k32l2b/frdm_k32l2b.c index 924bb18e9..8d2b39500 100644 --- a/hw/bsp/frdm_k32l2b/frdm_k32l2b.c +++ b/hw/bsp/frdm_k32l2b/frdm_k32l2b.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) @@ -56,10 +56,10 @@ void board_init(void) gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); const port_pin_config_t BUTTON_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_LowDriveStrength, + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_LowDriveStrength, kPORT_MuxAsGpio }; PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); @@ -68,7 +68,7 @@ void board_init(void) PORT_SetPinMux(PORTA, 1U, kPORT_MuxAlt2); /* PORTA2 (pin 24) is configured as LPUART0_TX */ PORT_SetPinMux(PORTA, 2U, kPORT_MuxAlt2); - + SIM->SOPT5 = ((SIM->SOPT5 & /* Mask bits to zero which are setting */ (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK))) diff --git a/hw/bsp/frdm_kl25z/frdm_kl25z.c b/hw/bsp/frdm_kl25z/frdm_kl25z.c index 8d93fdbaa..46f85f6a5 100644 --- a/hw/bsp/frdm_kl25z/frdm_kl25z.c +++ b/hw/bsp/frdm_kl25z/frdm_kl25z.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) @@ -103,7 +103,7 @@ void board_init(void) // Button CLOCK_EnableClock(BUTTON_PIN_CLOCK); port_pin_config_t button_port = { - .pullSelect = kPORT_PullUp, + .pullSelect = kPORT_PullUp, .mux = BUTTON_PIN_FUNCTION, }; PORT_SetPinConfig(BUTTON_PIN_PORT, BUTTON_PIN, &button_port); diff --git a/hw/bsp/gd32vf103/family.c b/hw/bsp/gd32vf103/family.c index 60a326d27..113c4c304 100644 --- a/hw/bsp/gd32vf103/family.c +++ b/hw/bsp/gd32vf103/family.c @@ -44,7 +44,7 @@ void USBFS_IRQHandler(void) { tud_int_handler(0); } // According to GD32VF103 user manual clock tree: // Systick clock = AHB clock / 4. -#define TIMER_TICKS ((SystemCoreClock / 4) / 1000) +#define TIMER_TICKS ((SystemCoreClock / 4) / 1000) #define BUTTON_PORT GPIOA #define BUTTON_PIN GPIO_PIN_0 diff --git a/hw/bsp/gd32vf103/system_gd32vf103.c b/hw/bsp/gd32vf103/system_gd32vf103.c index c2001a980..200852abf 100644 --- a/hw/bsp/gd32vf103/system_gd32vf103.c +++ b/hw/bsp/gd32vf103/system_gd32vf103.c @@ -95,7 +95,7 @@ void SystemInit(void) /* reset the RCC clock configuration to the default reset state */ /* enable IRC8M */ RCU_CTL |= RCU_CTL_IRC8MEN; - + /* reset SCS, AHBPSC, APB1PSC, APB2PSC, ADCPSC, CKOUT0SEL bits */ RCU_CFG0 &= ~(RCU_CFG0_SCS | RCU_CFG0_AHBPSC | RCU_CFG0_APB1PSC | RCU_CFG0_APB2PSC | RCU_CFG0_ADCPSC | RCU_CFG0_ADCPSC_2 | RCU_CFG0_CKOUT0SEL); @@ -107,7 +107,7 @@ void SystemInit(void) RCU_CTL &= ~(RCU_CTL_HXTALBPS); /* reset PLLSEL, PREDV0_LSB, PLLMF, USBFSPSC bits */ - + RCU_CFG0 &= ~(RCU_CFG0_PLLSEL | RCU_CFG0_PREDV0_LSB | RCU_CFG0_PLLMF | RCU_CFG0_USBFSPSC | RCU_CFG0_PLLMF_4); RCU_CFG1 = 0x00000000U; @@ -141,12 +141,12 @@ void SystemCoreClockUpdate(void) case SEL_IRC8M: SystemCoreClock = IRC8M_VALUE; break; - + /* HXTAL is selected as CK_SYS */ case SEL_HXTAL: SystemCoreClock = HXTAL_VALUE; break; - + /* PLL is selected as CK_SYS */ case SEL_PLL: /* PLL clock source selection, HXTAL or IRC8M/2 */ @@ -313,7 +313,7 @@ static void system_clock_72m_hxtal(void) /* APB1 = AHB/2 */ RCU_CFG0 |= RCU_APB1_CKAHB_DIV2; - /* CK_PLL = (CK_PREDIV0) * 18 = 72 MHz */ + /* CK_PLL = (CK_PREDIV0) * 18 = 72 MHz */ RCU_CFG0 &= ~(RCU_CFG0_PLLMF | RCU_CFG0_PLLMF_4); RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL18); diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/board.h b/hw/bsp/imxrt/boards/metro_m7_1011/board.h index 7fa2f8541..3c172ebb9 100644 --- a/hw/bsp/imxrt/boards/metro_m7_1011/board.h +++ b/hw/bsp/imxrt/boards/metro_m7_1011/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld b/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld index 30dd84373..960fc6891 100644 --- a/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld +++ b/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld @@ -35,7 +35,7 @@ MEMORY { m_flash_config (RX) : ORIGIN = 0x60000400, LENGTH = 0x00000C00 m_ivt (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000 - + m_interrupts (RX) : ORIGIN = 0x6000C000, LENGTH = 0x00000400 m_text (RX) : ORIGIN = 0x6000C400, LENGTH = (8*1024*1024 - 0xC400) m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00008000 diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.h index 4f21b52fa..926f45618 100644 --- a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.h +++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/mimxrt1015_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.h index 932ce7fd7..10d9fad07 100644 --- a/hw/bsp/imxrt/boards/mimxrt1015_evk/board.h +++ b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/mimxrt1020_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.h index 56ed5855b..284bb08e7 100644 --- a/hw/bsp/imxrt/boards/mimxrt1020_evk/board.h +++ b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/mimxrt1024_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.h index 152c9ab18..9100072e2 100644 --- a/hw/bsp/imxrt/boards/mimxrt1024_evk/board.h +++ b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.h b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.h index 0472f608c..beb69bf2b 100644 --- a/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.h +++ b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.h index 7fa37e33f..0f45f72e1 100644 --- a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.h +++ b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.h index 5f51e91a2..37ad94eef 100644 --- a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.h +++ b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/teensy_40/board.h b/hw/bsp/imxrt/boards/teensy_40/board.h index b3cc0a8c5..cac773442 100644 --- a/hw/bsp/imxrt/boards/teensy_40/board.h +++ b/hw/bsp/imxrt/boards/teensy_40/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/teensy_40/board.mk b/hw/bsp/imxrt/boards/teensy_40/board.mk index 0ad5ea5c0..45ca0fb6e 100644 --- a/hw/bsp/imxrt/boards/teensy_40/board.mk +++ b/hw/bsp/imxrt/boards/teensy_40/board.mk @@ -5,6 +5,6 @@ MCU_VARIANT = MIMXRT1062 JLINK_DEVICE = MIMXRT1062xxx6A # flash by using teensy_loader_cli https://github.com/PaulStoffregen/teensy_loader_cli -# Make sure it is in your PATH +# Make sure it is in your PATH flash: $(BUILD)/$(PROJECT).hex teensy_loader_cli --mcu=imxrt1062 -v -w $< diff --git a/hw/bsp/imxrt/boards/teensy_41/board.h b/hw/bsp/imxrt/boards/teensy_41/board.h index b0b4931c7..72c18f540 100644 --- a/hw/bsp/imxrt/boards/teensy_41/board.h +++ b/hw/bsp/imxrt/boards/teensy_41/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/imxrt/boards/teensy_41/board.mk b/hw/bsp/imxrt/boards/teensy_41/board.mk index 0ad5ea5c0..45ca0fb6e 100644 --- a/hw/bsp/imxrt/boards/teensy_41/board.mk +++ b/hw/bsp/imxrt/boards/teensy_41/board.mk @@ -5,6 +5,6 @@ MCU_VARIANT = MIMXRT1062 JLINK_DEVICE = MIMXRT1062xxx6A # flash by using teensy_loader_cli https://github.com/PaulStoffregen/teensy_loader_cli -# Make sure it is in your PATH +# Make sure it is in your PATH flash: $(BUILD)/$(PROJECT).hex teensy_loader_cli --mcu=imxrt1062 -v -w $< diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c index e28a6174a..5eb672c24 100644 --- a/hw/bsp/imxrt/family.c +++ b/hw/bsp/imxrt/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) diff --git a/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld b/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld index 5420ffc00..f478a99c7 100644 --- a/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld +++ b/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld @@ -214,4 +214,3 @@ SECTIONS ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") } - diff --git a/hw/bsp/kuiic/board.h b/hw/bsp/kuiic/board.h index 78ad83a2e..1e2d4f18b 100644 --- a/hw/bsp/kuiic/board.h +++ b/hw/bsp/kuiic/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/hw/bsp/kuiic/kuiic.c b/hw/bsp/kuiic/kuiic.c index 7aaa9e03c..97677d47a 100644 --- a/hw/bsp/kuiic/kuiic.c +++ b/hw/bsp/kuiic/kuiic.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) @@ -96,10 +96,10 @@ void board_init(void) CLOCK_EnableClock(kCLOCK_PortD); CLOCK_EnableClock(kCLOCK_PortE); - + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 1 }; GPIO_PinInit(GPIOA, 1U, &led_config); - PORT_SetPinMux(PORTA, 1U, kPORT_MuxAsGpio); + PORT_SetPinMux(PORTA, 1U, kPORT_MuxAsGpio); led_config.outputLogic = 0; GPIO_PinInit(GPIOA, 2U, &led_config); PORT_SetPinMux(PORTA, 2U, kPORT_MuxAsGpio); @@ -108,10 +108,10 @@ void board_init(void) gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); const port_pin_config_t BUTTON_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_LowDriveStrength, + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_LowDriveStrength, kPORT_MuxAsGpio }; PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); @@ -121,7 +121,7 @@ void board_init(void) PORT_SetPinMux(PORTC, 3U, kPORT_MuxAlt3); /* PORTA2 (pin 24) is configured as LPUART0_TX */ PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt3); - + SIM->SOPT5 = ((SIM->SOPT5 & /* Mask bits to zero which are setting */ (~(SIM_SOPT5_LPUART1TXSRC_MASK | SIM_SOPT5_LPUART1RXSRC_MASK))) diff --git a/hw/bsp/lpc15/boards/lpcxpresso1549/lpc1549.ld b/hw/bsp/lpc15/boards/lpcxpresso1549/lpc1549.ld index 6dd12ade1..d8079717e 100644 --- a/hw/bsp/lpc15/boards/lpcxpresso1549/lpc1549.ld +++ b/hw/bsp/lpc15/boards/lpcxpresso1549/lpc1549.ld @@ -13,29 +13,29 @@ MEMORY { /* Define each memory region */ - MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */ - Ram0_16 (rwx) : ORIGIN = 0x2000000, LENGTH = 0x4000 /* 16K bytes (alias RAM) */ - Ram1_16 (rwx) : ORIGIN = 0x2004000, LENGTH = 0x4000 /* 16K bytes (alias RAM2) */ - Ram2_4 (rwx) : ORIGIN = 0x2008000, LENGTH = 0x1000 /* 4K bytes (alias RAM3) */ + MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */ + Ram0_16 (rwx) : ORIGIN = 0x2000000, LENGTH = 0x4000 /* 16K bytes (alias RAM) */ + Ram1_16 (rwx) : ORIGIN = 0x2004000, LENGTH = 0x4000 /* 16K bytes (alias RAM2) */ + Ram2_4 (rwx) : ORIGIN = 0x2008000, LENGTH = 0x1000 /* 4K bytes (alias RAM3) */ } /* Define a symbol for the top of each memory region */ - __base_MFlash256 = 0x0 ; /* MFlash256 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */ - __top_Flash = 0x0 + 0x40000 ; /* 256K bytes */ - __base_Ram0_16 = 0x2000000 ; /* Ram0_16 */ - __base_RAM = 0x2000000 ; /* RAM */ - __top_Ram0_16 = 0x2000000 + 0x4000 ; /* 16K bytes */ - __top_RAM = 0x2000000 + 0x4000 ; /* 16K bytes */ - __base_Ram1_16 = 0x2004000 ; /* Ram1_16 */ - __base_RAM2 = 0x2004000 ; /* RAM2 */ - __top_Ram1_16 = 0x2004000 + 0x4000 ; /* 16K bytes */ - __top_RAM2 = 0x2004000 + 0x4000 ; /* 16K bytes */ - __base_Ram2_4 = 0x2008000 ; /* Ram2_4 */ - __base_RAM3 = 0x2008000 ; /* RAM3 */ - __top_Ram2_4 = 0x2008000 + 0x1000 ; /* 4K bytes */ - __top_RAM3 = 0x2008000 + 0x1000 ; /* 4K bytes */ + __base_MFlash256 = 0x0 ; /* MFlash256 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */ + __top_Flash = 0x0 + 0x40000 ; /* 256K bytes */ + __base_Ram0_16 = 0x2000000 ; /* Ram0_16 */ + __base_RAM = 0x2000000 ; /* RAM */ + __top_Ram0_16 = 0x2000000 + 0x4000 ; /* 16K bytes */ + __top_RAM = 0x2000000 + 0x4000 ; /* 16K bytes */ + __base_Ram1_16 = 0x2004000 ; /* Ram1_16 */ + __base_RAM2 = 0x2004000 ; /* RAM2 */ + __top_Ram1_16 = 0x2004000 + 0x4000 ; /* 16K bytes */ + __top_RAM2 = 0x2004000 + 0x4000 ; /* 16K bytes */ + __base_Ram2_4 = 0x2008000 ; /* Ram2_4 */ + __base_RAM3 = 0x2008000 ; /* RAM3 */ + __top_Ram2_4 = 0x2008000 + 0x1000 ; /* 4K bytes */ + __top_RAM3 = 0x2008000 + 0x1000 ; /* 4K bytes */ ENTRY(ResetISR) @@ -84,9 +84,9 @@ SECTIONS } > MFlash256 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlash256 @@ -98,9 +98,9 @@ SECTIONS *(.ARM.exidx* .gnu.linkonce.armexidx.*) } > MFlash256 __exidx_end = .; - + _etext = .; - + /* DATA section for Ram1_16 */ .data_RAM2 : ALIGN(4) @@ -225,11 +225,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_Ram0_16 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -243,4 +243,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/lpc15/family.c b/hw/bsp/lpc15/family.c index 7f5984a3e..30a3e51e1 100644 --- a/hw/bsp/lpc15/family.c +++ b/hw/bsp/lpc15/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/lpc18/boards/lpcxpresso18s37/lpc1837.ld b/hw/bsp/lpc18/boards/lpcxpresso18s37/lpc1837.ld index 51fd1539d..f12c1760c 100644 --- a/hw/bsp/lpc18/boards/lpcxpresso18s37/lpc1837.ld +++ b/hw/bsp/lpc18/boards/lpcxpresso18s37/lpc1837.ld @@ -12,43 +12,43 @@ MEMORY { /* Define each memory region */ - MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ - MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */ - RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ - RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */ - RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ - RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ - RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ + MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ + MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */ + RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ + RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */ + RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ + RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ + RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ } /* Define a symbol for the top of each memory region */ -__base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */ -__base_Flash = 0x1a000000 ; /* Flash */ -__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */ -__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */ -__base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */ -__base_Flash2 = 0x1b000000 ; /* Flash2 */ -__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */ -__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */ -__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ -__base_RAM = 0x10000000 ; /* RAM */ -__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ -__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ -__base_RamLoc40 = 0x10080000 ; /* RamLoc40 */ -__base_RAM2 = 0x10080000 ; /* RAM2 */ -__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */ -__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */ -__base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ -__base_RAM3 = 0x20000000 ; /* RAM3 */ -__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ -__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ -__base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ -__base_RAM4 = 0x20008000 ; /* RAM4 */ -__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ -__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ -__base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ -__base_RAM5 = 0x2000c000 ; /* RAM5 */ -__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ +__base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */ +__base_Flash = 0x1a000000 ; /* Flash */ +__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */ +__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */ +__base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */ +__base_Flash2 = 0x1b000000 ; /* Flash2 */ +__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */ +__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */ +__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ +__base_RAM = 0x10000000 ; /* RAM */ +__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ +__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ +__base_RamLoc40 = 0x10080000 ; /* RamLoc40 */ +__base_RAM2 = 0x10080000 ; /* RAM2 */ +__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */ +__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */ +__base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ +__base_RAM3 = 0x20000000 ; /* RAM3 */ +__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ +__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ +__base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ +__base_RAM4 = 0x20008000 ; /* RAM4 */ +__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ +__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ +__base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ +__base_RAM5 = 0x2000c000 ; /* RAM5 */ +__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */ ENTRY(ResetISR) @@ -137,9 +137,9 @@ SECTIONS *(.ARM.exidx* .gnu.linkonce.armexidx.*) __exidx_end = .; } > MFlashA512 - + _etext = .; - + /* DATA section for RamLoc40 */ .data_RAM2 : ALIGN(4) @@ -377,17 +377,17 @@ SECTIONS . = ALIGN(4) ; _end_noinit = .; PROVIDE(__end_noinit_RAM = .) ; - PROVIDE(__end_noinit_RamLoc32 = .) ; + PROVIDE(__end_noinit_RamLoc32 = .) ; } > RamLoc32 AT> RamLoc32 PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .); PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -401,4 +401,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/lpc18/boards/mcb1800/lpc1857.ld b/hw/bsp/lpc18/boards/mcb1800/lpc1857.ld index 9a308e342..9a67e8946 100644 --- a/hw/bsp/lpc18/boards/mcb1800/lpc1857.ld +++ b/hw/bsp/lpc18/boards/mcb1800/lpc1857.ld @@ -11,44 +11,44 @@ MEMORY { /* Define each memory region */ - MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ - MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */ - RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ - RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */ - RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ - RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ - RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ + MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ + MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */ + RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ + RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */ + RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ + RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ + RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ } /* Define a symbol for the top of each memory region */ -__base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */ -__base_Flash = 0x1a000000 ; /* Flash */ -__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */ -__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */ -__base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */ -__base_Flash2 = 0x1b000000 ; /* Flash2 */ -__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */ -__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */ -__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ -__base_RAM = 0x10000000 ; /* RAM */ -__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ -__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ -__base_RamLoc40 = 0x10080000 ; /* RamLoc40 */ -__base_RAM2 = 0x10080000 ; /* RAM2 */ -__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */ -__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */ -__base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ -__base_RAM3 = 0x20000000 ; /* RAM3 */ -__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ -__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ -__base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ -__base_RAM4 = 0x20008000 ; /* RAM4 */ -__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ -__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ -__base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ -__base_RAM5 = 0x2000c000 ; /* RAM5 */ -__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ -__top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */ +__base_MFlashA512 = 0x1a000000 ; /* MFlashA512 */ +__base_Flash = 0x1a000000 ; /* Flash */ +__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */ +__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */ +__base_MFlashB512 = 0x1b000000 ; /* MFlashB512 */ +__base_Flash2 = 0x1b000000 ; /* Flash2 */ +__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */ +__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */ +__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ +__base_RAM = 0x10000000 ; /* RAM */ +__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ +__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ +__base_RamLoc40 = 0x10080000 ; /* RamLoc40 */ +__base_RAM2 = 0x10080000 ; /* RAM2 */ +__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */ +__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */ +__base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ +__base_RAM3 = 0x20000000 ; /* RAM3 */ +__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ +__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ +__base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ +__base_RAM4 = 0x20008000 ; /* RAM4 */ +__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ +__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ +__base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ +__base_RAM5 = 0x2000c000 ; /* RAM5 */ +__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ +__top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */ ENTRY(ResetISR) @@ -118,9 +118,9 @@ SECTIONS } > MFlashA512 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlashA512 @@ -134,7 +134,7 @@ SECTIONS __exidx_end = .; _etext = .; - + /* DATA section for RamLoc40 */ .data_RAM2 : ALIGN(4) @@ -215,7 +215,7 @@ SECTIONS *(.bss.$RamLoc40*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM2 = .) ; - } > RamLoc40 + } > RamLoc40 /* BSS section for RamAHB32 */ .bss_RAM3 : ALIGN(4) @@ -225,7 +225,7 @@ SECTIONS *(.bss.$RamAHB32*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM3 = .) ; - } > RamAHB32 + } > RamAHB32 /* BSS section for RamAHB16 */ .bss_RAM4 : ALIGN(4) @@ -235,7 +235,7 @@ SECTIONS *(.bss.$RamAHB16*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM4 = .) ; - } > RamAHB16 + } > RamAHB16 /* BSS section for RamAHB_ETB16 */ .bss_RAM5 : ALIGN(4) @@ -245,7 +245,7 @@ SECTIONS *(.bss.$RamAHB_ETB16*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM5 = .) ; - } > RamAHB_ETB16 + } > RamAHB_ETB16 /* MAIN BSS SECTION */ .bss : ALIGN(4) @@ -264,7 +264,7 @@ SECTIONS *(.noinit.$RAM2*) *(.noinit.$RamLoc40*) . = ALIGN(4) ; - } > RamLoc40 + } > RamLoc40 /* NOINIT section for RamAHB32 */ .noinit_RAM3 (NOLOAD) : ALIGN(4) @@ -272,7 +272,7 @@ SECTIONS *(.noinit.$RAM3*) *(.noinit.$RamAHB32*) . = ALIGN(4) ; - } > RamAHB32 + } > RamAHB32 /* NOINIT section for RamAHB16 */ .noinit_RAM4 (NOLOAD) : ALIGN(4) @@ -280,7 +280,7 @@ SECTIONS *(.noinit.$RAM4*) *(.noinit.$RamAHB16*) . = ALIGN(4) ; - } > RamAHB16 + } > RamAHB16 /* NOINIT section for RamAHB_ETB16 */ .noinit_RAM5 (NOLOAD) : ALIGN(4) @@ -288,13 +288,13 @@ SECTIONS *(.noinit.$RAM5*) *(.noinit.$RamAHB_ETB16*) . = ALIGN(4) ; - } > RamAHB_ETB16 + } > RamAHB_ETB16 /* DEFAULT NOINIT SECTION */ .noinit (NOLOAD): ALIGN(4) { _noinit = .; - *(.noinit*) + *(.noinit*) . = ALIGN(4) ; _end_noinit = .; } > RamLoc32 @@ -302,11 +302,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -320,4 +320,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/lpc18/family.c b/hw/bsp/lpc18/family.c index 72c20e034..57f9d55da 100644 --- a/hw/bsp/lpc18/family.c +++ b/hw/bsp/lpc18/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk b/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk index 925374cc8..5f15e2bbe 100644 --- a/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk +++ b/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk @@ -15,4 +15,4 @@ PYOCD_TARGET = LPC54628 #flash: flash-pyocd -flash: flash-jlink \ No newline at end of file +flash: flash-jlink diff --git a/hw/bsp/lpc54/family.c b/hw/bsp/lpc54/family.c index 621788948..fe9cfcc47 100644 --- a/hw/bsp/lpc54/family.c +++ b/hw/bsp/lpc54/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) diff --git a/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld b/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld index 6b5d852aa..e2197b972 100644 --- a/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld +++ b/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld @@ -231,4 +231,3 @@ SECTIONS ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") } - diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c index 5b6c56dd3..3ed00e7da 100644 --- a/hw/bsp/lpc55/family.c +++ b/hw/bsp/lpc55/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) diff --git a/hw/bsp/lpcxpresso11u37/lpc11u37.ld b/hw/bsp/lpcxpresso11u37/lpc11u37.ld index 6a2dfb7f5..8e0a4e4c6 100644 --- a/hw/bsp/lpcxpresso11u37/lpc11u37.ld +++ b/hw/bsp/lpcxpresso11u37/lpc11u37.ld @@ -12,24 +12,24 @@ MEMORY { /* Define each memory region */ - MFlash128 (rx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K bytes (alias Flash) */ - RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */ - RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ + MFlash128 (rx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K bytes (alias Flash) */ + RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */ + RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ } /* Define a symbol for the top of each memory region */ - __base_MFlash128 = 0x0 ; /* MFlash128 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash128 = 0x0 + 0x20000 ; /* 128K bytes */ - __top_Flash = 0x0 + 0x20000 ; /* 128K bytes */ - __base_RamLoc8 = 0x10000000 ; /* RamLoc8 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */ - __top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */ - __base_RamUsb2 = 0x20004000 ; /* RamUsb2 */ - __base_RAM2 = 0x20004000 ; /* RAM2 */ - __top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */ - __top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */ + __base_MFlash128 = 0x0 ; /* MFlash128 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash128 = 0x0 + 0x20000 ; /* 128K bytes */ + __top_Flash = 0x0 + 0x20000 ; /* 128K bytes */ + __base_RamLoc8 = 0x10000000 ; /* RamLoc8 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */ + __top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */ + __base_RamUsb2 = 0x20004000 ; /* RamUsb2 */ + __base_RAM2 = 0x20004000 ; /* RAM2 */ + __top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */ + __top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */ ENTRY(ResetISR) @@ -74,9 +74,9 @@ SECTIONS } > MFlash128 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlash128 @@ -88,9 +88,9 @@ SECTIONS *(.ARM.exidx* .gnu.linkonce.armexidx.*) } > MFlash128 __exidx_end = .; - + _etext = .; - + /* DATA section for RamUsb2 */ .data_RAM2 : ALIGN(4) @@ -176,11 +176,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc8 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1) - + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1) + + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1) ) ); @@ -192,4 +192,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c b/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c index 11f1797a2..79cd685c3 100644 --- a/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c +++ b/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/lpcxpresso11u68/lpc11u68.ld b/hw/bsp/lpcxpresso11u68/lpc11u68.ld index 56d9e4b89..4a35b192e 100644 --- a/hw/bsp/lpcxpresso11u68/lpc11u68.ld +++ b/hw/bsp/lpcxpresso11u68/lpc11u68.ld @@ -11,29 +11,29 @@ MEMORY { /* Define each memory region */ - MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */ - Ram0_32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ - Ram1_2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ - Ram2USB_2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */ + MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */ + Ram0_32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ + Ram1_2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ + Ram2USB_2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */ } /* Define a symbol for the top of each memory region */ - __base_MFlash256 = 0x0 ; /* MFlash256 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */ - __top_Flash = 0x0 + 0x40000 ; /* 256K bytes */ - __base_Ram0_32 = 0x10000000 ; /* Ram0_32 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_Ram0_32 = 0x10000000 + 0x8000 ; /* 32K bytes */ - __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ - __base_Ram1_2 = 0x20000000 ; /* Ram1_2 */ - __base_RAM2 = 0x20000000 ; /* RAM2 */ - __top_Ram1_2 = 0x20000000 + 0x800 ; /* 2K bytes */ - __top_RAM2 = 0x20000000 + 0x800 ; /* 2K bytes */ - __base_Ram2USB_2 = 0x20004000 ; /* Ram2USB_2 */ - __base_RAM3 = 0x20004000 ; /* RAM3 */ - __top_Ram2USB_2 = 0x20004000 + 0x800 ; /* 2K bytes */ - __top_RAM3 = 0x20004000 + 0x800 ; /* 2K bytes */ + __base_MFlash256 = 0x0 ; /* MFlash256 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */ + __top_Flash = 0x0 + 0x40000 ; /* 256K bytes */ + __base_Ram0_32 = 0x10000000 ; /* Ram0_32 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_Ram0_32 = 0x10000000 + 0x8000 ; /* 32K bytes */ + __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ + __base_Ram1_2 = 0x20000000 ; /* Ram1_2 */ + __base_RAM2 = 0x20000000 ; /* RAM2 */ + __top_Ram1_2 = 0x20000000 + 0x800 ; /* 2K bytes */ + __top_RAM2 = 0x20000000 + 0x800 ; /* 2K bytes */ + __base_Ram2USB_2 = 0x20004000 ; /* Ram2USB_2 */ + __base_RAM3 = 0x20004000 ; /* RAM3 */ + __top_Ram2USB_2 = 0x20004000 + 0x800 ; /* 2K bytes */ + __top_RAM3 = 0x20004000 + 0x800 ; /* 2K bytes */ ENTRY(ResetISR) @@ -82,9 +82,9 @@ SECTIONS } > MFlash256 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlash256 @@ -98,7 +98,7 @@ SECTIONS __exidx_end = .; _etext = .; - + /* possible MTB section for Ram1_2 */ .mtb_buffer_RAM2 (NOLOAD) : { @@ -172,7 +172,7 @@ SECTIONS *(.bss.$Ram1_2*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM2 = .) ; - } > Ram1_2 + } > Ram1_2 /* BSS section for Ram2USB_2 */ .bss_RAM3 : ALIGN(4) @@ -182,7 +182,7 @@ SECTIONS *(.bss.$Ram2USB_2*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM3 = .) ; - } > Ram2USB_2 + } > Ram2USB_2 /* MAIN BSS SECTION */ .bss : ALIGN(4) @@ -201,7 +201,7 @@ SECTIONS *(.noinit.$RAM2*) *(.noinit.$Ram1_2*) . = ALIGN(4) ; - } > Ram1_2 + } > Ram1_2 /* NOINIT section for Ram2USB_2 */ .noinit_RAM3 (NOLOAD) : ALIGN(4) @@ -209,13 +209,13 @@ SECTIONS *(.noinit.$RAM3*) *(.noinit.$Ram2USB_2*) . = ALIGN(4) ; - } > Ram2USB_2 + } > Ram2USB_2 /* DEFAULT NOINIT SECTION */ .noinit (NOLOAD): ALIGN(4) { _noinit = .; - *(.noinit*) + *(.noinit*) . = ALIGN(4) ; _end_noinit = .; } > Ram0_32 @@ -223,11 +223,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_Ram0_32 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1) - + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1) + + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1) ) ); @@ -239,4 +239,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c b/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c index e33a5c6e5..a04e43867 100644 --- a/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c +++ b/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/lpcxpresso1347/lpc1347.ld b/hw/bsp/lpcxpresso1347/lpc1347.ld index 42a4bb25c..a2111cd1c 100644 --- a/hw/bsp/lpcxpresso1347/lpc1347.ld +++ b/hw/bsp/lpcxpresso1347/lpc1347.ld @@ -11,29 +11,29 @@ MEMORY { /* Define each memory region */ - MFlash64 (rx) : ORIGIN = 0x0, LENGTH = 0x10000 /* 64K bytes (alias Flash) */ - RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */ - RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ - RamPeriph2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */ + MFlash64 (rx) : ORIGIN = 0x0, LENGTH = 0x10000 /* 64K bytes (alias Flash) */ + RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */ + RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */ + RamPeriph2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */ } /* Define a symbol for the top of each memory region */ - __base_MFlash64 = 0x0 ; /* MFlash64 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash64 = 0x0 + 0x10000 ; /* 64K bytes */ - __top_Flash = 0x0 + 0x10000 ; /* 64K bytes */ - __base_RamLoc8 = 0x10000000 ; /* RamLoc8 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */ - __top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */ - __base_RamUsb2 = 0x20004000 ; /* RamUsb2 */ - __base_RAM2 = 0x20004000 ; /* RAM2 */ - __top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */ - __top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */ - __base_RamPeriph2 = 0x20000000 ; /* RamPeriph2 */ - __base_RAM3 = 0x20000000 ; /* RAM3 */ - __top_RamPeriph2 = 0x20000000 + 0x800 ; /* 2K bytes */ - __top_RAM3 = 0x20000000 + 0x800 ; /* 2K bytes */ + __base_MFlash64 = 0x0 ; /* MFlash64 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash64 = 0x0 + 0x10000 ; /* 64K bytes */ + __top_Flash = 0x0 + 0x10000 ; /* 64K bytes */ + __base_RamLoc8 = 0x10000000 ; /* RamLoc8 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */ + __top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */ + __base_RamUsb2 = 0x20004000 ; /* RamUsb2 */ + __base_RAM2 = 0x20004000 ; /* RAM2 */ + __top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */ + __top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */ + __base_RamPeriph2 = 0x20000000 ; /* RamPeriph2 */ + __base_RAM3 = 0x20000000 ; /* RAM3 */ + __top_RamPeriph2 = 0x20000000 + 0x800 ; /* 2K bytes */ + __top_RAM3 = 0x20000000 + 0x800 ; /* 2K bytes */ ENTRY(ResetISR) @@ -82,9 +82,9 @@ SECTIONS } > MFlash64 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlash64 @@ -98,7 +98,7 @@ SECTIONS __exidx_end = .; _etext = .; - + /* DATA section for RamUsb2 */ .data_RAM2 : ALIGN(4) @@ -153,7 +153,7 @@ SECTIONS *(.bss.$RamUsb2*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM2 = .) ; - } > RamUsb2 + } > RamUsb2 /* BSS section for RamPeriph2 */ .bss_RAM3 : ALIGN(4) @@ -163,7 +163,7 @@ SECTIONS *(.bss.$RamPeriph2*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM3 = .) ; - } > RamPeriph2 + } > RamPeriph2 /* MAIN BSS SECTION */ .bss : ALIGN(4) @@ -182,7 +182,7 @@ SECTIONS *(.noinit.$RAM2*) *(.noinit.$RamUsb2*) . = ALIGN(4) ; - } > RamUsb2 + } > RamUsb2 /* NOINIT section for RamPeriph2 */ .noinit_RAM3 (NOLOAD) : ALIGN(4) @@ -190,13 +190,13 @@ SECTIONS *(.noinit.$RAM3*) *(.noinit.$RamPeriph2*) . = ALIGN(4) ; - } > RamPeriph2 + } > RamPeriph2 /* DEFAULT NOINIT SECTION */ .noinit (NOLOAD): ALIGN(4) { _noinit = .; - *(.noinit*) + *(.noinit*) . = ALIGN(4) ; _end_noinit = .; } > RamLoc8 @@ -204,11 +204,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc8 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -222,4 +222,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/lpcxpresso1347/lpcxpresso1347.c b/hw/bsp/lpcxpresso1347/lpcxpresso1347.c index a9a67ae3a..8ee611037 100644 --- a/hw/bsp/lpcxpresso1347/lpcxpresso1347.c +++ b/hw/bsp/lpcxpresso1347/lpcxpresso1347.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -64,7 +64,7 @@ const uint32_t ExtRateIn = 0; /* Pin muxing table, only items that need changing from their default pin state are in this table. */ -static const PINMUX_GRP_T pinmuxing[] = +static const PINMUX_GRP_T pinmuxing[] = { {0, 1, (IOCON_FUNC1 | IOCON_RESERVED_BIT_7 | IOCON_MODE_INACT)}, /* PIO0_1 used for CLKOUT */ {0, 2, (IOCON_FUNC1 | IOCON_RESERVED_BIT_7 | IOCON_MODE_PULLUP)}, /* PIO0_2 used for SSEL */ diff --git a/hw/bsp/lpcxpresso1769/lpc1769.ld b/hw/bsp/lpcxpresso1769/lpc1769.ld index d1c83d8e2..095bd3d92 100644 --- a/hw/bsp/lpcxpresso1769/lpc1769.ld +++ b/hw/bsp/lpcxpresso1769/lpc1769.ld @@ -11,24 +11,24 @@ MEMORY { /* Define each memory region */ - MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ - RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ - RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */ + MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ + RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ + RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */ } /* Define a symbol for the top of each memory region */ - __base_MFlash512 = 0x0 ; /* MFlash512 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */ - __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */ - __base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ - __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ - __base_RamAHB32 = 0x2007c000 ; /* RamAHB32 */ - __base_RAM2 = 0x2007c000 ; /* RAM2 */ - __top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */ - __top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */ + __base_MFlash512 = 0x0 ; /* MFlash512 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */ + __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */ + __base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ + __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ + __base_RamAHB32 = 0x2007c000 ; /* RamAHB32 */ + __base_RAM2 = 0x2007c000 ; /* RAM2 */ + __top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */ + __top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */ ENTRY(ResetISR) @@ -72,9 +72,9 @@ SECTIONS } > MFlash512 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlash512 @@ -88,7 +88,7 @@ SECTIONS __exidx_end = .; _etext = .; - + /* DATA section for RamAHB32 */ .data_RAM2 : ALIGN(4) @@ -130,7 +130,7 @@ SECTIONS *(.bss.$RamAHB32*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM2 = .) ; - } > RamAHB32 + } > RamAHB32 /* MAIN BSS SECTION */ .bss : ALIGN(4) @@ -149,13 +149,13 @@ SECTIONS *(.noinit.$RAM2*) *(.noinit.$RamAHB32*) . = ALIGN(4) ; - } > RamAHB32 + } > RamAHB32 /* DEFAULT NOINIT SECTION */ .noinit (NOLOAD): ALIGN(4) { _noinit = .; - *(.noinit*) + *(.noinit*) . = ALIGN(4) ; _end_noinit = .; } > RamLoc32 @@ -163,11 +163,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -181,4 +181,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/lpcxpresso1769/lpcxpresso1769.c b/hw/bsp/lpcxpresso1769/lpcxpresso1769.c index b7bce93d2..24333ad1a 100644 --- a/hw/bsp/lpcxpresso1769/lpcxpresso1769.c +++ b/hw/bsp/lpcxpresso1769/lpcxpresso1769.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c b/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c index 6bade7743..c94b0d6d8 100644 --- a/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c +++ b/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) diff --git a/hw/bsp/mbed1768/lpc1768.ld b/hw/bsp/mbed1768/lpc1768.ld index d1c83d8e2..095bd3d92 100644 --- a/hw/bsp/mbed1768/lpc1768.ld +++ b/hw/bsp/mbed1768/lpc1768.ld @@ -11,24 +11,24 @@ MEMORY { /* Define each memory region */ - MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ - RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ - RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */ + MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */ + RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */ + RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */ } /* Define a symbol for the top of each memory region */ - __base_MFlash512 = 0x0 ; /* MFlash512 */ - __base_Flash = 0x0 ; /* Flash */ - __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */ - __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */ - __base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ - __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ - __base_RamAHB32 = 0x2007c000 ; /* RamAHB32 */ - __base_RAM2 = 0x2007c000 ; /* RAM2 */ - __top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */ - __top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */ + __base_MFlash512 = 0x0 ; /* MFlash512 */ + __base_Flash = 0x0 ; /* Flash */ + __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */ + __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */ + __base_RamLoc32 = 0x10000000 ; /* RamLoc32 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */ + __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */ + __base_RamAHB32 = 0x2007c000 ; /* RamAHB32 */ + __base_RAM2 = 0x2007c000 ; /* RAM2 */ + __top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */ + __top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */ ENTRY(ResetISR) @@ -72,9 +72,9 @@ SECTIONS } > MFlash512 /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > MFlash512 @@ -88,7 +88,7 @@ SECTIONS __exidx_end = .; _etext = .; - + /* DATA section for RamAHB32 */ .data_RAM2 : ALIGN(4) @@ -130,7 +130,7 @@ SECTIONS *(.bss.$RamAHB32*) . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ PROVIDE(__end_bss_RAM2 = .) ; - } > RamAHB32 + } > RamAHB32 /* MAIN BSS SECTION */ .bss : ALIGN(4) @@ -149,13 +149,13 @@ SECTIONS *(.noinit.$RAM2*) *(.noinit.$RamAHB32*) . = ALIGN(4) ; - } > RamAHB32 + } > RamAHB32 /* DEFAULT NOINIT SECTION */ .noinit (NOLOAD): ALIGN(4) { _noinit = .; - *(.noinit*) + *(.noinit*) . = ALIGN(4) ; _end_noinit = .; } > RamLoc32 @@ -163,11 +163,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -181,4 +181,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/mbed1768/mbed1768.c b/hw/bsp/mbed1768/mbed1768.c index 08cf3adbd..9f3d294d3 100644 --- a/hw/bsp/mbed1768/mbed1768.c +++ b/hw/bsp/mbed1768/mbed1768.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld b/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld index 0b45ee7bd..796ed04f6 100644 --- a/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld +++ b/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 MM32 SE TEAM @@ -110,7 +110,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -121,7 +121,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -149,7 +149,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c index 9793ba241..c3f5bc16d 100644 --- a/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c +++ b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 MM32 SE TEAM @@ -57,7 +57,7 @@ const int baudrate = 115200; void board_init (void) { -// usb clock +// usb clock USB_DeviceClockInit(); if ( SysTick_Config(SystemCoreClock / 1000) ) diff --git a/hw/bsp/ngx4330/ngx4330.c b/hw/bsp/ngx4330/ngx4330.c index 4fc314165..d61f775c7 100644 --- a/hw/bsp/ngx4330/ngx4330.c +++ b/hw/bsp/ngx4330/ngx4330.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/ngx4330/ngx4330.ld b/hw/bsp/ngx4330/ngx4330.ld index 7bd363f08..300869c20 100644 --- a/hw/bsp/ngx4330/ngx4330.ld +++ b/hw/bsp/ngx4330/ngx4330.ld @@ -12,39 +12,39 @@ MEMORY { /* Define each memory region */ - RamLoc128 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x20000 /* 128K bytes (alias RAM) */ - RamLoc72 (rwx) : ORIGIN = 0x10080000, LENGTH = 0x12000 /* 72K bytes (alias RAM2) */ - RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ - RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ - RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ - SPIFI (rx) : ORIGIN = 0x14000000, LENGTH = 0x400000 /* 4M bytes (alias Flash) */ + RamLoc128 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x20000 /* 128K bytes (alias RAM) */ + RamLoc72 (rwx) : ORIGIN = 0x10080000, LENGTH = 0x12000 /* 72K bytes (alias RAM2) */ + RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ + RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ + RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ + SPIFI (rx) : ORIGIN = 0x14000000, LENGTH = 0x400000 /* 4M bytes (alias Flash) */ } /* Define a symbol for the top of each memory region */ - __base_RamLoc128 = 0x10000000 ; /* RamLoc128 */ - __base_RAM = 0x10000000 ; /* RAM */ - __top_RamLoc128 = 0x10000000 + 0x20000 ; /* 128K bytes */ - __top_RAM = 0x10000000 + 0x20000 ; /* 128K bytes */ - __base_RamLoc72 = 0x10080000 ; /* RamLoc72 */ - __base_RAM2 = 0x10080000 ; /* RAM2 */ - __top_RamLoc72 = 0x10080000 + 0x12000 ; /* 72K bytes */ - __top_RAM2 = 0x10080000 + 0x12000 ; /* 72K bytes */ - __base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ - __base_RAM3 = 0x20000000 ; /* RAM3 */ - __top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ - __top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ - __base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ - __base_RAM4 = 0x20008000 ; /* RAM4 */ - __top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ - __top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ - __base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ - __base_RAM5 = 0x2000c000 ; /* RAM5 */ - __top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ - __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */ - __base_SPIFI = 0x14000000 ; /* SPIFI */ - __base_Flash = 0x14000000 ; /* Flash */ - __top_SPIFI = 0x14000000 + 0x400000 ; /* 4M bytes */ - __top_Flash = 0x14000000 + 0x400000 ; /* 4M bytes */ + __base_RamLoc128 = 0x10000000 ; /* RamLoc128 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc128 = 0x10000000 + 0x20000 ; /* 128K bytes */ + __top_RAM = 0x10000000 + 0x20000 ; /* 128K bytes */ + __base_RamLoc72 = 0x10080000 ; /* RamLoc72 */ + __base_RAM2 = 0x10080000 ; /* RAM2 */ + __top_RamLoc72 = 0x10080000 + 0x12000 ; /* 72K bytes */ + __top_RAM2 = 0x10080000 + 0x12000 ; /* 72K bytes */ + __base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ + __base_RAM3 = 0x20000000 ; /* RAM3 */ + __top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ + __top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ + __base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ + __base_RAM4 = 0x20008000 ; /* RAM4 */ + __top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ + __top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ + __base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ + __base_RAM5 = 0x2000c000 ; /* RAM5 */ + __top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ + __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */ + __base_SPIFI = 0x14000000 ; /* SPIFI */ + __base_Flash = 0x14000000 ; /* Flash */ + __top_SPIFI = 0x14000000 + 0x400000 ; /* 4M bytes */ + __top_Flash = 0x14000000 + 0x400000 ; /* 4M bytes */ ENTRY(ResetISR) @@ -103,9 +103,9 @@ SECTIONS } > SPIFI /* * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. + * with C++ and STDC++) use this. */ - .ARM.extab : ALIGN(4) + .ARM.extab : ALIGN(4) { *(.ARM.extab* .gnu.linkonce.armextab.*) } > SPIFI @@ -117,9 +117,9 @@ SECTIONS *(.ARM.exidx* .gnu.linkonce.armexidx.*) } > SPIFI __exidx_end = .; - + _etext = .; - + /* DATA section for RamLoc72 */ .data_RAM2 : ALIGN(4) @@ -322,11 +322,11 @@ SECTIONS PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc128 - 0); /* ## Create checksum value (used in startup) ## */ - PROVIDE(__valid_user_code_checksum = 0 - - (_vStackTop - + (ResetISR + 1) - + (NMI_Handler + 1) - + (HardFault_Handler + 1) + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ @@ -340,4 +340,4 @@ SECTIONS _image_start = LOADADDR(.text); _image_end = LOADADDR(.data) + SIZEOF(.data); _image_size = _image_end - _image_start; -} \ No newline at end of file +} diff --git a/hw/bsp/nrf/boards/adafruit_clue/board.h b/hw/bsp/nrf/boards/adafruit_clue/board.h index 2c58e8fe8..8d6df786e 100644 --- a/hw/bsp/nrf/boards/adafruit_clue/board.h +++ b/hw/bsp/nrf/boards/adafruit_clue/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/adafruit_clue/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/adafruit_clue/nrf52840_s140_v6.ld index 5314a4e93..71c55bb81 100755 --- a/hw/bsp/nrf/boards/adafruit_clue/nrf52840_s140_v6.ld +++ b/hw/bsp/nrf/boards/adafruit_clue/nrf52840_s140_v6.ld @@ -13,7 +13,7 @@ MEMORY * - Max ATT MTU * - Concurrent connection peripheral + central + secure links * - Event Len, HVN queue, Write CMD queue - */ + */ RAM (rwx) : ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400 } @@ -26,7 +26,7 @@ SECTIONS KEEP(*(.svc_data)) PROVIDE(__stop_svc_data = .); } > RAM - + .fs_data : { PROVIDE(__start_fs_data = .); diff --git a/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld b/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld index f570740b6..f609f743f 100755 --- a/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld +++ b/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld @@ -20,7 +20,7 @@ SECTIONS KEEP(*(.svc_data)) PROVIDE(__stop_svc_data = .); } > RAM - + .fs_data : { PROVIDE(__start_fs_data = .); diff --git a/hw/bsp/nrf/boards/arduino_nano33_ble/board.h b/hw/bsp/nrf/boards/arduino_nano33_ble/board.h index d548e01c3..00fa8d8ea 100644 --- a/hw/bsp/nrf/boards/arduino_nano33_ble/board.h +++ b/hw/bsp/nrf/boards/arduino_nano33_ble/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.h b/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.h index a86c9dc7f..3dd354efa 100644 --- a/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.h +++ b/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld index 5314a4e93..71c55bb81 100755 --- a/hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld +++ b/hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld @@ -13,7 +13,7 @@ MEMORY * - Max ATT MTU * - Concurrent connection peripheral + central + secure links * - Event Len, HVN queue, Write CMD queue - */ + */ RAM (rwx) : ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400 } @@ -26,7 +26,7 @@ SECTIONS KEEP(*(.svc_data)) PROVIDE(__stop_svc_data = .); } > RAM - + .fs_data : { PROVIDE(__start_fs_data = .); diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h index 3208a948a..8e6ce3230 100644 --- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h +++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld index 5314a4e93..71c55bb81 100644 --- a/hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld +++ b/hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld @@ -13,7 +13,7 @@ MEMORY * - Max ATT MTU * - Concurrent connection peripheral + central + secure links * - Event Len, HVN queue, Write CMD queue - */ + */ RAM (rwx) : ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400 } @@ -26,7 +26,7 @@ SECTIONS KEEP(*(.svc_data)) PROVIDE(__stop_svc_data = .); } > RAM - + .fs_data : { PROVIDE(__start_fs_data = .); diff --git a/hw/bsp/nrf/boards/feather_nrf52840_sense/board.h b/hw/bsp/nrf/boards/feather_nrf52840_sense/board.h index ece6e34cb..605deea24 100644 --- a/hw/bsp/nrf/boards/feather_nrf52840_sense/board.h +++ b/hw/bsp/nrf/boards/feather_nrf52840_sense/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld index 5314a4e93..71c55bb81 100644 --- a/hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld +++ b/hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld @@ -13,7 +13,7 @@ MEMORY * - Max ATT MTU * - Concurrent connection peripheral + central + secure links * - Event Len, HVN queue, Write CMD queue - */ + */ RAM (rwx) : ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400 } @@ -26,7 +26,7 @@ SECTIONS KEEP(*(.svc_data)) PROVIDE(__stop_svc_data = .); } > RAM - + .fs_data : { PROVIDE(__start_fs_data = .); diff --git a/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.h b/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.h index 132173a80..33c370f53 100644 --- a/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.h +++ b/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld index 5314a4e93..71c55bb81 100644 --- a/hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld +++ b/hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld @@ -13,7 +13,7 @@ MEMORY * - Max ATT MTU * - Concurrent connection peripheral + central + secure links * - Event Len, HVN queue, Write CMD queue - */ + */ RAM (rwx) : ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400 } @@ -26,7 +26,7 @@ SECTIONS KEEP(*(.svc_data)) PROVIDE(__stop_svc_data = .); } > RAM - + .fs_data : { PROVIDE(__start_fs_data = .); diff --git a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h index 01dd1f24f..072cb2714 100644 --- a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h +++ b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk index 3afa234aa..f25ec8f34 100644 --- a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk +++ b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk @@ -12,4 +12,4 @@ $(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex flash: $(BUILD)/$(PROJECT).zip @:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyACM0) - $(NRFUTIL) dfu usb-serial --package $^ -p $(SERIAL) -b 115200 \ No newline at end of file + $(NRFUTIL) dfu usb-serial --package $^ -p $(SERIAL) -b 115200 diff --git a/hw/bsp/nrf/boards/pca10056/board.h b/hw/bsp/nrf/boards/pca10056/board.h index ab12d21aa..50d3067b3 100644 --- a/hw/bsp/nrf/boards/pca10056/board.h +++ b/hw/bsp/nrf/boards/pca10056/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/pca10059/board.h b/hw/bsp/nrf/boards/pca10059/board.h index 0810be648..ea3f4030d 100644 --- a/hw/bsp/nrf/boards/pca10059/board.h +++ b/hw/bsp/nrf/boards/pca10059/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/pca10100/board.h b/hw/bsp/nrf/boards/pca10100/board.h index 881133035..2b2579732 100644 --- a/hw/bsp/nrf/boards/pca10100/board.h +++ b/hw/bsp/nrf/boards/pca10100/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h b/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h index dcf829d9c..bc203f073 100644 --- a/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h +++ b/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c index a07332d4c..02cec31ef 100644 --- a/hw/bsp/nrf/family.c +++ b/hw/bsp/nrf/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/nutiny_nuc121s/nuc121_flash.ld b/hw/bsp/nutiny_nuc121s/nuc121_flash.ld index 3966b276e..0c599a561 100644 --- a/hw/bsp/nutiny_nuc121s/nuc121_flash.ld +++ b/hw/bsp/nutiny_nuc121s/nuc121_flash.ld @@ -69,7 +69,7 @@ SECTIONS *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) *(SORT(.dtors.*)) *(.dtors) - + *(.rodata*) KEEP(*(.eh_frame*)) diff --git a/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c b/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c index 7117a3422..ec66f8deb 100644 --- a/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c +++ b/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/nutiny_nuc125s/nuc125_flash.ld b/hw/bsp/nutiny_nuc125s/nuc125_flash.ld index 3966b276e..0c599a561 100644 --- a/hw/bsp/nutiny_nuc125s/nuc125_flash.ld +++ b/hw/bsp/nutiny_nuc125s/nuc125_flash.ld @@ -69,7 +69,7 @@ SECTIONS *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) *(SORT(.dtors.*)) *(.dtors) - + *(.rodata*) KEEP(*(.eh_frame*)) diff --git a/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c b/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c index 7117a3422..ec66f8deb 100644 --- a/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c +++ b/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c b/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c index da62e7bd2..90fa2ffd8 100644 --- a/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c +++ b/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c b/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c index 0d78116b8..9e7eacb23 100644 --- a/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c +++ b/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c b/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c index 49e66d2d0..1fc97e3dc 100644 --- a/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c +++ b/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/pic32mz/boards/olimex_emz64/olimex_emz64.c b/hw/bsp/pic32mz/boards/olimex_emz64/olimex_emz64.c index e47ec5f31..0bb6cb728 100644 --- a/hw/bsp/pic32mz/boards/olimex_emz64/olimex_emz64.c +++ b/hw/bsp/pic32mz/boards/olimex_emz64/olimex_emz64.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2022 Jerzy Kasenberg diff --git a/hw/bsp/pic32mz/family.c b/hw/bsp/pic32mz/family.c index 786f04978..895e23899 100644 --- a/hw/bsp/pic32mz/family.c +++ b/hw/bsp/pic32mz/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2022 Jerzy Kasenberg diff --git a/hw/bsp/rp2040/board.h b/hw/bsp/rp2040/board.h index e7eab088e..1eeeaf9af 100644 --- a/hw/bsp/rp2040/board.h +++ b/hw/bsp/rp2040/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/rp2040/boards/raspberry_pi_pico/board.cmake b/hw/bsp/rp2040/boards/raspberry_pi_pico/board.cmake index 8280c835d..f9887c09c 100644 --- a/hw/bsp/rp2040/boards/raspberry_pi_pico/board.cmake +++ b/hw/bsp/rp2040/boards/raspberry_pi_pico/board.cmake @@ -1 +1 @@ -set(PICO_BOARD pico) \ No newline at end of file +set(PICO_BOARD pico) diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index 678bce274..5d80ab66e 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -55,7 +55,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker) message("Compiling TinyUSB with CFG_TUSB_DEBUG=1") set(TINYUSB_DEBUG_LEVEL 1) endif() - + target_compile_definitions(tinyusb_common_base INTERFACE CFG_TUSB_MCU=OPT_MCU_RP2040 CFG_TUSB_OS=${TINYUSB_OPT_OS} diff --git a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c index 9bd9399f6..4f87153ac 100644 --- a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c +++ b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c @@ -33,9 +33,9 @@ * - Short EMLE pad and 3.3V(GR-CITRUS pin name) with a wire. * * The pads are [the back side of GR-CITRUS](https://www.slideshare.net/MinaoYamamoto/grcitrusrx631/2). - * + * * Connect the pins between GR-CITRUS and JLink as follows. - * + * * | Function | GR-CITRUS pin | JLink pin No.| note | * |:---------:|:-------------:|:------------:|:--------:| * | VTref | 3.3V | 1 | | @@ -91,7 +91,7 @@ void INT_Excep_SCI0_TXI0(void) { uint8_t *buf = sci0_buf[0].buf; uint32_t cnt = sci0_buf[0].cnt; - + if (!buf || !cnt) { SCI0.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE); return; diff --git a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c index 3c729ad50..691038fc8 100644 --- a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c +++ b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c @@ -126,7 +126,7 @@ void INT_Excep_SCI5_TXI5(void) { uint8_t *buf = sci_buf[0].buf; uint32_t cnt = sci_buf[0].cnt; - + if (!buf || !cnt) { SCI5.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE); return; diff --git a/hw/bsp/samd11/boards/samd11_xplained/samd11d14am_flash.ld b/hw/bsp/samd11/boards/samd11_xplained/samd11d14am_flash.ld index 8b3124c0e..9e12acec8 100644 --- a/hw/bsp/samd11/boards/samd11_xplained/samd11d14am_flash.ld +++ b/hw/bsp/samd11/boards/samd11_xplained/samd11d14am_flash.ld @@ -14,9 +14,9 @@ * Licensed under the Apache License, Version 2.0 (the "License"); you may * not use this file except in compliance with the License. * You may obtain a copy of the Licence at - * + * * http://www.apache.org/licenses/LICENSE-2.0 - * + * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an AS IS BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. diff --git a/hw/bsp/samd21/boards/atsamd21_xpro/board.h b/hw/bsp/samd21/boards/atsamd21_xpro/board.h index a3e03997c..315e40c78 100644 --- a/hw/bsp/samd21/boards/atsamd21_xpro/board.h +++ b/hw/bsp/samd21/boards/atsamd21_xpro/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/circuitplayground_express/board.h b/hw/bsp/samd21/boards/circuitplayground_express/board.h index 2d7da1c0b..0037db00d 100644 --- a/hw/bsp/samd21/boards/circuitplayground_express/board.h +++ b/hw/bsp/samd21/boards/circuitplayground_express/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/curiosity_nano/board.h b/hw/bsp/samd21/boards/curiosity_nano/board.h index 67924d809..1a4a833a3 100644 --- a/hw/bsp/samd21/boards/curiosity_nano/board.h +++ b/hw/bsp/samd21/boards/curiosity_nano/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/feather_m0_express/board.h b/hw/bsp/samd21/boards/feather_m0_express/board.h index b9292b9af..8e0caa6bd 100644 --- a/hw/bsp/samd21/boards/feather_m0_express/board.h +++ b/hw/bsp/samd21/boards/feather_m0_express/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/itsybitsy_m0/board.h b/hw/bsp/samd21/boards/itsybitsy_m0/board.h index 177fb695e..6ee814da5 100644 --- a/hw/bsp/samd21/boards/itsybitsy_m0/board.h +++ b/hw/bsp/samd21/boards/itsybitsy_m0/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/luna_d21/board.h b/hw/bsp/samd21/boards/luna_d21/board.h index 2e0a2a60f..776063636 100644 --- a/hw/bsp/samd21/boards/luna_d21/board.h +++ b/hw/bsp/samd21/boards/luna_d21/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/luna_d21/board.mk b/hw/bsp/samd21/boards/luna_d21/board.mk index 27a634e3a..508a72b1f 100644 --- a/hw/bsp/samd21/boards/luna_d21/board.mk +++ b/hw/bsp/samd21/boards/luna_d21/board.mk @@ -8,4 +8,3 @@ JLINK_DEVICE = ATSAMD21G18 # flash using dfu-util flash: $(BUILD)/$(PROJECT).bin dfu-util -a 0 -d 1d50:615c -D $< || dfu-util -a 0 -d 16d0:05a5 -D $< - diff --git a/hw/bsp/samd21/boards/metro_m0_express/board.h b/hw/bsp/samd21/boards/metro_m0_express/board.h index 13b7556b0..d26aae53c 100644 --- a/hw/bsp/samd21/boards/metro_m0_express/board.h +++ b/hw/bsp/samd21/boards/metro_m0_express/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/qtpy/board.h b/hw/bsp/samd21/boards/qtpy/board.h index 6f8325e49..9ba39e966 100644 --- a/hw/bsp/samd21/boards/qtpy/board.h +++ b/hw/bsp/samd21/boards/qtpy/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/seeeduino_xiao/board.h b/hw/bsp/samd21/boards/seeeduino_xiao/board.h index 0d1e9cef1..1bd63d6d9 100644 --- a/hw/bsp/samd21/boards/seeeduino_xiao/board.h +++ b/hw/bsp/samd21/boards/seeeduino_xiao/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd21/boards/trinket_m0/board.h b/hw/bsp/samd21/boards/trinket_m0/board.h index c8692e6bd..741f2a7f3 100644 --- a/hw/bsp/samd21/boards/trinket_m0/board.h +++ b/hw/bsp/samd21/boards/trinket_m0/board.h @@ -31,4 +31,3 @@ // UART #define UART_SERCOM 0 - diff --git a/hw/bsp/samd21/boards/trinket_m0/board.mk b/hw/bsp/samd21/boards/trinket_m0/board.mk index 803ffe892..6addf13b7 100644 --- a/hw/bsp/samd21/boards/trinket_m0/board.mk +++ b/hw/bsp/samd21/boards/trinket_m0/board.mk @@ -2,4 +2,3 @@ CFLAGS += -D__SAMD21E18A__ -DCFG_EXAMPLE_VIDEO_READONLY # All source paths should be relative to the top level. LD_FILE = $(BOARD_PATH)/trinket_m0.ld - diff --git a/hw/bsp/samd21/family.c b/hw/bsp/samd21/family.c index 494dc393a..308fb51b5 100644 --- a/hw/bsp/samd21/family.c +++ b/hw/bsp/samd21/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd51/boards/feather_m4_express/board.h b/hw/bsp/samd51/boards/feather_m4_express/board.h index 1d5ed8040..4629643fd 100644 --- a/hw/bsp/samd51/boards/feather_m4_express/board.h +++ b/hw/bsp/samd51/boards/feather_m4_express/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd51/boards/itsybitsy_m4/board.h b/hw/bsp/samd51/boards/itsybitsy_m4/board.h index 0760d4288..272315771 100644 --- a/hw/bsp/samd51/boards/itsybitsy_m4/board.h +++ b/hw/bsp/samd51/boards/itsybitsy_m4/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd51/boards/metro_m4_express/board.h b/hw/bsp/samd51/boards/metro_m4_express/board.h index ab10ae4f8..5d7734576 100644 --- a/hw/bsp/samd51/boards/metro_m4_express/board.h +++ b/hw/bsp/samd51/boards/metro_m4_express/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd51/boards/metro_m4_express/board.mk b/hw/bsp/samd51/boards/metro_m4_express/board.mk index d7953cc24..57a680e91 100644 --- a/hw/bsp/samd51/boards/metro_m4_express/board.mk +++ b/hw/bsp/samd51/boards/metro_m4_express/board.mk @@ -7,4 +7,3 @@ LD_FILE = $(BOARD_PATH)/$(BOARD).ld JLINK_DEVICE = ATSAMD51J19 flash: flash-bossac - diff --git a/hw/bsp/samd51/boards/pybadge/board.h b/hw/bsp/samd51/boards/pybadge/board.h index 1d5ed8040..4629643fd 100644 --- a/hw/bsp/samd51/boards/pybadge/board.h +++ b/hw/bsp/samd51/boards/pybadge/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd51/boards/pyportal/board.h b/hw/bsp/samd51/boards/pyportal/board.h index 9e51ded32..ff04c900b 100644 --- a/hw/bsp/samd51/boards/pyportal/board.h +++ b/hw/bsp/samd51/boards/pyportal/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c index 020e638c4..3da89ee14 100644 --- a/hw/bsp/samd51/family.c +++ b/hw/bsp/samd51/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/same54xplainedpro/same54p20a_flash.ld b/hw/bsp/same54xplainedpro/same54p20a_flash.ld index 97072bfe6..1f427a066 100644 --- a/hw/bsp/same54xplainedpro/same54p20a_flash.ld +++ b/hw/bsp/same54xplainedpro/same54p20a_flash.ld @@ -14,9 +14,9 @@ * Licensed under the Apache License, Version 2.0 (the "License"); you may * not use this file except in compliance with the License. * You may obtain a copy of the Licence at - * + * * http://www.apache.org/licenses/LICENSE-2.0 - * + * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an AS IS BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. diff --git a/hw/bsp/same54xplainedpro/same54p20a_sram.ld b/hw/bsp/same54xplainedpro/same54p20a_sram.ld index 6219f4afe..e6e33ec48 100644 --- a/hw/bsp/same54xplainedpro/same54p20a_sram.ld +++ b/hw/bsp/same54xplainedpro/same54p20a_sram.ld @@ -14,9 +14,9 @@ * Licensed under the Apache License, Version 2.0 (the "License"); you may * not use this file except in compliance with the License. * You may obtain a copy of the Licence at - * + * * http://www.apache.org/licenses/LICENSE-2.0 - * + * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an AS IS BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. diff --git a/hw/bsp/samg55xplained/samg55xplained.c b/hw/bsp/samg55xplained/samg55xplained.c index 027c88e2f..6e1ed56a9 100644 --- a/hw/bsp/samg55xplained/samg55xplained.c +++ b/hw/bsp/samg55xplained/samg55xplained.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, hathach (tinyusb.org) diff --git a/hw/bsp/saml2x/boards/atsaml21_xpro/board.h b/hw/bsp/saml2x/boards/atsaml21_xpro/board.h index a3e03997c..315e40c78 100644 --- a/hw/bsp/saml2x/boards/atsaml21_xpro/board.h +++ b/hw/bsp/saml2x/boards/atsaml21_xpro/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/saml2x/boards/saml22_feather/board.h b/hw/bsp/saml2x/boards/saml22_feather/board.h index 13a326000..72e9897b6 100644 --- a/hw/bsp/saml2x/boards/saml22_feather/board.h +++ b/hw/bsp/saml2x/boards/saml22_feather/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld b/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld index d1aaa44fc..156c3e7e4 100644 --- a/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld +++ b/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld @@ -14,9 +14,9 @@ * Licensed under the Apache License, Version 2.0 (the "License"); you may * not use this file except in compliance with the License. * You may obtain a copy of the Licence at - * + * * http://www.apache.org/licenses/LICENSE-2.0 - * + * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an AS IS BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. diff --git a/hw/bsp/saml2x/boards/sensorwatch_m0/board.h b/hw/bsp/saml2x/boards/sensorwatch_m0/board.h index 7fc690ab2..735f6afc8 100644 --- a/hw/bsp/saml2x/boards/sensorwatch_m0/board.h +++ b/hw/bsp/saml2x/boards/sensorwatch_m0/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld b/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld index d1aaa44fc..156c3e7e4 100644 --- a/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld +++ b/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld @@ -14,9 +14,9 @@ * Licensed under the Apache License, Version 2.0 (the "License"); you may * not use this file except in compliance with the License. * You may obtain a copy of the Licence at - * + * * http://www.apache.org/licenses/LICENSE-2.0 - * + * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an AS IS BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. diff --git a/hw/bsp/saml2x/family.c b/hw/bsp/saml2x/family.c index 470fde750..f119d23a1 100644 --- a/hw/bsp/saml2x/family.c +++ b/hw/bsp/saml2x/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/sltb009a/sltb009a.c b/hw/bsp/sltb009a/sltb009a.c index b5eb5ed5d..2a5d112a8 100644 --- a/hw/bsp/sltb009a/sltb009a.c +++ b/hw/bsp/sltb009a/sltb009a.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021 Rafael Silva (@perigoso) @@ -712,7 +712,7 @@ uint32_t board_millis(void) * @retval None */ void assert_failed(char *file, uint32_t line) -{ +{ /* USER CODE BEGIN 6 */ /* User can add his own implementation to report the file name and line number, tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ diff --git a/hw/bsp/spresense/board_spresense.c b/hw/bsp/spresense/board_spresense.c index 256bccd15..5f778ad70 100644 --- a/hw/bsp/spresense/board_spresense.c +++ b/hw/bsp/spresense/board_spresense.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright 2019 Sony Semiconductor Solutions Corporation @@ -64,7 +64,7 @@ void board_led_write(bool state) // a '1' means active (pressed), a '0' means inactive. uint32_t board_button_read(void) { - if (board_gpio_read(BUTTON_PIN)) + if (board_gpio_read(BUTTON_PIN)) { return 0; } @@ -96,7 +96,7 @@ uint32_t board_millis(void) /* Wait until RTC is available */ while (g_rtc_enabled == false); - if (clock_gettime(CLOCK_MONOTONIC, &tp)) + if (clock_gettime(CLOCK_MONOTONIC, &tp)) { return 0; } diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h index 7c527e2c2..9af81e63c 100644 --- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h +++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk index cf787a103..1cc443352 100644 --- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk +++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk @@ -12,4 +12,4 @@ IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f070xb_flash.icf JLINK_DEVICE = stm32f070rb # flash target using on-board stlink -flash: flash-stlink \ No newline at end of file +flash: flash-stlink diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld index 4a6491510..6bb9d33cb 100644 --- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld +++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld @@ -102,12 +102,12 @@ SECTIONS . = ALIGN(4); } >FLASH - .ARM.extab : { + .ARM.extab : { . = ALIGN(4); *(.ARM.extab* .gnu.linkonce.armextab.*) . = ALIGN(4); } >FLASH - + .ARM : { . = ALIGN(4); __exidx_start = .; @@ -124,7 +124,7 @@ SECTIONS PROVIDE_HIDDEN (__preinit_array_end = .); . = ALIGN(4); } >FLASH - + .init_array : { . = ALIGN(4); @@ -134,7 +134,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); . = ALIGN(4); } >FLASH - + .fini_array : { . = ALIGN(4); @@ -149,7 +149,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections into "RAM" Ram type memory */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -158,9 +158,9 @@ SECTIONS . = ALIGN(4); _edata = .; /* define a global symbol at data end */ - + } >RAM AT> FLASH - + /* Uninitialized data section into "RAM" Ram type memory */ . = ALIGN(4); .bss : diff --git a/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld b/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld index f0879e929..8715e0723 100644 --- a/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld +++ b/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f0/boards/stm32f072disco/board.h b/hw/bsp/stm32f0/boards/stm32f072disco/board.h index 0b1824b8e..1febd01e8 100644 --- a/hw/bsp/stm32f0/boards/stm32f072disco/board.h +++ b/hw/bsp/stm32f0/boards/stm32f072disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f0/boards/stm32f072eval/board.h b/hw/bsp/stm32f0/boards/stm32f072eval/board.h index 8869d5dc9..7dcfa3e85 100644 --- a/hw/bsp/stm32f0/boards/stm32f072eval/board.h +++ b/hw/bsp/stm32f0/boards/stm32f072eval/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f0/family.c b/hw/bsp/stm32f0/family.c index 884208fb1..bfa843494 100644 --- a/hw/bsp/stm32f0/family.c +++ b/hw/bsp/stm32f0/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f0/stm32f0xx_hal_conf.h b/hw/bsp/stm32f0/stm32f0xx_hal_conf.h index 0bf053e13..b205464f3 100644 --- a/hw/bsp/stm32f0/stm32f0xx_hal_conf.h +++ b/hw/bsp/stm32f0/stm32f0xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F0xx_HAL_CONF_H @@ -30,9 +30,9 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /*#define HAL_ADC_MODULE_ENABLED */ /*#define HAL_CAN_MODULE_ENABLED */ /*#define HAL_CEC_MODULE_ENABLED */ @@ -65,15 +65,15 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ /** - * @brief In the following line adjust the External High Speed oscillator (HSE) Startup - * Timeout value + * @brief In the following line adjust the External High Speed oscillator (HSE) Startup + * Timeout value */ #if !defined (HSE_STARTUP_TIMEOUT) #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ @@ -82,24 +82,24 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz*/ #endif /* HSI_VALUE */ /** - * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup - * Timeout value + * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup + * Timeout value */ -#if !defined (HSI_STARTUP_TIMEOUT) +#if !defined (HSI_STARTUP_TIMEOUT) #define HSI_STARTUP_TIMEOUT 5000U /*!< Time out for HSI start up */ -#endif /* HSI_STARTUP_TIMEOUT */ +#endif /* HSI_STARTUP_TIMEOUT */ /** * @brief Internal High Speed oscillator for ADC (HSI14) value. */ -#if !defined (HSI14_VALUE) +#if !defined (HSI14_VALUE) #define HSI14_VALUE 14000000U /*!< Value of the Internal High Speed oscillator for ADC in Hz. The real value may vary depending on the variations in voltage and temperature. */ @@ -108,7 +108,7 @@ /** * @brief Internal High Speed oscillator for USB (HSI48) value. */ -#if !defined (HSI48_VALUE) +#if !defined (HSI48_VALUE) #define HSI48_VALUE 48000000U /*!< Value of the Internal High Speed oscillator for USB in Hz. The real value may vary depending on the variations in voltage and temperature. */ @@ -117,8 +117,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE 32000U +#if !defined (LSI_VALUE) + #define LSI_VALUE 32000U #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -127,7 +127,7 @@ */ #if !defined (LSE_VALUE) #define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ +#endif /* LSE_VALUE */ /** * @brief Time out for LSE start up value in ms. @@ -143,8 +143,8 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ -#define VDD_VALUE 3300U /*!< Value of VDD in mv */ + */ +#define VDD_VALUE 3300U /*!< Value of VDD in mv */ #define TICK_INT_PRIORITY ((uint32_t)(1U<<__NVIC_PRIO_BITS) - 1U) /*!< tick interrupt priority (lowest by default) */ /* Warning: Must be set to higher priority for HAL_Delay() */ /* and HAL_GetTick() usage under interrupt context */ @@ -175,14 +175,14 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ - #define USE_FULL_ASSERT 1 + #define USE_FULL_ASSERT 1 /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -299,7 +299,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ @@ -308,8 +308,8 @@ void assert_failed(const char* file, uint32_t line); #else #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - +#endif /* USE_FULL_ASSERT */ + #ifdef __cplusplus } #endif @@ -318,4 +318,3 @@ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld b/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld index c434ca038..95836522e 100644 --- a/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld +++ b/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h index 57a607ed5..8fa8f4ffa 100644 --- a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h +++ b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld b/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld index da637d1b0..524ac7c03 100644 --- a/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld +++ b/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.h b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.h index bedce7f14..c8dba4268 100644 --- a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.h +++ b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c index 6f0471096..5e112de70 100644 --- a/hw/bsp/stm32f1/family.c +++ b/hw/bsp/stm32f1/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -53,7 +53,7 @@ void USBWakeUp_IRQHandler(void) void board_init(void) { board_stm32f1_clock_init(); - + // Enable All GPIOs clocks __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); @@ -70,7 +70,7 @@ void board_init(void) NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); NVIC_SetPriority(USBWakeUp_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif - + // LED GPIO_InitTypeDef GPIO_InitStruct; GPIO_InitStruct.Pin = LED_PIN; @@ -153,7 +153,7 @@ void HardFault_Handler (void) * @retval None */ void assert_failed(const char *file, uint32_t line) -{ +{ /* USER CODE BEGIN 6 */ /* User can add his own implementation to report the file name and line number, tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ diff --git a/hw/bsp/stm32f1/stm32f1xx_hal_conf.h b/hw/bsp/stm32f1/stm32f1xx_hal_conf.h index 5243e5bca..45ef993da 100644 --- a/hw/bsp/stm32f1/stm32f1xx_hal_conf.h +++ b/hw/bsp/stm32f1/stm32f1xx_hal_conf.h @@ -32,7 +32,7 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ #define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ @@ -69,9 +69,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #if defined(USE_STM3210C_EVAL) #define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */ #else @@ -86,7 +86,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz */ @@ -95,7 +95,7 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) #define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -119,7 +119,7 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE 3300U /*!< Value of VDD in mv */ #define TICK_INT_PRIORITY 0x00U /*!< tick interrupt priority */ #define USE_RTOS 0U @@ -151,7 +151,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -168,7 +168,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 8U /* 8 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -176,9 +176,9 @@ /* Section 2: PHY configuration section */ -/* DP83848 PHY Address*/ +/* DP83848 PHY Address*/ #define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -190,7 +190,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -205,13 +205,13 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ #define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ #define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ - + #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ @@ -233,7 +233,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -243,7 +243,7 @@ #ifdef HAL_GPIO_MODULE_ENABLED #include "stm32f1xx_hal_gpio.h" #endif /* HAL_GPIO_MODULE_ENABLED */ - + #ifdef HAL_EXTI_MODULE_ENABLED #include "stm32f1xx_hal_exti.h" #endif /* HAL_EXTI_MODULE_ENABLED */ @@ -251,7 +251,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f1xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CAN_MODULE_ENABLED #include "stm32f1xx_hal_can.h" #endif /* HAL_CAN_MODULE_ENABLED */ @@ -310,15 +310,15 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f1xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ +#endif /* HAL_PCCARD_MODULE_ENABLED */ #ifdef HAL_SD_MODULE_ENABLED #include "stm32f1xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ +#endif /* HAL_SD_MODULE_ENABLED */ #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f1xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_SPI_MODULE_ENABLED #include "stm32f1xx_hal_spi.h" @@ -358,7 +358,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr: If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ @@ -367,8 +367,8 @@ void assert_failed(const char* file, uint32_t line); #else #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - +#endif /* USE_FULL_ASSERT */ + #ifdef __cplusplus } #endif diff --git a/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld b/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld index 5010435ae..3fce1b578 100644 --- a/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld +++ b/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f207nucleo/stm32f207nucleo.c b/hw/bsp/stm32f207nucleo/stm32f207nucleo.c index d77643661..80f762c93 100644 --- a/hw/bsp/stm32f207nucleo/stm32f207nucleo.c +++ b/hw/bsp/stm32f207nucleo/stm32f207nucleo.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -105,7 +105,7 @@ void SystemClock_Config(void) void board_init(void) { SystemClock_Config(); - + #if CFG_TUSB_OS == OPT_OS_NONE // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); diff --git a/hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h b/hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h index 2ab46b260..b38a9d951 100644 --- a/hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h +++ b/hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F2xx_HAL_CONF_H @@ -30,9 +30,9 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CRC_MODULE_ENABLED */ @@ -42,7 +42,7 @@ /* #define HAL_DMA_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ #define HAL_EXTI_MODULE_ENABLED -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ @@ -52,8 +52,8 @@ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ /* #define HAL_IWDG_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SD_MODULE_ENABLED */ @@ -65,7 +65,7 @@ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ #define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED +#define HAL_PCD_MODULE_ENABLED /* #define HAL_HCD_MODULE_ENABLED */ @@ -73,9 +73,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -86,7 +86,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ @@ -95,7 +95,7 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -113,8 +113,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the Internal oscillator in Hz*/ @@ -126,7 +126,7 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE 3300U /*!< Value of VDD in mv */ #define TICK_INT_PRIORITY 0x0FU /*!< tick interrupt priority */ #define USE_RTOS 0U @@ -163,7 +163,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -180,7 +180,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 5U /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -190,7 +190,7 @@ /* LAN8742A PHY Address*/ #define LAN8742A_PHY_ADDRESS 0x00U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -202,7 +202,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -217,7 +217,7 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x1F) /*!< PHY special control/ status register Offset */ @@ -228,7 +228,7 @@ #define PHY_ISFR ((uint16_t)0x1D) /*!< PHY Interrupt Source Flag register Offset */ #define PHY_ISFR_INT4 ((uint16_t)0x0010) /*!< PHY Link down inturrupt */ - + /* ################## SPI peripheral configuration ########################## */ /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver @@ -240,7 +240,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -258,7 +258,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f2xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f2xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -276,7 +276,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f2xx_hal_cryp.h" + #include "stm32f2xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DAC_MODULE_ENABLED @@ -294,7 +294,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f2xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f2xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -309,7 +309,7 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f2xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ +#endif /* HAL_PCCARD_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f2xx_hal_hash.h" @@ -378,14 +378,14 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f2xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + /* Exported macro ------------------------------------------------------------*/ #ifdef USE_FULL_ASSERT /** * @brief The assert_param macro is used for function's parameters check. * @param expr: If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ @@ -402,6 +402,6 @@ #endif #endif /* __STM32F2xx_HAL_CONF_H */ - + /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld b/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld index 7f46c71b2..981107af1 100644 --- a/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld +++ b/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld @@ -115,7 +115,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -128,11 +128,11 @@ SECTIONS _siccmram = LOADADDR(.ccmram); - /* CCM-RAM section - * - * IMPORTANT NOTE! + /* CCM-RAM section + * + * IMPORTANT NOTE! * If initialized variables will be placed in this section, - * the startup code needs to be modified to copy the init-values. + * the startup code needs to be modified to copy the init-values. */ .ccmram : { @@ -140,12 +140,12 @@ SECTIONS _sccmram = .; /* create a global symbol at ccmram start */ *(.ccmram) *(.ccmram*) - + . = ALIGN(4); _eccmram = .; /* create a global symbol at ccmram end */ } >CCMRAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -173,7 +173,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -185,5 +185,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f303disco/stm32f303disco.c b/hw/bsp/stm32f303disco/stm32f303disco.c index 940c49d26..ac9bda983 100644 --- a/hw/bsp/stm32f303disco/stm32f303disco.c +++ b/hw/bsp/stm32f303disco/stm32f303disco.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h b/hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h index 0abcbb019..82d3765af 100644 --- a/hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h +++ b/hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F3xx_HAL_CONF_H @@ -30,9 +30,9 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ @@ -57,7 +57,7 @@ /* #define HAL_OPAMP_MODULE_ENABLED */ /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_PWR_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SDADC_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ @@ -73,15 +73,15 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ /** - * @brief In the following line adjust the External High Speed oscillator (HSE) Startup - * Timeout value + * @brief In the following line adjust the External High Speed oscillator (HSE) Startup + * Timeout value */ #if !defined (HSE_STARTUP_TIMEOUT) #define HSE_STARTUP_TIMEOUT (100U) /*!< Time out for HSE start up, in ms */ @@ -90,25 +90,25 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (8000000U) /*!< Value of the Internal oscillator in Hz*/ #endif /* HSI_VALUE */ /** - * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup - * Timeout value + * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup + * Timeout value */ -#if !defined (HSI_STARTUP_TIMEOUT) +#if !defined (HSI_STARTUP_TIMEOUT) #define HSI_STARTUP_TIMEOUT (5000U) /*!< Time out for HSI start up */ -#endif /* HSI_STARTUP_TIMEOUT */ +#endif /* HSI_STARTUP_TIMEOUT */ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (40000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (40000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -124,11 +124,11 @@ */ #if !defined (LSE_STARTUP_TIMEOUT) #define LSE_STARTUP_TIMEOUT (5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ +#endif /* LSE_STARTUP_TIMEOUT */ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source + * This value is used by the I2S HAL module to compute the I2S clock source * frequency, this source is inserted directly through I2S_CKIN pad. * - External clock generated through external PLL component on EVAL 303 (based on MCO or crystal) * - External clock not generated on EVAL 373 @@ -256,8 +256,8 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f3xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_HRTIM_MODULE_ENABLED #include "stm32f3xx_hal_hrtim.h" #endif /* HAL_HRTIM_MODULE_ENABLED */ diff --git a/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld b/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld index 9eb53bcc0..0dc2879a4 100644 --- a/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld @@ -115,7 +115,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -128,11 +128,11 @@ SECTIONS _siccmram = LOADADDR(.ccmram); - /* CCM-RAM section - * - * IMPORTANT NOTE! + /* CCM-RAM section + * + * IMPORTANT NOTE! * If initialized variables will be placed in this section, - * the startup code needs to be modified to copy the init-values. + * the startup code needs to be modified to copy the init-values. */ .ccmram : { @@ -140,12 +140,12 @@ SECTIONS _sccmram = .; /* create a global symbol at ccmram start */ *(.ccmram) *(.ccmram*) - + . = ALIGN(4); _eccmram = .; /* create a global symbol at ccmram end */ } >CCMRAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -173,7 +173,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -185,5 +185,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/feather_stm32f405/board.h b/hw/bsp/stm32f4/boards/feather_stm32f405/board.h index 19d0a1ea4..d1ad2a6ce 100644 --- a/hw/bsp/stm32f4/boards/feather_stm32f405/board.h +++ b/hw/bsp/stm32f4/boards/feather_stm32f405/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld b/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld index 9eb53bcc0..0dc2879a4 100644 --- a/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld @@ -115,7 +115,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -128,11 +128,11 @@ SECTIONS _siccmram = LOADADDR(.ccmram); - /* CCM-RAM section - * - * IMPORTANT NOTE! + /* CCM-RAM section + * + * IMPORTANT NOTE! * If initialized variables will be placed in this section, - * the startup code needs to be modified to copy the init-values. + * the startup code needs to be modified to copy the init-values. */ .ccmram : { @@ -140,12 +140,12 @@ SECTIONS _sccmram = .; /* create a global symbol at ccmram start */ *(.ccmram) *(.ccmram*) - + . = ALIGN(4); _eccmram = .; /* create a global symbol at ccmram end */ } >CCMRAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -173,7 +173,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -185,5 +185,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/pyboardv11/board.h b/hw/bsp/stm32f4/boards/pyboardv11/board.h index 685919c57..c126f0666 100644 --- a/hw/bsp/stm32f4/boards/pyboardv11/board.h +++ b/hw/bsp/stm32f4/boards/pyboardv11/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld index 2bc5f6c14..b91f456ca 100644 --- a/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h index e1fef7277..e6c99a462 100644 --- a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h +++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h index 2ab9a1d57..16f081cfb 100644 --- a/hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h +++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_CONF_H @@ -30,38 +30,38 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +#define HAL_DMA_MODULE_ENABLED +/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED /* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -69,11 +69,11 @@ // #define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ @@ -86,9 +86,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (25000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -108,8 +108,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (32000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -126,8 +126,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/ @@ -139,9 +139,9 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ +#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U #define PREFETCH_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -205,7 +205,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -213,9 +213,9 @@ /* Section 2: PHY configuration section */ -/* DP83848 PHY Address*/ +/* DP83848 PHY Address*/ #define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -227,7 +227,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -242,13 +242,13 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ #define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ #define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ - + #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ @@ -270,7 +270,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -288,7 +288,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f4xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f4xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -310,7 +310,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" + #include "stm32f4xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -332,7 +332,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f4xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f4xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -347,11 +347,11 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f4xx_hal_hash.h" @@ -432,7 +432,7 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f4xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + #ifdef HAL_DSI_MODULE_ENABLED #include "stm32f4xx_hal_dsi.h" #endif /* HAL_DSI_MODULE_ENABLED */ @@ -471,7 +471,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld index aac6577ea..549787945 100644 --- a/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld @@ -115,7 +115,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -128,11 +128,11 @@ SECTIONS _siccmram = LOADADDR(.ccmram); - /* CCM-RAM section - * - * IMPORTANT NOTE! + /* CCM-RAM section + * + * IMPORTANT NOTE! * If initialized variables will be placed in this section, - * the startup code needs to be modified to copy the init-values. + * the startup code needs to be modified to copy the init-values. */ .ccmram : { @@ -140,12 +140,12 @@ SECTIONS _sccmram = .; /* create a global symbol at ccmram start */ *(.ccmram) *(.ccmram*) - + . = ALIGN(4); _eccmram = .; /* create a global symbol at ccmram end */ } >CCMRAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -173,7 +173,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -185,5 +185,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/board.h b/hw/bsp/stm32f4/boards/stm32f407disco/board.h index 693e0393f..c38f354ce 100644 --- a/hw/bsp/stm32f4/boards/stm32f407disco/board.h +++ b/hw/bsp/stm32f4/boards/stm32f407disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h index 7864f8d5f..e24e782ea 100644 --- a/hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h +++ b/hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_CONF_H @@ -30,38 +30,38 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +#define HAL_DMA_MODULE_ENABLED +/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED /* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -69,11 +69,11 @@ // #define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ @@ -86,9 +86,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -108,8 +108,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (32000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -126,8 +126,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/ @@ -139,9 +139,9 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ +#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U #define PREFETCH_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -205,7 +205,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -213,9 +213,9 @@ /* Section 2: PHY configuration section */ -/* DP83848 PHY Address*/ +/* DP83848 PHY Address*/ #define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -227,7 +227,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -242,13 +242,13 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ #define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ #define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ - + #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ @@ -270,7 +270,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -288,7 +288,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f4xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f4xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -310,7 +310,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" + #include "stm32f4xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -332,7 +332,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f4xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f4xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -347,11 +347,11 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f4xx_hal_hash.h" @@ -432,7 +432,7 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f4xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + #ifdef HAL_DSI_MODULE_ENABLED #include "stm32f4xx_hal_dsi.h" #endif /* HAL_DSI_MODULE_ENABLED */ @@ -471,7 +471,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld index 56dcea605..45912ac32 100644 --- a/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(4); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h index e1fef7277..e6c99a462 100644 --- a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h +++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h index 2ab9a1d57..16f081cfb 100644 --- a/hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h +++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_CONF_H @@ -30,38 +30,38 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +#define HAL_DMA_MODULE_ENABLED +/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED /* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -69,11 +69,11 @@ // #define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ @@ -86,9 +86,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (25000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -108,8 +108,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (32000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -126,8 +126,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/ @@ -139,9 +139,9 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ +#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U #define PREFETCH_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -205,7 +205,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -213,9 +213,9 @@ /* Section 2: PHY configuration section */ -/* DP83848 PHY Address*/ +/* DP83848 PHY Address*/ #define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -227,7 +227,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -242,13 +242,13 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ #define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ #define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ - + #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ @@ -270,7 +270,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -288,7 +288,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f4xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f4xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -310,7 +310,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" + #include "stm32f4xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -332,7 +332,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f4xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f4xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -347,11 +347,11 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f4xx_hal_hash.h" @@ -432,7 +432,7 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f4xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + #ifdef HAL_DSI_MODULE_ENABLED #include "stm32f4xx_hal_dsi.h" #endif /* HAL_DSI_MODULE_ENABLED */ @@ -471,7 +471,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld index 4477229ea..85bf5c4c4 100644 --- a/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/board.h b/hw/bsp/stm32f4/boards/stm32f411disco/board.h index 008a94a5d..57d1e061e 100644 --- a/hw/bsp/stm32f4/boards/stm32f411disco/board.h +++ b/hw/bsp/stm32f4/boards/stm32f411disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h index 7864f8d5f..e24e782ea 100644 --- a/hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h +++ b/hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_CONF_H @@ -30,38 +30,38 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +#define HAL_DMA_MODULE_ENABLED +/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED /* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -69,11 +69,11 @@ // #define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ @@ -86,9 +86,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -108,8 +108,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (32000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -126,8 +126,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/ @@ -139,9 +139,9 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ +#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U #define PREFETCH_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -205,7 +205,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -213,9 +213,9 @@ /* Section 2: PHY configuration section */ -/* DP83848 PHY Address*/ +/* DP83848 PHY Address*/ #define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -227,7 +227,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -242,13 +242,13 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ #define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ #define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ - + #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ @@ -270,7 +270,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -288,7 +288,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f4xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f4xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -310,7 +310,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" + #include "stm32f4xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -332,7 +332,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f4xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f4xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -347,11 +347,11 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f4xx_hal_hash.h" @@ -432,7 +432,7 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f4xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + #ifdef HAL_DSI_MODULE_ENABLED #include "stm32f4xx_hal_dsi.h" #endif /* HAL_DSI_MODULE_ENABLED */ @@ -471,7 +471,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld index 2372cc1d9..38dd3d321 100644 --- a/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/board.h b/hw/bsp/stm32f4/boards/stm32f412disco/board.h index 7f4a4fa15..d61b70eb9 100644 --- a/hw/bsp/stm32f4/boards/stm32f412disco/board.h +++ b/hw/bsp/stm32f4/boards/stm32f412disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h index 7864f8d5f..e24e782ea 100644 --- a/hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h +++ b/hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_CONF_H @@ -30,38 +30,38 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +#define HAL_DMA_MODULE_ENABLED +/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED /* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -69,11 +69,11 @@ // #define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ @@ -86,9 +86,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -108,8 +108,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (32000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -126,8 +126,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/ @@ -139,9 +139,9 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ +#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U #define PREFETCH_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -205,7 +205,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -213,9 +213,9 @@ /* Section 2: PHY configuration section */ -/* DP83848 PHY Address*/ +/* DP83848 PHY Address*/ #define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -227,7 +227,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -242,13 +242,13 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ #define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ #define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ - + #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ @@ -270,7 +270,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -288,7 +288,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f4xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f4xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -310,7 +310,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" + #include "stm32f4xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -332,7 +332,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f4xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f4xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -347,11 +347,11 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f4xx_hal_hash.h" @@ -432,7 +432,7 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f4xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + #ifdef HAL_DSI_MODULE_ENABLED #include "stm32f4xx_hal_dsi.h" #endif /* HAL_DSI_MODULE_ENABLED */ @@ -471,7 +471,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ diff --git a/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld index 2372cc1d9..38dd3d321 100644 --- a/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld +++ b/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h index 7864f8d5f..e24e782ea 100644 --- a/hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h +++ b/hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_CONF_H @@ -30,38 +30,38 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +#define HAL_DMA_MODULE_ENABLED +/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED /* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -69,11 +69,11 @@ // #define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ @@ -86,9 +86,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -108,8 +108,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (32000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -126,8 +126,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/ @@ -139,9 +139,9 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ +#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U #define PREFETCH_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -205,7 +205,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -213,9 +213,9 @@ /* Section 2: PHY configuration section */ -/* DP83848 PHY Address*/ +/* DP83848 PHY Address*/ #define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY 0x000000FFU /* PHY Configuration delay */ #define PHY_CONFIG_DELAY 0x00000FFFU @@ -227,7 +227,7 @@ #define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -242,13 +242,13 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */ #define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ #define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ - + #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */ @@ -270,7 +270,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -288,7 +288,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f4xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f4xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -310,7 +310,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" + #include "stm32f4xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -332,7 +332,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f4xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f4xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -347,11 +347,11 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f4xx_hal_hash.h" @@ -432,7 +432,7 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f4xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + #ifdef HAL_DSI_MODULE_ENABLED #include "stm32f4xx_hal_dsi.h" #endif /* HAL_DSI_MODULE_ENABLED */ @@ -471,7 +471,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ diff --git a/hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h index a2c11d717..7bbd6b54f 100644 --- a/hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h +++ b/hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_CONF_H @@ -30,38 +30,38 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +#define HAL_DMA_MODULE_ENABLED +/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_PCCARD_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED /* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -69,11 +69,11 @@ // #define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ @@ -86,9 +86,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -108,8 +108,8 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) - #define LSI_VALUE (32000U) +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000U) #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature. */ @@ -126,8 +126,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE (12288000U) /*!< Value of the External oscillator in Hz*/ @@ -139,9 +139,9 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ +#define TICK_INT_PRIORITY (0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U #define PREFETCH_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -263,7 +263,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -281,7 +281,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f4xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f4xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -303,7 +303,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" + #include "stm32f4xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -325,7 +325,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f4xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f4xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -340,11 +340,11 @@ #ifdef HAL_PCCARD_MODULE_ENABLED #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - +#endif /* HAL_PCCARD_MODULE_ENABLED */ + #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f4xx_hal_hash.h" @@ -425,7 +425,7 @@ #ifdef HAL_HCD_MODULE_ENABLED #include "stm32f4xx_hal_hcd.h" #endif /* HAL_HCD_MODULE_ENABLED */ - + #ifdef HAL_DSI_MODULE_ENABLED #include "stm32f4xx_hal_dsi.h" #endif /* HAL_DSI_MODULE_ENABLED */ @@ -464,7 +464,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c index 93ab5bb35..a308bae05 100644 --- a/hw/bsp/stm32f4/family.c +++ b/hw/bsp/stm32f4/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f7/boards/stlinkv3mini/board.h b/hw/bsp/stm32f7/boards/stlinkv3mini/board.h index d0ef6625f..ed02df061 100644 --- a/hw/bsp/stm32f7/boards/stlinkv3mini/board.h +++ b/hw/bsp/stm32f7/boards/stlinkv3mini/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f7/boards/stm32f723disco/board.h b/hw/bsp/stm32f7/boards/stm32f723disco/board.h index 93d83efc6..258786b7f 100644 --- a/hw/bsp/stm32f7/boards/stm32f723disco/board.h +++ b/hw/bsp/stm32f7/boards/stm32f723disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/board.h b/hw/bsp/stm32f7/boards/stm32f746disco/board.h index ee342b9f5..1c7e6dd2b 100644 --- a/hw/bsp/stm32f7/boards/stm32f746disco/board.h +++ b/hw/bsp/stm32f7/boards/stm32f746disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld b/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld index e1e60bc78..eeb0e29f3 100644 --- a/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld +++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h index 92c109a72..cf895af87 100644 --- a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h +++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h index 234191b00..03dec8f0d 100644 --- a/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h +++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h @@ -2,7 +2,7 @@ ****************************************************************************** * @file stm32f7xx_hal_conf.h * @author MCD Application Team - * @brief HAL configuration file. + * @brief HAL configuration file. ****************************************************************************** * @attention * @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F7xx_HAL_CONF_H @@ -30,9 +30,9 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ @@ -44,7 +44,7 @@ #define HAL_DMA_MODULE_ENABLED /* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ @@ -58,7 +58,7 @@ /* #define HAL_LTDC_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -84,9 +84,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -97,7 +97,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -106,7 +106,7 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -124,8 +124,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/ @@ -137,7 +137,7 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ #define TICK_INT_PRIORITY ((uint32_t)0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U @@ -185,7 +185,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1 */ @@ -202,7 +202,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -211,7 +211,7 @@ /* Section 2: PHY configuration section */ /* LAN8742A PHY Address*/ #define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY ((uint32_t)0x00000FFF) /* PHY Configuration delay */ #define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) @@ -223,7 +223,7 @@ #define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -238,7 +238,7 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x1F) /*!< PHY special control/ status register Offset */ @@ -261,7 +261,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -275,7 +275,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f7xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f7xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -301,7 +301,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" + #include "stm32f7xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -323,7 +323,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f7xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f7xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -338,7 +338,7 @@ #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f7xx_hal_hash.h" @@ -443,14 +443,14 @@ #ifdef HAL_MDIOS_MODULE_ENABLED #include "stm32f7xx_hal_mdios.h" #endif /* HAL_MDIOS_MODULE_ENABLED */ - + /* Exported macro ------------------------------------------------------------*/ #ifdef USE_FULL_ASSERT /** * @brief The assert_param macro is used for function's parameters check. * @param expr: If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ @@ -467,6 +467,6 @@ #endif #endif /* __STM32F7xx_HAL_CONF_H */ - + /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld b/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld index 3785f9cbf..520a75539 100644 --- a/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld +++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h index 1283f2313..e053572a7 100644 --- a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h +++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk index a460245b2..be5862612 100644 --- a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk +++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk @@ -1,5 +1,5 @@ PORT ?= 0 -SPEED ?= full +SPEED ?= full CFLAGS += \ -DSTM32F767xx \ diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h index 234191b00..03dec8f0d 100644 --- a/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h +++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h @@ -2,7 +2,7 @@ ****************************************************************************** * @file stm32f7xx_hal_conf.h * @author MCD Application Team - * @brief HAL configuration file. + * @brief HAL configuration file. ****************************************************************************** * @attention * @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F7xx_HAL_CONF_H @@ -30,9 +30,9 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */ @@ -44,7 +44,7 @@ #define HAL_DMA_MODULE_ENABLED /* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ @@ -58,7 +58,7 @@ /* #define HAL_LTDC_MODULE_ENABLED */ #define HAL_PWR_MODULE_ENABLED /* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ @@ -84,9 +84,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -97,7 +97,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -106,7 +106,7 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -124,8 +124,8 @@ /** * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined (EXTERNAL_CLOCK_VALUE) #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/ @@ -137,7 +137,7 @@ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ #define TICK_INT_PRIORITY ((uint32_t)0x0FU) /*!< tick interrupt priority */ #define USE_RTOS 0U @@ -185,7 +185,7 @@ /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1 */ @@ -202,7 +202,7 @@ #define MAC_ADDR4 0U #define MAC_ADDR5 0U -/* Definition of the Ethernet driver buffers size and count */ +/* Definition of the Ethernet driver buffers size and count */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ @@ -211,7 +211,7 @@ /* Section 2: PHY configuration section */ /* LAN8742A PHY Address*/ #define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY ((uint32_t)0x00000FFF) /* PHY Configuration delay */ #define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) @@ -223,7 +223,7 @@ #define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ #define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - + #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ @@ -238,7 +238,7 @@ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - + /* Section 4: Extended PHY Registers */ #define PHY_SR ((uint16_t)0x1F) /*!< PHY special control/ status register Offset */ @@ -261,7 +261,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -275,7 +275,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32f7xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32f7xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -301,7 +301,7 @@ #endif /* HAL_CRC_MODULE_ENABLED */ #ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" + #include "stm32f7xx_hal_cryp.h" #endif /* HAL_CRYP_MODULE_ENABLED */ #ifdef HAL_DMA2D_MODULE_ENABLED @@ -323,7 +323,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32f7xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_SRAM_MODULE_ENABLED #include "stm32f7xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ @@ -338,7 +338,7 @@ #ifdef HAL_SDRAM_MODULE_ENABLED #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ +#endif /* HAL_SDRAM_MODULE_ENABLED */ #ifdef HAL_HASH_MODULE_ENABLED #include "stm32f7xx_hal_hash.h" @@ -443,14 +443,14 @@ #ifdef HAL_MDIOS_MODULE_ENABLED #include "stm32f7xx_hal_mdios.h" #endif /* HAL_MDIOS_MODULE_ENABLED */ - + /* Exported macro ------------------------------------------------------------*/ #ifdef USE_FULL_ASSERT /** * @brief The assert_param macro is used for function's parameters check. * @param expr: If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ @@ -467,6 +467,6 @@ #endif #endif /* __STM32F7xx_HAL_CONF_H */ - + /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32f7/boards/stm32f769disco/board.h b/hw/bsp/stm32f7/boards/stm32f769disco/board.h index 5ec217f5f..472af0b98 100644 --- a/hw/bsp/stm32f7/boards/stm32f769disco/board.h +++ b/hw/bsp/stm32f7/boards/stm32f769disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld b/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld index 9c327483b..c43829994 100644 --- a/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld +++ b/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld @@ -135,7 +135,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -146,7 +146,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -174,7 +174,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -186,5 +186,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c index f3ba54576..f5177fd10 100644 --- a/hw/bsp/stm32g4/family.c +++ b/hw/bsp/stm32g4/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32g4/stm32g4xx_hal_conf.h b/hw/bsp/stm32g4/stm32g4xx_hal_conf.h index ad5f7dbd4..632c4f0ac 100644 --- a/hw/bsp/stm32g4/stm32g4xx_hal_conf.h +++ b/hw/bsp/stm32g4/stm32g4xx_hal_conf.h @@ -15,7 +15,7 @@ * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef STM32G4xx_HAL_CONF_H @@ -30,10 +30,10 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ - -#define HAL_MODULE_ENABLED + +#define HAL_MODULE_ENABLED /*#define HAL_ADC_MODULE_ENABLED */ /*#define HAL_COMP_MODULE_ENABLED */ @@ -111,9 +111,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -124,7 +124,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/ @@ -145,10 +145,10 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature.*/ -#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/ +#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /** * @brief External Low Speed oscillator (LSE) value. @@ -156,7 +156,7 @@ The real value may vary depending on the variations in voltage and temperature.* */ #if !defined (LSE_VALUE) #define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ +#endif /* LSE_VALUE */ #if !defined (LSE_STARTUP_TIMEOUT) #define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */ @@ -177,10 +177,10 @@ The real value may vary depending on the variations in voltage and temperature.* /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE (3300UL) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */ +#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */ #define USE_RTOS 0U #define PREFETCH_ENABLE 0U #define INSTRUCTION_CACHE_ENABLE 1U @@ -188,7 +188,7 @@ The real value may vary depending on the variations in voltage and temperature.* /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ diff --git a/hw/bsp/stm32h7/boards/daisyseed/board.mk b/hw/bsp/stm32h7/boards/daisyseed/board.mk index 4d718f04e..d53782496 100644 --- a/hw/bsp/stm32h7/boards/daisyseed/board.mk +++ b/hw/bsp/stm32h7/boards/daisyseed/board.mk @@ -16,4 +16,3 @@ JLINK_DEVICE = stm32h750ibk6_m7 # flash target using on-board stlink flash: flash-stlink - diff --git a/hw/bsp/stm32h7/boards/daisyseed/stm32h750ibkx_flash.ld b/hw/bsp/stm32h7/boards/daisyseed/stm32h750ibkx_flash.ld index 83904067a..3588ada5b 100644 --- a/hw/bsp/stm32h7/boards/daisyseed/stm32h750ibkx_flash.ld +++ b/hw/bsp/stm32h7/boards/daisyseed/stm32h750ibkx_flash.ld @@ -172,5 +172,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld b/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld index 7ee40671c..336afc01f 100644 --- a/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld +++ b/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld @@ -118,7 +118,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -129,7 +129,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >DTCMRAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -157,7 +157,7 @@ SECTIONS . = ALIGN(8); } >DTCMRAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -169,5 +169,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld b/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld index 7ee40671c..336afc01f 100644 --- a/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld +++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld @@ -118,7 +118,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -129,7 +129,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >DTCMRAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -157,7 +157,7 @@ SECTIONS . = ALIGN(8); } >DTCMRAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -169,5 +169,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.mk b/hw/bsp/stm32h7/boards/stm32h745disco/board.mk index b51b109f6..86347ade7 100644 --- a/hw/bsp/stm32h7/boards/stm32h745disco/board.mk +++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.mk @@ -19,4 +19,3 @@ JLINK_DEVICE = stm32h745xi_m7 # flash target using on-board stlink flash: flash-stlink - diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld b/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld index e99bb977b..697a1a1df 100644 --- a/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld +++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld @@ -171,5 +171,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk index fbf4b55c6..e8202d9fc 100644 --- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk +++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk @@ -21,4 +21,4 @@ IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf JLINK_DEVICE = stm32h743ii # flash target using jlink -flash: flash-jlink \ No newline at end of file +flash: flash-jlink diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c index 65ffc8ef4..35b2cd55b 100644 --- a/hw/bsp/stm32h7/family.c +++ b/hw/bsp/stm32h7/family.c @@ -91,7 +91,7 @@ void board_init(void) #endif NVIC_SetPriority(OTG_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif - + GPIO_InitTypeDef GPIO_InitStruct; // LED diff --git a/hw/bsp/stm32h7/stm32h7xx_hal_conf.h b/hw/bsp/stm32h7/stm32h7xx_hal_conf.h index a7cc6d826..216fc82f2 100644 --- a/hw/bsp/stm32h7/stm32h7xx_hal_conf.h +++ b/hw/bsp/stm32h7/stm32h7xx_hal_conf.h @@ -1,7 +1,7 @@ /** ****************************************************************************** * @file stm32h7xx_hal_conf_template.h - * @brief HAL configuration template file. + * @brief HAL configuration template file. * This file should be copied to the application folder and renamed * to stm32h7xx_hal_conf.h. ****************************************************************************** @@ -32,7 +32,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32H7xx_HAL_CONF_H @@ -478,6 +478,6 @@ #endif #endif /* __STM32H7xx_HAL_CONF_H */ - + /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld b/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld index dfefe59f1..d4d5b6ca5 100644 --- a/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld +++ b/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32l0/boards/stm32l052dap52/board.h b/hw/bsp/stm32l0/boards/stm32l052dap52/board.h index 8ad3e43c8..c8963199b 100644 --- a/hw/bsp/stm32l0/boards/stm32l052dap52/board.h +++ b/hw/bsp/stm32l0/boards/stm32l052dap52/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) @@ -58,43 +58,43 @@ static inline void board_stm32l0_clock_init(void) RCC_OscInitTypeDef RCC_OscInitStruct; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; static RCC_CRSInitTypeDef RCC_CRSInitStruct; - + /* Enable HSI Oscillator to be used as System clock source Enable HSI48 Oscillator to be used as USB clock source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48; RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; - HAL_RCC_OscConfig(&RCC_OscInitStruct); - + HAL_RCC_OscConfig(&RCC_OscInitStruct); + /* Select HSI48 as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); - - /* Select HSI as system clock source and configure the HCLK, PCLK1 and PCLK2 + + /* Select HSI as system clock source and configure the HCLK, PCLK1 and PCLK2 clock dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0); - + /*Configure the clock recovery system (CRS)**********************************/ - + /*Enable CRS Clock*/ - __HAL_RCC_CRS_CLK_ENABLE(); - + __HAL_RCC_CRS_CLK_ENABLE(); + /* Default Synchro Signal division factor (not divided) */ - RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1; + RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1; /* Set the SYNCSRC[1:0] bits according to CRS_Source value */ - RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB; + RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB; /* HSI48 is synchronized with USB SOF at 1KHz rate */ RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000); - RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT; + RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT; /* Set the TRIM[5:0] to the default value*/ - RCC_CRSInitStruct.HSI48CalibrationValue = 0x20; - /* Start automatic synchronization */ + RCC_CRSInitStruct.HSI48CalibrationValue = 0x20; + /* Start automatic synchronization */ HAL_RCCEx_CRSConfig (&RCC_CRSInitStruct); } diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c index dcd71a513..6bce88b39 100644 --- a/hw/bsp/stm32l0/family.c +++ b/hw/bsp/stm32l0/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32l0/stm32l0xx_hal_conf.h b/hw/bsp/stm32l0/stm32l0xx_hal_conf.h index cc20ea8e0..e3a131043 100644 --- a/hw/bsp/stm32l0/stm32l0xx_hal_conf.h +++ b/hw/bsp/stm32l0/stm32l0xx_hal_conf.h @@ -2,22 +2,22 @@ ****************************************************************************** * @file stm32l0xx_hal_conf.h * @author MCD Application Team - * @brief HAL configuration template file. + * @brief HAL configuration template file. * This file should be copied to the application folder and renamed * to stm32l0xx_hal_conf.h. ****************************************************************************** * @attention * - *

© Copyright (c) 2016 STMicroelectronics. + *

© Copyright (c) 2016 STMicroelectronics. * All rights reserved.

* * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the + * the "License"; You may not use this file except in compliance with the * License. You may obtain a copy of the License at: * opensource.org/licenses/BSD-3-Clause * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32L0xx_HAL_CONF_H @@ -32,9 +32,9 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED /*#define HAL_ADC_MODULE_ENABLED */ /*#define HAL_COMP_MODULE_ENABLED */ /*#define HAL_CRC_MODULE_ENABLED */ @@ -69,9 +69,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -90,7 +90,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -99,7 +99,7 @@ /** * @brief Internal High Speed oscillator for USB (HSI48) value. */ -#if !defined (HSI48_VALUE) +#if !defined (HSI48_VALUE) #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB in Hz. The real value may vary depending on the variations in voltage and temperature. */ @@ -108,7 +108,7 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) #define LSI_VALUE ((uint32_t)37000U) /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -128,24 +128,24 @@ #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ #endif /* LSE_STARTUP_TIMEOUT */ - + /* Tip: To avoid modifying this file each time you need to use different HSE, === you can define the HSE value in your toolchain compiler preprocessor. */ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ + */ #define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY (((uint32_t)1U<<__NVIC_PRIO_BITS) - 1U) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U +#define TICK_INT_PRIORITY (((uint32_t)1U<<__NVIC_PRIO_BITS) - 1U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U #define PREREAD_ENABLE 0U #define BUFFER_CACHE_DISABLE 0U /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1U */ @@ -191,13 +191,13 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED #include "stm32l0xx_hal_rcc.h" #endif /* HAL_RCC_MODULE_ENABLED */ - + #ifdef HAL_GPIO_MODULE_ENABLED #include "stm32l0xx_hal_gpio.h" #endif /* HAL_GPIO_MODULE_ENABLED */ @@ -233,11 +233,11 @@ #ifdef HAL_FIREWALL_MODULE_ENABLED #include "stm32l0xx_hal_firewall.h" #endif /* HAL_FIREWALL_MODULE_ENABLED */ - + #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32l0xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_I2C_MODULE_ENABLED #include "stm32l0xx_hal_i2c.h" #endif /* HAL_I2C_MODULE_ENABLED */ @@ -257,7 +257,7 @@ #ifdef HAL_LPTIM_MODULE_ENABLED #include "stm32l0xx_hal_lptim.h" #endif /* HAL_LPTIM_MODULE_ENABLED */ - + #ifdef HAL_PWR_MODULE_ENABLED #include "stm32l0xx_hal_pwr.h" #endif /* HAL_PWR_MODULE_ENABLED */ @@ -316,7 +316,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ @@ -332,7 +332,6 @@ #endif #endif /* __STM32L0xx_HAL_CONF_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld b/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld index 79427d80b..033dcc0ad 100644 --- a/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld +++ b/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -165,5 +165,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32l0538disco/stm32l0538disco.c b/hw/bsp/stm32l0538disco/stm32l0538disco.c index f4c38d150..46f6f0ff6 100644 --- a/hw/bsp/stm32l0538disco/stm32l0538disco.c +++ b/hw/bsp/stm32l0538disco/stm32l0538disco.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h b/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h index 773b74e29..a917214c3 100644 --- a/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h +++ b/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h @@ -7,39 +7,39 @@ * * Copyright (c) 2016 STMicroelectronics International N.V. All rights reserved. * - * Redistribution and use in source and binary forms, with or without + * Redistribution and use in source and binary forms, with or without * modification, are permitted, provided that the following conditions are met: * - * 1. Redistribution of source code must retain the above copyright notice, + * 1. Redistribution of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products + * 3. Neither the name of STMicroelectronics nor the names of other + * contributors to this software may be used to endorse or promote products * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this + * 4. This software, including modifications and/or derivative works of this * software, must execute solely and exclusively on microcontroller or * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. + * 5. Redistribution and use of this software other than as permitted under + * this license is void and will automatically terminate your rights under + * this license. * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A + * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT + * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************** - */ + */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32L0xx_HAL_CONF_H @@ -54,36 +54,36 @@ /* ########################## Module Selection ############################## */ /** - * @brief This is the list of modules to be used in the HAL driver + * @brief This is the list of modules to be used in the HAL driver */ -#define HAL_MODULE_ENABLED +#define HAL_MODULE_ENABLED // #define HAL_ADC_MODULE_ENABLED -/* #define HAL_COMP_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_COMP_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ #define HAL_DMA_MODULE_ENABLED /* #define HAL_FIREWALL_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED #define HAL_GPIO_MODULE_ENABLED /* #define HAL_I2C_MODULE_ENABLED */ -/* #define HAL_I2S_MODULE_ENABLED */ +/* #define HAL_I2S_MODULE_ENABLED */ /* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LCD_MODULE_ENABLED */ +/* #define HAL_LCD_MODULE_ENABLED */ /* #define HAL_LPTIM_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED //#define HAL_RNG_MODULE_ENABLED /* #define HAL_RTC_MODULE_ENABLED */ //#define HAL_SPI_MODULE_ENABLED -/* #define HAL_TIM_MODULE_ENABLED */ +/* #define HAL_TIM_MODULE_ENABLED */ /* #define HAL_TSC_MODULE_ENABLED */ -/* #define HAL_UART_MODULE_ENABLED */ -/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_UART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_SMBUS_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ +/* #define HAL_SMBUS_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ //#define HAL_PCD_MODULE_ENABLED #define HAL_CORTEX_MODULE_ENABLED /* #define HAL_PCD_MODULE_ENABLED */ @@ -93,9 +93,9 @@ /** * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). + * (when HSE is used as system clock source, directly or through the PLL). */ -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -114,7 +114,7 @@ /** * @brief Internal High Speed oscillator (HSI) value. * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). + * (when HSI is used as system clock source, directly or through the PLL). */ #if !defined (HSI_VALUE) #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ @@ -123,7 +123,7 @@ /** * @brief Internal High Speed oscillator for USB (HSI48) value. */ -#if !defined (HSI48_VALUE) +#if !defined (HSI48_VALUE) #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB in Hz. The real value may vary depending on the variations in voltage and temperature. */ @@ -132,7 +132,7 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) #define LSI_VALUE ((uint32_t)37000U) /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -152,24 +152,24 @@ #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ #endif /* LSE_STARTUP_TIMEOUT */ - + /* Tip: To avoid modifying this file each time you need to use different HSE, === you can define the HSE value in your toolchain compiler preprocessor. */ /* ########################### System Configuration ######################### */ /** * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U #define PREREAD_ENABLE 1U #define BUFFER_CACHE_DISABLE 0U /* ########################## Assert Selection ############################## */ /** - * @brief Uncomment the line below to expanse the "assert_param" macro in the + * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ /* #define USE_FULL_ASSERT 1 */ @@ -185,7 +185,7 @@ /* Includes ------------------------------------------------------------------*/ /** - * @brief Include module's header file + * @brief Include module's header file */ #ifdef HAL_RCC_MODULE_ENABLED @@ -199,7 +199,7 @@ #ifdef HAL_DMA_MODULE_ENABLED #include "stm32l0xx_hal_dma.h" #endif /* HAL_DMA_MODULE_ENABLED */ - + #ifdef HAL_CORTEX_MODULE_ENABLED #include "stm32l0xx_hal_cortex.h" #endif /* HAL_CORTEX_MODULE_ENABLED */ @@ -211,7 +211,7 @@ #ifdef HAL_COMP_MODULE_ENABLED #include "stm32l0xx_hal_comp.h" #endif /* HAL_COMP_MODULE_ENABLED */ - + #ifdef HAL_CRC_MODULE_ENABLED #include "stm32l0xx_hal_crc.h" #endif /* HAL_CRC_MODULE_ENABLED */ @@ -231,7 +231,7 @@ #ifdef HAL_FLASH_MODULE_ENABLED #include "stm32l0xx_hal_flash.h" #endif /* HAL_FLASH_MODULE_ENABLED */ - + #ifdef HAL_I2C_MODULE_ENABLED #include "stm32l0xx_hal_i2c.h" #endif /* HAL_I2C_MODULE_ENABLED */ @@ -251,7 +251,7 @@ #ifdef HAL_LPTIM_MODULE_ENABLED #include "stm32l0xx_hal_lptim.h" #endif /* HAL_LPTIM_MODULE_ENABLED */ - + #ifdef HAL_PWR_MODULE_ENABLED #include "stm32l0xx_hal_pwr.h" #endif /* HAL_PWR_MODULE_ENABLED */ @@ -310,7 +310,7 @@ * @brief The assert_param macro is used for function's parameters check. * @param expr If expr is false, it calls assert_failed function * which reports the name of the source file and the source - * line number of the call that failed. + * line number of the call that failed. * If expr is true, it returns no value. * @retval None */ @@ -326,6 +326,6 @@ #endif #endif /* __STM32L0xx_HAL_CONF_H */ - + /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32l4/boards/stm32l412nucleo/STM32L412KBUx_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l412nucleo/STM32L412KBUx_FLASH.ld index d4b86b3e3..4ae4a4cf4 100644 --- a/hw/bsp/stm32l4/boards/stm32l412nucleo/STM32L412KBUx_FLASH.ld +++ b/hw/bsp/stm32l4/boards/stm32l412nucleo/STM32L412KBUx_FLASH.ld @@ -83,8 +83,8 @@ SECTIONS . = ALIGN(8); } >FLASH - .ARM.extab : - { + .ARM.extab : + { . = ALIGN(8); *(.ARM.extab* .gnu.linkonce.armextab.*) . = ALIGN(8); @@ -105,7 +105,7 @@ SECTIONS PROVIDE_HIDDEN (__preinit_array_end = .); . = ALIGN(8); } >FLASH - + .init_array : { . = ALIGN(8); @@ -129,7 +129,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(8); _sdata = .; /* create a global symbol at data start */ @@ -140,7 +140,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -168,7 +168,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -180,5 +180,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h index 704d742cc..72d17b760 100644 --- a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h +++ b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) @@ -94,7 +94,7 @@ static inline void board_clock_init(void) RCC_OscInitStruct.PLL.PLLN = 10; RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; - + HAL_RCC_OscConfig(&RCC_OscInitStruct); /** Initializes the CPU, AHB and APB buses clocks @@ -122,7 +122,7 @@ static inline void board_clock_init(void) RCC_CRSInitStruct.HSI48CalibrationValue = 32; HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct); - + /* Select HSI48 output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; diff --git a/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld index d6865f49d..3bb13ed85 100644 --- a/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld +++ b/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld @@ -82,8 +82,8 @@ SECTIONS . = ALIGN(8); } >FLASH - .ARM.extab : - { + .ARM.extab : + { . = ALIGN(8); *(.ARM.extab* .gnu.linkonce.armextab.*) . = ALIGN(8); @@ -104,7 +104,7 @@ SECTIONS PROVIDE_HIDDEN (__preinit_array_end = .); . = ALIGN(8); } >FLASH - + .init_array : { . = ALIGN(8); @@ -128,7 +128,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(8); _sdata = .; /* create a global symbol at data start */ @@ -139,7 +139,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -167,7 +167,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -179,5 +179,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/hw/bsp/stm32l4/boards/stm32l476disco/board.h b/hw/bsp/stm32l4/boards/stm32l476disco/board.h index 42c657d5e..9d4351b39 100644 --- a/hw/bsp/stm32l4/boards/stm32l476disco/board.h +++ b/hw/bsp/stm32l4/boards/stm32l476disco/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld index c1a490a70..02c07dd74 100644 --- a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld +++ b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld @@ -102,12 +102,12 @@ SECTIONS . = ALIGN(4); } >ROM - .ARM.extab : { + .ARM.extab : { . = ALIGN(4); *(.ARM.extab* .gnu.linkonce.armextab.*) . = ALIGN(4); } >ROM - + .ARM : { . = ALIGN(4); __exidx_start = .; @@ -124,7 +124,7 @@ SECTIONS PROVIDE_HIDDEN (__preinit_array_end = .); . = ALIGN(4); } >ROM - + .init_array : { . = ALIGN(4); @@ -134,7 +134,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); . = ALIGN(4); } >ROM - + .fini_array : { . = ALIGN(4); @@ -149,7 +149,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections into "RAM" Ram type memory */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -158,7 +158,7 @@ SECTIONS . = ALIGN(4); _edata = .; /* define a global symbol at data end */ - + } >RAM AT> ROM /* Uninitialized data section into "RAM" Ram type memory */ diff --git a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h index 1df389aed..47ada6bb9 100644 --- a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h +++ b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld index f77c72d1b..267a87a8b 100644 --- a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld +++ b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld @@ -114,7 +114,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -125,7 +125,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -153,7 +153,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h index 1df389aed..47ada6bb9 100644 --- a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h +++ b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) diff --git a/hw/bsp/stm32l4/stm32l4xx_hal_conf.h b/hw/bsp/stm32l4/stm32l4xx_hal_conf.h index 312f86da1..25dbc0523 100644 --- a/hw/bsp/stm32l4/stm32l4xx_hal_conf.h +++ b/hw/bsp/stm32l4/stm32l4xx_hal_conf.h @@ -50,7 +50,7 @@ /* #define HAL_NAND_MODULE_ENABLED */ // #define HAL_NOR_MODULE_ENABLED // #define HAL_SRAM_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_HCD_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED //#define HAL_I2C_MODULE_ENABLED /* #define HAL_IRDA_MODULE_ENABLED */ @@ -115,7 +115,7 @@ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency * which is subject to manufacturing process variations. */ -#if !defined (HSI48_VALUE) +#if !defined (HSI48_VALUE) #define HSI48_VALUE 48000000U /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. The real value my vary depending on manufacturing process variations.*/ #endif /* HSI48_VALUE */ @@ -123,7 +123,7 @@ /** * @brief Internal Low Speed oscillator (LSI) value. */ -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/ #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations @@ -142,7 +142,7 @@ /** * @brief External clock source for SAI1 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source * frequency. */ #if !defined (EXTERNAL_SAI1_CLOCK_VALUE) @@ -151,7 +151,7 @@ /** * @brief External clock source for SAI2 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source * frequency. */ #if !defined (EXTERNAL_SAI2_CLOCK_VALUE) diff --git a/hw/bsp/stm32u5/stm32u5xx_hal_conf.h b/hw/bsp/stm32u5/stm32u5xx_hal_conf.h index 15dffa813..87c3683de 100644 --- a/hw/bsp/stm32u5/stm32u5xx_hal_conf.h +++ b/hw/bsp/stm32u5/stm32u5xx_hal_conf.h @@ -503,4 +503,3 @@ #endif #endif /* STM32U5xx_HAL_CONF_H */ - diff --git a/hw/bsp/stm32wb/boards/stm32wb55nucleo/stm32wb55xx_flash_cm4.ld b/hw/bsp/stm32wb/boards/stm32wb55nucleo/stm32wb55xx_flash_cm4.ld index 660f30161..916f11866 100644 --- a/hw/bsp/stm32wb/boards/stm32wb55nucleo/stm32wb55xx_flash_cm4.ld +++ b/hw/bsp/stm32wb/boards/stm32wb55nucleo/stm32wb55xx_flash_cm4.ld @@ -113,7 +113,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -124,7 +124,7 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM1 AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -152,7 +152,7 @@ SECTIONS . = ALIGN(8); } >RAM1 - + /* Remove information from the standard libraries */ /DISCARD/ : @@ -167,5 +167,3 @@ SECTIONS MB_MEM1 (NOLOAD) : { *(MB_MEM1) } >RAM_SHARED MB_MEM2 (NOLOAD) : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED } - - diff --git a/hw/bsp/stm32wb/family.c b/hw/bsp/stm32wb/family.c index 525d637ea..e9ca59866 100644 --- a/hw/bsp/stm32wb/family.c +++ b/hw/bsp/stm32wb/family.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2022 Jerzy Kasenberg diff --git a/hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk b/hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk index d60365d1d..0ff24ab60 100644 --- a/hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk +++ b/hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk @@ -1,5 +1,5 @@ CFLAGS += -DTM4C123GH6PM - + LD_FILE = $(BOARD_PATH)/tm4c123.ld # For flash-jlink target diff --git a/hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld b/hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld index e2720a9ac..351857bd6 100644 --- a/hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld +++ b/hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld @@ -6,37 +6,37 @@ _Min_Heap_Size = 0; /* required amount of heap */ _Min_Stack_Size = 0x1000; /* required amount of stack */ -MEMORY +MEMORY { FLASH(rx) : ORIGIN = 0x00000000, LENGTH = 256K SRAM(rwx) : ORIGIN = 0x20000000, LENGTH = 32K } -SECTIONS +SECTIONS { - .text : + .text : { . = ALIGN(4) ; - *(.vectors) - *(.text) + *(.vectors) + *(.text) *(.text.*) *(.init) *(.fini) *(.rodata) *(.rodata.*) - . = ALIGN(4) ; - __end_text = . ; + . = ALIGN(4) ; + __end_text = . ; } >FLASH - + .data : AT(ADDR(.text) + SIZEOF(.text)) { . = ALIGN(4); - __start_data = . ; + __start_data = . ; __la_data = LOADADDR(.data); - *(.data) + *(.data) *(.data.*) . = ALIGN(4); - __end_data = . ; + __end_data = . ; } >SRAM @@ -47,7 +47,7 @@ SECTIONS __bss_start__ = __start_bss; *(.bss) *(.bss.*) - *(.COMMON) + *(.COMMON) __end_bss = . ; . = ALIGN(4); }>SRAM diff --git a/hw/bsp/tm4c123/family.c b/hw/bsp/tm4c123/family.c index 87b94289b..3f4f43220 100644 --- a/hw/bsp/tm4c123/family.c +++ b/hw/bsp/tm4c123/family.c @@ -175,4 +175,3 @@ uint32_t board_millis (void) return system_ticks; } #endif - diff --git a/hw/bsp/xmc4000/boards/xmc4500_relax/board.h b/hw/bsp/xmc4000/boards/xmc4500_relax/board.h index 3e2cb9583..2d4764f40 100644 --- a/hw/bsp/xmc4000/boards/xmc4500_relax/board.h +++ b/hw/bsp/xmc4000/boards/xmc4500_relax/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/hw/mcu/bridgetek/ft9xx/Readme.md b/hw/mcu/bridgetek/ft9xx/Readme.md index 1db91058c..adf8fc765 100644 --- a/hw/mcu/bridgetek/ft9xx/Readme.md +++ b/hw/mcu/bridgetek/ft9xx/Readme.md @@ -2,6 +2,6 @@ **BridgeTek** provides a hardware abstraction library with software source code for the SDKs for FT9xx software family. -Whole SDK repository is installed as part of the FT9xx Toolchain and can be downloaded from BridgeTek web page `https://www.brtchip.com`. +Whole SDK repository is installed as part of the FT9xx Toolchain and can be downloaded from BridgeTek web page `https://www.brtchip.com`. -Registers definition files, and included peripheral register definition files have licenses that allow for redistribution. +Registers definition files, and included peripheral register definition files have licenses that allow for redistribution. diff --git a/hw/mcu/bridgetek/ft9xx/scripts/crt0.S b/hw/mcu/bridgetek/ft9xx/scripts/crt0.S index 62fa266ee..380b31c37 100644 --- a/hw/mcu/bridgetek/ft9xx/scripts/crt0.S +++ b/hw/mcu/bridgetek/ft9xx/scripts/crt0.S @@ -50,11 +50,11 @@ _start: codestart: jmp init - + .global _exithook _exithook: # Debugger uses '_exithook' at 0x90 to catch program exit return - + init: # Disable all interrupts ldk $r0,0x80 @@ -63,12 +63,12 @@ init: .else sta.b 0x100e3,$r0 .endif - + # Reset all peripherals # lda.l $r0, 0x10018 # bins.l $r0, $r0, 0x23F # Set bit 31 # sta.l 0x10018, $r0 - + # Initialize DATA by copying from program memory ldk.l $r0,__data_load_start ldk.l $r1,__data_load_end diff --git a/hw/mcu/dialog/README.md b/hw/mcu/dialog/README.md index 69676f081..33d270aac 100644 --- a/hw/mcu/dialog/README.md +++ b/hw/mcu/dialog/README.md @@ -3,7 +3,5 @@ **Dialog Semiconductors** provides SDKs for DA146x MCU family. Most of the files there can't be redistributed. Registers definition file `DA1469xAB.h` and some **ARM** originated headers are have licenses that allow -for redistribution. +for redistribution. Whole SDK repository can be downloaded from Dialog Semiconductor web page `https://www.dialog.com` - - diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/arm_license.txt b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/arm_license.txt index b324eb286..7e8067a6f 100644 --- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/arm_license.txt +++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/arm_license.txt @@ -24,4 +24,3 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ---------------------------------------------------------------------------*/ - diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_compiler.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_compiler.h index fdb1a971c..8f871ea31 100644 --- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_compiler.h +++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_compiler.h @@ -268,4 +268,3 @@ #endif /* __CMSIS_COMPILER_H */ - diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_gcc.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_gcc.h index 47a4b59d8..812c3789a 100644 --- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_gcc.h +++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_gcc.h @@ -47,9 +47,9 @@ #ifndef __STATIC_INLINE #define __STATIC_INLINE static inline #endif -#ifndef __STATIC_FORCEINLINE +#ifndef __STATIC_FORCEINLINE #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline -#endif +#endif #ifndef __NO_RETURN #define __NO_RETURN __attribute__((__noreturn__)) #endif @@ -586,7 +586,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always in non-secure mode. - + \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). \return PSPLIM Register value */ @@ -631,7 +631,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence the write is silently ignored in non-secure mode. - + \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set */ @@ -768,7 +768,7 @@ __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) { #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) -#if __has_builtin(__builtin_arm_get_fpscr) +#if __has_builtin(__builtin_arm_get_fpscr) // Re-enable using built-in when GCC has been fixed // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm0.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm0.h index e2cf6b966..a8cd3ea45 100644 --- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm0.h +++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm0.h @@ -62,7 +62,7 @@ */ #include "cmsis_version.h" - + /* CMSIS CM0 definitions */ #define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ #define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm33.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm33.h index 7249e1331..05b61383e 100644 --- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm33.h +++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm33.h @@ -2065,7 +2065,7 @@ typedef struct /* Special LR values for Secure/Non-Secure call handling and exception handling */ -/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ +/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ #define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ /* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ @@ -2080,7 +2080,7 @@ typedef struct /* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ #define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ -#else +#else #define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ #endif diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/mpu_armv8.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/mpu_armv8.h index bc3b05109..50bb56333 100644 --- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/mpu_armv8.h +++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/mpu_armv8.h @@ -103,7 +103,7 @@ (MPU_RLAR_EN_Msk)) #if defined(MPU_RLAR_PXN_Pos) - + /** \brief Region Limit Address Register with PXN value * \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended. * \param PXN Privileged execute never. Defines whether code can be executed from this privileged region. @@ -114,7 +114,7 @@ ((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \ ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \ (MPU_RLAR_EN_Msk)) - + #endif /** @@ -124,7 +124,7 @@ typedef struct { uint32_t RBAR; /*!< Region Base Address Register value */ uint32_t RLAR; /*!< Region Limit Address Register value */ } ARM_MPU_Region_t; - + /** Enable the MPU. * \param MPU_Control Default access permissions for unconfigured regions. */ @@ -185,11 +185,11 @@ __STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t at const uint8_t reg = idx / 4U; const uint32_t pos = ((idx % 4U) * 8U); const uint32_t mask = 0xFFU << pos; - + if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) { return; // invalid index } - + mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask)); } @@ -236,7 +236,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) * \param rnr Region number to be cleared. */ __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr) -{ +{ ARM_MPU_ClrRegionEx(MPU_NS, rnr); } #endif @@ -246,7 +246,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr) * \param rnr Region number to be configured. * \param rbar Value for RBAR register. * \param rlar Value for RLAR register. -*/ +*/ __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar) { mpu->RNR = rnr; @@ -258,7 +258,7 @@ __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t r * \param rnr Region number to be configured. * \param rbar Value for RBAR register. * \param rlar Value for RLAR register. -*/ +*/ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar) { ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar); @@ -269,10 +269,10 @@ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rla * \param rnr Region number to be configured. * \param rbar Value for RBAR register. * \param rlar Value for RLAR register. -*/ +*/ __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar) { - ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar); + ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar); } #endif @@ -284,7 +284,7 @@ __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) { uint32_t i; - for (i = 0U; i < len; ++i) + for (i = 0U; i < len; ++i) { dst[i] = src[i]; } @@ -296,7 +296,7 @@ __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_ * \param table Pointer to the MPU configuration table. * \param cnt Amount of regions to be configured. */ -__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) { const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; if (cnt == 1U) { @@ -305,7 +305,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_ } else { uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U); uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES; - + mpu->RNR = rnrBase; while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) { uint32_t c = MPU_TYPE_RALIASES - rnrOffset; @@ -316,7 +316,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_ rnrBase += MPU_TYPE_RALIASES; mpu->RNR = rnrBase; } - + ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize); } } @@ -326,7 +326,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_ * \param table Pointer to the MPU configuration table. * \param cnt Amount of regions to be configured. */ -__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) { ARM_MPU_LoadEx(MPU, rnr, table, cnt); } @@ -337,11 +337,10 @@ __STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, u * \param table Pointer to the MPU configuration table. * \param cnt Amount of regions to be configured. */ -__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) { ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt); } #endif #endif - diff --git a/hw/mcu/dialog/da1469x/da1469x.ld b/hw/mcu/dialog/da1469x/da1469x.ld index c91dea841..0133f3759 100644 --- a/hw/mcu/dialog/da1469x/da1469x.ld +++ b/hw/mcu/dialog/da1469x/da1469x.ld @@ -225,4 +225,3 @@ SECTIONS /* Check that intvect is at the beginning of RAM */ ASSERT(__intvect_start__ == ORIGIN(RAM), "intvect is not at beginning of RAM") } - diff --git a/hw/mcu/dialog/da1469x/include/mcu/mcu.h b/hw/mcu/dialog/da1469x/include/mcu/mcu.h index 1e6736785..38961e828 100644 --- a/hw/mcu/dialog/da1469x/include/mcu/mcu.h +++ b/hw/mcu/dialog/da1469x/include/mcu/mcu.h @@ -162,4 +162,3 @@ void mcu_gpio_exit_sleep(void); #endif #endif /* __MCU_MCU_H_ */ - diff --git a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble.h b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble.h index 76a432bfd..9ba24f458 100644 --- a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble.h +++ b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble.h @@ -539,7 +539,7 @@ SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_v /**@brief Remove a Vendor Specific base UUID. - * + * * @details This call removes a Vendor Specific base UUID that has been added with @ref sd_ble_uuid_vs_add. This function allows * the application to reuse memory allocated for Vendor Specific base UUIDs. * diff --git a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_gap.h b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_gap.h index c434fefb3..e11149435 100644 --- a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_gap.h +++ b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_gap.h @@ -1666,7 +1666,7 @@ SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr * * @retval ::NRF_SUCCESS Address successfully retrieved. * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. - * @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found. * @retval ::NRF_ERROR_INVALID_STATE The advertising set is currently not advertising. */ SVCALL(SD_BLE_GAP_ADV_ADDR_GET, uint32_t, sd_ble_gap_adv_addr_get(uint8_t adv_handle, ble_gap_addr_t *p_addr)); diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c index a7ae013dd..c8de8e0f3 100644 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c +++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c @@ -62,7 +62,7 @@ Additional information: WrOff == (RdOff - 1): Buffer is full WrOff > RdOff: Free space includes wrap-around WrOff < RdOff: Used space includes wrap-around - (WrOff == (SizeOfBuffer - 1)) && (RdOff == 0): + (WrOff == (SizeOfBuffer - 1)) && (RdOff == 0): Buffer full and wrap-around after next byte @@ -504,7 +504,7 @@ static unsigned _GetAvailWriteSpace(SEGGER_RTT_BUFFER_UP* pRing) { * Reads characters from SEGGER real-time-terminal control block * which have been previously stored by the application. * Do not lock against interrupts and multiple access. -* Used to do the same operation that J-Link does, to transfer +* Used to do the same operation that J-Link does, to transfer * RTT data via other channels, such as TCP/IP or UART. * * Parameters @@ -693,7 +693,7 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe * Function description * Reads characters from SEGGER real-time-terminal control block * which have been previously stored by the application. -* Used to do the same operation that J-Link does, to transfer +* Used to do the same operation that J-Link does, to transfer * RTT data via other channels, such as TCP/IP or UART. * * Parameters @@ -708,7 +708,7 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe * This function must not be called when J-Link might also do RTT. * This function locks against all other RTT operations. I.e. during * the read operation, writing is also locked. -* If only one consumer reads from the up buffer, +* If only one consumer reads from the up buffer, * call sEGGER_RTT_ReadUpBufferNoLock() instead. */ unsigned SEGGER_RTT_ReadUpBuffer(unsigned BufferIndex, void* pBuffer, unsigned BufferSize) { @@ -766,7 +766,7 @@ unsigned SEGGER_RTT_Read(unsigned BufferIndex, void* pBuffer, unsigned BufferSiz * Function description * Stores a specified number of characters in SEGGER RTT * control block. -* SEGGER_RTT_WriteWithOverwriteNoLock does not lock the application +* SEGGER_RTT_WriteWithOverwriteNoLock does not lock the application * and overwrites data if the data does not fit into the buffer. * * Parameters @@ -779,7 +779,7 @@ unsigned SEGGER_RTT_Read(unsigned BufferIndex, void* pBuffer, unsigned BufferSiz * (2) For performance reasons this function does not call Init() * and may only be called after RTT has been initialized. * Either by calling SEGGER_RTT_Init() or calling another RTT API function first. -* (3) Do not use SEGGER_RTT_WriteWithOverwriteNoLock if a J-Link +* (3) Do not use SEGGER_RTT_WriteWithOverwriteNoLock if a J-Link * connection reads RTT data. */ void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) { @@ -946,7 +946,7 @@ CopyStraight: * Stores a specified number of characters in SEGGER RTT * control block inside a buffer. * SEGGER_RTT_WriteDownBufferNoLock does not lock the application. -* Used to do the same operation that J-Link does, to transfer +* Used to do the same operation that J-Link does, to transfer * RTT data from other channels, such as TCP/IP or UART. * * Parameters @@ -1116,7 +1116,7 @@ unsigned SEGGER_RTT_WriteNoLock(unsigned BufferIndex, const void* pBuffer, unsig * This function must not be called when J-Link might also do RTT. * This function locks against all other RTT operations. I.e. during * the write operation, writing from the application is also locked. -* If only one consumer writes to the down buffer, +* If only one consumer writes to the down buffer, * call SEGGER_RTT_WriteDownBufferNoLock() instead. */ unsigned SEGGER_RTT_WriteDownBuffer(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) { diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.h b/lib/SEGGER_RTT/RTT/SEGGER_RTT.h index 3c04df55f..07eb4f39e 100644 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.h +++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.h @@ -44,7 +44,7 @@ ---------------------------END-OF-HEADER------------------------------ File : SEGGER_RTT.h Purpose : Implementation of SEGGER real-time transfer which allows - real-time communication on targets which support debugger + real-time communication on targets which support debugger memory accesses while the CPU is running. Revision: $Rev: 17697 $ ---------------------------------------------------------------------- diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S b/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S index 78cde4d75..aec372eec 100644 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S +++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S @@ -36,9 +36,9 @@ Additional information: #define _THUMB_CODE .code 16 #define _WORD .word #define _SECTION(Sect, Type, AlignExp) .section Sect ##, "ax" - #define _ALIGN(Exp) .align Exp + #define _ALIGN(Exp) .align Exp #define _PLACE_LITS .ltorg - #define _DATA_SECT_START + #define _DATA_SECT_START #define _C_STARTUP _start #define _STACK_END __stack_end__ #define _RAMFUNC @@ -58,7 +58,7 @@ Additional information: #define _THUMB_CODE THUMB #define _WORD DCD #define _SECTION(Sect, Type, AlignExp) SECTION Sect ## : ## Type ## :REORDER:NOROOT ## (AlignExp) - #define _ALIGN(Exp) alignrom Exp + #define _ALIGN(Exp) alignrom Exp #define _PLACE_LITS #define _DATA_SECT_START DATA #define _C_STARTUP __iar_program_start diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h b/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h index 5e79d7e67..fda5a5f51 100644 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h +++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h @@ -91,12 +91,12 @@ Revision: $Rev: 18601 $ * * RTT memcpy configuration * -* memcpy() is good for large amounts of data, +* memcpy() is good for large amounts of data, * but the overhead is big for small amounts, which are usually stored via RTT. * With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. * * SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. -* This is may be required with memory access restrictions, +* This is may be required with memory access restrictions, * such as on Cortex-A devices with MMU. */ #ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP @@ -105,7 +105,7 @@ Revision: $Rev: 18601 $ // // Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets // -//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) // #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) //#endif @@ -204,7 +204,7 @@ Revision: $Rev: 18601 $ : \ : \ ); - + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ "or %0, %0, a1 \n\t" \ "csrs mstatus, %0 \n\t" \ @@ -345,8 +345,8 @@ Revision: $Rev: 18601 $ #define SEGGER_RTT_LOCK() { \ unsigned long LockState; \ LockState = get_psw() & 0x010000; \ - clrpsw_i(); - + clrpsw_i(); + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | LockState); \ } #endif diff --git a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c index da4a4b5f5..6bf670a02 100644 --- a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c +++ b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c @@ -44,7 +44,7 @@ ---------------------------END-OF-HEADER------------------------------ File : SEGGER_RTT_Syscalls_GCC.c Purpose : Low-level functions for using printf() via RTT in GCC. - To use RTT for printf output, include this file in your + To use RTT for printf output, include this file in your application. Revision: $Rev: 17697 $ ---------------------------------------------------------------------- @@ -62,7 +62,7 @@ Revision: $Rev: 17697 $ ********************************************************************** */ // -// If necessary define the _reent struct +// If necessary define the _reent struct // to match the one passed by the used standard library. // struct _reent; diff --git a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c index f7f5aed48..ba9772d3e 100644 --- a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c +++ b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c @@ -110,7 +110,7 @@ const char __stderr_name[] = "STDERR"; * * Parameters: * c - character to output -* +* */ void _ttywrch(int c) { fputc(c, stdout); // stdout @@ -127,9 +127,9 @@ void _ttywrch(int c) { * Parameters: * sName - sName of the device/file to open * OpenMode - This parameter is currently ignored -* +* * Return value: -* != 0 - Handle to the object to open, otherwise +* != 0 - Handle to the object to open, otherwise * == 0 -"device" is not handled by this module * */ @@ -153,7 +153,7 @@ FILEHANDLE _sys_open(const char * sName, int OpenMode) { * * Parameters: * hFile - Handle to a file opened via _sys_open -* +* * Return value: * 0 - device/file closed * @@ -176,7 +176,7 @@ int _sys_close(FILEHANDLE hFile) { * pBuffer - Pointer to the data that shall be written * NumBytes - Number of bytes to write * Mode - The Mode that shall be used -* +* * Return value: * Number of bytes *not* written to the file/device * @@ -205,7 +205,7 @@ int _sys_write(FILEHANDLE hFile, const unsigned char * pBuffer, unsigned NumByte * pBuffer - Pointer to buffer to store the read data * NumBytes - Number of bytes to read * Mode - The Mode that shall be used -* +* * Return value: * Number of bytes read from the file/device * @@ -223,12 +223,12 @@ int _sys_read(FILEHANDLE hFile, unsigned char * pBuffer, unsigned NumBytes, int * _sys_istty * * Function description: -* This function shall return whether the opened file +* This function shall return whether the opened file * is a console device or not. * * Parameters: * hFile - Handle to a file opened via _sys_open -* +* * Return value: * 1 - Device is a console * 0 - Device is not a console @@ -250,10 +250,10 @@ int _sys_istty(FILEHANDLE hFile) { * * Parameters: * hFile - Handle to a file opened via _sys_open -* Pos - -* +* Pos - +* * Return value: -* int - +* int - * */ int _sys_seek(FILEHANDLE hFile, long Pos) { @@ -267,13 +267,13 @@ int _sys_seek(FILEHANDLE hFile, long Pos) { * _sys_ensure * * Function description: -* +* * * Parameters: * hFile - Handle to a file opened via _sys_open -* +* * Return value: -* int - +* int - * */ int _sys_ensure(FILEHANDLE hFile) { @@ -290,7 +290,7 @@ int _sys_ensure(FILEHANDLE hFile) { * * Parameters: * hFile - Handle to a file opened via _sys_open -* +* * Return value: * Length of the file * @@ -305,17 +305,17 @@ long _sys_flen(FILEHANDLE hFile) { * _sys_tmpnam * * Function description: -* This function converts the file number fileno for a temporary +* This function converts the file number fileno for a temporary * file to a unique filename, for example, tmp0001. * * Parameters: * pBuffer - Pointer to a buffer to store the name * FileNum - file number to convert * MaxLen - Size of the buffer -* +* * Return value: * 1 - Error -* 0 - Success +* 0 - Success * */ int _sys_tmpnam(char * pBuffer, int FileNum, unsigned MaxLen) { @@ -335,7 +335,7 @@ int _sys_tmpnam(char * pBuffer, int FileNum, unsigned MaxLen) { * Parameters: * cmd - Pointer to the command string * len - Length of the string -* +* * Return value: * == NULL - Command was not successfully executed * == sCmd - Command was passed successfully @@ -355,7 +355,7 @@ char * _sys_command_string(char * cmd, int len) { * * Parameters: * ReturnCode - Return code from the main function -* +* * */ void _sys_exit(int ReturnCode) { @@ -373,7 +373,7 @@ void _sys_exit(int ReturnCode) { * * Parameters: * ch - Character to output -* +* * */ int stdout_putchar(int ch) { diff --git a/lib/fatfs/source/00history.txt b/lib/fatfs/source/00history.txt index 7a153a229..f7898cbd9 100644 --- a/lib/fatfs/source/00history.txt +++ b/lib/fatfs/source/00history.txt @@ -366,4 +366,3 @@ R0.15 (November 6, 2022) Fixed f_mkfs() creates broken exFAT volume when the size of volume is >= 2^32 sectors. Fixed string functions cannot write the unicode characters not in BMP when FF_LFN_UNICODE == 2 (UTF-8). Fixed a compatibility issue in identification of GPT header. - diff --git a/lib/fatfs/source/00readme.txt b/lib/fatfs/source/00readme.txt index 3de3aeaa2..48c02a42d 100644 --- a/lib/fatfs/source/00readme.txt +++ b/lib/fatfs/source/00readme.txt @@ -18,4 +18,3 @@ FILES module is only a generic file system layer and it does not depend on any specific storage device. You need to provide a low level disk I/O module written to control the storage device that attached to the target system. - diff --git a/lib/fatfs/source/diskio.c b/lib/fatfs/source/diskio.c index 179e387a2..3cb423db3 100644 --- a/lib/fatfs/source/diskio.c +++ b/lib/fatfs/source/diskio.c @@ -226,4 +226,3 @@ DRESULT disk_ioctl ( return RES_PARERR; } - diff --git a/lib/fatfs/source/ff.c b/lib/fatfs/source/ff.c index 6d412fa0e..05ca02f0a 100644 --- a/lib/fatfs/source/ff.c +++ b/lib/fatfs/source/ff.c @@ -7081,4 +7081,3 @@ FRESULT f_setcp ( return FR_OK; } #endif /* FF_CODE_PAGE == 0 */ - diff --git a/lib/fatfs/source/ffsystem.c b/lib/fatfs/source/ffsystem.c index d5c5134bf..bc0047dce 100644 --- a/lib/fatfs/source/ffsystem.c +++ b/lib/fatfs/source/ffsystem.c @@ -205,4 +205,3 @@ void ff_mutex_give ( } #endif /* FF_FS_REENTRANT */ - diff --git a/lib/networking/dhserver.c b/lib/networking/dhserver.c index 8cd22ddb9..2f14f7a09 100644 --- a/lib/networking/dhserver.c +++ b/lib/networking/dhserver.c @@ -2,17 +2,17 @@ * The MIT License (MIT) * * Copyright (c) 2015 by Sergey Fetisov - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -267,7 +267,7 @@ static void udp_recv_proc(void *arg, struct udp_pcb *upcb, struct pbuf *p, const DHCP_OFFER, config->domain, config->dns, - entry->lease, + entry->lease, *netif_ip4_addr(netif), config->router, *netif_ip4_netmask(netif)); @@ -309,7 +309,7 @@ static void udp_recv_proc(void *arg, struct udp_pcb *upcb, struct pbuf *p, const DHCP_ACK, config->domain, config->dns, - entry->lease, + entry->lease, *netif_ip4_addr(netif), config->router, *netif_ip4_netmask(netif)); diff --git a/lib/networking/dhserver.h b/lib/networking/dhserver.h index 2a0b15854..b3642459a 100644 --- a/lib/networking/dhserver.h +++ b/lib/networking/dhserver.h @@ -2,17 +2,17 @@ * The MIT License (MIT) * * Copyright (c) 2015 by Sergey Fetisov - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE diff --git a/lib/networking/dnserver.c b/lib/networking/dnserver.c index 539cc2cea..6d15fee02 100644 --- a/lib/networking/dnserver.c +++ b/lib/networking/dnserver.c @@ -2,17 +2,17 @@ * The MIT License (MIT) * * Copyright (c) 2015 by Sergey Fetisov - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -165,7 +165,7 @@ static void udp_recv_proc(void *arg, struct udp_pcb *upcb, struct pbuf *p, const answer->ttl = htonl(32); answer->len = htons(4); answer->addr = host_addr.addr; - + udp_sendto(upcb, out, addr, port); pbuf_free(out); diff --git a/lib/networking/dnserver.h b/lib/networking/dnserver.h index a062e3aa7..50b29be89 100644 --- a/lib/networking/dnserver.h +++ b/lib/networking/dnserver.h @@ -2,17 +2,17 @@ * The MIT License (MIT) * * Copyright (c) 2015 by Sergey Fetisov - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE diff --git a/lib/networking/ndis.h b/lib/networking/ndis.h index 06258e6bb..29b07749c 100644 --- a/lib/networking/ndis.h +++ b/lib/networking/ndis.h @@ -16,14 +16,14 @@ */ /* - * ndis.h - * + * ndis.h + * * Modified by Colin O'Flynn * ntddndis.h modified by Benedikt Spranger - * - * Thanks to the cygwin development team, + * + * Thanks to the cygwin development team, * especially to Casper S. Hornstrup - * + * * THIS SOFTWARE IS NOT COPYRIGHTED * * This source code is offered for use in the public domain. You may diff --git a/lib/networking/rndis_protocol.h b/lib/networking/rndis_protocol.h index b45860eeb..3d07d6fa3 100644 --- a/lib/networking/rndis_protocol.h +++ b/lib/networking/rndis_protocol.h @@ -39,7 +39,7 @@ #ifndef _RNDIS_H #define _RNDIS_H -/** +/** \addtogroup RNDIS @{ */ @@ -112,7 +112,7 @@ typedef struct{ rndis_MinorVersion_t MinorVersion; rndis_MaxTransferSize_t MaxTransferSize; } rndis_initialize_msg_t; - + /* Response: */ typedef struct{ rndis_MessageType_t MessageType; @@ -129,7 +129,7 @@ typedef struct{ rndis_AfListOffset_t AfListOffset; rndis_AfListSize_t AfListSize; } rndis_initialize_cmplt_t; - + /*** Remote NDIS Halt Message ***/ typedef struct{ @@ -137,7 +137,7 @@ typedef struct{ rndis_MessageLength_t MessageLength; rndis_RequestId_t RequestId; } rndis_halt_msg_t; - + typedef uint32_t rndis_Oid_t; typedef uint32_t rndis_InformationBufferLength_t; typedef uint32_t rndis_InformationBufferOffset_t; @@ -153,7 +153,7 @@ typedef struct{ rndis_InformationBufferOffset_t InformationBufferOffset; rndis_DeviceVcHandle_t DeviceVcHandle; } rndis_query_msg_t; - + /* Response: */ typedef struct{ @@ -164,7 +164,7 @@ typedef struct{ rndis_InformationBufferLength_t InformationBufferLength; rndis_InformationBufferOffset_t InformationBufferOffset; } rndis_query_cmplt_t; - + /*** Remote NDIS Set Message ***/ typedef struct{ rndis_MessageType_t MessageType; @@ -175,7 +175,7 @@ typedef struct{ rndis_InformationBufferOffset_t InformationBufferOffset; rndis_DeviceVcHandle_t DeviceVcHandle; } rndis_set_msg_t; - + /* Response */ typedef struct{ rndis_MessageType_t MessageType; @@ -199,9 +199,9 @@ typedef struct{ rndis_ParameterNameLength_t ParameterNameLength; rndis_ParameterType_t ParameterType; rndis_ParameterValueOffset_t ParameterValueOffset; - rndis_ParameterValueLength_t ParameterValueLength; + rndis_ParameterValueLength_t ParameterValueLength; }rndis_config_parameter_t; - + typedef uint32_t rndis_Reserved_t; /*** Remote NDIS Soft Reset Message ***/ @@ -210,7 +210,7 @@ typedef struct{ rndis_MessageLength_t MessageLength; rndis_Reserved_t Reserved; } rndis_reset_msg_t; - + typedef uint32_t rndis_AddressingReset_t; /* Response: */ @@ -220,7 +220,7 @@ typedef struct{ rndis_Status_t Status; rndis_AddressingReset_t AddressingReset; } rndis_reset_cmplt_t; - + /*** Remote NDIS Indicate Status Message ***/ typedef struct{ rndis_MessageType_t MessageType; @@ -229,7 +229,7 @@ typedef struct{ rndis_Status_t StatusBufferLength; rndis_Status_t StatusBufferOffset; } rndis_indicate_status_t; - + typedef uint32_t rndis_DiagStatus_t; typedef uint32_t rndis_ErrorOffset_t; @@ -237,14 +237,14 @@ typedef struct { rndis_DiagStatus_t DiagStatus; rndis_ErrorOffset_t ErrorOffset; }rndis_diagnostic_info_t; - + /*** Remote NDIS Keepalive Message */ typedef struct{ rndis_MessageType_t MessageType; rndis_MessageLength_t MessageLength; rndis_RequestId_t RequestId; }rndis_keepalive_msg_t; - + /* Response: */ typedef struct{ rndis_MessageType_t MessageType; diff --git a/lib/networking/rndis_reports.c b/lib/networking/rndis_reports.c index d129466c8..cc14f174c 100644 --- a/lib/networking/rndis_reports.c +++ b/lib/networking/rndis_reports.c @@ -7,17 +7,17 @@ * The MIT License (MIT) * * Copyright (c) 2015 by Sergey Fetisov - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -45,7 +45,7 @@ static rndis_state_t rndis_state; CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t ndis_report[8] = { 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 }; -static const uint32_t OIDSupportedList[] = +static const uint32_t OIDSupportedList[] = { OID_GEN_SUPPORTED_LIST, OID_GEN_HARDWARE_STATUS, @@ -203,8 +203,8 @@ static void rndis_handle_set_msg(void) { rndis_packetFilter(oid_packet_filter); rndis_state = rndis_data_initialized; - } - else + } + else { rndis_state = rndis_initialized; } @@ -266,7 +266,7 @@ void rndis_class_set_handler(uint8_t *data, int size) case REMOTE_NDIS_QUERY_MSG: rndis_query(); break; - + case REMOTE_NDIS_SET_MSG: rndis_handle_set_msg(); break; diff --git a/src/class/audio/audio.h b/src/class/audio/audio.h index ba497906b..70d431282 100644 --- a/src/class/audio/audio.h +++ b/src/class/audio/audio.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -824,10 +824,10 @@ typedef struct TU_ATTR_PACKED uint8_t type : 2; ///< Request type tusb_request_type_t. uint8_t direction : 1; ///< Direction type. tusb_dir_t } bmRequestType_bit; - + uint8_t bmRequestType; }; - + uint8_t bRequest; ///< Request type audio_cs_req_t uint8_t bChannelNumber; uint8_t bControlSelector; diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index f21dfee64..32ba5761e 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Reinhard Panhuber, Jerzy Kasenberg @@ -1525,7 +1525,7 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin #endif } } - + } } p_desc = tu_desc_next(p_desc); @@ -2124,7 +2124,7 @@ bool audiod_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint3 { if (tud_audio_fb_done_cb) tud_audio_fb_done_cb(func_id); - // Schedule a transmit with the new value if EP is not busy + // Schedule a transmit with the new value if EP is not busy if (!usbd_edpt_busy(rhport, audio->ep_fb)) { // Schedule next transmission - value is changed bytud_audio_n_fb_set() in the meantime or the old value gets sent diff --git a/src/class/audio/audio_device.h b/src/class/audio/audio_device.h index 0ef100fa4..7c88b99fc 100644 --- a/src/class/audio/audio_device.h +++ b/src/class/audio/audio_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) @@ -473,7 +473,7 @@ TU_ATTR_WEAK void tud_audio_fb_done_cb(uint8_t func_id); // the choice of format is left to the caller and feedback argument is sent as-is. If CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION is set, then tinyusb // expects 16.16 format and handles the conversion to 10.14 on FS. // -// Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0 devices. On Linux and macOS it seems the +// Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0 devices. On Linux and macOS it seems the // driver can work with either format. So a good compromise is to keep format correction disabled and stick to 16.16 format. // Feedback value can be determined from within the SOF ISR of the audio driver. This should reduce jitter. If the feature is used, the user can not set the feedback value. diff --git a/src/class/bth/bth_device.h b/src/class/bth/bth_device.h index 1b90d0915..921bd7a1a 100755 --- a/src/class/bth/bth_device.h +++ b/src/class/bth/bth_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Jerzy Kasenberg diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c index f372fe462..a82ef1d62 100644 --- a/src/class/cdc/cdc_device.c +++ b/src/class/cdc/cdc_device.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -386,7 +386,7 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t bool const rts = tu_bit_test(request->wValue, 1); p_cdc->line_state = (uint8_t) request->wValue; - + // Disable fifo overwriting if DTR bit is set tu_fifo_set_overwritable(&p_cdc->tx_ff, !dtr); @@ -433,7 +433,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_ if ( ep_addr == p_cdc->ep_out ) { tu_fifo_write_n(&p_cdc->rx_ff, p_cdc->epout_buf, (uint16_t) xferred_bytes); - + // Check for wanted char and invoke callback if needed if ( tud_cdc_rx_wanted_cb && (((signed char) p_cdc->wanted_char) != -1) ) { @@ -445,14 +445,14 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_ } } } - + // invoke receive callback (if there is still data) if (tud_cdc_rx_cb && !tu_fifo_empty(&p_cdc->rx_ff) ) tud_cdc_rx_cb(itf); - + // prepare for OUT transaction _prep_out_transaction(p_cdc); } - + // Data sent to host, we continue to fetch from tx fifo to send. // Note: This will cause incorrect baudrate set in line coding. // Though maybe the baudrate is not really important !!! diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h index f8a004df4..a6e07aa5c 100644 --- a/src/class/cdc/cdc_device.h +++ b/src/class/cdc/cdc_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index c759527e6..4090d0e9f 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/cdc/cdc_rndis.h b/src/class/cdc/cdc_rndis.h index e0f129fe3..ad153e0ac 100644 --- a/src/class/cdc/cdc_rndis.h +++ b/src/class/cdc/cdc_rndis.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/cdc/cdc_rndis_host.c b/src/class/cdc/cdc_rndis_host.c index 44de85b45..41d21bbad 100644 --- a/src/class/cdc/cdc_rndis_host.c +++ b/src/class/cdc/cdc_rndis_host.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/cdc/cdc_rndis_host.h b/src/class/cdc/cdc_rndis_host.h index 447cc4e97..bb431ec1f 100644 --- a/src/class/cdc/cdc_rndis_host.h +++ b/src/class/cdc/cdc_rndis_host.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/hid/hid.h b/src/class/hid/hid.h index d9b0ead10..fbd3eef38 100644 --- a/src/class/hid/hid.h +++ b/src/class/hid/hid.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/midi/midi.h b/src/class/midi/midi.h index 74dc41749..8b78c6555 100644 --- a/src/class/midi/midi.h +++ b/src/class/midi/midi.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c index 5dea43431..e3e7826da 100644 --- a/src/class/midi/midi_device.c +++ b/src/class/midi/midi_device.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/midi/midi_device.h b/src/class/midi/midi_device.h index 211edc8d1..1c6f996be 100644 --- a/src/class/midi/midi_device.h +++ b/src/class/midi/midi_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/msc/msc.h b/src/class/msc/msc.h index 84b6e4d79..7f25a29ba 100644 --- a/src/class/msc/msc.h +++ b/src/class/msc/msc.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/msc/msc_device.h b/src/class/msc/msc_device.h index 5839b168d..72f95be06 100644 --- a/src/class/msc/msc_device.h +++ b/src/class/msc/msc_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 6724e486c..2fddeb818 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -232,23 +232,23 @@ bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, msc_cbw_t cbw; cbw_init(&cbw, lun); - + cbw.total_bytes = block_count*p_msc->capacity[lun].block_size; cbw.dir = TUSB_DIR_IN_MASK; cbw.cmd_len = sizeof(scsi_read10_t); - + scsi_read10_t const cmd_read10 = { .cmd_code = SCSI_CMD_READ_10, .lba = tu_htonl(lba), .block_count = tu_htons(block_count) }; - + memcpy(cbw.command, &cmd_read10, cbw.cmd_len); - + return tuh_msc_scsi_command(dev_addr, &cbw, buffer, complete_cb, arg); } - + bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb, uintptr_t arg) { msch_interface_t* p_msc = get_itf(dev_addr); diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index 5134b63c2..6c0e5c9dd 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/net/ecm_rndis_device.c b/src/class/net/ecm_rndis_device.c index a072bfd79..8ac7cbd01 100644 --- a/src/class/net/ecm_rndis_device.c +++ b/src/class/net/ecm_rndis_device.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Peter Lawrence diff --git a/src/class/net/ncm_device.c b/src/class/net/ncm_device.c index aa13c9535..9e9580249 100644 --- a/src/class/net/ncm_device.c +++ b/src/class/net/ncm_device.c @@ -430,7 +430,7 @@ static void handle_incoming_datagram(uint32_t len) { ncm_interface.num_datagrams++; } - + tud_network_recv_renew(); } diff --git a/src/class/net/net_device.h b/src/class/net/net_device.h index 6e294465b..133689deb 100644 --- a/src/class/net/net_device.h +++ b/src/class/net/net_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Peter Lawrence diff --git a/src/class/usbtmc/usbtmc.h b/src/class/usbtmc/usbtmc.h index fd52d766e..3c5e86d4c 100644 --- a/src/class/usbtmc/usbtmc.h +++ b/src/class/usbtmc/usbtmc.h @@ -316,4 +316,3 @@ typedef struct TU_ATTR_PACKED TU_VERIFY_STATIC(sizeof(usbtmc_read_stb_interrupt_488_t) == 2u, "struct wrong length"); #endif - diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c index a4e6eaeb3..8dbda14c5 100644 --- a/src/class/usbtmc/usbtmc_device.c +++ b/src/class/usbtmc/usbtmc_device.c @@ -83,7 +83,7 @@ tu_static char logMsg[150]; // Buffer size must be an exact multiple of the max packet size for both // bulk (up to 64 bytes for FS, 512 bytes for HS). In addation, this driver -// imposes a minimum buffer size of 32 bytes. +// imposes a minimum buffer size of 32 bytes. #define USBTMCD_BUFFER_SIZE (TUD_OPT_HIGH_SPEED ? 512 : 64) /* @@ -598,7 +598,7 @@ bool usbtmcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request uint32_t ep_addr = (request->wIndex); // At this point, a transfer MAY be in progress. Based on USB spec, when clearing bulk EP HALT, - // the EP transfer buffer needs to be cleared and DTOG needs to be reset, even if + // the EP transfer buffer needs to be cleared and DTOG needs to be reset, even if // the EP is not halted. The only USBD API interface to do this is to stall and then un-stall the EP. if(ep_addr == usbtmc_state.ep_bulk_out) { diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h index 2bb6afa67..9abafda50 100644 --- a/src/class/vendor/vendor_device.h +++ b/src/class/vendor/vendor_device.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/vendor/vendor_host.c b/src/class/vendor/vendor_host.c index dbea1228d..e66c5007f 100644 --- a/src/class/vendor/vendor_host.c +++ b/src/class/vendor/vendor_host.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/vendor/vendor_host.h b/src/class/vendor/vendor_host.h index 65223fbca..acfebe7a4 100644 --- a/src/class/vendor/vendor_host.h +++ b/src/class/vendor/vendor_host.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index 02a490aee..d6e98602b 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021 Koji KITAYAMA diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 30478ba6d..1057d7ca3 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -239,7 +239,7 @@ #define TU_BSWAP16(u16) ((unsigned short)_builtin_revw((unsigned long)u16)) #define TU_BSWAP32(u32) (_builtin_revl(u32)) -#else +#else #error "Compiler attribute porting is required" #endif diff --git a/src/common/tusb_timeout.h b/src/common/tusb_timeout.h index ce53955f0..533e67ab8 100644 --- a/src/common/tusb_timeout.h +++ b/src/common/tusb_timeout.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index a52a6d269..12355e8be 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/device/dcd.h b/src/device/dcd.h index 93170732f..00419ff05 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/device/usbd.c b/src/device/usbd.c index 7733cc2e2..0fb236a88 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -1398,11 +1398,11 @@ bool usbd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep uint8_t const epnum = tu_edpt_number(desc_ep->bEndpointAddress); uint8_t const dir = tu_edpt_dir(desc_ep->bEndpointAddress); - + TU_ASSERT(dcd_edpt_iso_activate); TU_ASSERT(epnum < CFG_TUD_ENDPPOINT_MAX); TU_ASSERT(tu_edpt_validate(desc_ep, (tusb_speed_t) _usbd_dev.speed)); - + _usbd_dev.ep_status[epnum][dir].stalled = false; _usbd_dev.ep_status[epnum][dir].busy = false; _usbd_dev.ep_status[epnum][dir].claimed = false; diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h index f860ab0a1..8393d3469 100644 --- a/src/device/usbd_pvt.h +++ b/src/device/usbd_pvt.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/host/hcd.h b/src/host/hcd.h index a400626e4..623c12a12 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/host/hub.c b/src/host/hub.c index 3da5358b2..b84042fb6 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -202,7 +202,7 @@ bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf TU_ASSERT(TUSB_DESC_ENDPOINT == desc_ep->bDescriptorType && TUSB_XFER_INTERRUPT == desc_ep->bmAttributes.xfer, 0); - + TU_ASSERT(tuh_edpt_open(dev_addr, desc_ep)); hub_interface_t* p_hub = get_itf(dev_addr); diff --git a/src/host/usbh.h b/src/host/usbh.h index 37de7093c..7942de5c2 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/osal/osal.h b/src/osal/osal.h index afa3826fc..f092e8ffb 100644 --- a/src/osal/osal.h +++ b/src/osal/osal.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h index 9393d1f26..477f64892 100644 --- a/src/osal/osal_freertos.h +++ b/src/osal/osal_freertos.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h index 2e2b3c7ce..5f407378e 100644 --- a/src/osal/osal_none.h +++ b/src/osal/osal_none.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/osal/osal_pico.h b/src/osal/osal_pico.h index 8b428d642..e6efa0968 100644 --- a/src/osal/osal_pico.h +++ b/src/osal/osal_pico.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Raspberry Pi (Trading) Ltd. diff --git a/src/osal/osal_rtx4.h b/src/osal/osal_rtx4.h index dea1c12c8..e443135e0 100644 --- a/src/osal/osal_rtx4.h +++ b/src/osal/osal_rtx4.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021 Tian Yunhao (t123yh) @@ -115,7 +115,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hd os_mbx_declare(_name##__mbox, _depth); \ _declare_box(_name##__pool, sizeof(_type), _depth); \ osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .pool = _name##__pool, .mbox = _name##__mbox }; - + typedef struct { diff --git a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c index efca5bdcb..95dfda49c 100644 --- a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c +++ b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright 2021 Bridgetek Pte Ltd @@ -24,15 +24,15 @@ * This file is part of the TinyUSB stack. */ -/* - * Contains code adapted from Bridgetek Pte Ltd via license terms stated +/* + * Contains code adapted from Bridgetek Pte Ltd via license terms stated * in https://brtchip.com/BRTSourceCodeLicenseAgreement */ #include "tusb_option.h" #if CFG_TUD_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X) + (CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X) #include #include @@ -58,7 +58,7 @@ struct ft9xx_xfer_state { volatile uint8_t ready; // OUT Transfer has been received and waiting for transfer. volatile uint8_t valid; // Transfer is pending and total_size, remain_size, and buff_ptr are valid. - + int16_t total_size; // Total transfer size in bytes for this transfer. int16_t remain_size; // Total remaining in transfer. uint8_t *buff_ptr; // Pointer to buffer to transmit from or receive to. @@ -92,7 +92,7 @@ static uint16_t _ft9xx_dusb_out(uint8_t ep_number, uint8_t *buffer, uint16_t len // Manage an OUT transfer from the host. // This can be up-to the maximum packet size of the endpoint. -// Continuation of a transfer beyond the maximum packet size is performed +// Continuation of a transfer beyond the maximum packet size is performed // by the interrupt handler. static uint16_t _ft9xx_edpt_xfer_out(uint8_t ep_number, uint8_t *buffer, uint16_t xfer_bytes) { @@ -125,7 +125,7 @@ static uint16_t _ft9xx_edpt_xfer_out(uint8_t ep_number, uint8_t *buffer, uint16_ // Manage an IN transfer to the host. // This can be up-to the maximum packet size of the endpoint. -// Continuation of a transfer beyond the maximum packet size is performed +// Continuation of a transfer beyond the maximum packet size is performed // by the interrupt handler. static uint16_t _ft9xx_edpt_xfer_in(uint8_t ep_number, uint8_t *buffer, uint16_t xfer_bytes) { @@ -196,7 +196,7 @@ static uint16_t _ft9xx_edpt_xfer_in(uint8_t ep_number, uint8_t *buffer, uint16_t return xfer_bytes; } -// Reset all non-control endpoints to a default state. +// Reset all non-control endpoints to a default state. // Control endpoint is always enabled and ready. All others disabled. static void _ft9xx_reset_edpts(void) { @@ -208,7 +208,7 @@ static void _ft9xx_reset_edpts(void) // Disable hardware. USBD_EP_CR_REG(i) = 0; } - + // Enable interrupts from USB device control. USBD_REG(cmie) = MASK_USBD_CMIE_ALL; } @@ -319,7 +319,7 @@ static void _dcd_ft9xx_detach(void) } // Determine the speed of the USB to which we are connected. -// Set the speed of the PHY accordingly. +// Set the speed of the PHY accordingly. // High speed can be disabled through CFG_TUSB_RHPORT0_MODE or CFG_TUD_MAX_SPEED settings. static void _ft9xx_usb_speed(void) { @@ -379,16 +379,16 @@ static void _ft9xx_usb_speed(void) } // Send a buffer to the USB IN FIFO. -// When the macro USBD_USE_STREAMS is defined this will stream a buffer of data +// When the macro USBD_USE_STREAMS is defined this will stream a buffer of data // to the FIFO using the most efficient MCU streamout combination. -// If streaming is disabled then it will send each byte of the buffer in turn +// If streaming is disabled then it will send each byte of the buffer in turn // to the FIFO. The is no reason to not stream. // The total number of bytes sent to the FIFO is returned. static uint16_t _ft9xx_dusb_in(uint8_t ep_number, const uint8_t *buffer, uint16_t length) { uint16_t bytes_read = 0; uint16_t buff_size = length; - + #ifdef USBD_USE_STREAMS volatile uint8_t *data_reg; @@ -423,7 +423,7 @@ static uint16_t _ft9xx_dusb_in(uint8_t ep_number, const uint8_t *buffer, uint16_ bytes_read = buff_size; } #else // USBD_USE_STREAMS - + bytes_read = buff_size; while (buff_size--) { @@ -438,7 +438,7 @@ static uint16_t _ft9xx_dusb_in(uint8_t ep_number, const uint8_t *buffer, uint16_ // Receive a buffer from the USB OUT FIFO. // When the macro USBD_USE_STREAMS is defined this will stream from the FIFO // to a buffer of data using the most efficient MCU streamin combination. -// If streaming is disabled then it will receive each byte from the FIFO in turn +// If streaming is disabled then it will receive each byte from the FIFO in turn // to the buffer. The is no reason to not stream. // The total number of bytes received from the FIFO is returned. static uint16_t _ft9xx_dusb_out(uint8_t ep_number, uint8_t *buffer, uint16_t length) @@ -448,7 +448,7 @@ static uint16_t _ft9xx_dusb_out(uint8_t ep_number, uint8_t *buffer, uint16_t len #endif // USBD_USE_STREAMS uint16_t bytes_read = 0; uint16_t buff_size = length; - + if (length > 0) { if (ep_number == USBD_EP_0) @@ -596,7 +596,7 @@ void dcd_remote_wakeup(uint8_t rhport) SYS->MSC0CFG = SYS->MSC0CFG | MASK_SYS_MSC0CFG_DEV_RMWAKEUP; // At least 2 ms of delay needed for RESUME Data K state. - delayms(2); + delayms(2); SYS->MSC0CFG &= ~MASK_SYS_MSC0CFG_DEV_RMWAKEUP; @@ -621,7 +621,7 @@ void dcd_connect(uint8_t rhport) // Determine bus speed and signal speed to tusb. _ft9xx_usb_speed(); } - + // Setup the control endpoint only. #if CFG_TUD_ENDPOINT0_SIZE == 64 USBD_EP_CR_REG(USBD_EP_0) = (USBD_EP0_MAX_SIZE_64 << BIT_USBD_EP0_MAX_SIZE); @@ -702,7 +702,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc) TU_LOG1("FT9xx endpoint size not valid: requested %d max 1024\r\n", ep_size); return false; } - // Calculate actual amount of buffer RAM used by this endpoint. This may be more than the + // Calculate actual amount of buffer RAM used by this endpoint. This may be more than the // requested size. ep_buff_size = 8 << ep_reg_size; @@ -714,7 +714,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc) if (ep_xfer[ep_number].type != USBD_EP_TYPE_DISABLED) { // This could be because an endpoint has been assigned with the same number. - // On FT9xx, IN and OUT endpoints may not have the same number. e.g. There + // On FT9xx, IN and OUT endpoints may not have the same number. e.g. There // cannot been an 0x81 and 0x01 endpoint. TU_LOG1("FT9xx endpoint %d already assigned\r\n", ep_number); return false; @@ -723,7 +723,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc) // Check that there is enough buffer RAM to allocate to this new endpoint. // Available buffer RAM depends on the device revision. // The IN and OUT buffer RAM should be the same size. - if (ep_dir == USBD_DIR_IN) + if (ep_dir == USBD_DIR_IN) total_ram = USBD_RAMTOTAL_IN; else total_ram = USBD_RAMTOTAL_OUT; @@ -753,7 +753,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc) if (total_ram < ep_buff_size) { TU_LOG1("FT9xx insufficient buffer RAM for endpoint %d\r\n", ep_number); - return false; + return false; } // Set the type of this endpoint in the control register. @@ -827,7 +827,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to ep_xfer[ep_number].total_size = total_bytes; ep_xfer[ep_number].remain_size = total_bytes; ep_xfer[ep_number].buff_ptr = buffer; - + if (ep_number == USBD_EP_0) { ep_xfer[USBD_EP_0].dir = ep_dir; @@ -876,7 +876,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to // then report the transfer complete with dcd_event_xfer_complete. ep_xfer[ep_number].valid = 1; } - } + } status = true; } else @@ -922,7 +922,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) CRITICAL_SECTION_END } -// Clear stall (non-control endpoint), data toggle is also reset to DATA0 +// Clear stall (non-control endpoint), data toggle is also reset to DATA0 void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { uint8_t ep_number = tu_edpt_number(ep_addr); @@ -1025,7 +1025,7 @@ void dcd_int_handler(uint8_t rhport) // Host has sent a SETUP packet. Receive this into the SETUP packet store. _ft9xx_dusb_out(USBD_EP_0, (uint8_t *)_ft9xx_setup_packet, sizeof(USB_device_request)); - + // Send the packet to tinyusb. dcd_event_setup_received(BOARD_TUD_RHPORT, _ft9xx_setup_packet, true); @@ -1046,13 +1046,13 @@ void dcd_int_handler(uint8_t rhport) { xfer_bytes = (uint16_t)ep_xfer[USBD_EP_0].total_size; - // Transfer incoming data from an OUT packet to the buffer supplied. + // Transfer incoming data from an OUT packet to the buffer supplied. if (ep_xfer[USBD_EP_0].dir == TUSB_DIR_OUT) { xfer_bytes = _ft9xx_edpt_xfer_out(USBD_EP_0, ep_xfer[USBD_EP_0].buff_ptr, xfer_bytes); } // Now signal completion of data packet. - dcd_event_xfer_complete(BOARD_TUD_RHPORT, USBD_EP_0 | (ep_xfer[USBD_EP_0].dir ? TUSB_DIR_IN_MASK : 0), + dcd_event_xfer_complete(BOARD_TUD_RHPORT, USBD_EP_0 | (ep_xfer[USBD_EP_0].dir ? TUSB_DIR_IN_MASK : 0), xfer_bytes, XFER_RESULT_SUCCESS, true); // Incoming FIFO has been cleared. @@ -1097,13 +1097,13 @@ void dcd_int_handler(uint8_t rhport) // Start or continue an OUT transfer. if (ep_xfer[ep_number].dir == TUSB_DIR_OUT) { - xfer_bytes = _ft9xx_edpt_xfer_out(ep_number, - ep_xfer[ep_number].buff_ptr, + xfer_bytes = _ft9xx_edpt_xfer_out(ep_number, + ep_xfer[ep_number].buff_ptr, (uint16_t)ep_xfer[ep_number].remain_size); // Report each OUT packet received to the stack. - dcd_event_xfer_complete(BOARD_TUD_RHPORT, - ep_number /* | TUSB_DIR_OUT_MASK */, + dcd_event_xfer_complete(BOARD_TUD_RHPORT, + ep_number /* | TUSB_DIR_OUT_MASK */, xfer_bytes, XFER_RESULT_SUCCESS, true); ep_xfer[ep_number].buff_ptr += xfer_bytes; @@ -1114,8 +1114,8 @@ void dcd_int_handler(uint8_t rhport) { if (ep_xfer[ep_number].remain_size > 0) { - xfer_bytes = _ft9xx_edpt_xfer_in(ep_number, - ep_xfer[ep_number].buff_ptr, + xfer_bytes = _ft9xx_edpt_xfer_in(ep_number, + ep_xfer[ep_number].buff_ptr, (uint16_t)ep_xfer[ep_number].remain_size); ep_xfer[ep_number].buff_ptr += xfer_bytes; @@ -1124,8 +1124,8 @@ void dcd_int_handler(uint8_t rhport) if (ep_xfer[ep_number].remain_size == 0) { - dcd_event_xfer_complete(BOARD_TUD_RHPORT, - ep_number | TUSB_DIR_IN_MASK, + dcd_event_xfer_complete(BOARD_TUD_RHPORT, + ep_number | TUSB_DIR_IN_MASK, ep_xfer[ep_number].total_size, XFER_RESULT_SUCCESS, true); } } @@ -1151,7 +1151,7 @@ void dcd_int_handler(uint8_t rhport) // once the transfer is initiated. // Strictly this should not happen for a non-control endpoint. Interrupts // are disabled when there are no transfers setup for an endpoint. - ep_xfer[ep_number].ready = 1; + ep_xfer[ep_number].ready = 1; } } } @@ -1159,13 +1159,13 @@ void dcd_int_handler(uint8_t rhport) } } -// Power management interrupt handler. +// Power management interrupt handler. // This handles USB device related power management interrupts only. void ft9xx_usbd_pm_ISR(void) { uint16_t pmcfg = SYS->PMCFG_H; - // Main interrupt handler is responible for + // Main interrupt handler is responible for if (pmcfg & MASK_SYS_PMCFG_DEV_CONN_DEV) { // Signal connection interrupt diff --git a/src/portable/chipidea/ci_hs/ci_hs_type.h b/src/portable/chipidea/ci_hs/ci_hs_type.h index 728a86b86..31b5a012d 100644 --- a/src/portable/chipidea/ci_hs/ci_hs_type.h +++ b/src/portable/chipidea/ci_hs/ci_hs_type.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 5bccf81a7..bc6736cf2 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -545,7 +545,7 @@ static void process_edpt_complete_isr(uint8_t rhport, uint8_t epnum, uint8_t dir tu_fifo_advance_write_pointer(p_qhd->ff, xferred_bytes); } } - + // only number of bytes in the IOC qtd dcd_event_xfer_complete(rhport, tu_edpt_addr(epnum, dir), xferred_bytes, result, true); } diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c index d0396daea..d607627b4 100644 --- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index 7140897a1..ee9dfb11f 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -566,7 +566,7 @@ static void period_list_xfer_complete_isr(uint8_t hostid, uint32_t interval_ms) case EHCI_QTYPE_ITD: // TODO support hs/fs ISO case EHCI_QTYPE_SITD: case EHCI_QTYPE_FSTN: - + default: break; } @@ -683,7 +683,7 @@ void hcd_int_handler(uint8_t rhport) uint32_t int_status = regs->status; int_status &= regs->inten; - + regs->status = int_status; // Acknowledge handled interrupt if (int_status == 0) return; diff --git a/src/portable/espressif/esp32sx/dcd_esp32sx.c b/src/portable/espressif/esp32sx/dcd_esp32sx.c index 41240f737..1fcfb6241 100644 --- a/src/portable/espressif/esp32sx/dcd_esp32sx.c +++ b/src/portable/espressif/esp32sx/dcd_esp32sx.c @@ -874,4 +874,3 @@ void dcd_int_disable (uint8_t rhport) } #endif // #if OPT_MCU_ESP32S2 || OPT_MCU_ESP32S3 - diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c index 0ba53d4d0..487761847 100644 --- a/src/portable/mentor/musb/dcd_musb.c +++ b/src/portable/mentor/musb/dcd_musb.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021 Koji KITAYAMA @@ -572,7 +572,7 @@ static void process_bus_reset(uint8_t rhport) _dcd.pipe0.buf = NULL; USB0->TXIE = 1; /* Enable only EP0 */ - USB0->RXIE = 0; + USB0->RXIE = 0; /* Clear FIFO settings */ for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) { @@ -722,7 +722,7 @@ void dcd_edpt_close_all(uint8_t rhport) unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn); NVIC_DisableIRQ(USB0_IRQn); USB0->TXIE = 1; /* Enable only EP0 */ - USB0->RXIE = 0; + USB0->RXIE = 0; for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) { regs->TXMAXP = 0; regs->TXCSRH = 0; @@ -854,7 +854,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) if (tu_edpt_dir(ep_addr)) { /* IN */ regs->TXCSRL = USB_TXCSRL1_CLRDT; } else { /* OUT */ - regs->RXCSRL = USB_RXCSRL1_CLRDT; + regs->RXCSRL = USB_RXCSRL1_CLRDT; } if (ie) NVIC_EnableIRQ(USB0_IRQn); } diff --git a/src/portable/mentor/musb/hcd_musb.c b/src/portable/mentor/musb/hcd_musb.c index 85e18e3aa..9eb2e005e 100644 --- a/src/portable/mentor/musb/hcd_musb.c +++ b/src/portable/mentor/musb/hcd_musb.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021 Koji KITAYAMA @@ -588,7 +588,7 @@ void hcd_int_disable(uint8_t rhport) uint32_t hcd_frame_number(uint8_t rhport) { (void)rhport; - /* The device must be reset at least once after connection + /* The device must be reset at least once after connection * in order to start the frame counter. */ if (_hcd.need_reset) hcd_port_reset(rhport); return USB0->FRAME; diff --git a/src/portable/microchip/pic/dcd_pic.c b/src/portable/microchip/pic/dcd_pic.c index 6cf0e6285..6986c8317 100644 --- a/src/portable/microchip/pic/dcd_pic.c +++ b/src/portable/microchip/pic/dcd_pic.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Koji Kitayama @@ -486,7 +486,7 @@ void dcd_init(uint8_t rhport) #else U1PWRCbits.USBPWR = 1; #endif - + #if TU_PIC_INT_SIZE == 4 uint32_t bdt_phys = KVA_TO_PA((uintptr_t)_dcd.bdt); diff --git a/src/portable/microchip/pic32mz/usbhs_registers.h b/src/portable/microchip/pic32mz/usbhs_registers.h index 93b552322..03fe78bbd 100644 --- a/src/portable/microchip/pic32mz/usbhs_registers.h +++ b/src/portable/microchip/pic32mz/usbhs_registers.h @@ -21,7 +21,7 @@ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. *******************************************************************************/ /******************************************************************************* - USBHS Peripheral Library Register Definitions + USBHS Peripheral Library Register Definitions File Name: usbhs_registers.h @@ -50,16 +50,16 @@ #define USBHS_REG_INTRRX 0x004 #define USBHS_REG_INTRTXE 0x006 #define USBHS_REG_INTRRXE 0x008 -#define USBHS_REG_INTRUSB 0x00A -#define USBHS_REG_INTRUSBE 0x00B +#define USBHS_REG_INTRUSB 0x00A +#define USBHS_REG_INTRUSBE 0x00B #define USBHS_REG_FRAME 0x00C #define USBHS_REG_INDEX 0x00E #define USBHS_REG_TESTMODE 0x00F /******************************************************* - * Endpoint Control Status Registers (CSR). These values + * Endpoint Control Status Registers (CSR). These values * should be added to either the 0x10 to access the - * register through Indexed CSR. To access the actual + * register through Indexed CSR. To access the actual * CSR, see ahead in this header file. ******************************************************/ @@ -99,20 +99,20 @@ #define USBHS_EP_DEVICE_RX_SEND_STALL 0x20 /* FADDR - Device Function Address */ -typedef union +typedef union { - struct __attribute__((packed)) + struct __attribute__((packed)) { unsigned FUNC:7; unsigned :1; }; - uint8_t w; + uint8_t w; } __USBHS_FADDR_t; /* POWER - Control Resume and Suspend signalling */ -typedef union +typedef union { struct __attribute__((packed)) { @@ -126,14 +126,14 @@ typedef union unsigned ISOUPD:1; }; struct - { + { uint8_t w; }; } __USBHS_POWER_t; /* INTRTXE - Transmit endpoint interrupt enable */ -typedef union +typedef union { struct __attribute__((packed)) { @@ -155,7 +155,7 @@ typedef union } __USBHS_INTRTXE_t; /* INTRRXE - Receive endpoint interrupt enable */ -typedef union +typedef union { struct __attribute__((packed)) { @@ -198,7 +198,7 @@ typedef union } __USBHS_INTRUSBE_t; /* FRAME - Frame number */ -typedef union +typedef union { struct __attribute__((packed)) { @@ -213,7 +213,7 @@ typedef union } __USBHS_FRAME_t; /* INDEX - Endpoint index */ -typedef union +typedef union { struct __attribute__((packed)) { @@ -228,7 +228,7 @@ typedef union } __USBHS_INDEX_t; /* TESTMODE - Test mode register */ -typedef union +typedef union { struct __attribute__((packed)) { @@ -248,7 +248,7 @@ typedef union } __USBHS_TESTMODE_t; -/* COUNT0 - Indicates the amount of data received in endpoint 0 */ +/* COUNT0 - Indicates the amount of data received in endpoint 0 */ typedef union { struct __attribute__((packed)) @@ -627,7 +627,7 @@ typedef union }; uint16_t w; -} __USBHS_TXMAXP_t; +} __USBHS_TXMAXP_t; /* TXFIFOSZ - Size of the transmit endpoint FIFO */ typedef struct __attribute__((packed)) @@ -781,7 +781,7 @@ typedef union } __USBHS_DMACNTL_t; -/* Endpoint Control and Status Register Set */ +/* Endpoint Control and Status Register Set */ typedef struct __attribute__((packed)) { volatile __USBHS_TXMAXP_t TXMAXPbits; @@ -906,7 +906,7 @@ typedef struct __attribute__((aligned(4),packed)) volatile __USBHS_TXFIFOADD_t TXFIFOADDbits; volatile __USBHS_RXFIFOADD_t RXFIFOADDbits; - + volatile uint32_t VCONTROL; volatile uint16_t HWVERS; volatile uint8_t padding1[10]; @@ -923,7 +923,7 @@ typedef struct __attribute__((aligned(4),packed)) volatile __USBHS_TARGET_ADDR_t TADDR[16]; volatile __USBHS_EPCSR_t EPCSR[16]; volatile uint32_t DMA_INTR; - volatile __USBHS_DMA_CHANNEL_t DMA_CHANNEL[8]; + volatile __USBHS_DMA_CHANNEL_t DMA_CHANNEL[8]; volatile uint32_t RQPKTXOUNT[16]; } usbhs_registers_t; diff --git a/src/portable/microchip/samg/dcd_samg.c b/src/portable/microchip/samg/dcd_samg.c index 814e680fb..e3fa51e31 100644 --- a/src/portable/microchip/samg/dcd_samg.c +++ b/src/portable/microchip/samg/dcd_samg.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) diff --git a/src/portable/microchip/samx7x/common_usb_regs.h b/src/portable/microchip/samx7x/common_usb_regs.h index d232f0bcb..db4a81e0e 100644 --- a/src/portable/microchip/samx7x/common_usb_regs.h +++ b/src/portable/microchip/samx7x/common_usb_regs.h @@ -2007,7 +2007,7 @@ /** \brief DEVDMA hardware registers */ typedef struct -{ +{ __IO uint32_t DEVDMANXTDSC; /**< (DEVDMA Offset: 0x00) Device DMA Channel Next Descriptor Address Register */ __IO uint32_t DEVDMAADDRESS; /**< (DEVDMA Offset: 0x04) Device DMA Channel Address Register */ __IO uint32_t DEVDMACONTROL; /**< (DEVDMA Offset: 0x08) Device DMA Channel Control Register */ @@ -2016,7 +2016,7 @@ typedef struct /** \brief HSTDMA hardware registers */ typedef struct -{ +{ __IO uint32_t HSTDMANXTDSC; /**< (HSTDMA Offset: 0x00) Host DMA Channel Next Descriptor Address Register */ __IO uint32_t HSTDMAADDRESS; /**< (HSTDMA Offset: 0x04) Host DMA Channel Address Register */ __IO uint32_t HSTDMACONTROL; /**< (HSTDMA Offset: 0x08) Host DMA Channel Control Register */ @@ -2025,7 +2025,7 @@ typedef struct /** \brief USBHS hardware registers */ typedef struct -{ +{ __IO uint32_t DEVCTRL; /**< (USBHS Offset: 0x00) Device General Control Register */ __I uint32_t DEVISR; /**< (USBHS Offset: 0x04) Device Global Interrupt Status Register */ __O uint32_t DEVICR; /**< (USBHS Offset: 0x08) Device Global Interrupt Clear Register */ diff --git a/src/portable/microchip/samx7x/dcd_samx7x.c b/src/portable/microchip/samx7x/dcd_samx7x.c index 24657872b..2bbb345d6 100644 --- a/src/portable/microchip/samx7x/dcd_samx7x.c +++ b/src/portable/microchip/samx7x/dcd_samx7x.c @@ -241,7 +241,7 @@ static void dcd_ep_handler(uint8_t ep_ix) if (int_status & DEVEPTISR_RXOUTI) { uint8_t *ptr = EP_GET_FIFO_PTR(0,8); - + if (count && xfer->total_len) { uint16_t remain = xfer->total_len - xfer->queued_len; @@ -252,7 +252,7 @@ static void dcd_ep_handler(uint8_t ep_ix) if (xfer->buffer) { memcpy(xfer->buffer + xfer->queued_len, ptr, count); - } else + } else { tu_fifo_write_n(xfer->fifo, ptr, count); } @@ -281,7 +281,7 @@ static void dcd_ep_handler(uint8_t ep_ix) { // TX not complete dcd_transmit_packet(xfer, 0); - } else + } else { // TX complete dcd_event_xfer_complete(0, 0x80 + 0, xfer->total_len, XFER_RESULT_SUCCESS, true); @@ -292,7 +292,7 @@ static void dcd_ep_handler(uint8_t ep_ix) } } } - } else + } else { if (int_status & DEVEPTISR_RXOUTI) { @@ -333,7 +333,7 @@ static void dcd_ep_handler(uint8_t ep_ix) { // TX not complete dcd_transmit_packet(xfer, ep_ix); - } else + } else { // TX complete dcd_event_xfer_complete(0, 0x80 + ep_ix, xfer->total_len, XFER_RESULT_SUCCESS, true); @@ -359,7 +359,7 @@ static void dcd_dma_handler(uint8_t ep_ix) if(USB_REG->DEVEPTCFG[ep_ix] & DEVEPTCFG_EPDIR) { dcd_event_xfer_complete(0, 0x80 + ep_ix, count, XFER_RESULT_SUCCESS, true); - } else + } else { dcd_event_xfer_complete(0, ep_ix, count, XFER_RESULT_SUCCESS, true); } @@ -507,12 +507,12 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) // Enable Endpoint 0 Interrupts USB_REG->DEVIER = DEVIER_PEP_0; return true; - } else + } else { // Endpoint configuration is not successful return false; } - } else + } else { // Enable the endpoint USB_REG->DEVEPT |= ((0x01 << epnum) << DEVEPT_EPEN0_Pos); @@ -544,7 +544,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) { USB_REG->DEVIER = ((0x01 << epnum) << DEVIER_PEP_0_Pos); return true; - } else + } else { // Endpoint configuration is not successful return false; @@ -583,7 +583,7 @@ static void dcd_transmit_packet(xfer_ctl_t * xfer, uint8_t ep_ix) { memcpy(ptr, xfer->buffer + xfer->queued_len, len); } - else + else { tu_fifo_read_n(xfer->fifo, ptr, len); } @@ -595,7 +595,7 @@ static void dcd_transmit_packet(xfer_ctl_t * xfer, uint8_t ep_ix) { // Control endpoint: clear the interrupt flag to send the data USB_REG->DEVEPTICR[0] = DEVEPTICR_TXINIC; - } else + } else { // Other endpoint types: clear the FIFO control flag to send the data USB_REG->DEVEPTIDR[ep_ix] = DEVEPTIDR_FIFOCONC; @@ -616,7 +616,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t xfer->total_len = total_bytes; xfer->queued_len = 0; xfer->fifo = NULL; - + if (EP_DMA_SUPPORT(epnum) && total_bytes != 0) { // Force the CPU to flush the buffer. We increase the size by 32 because the call aligns the @@ -648,12 +648,12 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t // and the DMA transfer must be not started. // It is the end of transfer return false; - } else + } else { if (dir == TUSB_DIR_OUT) { USB_REG->DEVEPTIER[epnum] = DEVEPTIER_RXOUTES; - } else + } else { dcd_transmit_packet(xfer,epnum); } @@ -701,20 +701,20 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16 // Clean invalidate cache of linear part CleanInValidateCache((uint32_t*) tu_align((uint32_t) info.ptr_lin, 4), info.len_lin + 31); - + USB_REG->DEVDMA[epnum - 1].DEVDMAADDRESS = (uint32_t)info.ptr_lin; if (info.len_wrap) { // Clean invalidate cache of wrapped part CleanInValidateCache((uint32_t*) tu_align((uint32_t) info.ptr_wrap, 4), info.len_wrap + 31); - + dma_desc[epnum - 1].next_desc = 0; dma_desc[epnum - 1].buff_addr = (uint32_t)info.ptr_wrap; dma_desc[epnum - 1].chnl_ctrl = udd_dma_ctrl_wrap | (info.len_wrap << DEVDMACONTROL_BUFF_LENGTH_Pos); // Clean cache of wrapped DMA descriptor CleanInValidateCache((uint32_t*)&dma_desc[epnum - 1], sizeof(dma_desc_t)); - + udd_dma_ctrl_lin |= DEVDMASTATUS_DESC_LDST; USB_REG->DEVDMA[epnum - 1].DEVDMANXTDSC = (uint32_t)&dma_desc[epnum - 1]; } else { @@ -743,7 +743,7 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16 if (dir == TUSB_DIR_OUT) { USB_REG->DEVEPTIER[epnum] = DEVEPTIER_RXOUTES; - } else + } else { dcd_transmit_packet(xfer,epnum); } diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index 4aeb85fc0..eee5686f4 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/portable/nuvoton/nuc120/dcd_nuc120.c b/src/portable/nuvoton/nuc120/dcd_nuc120.c index 2fdc05f36..fb12122e0 100644 --- a/src/portable/nuvoton/nuc120/dcd_nuc120.c +++ b/src/portable/nuvoton/nuc120/dcd_nuc120.c @@ -27,9 +27,9 @@ /* Theory of operation: - The NUC100/NUC120 USBD peripheral has six "EP"s, but each is simplex, - so two collectively (peripheral nomenclature of "EP0" and "EP1") are needed to - implement USB EP0. PERIPH_EP0 and PERIPH_EP1 are used by this driver for + The NUC100/NUC120 USBD peripheral has six "EP"s, but each is simplex, + so two collectively (peripheral nomenclature of "EP0" and "EP1") are needed to + implement USB EP0. PERIPH_EP0 and PERIPH_EP1 are used by this driver for EP0_IN and EP0_OUT respectively. This leaves up to four for user usage. */ diff --git a/src/portable/nuvoton/nuc121/dcd_nuc121.c b/src/portable/nuvoton/nuc121/dcd_nuc121.c index a56b5f8e8..873b1b7ef 100644 --- a/src/portable/nuvoton/nuc121/dcd_nuc121.c +++ b/src/portable/nuvoton/nuc121/dcd_nuc121.c @@ -27,9 +27,9 @@ /* Theory of operation: - The NUC121/NUC125/NUC126 USBD peripheral has eight "EP"s, but each is simplex, - so two collectively (peripheral nomenclature of "EP0" and "EP1") are needed to - implement USB EP0. PERIPH_EP0 and PERIPH_EP1 are used by this driver for + The NUC121/NUC125/NUC126 USBD peripheral has eight "EP"s, but each is simplex, + so two collectively (peripheral nomenclature of "EP0" and "EP1") are needed to + implement USB EP0. PERIPH_EP0 and PERIPH_EP1 are used by this driver for EP0_IN and EP0_OUT respectively. This leaves up to six for user usage. */ diff --git a/src/portable/nuvoton/nuc505/dcd_nuc505.c b/src/portable/nuvoton/nuc505/dcd_nuc505.c index 3fa7c1ec1..3a92c9794 100644 --- a/src/portable/nuvoton/nuc505/dcd_nuc505.c +++ b/src/portable/nuvoton/nuc505/dcd_nuc505.c @@ -27,9 +27,9 @@ /* Theory of operation: - The NUC505 USBD peripheral has twelve "EP"s, where each is simplex, in addition + The NUC505 USBD peripheral has twelve "EP"s, where each is simplex, in addition to dedicated support for the control endpoint (EP0). The non-user endpoints - are referred to as "user" EPs in this code, and follow the datasheet + are referred to as "user" EPs in this code, and follow the datasheet nomenclature of EPA through EPL. */ @@ -389,7 +389,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to while (total_bytes < USBD->CEPRXCNT); for (int count = 0; count < total_bytes; count++) *buffer++ = USBD->CEPDAT_BYTE; - + dcd_event_xfer_complete(0, ep_addr, total_bytes, XFER_RESULT_SUCCESS, true); } } diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c index 13eb105cd..b6daec3de 100644 --- a/src/portable/nxp/khci/dcd_khci.c +++ b/src/portable/nxp/khci/dcd_khci.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Koji Kitayama @@ -296,7 +296,7 @@ void dcd_int_disable(uint8_t rhport) void dcd_set_address(uint8_t rhport, uint8_t dev_addr) { - _dcd.addr = dev_addr & 0x7F; + _dcd.addr = dev_addr & 0x7F; /* Response with status first before changing device address */ dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); } @@ -528,7 +528,7 @@ void dcd_int_handler(uint8_t rhport) if (is & USB_ISTAT_SLEEP_MASK) { // TU_LOG2("Suspend: "); TU_LOG2_HEX(is); - // Note Host usually has extra delay after bus reset (without SOF), which could falsely + // Note Host usually has extra delay after bus reset (without SOF), which could falsely // detected as Sleep event. Though usbd has debouncing logic so we are good KHCI->ISTAT = USB_ISTAT_SLEEP_MASK; process_bus_sleep(rhport); diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c index 0f5fa6275..35763f121 100644 --- a/src/portable/nxp/khci/hcd_khci.c +++ b/src/portable/nxp/khci/hcd_khci.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021 Koji Kitayama @@ -414,7 +414,7 @@ void hcd_int_disable(uint8_t rhport) uint32_t hcd_frame_number(uint8_t rhport) { (void)rhport; - /* The device must be reset at least once after connection + /* The device must be reset at least once after connection * in order to start the frame counter. */ if (_hcd.need_reset) hcd_port_reset(rhport); uint32_t frmnum = KHCI->FRMNUML; diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c index 0894a5eeb..86149afd8 100644 --- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c +++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h index 07daa32e4..654b80866 100644 --- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h +++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/portable/nxp/lpc17_40/hcd_lpc17_40.c b/src/portable/nxp/lpc17_40/hcd_lpc17_40.c index ad9ed59b4..372dcf51f 100644 --- a/src/portable/nxp/lpc17_40/hcd_lpc17_40.c +++ b/src/portable/nxp/lpc17_40/hcd_lpc17_40.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) @@ -44,4 +44,3 @@ void hcd_int_disable(uint8_t rhport) } #endif - diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index 124656307..5368ef868 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -373,7 +373,7 @@ void dcd_edpt_close_all (uint8_t rhport) void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) { (void) rhport; - + uint8_t ep_id = ep_addr2id(ep_addr); _dcd.ep[ep_id][0].cmd_sts.active = _dcd.ep[ep_id][0].cmd_sts.active = 0; // TODO proper way is to EPSKIP then wait ep[][].active then write ep[][].disable (see table 778 in LPC55S69 Use Manual) _dcd.ep[ep_id][0].cmd_sts.disable = _dcd.ep[ep_id][1].cmd_sts.disable = 1; @@ -426,7 +426,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to static void bus_reset(uint8_t rhport) { tu_memclr(&_dcd, sizeof(dcd_data_t)); - edpt_reset_all(rhport); + edpt_reset_all(rhport); // disable all endpoints as specified by LPC55S69 UM Table 778 for(uint8_t ep_id = 0; ep_id < 2*MAX_EP_PAIRS; ep_id++) @@ -575,4 +575,3 @@ void dcd_int_handler(uint8_t rhport) } #endif - diff --git a/src/portable/nxp/transdimension/common_transdimension.h b/src/portable/nxp/transdimension/common_transdimension.h index 69074de41..95ae1903e 100644 --- a/src/portable/nxp/transdimension/common_transdimension.h +++ b/src/portable/nxp/transdimension/common_transdimension.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2021, Ha Thach (tinyusb.org) diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c index 1f27a6872..983d7cfcf 100644 --- a/src/portable/nxp/transdimension/dcd_transdimension.c +++ b/src/portable/nxp/transdimension/dcd_transdimension.c @@ -569,7 +569,7 @@ static void process_edpt_complete_isr(uint8_t rhport, uint8_t epnum, uint8_t dir tu_fifo_advance_write_pointer(p_qhd->ff, xferred_bytes); } } - + // only number of bytes in the IOC qtd dcd_event_xfer_complete(rhport, tu_edpt_addr(epnum, dir), xferred_bytes, result, true); } diff --git a/src/portable/nxp/transdimension/hcd_transdimension.c b/src/portable/nxp/transdimension/hcd_transdimension.c index 392764ff6..0b3e9e4ef 100644 --- a/src/portable/nxp/transdimension/hcd_transdimension.c +++ b/src/portable/nxp/transdimension/hcd_transdimension.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c index b615743b8..260804d3d 100644 --- a/src/portable/ohci/ohci.c +++ b/src/portable/ohci/ohci.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -715,4 +715,3 @@ void hcd_int_handler(uint8_t hostid) #endif - diff --git a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c index 1bc5594d8..e6daf6827 100644 --- a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018, hathach (tinyusb.org) diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.h b/src/portable/raspberrypi/rp2040/rp2040_usb.h index a06407f23..9f8e58d42 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.h +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.h @@ -47,7 +47,7 @@ typedef struct hw_endpoint { // Is this a valid struct bool configured; - + // Transfer direction (i.e. IN is rx for host but tx for device) // allows us to common up transfer functions bool rx; diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index e49c0b52e..1677cfa12 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Nathan Conrad @@ -181,7 +181,7 @@ static void dcd_handle_bus_reset(void); static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix); static void dcd_ep_ctr_handler(void); -// PMA allocation/access +// PMA allocation/access static uint8_t open_ep_count; static uint16_t ep_buf_ptr; ///< Points to first free memory location static void dcd_pma_alloc_reset(void); @@ -249,7 +249,7 @@ void dcd_init (uint8_t rhport) asm("NOP"); } USB->CNTR = 0; // Enable USB - + USB->BTABLE = DCD_STM32_BTABLE_BASE; USB->ISTR = 0; // Clear pending interrupts @@ -263,7 +263,7 @@ void dcd_init (uint8_t rhport) USB->CNTR |= USB_CNTR_RESETM | USB_CNTR_ESOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM; dcd_handle_bus_reset(); - + // Enable pull-up if supported if ( dcd_connect ) dcd_connect(rhport); } @@ -464,12 +464,12 @@ static void dcd_handle_bus_reset(void) //__IO uint16_t * const epreg = &(EPREG(0)); USB->DADDR = 0u; // disable USB peripheral by clearing the EF flag - + for(uint32_t i=0; iep_idx = ep_idx; pcd_set_eptype(USB, ep_idx, USB_EP_ISOCHRONOUS); - + *pcd_ep_tx_address_ptr(USB, ep_idx) = pma_addr; *pcd_ep_rx_address_ptr(USB, ep_idx) = pma_addr; - + return true; } @@ -1035,7 +1035,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * p_endpo { pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_DIS); } - + pcd_set_ep_address(USB, ep_idx, tu_edpt_number(p_endpoint_desc->bEndpointAddress)); // Be normal, for now, instead of only accepting zero-byte packets (on control endpoint) // or being double-buffered (bulk endpoints) @@ -1250,11 +1250,11 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wN { // Since we copy from a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies tu_fifo_buffer_info_t info; - tu_fifo_get_read_info(ff, &info); - + tu_fifo_get_read_info(ff, &info); + uint16_t cnt_lin = TU_MIN(wNBytes, info.len_lin); uint16_t cnt_wrap = TU_MIN(wNBytes - cnt_lin, info.len_wrap); - + // We want to read from the FIFO and write it into the PMA, if LIN part is ODD and has WRAPPED part, // last lin byte will be combined with wrapped part // To ensure PMA is always access 16bit aligned (dst aligned to 16 bit) @@ -1352,7 +1352,7 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNB // Copy last linear byte & first wrapped byte uint16_t tmp; dcd_read_packet_memory(&tmp, src, 2); - + ((uint8_t*)info.ptr_lin)[cnt_lin - 1] = (uint8_t)tmp; ((uint8_t*)info.ptr_wrap)[0] = (uint8_t)(tmp >> 8U); src += 2; @@ -1379,4 +1379,3 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNB } #endif - diff --git a/src/portable/st/synopsys/synopsys_common.h b/src/portable/st/synopsys/synopsys_common.h index 6f0602fe9..ce3195b23 100644 --- a/src/portable/st/synopsys/synopsys_common.h +++ b/src/portable/st/synopsys/synopsys_common.h @@ -2,15 +2,15 @@ ****************************************************************************** * @file synopsys_common.h * @author MCD Application Team - * @brief CMSIS Cortex-M3 Device USB OTG peripheral Header File. - * This file contains the USB OTG peripheral register's definitions, bits + * @brief CMSIS Cortex-M3 Device USB OTG peripheral Header File. + * This file contains the USB OTG peripheral register's definitions, bits * definitions and memory mapping for STM32F1xx devices. - * + * * This file contains: * - Data structures and the address mapping for the USB OTG peripheral * - The Peripheral's registers declarations and bits definition * - Macros to access the peripheral's registers hardware - * + * ****************************************************************************** * @attention * @@ -40,7 +40,7 @@ #define __OM volatile #define __IOM volatile -/** +/** * @brief __USB_OTG_Core_register */ @@ -66,11 +66,11 @@ typedef struct __IO uint32_t DIEPTXF[0x0F]; /*!< dev Periodic Transmit FIFO Address offset: 0x104 */ } USB_OTG_GlobalTypeDef; -/** +/** * @brief __device_Registers */ -typedef struct +typedef struct { __IO uint32_t DCFG; /*!< dev Configuration Register Address offset: 800h*/ __IO uint32_t DCTL; /*!< dev Control Register Address offset: 804h*/ @@ -87,18 +87,18 @@ typedef struct __IO uint32_t DTHRCTL; /*!< dev thr Address offset: 830h*/ __IO uint32_t DIEPEMPMSK; /*!< dev empty msk Address offset: 834h*/ __IO uint32_t DEACHINT; /*!< dedicated EP interrupt Address offset: 838h*/ - __IO uint32_t DEACHMSK; /*!< dedicated EP msk Address offset: 83Ch*/ + __IO uint32_t DEACHMSK; /*!< dedicated EP msk Address offset: 83Ch*/ uint32_t Reserved40; /*!< dedicated EP mask Address offset: 840h*/ __IO uint32_t DINEP1MSK; /*!< dedicated EP mask Address offset: 844h*/ uint32_t Reserved44[15]; /*!< Reserved 844-87Ch*/ __IO uint32_t DOUTEP1MSK; /*!< dedicated EP msk Address offset: 884h*/ } USB_OTG_DeviceTypeDef; -/** +/** * @brief __IN_Endpoint-Specific_Register */ -typedef struct +typedef struct { __IO uint32_t DIEPCTL; /*!< dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h*/ uint32_t Reserved04; /*!< Reserved 900h + (ep_num * 20h) + 04h*/ @@ -110,11 +110,11 @@ typedef struct uint32_t Reserved18; /*!< Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/ } USB_OTG_INEndpointTypeDef; -/** +/** * @brief __OUT_Endpoint-Specific_Registers */ -typedef struct +typedef struct { __IO uint32_t DOEPCTL; /*!< dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h*/ uint32_t Reserved04; /*!< Reserved B00h + (ep_num * 20h) + 04h*/ @@ -125,11 +125,11 @@ typedef struct uint32_t Reserved18[2]; /*!< Reserved B00h + (ep_num * 20h) + 18h - B00h + (ep_num * 20h) + 1Ch*/ } USB_OTG_OUTEndpointTypeDef; -/** +/** * @brief __Host_Mode_Register_Structures */ -typedef struct +typedef struct { __IO uint32_t HCFG; /*!< Host Configuration Register 400h*/ __IO uint32_t HFIR; /*!< Host Frame Interval Register 404h*/ @@ -140,7 +140,7 @@ typedef struct __IO uint32_t HAINTMSK; /*!< Host All Channels Interrupt Mask 418h*/ } USB_OTG_HostTypeDef; -/** +/** * @brief __Host_Channel_Specific_Registers */ @@ -177,60 +177,60 @@ typedef struct /* */ /******************************************************************************/ /******************** Bit definition for USB_OTG_GOTGCTL register ***********/ -#define USB_OTG_GOTGCTL_SRQSCS_Pos (0U) +#define USB_OTG_GOTGCTL_SRQSCS_Pos (0U) #define USB_OTG_GOTGCTL_SRQSCS_Msk (0x1UL << USB_OTG_GOTGCTL_SRQSCS_Pos) /*!< 0x00000001 */ #define USB_OTG_GOTGCTL_SRQSCS USB_OTG_GOTGCTL_SRQSCS_Msk /*!< Session request success */ -#define USB_OTG_GOTGCTL_SRQ_Pos (1U) +#define USB_OTG_GOTGCTL_SRQ_Pos (1U) #define USB_OTG_GOTGCTL_SRQ_Msk (0x1UL << USB_OTG_GOTGCTL_SRQ_Pos) /*!< 0x00000002 */ #define USB_OTG_GOTGCTL_SRQ USB_OTG_GOTGCTL_SRQ_Msk /*!< Session request */ -#define USB_OTG_GOTGCTL_HNGSCS_Pos (8U) +#define USB_OTG_GOTGCTL_HNGSCS_Pos (8U) #define USB_OTG_GOTGCTL_HNGSCS_Msk (0x1UL << USB_OTG_GOTGCTL_HNGSCS_Pos) /*!< 0x00000100 */ #define USB_OTG_GOTGCTL_HNGSCS USB_OTG_GOTGCTL_HNGSCS_Msk /*!< Host set HNP enable */ -#define USB_OTG_GOTGCTL_HNPRQ_Pos (9U) +#define USB_OTG_GOTGCTL_HNPRQ_Pos (9U) #define USB_OTG_GOTGCTL_HNPRQ_Msk (0x1UL << USB_OTG_GOTGCTL_HNPRQ_Pos) /*!< 0x00000200 */ #define USB_OTG_GOTGCTL_HNPRQ USB_OTG_GOTGCTL_HNPRQ_Msk /*!< HNP request */ -#define USB_OTG_GOTGCTL_HSHNPEN_Pos (10U) +#define USB_OTG_GOTGCTL_HSHNPEN_Pos (10U) #define USB_OTG_GOTGCTL_HSHNPEN_Msk (0x1UL << USB_OTG_GOTGCTL_HSHNPEN_Pos) /*!< 0x00000400 */ #define USB_OTG_GOTGCTL_HSHNPEN USB_OTG_GOTGCTL_HSHNPEN_Msk /*!< Host set HNP enable */ -#define USB_OTG_GOTGCTL_DHNPEN_Pos (11U) +#define USB_OTG_GOTGCTL_DHNPEN_Pos (11U) #define USB_OTG_GOTGCTL_DHNPEN_Msk (0x1UL << USB_OTG_GOTGCTL_DHNPEN_Pos) /*!< 0x00000800 */ #define USB_OTG_GOTGCTL_DHNPEN USB_OTG_GOTGCTL_DHNPEN_Msk /*!< Device HNP enabled */ -#define USB_OTG_GOTGCTL_CIDSTS_Pos (16U) +#define USB_OTG_GOTGCTL_CIDSTS_Pos (16U) #define USB_OTG_GOTGCTL_CIDSTS_Msk (0x1UL << USB_OTG_GOTGCTL_CIDSTS_Pos) /*!< 0x00010000 */ #define USB_OTG_GOTGCTL_CIDSTS USB_OTG_GOTGCTL_CIDSTS_Msk /*!< Connector ID status */ -#define USB_OTG_GOTGCTL_DBCT_Pos (17U) +#define USB_OTG_GOTGCTL_DBCT_Pos (17U) #define USB_OTG_GOTGCTL_DBCT_Msk (0x1UL << USB_OTG_GOTGCTL_DBCT_Pos) /*!< 0x00020000 */ #define USB_OTG_GOTGCTL_DBCT USB_OTG_GOTGCTL_DBCT_Msk /*!< Long/short debounce time */ -#define USB_OTG_GOTGCTL_ASVLD_Pos (18U) +#define USB_OTG_GOTGCTL_ASVLD_Pos (18U) #define USB_OTG_GOTGCTL_ASVLD_Msk (0x1UL << USB_OTG_GOTGCTL_ASVLD_Pos) /*!< 0x00040000 */ #define USB_OTG_GOTGCTL_ASVLD USB_OTG_GOTGCTL_ASVLD_Msk /*!< A-session valid */ -#define USB_OTG_GOTGCTL_BSVLD_Pos (19U) +#define USB_OTG_GOTGCTL_BSVLD_Pos (19U) #define USB_OTG_GOTGCTL_BSVLD_Msk (0x1UL << USB_OTG_GOTGCTL_BSVLD_Pos) /*!< 0x00080000 */ #define USB_OTG_GOTGCTL_BSVLD USB_OTG_GOTGCTL_BSVLD_Msk /*!< B-session valid */ /******************** Bit definition for USB_OTG_HCFG register ********************/ -#define USB_OTG_HCFG_FSLSPCS_Pos (0U) +#define USB_OTG_HCFG_FSLSPCS_Pos (0U) #define USB_OTG_HCFG_FSLSPCS_Msk (0x3UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000003 */ #define USB_OTG_HCFG_FSLSPCS USB_OTG_HCFG_FSLSPCS_Msk /*!< FS/LS PHY clock select */ #define USB_OTG_HCFG_FSLSPCS_0 (0x1UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000001 */ #define USB_OTG_HCFG_FSLSPCS_1 (0x2UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000002 */ -#define USB_OTG_HCFG_FSLSS_Pos (2U) +#define USB_OTG_HCFG_FSLSS_Pos (2U) #define USB_OTG_HCFG_FSLSS_Msk (0x1UL << USB_OTG_HCFG_FSLSS_Pos) /*!< 0x00000004 */ #define USB_OTG_HCFG_FSLSS USB_OTG_HCFG_FSLSS_Msk /*!< FS- and LS-only support */ /******************** Bit definition for USB_OTG_DCFG register ********************/ -#define USB_OTG_DCFG_DSPD_Pos (0U) +#define USB_OTG_DCFG_DSPD_Pos (0U) #define USB_OTG_DCFG_DSPD_Msk (0x3UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000003 */ #define USB_OTG_DCFG_DSPD USB_OTG_DCFG_DSPD_Msk /*!< Device speed */ #define USB_OTG_DCFG_DSPD_0 (0x1UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000001 */ #define USB_OTG_DCFG_DSPD_1 (0x2UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000002 */ -#define USB_OTG_DCFG_NZLSOHSK_Pos (2U) +#define USB_OTG_DCFG_NZLSOHSK_Pos (2U) #define USB_OTG_DCFG_NZLSOHSK_Msk (0x1UL << USB_OTG_DCFG_NZLSOHSK_Pos) /*!< 0x00000004 */ #define USB_OTG_DCFG_NZLSOHSK USB_OTG_DCFG_NZLSOHSK_Msk /*!< Nonzero-length status OUT handshake */ -#define USB_OTG_DCFG_DAD_Pos (4U) +#define USB_OTG_DCFG_DAD_Pos (4U) #define USB_OTG_DCFG_DAD_Msk (0x7FUL << USB_OTG_DCFG_DAD_Pos) /*!< 0x000007F0 */ #define USB_OTG_DCFG_DAD USB_OTG_DCFG_DAD_Msk /*!< Device address */ #define USB_OTG_DCFG_DAD_0 (0x01UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000010 */ @@ -241,120 +241,120 @@ typedef struct #define USB_OTG_DCFG_DAD_5 (0x20UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000200 */ #define USB_OTG_DCFG_DAD_6 (0x40UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000400 */ -#define USB_OTG_DCFG_PFIVL_Pos (11U) +#define USB_OTG_DCFG_PFIVL_Pos (11U) #define USB_OTG_DCFG_PFIVL_Msk (0x3UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00001800 */ #define USB_OTG_DCFG_PFIVL USB_OTG_DCFG_PFIVL_Msk /*!< Periodic (micro)frame interval */ #define USB_OTG_DCFG_PFIVL_0 (0x1UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00000800 */ #define USB_OTG_DCFG_PFIVL_1 (0x2UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00001000 */ -#define USB_OTG_DCFG_PERSCHIVL_Pos (24U) +#define USB_OTG_DCFG_PERSCHIVL_Pos (24U) #define USB_OTG_DCFG_PERSCHIVL_Msk (0x3UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x03000000 */ #define USB_OTG_DCFG_PERSCHIVL USB_OTG_DCFG_PERSCHIVL_Msk /*!< Periodic scheduling interval */ #define USB_OTG_DCFG_PERSCHIVL_0 (0x1UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x01000000 */ #define USB_OTG_DCFG_PERSCHIVL_1 (0x2UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x02000000 */ /******************** Bit definition for USB_OTG_PCGCR register ********************/ -#define USB_OTG_PCGCR_STPPCLK_Pos (0U) +#define USB_OTG_PCGCR_STPPCLK_Pos (0U) #define USB_OTG_PCGCR_STPPCLK_Msk (0x1UL << USB_OTG_PCGCR_STPPCLK_Pos) /*!< 0x00000001 */ #define USB_OTG_PCGCR_STPPCLK USB_OTG_PCGCR_STPPCLK_Msk /*!< Stop PHY clock */ -#define USB_OTG_PCGCR_GATEHCLK_Pos (1U) +#define USB_OTG_PCGCR_GATEHCLK_Pos (1U) #define USB_OTG_PCGCR_GATEHCLK_Msk (0x1UL << USB_OTG_PCGCR_GATEHCLK_Pos) /*!< 0x00000002 */ #define USB_OTG_PCGCR_GATEHCLK USB_OTG_PCGCR_GATEHCLK_Msk /*!< Gate HCLK */ -#define USB_OTG_PCGCR_PHYSUSP_Pos (4U) +#define USB_OTG_PCGCR_PHYSUSP_Pos (4U) #define USB_OTG_PCGCR_PHYSUSP_Msk (0x1UL << USB_OTG_PCGCR_PHYSUSP_Pos) /*!< 0x00000010 */ #define USB_OTG_PCGCR_PHYSUSP USB_OTG_PCGCR_PHYSUSP_Msk /*!< PHY suspended */ /******************** Bit definition for USB_OTG_GOTGINT register ********************/ -#define USB_OTG_GOTGINT_SEDET_Pos (2U) +#define USB_OTG_GOTGINT_SEDET_Pos (2U) #define USB_OTG_GOTGINT_SEDET_Msk (0x1UL << USB_OTG_GOTGINT_SEDET_Pos) /*!< 0x00000004 */ #define USB_OTG_GOTGINT_SEDET USB_OTG_GOTGINT_SEDET_Msk /*!< Session end detected */ -#define USB_OTG_GOTGINT_SRSSCHG_Pos (8U) +#define USB_OTG_GOTGINT_SRSSCHG_Pos (8U) #define USB_OTG_GOTGINT_SRSSCHG_Msk (0x1UL << USB_OTG_GOTGINT_SRSSCHG_Pos) /*!< 0x00000100 */ #define USB_OTG_GOTGINT_SRSSCHG USB_OTG_GOTGINT_SRSSCHG_Msk /*!< Session request success status change */ -#define USB_OTG_GOTGINT_HNSSCHG_Pos (9U) +#define USB_OTG_GOTGINT_HNSSCHG_Pos (9U) #define USB_OTG_GOTGINT_HNSSCHG_Msk (0x1UL << USB_OTG_GOTGINT_HNSSCHG_Pos) /*!< 0x00000200 */ #define USB_OTG_GOTGINT_HNSSCHG USB_OTG_GOTGINT_HNSSCHG_Msk /*!< Host negotiation success status change */ -#define USB_OTG_GOTGINT_HNGDET_Pos (17U) +#define USB_OTG_GOTGINT_HNGDET_Pos (17U) #define USB_OTG_GOTGINT_HNGDET_Msk (0x1UL << USB_OTG_GOTGINT_HNGDET_Pos) /*!< 0x00020000 */ #define USB_OTG_GOTGINT_HNGDET USB_OTG_GOTGINT_HNGDET_Msk /*!< Host negotiation detected */ -#define USB_OTG_GOTGINT_ADTOCHG_Pos (18U) +#define USB_OTG_GOTGINT_ADTOCHG_Pos (18U) #define USB_OTG_GOTGINT_ADTOCHG_Msk (0x1UL << USB_OTG_GOTGINT_ADTOCHG_Pos) /*!< 0x00040000 */ #define USB_OTG_GOTGINT_ADTOCHG USB_OTG_GOTGINT_ADTOCHG_Msk /*!< A-device timeout change */ -#define USB_OTG_GOTGINT_DBCDNE_Pos (19U) +#define USB_OTG_GOTGINT_DBCDNE_Pos (19U) #define USB_OTG_GOTGINT_DBCDNE_Msk (0x1UL << USB_OTG_GOTGINT_DBCDNE_Pos) /*!< 0x00080000 */ #define USB_OTG_GOTGINT_DBCDNE USB_OTG_GOTGINT_DBCDNE_Msk /*!< Debounce done */ /******************** Bit definition for USB_OTG_DCTL register ********************/ -#define USB_OTG_DCTL_RWUSIG_Pos (0U) +#define USB_OTG_DCTL_RWUSIG_Pos (0U) #define USB_OTG_DCTL_RWUSIG_Msk (0x1UL << USB_OTG_DCTL_RWUSIG_Pos) /*!< 0x00000001 */ #define USB_OTG_DCTL_RWUSIG USB_OTG_DCTL_RWUSIG_Msk /*!< Remote wakeup signaling */ -#define USB_OTG_DCTL_SDIS_Pos (1U) +#define USB_OTG_DCTL_SDIS_Pos (1U) #define USB_OTG_DCTL_SDIS_Msk (0x1UL << USB_OTG_DCTL_SDIS_Pos) /*!< 0x00000002 */ #define USB_OTG_DCTL_SDIS USB_OTG_DCTL_SDIS_Msk /*!< Soft disconnect */ -#define USB_OTG_DCTL_GINSTS_Pos (2U) +#define USB_OTG_DCTL_GINSTS_Pos (2U) #define USB_OTG_DCTL_GINSTS_Msk (0x1UL << USB_OTG_DCTL_GINSTS_Pos) /*!< 0x00000004 */ #define USB_OTG_DCTL_GINSTS USB_OTG_DCTL_GINSTS_Msk /*!< Global IN NAK status */ -#define USB_OTG_DCTL_GONSTS_Pos (3U) +#define USB_OTG_DCTL_GONSTS_Pos (3U) #define USB_OTG_DCTL_GONSTS_Msk (0x1UL << USB_OTG_DCTL_GONSTS_Pos) /*!< 0x00000008 */ #define USB_OTG_DCTL_GONSTS USB_OTG_DCTL_GONSTS_Msk /*!< Global OUT NAK status */ -#define USB_OTG_DCTL_TCTL_Pos (4U) +#define USB_OTG_DCTL_TCTL_Pos (4U) #define USB_OTG_DCTL_TCTL_Msk (0x7UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000070 */ #define USB_OTG_DCTL_TCTL USB_OTG_DCTL_TCTL_Msk /*!< Test control */ #define USB_OTG_DCTL_TCTL_0 (0x1UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000010 */ #define USB_OTG_DCTL_TCTL_1 (0x2UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000020 */ #define USB_OTG_DCTL_TCTL_2 (0x4UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000040 */ -#define USB_OTG_DCTL_SGINAK_Pos (7U) +#define USB_OTG_DCTL_SGINAK_Pos (7U) #define USB_OTG_DCTL_SGINAK_Msk (0x1UL << USB_OTG_DCTL_SGINAK_Pos) /*!< 0x00000080 */ #define USB_OTG_DCTL_SGINAK USB_OTG_DCTL_SGINAK_Msk /*!< Set global IN NAK */ -#define USB_OTG_DCTL_CGINAK_Pos (8U) +#define USB_OTG_DCTL_CGINAK_Pos (8U) #define USB_OTG_DCTL_CGINAK_Msk (0x1UL << USB_OTG_DCTL_CGINAK_Pos) /*!< 0x00000100 */ #define USB_OTG_DCTL_CGINAK USB_OTG_DCTL_CGINAK_Msk /*!< Clear global IN NAK */ -#define USB_OTG_DCTL_SGONAK_Pos (9U) +#define USB_OTG_DCTL_SGONAK_Pos (9U) #define USB_OTG_DCTL_SGONAK_Msk (0x1UL << USB_OTG_DCTL_SGONAK_Pos) /*!< 0x00000200 */ #define USB_OTG_DCTL_SGONAK USB_OTG_DCTL_SGONAK_Msk /*!< Set global OUT NAK */ -#define USB_OTG_DCTL_CGONAK_Pos (10U) +#define USB_OTG_DCTL_CGONAK_Pos (10U) #define USB_OTG_DCTL_CGONAK_Msk (0x1UL << USB_OTG_DCTL_CGONAK_Pos) /*!< 0x00000400 */ #define USB_OTG_DCTL_CGONAK USB_OTG_DCTL_CGONAK_Msk /*!< Clear global OUT NAK */ -#define USB_OTG_DCTL_POPRGDNE_Pos (11U) +#define USB_OTG_DCTL_POPRGDNE_Pos (11U) #define USB_OTG_DCTL_POPRGDNE_Msk (0x1UL << USB_OTG_DCTL_POPRGDNE_Pos) /*!< 0x00000800 */ #define USB_OTG_DCTL_POPRGDNE USB_OTG_DCTL_POPRGDNE_Msk /*!< Power-on programming done */ /******************** Bit definition for USB_OTG_HFIR register ********************/ -#define USB_OTG_HFIR_FRIVL_Pos (0U) +#define USB_OTG_HFIR_FRIVL_Pos (0U) #define USB_OTG_HFIR_FRIVL_Msk (0xFFFFUL << USB_OTG_HFIR_FRIVL_Pos) /*!< 0x0000FFFF */ #define USB_OTG_HFIR_FRIVL USB_OTG_HFIR_FRIVL_Msk /*!< Frame interval */ /******************** Bit definition for USB_OTG_HFNUM register ********************/ -#define USB_OTG_HFNUM_FRNUM_Pos (0U) +#define USB_OTG_HFNUM_FRNUM_Pos (0U) #define USB_OTG_HFNUM_FRNUM_Msk (0xFFFFUL << USB_OTG_HFNUM_FRNUM_Pos) /*!< 0x0000FFFF */ #define USB_OTG_HFNUM_FRNUM USB_OTG_HFNUM_FRNUM_Msk /*!< Frame number */ -#define USB_OTG_HFNUM_FTREM_Pos (16U) +#define USB_OTG_HFNUM_FTREM_Pos (16U) #define USB_OTG_HFNUM_FTREM_Msk (0xFFFFUL << USB_OTG_HFNUM_FTREM_Pos) /*!< 0xFFFF0000 */ #define USB_OTG_HFNUM_FTREM USB_OTG_HFNUM_FTREM_Msk /*!< Frame time remaining */ /******************** Bit definition for USB_OTG_DSTS register ********************/ -#define USB_OTG_DSTS_SUSPSTS_Pos (0U) +#define USB_OTG_DSTS_SUSPSTS_Pos (0U) #define USB_OTG_DSTS_SUSPSTS_Msk (0x1UL << USB_OTG_DSTS_SUSPSTS_Pos) /*!< 0x00000001 */ #define USB_OTG_DSTS_SUSPSTS USB_OTG_DSTS_SUSPSTS_Msk /*!< Suspend status */ -#define USB_OTG_DSTS_ENUMSPD_Pos (1U) +#define USB_OTG_DSTS_ENUMSPD_Pos (1U) #define USB_OTG_DSTS_ENUMSPD_Msk (0x3UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000006 */ #define USB_OTG_DSTS_ENUMSPD USB_OTG_DSTS_ENUMSPD_Msk /*!< Enumerated speed */ #define USB_OTG_DSTS_ENUMSPD_0 (0x1UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000002 */ #define USB_OTG_DSTS_ENUMSPD_1 (0x2UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000004 */ -#define USB_OTG_DSTS_EERR_Pos (3U) +#define USB_OTG_DSTS_EERR_Pos (3U) #define USB_OTG_DSTS_EERR_Msk (0x1UL << USB_OTG_DSTS_EERR_Pos) /*!< 0x00000008 */ #define USB_OTG_DSTS_EERR USB_OTG_DSTS_EERR_Msk /*!< Erratic error */ -#define USB_OTG_DSTS_FNSOF_Pos (8U) +#define USB_OTG_DSTS_FNSOF_Pos (8U) #define USB_OTG_DSTS_FNSOF_Msk (0x3FFFUL << USB_OTG_DSTS_FNSOF_Pos) /*!< 0x003FFF00 */ #define USB_OTG_DSTS_FNSOF USB_OTG_DSTS_FNSOF_Msk /*!< Frame number of the received SOF */ /******************** Bit definition for USB_OTG_GAHBCFG register ********************/ -#define USB_OTG_GAHBCFG_GINT_Pos (0U) +#define USB_OTG_GAHBCFG_GINT_Pos (0U) #define USB_OTG_GAHBCFG_GINT_Msk (0x1UL << USB_OTG_GAHBCFG_GINT_Pos) /*!< 0x00000001 */ #define USB_OTG_GAHBCFG_GINT USB_OTG_GAHBCFG_GINT_Msk /*!< Global interrupt mask */ -#define USB_OTG_GAHBCFG_HBSTLEN_Pos (1U) +#define USB_OTG_GAHBCFG_HBSTLEN_Pos (1U) #define USB_OTG_GAHBCFG_HBSTLEN_Msk (0xFUL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< 0x0000001E */ #define USB_OTG_GAHBCFG_HBSTLEN USB_OTG_GAHBCFG_HBSTLEN_Msk /*!< Burst length/type */ #define USB_OTG_GAHBCFG_HBSTLEN_0 (0x0UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< Single */ @@ -362,99 +362,99 @@ typedef struct #define USB_OTG_GAHBCFG_HBSTLEN_2 (0x3UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR4 */ #define USB_OTG_GAHBCFG_HBSTLEN_3 (0x5UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR8 */ #define USB_OTG_GAHBCFG_HBSTLEN_4 (0x7UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR16 */ -#define USB_OTG_GAHBCFG_DMAEN_Pos (5U) +#define USB_OTG_GAHBCFG_DMAEN_Pos (5U) #define USB_OTG_GAHBCFG_DMAEN_Msk (0x1UL << USB_OTG_GAHBCFG_DMAEN_Pos) /*!< 0x00000020 */ #define USB_OTG_GAHBCFG_DMAEN USB_OTG_GAHBCFG_DMAEN_Msk /*!< DMA enable */ -#define USB_OTG_GAHBCFG_TXFELVL_Pos (7U) +#define USB_OTG_GAHBCFG_TXFELVL_Pos (7U) #define USB_OTG_GAHBCFG_TXFELVL_Msk (0x1UL << USB_OTG_GAHBCFG_TXFELVL_Pos) /*!< 0x00000080 */ #define USB_OTG_GAHBCFG_TXFELVL USB_OTG_GAHBCFG_TXFELVL_Msk /*!< TxFIFO empty level */ -#define USB_OTG_GAHBCFG_PTXFELVL_Pos (8U) +#define USB_OTG_GAHBCFG_PTXFELVL_Pos (8U) #define USB_OTG_GAHBCFG_PTXFELVL_Msk (0x1UL << USB_OTG_GAHBCFG_PTXFELVL_Pos) /*!< 0x00000100 */ #define USB_OTG_GAHBCFG_PTXFELVL USB_OTG_GAHBCFG_PTXFELVL_Msk /*!< Periodic TxFIFO empty level */ /******************** Bit definition for USB_OTG_GUSBCFG register ********************/ -#define USB_OTG_GUSBCFG_TOCAL_Pos (0U) +#define USB_OTG_GUSBCFG_TOCAL_Pos (0U) #define USB_OTG_GUSBCFG_TOCAL_Msk (0x7UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000007 */ #define USB_OTG_GUSBCFG_TOCAL USB_OTG_GUSBCFG_TOCAL_Msk /*!< FS timeout calibration */ #define USB_OTG_GUSBCFG_TOCAL_0 (0x1UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000001 */ #define USB_OTG_GUSBCFG_TOCAL_1 (0x2UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000002 */ #define USB_OTG_GUSBCFG_TOCAL_2 (0x4UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000004 */ -#define USB_OTG_GUSBCFG_PHYSEL_Pos (6U) +#define USB_OTG_GUSBCFG_PHYSEL_Pos (6U) #define USB_OTG_GUSBCFG_PHYSEL_Msk (0x1UL << USB_OTG_GUSBCFG_PHYSEL_Pos) /*!< 0x00000040 */ #define USB_OTG_GUSBCFG_PHYSEL USB_OTG_GUSBCFG_PHYSEL_Msk /*!< USB 2.0 high-speed ULPI PHY or USB 1.1 full-speed serial transceiver select */ -#define USB_OTG_GUSBCFG_SRPCAP_Pos (8U) +#define USB_OTG_GUSBCFG_SRPCAP_Pos (8U) #define USB_OTG_GUSBCFG_SRPCAP_Msk (0x1UL << USB_OTG_GUSBCFG_SRPCAP_Pos) /*!< 0x00000100 */ #define USB_OTG_GUSBCFG_SRPCAP USB_OTG_GUSBCFG_SRPCAP_Msk /*!< SRP-capable */ -#define USB_OTG_GUSBCFG_HNPCAP_Pos (9U) +#define USB_OTG_GUSBCFG_HNPCAP_Pos (9U) #define USB_OTG_GUSBCFG_HNPCAP_Msk (0x1UL << USB_OTG_GUSBCFG_HNPCAP_Pos) /*!< 0x00000200 */ #define USB_OTG_GUSBCFG_HNPCAP USB_OTG_GUSBCFG_HNPCAP_Msk /*!< HNP-capable */ -#define USB_OTG_GUSBCFG_TRDT_Pos (10U) +#define USB_OTG_GUSBCFG_TRDT_Pos (10U) #define USB_OTG_GUSBCFG_TRDT_Msk (0xFUL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00003C00 */ #define USB_OTG_GUSBCFG_TRDT USB_OTG_GUSBCFG_TRDT_Msk /*!< USB turnaround time */ #define USB_OTG_GUSBCFG_TRDT_0 (0x1UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00000400 */ #define USB_OTG_GUSBCFG_TRDT_1 (0x2UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00000800 */ #define USB_OTG_GUSBCFG_TRDT_2 (0x4UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00001000 */ #define USB_OTG_GUSBCFG_TRDT_3 (0x8UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00002000 */ -#define USB_OTG_GUSBCFG_PHYLPCS_Pos (15U) +#define USB_OTG_GUSBCFG_PHYLPCS_Pos (15U) #define USB_OTG_GUSBCFG_PHYLPCS_Msk (0x1UL << USB_OTG_GUSBCFG_PHYLPCS_Pos) /*!< 0x00008000 */ #define USB_OTG_GUSBCFG_PHYLPCS USB_OTG_GUSBCFG_PHYLPCS_Msk /*!< PHY Low-power clock select */ -#define USB_OTG_GUSBCFG_ULPIFSLS_Pos (17U) +#define USB_OTG_GUSBCFG_ULPIFSLS_Pos (17U) #define USB_OTG_GUSBCFG_ULPIFSLS_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIFSLS_Pos) /*!< 0x00020000 */ #define USB_OTG_GUSBCFG_ULPIFSLS USB_OTG_GUSBCFG_ULPIFSLS_Msk /*!< ULPI FS/LS select */ -#define USB_OTG_GUSBCFG_ULPIAR_Pos (18U) +#define USB_OTG_GUSBCFG_ULPIAR_Pos (18U) #define USB_OTG_GUSBCFG_ULPIAR_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIAR_Pos) /*!< 0x00040000 */ #define USB_OTG_GUSBCFG_ULPIAR USB_OTG_GUSBCFG_ULPIAR_Msk /*!< ULPI Auto-resume */ -#define USB_OTG_GUSBCFG_ULPICSM_Pos (19U) +#define USB_OTG_GUSBCFG_ULPICSM_Pos (19U) #define USB_OTG_GUSBCFG_ULPICSM_Msk (0x1UL << USB_OTG_GUSBCFG_ULPICSM_Pos) /*!< 0x00080000 */ #define USB_OTG_GUSBCFG_ULPICSM USB_OTG_GUSBCFG_ULPICSM_Msk /*!< ULPI Clock SuspendM */ -#define USB_OTG_GUSBCFG_ULPIEVBUSD_Pos (20U) +#define USB_OTG_GUSBCFG_ULPIEVBUSD_Pos (20U) #define USB_OTG_GUSBCFG_ULPIEVBUSD_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIEVBUSD_Pos) /*!< 0x00100000 */ #define USB_OTG_GUSBCFG_ULPIEVBUSD USB_OTG_GUSBCFG_ULPIEVBUSD_Msk /*!< ULPI External VBUS Drive */ -#define USB_OTG_GUSBCFG_ULPIEVBUSI_Pos (21U) +#define USB_OTG_GUSBCFG_ULPIEVBUSI_Pos (21U) #define USB_OTG_GUSBCFG_ULPIEVBUSI_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIEVBUSI_Pos) /*!< 0x00200000 */ #define USB_OTG_GUSBCFG_ULPIEVBUSI USB_OTG_GUSBCFG_ULPIEVBUSI_Msk /*!< ULPI external VBUS indicator */ -#define USB_OTG_GUSBCFG_TSDPS_Pos (22U) +#define USB_OTG_GUSBCFG_TSDPS_Pos (22U) #define USB_OTG_GUSBCFG_TSDPS_Msk (0x1UL << USB_OTG_GUSBCFG_TSDPS_Pos) /*!< 0x00400000 */ #define USB_OTG_GUSBCFG_TSDPS USB_OTG_GUSBCFG_TSDPS_Msk /*!< TermSel DLine pulsing selection */ -#define USB_OTG_GUSBCFG_PCCI_Pos (23U) +#define USB_OTG_GUSBCFG_PCCI_Pos (23U) #define USB_OTG_GUSBCFG_PCCI_Msk (0x1UL << USB_OTG_GUSBCFG_PCCI_Pos) /*!< 0x00800000 */ #define USB_OTG_GUSBCFG_PCCI USB_OTG_GUSBCFG_PCCI_Msk /*!< Indicator complement */ -#define USB_OTG_GUSBCFG_PTCI_Pos (24U) +#define USB_OTG_GUSBCFG_PTCI_Pos (24U) #define USB_OTG_GUSBCFG_PTCI_Msk (0x1UL << USB_OTG_GUSBCFG_PTCI_Pos) /*!< 0x01000000 */ #define USB_OTG_GUSBCFG_PTCI USB_OTG_GUSBCFG_PTCI_Msk /*!< Indicator pass through */ -#define USB_OTG_GUSBCFG_ULPIIPD_Pos (25U) +#define USB_OTG_GUSBCFG_ULPIIPD_Pos (25U) #define USB_OTG_GUSBCFG_ULPIIPD_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIIPD_Pos) /*!< 0x02000000 */ #define USB_OTG_GUSBCFG_ULPIIPD USB_OTG_GUSBCFG_ULPIIPD_Msk /*!< ULPI interface protect disable */ -#define USB_OTG_GUSBCFG_FHMOD_Pos (29U) +#define USB_OTG_GUSBCFG_FHMOD_Pos (29U) #define USB_OTG_GUSBCFG_FHMOD_Msk (0x1UL << USB_OTG_GUSBCFG_FHMOD_Pos) /*!< 0x20000000 */ #define USB_OTG_GUSBCFG_FHMOD USB_OTG_GUSBCFG_FHMOD_Msk /*!< Forced host mode */ -#define USB_OTG_GUSBCFG_FDMOD_Pos (30U) +#define USB_OTG_GUSBCFG_FDMOD_Pos (30U) #define USB_OTG_GUSBCFG_FDMOD_Msk (0x1UL << USB_OTG_GUSBCFG_FDMOD_Pos) /*!< 0x40000000 */ #define USB_OTG_GUSBCFG_FDMOD USB_OTG_GUSBCFG_FDMOD_Msk /*!< Forced peripheral mode */ -#define USB_OTG_GUSBCFG_CTXPKT_Pos (31U) +#define USB_OTG_GUSBCFG_CTXPKT_Pos (31U) #define USB_OTG_GUSBCFG_CTXPKT_Msk (0x1UL << USB_OTG_GUSBCFG_CTXPKT_Pos) /*!< 0x80000000 */ #define USB_OTG_GUSBCFG_CTXPKT USB_OTG_GUSBCFG_CTXPKT_Msk /*!< Corrupt Tx packet */ /******************** Bit definition for USB_OTG_GRSTCTL register ********************/ -#define USB_OTG_GRSTCTL_CSRST_Pos (0U) +#define USB_OTG_GRSTCTL_CSRST_Pos (0U) #define USB_OTG_GRSTCTL_CSRST_Msk (0x1UL << USB_OTG_GRSTCTL_CSRST_Pos) /*!< 0x00000001 */ #define USB_OTG_GRSTCTL_CSRST USB_OTG_GRSTCTL_CSRST_Msk /*!< Core soft reset */ -#define USB_OTG_GRSTCTL_HSRST_Pos (1U) +#define USB_OTG_GRSTCTL_HSRST_Pos (1U) #define USB_OTG_GRSTCTL_HSRST_Msk (0x1UL << USB_OTG_GRSTCTL_HSRST_Pos) /*!< 0x00000002 */ #define USB_OTG_GRSTCTL_HSRST USB_OTG_GRSTCTL_HSRST_Msk /*!< HCLK soft reset */ -#define USB_OTG_GRSTCTL_FCRST_Pos (2U) +#define USB_OTG_GRSTCTL_FCRST_Pos (2U) #define USB_OTG_GRSTCTL_FCRST_Msk (0x1UL << USB_OTG_GRSTCTL_FCRST_Pos) /*!< 0x00000004 */ #define USB_OTG_GRSTCTL_FCRST USB_OTG_GRSTCTL_FCRST_Msk /*!< Host frame counter reset */ -#define USB_OTG_GRSTCTL_RXFFLSH_Pos (4U) +#define USB_OTG_GRSTCTL_RXFFLSH_Pos (4U) #define USB_OTG_GRSTCTL_RXFFLSH_Msk (0x1UL << USB_OTG_GRSTCTL_RXFFLSH_Pos) /*!< 0x00000010 */ #define USB_OTG_GRSTCTL_RXFFLSH USB_OTG_GRSTCTL_RXFFLSH_Msk /*!< RxFIFO flush */ -#define USB_OTG_GRSTCTL_TXFFLSH_Pos (5U) +#define USB_OTG_GRSTCTL_TXFFLSH_Pos (5U) #define USB_OTG_GRSTCTL_TXFFLSH_Msk (0x1UL << USB_OTG_GRSTCTL_TXFFLSH_Pos) /*!< 0x00000020 */ #define USB_OTG_GRSTCTL_TXFFLSH USB_OTG_GRSTCTL_TXFFLSH_Msk /*!< TxFIFO flush */ -#define USB_OTG_GRSTCTL_TXFNUM_Pos (6U) +#define USB_OTG_GRSTCTL_TXFNUM_Pos (6U) #define USB_OTG_GRSTCTL_TXFNUM_Msk (0x1FUL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x000007C0 */ #define USB_OTG_GRSTCTL_TXFNUM USB_OTG_GRSTCTL_TXFNUM_Msk /*!< TxFIFO number */ #define USB_OTG_GRSTCTL_TXFNUM_0 (0x01UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000040 */ @@ -462,44 +462,44 @@ typedef struct #define USB_OTG_GRSTCTL_TXFNUM_2 (0x04UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000100 */ #define USB_OTG_GRSTCTL_TXFNUM_3 (0x08UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000200 */ #define USB_OTG_GRSTCTL_TXFNUM_4 (0x10UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000400 */ -#define USB_OTG_GRSTCTL_DMAREQ_Pos (30U) +#define USB_OTG_GRSTCTL_DMAREQ_Pos (30U) #define USB_OTG_GRSTCTL_DMAREQ_Msk (0x1UL << USB_OTG_GRSTCTL_DMAREQ_Pos) /*!< 0x40000000 */ #define USB_OTG_GRSTCTL_DMAREQ USB_OTG_GRSTCTL_DMAREQ_Msk /*!< DMA request signal */ -#define USB_OTG_GRSTCTL_AHBIDL_Pos (31U) +#define USB_OTG_GRSTCTL_AHBIDL_Pos (31U) #define USB_OTG_GRSTCTL_AHBIDL_Msk (0x1UL << USB_OTG_GRSTCTL_AHBIDL_Pos) /*!< 0x80000000 */ #define USB_OTG_GRSTCTL_AHBIDL USB_OTG_GRSTCTL_AHBIDL_Msk /*!< AHB master idle */ /******************** Bit definition for USB_OTG_DIEPMSK register ********************/ -#define USB_OTG_DIEPMSK_XFRCM_Pos (0U) +#define USB_OTG_DIEPMSK_XFRCM_Pos (0U) #define USB_OTG_DIEPMSK_XFRCM_Msk (0x1UL << USB_OTG_DIEPMSK_XFRCM_Pos) /*!< 0x00000001 */ #define USB_OTG_DIEPMSK_XFRCM USB_OTG_DIEPMSK_XFRCM_Msk /*!< Transfer completed interrupt mask */ -#define USB_OTG_DIEPMSK_EPDM_Pos (1U) +#define USB_OTG_DIEPMSK_EPDM_Pos (1U) #define USB_OTG_DIEPMSK_EPDM_Msk (0x1UL << USB_OTG_DIEPMSK_EPDM_Pos) /*!< 0x00000002 */ #define USB_OTG_DIEPMSK_EPDM USB_OTG_DIEPMSK_EPDM_Msk /*!< Endpoint disabled interrupt mask */ -#define USB_OTG_DIEPMSK_TOM_Pos (3U) +#define USB_OTG_DIEPMSK_TOM_Pos (3U) #define USB_OTG_DIEPMSK_TOM_Msk (0x1UL << USB_OTG_DIEPMSK_TOM_Pos) /*!< 0x00000008 */ #define USB_OTG_DIEPMSK_TOM USB_OTG_DIEPMSK_TOM_Msk /*!< Timeout condition mask (nonisochronous endpoints) */ -#define USB_OTG_DIEPMSK_ITTXFEMSK_Pos (4U) +#define USB_OTG_DIEPMSK_ITTXFEMSK_Pos (4U) #define USB_OTG_DIEPMSK_ITTXFEMSK_Msk (0x1UL << USB_OTG_DIEPMSK_ITTXFEMSK_Pos) /*!< 0x00000010 */ #define USB_OTG_DIEPMSK_ITTXFEMSK USB_OTG_DIEPMSK_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */ -#define USB_OTG_DIEPMSK_INEPNMM_Pos (5U) +#define USB_OTG_DIEPMSK_INEPNMM_Pos (5U) #define USB_OTG_DIEPMSK_INEPNMM_Msk (0x1UL << USB_OTG_DIEPMSK_INEPNMM_Pos) /*!< 0x00000020 */ #define USB_OTG_DIEPMSK_INEPNMM USB_OTG_DIEPMSK_INEPNMM_Msk /*!< IN token received with EP mismatch mask */ -#define USB_OTG_DIEPMSK_INEPNEM_Pos (6U) +#define USB_OTG_DIEPMSK_INEPNEM_Pos (6U) #define USB_OTG_DIEPMSK_INEPNEM_Msk (0x1UL << USB_OTG_DIEPMSK_INEPNEM_Pos) /*!< 0x00000040 */ #define USB_OTG_DIEPMSK_INEPNEM USB_OTG_DIEPMSK_INEPNEM_Msk /*!< IN endpoint NAK effective mask */ -#define USB_OTG_DIEPMSK_TXFURM_Pos (8U) +#define USB_OTG_DIEPMSK_TXFURM_Pos (8U) #define USB_OTG_DIEPMSK_TXFURM_Msk (0x1UL << USB_OTG_DIEPMSK_TXFURM_Pos) /*!< 0x00000100 */ #define USB_OTG_DIEPMSK_TXFURM USB_OTG_DIEPMSK_TXFURM_Msk /*!< FIFO underrun mask */ -#define USB_OTG_DIEPMSK_BIM_Pos (9U) +#define USB_OTG_DIEPMSK_BIM_Pos (9U) #define USB_OTG_DIEPMSK_BIM_Msk (0x1UL << USB_OTG_DIEPMSK_BIM_Pos) /*!< 0x00000200 */ #define USB_OTG_DIEPMSK_BIM USB_OTG_DIEPMSK_BIM_Msk /*!< BNA interrupt mask */ /******************** Bit definition for USB_OTG_HPTXSTS register ********************/ -#define USB_OTG_HPTXSTS_PTXFSAVL_Pos (0U) +#define USB_OTG_HPTXSTS_PTXFSAVL_Pos (0U) #define USB_OTG_HPTXSTS_PTXFSAVL_Msk (0xFFFFUL << USB_OTG_HPTXSTS_PTXFSAVL_Pos) /*!< 0x0000FFFF */ #define USB_OTG_HPTXSTS_PTXFSAVL USB_OTG_HPTXSTS_PTXFSAVL_Msk /*!< Periodic transmit data FIFO space available */ -#define USB_OTG_HPTXSTS_PTXQSAV_Pos (16U) +#define USB_OTG_HPTXSTS_PTXQSAV_Pos (16U) #define USB_OTG_HPTXSTS_PTXQSAV_Msk (0xFFUL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00FF0000 */ #define USB_OTG_HPTXSTS_PTXQSAV USB_OTG_HPTXSTS_PTXQSAV_Msk /*!< Periodic transmit request queue space available */ #define USB_OTG_HPTXSTS_PTXQSAV_0 (0x01UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00010000 */ @@ -511,7 +511,7 @@ typedef struct #define USB_OTG_HPTXSTS_PTXQSAV_6 (0x40UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00400000 */ #define USB_OTG_HPTXSTS_PTXQSAV_7 (0x80UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00800000 */ -#define USB_OTG_HPTXSTS_PTXQTOP_Pos (24U) +#define USB_OTG_HPTXSTS_PTXQTOP_Pos (24U) #define USB_OTG_HPTXSTS_PTXQTOP_Msk (0xFFUL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0xFF000000 */ #define USB_OTG_HPTXSTS_PTXQTOP USB_OTG_HPTXSTS_PTXQTOP_Msk /*!< Top of the periodic transmit request queue */ #define USB_OTG_HPTXSTS_PTXQTOP_0 (0x01UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x01000000 */ @@ -524,36 +524,36 @@ typedef struct #define USB_OTG_HPTXSTS_PTXQTOP_7 (0x80UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x80000000 */ /******************** Bit definition for USB_OTG_HAINT register ********************/ -#define USB_OTG_HAINT_HAINT_Pos (0U) +#define USB_OTG_HAINT_HAINT_Pos (0U) #define USB_OTG_HAINT_HAINT_Msk (0xFFFFUL << USB_OTG_HAINT_HAINT_Pos) /*!< 0x0000FFFF */ #define USB_OTG_HAINT_HAINT USB_OTG_HAINT_HAINT_Msk /*!< Channel interrupts */ /******************** Bit definition for USB_OTG_DOEPMSK register ********************/ -#define USB_OTG_DOEPMSK_XFRCM_Pos (0U) +#define USB_OTG_DOEPMSK_XFRCM_Pos (0U) #define USB_OTG_DOEPMSK_XFRCM_Msk (0x1UL << USB_OTG_DOEPMSK_XFRCM_Pos) /*!< 0x00000001 */ #define USB_OTG_DOEPMSK_XFRCM USB_OTG_DOEPMSK_XFRCM_Msk /*!< Transfer completed interrupt mask */ -#define USB_OTG_DOEPMSK_EPDM_Pos (1U) +#define USB_OTG_DOEPMSK_EPDM_Pos (1U) #define USB_OTG_DOEPMSK_EPDM_Msk (0x1UL << USB_OTG_DOEPMSK_EPDM_Pos) /*!< 0x00000002 */ #define USB_OTG_DOEPMSK_EPDM USB_OTG_DOEPMSK_EPDM_Msk /*!< Endpoint disabled interrupt mask */ #define USB_OTG_DOEPMSK_AHBERRM_Pos (2U) #define USB_OTG_DOEPMSK_AHBERRM_Msk (0x1UL << USB_OTG_DOEPMSK_AHBERRM_Pos) /*!< 0x00000004 */ #define USB_OTG_DOEPMSK_AHBERRM USB_OTG_DOEPMSK_AHBERRM_Msk /*!< OUT transaction AHB Error interrupt mask */ -#define USB_OTG_DOEPMSK_STUPM_Pos (3U) +#define USB_OTG_DOEPMSK_STUPM_Pos (3U) #define USB_OTG_DOEPMSK_STUPM_Msk (0x1UL << USB_OTG_DOEPMSK_STUPM_Pos) /*!< 0x00000008 */ #define USB_OTG_DOEPMSK_STUPM USB_OTG_DOEPMSK_STUPM_Msk /*!< SETUP phase done mask */ -#define USB_OTG_DOEPMSK_OTEPDM_Pos (4U) +#define USB_OTG_DOEPMSK_OTEPDM_Pos (4U) #define USB_OTG_DOEPMSK_OTEPDM_Msk (0x1UL << USB_OTG_DOEPMSK_OTEPDM_Pos) /*!< 0x00000010 */ #define USB_OTG_DOEPMSK_OTEPDM USB_OTG_DOEPMSK_OTEPDM_Msk /*!< OUT token received when endpoint disabled mask */ -#define USB_OTG_DOEPMSK_OTEPSPRM_Pos (5U) +#define USB_OTG_DOEPMSK_OTEPSPRM_Pos (5U) #define USB_OTG_DOEPMSK_OTEPSPRM_Msk (0x1UL << USB_OTG_DOEPMSK_OTEPSPRM_Pos) /*!< 0x00000020 */ #define USB_OTG_DOEPMSK_OTEPSPRM USB_OTG_DOEPMSK_OTEPSPRM_Msk /*!< Status Phase Received mask */ -#define USB_OTG_DOEPMSK_B2BSTUP_Pos (6U) +#define USB_OTG_DOEPMSK_B2BSTUP_Pos (6U) #define USB_OTG_DOEPMSK_B2BSTUP_Msk (0x1UL << USB_OTG_DOEPMSK_B2BSTUP_Pos) /*!< 0x00000040 */ #define USB_OTG_DOEPMSK_B2BSTUP USB_OTG_DOEPMSK_B2BSTUP_Msk /*!< Back-to-back SETUP packets received mask */ -#define USB_OTG_DOEPMSK_OPEM_Pos (8U) +#define USB_OTG_DOEPMSK_OPEM_Pos (8U) #define USB_OTG_DOEPMSK_OPEM_Msk (0x1UL << USB_OTG_DOEPMSK_OPEM_Pos) /*!< 0x00000100 */ #define USB_OTG_DOEPMSK_OPEM USB_OTG_DOEPMSK_OPEM_Msk /*!< OUT packet error mask */ -#define USB_OTG_DOEPMSK_BOIM_Pos (9U) +#define USB_OTG_DOEPMSK_BOIM_Pos (9U) #define USB_OTG_DOEPMSK_BOIM_Msk (0x1UL << USB_OTG_DOEPMSK_BOIM_Pos) /*!< 0x00000200 */ #define USB_OTG_DOEPMSK_BOIM USB_OTG_DOEPMSK_BOIM_Msk /*!< BNA interrupt mask */ #define USB_OTG_DOEPMSK_BERRM_Pos (12U) @@ -566,235 +566,235 @@ typedef struct #define USB_OTG_DOEPMSK_NYETM_Msk (0x1UL << USB_OTG_DOEPMSK_NYETM_Pos) /*!< 0x00004000 */ #define USB_OTG_DOEPMSK_NYETM USB_OTG_DOEPMSK_NYETM_Msk /*!< NYET interrupt mask */ /******************** Bit definition for USB_OTG_GINTSTS register ********************/ -#define USB_OTG_GINTSTS_CMOD_Pos (0U) +#define USB_OTG_GINTSTS_CMOD_Pos (0U) #define USB_OTG_GINTSTS_CMOD_Msk (0x1UL << USB_OTG_GINTSTS_CMOD_Pos) /*!< 0x00000001 */ #define USB_OTG_GINTSTS_CMOD USB_OTG_GINTSTS_CMOD_Msk /*!< Current mode of operation */ -#define USB_OTG_GINTSTS_MMIS_Pos (1U) +#define USB_OTG_GINTSTS_MMIS_Pos (1U) #define USB_OTG_GINTSTS_MMIS_Msk (0x1UL << USB_OTG_GINTSTS_MMIS_Pos) /*!< 0x00000002 */ #define USB_OTG_GINTSTS_MMIS USB_OTG_GINTSTS_MMIS_Msk /*!< Mode mismatch interrupt */ -#define USB_OTG_GINTSTS_OTGINT_Pos (2U) +#define USB_OTG_GINTSTS_OTGINT_Pos (2U) #define USB_OTG_GINTSTS_OTGINT_Msk (0x1UL << USB_OTG_GINTSTS_OTGINT_Pos) /*!< 0x00000004 */ #define USB_OTG_GINTSTS_OTGINT USB_OTG_GINTSTS_OTGINT_Msk /*!< OTG interrupt */ -#define USB_OTG_GINTSTS_SOF_Pos (3U) +#define USB_OTG_GINTSTS_SOF_Pos (3U) #define USB_OTG_GINTSTS_SOF_Msk (0x1UL << USB_OTG_GINTSTS_SOF_Pos) /*!< 0x00000008 */ #define USB_OTG_GINTSTS_SOF USB_OTG_GINTSTS_SOF_Msk /*!< Start of frame */ -#define USB_OTG_GINTSTS_RXFLVL_Pos (4U) +#define USB_OTG_GINTSTS_RXFLVL_Pos (4U) #define USB_OTG_GINTSTS_RXFLVL_Msk (0x1UL << USB_OTG_GINTSTS_RXFLVL_Pos) /*!< 0x00000010 */ #define USB_OTG_GINTSTS_RXFLVL USB_OTG_GINTSTS_RXFLVL_Msk /*!< RxFIFO nonempty */ -#define USB_OTG_GINTSTS_NPTXFE_Pos (5U) +#define USB_OTG_GINTSTS_NPTXFE_Pos (5U) #define USB_OTG_GINTSTS_NPTXFE_Msk (0x1UL << USB_OTG_GINTSTS_NPTXFE_Pos) /*!< 0x00000020 */ #define USB_OTG_GINTSTS_NPTXFE USB_OTG_GINTSTS_NPTXFE_Msk /*!< Nonperiodic TxFIFO empty */ -#define USB_OTG_GINTSTS_GINAKEFF_Pos (6U) +#define USB_OTG_GINTSTS_GINAKEFF_Pos (6U) #define USB_OTG_GINTSTS_GINAKEFF_Msk (0x1UL << USB_OTG_GINTSTS_GINAKEFF_Pos) /*!< 0x00000040 */ #define USB_OTG_GINTSTS_GINAKEFF USB_OTG_GINTSTS_GINAKEFF_Msk /*!< Global IN nonperiodic NAK effective */ -#define USB_OTG_GINTSTS_BOUTNAKEFF_Pos (7U) +#define USB_OTG_GINTSTS_BOUTNAKEFF_Pos (7U) #define USB_OTG_GINTSTS_BOUTNAKEFF_Msk (0x1UL << USB_OTG_GINTSTS_BOUTNAKEFF_Pos) /*!< 0x00000080 */ #define USB_OTG_GINTSTS_BOUTNAKEFF USB_OTG_GINTSTS_BOUTNAKEFF_Msk /*!< Global OUT NAK effective */ -#define USB_OTG_GINTSTS_ESUSP_Pos (10U) +#define USB_OTG_GINTSTS_ESUSP_Pos (10U) #define USB_OTG_GINTSTS_ESUSP_Msk (0x1UL << USB_OTG_GINTSTS_ESUSP_Pos) /*!< 0x00000400 */ #define USB_OTG_GINTSTS_ESUSP USB_OTG_GINTSTS_ESUSP_Msk /*!< Early suspend */ -#define USB_OTG_GINTSTS_USBSUSP_Pos (11U) +#define USB_OTG_GINTSTS_USBSUSP_Pos (11U) #define USB_OTG_GINTSTS_USBSUSP_Msk (0x1UL << USB_OTG_GINTSTS_USBSUSP_Pos) /*!< 0x00000800 */ #define USB_OTG_GINTSTS_USBSUSP USB_OTG_GINTSTS_USBSUSP_Msk /*!< USB suspend */ -#define USB_OTG_GINTSTS_USBRST_Pos (12U) +#define USB_OTG_GINTSTS_USBRST_Pos (12U) #define USB_OTG_GINTSTS_USBRST_Msk (0x1UL << USB_OTG_GINTSTS_USBRST_Pos) /*!< 0x00001000 */ #define USB_OTG_GINTSTS_USBRST USB_OTG_GINTSTS_USBRST_Msk /*!< USB reset */ -#define USB_OTG_GINTSTS_ENUMDNE_Pos (13U) +#define USB_OTG_GINTSTS_ENUMDNE_Pos (13U) #define USB_OTG_GINTSTS_ENUMDNE_Msk (0x1UL << USB_OTG_GINTSTS_ENUMDNE_Pos) /*!< 0x00002000 */ #define USB_OTG_GINTSTS_ENUMDNE USB_OTG_GINTSTS_ENUMDNE_Msk /*!< Enumeration done */ -#define USB_OTG_GINTSTS_ISOODRP_Pos (14U) +#define USB_OTG_GINTSTS_ISOODRP_Pos (14U) #define USB_OTG_GINTSTS_ISOODRP_Msk (0x1UL << USB_OTG_GINTSTS_ISOODRP_Pos) /*!< 0x00004000 */ #define USB_OTG_GINTSTS_ISOODRP USB_OTG_GINTSTS_ISOODRP_Msk /*!< Isochronous OUT packet dropped interrupt */ -#define USB_OTG_GINTSTS_EOPF_Pos (15U) +#define USB_OTG_GINTSTS_EOPF_Pos (15U) #define USB_OTG_GINTSTS_EOPF_Msk (0x1UL << USB_OTG_GINTSTS_EOPF_Pos) /*!< 0x00008000 */ #define USB_OTG_GINTSTS_EOPF USB_OTG_GINTSTS_EOPF_Msk /*!< End of periodic frame interrupt */ -#define USB_OTG_GINTSTS_IEPINT_Pos (18U) +#define USB_OTG_GINTSTS_IEPINT_Pos (18U) #define USB_OTG_GINTSTS_IEPINT_Msk (0x1UL << USB_OTG_GINTSTS_IEPINT_Pos) /*!< 0x00040000 */ #define USB_OTG_GINTSTS_IEPINT USB_OTG_GINTSTS_IEPINT_Msk /*!< IN endpoint interrupt */ -#define USB_OTG_GINTSTS_OEPINT_Pos (19U) +#define USB_OTG_GINTSTS_OEPINT_Pos (19U) #define USB_OTG_GINTSTS_OEPINT_Msk (0x1UL << USB_OTG_GINTSTS_OEPINT_Pos) /*!< 0x00080000 */ #define USB_OTG_GINTSTS_OEPINT USB_OTG_GINTSTS_OEPINT_Msk /*!< OUT endpoint interrupt */ -#define USB_OTG_GINTSTS_IISOIXFR_Pos (20U) +#define USB_OTG_GINTSTS_IISOIXFR_Pos (20U) #define USB_OTG_GINTSTS_IISOIXFR_Msk (0x1UL << USB_OTG_GINTSTS_IISOIXFR_Pos) /*!< 0x00100000 */ #define USB_OTG_GINTSTS_IISOIXFR USB_OTG_GINTSTS_IISOIXFR_Msk /*!< Incomplete isochronous IN transfer */ -#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos (21U) +#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos (21U) #define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk (0x1UL << USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos) /*!< 0x00200000 */ #define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk /*!< Incomplete periodic transfer */ -#define USB_OTG_GINTSTS_DATAFSUSP_Pos (22U) +#define USB_OTG_GINTSTS_DATAFSUSP_Pos (22U) #define USB_OTG_GINTSTS_DATAFSUSP_Msk (0x1UL << USB_OTG_GINTSTS_DATAFSUSP_Pos) /*!< 0x00400000 */ #define USB_OTG_GINTSTS_DATAFSUSP USB_OTG_GINTSTS_DATAFSUSP_Msk /*!< Data fetch suspended */ -#define USB_OTG_GINTSTS_HPRTINT_Pos (24U) +#define USB_OTG_GINTSTS_HPRTINT_Pos (24U) #define USB_OTG_GINTSTS_HPRTINT_Msk (0x1UL << USB_OTG_GINTSTS_HPRTINT_Pos) /*!< 0x01000000 */ #define USB_OTG_GINTSTS_HPRTINT USB_OTG_GINTSTS_HPRTINT_Msk /*!< Host port interrupt */ -#define USB_OTG_GINTSTS_HCINT_Pos (25U) +#define USB_OTG_GINTSTS_HCINT_Pos (25U) #define USB_OTG_GINTSTS_HCINT_Msk (0x1UL << USB_OTG_GINTSTS_HCINT_Pos) /*!< 0x02000000 */ #define USB_OTG_GINTSTS_HCINT USB_OTG_GINTSTS_HCINT_Msk /*!< Host channels interrupt */ -#define USB_OTG_GINTSTS_PTXFE_Pos (26U) +#define USB_OTG_GINTSTS_PTXFE_Pos (26U) #define USB_OTG_GINTSTS_PTXFE_Msk (0x1UL << USB_OTG_GINTSTS_PTXFE_Pos) /*!< 0x04000000 */ #define USB_OTG_GINTSTS_PTXFE USB_OTG_GINTSTS_PTXFE_Msk /*!< Periodic TxFIFO empty */ -#define USB_OTG_GINTSTS_CIDSCHG_Pos (28U) +#define USB_OTG_GINTSTS_CIDSCHG_Pos (28U) #define USB_OTG_GINTSTS_CIDSCHG_Msk (0x1UL << USB_OTG_GINTSTS_CIDSCHG_Pos) /*!< 0x10000000 */ #define USB_OTG_GINTSTS_CIDSCHG USB_OTG_GINTSTS_CIDSCHG_Msk /*!< Connector ID status change */ -#define USB_OTG_GINTSTS_DISCINT_Pos (29U) +#define USB_OTG_GINTSTS_DISCINT_Pos (29U) #define USB_OTG_GINTSTS_DISCINT_Msk (0x1UL << USB_OTG_GINTSTS_DISCINT_Pos) /*!< 0x20000000 */ #define USB_OTG_GINTSTS_DISCINT USB_OTG_GINTSTS_DISCINT_Msk /*!< Disconnect detected interrupt */ -#define USB_OTG_GINTSTS_SRQINT_Pos (30U) +#define USB_OTG_GINTSTS_SRQINT_Pos (30U) #define USB_OTG_GINTSTS_SRQINT_Msk (0x1UL << USB_OTG_GINTSTS_SRQINT_Pos) /*!< 0x40000000 */ #define USB_OTG_GINTSTS_SRQINT USB_OTG_GINTSTS_SRQINT_Msk /*!< Session request/new session detected interrupt */ -#define USB_OTG_GINTSTS_WKUINT_Pos (31U) +#define USB_OTG_GINTSTS_WKUINT_Pos (31U) #define USB_OTG_GINTSTS_WKUINT_Msk (0x1UL << USB_OTG_GINTSTS_WKUINT_Pos) /*!< 0x80000000 */ #define USB_OTG_GINTSTS_WKUINT USB_OTG_GINTSTS_WKUINT_Msk /*!< Resume/remote wakeup detected interrupt */ /******************** Bit definition for USB_OTG_GINTMSK register ********************/ -#define USB_OTG_GINTMSK_MMISM_Pos (1U) +#define USB_OTG_GINTMSK_MMISM_Pos (1U) #define USB_OTG_GINTMSK_MMISM_Msk (0x1UL << USB_OTG_GINTMSK_MMISM_Pos) /*!< 0x00000002 */ #define USB_OTG_GINTMSK_MMISM USB_OTG_GINTMSK_MMISM_Msk /*!< Mode mismatch interrupt mask */ -#define USB_OTG_GINTMSK_OTGINT_Pos (2U) +#define USB_OTG_GINTMSK_OTGINT_Pos (2U) #define USB_OTG_GINTMSK_OTGINT_Msk (0x1UL << USB_OTG_GINTMSK_OTGINT_Pos) /*!< 0x00000004 */ #define USB_OTG_GINTMSK_OTGINT USB_OTG_GINTMSK_OTGINT_Msk /*!< OTG interrupt mask */ -#define USB_OTG_GINTMSK_SOFM_Pos (3U) +#define USB_OTG_GINTMSK_SOFM_Pos (3U) #define USB_OTG_GINTMSK_SOFM_Msk (0x1UL << USB_OTG_GINTMSK_SOFM_Pos) /*!< 0x00000008 */ #define USB_OTG_GINTMSK_SOFM USB_OTG_GINTMSK_SOFM_Msk /*!< Start of frame mask */ -#define USB_OTG_GINTMSK_RXFLVLM_Pos (4U) +#define USB_OTG_GINTMSK_RXFLVLM_Pos (4U) #define USB_OTG_GINTMSK_RXFLVLM_Msk (0x1UL << USB_OTG_GINTMSK_RXFLVLM_Pos) /*!< 0x00000010 */ #define USB_OTG_GINTMSK_RXFLVLM USB_OTG_GINTMSK_RXFLVLM_Msk /*!< Receive FIFO nonempty mask */ -#define USB_OTG_GINTMSK_NPTXFEM_Pos (5U) +#define USB_OTG_GINTMSK_NPTXFEM_Pos (5U) #define USB_OTG_GINTMSK_NPTXFEM_Msk (0x1UL << USB_OTG_GINTMSK_NPTXFEM_Pos) /*!< 0x00000020 */ #define USB_OTG_GINTMSK_NPTXFEM USB_OTG_GINTMSK_NPTXFEM_Msk /*!< Nonperiodic TxFIFO empty mask */ -#define USB_OTG_GINTMSK_GINAKEFFM_Pos (6U) +#define USB_OTG_GINTMSK_GINAKEFFM_Pos (6U) #define USB_OTG_GINTMSK_GINAKEFFM_Msk (0x1UL << USB_OTG_GINTMSK_GINAKEFFM_Pos) /*!< 0x00000040 */ #define USB_OTG_GINTMSK_GINAKEFFM USB_OTG_GINTMSK_GINAKEFFM_Msk /*!< Global nonperiodic IN NAK effective mask */ -#define USB_OTG_GINTMSK_GONAKEFFM_Pos (7U) +#define USB_OTG_GINTMSK_GONAKEFFM_Pos (7U) #define USB_OTG_GINTMSK_GONAKEFFM_Msk (0x1UL << USB_OTG_GINTMSK_GONAKEFFM_Pos) /*!< 0x00000080 */ #define USB_OTG_GINTMSK_GONAKEFFM USB_OTG_GINTMSK_GONAKEFFM_Msk /*!< Global OUT NAK effective mask */ -#define USB_OTG_GINTMSK_ESUSPM_Pos (10U) +#define USB_OTG_GINTMSK_ESUSPM_Pos (10U) #define USB_OTG_GINTMSK_ESUSPM_Msk (0x1UL << USB_OTG_GINTMSK_ESUSPM_Pos) /*!< 0x00000400 */ #define USB_OTG_GINTMSK_ESUSPM USB_OTG_GINTMSK_ESUSPM_Msk /*!< Early suspend mask */ -#define USB_OTG_GINTMSK_USBSUSPM_Pos (11U) +#define USB_OTG_GINTMSK_USBSUSPM_Pos (11U) #define USB_OTG_GINTMSK_USBSUSPM_Msk (0x1UL << USB_OTG_GINTMSK_USBSUSPM_Pos) /*!< 0x00000800 */ #define USB_OTG_GINTMSK_USBSUSPM USB_OTG_GINTMSK_USBSUSPM_Msk /*!< USB suspend mask */ -#define USB_OTG_GINTMSK_USBRST_Pos (12U) +#define USB_OTG_GINTMSK_USBRST_Pos (12U) #define USB_OTG_GINTMSK_USBRST_Msk (0x1UL << USB_OTG_GINTMSK_USBRST_Pos) /*!< 0x00001000 */ #define USB_OTG_GINTMSK_USBRST USB_OTG_GINTMSK_USBRST_Msk /*!< USB reset mask */ -#define USB_OTG_GINTMSK_ENUMDNEM_Pos (13U) +#define USB_OTG_GINTMSK_ENUMDNEM_Pos (13U) #define USB_OTG_GINTMSK_ENUMDNEM_Msk (0x1UL << USB_OTG_GINTMSK_ENUMDNEM_Pos) /*!< 0x00002000 */ #define USB_OTG_GINTMSK_ENUMDNEM USB_OTG_GINTMSK_ENUMDNEM_Msk /*!< Enumeration done mask */ -#define USB_OTG_GINTMSK_ISOODRPM_Pos (14U) +#define USB_OTG_GINTMSK_ISOODRPM_Pos (14U) #define USB_OTG_GINTMSK_ISOODRPM_Msk (0x1UL << USB_OTG_GINTMSK_ISOODRPM_Pos) /*!< 0x00004000 */ #define USB_OTG_GINTMSK_ISOODRPM USB_OTG_GINTMSK_ISOODRPM_Msk /*!< Isochronous OUT packet dropped interrupt mask */ -#define USB_OTG_GINTMSK_EOPFM_Pos (15U) +#define USB_OTG_GINTMSK_EOPFM_Pos (15U) #define USB_OTG_GINTMSK_EOPFM_Msk (0x1UL << USB_OTG_GINTMSK_EOPFM_Pos) /*!< 0x00008000 */ #define USB_OTG_GINTMSK_EOPFM USB_OTG_GINTMSK_EOPFM_Msk /*!< End of periodic frame interrupt mask */ -#define USB_OTG_GINTMSK_EPMISM_Pos (17U) +#define USB_OTG_GINTMSK_EPMISM_Pos (17U) #define USB_OTG_GINTMSK_EPMISM_Msk (0x1UL << USB_OTG_GINTMSK_EPMISM_Pos) /*!< 0x00020000 */ #define USB_OTG_GINTMSK_EPMISM USB_OTG_GINTMSK_EPMISM_Msk /*!< Endpoint mismatch interrupt mask */ -#define USB_OTG_GINTMSK_IEPINT_Pos (18U) +#define USB_OTG_GINTMSK_IEPINT_Pos (18U) #define USB_OTG_GINTMSK_IEPINT_Msk (0x1UL << USB_OTG_GINTMSK_IEPINT_Pos) /*!< 0x00040000 */ #define USB_OTG_GINTMSK_IEPINT USB_OTG_GINTMSK_IEPINT_Msk /*!< IN endpoints interrupt mask */ -#define USB_OTG_GINTMSK_OEPINT_Pos (19U) +#define USB_OTG_GINTMSK_OEPINT_Pos (19U) #define USB_OTG_GINTMSK_OEPINT_Msk (0x1UL << USB_OTG_GINTMSK_OEPINT_Pos) /*!< 0x00080000 */ #define USB_OTG_GINTMSK_OEPINT USB_OTG_GINTMSK_OEPINT_Msk /*!< OUT endpoints interrupt mask */ -#define USB_OTG_GINTMSK_IISOIXFRM_Pos (20U) +#define USB_OTG_GINTMSK_IISOIXFRM_Pos (20U) #define USB_OTG_GINTMSK_IISOIXFRM_Msk (0x1UL << USB_OTG_GINTMSK_IISOIXFRM_Pos) /*!< 0x00100000 */ #define USB_OTG_GINTMSK_IISOIXFRM USB_OTG_GINTMSK_IISOIXFRM_Msk /*!< Incomplete isochronous IN transfer mask */ -#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos (21U) +#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos (21U) #define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk (0x1UL << USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos) /*!< 0x00200000 */ #define USB_OTG_GINTMSK_PXFRM_IISOOXFRM USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk /*!< Incomplete periodic transfer mask */ -#define USB_OTG_GINTMSK_FSUSPM_Pos (22U) +#define USB_OTG_GINTMSK_FSUSPM_Pos (22U) #define USB_OTG_GINTMSK_FSUSPM_Msk (0x1UL << USB_OTG_GINTMSK_FSUSPM_Pos) /*!< 0x00400000 */ #define USB_OTG_GINTMSK_FSUSPM USB_OTG_GINTMSK_FSUSPM_Msk /*!< Data fetch suspended mask */ -#define USB_OTG_GINTMSK_PRTIM_Pos (24U) +#define USB_OTG_GINTMSK_PRTIM_Pos (24U) #define USB_OTG_GINTMSK_PRTIM_Msk (0x1UL << USB_OTG_GINTMSK_PRTIM_Pos) /*!< 0x01000000 */ #define USB_OTG_GINTMSK_PRTIM USB_OTG_GINTMSK_PRTIM_Msk /*!< Host port interrupt mask */ -#define USB_OTG_GINTMSK_HCIM_Pos (25U) +#define USB_OTG_GINTMSK_HCIM_Pos (25U) #define USB_OTG_GINTMSK_HCIM_Msk (0x1UL << USB_OTG_GINTMSK_HCIM_Pos) /*!< 0x02000000 */ #define USB_OTG_GINTMSK_HCIM USB_OTG_GINTMSK_HCIM_Msk /*!< Host channels interrupt mask */ -#define USB_OTG_GINTMSK_PTXFEM_Pos (26U) +#define USB_OTG_GINTMSK_PTXFEM_Pos (26U) #define USB_OTG_GINTMSK_PTXFEM_Msk (0x1UL << USB_OTG_GINTMSK_PTXFEM_Pos) /*!< 0x04000000 */ #define USB_OTG_GINTMSK_PTXFEM USB_OTG_GINTMSK_PTXFEM_Msk /*!< Periodic TxFIFO empty mask */ -#define USB_OTG_GINTMSK_CIDSCHGM_Pos (28U) +#define USB_OTG_GINTMSK_CIDSCHGM_Pos (28U) #define USB_OTG_GINTMSK_CIDSCHGM_Msk (0x1UL << USB_OTG_GINTMSK_CIDSCHGM_Pos) /*!< 0x10000000 */ #define USB_OTG_GINTMSK_CIDSCHGM USB_OTG_GINTMSK_CIDSCHGM_Msk /*!< Connector ID status change mask */ -#define USB_OTG_GINTMSK_DISCINT_Pos (29U) +#define USB_OTG_GINTMSK_DISCINT_Pos (29U) #define USB_OTG_GINTMSK_DISCINT_Msk (0x1UL << USB_OTG_GINTMSK_DISCINT_Pos) /*!< 0x20000000 */ #define USB_OTG_GINTMSK_DISCINT USB_OTG_GINTMSK_DISCINT_Msk /*!< Disconnect detected interrupt mask */ -#define USB_OTG_GINTMSK_SRQIM_Pos (30U) +#define USB_OTG_GINTMSK_SRQIM_Pos (30U) #define USB_OTG_GINTMSK_SRQIM_Msk (0x1UL << USB_OTG_GINTMSK_SRQIM_Pos) /*!< 0x40000000 */ #define USB_OTG_GINTMSK_SRQIM USB_OTG_GINTMSK_SRQIM_Msk /*!< Session request/new session detected interrupt mask */ -#define USB_OTG_GINTMSK_WUIM_Pos (31U) +#define USB_OTG_GINTMSK_WUIM_Pos (31U) #define USB_OTG_GINTMSK_WUIM_Msk (0x1UL << USB_OTG_GINTMSK_WUIM_Pos) /*!< 0x80000000 */ #define USB_OTG_GINTMSK_WUIM USB_OTG_GINTMSK_WUIM_Msk /*!< Resume/remote wakeup detected interrupt mask */ /******************** Bit definition for USB_OTG_DAINT register ********************/ -#define USB_OTG_DAINT_IEPINT_Pos (0U) +#define USB_OTG_DAINT_IEPINT_Pos (0U) #define USB_OTG_DAINT_IEPINT_Msk (0xFFFFUL << USB_OTG_DAINT_IEPINT_Pos) /*!< 0x0000FFFF */ #define USB_OTG_DAINT_IEPINT USB_OTG_DAINT_IEPINT_Msk /*!< IN endpoint interrupt bits */ -#define USB_OTG_DAINT_OEPINT_Pos (16U) +#define USB_OTG_DAINT_OEPINT_Pos (16U) #define USB_OTG_DAINT_OEPINT_Msk (0xFFFFUL << USB_OTG_DAINT_OEPINT_Pos) /*!< 0xFFFF0000 */ #define USB_OTG_DAINT_OEPINT USB_OTG_DAINT_OEPINT_Msk /*!< OUT endpoint interrupt bits */ /******************** Bit definition for USB_OTG_HAINTMSK register ********************/ -#define USB_OTG_HAINTMSK_HAINTM_Pos (0U) +#define USB_OTG_HAINTMSK_HAINTM_Pos (0U) #define USB_OTG_HAINTMSK_HAINTM_Msk (0xFFFFUL << USB_OTG_HAINTMSK_HAINTM_Pos) /*!< 0x0000FFFF */ #define USB_OTG_HAINTMSK_HAINTM USB_OTG_HAINTMSK_HAINTM_Msk /*!< Channel interrupt mask */ /******************** Bit definition for USB_OTG_GRXSTSP register ********************/ -#define USB_OTG_GRXSTSP_EPNUM_Pos (0U) +#define USB_OTG_GRXSTSP_EPNUM_Pos (0U) #define USB_OTG_GRXSTSP_EPNUM_Msk (0xFUL << USB_OTG_GRXSTSP_EPNUM_Pos) /*!< 0x0000000F */ #define USB_OTG_GRXSTSP_EPNUM USB_OTG_GRXSTSP_EPNUM_Msk /*!< IN EP interrupt mask bits */ -#define USB_OTG_GRXSTSP_BCNT_Pos (4U) +#define USB_OTG_GRXSTSP_BCNT_Pos (4U) #define USB_OTG_GRXSTSP_BCNT_Msk (0x7FFUL << USB_OTG_GRXSTSP_BCNT_Pos) /*!< 0x00007FF0 */ #define USB_OTG_GRXSTSP_BCNT USB_OTG_GRXSTSP_BCNT_Msk /*!< OUT EP interrupt mask bits */ -#define USB_OTG_GRXSTSP_DPID_Pos (15U) +#define USB_OTG_GRXSTSP_DPID_Pos (15U) #define USB_OTG_GRXSTSP_DPID_Msk (0x3UL << USB_OTG_GRXSTSP_DPID_Pos) /*!< 0x00018000 */ #define USB_OTG_GRXSTSP_DPID USB_OTG_GRXSTSP_DPID_Msk /*!< OUT EP interrupt mask bits */ -#define USB_OTG_GRXSTSP_PKTSTS_Pos (17U) +#define USB_OTG_GRXSTSP_PKTSTS_Pos (17U) #define USB_OTG_GRXSTSP_PKTSTS_Msk (0xFUL << USB_OTG_GRXSTSP_PKTSTS_Pos) /*!< 0x001E0000 */ #define USB_OTG_GRXSTSP_PKTSTS USB_OTG_GRXSTSP_PKTSTS_Msk /*!< OUT EP interrupt mask bits */ /******************** Bit definition for USB_OTG_DAINTMSK register ********************/ -#define USB_OTG_DAINTMSK_IEPM_Pos (0U) +#define USB_OTG_DAINTMSK_IEPM_Pos (0U) #define USB_OTG_DAINTMSK_IEPM_Msk (0xFFFFUL << USB_OTG_DAINTMSK_IEPM_Pos) /*!< 0x0000FFFF */ #define USB_OTG_DAINTMSK_IEPM USB_OTG_DAINTMSK_IEPM_Msk /*!< IN EP interrupt mask bits */ -#define USB_OTG_DAINTMSK_OEPM_Pos (16U) +#define USB_OTG_DAINTMSK_OEPM_Pos (16U) #define USB_OTG_DAINTMSK_OEPM_Msk (0xFFFFUL << USB_OTG_DAINTMSK_OEPM_Pos) /*!< 0xFFFF0000 */ #define USB_OTG_DAINTMSK_OEPM USB_OTG_DAINTMSK_OEPM_Msk /*!< OUT EP interrupt mask bits */ /******************** Bit definition for USB_OTG_GRXFSIZ register ********************/ -#define USB_OTG_GRXFSIZ_RXFD_Pos (0U) +#define USB_OTG_GRXFSIZ_RXFD_Pos (0U) #define USB_OTG_GRXFSIZ_RXFD_Msk (0xFFFFUL << USB_OTG_GRXFSIZ_RXFD_Pos) /*!< 0x0000FFFF */ #define USB_OTG_GRXFSIZ_RXFD USB_OTG_GRXFSIZ_RXFD_Msk /*!< RxFIFO depth */ /******************** Bit definition for USB_OTG_DVBUSDIS register ********************/ -#define USB_OTG_DVBUSDIS_VBUSDT_Pos (0U) +#define USB_OTG_DVBUSDIS_VBUSDT_Pos (0U) #define USB_OTG_DVBUSDIS_VBUSDT_Msk (0xFFFFUL << USB_OTG_DVBUSDIS_VBUSDT_Pos) /*!< 0x0000FFFF */ #define USB_OTG_DVBUSDIS_VBUSDT USB_OTG_DVBUSDIS_VBUSDT_Msk /*!< Device VBUS discharge time */ /******************** Bit definition for OTG register ********************/ -#define USB_OTG_NPTXFSA_Pos (0U) +#define USB_OTG_NPTXFSA_Pos (0U) #define USB_OTG_NPTXFSA_Msk (0xFFFFUL << USB_OTG_NPTXFSA_Pos) /*!< 0x0000FFFF */ #define USB_OTG_NPTXFSA USB_OTG_NPTXFSA_Msk /*!< Nonperiodic transmit RAM start address */ -#define USB_OTG_NPTXFD_Pos (16U) +#define USB_OTG_NPTXFD_Pos (16U) #define USB_OTG_NPTXFD_Msk (0xFFFFUL << USB_OTG_NPTXFD_Pos) /*!< 0xFFFF0000 */ #define USB_OTG_NPTXFD USB_OTG_NPTXFD_Msk /*!< Nonperiodic TxFIFO depth */ -#define USB_OTG_TX0FSA_Pos (0U) +#define USB_OTG_TX0FSA_Pos (0U) #define USB_OTG_TX0FSA_Msk (0xFFFFUL << USB_OTG_TX0FSA_Pos) /*!< 0x0000FFFF */ #define USB_OTG_TX0FSA USB_OTG_TX0FSA_Msk /*!< Endpoint 0 transmit RAM start address */ -#define USB_OTG_TX0FD_Pos (16U) +#define USB_OTG_TX0FD_Pos (16U) #define USB_OTG_TX0FD_Msk (0xFFFFUL << USB_OTG_TX0FD_Pos) /*!< 0xFFFF0000 */ #define USB_OTG_TX0FD USB_OTG_TX0FD_Msk /*!< Endpoint 0 TxFIFO depth */ /******************** Bit definition for USB_OTG_DVBUSPULSE register ********************/ -#define USB_OTG_DVBUSPULSE_DVBUSP_Pos (0U) +#define USB_OTG_DVBUSPULSE_DVBUSP_Pos (0U) #define USB_OTG_DVBUSPULSE_DVBUSP_Msk (0xFFFUL << USB_OTG_DVBUSPULSE_DVBUSP_Pos) /*!< 0x00000FFF */ #define USB_OTG_DVBUSPULSE_DVBUSP USB_OTG_DVBUSPULSE_DVBUSP_Msk /*!< Device VBUS pulsing time */ /******************** Bit definition for USB_OTG_GNPTXSTS register ********************/ -#define USB_OTG_GNPTXSTS_NPTXFSAV_Pos (0U) +#define USB_OTG_GNPTXSTS_NPTXFSAV_Pos (0U) #define USB_OTG_GNPTXSTS_NPTXFSAV_Msk (0xFFFFUL << USB_OTG_GNPTXSTS_NPTXFSAV_Pos) /*!< 0x0000FFFF */ #define USB_OTG_GNPTXSTS_NPTXFSAV USB_OTG_GNPTXSTS_NPTXFSAV_Msk /*!< Nonperiodic TxFIFO space available */ -#define USB_OTG_GNPTXSTS_NPTQXSAV_Pos (16U) +#define USB_OTG_GNPTXSTS_NPTQXSAV_Pos (16U) #define USB_OTG_GNPTXSTS_NPTQXSAV_Msk (0xFFUL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00FF0000 */ #define USB_OTG_GNPTXSTS_NPTQXSAV USB_OTG_GNPTXSTS_NPTQXSAV_Msk /*!< Nonperiodic transmit request queue space available */ #define USB_OTG_GNPTXSTS_NPTQXSAV_0 (0x01UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00010000 */ @@ -806,7 +806,7 @@ typedef struct #define USB_OTG_GNPTXSTS_NPTQXSAV_6 (0x40UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00400000 */ #define USB_OTG_GNPTXSTS_NPTQXSAV_7 (0x80UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00800000 */ -#define USB_OTG_GNPTXSTS_NPTXQTOP_Pos (24U) +#define USB_OTG_GNPTXSTS_NPTXQTOP_Pos (24U) #define USB_OTG_GNPTXSTS_NPTXQTOP_Msk (0x7FUL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x7F000000 */ #define USB_OTG_GNPTXSTS_NPTXQTOP USB_OTG_GNPTXSTS_NPTXQTOP_Msk /*!< Top of the nonperiodic transmit request queue */ #define USB_OTG_GNPTXSTS_NPTXQTOP_0 (0x01UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x01000000 */ @@ -818,14 +818,14 @@ typedef struct #define USB_OTG_GNPTXSTS_NPTXQTOP_6 (0x40UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x40000000 */ /******************** Bit definition for USB_OTG_DTHRCTL register ********************/ -#define USB_OTG_DTHRCTL_NONISOTHREN_Pos (0U) +#define USB_OTG_DTHRCTL_NONISOTHREN_Pos (0U) #define USB_OTG_DTHRCTL_NONISOTHREN_Msk (0x1UL << USB_OTG_DTHRCTL_NONISOTHREN_Pos) /*!< 0x00000001 */ #define USB_OTG_DTHRCTL_NONISOTHREN USB_OTG_DTHRCTL_NONISOTHREN_Msk /*!< Nonisochronous IN endpoints threshold enable */ -#define USB_OTG_DTHRCTL_ISOTHREN_Pos (1U) +#define USB_OTG_DTHRCTL_ISOTHREN_Pos (1U) #define USB_OTG_DTHRCTL_ISOTHREN_Msk (0x1UL << USB_OTG_DTHRCTL_ISOTHREN_Pos) /*!< 0x00000002 */ #define USB_OTG_DTHRCTL_ISOTHREN USB_OTG_DTHRCTL_ISOTHREN_Msk /*!< ISO IN endpoint threshold enable */ -#define USB_OTG_DTHRCTL_TXTHRLEN_Pos (2U) +#define USB_OTG_DTHRCTL_TXTHRLEN_Pos (2U) #define USB_OTG_DTHRCTL_TXTHRLEN_Msk (0x1FFUL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x000007FC */ #define USB_OTG_DTHRCTL_TXTHRLEN USB_OTG_DTHRCTL_TXTHRLEN_Msk /*!< Transmit threshold length */ #define USB_OTG_DTHRCTL_TXTHRLEN_0 (0x001UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000004 */ @@ -837,11 +837,11 @@ typedef struct #define USB_OTG_DTHRCTL_TXTHRLEN_6 (0x040UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000100 */ #define USB_OTG_DTHRCTL_TXTHRLEN_7 (0x080UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000200 */ #define USB_OTG_DTHRCTL_TXTHRLEN_8 (0x100UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000400 */ -#define USB_OTG_DTHRCTL_RXTHREN_Pos (16U) +#define USB_OTG_DTHRCTL_RXTHREN_Pos (16U) #define USB_OTG_DTHRCTL_RXTHREN_Msk (0x1UL << USB_OTG_DTHRCTL_RXTHREN_Pos) /*!< 0x00010000 */ #define USB_OTG_DTHRCTL_RXTHREN USB_OTG_DTHRCTL_RXTHREN_Msk /*!< Receive threshold enable */ -#define USB_OTG_DTHRCTL_RXTHRLEN_Pos (17U) +#define USB_OTG_DTHRCTL_RXTHRLEN_Pos (17U) #define USB_OTG_DTHRCTL_RXTHRLEN_Msk (0x1FFUL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x03FE0000 */ #define USB_OTG_DTHRCTL_RXTHRLEN USB_OTG_DTHRCTL_RXTHRLEN_Msk /*!< Receive threshold length */ #define USB_OTG_DTHRCTL_RXTHRLEN_0 (0x001UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00020000 */ @@ -853,118 +853,118 @@ typedef struct #define USB_OTG_DTHRCTL_RXTHRLEN_6 (0x040UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00800000 */ #define USB_OTG_DTHRCTL_RXTHRLEN_7 (0x080UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x01000000 */ #define USB_OTG_DTHRCTL_RXTHRLEN_8 (0x100UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x02000000 */ -#define USB_OTG_DTHRCTL_ARPEN_Pos (27U) +#define USB_OTG_DTHRCTL_ARPEN_Pos (27U) #define USB_OTG_DTHRCTL_ARPEN_Msk (0x1UL << USB_OTG_DTHRCTL_ARPEN_Pos) /*!< 0x08000000 */ #define USB_OTG_DTHRCTL_ARPEN USB_OTG_DTHRCTL_ARPEN_Msk /*!< Arbiter parking enable */ /******************** Bit definition for USB_OTG_DIEPEMPMSK register ********************/ -#define USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos (0U) +#define USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos (0U) #define USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk (0xFFFFUL << USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos) /*!< 0x0000FFFF */ #define USB_OTG_DIEPEMPMSK_INEPTXFEM USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk /*!< IN EP Tx FIFO empty interrupt mask bits */ /******************** Bit definition for USB_OTG_DEACHINT register ********************/ -#define USB_OTG_DEACHINT_IEP1INT_Pos (1U) +#define USB_OTG_DEACHINT_IEP1INT_Pos (1U) #define USB_OTG_DEACHINT_IEP1INT_Msk (0x1UL << USB_OTG_DEACHINT_IEP1INT_Pos) /*!< 0x00000002 */ #define USB_OTG_DEACHINT_IEP1INT USB_OTG_DEACHINT_IEP1INT_Msk /*!< IN endpoint 1interrupt bit */ -#define USB_OTG_DEACHINT_OEP1INT_Pos (17U) +#define USB_OTG_DEACHINT_OEP1INT_Pos (17U) #define USB_OTG_DEACHINT_OEP1INT_Msk (0x1UL << USB_OTG_DEACHINT_OEP1INT_Pos) /*!< 0x00020000 */ #define USB_OTG_DEACHINT_OEP1INT USB_OTG_DEACHINT_OEP1INT_Msk /*!< OUT endpoint 1 interrupt bit */ /******************** Bit definition for USB_OTG_GCCFG register ********************/ -#define USB_OTG_GCCFG_PWRDWN_Pos (16U) +#define USB_OTG_GCCFG_PWRDWN_Pos (16U) #define USB_OTG_GCCFG_PWRDWN_Msk (0x1UL << USB_OTG_GCCFG_PWRDWN_Pos) /*!< 0x00010000 */ #define USB_OTG_GCCFG_PWRDWN USB_OTG_GCCFG_PWRDWN_Msk /*!< Power down */ -#define USB_OTG_GCCFG_VBUSASEN_Pos (18U) +#define USB_OTG_GCCFG_VBUSASEN_Pos (18U) #define USB_OTG_GCCFG_VBUSASEN_Msk (0x1UL << USB_OTG_GCCFG_VBUSASEN_Pos) /*!< 0x00040000 */ #define USB_OTG_GCCFG_VBUSASEN USB_OTG_GCCFG_VBUSASEN_Msk /*!< Enable the VBUS sensing device */ -#define USB_OTG_GCCFG_VBUSBSEN_Pos (19U) +#define USB_OTG_GCCFG_VBUSBSEN_Pos (19U) #define USB_OTG_GCCFG_VBUSBSEN_Msk (0x1UL << USB_OTG_GCCFG_VBUSBSEN_Pos) /*!< 0x00080000 */ #define USB_OTG_GCCFG_VBUSBSEN USB_OTG_GCCFG_VBUSBSEN_Msk /*!< Enable the VBUS sensing device */ -#define USB_OTG_GCCFG_SOFOUTEN_Pos (20U) +#define USB_OTG_GCCFG_SOFOUTEN_Pos (20U) #define USB_OTG_GCCFG_SOFOUTEN_Msk (0x1UL << USB_OTG_GCCFG_SOFOUTEN_Pos) /*!< 0x00100000 */ #define USB_OTG_GCCFG_SOFOUTEN USB_OTG_GCCFG_SOFOUTEN_Msk /*!< SOF output enable */ /******************** Bit definition for USB_OTG_DEACHINTMSK register ********************/ -#define USB_OTG_DEACHINTMSK_IEP1INTM_Pos (1U) +#define USB_OTG_DEACHINTMSK_IEP1INTM_Pos (1U) #define USB_OTG_DEACHINTMSK_IEP1INTM_Msk (0x1UL << USB_OTG_DEACHINTMSK_IEP1INTM_Pos) /*!< 0x00000002 */ #define USB_OTG_DEACHINTMSK_IEP1INTM USB_OTG_DEACHINTMSK_IEP1INTM_Msk /*!< IN Endpoint 1 interrupt mask bit */ -#define USB_OTG_DEACHINTMSK_OEP1INTM_Pos (17U) +#define USB_OTG_DEACHINTMSK_OEP1INTM_Pos (17U) #define USB_OTG_DEACHINTMSK_OEP1INTM_Msk (0x1UL << USB_OTG_DEACHINTMSK_OEP1INTM_Pos) /*!< 0x00020000 */ #define USB_OTG_DEACHINTMSK_OEP1INTM USB_OTG_DEACHINTMSK_OEP1INTM_Msk /*!< OUT Endpoint 1 interrupt mask bit */ /******************** Bit definition for USB_OTG_CID register ********************/ -#define USB_OTG_CID_PRODUCT_ID_Pos (0U) +#define USB_OTG_CID_PRODUCT_ID_Pos (0U) #define USB_OTG_CID_PRODUCT_ID_Msk (0xFFFFFFFFUL << USB_OTG_CID_PRODUCT_ID_Pos) /*!< 0xFFFFFFFF */ #define USB_OTG_CID_PRODUCT_ID USB_OTG_CID_PRODUCT_ID_Msk /*!< Product ID field */ /******************** Bit definition for USB_OTG_DIEPEACHMSK1 register ********************/ -#define USB_OTG_DIEPEACHMSK1_XFRCM_Pos (0U) +#define USB_OTG_DIEPEACHMSK1_XFRCM_Pos (0U) #define USB_OTG_DIEPEACHMSK1_XFRCM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_XFRCM_Pos) /*!< 0x00000001 */ #define USB_OTG_DIEPEACHMSK1_XFRCM USB_OTG_DIEPEACHMSK1_XFRCM_Msk /*!< Transfer completed interrupt mask */ -#define USB_OTG_DIEPEACHMSK1_EPDM_Pos (1U) +#define USB_OTG_DIEPEACHMSK1_EPDM_Pos (1U) #define USB_OTG_DIEPEACHMSK1_EPDM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_EPDM_Pos) /*!< 0x00000002 */ #define USB_OTG_DIEPEACHMSK1_EPDM USB_OTG_DIEPEACHMSK1_EPDM_Msk /*!< Endpoint disabled interrupt mask */ -#define USB_OTG_DIEPEACHMSK1_TOM_Pos (3U) +#define USB_OTG_DIEPEACHMSK1_TOM_Pos (3U) #define USB_OTG_DIEPEACHMSK1_TOM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_TOM_Pos) /*!< 0x00000008 */ #define USB_OTG_DIEPEACHMSK1_TOM USB_OTG_DIEPEACHMSK1_TOM_Msk /*!< Timeout condition mask (nonisochronous endpoints) */ -#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos (4U) +#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos (4U) #define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos) /*!< 0x00000010 */ #define USB_OTG_DIEPEACHMSK1_ITTXFEMSK USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */ -#define USB_OTG_DIEPEACHMSK1_INEPNMM_Pos (5U) +#define USB_OTG_DIEPEACHMSK1_INEPNMM_Pos (5U) #define USB_OTG_DIEPEACHMSK1_INEPNMM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_INEPNMM_Pos) /*!< 0x00000020 */ #define USB_OTG_DIEPEACHMSK1_INEPNMM USB_OTG_DIEPEACHMSK1_INEPNMM_Msk /*!< IN token received with EP mismatch mask */ -#define USB_OTG_DIEPEACHMSK1_INEPNEM_Pos (6U) +#define USB_OTG_DIEPEACHMSK1_INEPNEM_Pos (6U) #define USB_OTG_DIEPEACHMSK1_INEPNEM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_INEPNEM_Pos) /*!< 0x00000040 */ #define USB_OTG_DIEPEACHMSK1_INEPNEM USB_OTG_DIEPEACHMSK1_INEPNEM_Msk /*!< IN endpoint NAK effective mask */ -#define USB_OTG_DIEPEACHMSK1_TXFURM_Pos (8U) +#define USB_OTG_DIEPEACHMSK1_TXFURM_Pos (8U) #define USB_OTG_DIEPEACHMSK1_TXFURM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_TXFURM_Pos) /*!< 0x00000100 */ #define USB_OTG_DIEPEACHMSK1_TXFURM USB_OTG_DIEPEACHMSK1_TXFURM_Msk /*!< FIFO underrun mask */ -#define USB_OTG_DIEPEACHMSK1_BIM_Pos (9U) +#define USB_OTG_DIEPEACHMSK1_BIM_Pos (9U) #define USB_OTG_DIEPEACHMSK1_BIM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_BIM_Pos) /*!< 0x00000200 */ #define USB_OTG_DIEPEACHMSK1_BIM USB_OTG_DIEPEACHMSK1_BIM_Msk /*!< BNA interrupt mask */ -#define USB_OTG_DIEPEACHMSK1_NAKM_Pos (13U) +#define USB_OTG_DIEPEACHMSK1_NAKM_Pos (13U) #define USB_OTG_DIEPEACHMSK1_NAKM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_NAKM_Pos) /*!< 0x00002000 */ #define USB_OTG_DIEPEACHMSK1_NAKM USB_OTG_DIEPEACHMSK1_NAKM_Msk /*!< NAK interrupt mask */ /******************** Bit definition for USB_OTG_HPRT register ********************/ -#define USB_OTG_HPRT_PCSTS_Pos (0U) +#define USB_OTG_HPRT_PCSTS_Pos (0U) #define USB_OTG_HPRT_PCSTS_Msk (0x1UL << USB_OTG_HPRT_PCSTS_Pos) /*!< 0x00000001 */ #define USB_OTG_HPRT_PCSTS USB_OTG_HPRT_PCSTS_Msk /*!< Port connect status */ -#define USB_OTG_HPRT_PCDET_Pos (1U) +#define USB_OTG_HPRT_PCDET_Pos (1U) #define USB_OTG_HPRT_PCDET_Msk (0x1UL << USB_OTG_HPRT_PCDET_Pos) /*!< 0x00000002 */ #define USB_OTG_HPRT_PCDET USB_OTG_HPRT_PCDET_Msk /*!< Port connect detected */ -#define USB_OTG_HPRT_PENA_Pos (2U) +#define USB_OTG_HPRT_PENA_Pos (2U) #define USB_OTG_HPRT_PENA_Msk (0x1UL << USB_OTG_HPRT_PENA_Pos) /*!< 0x00000004 */ #define USB_OTG_HPRT_PENA USB_OTG_HPRT_PENA_Msk /*!< Port enable */ -#define USB_OTG_HPRT_PENCHNG_Pos (3U) +#define USB_OTG_HPRT_PENCHNG_Pos (3U) #define USB_OTG_HPRT_PENCHNG_Msk (0x1UL << USB_OTG_HPRT_PENCHNG_Pos) /*!< 0x00000008 */ #define USB_OTG_HPRT_PENCHNG USB_OTG_HPRT_PENCHNG_Msk /*!< Port enable/disable change */ -#define USB_OTG_HPRT_POCA_Pos (4U) +#define USB_OTG_HPRT_POCA_Pos (4U) #define USB_OTG_HPRT_POCA_Msk (0x1UL << USB_OTG_HPRT_POCA_Pos) /*!< 0x00000010 */ #define USB_OTG_HPRT_POCA USB_OTG_HPRT_POCA_Msk /*!< Port overcurrent active */ -#define USB_OTG_HPRT_POCCHNG_Pos (5U) +#define USB_OTG_HPRT_POCCHNG_Pos (5U) #define USB_OTG_HPRT_POCCHNG_Msk (0x1UL << USB_OTG_HPRT_POCCHNG_Pos) /*!< 0x00000020 */ #define USB_OTG_HPRT_POCCHNG USB_OTG_HPRT_POCCHNG_Msk /*!< Port overcurrent change */ -#define USB_OTG_HPRT_PRES_Pos (6U) +#define USB_OTG_HPRT_PRES_Pos (6U) #define USB_OTG_HPRT_PRES_Msk (0x1UL << USB_OTG_HPRT_PRES_Pos) /*!< 0x00000040 */ #define USB_OTG_HPRT_PRES USB_OTG_HPRT_PRES_Msk /*!< Port resume */ -#define USB_OTG_HPRT_PSUSP_Pos (7U) +#define USB_OTG_HPRT_PSUSP_Pos (7U) #define USB_OTG_HPRT_PSUSP_Msk (0x1UL << USB_OTG_HPRT_PSUSP_Pos) /*!< 0x00000080 */ #define USB_OTG_HPRT_PSUSP USB_OTG_HPRT_PSUSP_Msk /*!< Port suspend */ -#define USB_OTG_HPRT_PRST_Pos (8U) +#define USB_OTG_HPRT_PRST_Pos (8U) #define USB_OTG_HPRT_PRST_Msk (0x1UL << USB_OTG_HPRT_PRST_Pos) /*!< 0x00000100 */ #define USB_OTG_HPRT_PRST USB_OTG_HPRT_PRST_Msk /*!< Port reset */ -#define USB_OTG_HPRT_PLSTS_Pos (10U) +#define USB_OTG_HPRT_PLSTS_Pos (10U) #define USB_OTG_HPRT_PLSTS_Msk (0x3UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000C00 */ #define USB_OTG_HPRT_PLSTS USB_OTG_HPRT_PLSTS_Msk /*!< Port line status */ #define USB_OTG_HPRT_PLSTS_0 (0x1UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000400 */ #define USB_OTG_HPRT_PLSTS_1 (0x2UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000800 */ -#define USB_OTG_HPRT_PPWR_Pos (12U) +#define USB_OTG_HPRT_PPWR_Pos (12U) #define USB_OTG_HPRT_PPWR_Msk (0x1UL << USB_OTG_HPRT_PPWR_Pos) /*!< 0x00001000 */ #define USB_OTG_HPRT_PPWR USB_OTG_HPRT_PPWR_Msk /*!< Port power */ -#define USB_OTG_HPRT_PTCTL_Pos (13U) +#define USB_OTG_HPRT_PTCTL_Pos (13U) #define USB_OTG_HPRT_PTCTL_Msk (0xFUL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x0001E000 */ #define USB_OTG_HPRT_PTCTL USB_OTG_HPRT_PTCTL_Msk /*!< Port test control */ #define USB_OTG_HPRT_PTCTL_0 (0x1UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00002000 */ @@ -972,136 +972,136 @@ typedef struct #define USB_OTG_HPRT_PTCTL_2 (0x4UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00008000 */ #define USB_OTG_HPRT_PTCTL_3 (0x8UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00010000 */ -#define USB_OTG_HPRT_PSPD_Pos (17U) +#define USB_OTG_HPRT_PSPD_Pos (17U) #define USB_OTG_HPRT_PSPD_Msk (0x3UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00060000 */ #define USB_OTG_HPRT_PSPD USB_OTG_HPRT_PSPD_Msk /*!< Port speed */ #define USB_OTG_HPRT_PSPD_0 (0x1UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00020000 */ #define USB_OTG_HPRT_PSPD_1 (0x2UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00040000 */ /******************** Bit definition for USB_OTG_DOEPEACHMSK1 register ********************/ -#define USB_OTG_DOEPEACHMSK1_XFRCM_Pos (0U) +#define USB_OTG_DOEPEACHMSK1_XFRCM_Pos (0U) #define USB_OTG_DOEPEACHMSK1_XFRCM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_XFRCM_Pos) /*!< 0x00000001 */ #define USB_OTG_DOEPEACHMSK1_XFRCM USB_OTG_DOEPEACHMSK1_XFRCM_Msk /*!< Transfer completed interrupt mask */ -#define USB_OTG_DOEPEACHMSK1_EPDM_Pos (1U) +#define USB_OTG_DOEPEACHMSK1_EPDM_Pos (1U) #define USB_OTG_DOEPEACHMSK1_EPDM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_EPDM_Pos) /*!< 0x00000002 */ #define USB_OTG_DOEPEACHMSK1_EPDM USB_OTG_DOEPEACHMSK1_EPDM_Msk /*!< Endpoint disabled interrupt mask */ -#define USB_OTG_DOEPEACHMSK1_TOM_Pos (3U) +#define USB_OTG_DOEPEACHMSK1_TOM_Pos (3U) #define USB_OTG_DOEPEACHMSK1_TOM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_TOM_Pos) /*!< 0x00000008 */ #define USB_OTG_DOEPEACHMSK1_TOM USB_OTG_DOEPEACHMSK1_TOM_Msk /*!< Timeout condition mask */ -#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos (4U) +#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos (4U) #define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos) /*!< 0x00000010 */ #define USB_OTG_DOEPEACHMSK1_ITTXFEMSK USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */ -#define USB_OTG_DOEPEACHMSK1_INEPNMM_Pos (5U) +#define USB_OTG_DOEPEACHMSK1_INEPNMM_Pos (5U) #define USB_OTG_DOEPEACHMSK1_INEPNMM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_INEPNMM_Pos) /*!< 0x00000020 */ #define USB_OTG_DOEPEACHMSK1_INEPNMM USB_OTG_DOEPEACHMSK1_INEPNMM_Msk /*!< IN token received with EP mismatch mask */ -#define USB_OTG_DOEPEACHMSK1_INEPNEM_Pos (6U) +#define USB_OTG_DOEPEACHMSK1_INEPNEM_Pos (6U) #define USB_OTG_DOEPEACHMSK1_INEPNEM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_INEPNEM_Pos) /*!< 0x00000040 */ #define USB_OTG_DOEPEACHMSK1_INEPNEM USB_OTG_DOEPEACHMSK1_INEPNEM_Msk /*!< IN endpoint NAK effective mask */ -#define USB_OTG_DOEPEACHMSK1_TXFURM_Pos (8U) +#define USB_OTG_DOEPEACHMSK1_TXFURM_Pos (8U) #define USB_OTG_DOEPEACHMSK1_TXFURM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_TXFURM_Pos) /*!< 0x00000100 */ #define USB_OTG_DOEPEACHMSK1_TXFURM USB_OTG_DOEPEACHMSK1_TXFURM_Msk /*!< OUT packet error mask */ -#define USB_OTG_DOEPEACHMSK1_BIM_Pos (9U) +#define USB_OTG_DOEPEACHMSK1_BIM_Pos (9U) #define USB_OTG_DOEPEACHMSK1_BIM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_BIM_Pos) /*!< 0x00000200 */ #define USB_OTG_DOEPEACHMSK1_BIM USB_OTG_DOEPEACHMSK1_BIM_Msk /*!< BNA interrupt mask */ -#define USB_OTG_DOEPEACHMSK1_BERRM_Pos (12U) +#define USB_OTG_DOEPEACHMSK1_BERRM_Pos (12U) #define USB_OTG_DOEPEACHMSK1_BERRM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_BERRM_Pos) /*!< 0x00001000 */ #define USB_OTG_DOEPEACHMSK1_BERRM USB_OTG_DOEPEACHMSK1_BERRM_Msk /*!< Bubble error interrupt mask */ -#define USB_OTG_DOEPEACHMSK1_NAKM_Pos (13U) +#define USB_OTG_DOEPEACHMSK1_NAKM_Pos (13U) #define USB_OTG_DOEPEACHMSK1_NAKM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_NAKM_Pos) /*!< 0x00002000 */ #define USB_OTG_DOEPEACHMSK1_NAKM USB_OTG_DOEPEACHMSK1_NAKM_Msk /*!< NAK interrupt mask */ -#define USB_OTG_DOEPEACHMSK1_NYETM_Pos (14U) +#define USB_OTG_DOEPEACHMSK1_NYETM_Pos (14U) #define USB_OTG_DOEPEACHMSK1_NYETM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_NYETM_Pos) /*!< 0x00004000 */ #define USB_OTG_DOEPEACHMSK1_NYETM USB_OTG_DOEPEACHMSK1_NYETM_Msk /*!< NYET interrupt mask */ /******************** Bit definition for USB_OTG_HPTXFSIZ register ********************/ -#define USB_OTG_HPTXFSIZ_PTXSA_Pos (0U) +#define USB_OTG_HPTXFSIZ_PTXSA_Pos (0U) #define USB_OTG_HPTXFSIZ_PTXSA_Msk (0xFFFFUL << USB_OTG_HPTXFSIZ_PTXSA_Pos) /*!< 0x0000FFFF */ #define USB_OTG_HPTXFSIZ_PTXSA USB_OTG_HPTXFSIZ_PTXSA_Msk /*!< Host periodic TxFIFO start address */ -#define USB_OTG_HPTXFSIZ_PTXFD_Pos (16U) +#define USB_OTG_HPTXFSIZ_PTXFD_Pos (16U) #define USB_OTG_HPTXFSIZ_PTXFD_Msk (0xFFFFUL << USB_OTG_HPTXFSIZ_PTXFD_Pos) /*!< 0xFFFF0000 */ #define USB_OTG_HPTXFSIZ_PTXFD USB_OTG_HPTXFSIZ_PTXFD_Msk /*!< Host periodic TxFIFO depth */ /******************** Bit definition for USB_OTG_DIEPCTL register ********************/ -#define USB_OTG_DIEPCTL_MPSIZ_Pos (0U) +#define USB_OTG_DIEPCTL_MPSIZ_Pos (0U) #define USB_OTG_DIEPCTL_MPSIZ_Msk (0x7FFUL << USB_OTG_DIEPCTL_MPSIZ_Pos) /*!< 0x000007FF */ #define USB_OTG_DIEPCTL_MPSIZ USB_OTG_DIEPCTL_MPSIZ_Msk /*!< Maximum packet size */ -#define USB_OTG_DIEPCTL_USBAEP_Pos (15U) +#define USB_OTG_DIEPCTL_USBAEP_Pos (15U) #define USB_OTG_DIEPCTL_USBAEP_Msk (0x1UL << USB_OTG_DIEPCTL_USBAEP_Pos) /*!< 0x00008000 */ #define USB_OTG_DIEPCTL_USBAEP USB_OTG_DIEPCTL_USBAEP_Msk /*!< USB active endpoint */ -#define USB_OTG_DIEPCTL_EONUM_DPID_Pos (16U) +#define USB_OTG_DIEPCTL_EONUM_DPID_Pos (16U) #define USB_OTG_DIEPCTL_EONUM_DPID_Msk (0x1UL << USB_OTG_DIEPCTL_EONUM_DPID_Pos) /*!< 0x00010000 */ #define USB_OTG_DIEPCTL_EONUM_DPID USB_OTG_DIEPCTL_EONUM_DPID_Msk /*!< Even/odd frame */ -#define USB_OTG_DIEPCTL_NAKSTS_Pos (17U) +#define USB_OTG_DIEPCTL_NAKSTS_Pos (17U) #define USB_OTG_DIEPCTL_NAKSTS_Msk (0x1UL << USB_OTG_DIEPCTL_NAKSTS_Pos) /*!< 0x00020000 */ #define USB_OTG_DIEPCTL_NAKSTS USB_OTG_DIEPCTL_NAKSTS_Msk /*!< NAK status */ -#define USB_OTG_DIEPCTL_EPTYP_Pos (18U) +#define USB_OTG_DIEPCTL_EPTYP_Pos (18U) #define USB_OTG_DIEPCTL_EPTYP_Msk (0x3UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x000C0000 */ #define USB_OTG_DIEPCTL_EPTYP USB_OTG_DIEPCTL_EPTYP_Msk /*!< Endpoint type */ #define USB_OTG_DIEPCTL_EPTYP_0 (0x1UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x00040000 */ #define USB_OTG_DIEPCTL_EPTYP_1 (0x2UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x00080000 */ -#define USB_OTG_DIEPCTL_STALL_Pos (21U) +#define USB_OTG_DIEPCTL_STALL_Pos (21U) #define USB_OTG_DIEPCTL_STALL_Msk (0x1UL << USB_OTG_DIEPCTL_STALL_Pos) /*!< 0x00200000 */ #define USB_OTG_DIEPCTL_STALL USB_OTG_DIEPCTL_STALL_Msk /*!< STALL handshake */ -#define USB_OTG_DIEPCTL_TXFNUM_Pos (22U) +#define USB_OTG_DIEPCTL_TXFNUM_Pos (22U) #define USB_OTG_DIEPCTL_TXFNUM_Msk (0xFUL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x03C00000 */ #define USB_OTG_DIEPCTL_TXFNUM USB_OTG_DIEPCTL_TXFNUM_Msk /*!< TxFIFO number */ #define USB_OTG_DIEPCTL_TXFNUM_0 (0x1UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x00400000 */ #define USB_OTG_DIEPCTL_TXFNUM_1 (0x2UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x00800000 */ #define USB_OTG_DIEPCTL_TXFNUM_2 (0x4UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x01000000 */ #define USB_OTG_DIEPCTL_TXFNUM_3 (0x8UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x02000000 */ -#define USB_OTG_DIEPCTL_CNAK_Pos (26U) +#define USB_OTG_DIEPCTL_CNAK_Pos (26U) #define USB_OTG_DIEPCTL_CNAK_Msk (0x1UL << USB_OTG_DIEPCTL_CNAK_Pos) /*!< 0x04000000 */ #define USB_OTG_DIEPCTL_CNAK USB_OTG_DIEPCTL_CNAK_Msk /*!< Clear NAK */ -#define USB_OTG_DIEPCTL_SNAK_Pos (27U) +#define USB_OTG_DIEPCTL_SNAK_Pos (27U) #define USB_OTG_DIEPCTL_SNAK_Msk (0x1UL << USB_OTG_DIEPCTL_SNAK_Pos) /*!< 0x08000000 */ #define USB_OTG_DIEPCTL_SNAK USB_OTG_DIEPCTL_SNAK_Msk /*!< Set NAK */ -#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos (28U) +#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos (28U) #define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk (0x1UL << USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos) /*!< 0x10000000 */ #define USB_OTG_DIEPCTL_SD0PID_SEVNFRM USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk /*!< Set DATA0 PID */ -#define USB_OTG_DIEPCTL_SODDFRM_Pos (29U) +#define USB_OTG_DIEPCTL_SODDFRM_Pos (29U) #define USB_OTG_DIEPCTL_SODDFRM_Msk (0x1UL << USB_OTG_DIEPCTL_SODDFRM_Pos) /*!< 0x20000000 */ #define USB_OTG_DIEPCTL_SODDFRM USB_OTG_DIEPCTL_SODDFRM_Msk /*!< Set odd frame */ -#define USB_OTG_DIEPCTL_EPDIS_Pos (30U) +#define USB_OTG_DIEPCTL_EPDIS_Pos (30U) #define USB_OTG_DIEPCTL_EPDIS_Msk (0x1UL << USB_OTG_DIEPCTL_EPDIS_Pos) /*!< 0x40000000 */ #define USB_OTG_DIEPCTL_EPDIS USB_OTG_DIEPCTL_EPDIS_Msk /*!< Endpoint disable */ -#define USB_OTG_DIEPCTL_EPENA_Pos (31U) +#define USB_OTG_DIEPCTL_EPENA_Pos (31U) #define USB_OTG_DIEPCTL_EPENA_Msk (0x1UL << USB_OTG_DIEPCTL_EPENA_Pos) /*!< 0x80000000 */ #define USB_OTG_DIEPCTL_EPENA USB_OTG_DIEPCTL_EPENA_Msk /*!< Endpoint enable */ /******************** Bit definition for USB_OTG_HCCHAR register ********************/ -#define USB_OTG_HCCHAR_MPSIZ_Pos (0U) +#define USB_OTG_HCCHAR_MPSIZ_Pos (0U) #define USB_OTG_HCCHAR_MPSIZ_Msk (0x7FFUL << USB_OTG_HCCHAR_MPSIZ_Pos) /*!< 0x000007FF */ #define USB_OTG_HCCHAR_MPSIZ USB_OTG_HCCHAR_MPSIZ_Msk /*!< Maximum packet size */ -#define USB_OTG_HCCHAR_EPNUM_Pos (11U) +#define USB_OTG_HCCHAR_EPNUM_Pos (11U) #define USB_OTG_HCCHAR_EPNUM_Msk (0xFUL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00007800 */ #define USB_OTG_HCCHAR_EPNUM USB_OTG_HCCHAR_EPNUM_Msk /*!< Endpoint number */ #define USB_OTG_HCCHAR_EPNUM_0 (0x1UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00000800 */ #define USB_OTG_HCCHAR_EPNUM_1 (0x2UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00001000 */ #define USB_OTG_HCCHAR_EPNUM_2 (0x4UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00002000 */ #define USB_OTG_HCCHAR_EPNUM_3 (0x8UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00004000 */ -#define USB_OTG_HCCHAR_EPDIR_Pos (15U) +#define USB_OTG_HCCHAR_EPDIR_Pos (15U) #define USB_OTG_HCCHAR_EPDIR_Msk (0x1UL << USB_OTG_HCCHAR_EPDIR_Pos) /*!< 0x00008000 */ #define USB_OTG_HCCHAR_EPDIR USB_OTG_HCCHAR_EPDIR_Msk /*!< Endpoint direction */ -#define USB_OTG_HCCHAR_LSDEV_Pos (17U) +#define USB_OTG_HCCHAR_LSDEV_Pos (17U) #define USB_OTG_HCCHAR_LSDEV_Msk (0x1UL << USB_OTG_HCCHAR_LSDEV_Pos) /*!< 0x00020000 */ #define USB_OTG_HCCHAR_LSDEV USB_OTG_HCCHAR_LSDEV_Msk /*!< Low-speed device */ -#define USB_OTG_HCCHAR_EPTYP_Pos (18U) +#define USB_OTG_HCCHAR_EPTYP_Pos (18U) #define USB_OTG_HCCHAR_EPTYP_Msk (0x3UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x000C0000 */ #define USB_OTG_HCCHAR_EPTYP USB_OTG_HCCHAR_EPTYP_Msk /*!< Endpoint type */ #define USB_OTG_HCCHAR_EPTYP_0 (0x1UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x00040000 */ #define USB_OTG_HCCHAR_EPTYP_1 (0x2UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x00080000 */ - -#define USB_OTG_HCCHAR_MC_Pos (20U) + +#define USB_OTG_HCCHAR_MC_Pos (20U) #define USB_OTG_HCCHAR_MC_Msk (0x3UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00300000 */ #define USB_OTG_HCCHAR_MC USB_OTG_HCCHAR_MC_Msk /*!< Multi Count (MC) / Error Count (EC) */ #define USB_OTG_HCCHAR_MC_0 (0x1UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00100000 */ #define USB_OTG_HCCHAR_MC_1 (0x2UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00200000 */ -#define USB_OTG_HCCHAR_DAD_Pos (22U) +#define USB_OTG_HCCHAR_DAD_Pos (22U) #define USB_OTG_HCCHAR_DAD_Msk (0x7FUL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x1FC00000 */ #define USB_OTG_HCCHAR_DAD USB_OTG_HCCHAR_DAD_Msk /*!< Device address */ #define USB_OTG_HCCHAR_DAD_0 (0x01UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x00400000 */ @@ -1111,19 +1111,19 @@ typedef struct #define USB_OTG_HCCHAR_DAD_4 (0x10UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x04000000 */ #define USB_OTG_HCCHAR_DAD_5 (0x20UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x08000000 */ #define USB_OTG_HCCHAR_DAD_6 (0x40UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x10000000 */ -#define USB_OTG_HCCHAR_ODDFRM_Pos (29U) +#define USB_OTG_HCCHAR_ODDFRM_Pos (29U) #define USB_OTG_HCCHAR_ODDFRM_Msk (0x1UL << USB_OTG_HCCHAR_ODDFRM_Pos) /*!< 0x20000000 */ #define USB_OTG_HCCHAR_ODDFRM USB_OTG_HCCHAR_ODDFRM_Msk /*!< Odd frame */ -#define USB_OTG_HCCHAR_CHDIS_Pos (30U) +#define USB_OTG_HCCHAR_CHDIS_Pos (30U) #define USB_OTG_HCCHAR_CHDIS_Msk (0x1UL << USB_OTG_HCCHAR_CHDIS_Pos) /*!< 0x40000000 */ #define USB_OTG_HCCHAR_CHDIS USB_OTG_HCCHAR_CHDIS_Msk /*!< Channel disable */ -#define USB_OTG_HCCHAR_CHENA_Pos (31U) +#define USB_OTG_HCCHAR_CHENA_Pos (31U) #define USB_OTG_HCCHAR_CHENA_Msk (0x1UL << USB_OTG_HCCHAR_CHENA_Pos) /*!< 0x80000000 */ #define USB_OTG_HCCHAR_CHENA USB_OTG_HCCHAR_CHENA_Msk /*!< Channel enable */ /******************** Bit definition for USB_OTG_HCSPLT register ********************/ -#define USB_OTG_HCSPLT_PRTADDR_Pos (0U) +#define USB_OTG_HCSPLT_PRTADDR_Pos (0U) #define USB_OTG_HCSPLT_PRTADDR_Msk (0x7FUL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x0000007F */ #define USB_OTG_HCSPLT_PRTADDR USB_OTG_HCSPLT_PRTADDR_Msk /*!< Port address */ #define USB_OTG_HCSPLT_PRTADDR_0 (0x01UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000001 */ @@ -1134,7 +1134,7 @@ typedef struct #define USB_OTG_HCSPLT_PRTADDR_5 (0x20UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000020 */ #define USB_OTG_HCSPLT_PRTADDR_6 (0x40UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000040 */ -#define USB_OTG_HCSPLT_HUBADDR_Pos (7U) +#define USB_OTG_HCSPLT_HUBADDR_Pos (7U) #define USB_OTG_HCSPLT_HUBADDR_Msk (0x7FUL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00003F80 */ #define USB_OTG_HCSPLT_HUBADDR USB_OTG_HCSPLT_HUBADDR_Msk /*!< Hub address */ #define USB_OTG_HCSPLT_HUBADDR_0 (0x01UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000080 */ @@ -1145,240 +1145,240 @@ typedef struct #define USB_OTG_HCSPLT_HUBADDR_5 (0x20UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00001000 */ #define USB_OTG_HCSPLT_HUBADDR_6 (0x40UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00002000 */ -#define USB_OTG_HCSPLT_XACTPOS_Pos (14U) +#define USB_OTG_HCSPLT_XACTPOS_Pos (14U) #define USB_OTG_HCSPLT_XACTPOS_Msk (0x3UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x0000C000 */ #define USB_OTG_HCSPLT_XACTPOS USB_OTG_HCSPLT_XACTPOS_Msk /*!< XACTPOS */ #define USB_OTG_HCSPLT_XACTPOS_0 (0x1UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x00004000 */ #define USB_OTG_HCSPLT_XACTPOS_1 (0x2UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x00008000 */ -#define USB_OTG_HCSPLT_COMPLSPLT_Pos (16U) +#define USB_OTG_HCSPLT_COMPLSPLT_Pos (16U) #define USB_OTG_HCSPLT_COMPLSPLT_Msk (0x1UL << USB_OTG_HCSPLT_COMPLSPLT_Pos) /*!< 0x00010000 */ #define USB_OTG_HCSPLT_COMPLSPLT USB_OTG_HCSPLT_COMPLSPLT_Msk /*!< Do complete split */ -#define USB_OTG_HCSPLT_SPLITEN_Pos (31U) +#define USB_OTG_HCSPLT_SPLITEN_Pos (31U) #define USB_OTG_HCSPLT_SPLITEN_Msk (0x1UL << USB_OTG_HCSPLT_SPLITEN_Pos) /*!< 0x80000000 */ #define USB_OTG_HCSPLT_SPLITEN USB_OTG_HCSPLT_SPLITEN_Msk /*!< Split enable */ /******************** Bit definition for USB_OTG_HCINT register ********************/ -#define USB_OTG_HCINT_XFRC_Pos (0U) +#define USB_OTG_HCINT_XFRC_Pos (0U) #define USB_OTG_HCINT_XFRC_Msk (0x1UL << USB_OTG_HCINT_XFRC_Pos) /*!< 0x00000001 */ #define USB_OTG_HCINT_XFRC USB_OTG_HCINT_XFRC_Msk /*!< Transfer completed */ -#define USB_OTG_HCINT_CHH_Pos (1U) +#define USB_OTG_HCINT_CHH_Pos (1U) #define USB_OTG_HCINT_CHH_Msk (0x1UL << USB_OTG_HCINT_CHH_Pos) /*!< 0x00000002 */ #define USB_OTG_HCINT_CHH USB_OTG_HCINT_CHH_Msk /*!< Channel halted */ -#define USB_OTG_HCINT_AHBERR_Pos (2U) +#define USB_OTG_HCINT_AHBERR_Pos (2U) #define USB_OTG_HCINT_AHBERR_Msk (0x1UL << USB_OTG_HCINT_AHBERR_Pos) /*!< 0x00000004 */ #define USB_OTG_HCINT_AHBERR USB_OTG_HCINT_AHBERR_Msk /*!< AHB error */ -#define USB_OTG_HCINT_STALL_Pos (3U) +#define USB_OTG_HCINT_STALL_Pos (3U) #define USB_OTG_HCINT_STALL_Msk (0x1UL << USB_OTG_HCINT_STALL_Pos) /*!< 0x00000008 */ #define USB_OTG_HCINT_STALL USB_OTG_HCINT_STALL_Msk /*!< STALL response received interrupt */ -#define USB_OTG_HCINT_NAK_Pos (4U) +#define USB_OTG_HCINT_NAK_Pos (4U) #define USB_OTG_HCINT_NAK_Msk (0x1UL << USB_OTG_HCINT_NAK_Pos) /*!< 0x00000010 */ #define USB_OTG_HCINT_NAK USB_OTG_HCINT_NAK_Msk /*!< NAK response received interrupt */ -#define USB_OTG_HCINT_ACK_Pos (5U) +#define USB_OTG_HCINT_ACK_Pos (5U) #define USB_OTG_HCINT_ACK_Msk (0x1UL << USB_OTG_HCINT_ACK_Pos) /*!< 0x00000020 */ #define USB_OTG_HCINT_ACK USB_OTG_HCINT_ACK_Msk /*!< ACK response received/transmitted interrupt */ -#define USB_OTG_HCINT_NYET_Pos (6U) +#define USB_OTG_HCINT_NYET_Pos (6U) #define USB_OTG_HCINT_NYET_Msk (0x1UL << USB_OTG_HCINT_NYET_Pos) /*!< 0x00000040 */ #define USB_OTG_HCINT_NYET USB_OTG_HCINT_NYET_Msk /*!< Response received interrupt */ -#define USB_OTG_HCINT_TXERR_Pos (7U) +#define USB_OTG_HCINT_TXERR_Pos (7U) #define USB_OTG_HCINT_TXERR_Msk (0x1UL << USB_OTG_HCINT_TXERR_Pos) /*!< 0x00000080 */ #define USB_OTG_HCINT_TXERR USB_OTG_HCINT_TXERR_Msk /*!< Transaction error */ -#define USB_OTG_HCINT_BBERR_Pos (8U) +#define USB_OTG_HCINT_BBERR_Pos (8U) #define USB_OTG_HCINT_BBERR_Msk (0x1UL << USB_OTG_HCINT_BBERR_Pos) /*!< 0x00000100 */ #define USB_OTG_HCINT_BBERR USB_OTG_HCINT_BBERR_Msk /*!< Babble error */ -#define USB_OTG_HCINT_FRMOR_Pos (9U) +#define USB_OTG_HCINT_FRMOR_Pos (9U) #define USB_OTG_HCINT_FRMOR_Msk (0x1UL << USB_OTG_HCINT_FRMOR_Pos) /*!< 0x00000200 */ #define USB_OTG_HCINT_FRMOR USB_OTG_HCINT_FRMOR_Msk /*!< Frame overrun */ -#define USB_OTG_HCINT_DTERR_Pos (10U) +#define USB_OTG_HCINT_DTERR_Pos (10U) #define USB_OTG_HCINT_DTERR_Msk (0x1UL << USB_OTG_HCINT_DTERR_Pos) /*!< 0x00000400 */ #define USB_OTG_HCINT_DTERR USB_OTG_HCINT_DTERR_Msk /*!< Data toggle error */ /******************** Bit definition for USB_OTG_DIEPINT register ********************/ -#define USB_OTG_DIEPINT_XFRC_Pos (0U) +#define USB_OTG_DIEPINT_XFRC_Pos (0U) #define USB_OTG_DIEPINT_XFRC_Msk (0x1UL << USB_OTG_DIEPINT_XFRC_Pos) /*!< 0x00000001 */ #define USB_OTG_DIEPINT_XFRC USB_OTG_DIEPINT_XFRC_Msk /*!< Transfer completed interrupt */ -#define USB_OTG_DIEPINT_EPDISD_Pos (1U) +#define USB_OTG_DIEPINT_EPDISD_Pos (1U) #define USB_OTG_DIEPINT_EPDISD_Msk (0x1UL << USB_OTG_DIEPINT_EPDISD_Pos) /*!< 0x00000002 */ #define USB_OTG_DIEPINT_EPDISD USB_OTG_DIEPINT_EPDISD_Msk /*!< Endpoint disabled interrupt */ #define USB_OTG_DIEPINT_AHBERR_Pos (2U) #define USB_OTG_DIEPINT_AHBERR_Msk (0x1UL << USB_OTG_DIEPINT_AHBERR_Pos) /*!< 0x00000004 */ #define USB_OTG_DIEPINT_AHBERR USB_OTG_DIEPINT_AHBERR_Msk /*!< AHB Error (AHBErr) during an IN transaction */ -#define USB_OTG_DIEPINT_TOC_Pos (3U) +#define USB_OTG_DIEPINT_TOC_Pos (3U) #define USB_OTG_DIEPINT_TOC_Msk (0x1UL << USB_OTG_DIEPINT_TOC_Pos) /*!< 0x00000008 */ #define USB_OTG_DIEPINT_TOC USB_OTG_DIEPINT_TOC_Msk /*!< Timeout condition */ -#define USB_OTG_DIEPINT_ITTXFE_Pos (4U) +#define USB_OTG_DIEPINT_ITTXFE_Pos (4U) #define USB_OTG_DIEPINT_ITTXFE_Msk (0x1UL << USB_OTG_DIEPINT_ITTXFE_Pos) /*!< 0x00000010 */ #define USB_OTG_DIEPINT_ITTXFE USB_OTG_DIEPINT_ITTXFE_Msk /*!< IN token received when TxFIFO is empty */ #define USB_OTG_DIEPINT_INEPNM_Pos (5U) #define USB_OTG_DIEPINT_INEPNM_Msk (0x1UL << USB_OTG_DIEPINT_INEPNM_Pos) /*!< 0x00000004 */ #define USB_OTG_DIEPINT_INEPNM USB_OTG_DIEPINT_INEPNM_Msk /*!< IN token received with EP mismatch */ -#define USB_OTG_DIEPINT_INEPNE_Pos (6U) +#define USB_OTG_DIEPINT_INEPNE_Pos (6U) #define USB_OTG_DIEPINT_INEPNE_Msk (0x1UL << USB_OTG_DIEPINT_INEPNE_Pos) /*!< 0x00000040 */ #define USB_OTG_DIEPINT_INEPNE USB_OTG_DIEPINT_INEPNE_Msk /*!< IN endpoint NAK effective */ -#define USB_OTG_DIEPINT_TXFE_Pos (7U) +#define USB_OTG_DIEPINT_TXFE_Pos (7U) #define USB_OTG_DIEPINT_TXFE_Msk (0x1UL << USB_OTG_DIEPINT_TXFE_Pos) /*!< 0x00000080 */ #define USB_OTG_DIEPINT_TXFE USB_OTG_DIEPINT_TXFE_Msk /*!< Transmit FIFO empty */ -#define USB_OTG_DIEPINT_TXFIFOUDRN_Pos (8U) +#define USB_OTG_DIEPINT_TXFIFOUDRN_Pos (8U) #define USB_OTG_DIEPINT_TXFIFOUDRN_Msk (0x1UL << USB_OTG_DIEPINT_TXFIFOUDRN_Pos) /*!< 0x00000100 */ #define USB_OTG_DIEPINT_TXFIFOUDRN USB_OTG_DIEPINT_TXFIFOUDRN_Msk /*!< Transmit Fifo Underrun */ -#define USB_OTG_DIEPINT_BNA_Pos (9U) +#define USB_OTG_DIEPINT_BNA_Pos (9U) #define USB_OTG_DIEPINT_BNA_Msk (0x1UL << USB_OTG_DIEPINT_BNA_Pos) /*!< 0x00000200 */ #define USB_OTG_DIEPINT_BNA USB_OTG_DIEPINT_BNA_Msk /*!< Buffer not available interrupt */ -#define USB_OTG_DIEPINT_PKTDRPSTS_Pos (11U) +#define USB_OTG_DIEPINT_PKTDRPSTS_Pos (11U) #define USB_OTG_DIEPINT_PKTDRPSTS_Msk (0x1UL << USB_OTG_DIEPINT_PKTDRPSTS_Pos) /*!< 0x00000800 */ #define USB_OTG_DIEPINT_PKTDRPSTS USB_OTG_DIEPINT_PKTDRPSTS_Msk /*!< Packet dropped status */ -#define USB_OTG_DIEPINT_BERR_Pos (12U) +#define USB_OTG_DIEPINT_BERR_Pos (12U) #define USB_OTG_DIEPINT_BERR_Msk (0x1UL << USB_OTG_DIEPINT_BERR_Pos) /*!< 0x00001000 */ #define USB_OTG_DIEPINT_BERR USB_OTG_DIEPINT_BERR_Msk /*!< Babble error interrupt */ -#define USB_OTG_DIEPINT_NAK_Pos (13U) +#define USB_OTG_DIEPINT_NAK_Pos (13U) #define USB_OTG_DIEPINT_NAK_Msk (0x1UL << USB_OTG_DIEPINT_NAK_Pos) /*!< 0x00002000 */ #define USB_OTG_DIEPINT_NAK USB_OTG_DIEPINT_NAK_Msk /*!< NAK interrupt */ /******************** Bit definition for USB_OTG_HCINTMSK register ********************/ -#define USB_OTG_HCINTMSK_XFRCM_Pos (0U) +#define USB_OTG_HCINTMSK_XFRCM_Pos (0U) #define USB_OTG_HCINTMSK_XFRCM_Msk (0x1UL << USB_OTG_HCINTMSK_XFRCM_Pos) /*!< 0x00000001 */ #define USB_OTG_HCINTMSK_XFRCM USB_OTG_HCINTMSK_XFRCM_Msk /*!< Transfer completed mask */ -#define USB_OTG_HCINTMSK_CHHM_Pos (1U) +#define USB_OTG_HCINTMSK_CHHM_Pos (1U) #define USB_OTG_HCINTMSK_CHHM_Msk (0x1UL << USB_OTG_HCINTMSK_CHHM_Pos) /*!< 0x00000002 */ #define USB_OTG_HCINTMSK_CHHM USB_OTG_HCINTMSK_CHHM_Msk /*!< Channel halted mask */ -#define USB_OTG_HCINTMSK_AHBERR_Pos (2U) +#define USB_OTG_HCINTMSK_AHBERR_Pos (2U) #define USB_OTG_HCINTMSK_AHBERR_Msk (0x1UL << USB_OTG_HCINTMSK_AHBERR_Pos) /*!< 0x00000004 */ #define USB_OTG_HCINTMSK_AHBERR USB_OTG_HCINTMSK_AHBERR_Msk /*!< AHB error */ -#define USB_OTG_HCINTMSK_STALLM_Pos (3U) +#define USB_OTG_HCINTMSK_STALLM_Pos (3U) #define USB_OTG_HCINTMSK_STALLM_Msk (0x1UL << USB_OTG_HCINTMSK_STALLM_Pos) /*!< 0x00000008 */ #define USB_OTG_HCINTMSK_STALLM USB_OTG_HCINTMSK_STALLM_Msk /*!< STALL response received interrupt mask */ -#define USB_OTG_HCINTMSK_NAKM_Pos (4U) +#define USB_OTG_HCINTMSK_NAKM_Pos (4U) #define USB_OTG_HCINTMSK_NAKM_Msk (0x1UL << USB_OTG_HCINTMSK_NAKM_Pos) /*!< 0x00000010 */ #define USB_OTG_HCINTMSK_NAKM USB_OTG_HCINTMSK_NAKM_Msk /*!< NAK response received interrupt mask */ -#define USB_OTG_HCINTMSK_ACKM_Pos (5U) +#define USB_OTG_HCINTMSK_ACKM_Pos (5U) #define USB_OTG_HCINTMSK_ACKM_Msk (0x1UL << USB_OTG_HCINTMSK_ACKM_Pos) /*!< 0x00000020 */ #define USB_OTG_HCINTMSK_ACKM USB_OTG_HCINTMSK_ACKM_Msk /*!< ACK response received/transmitted interrupt mask */ -#define USB_OTG_HCINTMSK_NYET_Pos (6U) +#define USB_OTG_HCINTMSK_NYET_Pos (6U) #define USB_OTG_HCINTMSK_NYET_Msk (0x1UL << USB_OTG_HCINTMSK_NYET_Pos) /*!< 0x00000040 */ #define USB_OTG_HCINTMSK_NYET USB_OTG_HCINTMSK_NYET_Msk /*!< response received interrupt mask */ -#define USB_OTG_HCINTMSK_TXERRM_Pos (7U) +#define USB_OTG_HCINTMSK_TXERRM_Pos (7U) #define USB_OTG_HCINTMSK_TXERRM_Msk (0x1UL << USB_OTG_HCINTMSK_TXERRM_Pos) /*!< 0x00000080 */ #define USB_OTG_HCINTMSK_TXERRM USB_OTG_HCINTMSK_TXERRM_Msk /*!< Transaction error mask */ -#define USB_OTG_HCINTMSK_BBERRM_Pos (8U) +#define USB_OTG_HCINTMSK_BBERRM_Pos (8U) #define USB_OTG_HCINTMSK_BBERRM_Msk (0x1UL << USB_OTG_HCINTMSK_BBERRM_Pos) /*!< 0x00000100 */ #define USB_OTG_HCINTMSK_BBERRM USB_OTG_HCINTMSK_BBERRM_Msk /*!< Babble error mask */ -#define USB_OTG_HCINTMSK_FRMORM_Pos (9U) +#define USB_OTG_HCINTMSK_FRMORM_Pos (9U) #define USB_OTG_HCINTMSK_FRMORM_Msk (0x1UL << USB_OTG_HCINTMSK_FRMORM_Pos) /*!< 0x00000200 */ #define USB_OTG_HCINTMSK_FRMORM USB_OTG_HCINTMSK_FRMORM_Msk /*!< Frame overrun mask */ -#define USB_OTG_HCINTMSK_DTERRM_Pos (10U) +#define USB_OTG_HCINTMSK_DTERRM_Pos (10U) #define USB_OTG_HCINTMSK_DTERRM_Msk (0x1UL << USB_OTG_HCINTMSK_DTERRM_Pos) /*!< 0x00000400 */ #define USB_OTG_HCINTMSK_DTERRM USB_OTG_HCINTMSK_DTERRM_Msk /*!< Data toggle error mask */ /******************** Bit definition for USB_OTG_DIEPTSIZ register ********************/ -#define USB_OTG_DIEPTSIZ_XFRSIZ_Pos (0U) +#define USB_OTG_DIEPTSIZ_XFRSIZ_Pos (0U) #define USB_OTG_DIEPTSIZ_XFRSIZ_Msk (0x7FFFFUL << USB_OTG_DIEPTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */ #define USB_OTG_DIEPTSIZ_XFRSIZ USB_OTG_DIEPTSIZ_XFRSIZ_Msk /*!< Transfer size */ -#define USB_OTG_DIEPTSIZ_PKTCNT_Pos (19U) +#define USB_OTG_DIEPTSIZ_PKTCNT_Pos (19U) #define USB_OTG_DIEPTSIZ_PKTCNT_Msk (0x3FFUL << USB_OTG_DIEPTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */ #define USB_OTG_DIEPTSIZ_PKTCNT USB_OTG_DIEPTSIZ_PKTCNT_Msk /*!< Packet count */ -#define USB_OTG_DIEPTSIZ_MULCNT_Pos (29U) +#define USB_OTG_DIEPTSIZ_MULCNT_Pos (29U) #define USB_OTG_DIEPTSIZ_MULCNT_Msk (0x3UL << USB_OTG_DIEPTSIZ_MULCNT_Pos) /*!< 0x60000000 */ #define USB_OTG_DIEPTSIZ_MULCNT USB_OTG_DIEPTSIZ_MULCNT_Msk /*!< Packet count */ /******************** Bit definition for USB_OTG_HCTSIZ register ********************/ -#define USB_OTG_HCTSIZ_XFRSIZ_Pos (0U) +#define USB_OTG_HCTSIZ_XFRSIZ_Pos (0U) #define USB_OTG_HCTSIZ_XFRSIZ_Msk (0x7FFFFUL << USB_OTG_HCTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */ #define USB_OTG_HCTSIZ_XFRSIZ USB_OTG_HCTSIZ_XFRSIZ_Msk /*!< Transfer size */ -#define USB_OTG_HCTSIZ_PKTCNT_Pos (19U) +#define USB_OTG_HCTSIZ_PKTCNT_Pos (19U) #define USB_OTG_HCTSIZ_PKTCNT_Msk (0x3FFUL << USB_OTG_HCTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */ #define USB_OTG_HCTSIZ_PKTCNT USB_OTG_HCTSIZ_PKTCNT_Msk /*!< Packet count */ -#define USB_OTG_HCTSIZ_DOPING_Pos (31U) +#define USB_OTG_HCTSIZ_DOPING_Pos (31U) #define USB_OTG_HCTSIZ_DOPING_Msk (0x1UL << USB_OTG_HCTSIZ_DOPING_Pos) /*!< 0x80000000 */ #define USB_OTG_HCTSIZ_DOPING USB_OTG_HCTSIZ_DOPING_Msk /*!< Do PING */ -#define USB_OTG_HCTSIZ_DPID_Pos (29U) +#define USB_OTG_HCTSIZ_DPID_Pos (29U) #define USB_OTG_HCTSIZ_DPID_Msk (0x3UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x60000000 */ #define USB_OTG_HCTSIZ_DPID USB_OTG_HCTSIZ_DPID_Msk /*!< Data PID */ #define USB_OTG_HCTSIZ_DPID_0 (0x1UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x20000000 */ #define USB_OTG_HCTSIZ_DPID_1 (0x2UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x40000000 */ /******************** Bit definition for USB_OTG_DIEPDMA register ********************/ -#define USB_OTG_DIEPDMA_DMAADDR_Pos (0U) +#define USB_OTG_DIEPDMA_DMAADDR_Pos (0U) #define USB_OTG_DIEPDMA_DMAADDR_Msk (0xFFFFFFFFUL << USB_OTG_DIEPDMA_DMAADDR_Pos) /*!< 0xFFFFFFFF */ #define USB_OTG_DIEPDMA_DMAADDR USB_OTG_DIEPDMA_DMAADDR_Msk /*!< DMA address */ /******************** Bit definition for USB_OTG_HCDMA register ********************/ -#define USB_OTG_HCDMA_DMAADDR_Pos (0U) +#define USB_OTG_HCDMA_DMAADDR_Pos (0U) #define USB_OTG_HCDMA_DMAADDR_Msk (0xFFFFFFFFUL << USB_OTG_HCDMA_DMAADDR_Pos) /*!< 0xFFFFFFFF */ #define USB_OTG_HCDMA_DMAADDR USB_OTG_HCDMA_DMAADDR_Msk /*!< DMA address */ /******************** Bit definition for USB_OTG_DTXFSTS register ********************/ -#define USB_OTG_DTXFSTS_INEPTFSAV_Pos (0U) +#define USB_OTG_DTXFSTS_INEPTFSAV_Pos (0U) #define USB_OTG_DTXFSTS_INEPTFSAV_Msk (0xFFFFUL << USB_OTG_DTXFSTS_INEPTFSAV_Pos) /*!< 0x0000FFFF */ #define USB_OTG_DTXFSTS_INEPTFSAV USB_OTG_DTXFSTS_INEPTFSAV_Msk /*!< IN endpoint TxFIFO space available */ /******************** Bit definition for USB_OTG_DIEPTXF register ********************/ -#define USB_OTG_DIEPTXF_INEPTXSA_Pos (0U) +#define USB_OTG_DIEPTXF_INEPTXSA_Pos (0U) #define USB_OTG_DIEPTXF_INEPTXSA_Msk (0xFFFFUL << USB_OTG_DIEPTXF_INEPTXSA_Pos) /*!< 0x0000FFFF */ #define USB_OTG_DIEPTXF_INEPTXSA USB_OTG_DIEPTXF_INEPTXSA_Msk /*!< IN endpoint FIFOx transmit RAM start address */ -#define USB_OTG_DIEPTXF_INEPTXFD_Pos (16U) +#define USB_OTG_DIEPTXF_INEPTXFD_Pos (16U) #define USB_OTG_DIEPTXF_INEPTXFD_Msk (0xFFFFUL << USB_OTG_DIEPTXF_INEPTXFD_Pos) /*!< 0xFFFF0000 */ #define USB_OTG_DIEPTXF_INEPTXFD USB_OTG_DIEPTXF_INEPTXFD_Msk /*!< IN endpoint TxFIFO depth */ /******************** Bit definition for USB_OTG_DOEPCTL register ********************/ -#define USB_OTG_DOEPCTL_MPSIZ_Pos (0U) +#define USB_OTG_DOEPCTL_MPSIZ_Pos (0U) #define USB_OTG_DOEPCTL_MPSIZ_Msk (0x7FFUL << USB_OTG_DOEPCTL_MPSIZ_Pos) /*!< 0x000007FF */ #define USB_OTG_DOEPCTL_MPSIZ USB_OTG_DOEPCTL_MPSIZ_Msk /*!< Maximum packet size */ /*!queued_len += short_packet_size; - + EP_TX_DMA_ADDR(epnum) = (uint32_t)buffer; USBHSD->ENDP_CONFIG |= (USBHS_EP0_T_EN << epnum); EP_TX_LEN(epnum) = short_packet_size; @@ -366,7 +366,7 @@ void dcd_int_handler(uint8_t rhport) { } else if (intflag & USBHS_SETUP_FLAG) { USBHS_Dev_Endp0_Tog = 1; dcd_event_setup_received(0, EP0_DatabufHD, true); - + USBHSD->INT_FG = USBHS_SETUP_FLAG; /* Clear flag */ } else if (intflag & USBHS_DETECT_FLAG) { USBHS_Dev_Endp0_Tog = 1; diff --git a/test/fuzz/dcd_fuzz.cc b/test/fuzz/dcd_fuzz.cc index 6403015dd..06ddddc4a 100644 --- a/test/fuzz/dcd_fuzz.cc +++ b/test/fuzz/dcd_fuzz.cc @@ -185,7 +185,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, /* TODO: implement a fuzzed version of this. bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t *ff, - uint16_t total_bytes) {} + uint16_t total_bytes) {} */ // Stall endpoint, any queuing transfer should be removed from endpoint @@ -205,4 +205,4 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { UNUSED(ep_addr); return; } -} \ No newline at end of file +} diff --git a/test/fuzz/device/cdc/CMakeLists.txt b/test/fuzz/device/cdc/CMakeLists.txt index fa6e83b7e..8e4db9d29 100644 --- a/test/fuzz/device/cdc/CMakeLists.txt +++ b/test/fuzz/device/cdc/CMakeLists.txt @@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/test/fuzz/device/cdc/src/fuzz.cc b/test/fuzz/device/cdc/src/fuzz.cc index d40483ca6..0560e8621 100644 --- a/test/fuzz/device/cdc/src/fuzz.cc +++ b/test/fuzz/device/cdc/src/fuzz.cc @@ -143,7 +143,7 @@ void cdc_task(FuzzedDataProvider *provider) { // TODO: Fuzz interface number (void)tud_cdc_n_write(0, buffer.data(), buffer.size()); } break; - + case kCdcNWriteChar: // TODO: Fuzz interface number (void)tud_cdc_n_write_char(0, provider->ConsumeIntegral()); @@ -171,4 +171,4 @@ case kMaxValue: break; } } -} \ No newline at end of file +} diff --git a/test/fuzz/device/msc/CMakeLists.txt b/test/fuzz/device/msc/CMakeLists.txt index fa6e83b7e..8e4db9d29 100644 --- a/test/fuzz/device/msc/CMakeLists.txt +++ b/test/fuzz/device/msc/CMakeLists.txt @@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/test/fuzz/device/msc/src/fuzz.cc b/test/fuzz/device/msc/src/fuzz.cc index 568900452..371d49882 100644 --- a/test/fuzz/device/msc/src/fuzz.cc +++ b/test/fuzz/device/msc/src/fuzz.cc @@ -59,4 +59,3 @@ extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) { return 0; } - diff --git a/test/fuzz/device/net/CMakeLists.txt b/test/fuzz/device/net/CMakeLists.txt index fa6e83b7e..8e4db9d29 100644 --- a/test/fuzz/device/net/CMakeLists.txt +++ b/test/fuzz/device/net/CMakeLists.txt @@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) \ No newline at end of file +family_configure_device_example(${PROJECT}) diff --git a/test/fuzz/device/net/src/arch/cc.h b/test/fuzz/device/net/src/arch/cc.h index 56a0cacf7..9f30b91cb 100644 --- a/test/fuzz/device/net/src/arch/cc.h +++ b/test/fuzz/device/net/src/arch/cc.h @@ -1,8 +1,8 @@ /* * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, @@ -11,21 +11,21 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. + * derived from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY * OF SUCH DAMAGE. * * This file is part of the lwIP TCP/IP stack. - * + * * Author: Adam Dunkels * */ @@ -42,7 +42,7 @@ typedef int sys_prot_t; #if defined (__ICCARM__) #define PACK_STRUCT_BEGIN -#define PACK_STRUCT_STRUCT +#define PACK_STRUCT_STRUCT #define PACK_STRUCT_END #define PACK_STRUCT_FIELD(x) x #define PACK_STRUCT_USE_INCLUDES @@ -50,7 +50,7 @@ typedef int sys_prot_t; #elif defined (__CC_ARM) #define PACK_STRUCT_BEGIN __packed -#define PACK_STRUCT_STRUCT +#define PACK_STRUCT_STRUCT #define PACK_STRUCT_END #define PACK_STRUCT_FIELD(x) x diff --git a/test/fuzz/device/net/src/fuzz.cc b/test/fuzz/device/net/src/fuzz.cc index ea4943665..a6935928a 100644 --- a/test/fuzz/device/net/src/fuzz.cc +++ b/test/fuzz/device/net/src/fuzz.cc @@ -81,7 +81,7 @@ void net_task(FuzzedDataProvider *provider) { assert(provider != NULL); switch (provider->ConsumeEnum()) { - + case kNetworkRecvRenew: tud_network_recv_renew(); break; diff --git a/test/fuzz/device/net/src/lwipopts.h b/test/fuzz/device/net/src/lwipopts.h index a215017c7..336c9243d 100644 --- a/test/fuzz/device/net/src/lwipopts.h +++ b/test/fuzz/device/net/src/lwipopts.h @@ -1,8 +1,8 @@ /* * Copyright (c) 2001-2003 Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, @@ -11,21 +11,21 @@ * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. + * derived from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT - * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY * OF SUCH DAMAGE. * * This file is part of the lwIP TCP/IP stack. - * + * * Author: Simon Goldschmidt * */ diff --git a/test/fuzz/dicts/cdc.dict b/test/fuzz/dicts/cdc.dict index 138775cdc..421eb8ed9 100644 --- a/test/fuzz/dicts/cdc.dict +++ b/test/fuzz/dicts/cdc.dict @@ -71,4 +71,3 @@ RNDIS_PACKET_TYPE_FUNCTIONAL="\x00\x00\x40\x00" # NIC driver frames that a Token Ring NIC receives. RNDIS_PACKET_TYPE_MAC_FRAME="\x00\x00\x80\x00" RNDIS_PACKET_TYPE_NO_LOCAL="\x00\x01\x00\x00" - diff --git a/test/fuzz/make.mk b/test/fuzz/make.mk index 934819665..b7b6d6a75 100644 --- a/test/fuzz/make.mk +++ b/test/fuzz/make.mk @@ -114,7 +114,7 @@ CXXFLAGS += \ # conversion is too strict for most mcu driver, may be disable sign/int/arith-conversion # -Wconversion - + # Debugging/Optimization ifeq ($(DEBUG), 1) CFLAGS += -Og @@ -132,4 +132,3 @@ endif ifneq ($(LOGGER),) CMAKE_DEFSYM += -DLOGGER=$(LOGGER) endif - diff --git a/test/fuzz/msc_fuzz.cc b/test/fuzz/msc_fuzz.cc index e906ca971..6e838a682 100644 --- a/test/fuzz/msc_fuzz.cc +++ b/test/fuzz/msc_fuzz.cc @@ -159,4 +159,4 @@ int32_t tud_msc_scsi_cb(uint8_t lun, uint8_t const scsi_cmd[16], void *buffer, } } -#endif \ No newline at end of file +#endif diff --git a/test/fuzz/net_fuzz.cc b/test/fuzz/net_fuzz.cc index 8467d6d8e..3158e74ef 100644 --- a/test/fuzz/net_fuzz.cc +++ b/test/fuzz/net_fuzz.cc @@ -79,4 +79,4 @@ void tud_network_link_state_cb(bool state) { } } -#endif \ No newline at end of file +#endif diff --git a/test/fuzz/rules.mk b/test/fuzz/rules.mk index d9c2a1a77..825abddc5 100644 --- a/test/fuzz/rules.mk +++ b/test/fuzz/rules.mk @@ -89,7 +89,7 @@ endif # Rules # --------------------------------------- -all: $(BUILD)/$(PROJECT) +all: $(BUILD)/$(PROJECT) OBJ_DIRS = $(sort $(dir $(OBJ))) $(OBJ): | $(OBJ_DIRS) @@ -111,7 +111,7 @@ vpath %.c . $(TOP) $(BUILD)/obj/%.o: %.c @echo CC $(notdir $@) @$(CC) $(CFLAGS) -c -MD -o $@ $< - + # All cpp srcs vpath %.cc . $(TOP) $(BUILD)/obj/%_cxx.o: %.cc @@ -158,4 +158,4 @@ linkermap: $(BUILD)/$(PROJECT) # Print out the value of a make variable. # https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile print-%: - @echo $* = $($*) \ No newline at end of file + @echo $* = $($*) diff --git a/test/unit-test/test/device/msc/test_msc_device.c b/test/unit-test/test/device/msc/test_msc_device.c index 63684e76a..c757cdcfa 100644 --- a/test/unit-test/test/device/msc/test_msc_device.c +++ b/test/unit-test/test/device/msc/test_msc_device.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, hathach (tinyusb.org) diff --git a/test/unit-test/test/device/usbd/test_usbd.c b/test/unit-test/test/device/usbd/test_usbd.c index ad95eb47a..dcded605a 100644 --- a/test/unit-test/test/device/usbd/test_usbd.c +++ b/test/unit-test/test/device/usbd/test_usbd.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019, Ha Thach (tinyusb.org) diff --git a/test/unit-test/test/test_fifo.c b/test/unit-test/test/test_fifo.c index 28be6d8fc..3b4deb33e 100644 --- a/test/unit-test/test/test_fifo.c +++ b/test/unit-test/test/test_fifo.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/test/unit-test/vendor/ceedling/lib/ceedling.rb b/test/unit-test/vendor/ceedling/lib/ceedling.rb index 7f3400236..6c57fb48d 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling.rb @@ -96,4 +96,3 @@ module Ceedling DEFAULT_CEEDLING_CONFIG[:plugins][:load_paths] << gem_dir end end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/build_invoker_utils.rb b/test/unit-test/vendor/ceedling/lib/ceedling/build_invoker_utils.rb index 5727bcabc..31abe6d99 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/build_invoker_utils.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/build_invoker_utils.rb @@ -5,7 +5,7 @@ require 'ceedling/constants' class BuildInvokerUtils constructor :configurator, :streaminator - + ## # Processes exceptions and tries to display a useful message for the user. # @@ -13,27 +13,27 @@ class BuildInvokerUtils # # * _exception_: The exception given by a rescue statement. # * _context_: A symbol representing where in the build the exception - # occurs. + # occurs. # * _test_build_: A bool to signify if the exception occurred while building # from test or source. # def process_exception(exception, context, test_build=true) if (exception.message =~ /Don't know how to build task '(.+)'/i) error_header = "ERROR: Rake could not find file referenced in source" - error_header += " or test" if (test_build) + error_header += " or test" if (test_build) error_header += ": '#{$1}'. Possible stale dependency." - + @streaminator.stderr_puts( error_header ) if (@configurator.project_use_deep_dependencies) - help_message = "Try fixing #include statements or adding missing file. Then run '#{REFRESH_TASK_ROOT}#{context.to_s}' task and try again." + help_message = "Try fixing #include statements or adding missing file. Then run '#{REFRESH_TASK_ROOT}#{context.to_s}' task and try again." @streaminator.stderr_puts( help_message ) end - + raise '' else raise exception end end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator.rb index 519a4aab4..fd7451fa7 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator.rb @@ -2,7 +2,7 @@ class Cacheinator constructor :cacheinator_helper, :file_path_utils, :file_wrapper, :yaml_wrapper - + def cache_test_config(hash) @yaml_wrapper.dump( @file_path_utils.form_test_build_cache_path( INPUT_CONFIGURATION_CACHE_FILE), hash ) end @@ -11,15 +11,15 @@ class Cacheinator @yaml_wrapper.dump( @file_path_utils.form_release_build_cache_path( INPUT_CONFIGURATION_CACHE_FILE ), hash ) end - + def diff_cached_test_file( filepath ) cached_filepath = @file_path_utils.form_test_build_cache_path( filepath ) - + if (@file_wrapper.exist?( cached_filepath ) and (!@file_wrapper.compare( filepath, cached_filepath ))) @file_wrapper.cp(filepath, cached_filepath, {:preserve => false}) return filepath elsif (!@file_wrapper.exist?( cached_filepath )) - @file_wrapper.cp(filepath, cached_filepath, {:preserve => false}) + @file_wrapper.cp(filepath, cached_filepath, {:preserve => false}) return filepath end @@ -43,5 +43,5 @@ class Cacheinator return @cacheinator_helper.diff_cached_config?( cached_filepath, hash ) end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator_helper.rb index 14e8a6ef0..b7fa5863f 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator_helper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator_helper.rb @@ -2,7 +2,7 @@ class CacheinatorHelper constructor :file_wrapper, :yaml_wrapper - + def diff_cached_config?(cached_filepath, hash) return false if ( not @file_wrapper.exist?(cached_filepath) ) return true if (@yaml_wrapper.load(cached_filepath) != hash) diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/cmock_builder.rb b/test/unit-test/vendor/ceedling/lib/ceedling/cmock_builder.rb index 4a74aa842..82ef96135 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/cmock_builder.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/cmock_builder.rb @@ -1,13 +1,13 @@ require 'cmock' class CmockBuilder - + attr_accessor :cmock - - def setup + + def setup @cmock = nil end - + def manufacture(cmock_config) @cmock = CMock.new(cmock_config) end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/configurator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/configurator.rb index 0ae4d04a8..8dc11aa5a 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/configurator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/configurator.rb @@ -379,4 +379,3 @@ class Configurator end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_plugins.rb b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_plugins.rb index 75bcd982d..c2e198597 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_plugins.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_plugins.rb @@ -109,7 +109,7 @@ class ConfiguratorPlugins return defaults_with_path end - # gather up and return + # gather up and return def find_plugin_hash_defaults(config, plugin_paths) defaults_hash= [] diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_setup.rb b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_setup.rb index c43bb5c12..cba88df3c 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_setup.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_setup.rb @@ -79,7 +79,7 @@ class ConfiguratorSetup if config[:cmock][:unity_helper] config[:cmock][:unity_helper].each do |path| - validation << @configurator_validator.validate_filepath_simple( path, :cmock, :unity_helper ) + validation << @configurator_validator.validate_filepath_simple( path, :cmock, :unity_helper ) end end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_validator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_validator.rb index fc0210124..fc2950e0b 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_validator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_validator.rb @@ -6,7 +6,7 @@ require 'ceedling/file_path_utils' # for glob handling class methods class ConfiguratorValidator - + constructor :file_wrapper, :stream_wrapper, :system_wrapper # walk into config hash verify existence of data at key depth @@ -16,9 +16,9 @@ class ConfiguratorValidator if (not exist) # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator - @stream_wrapper.stderr_puts("ERROR: Required config file entry #{format_key_sequence(keys, hash[:depth])} does not exist.") + @stream_wrapper.stderr_puts("ERROR: Required config file entry #{format_key_sequence(keys, hash[:depth])} does not exist.") end - + return exist end @@ -33,39 +33,39 @@ class ConfiguratorValidator path_list = [] exist = true - + case list when String then path_list << list when Array then path_list = list end - + path_list.each do |path| base_path = FilePathUtils::extract_path(path) # lop off add/subtract notation & glob specifiers - + if (not @file_wrapper.exist?(base_path)) # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator - @stream_wrapper.stderr_puts("ERROR: Config path #{format_key_sequence(keys, hash[:depth])}['#{base_path}'] does not exist on disk.") + @stream_wrapper.stderr_puts("ERROR: Config path #{format_key_sequence(keys, hash[:depth])}['#{base_path}'] does not exist on disk.") exist = false - end + end end - + return exist end - + # simple path verification def validate_filepath_simple(path, *keys) validate_path = path - + if (not @file_wrapper.exist?(validate_path)) # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator - @stream_wrapper.stderr_puts("ERROR: Config path '#{validate_path}' associated with #{format_key_sequence(keys, keys.size)} does not exist on disk.") + @stream_wrapper.stderr_puts("ERROR: Config path '#{validate_path}' associated with #{format_key_sequence(keys, keys.size)} does not exist on disk.") return false - end - + end + return true end - + # walk into config hash. verify specified file exists. def validate_filepath(config, *keys) hash = retrieve_value(config, keys) @@ -76,21 +76,21 @@ class ConfiguratorValidator # skip everything if we've got an argument replacement pattern return true if (filepath =~ TOOL_EXECUTOR_ARGUMENT_REPLACEMENT_PATTERN) - + if (not @file_wrapper.exist?(filepath)) # See if we can deal with it internally. - if GENERATED_DIR_PATH.include?(filepath) + if GENERATED_DIR_PATH.include?(filepath) # we already made this directory before let's make it again. FileUtils.mkdir_p File.join(File.dirname(__FILE__), filepath) - @stream_wrapper.stderr_puts("WARNING: Generated filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist on disk. Recreating") - + @stream_wrapper.stderr_puts("WARNING: Generated filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist on disk. Recreating") + else # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator @stream_wrapper.stderr_puts("ERROR: Config filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist on disk.") return false end - end + end return true end @@ -106,17 +106,17 @@ class ConfiguratorValidator # skip everything if we've got an argument replacement pattern return true if (filepath =~ TOOL_EXECUTOR_ARGUMENT_REPLACEMENT_PATTERN) - + # if there's no path included, verify file exists somewhere in system search paths if (not filepath.include?('/')) exists = false - + @system_wrapper.search_paths.each do |path| if (@file_wrapper.exist?( File.join(path, filepath)) ) exists = true break end - + if (@file_wrapper.exist?( (File.join(path, filepath)).ext( exe_extension ) )) exists = true break @@ -125,25 +125,25 @@ class ConfiguratorValidator break end end - + if (not exists) # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator - @stream_wrapper.stderr_puts("ERROR: Config filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist in system search paths.") - return false + @stream_wrapper.stderr_puts("ERROR: Config filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist in system search paths.") + return false end - + # if there is a path included, check that explicit filepath exists else if (not @file_wrapper.exist?(filepath)) # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator - @stream_wrapper.stderr_puts("ERROR: Config filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist on disk.") + @stream_wrapper.stderr_puts("ERROR: Config filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist on disk.") return false - end + end end return true end - + def validate_tool_stderr_redirect(config, tools, tool) redirect = config[tools][tool][:stderr_redirect] if (redirect.class == Symbol) @@ -151,17 +151,17 @@ class ConfiguratorValidator if (not StdErrRedirect.constants.map{|constant| constant.to_s}.include?(redirect.to_s.upcase)) error = "ERROR: [:#{tools}][:#{tool}][:stderr_redirect][:#{redirect}] is not a recognized option " + "{#{StdErrRedirect.constants.map{|constant| ':' + constant.to_s.downcase}.join(', ')}}." - @stream_wrapper.stderr_puts(error) - return false + @stream_wrapper.stderr_puts(error) + return false end end - + return true end - + private ######################################### - - + + def retrieve_value(config, keys) value = nil hash = config @@ -178,7 +178,7 @@ class ConfiguratorValidator break end end - + return {:value => value, :depth => depth} end @@ -186,8 +186,8 @@ class ConfiguratorValidator def format_key_sequence(keys, depth) walked_keys = keys.slice(0, depth) formatted_keys = walked_keys.map{|key| "[:#{key.to_s}]"} - + return formatted_keys.join end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/erb_wrapper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/erb_wrapper.rb index 8d70b6d28..dab8d736b 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/erb_wrapper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/erb_wrapper.rb @@ -6,4 +6,4 @@ class ErbWrapper f << ERB.new(template, 0, "<>").result(binding) end end -end \ No newline at end of file +end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/file_finder.rb b/test/unit-test/vendor/ceedling/lib/ceedling/file_finder.rb index 53775b7bb..4a1064c52 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/file_finder.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/file_finder.rb @@ -146,4 +146,3 @@ class FileFinder return @file_finder_helper.find_file_in_collection(file_path, file_list, complain) end end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/file_finder_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/file_finder_helper.rb index a168e5cb5..f2d6a5e91 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/file_finder_helper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/file_finder_helper.rb @@ -4,11 +4,11 @@ require 'ceedling/constants' # for Verbosity enumeration class FileFinderHelper constructor :streaminator - - + + def find_file_in_collection(file_name, file_list, complain, extra_message="") file_to_find = nil - + file_list.each do |item| base_file = File.basename(item) @@ -22,29 +22,29 @@ class FileFinderHelper blow_up(file_name, "However, a filename having different capitalization was found: '#{item}'.") end end - + end - + if file_to_find.nil? case (complain) - when :error then blow_up(file_name, extra_message) + when :error then blow_up(file_name, extra_message) when :warn then gripe(file_name, extra_message) - #when :ignore then + #when :ignore then end end - + return file_to_find end private - + def blow_up(file_name, extra_message="") error = "ERROR: Found no file '#{file_name}' in search paths." error += ' ' if (extra_message.length > 0) @streaminator.stderr_puts(error + extra_message, Verbosity::ERRORS) raise end - + def gripe(file_name, extra_message="") warning = "WARNING: Found no file '#{file_name}' in search paths." warning += ' ' if (extra_message.length > 0) @@ -52,5 +52,3 @@ class FileFinderHelper end end - - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/file_system_utils.rb b/test/unit-test/vendor/ceedling/lib/ceedling/file_system_utils.rb index 97e5856fb..245d8f826 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/file_system_utils.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/file_system_utils.rb @@ -6,7 +6,7 @@ require 'ceedling/file_path_utils' class FileSystemUtils - + constructor :file_wrapper # build up path list from input of one or more strings or arrays of (+/-) paths & globs @@ -14,7 +14,7 @@ class FileSystemUtils raw = [] # all paths and globs plus = Set.new # all paths to expand and add minus = Set.new # all paths to remove from plus set - + # assemble all globs and simple paths, reforming our glob notation to ruby globs paths.each do |paths_container| case (paths_container) @@ -26,29 +26,29 @@ class FileSystemUtils # iterate through each path and glob raw.each do |path| - + dirs = [] # container for only (expanded) paths - + # if a glob, expand it and slurp up all non-file paths if path.include?('*') # grab base directory only if globs are snug up to final path separator if (path =~ /\/\*+$/) dirs << FilePathUtils.extract_path(path) end - + # grab expanded sub-directory globs expanded = @file_wrapper.directory_listing( FilePathUtils.extract_path_no_aggregation_operators(path) ) expanded.each do |entry| dirs << entry if @file_wrapper.directory?(entry) end - + # else just grab simple path # note: we could just run this through glob expansion but such an # approach doesn't handle a path not yet on disk) else dirs << FilePathUtils.extract_path_no_aggregation_operators(path) end - + # add dirs to the appropriate set based on path aggregation modifier if present FilePathUtils.add_path?(path) ? plus.merge(dirs) : minus.merge(dirs) end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/file_system_wrapper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/file_system_wrapper.rb index 807cbd23f..1bb2883ee 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/file_system_wrapper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/file_system_wrapper.rb @@ -7,4 +7,4 @@ class FileSystemWrapper end end -end \ No newline at end of file +end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/flaginator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/flaginator.rb index 31d62c46a..175b3c5ac 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/flaginator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/flaginator.rb @@ -29,25 +29,25 @@ class Flaginator def get_flag(hash, file_name) file_key = file_name.to_sym - + # 1. try literals - literals, magic = partition(hash) { |k, v| k.to_s =~ /^\w+$/ } + literals, magic = partition(hash) { |k, v| k.to_s =~ /^\w+$/ } return literals[file_key] if literals.include?(file_key) - + any, regex = partition(magic) { |k, v| (k == :'*') || (k == :'.*') } # glob or regex wild card - + # 2. try regexes find_res = regex.find { |k, v| file_name =~ /^#{k.to_s}$/ } return find_res[1] if find_res - + # 3. try anything find_res = any.find { |k, v| file_name =~ /.*/ } return find_res[1] if find_res - + # 4. well, we've tried return [] end - + def flag_down( operation, context, file ) # create configurator accessor method accessor = ('flags_' + context.to_s).to_sym diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/generator_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/generator_helper.rb index 343156092..a6682c275 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/generator_helper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/generator_helper.rb @@ -9,7 +9,7 @@ class GeneratorHelper def test_results_error_handler(executable, shell_result) notice = '' error = false - + if (shell_result[:output].nil? or shell_result[:output].strip.empty?) error = true # mirror style of generic tool_executor failure output @@ -24,7 +24,7 @@ class GeneratorHelper "> Produced no final test result counts in $stdout:\n" + "#{shell_result[:output].strip}\n" end - + if (error) # since we told the tool executor to ignore the exit code, handle it explicitly here notice += "> And exited with status: [#{shell_result[:exit_code]}] (count of failed tests).\n" if (shell_result[:exit_code] != nil) @@ -33,8 +33,8 @@ class GeneratorHelper notice += "> This is often a symptom of a bad memory access in source or test code.\n\n" @streaminator.stderr_puts(notice, Verbosity::COMPLAIN) - raise + raise end end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results.rb b/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results.rb index 3af2d720a..2cd96478c 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results.rb @@ -77,7 +77,7 @@ class GeneratorTestResults # handle anything preceding filename in line as extra output to be collected stdout = nil stdout_regex = /(.+)#{Regexp.escape(filename)}.+/i - unity_test_time = 0 + unity_test_time = 0 if (line =~ stdout_regex) stdout = $1.clone diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results_sanity_checker.rb b/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results_sanity_checker.rb index 0b518325b..1d193c844 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results_sanity_checker.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results_sanity_checker.rb @@ -6,34 +6,34 @@ require 'ceedling/constants' class GeneratorTestResultsSanityChecker constructor :configurator, :streaminator - + def verify(results, unity_exit_code) - + # do no sanity checking if it's disabled return if (@configurator.sanity_checks == TestResultsSanityChecks::NONE) raise "results nil or empty" if results.nil? || results.empty? - ceedling_ignores_count = results[:ignores].size + ceedling_ignores_count = results[:ignores].size ceedling_failures_count = results[:failures].size ceedling_tests_summation = (ceedling_ignores_count + ceedling_failures_count + results[:successes].size) - # Exit code handling is not a sanity check that can always be performed because + # Exit code handling is not a sanity check that can always be performed because # command line simulators may or may not pass through Unity's exit code if (@configurator.sanity_checks >= TestResultsSanityChecks::THOROUGH) # many platforms limit exit codes to a maximum of 255 if ((ceedling_failures_count != unity_exit_code) and (unity_exit_code < 255)) sanity_check_warning(results[:source][:file], "Unity's exit code (#{unity_exit_code}) does not match Ceedling's summation of failed test cases (#{ceedling_failures_count}).") end - + if ((ceedling_failures_count < 255) and (unity_exit_code == 255)) sanity_check_warning(results[:source][:file], "Ceedling's summation of failed test cases (#{ceedling_failures_count}) is less than Unity's exit code (255 or more).") end end - + if (ceedling_ignores_count != results[:counts][:ignored]) sanity_check_warning(results[:source][:file], "Unity's final ignore count (#{results[:counts][:ignored]}) does not match Ceedling's summation of ignored test cases (#{ceedling_ignores_count}).") end - + if (ceedling_failures_count != results[:counts][:failed]) sanity_check_warning(results[:source][:file], "Unity's final fail count (#{results[:counts][:failed]}) does not match Ceedling's summation of failed test cases (#{ceedling_failures_count}).") end @@ -41,14 +41,14 @@ class GeneratorTestResultsSanityChecker if (ceedling_tests_summation != results[:counts][:total]) sanity_check_warning(results[:source][:file], "Unity's final test count (#{results[:counts][:total]}) does not match Ceedling's summation of all test cases (#{ceedling_tests_summation}).") end - + end private - + def sanity_check_warning(file, message) unless defined?(CEEDLING_IGNORE_SANITY_CHECK) - notice = "\n" + + notice = "\n" + "ERROR: Internal sanity check for test fixture '#{file.ext(@configurator.extension_executable)}' finds that #{message}\n" + " Possible causes:\n" + " 1. Your test + source dereferenced a null pointer.\n" + @@ -56,7 +56,7 @@ class GeneratorTestResultsSanityChecker " 3. Your test + source committed a memory access violation.\n" + " 4. Your test fixture produced an exit code of 0 despite execution ending prematurely.\n" + " Sanity check failures of test results are usually a symptom of interrupted test execution.\n\n" - + @streaminator.stderr_puts( notice ) raise end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/loginator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/loginator.rb index 92276e1df..38147b322 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/loginator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/loginator.rb @@ -11,7 +11,7 @@ class Loginator config_files.concat( @project_config_manager.options_files ) config_files.compact! config_files.map! { |file| file.ext('') } - + log_name = config_files.join( '_' ) @project_log_filepath = File.join( @configurator.project_log_path, log_name.ext('.log') ) @@ -20,12 +20,12 @@ class Loginator def log(string, heading=nil) return if (not @configurator.project_logging) - + output = "\n[#{@system_wrapper.time_now}]" output += " :: #{heading}" if (not heading.nil?) output += "\n#{string.strip}\n" @file_wrapper.write(@project_log_filepath, output, 'a') end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/makefile.rb b/test/unit-test/vendor/ceedling/lib/ceedling/makefile.rb index c3d7496d2..9ad894ea0 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/makefile.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/makefile.rb @@ -1,6 +1,6 @@ # modified version of Rake's provided make-style dependency loader -# customizations: +# customizations: # (1) handles windows drives in paths -- colons don't confuse task demarcation # (2) handles spaces in directory paths @@ -29,7 +29,7 @@ module Rake file_tasks, args = line.split(/:\s/) return if args.nil? - + # split at non-escaped space boundary between files (i.e. escaped spaces in paths are left alone) dependents = args.split(/\b\s+/) # replace escaped spaces and clean up any extra whitespace diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/objects.yml b/test/unit-test/vendor/ceedling/lib/ceedling/objects.yml index 43bbc066c..d73987f7c 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/objects.yml +++ b/test/unit-test/vendor/ceedling/lib/ceedling/objects.yml @@ -223,7 +223,7 @@ dependinator: - configurator - project_config_manager - test_includes_extractor - - file_path_utils + - file_path_utils - rake_wrapper - file_wrapper diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/par_map.rb b/test/unit-test/vendor/ceedling/lib/ceedling/par_map.rb index 98198a2ce..250b5ad30 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/par_map.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/par_map.rb @@ -16,4 +16,3 @@ def par_map(n, things, &block) end threads.each { |t| t.join } end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/plugin.rb b/test/unit-test/vendor/ceedling/lib/ceedling/plugin.rb index f20b3a3b2..835c08c52 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/plugin.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/plugin.rb @@ -5,7 +5,7 @@ class String def left_margin(margin=0) non_whitespace_column = 0 new_lines = [] - + # find first line with non-whitespace and count left columns of whitespace self.each_line do |line| if (line =~ /^\s*\S/) @@ -13,7 +13,7 @@ class String break end end - + # iterate through each line, chopping off leftmost whitespace columns and add back the desired whitespace margin self.each_line do |line| columns = [] @@ -25,7 +25,7 @@ class String new_lines << "\n" end end - + return new_lines.join end end @@ -74,7 +74,7 @@ class Plugin # whole shebang (any use of Ceedling) def pre_build; end def post_build; end - + def summary; end end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_builder.rb b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_builder.rb index 1269141f1..a010e1d0f 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_builder.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_builder.rb @@ -23,7 +23,7 @@ class PluginBuilder end private - + def camelize(underscored_name) return underscored_name.gsub(/(_|^)([a-z0-9])/) {$2.upcase} end @@ -50,4 +50,4 @@ class PluginBuilder end end -end \ No newline at end of file +end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator.rb index 8d83727ba..afc54494b 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator.rb @@ -2,46 +2,46 @@ require 'ceedling/constants' require 'ceedling/defaults' class PluginReportinator - + constructor :plugin_reportinator_helper, :plugin_manager, :reportinator def setup @test_results_template = nil end - - + + def set_system_objects(system_objects) @plugin_reportinator_helper.ceedling = system_objects end - - + + def fetch_results(results_path, test, options={:boom => false}) return @plugin_reportinator_helper.fetch_results( File.join(results_path, test), options ) end - + def generate_banner(message) return @reportinator.generate_banner(message) end - + def assemble_test_results(results_list, options={:boom => false}) aggregated_results = get_results_structure - - results_list.each do |result_path| + + results_list.each do |result_path| results = @plugin_reportinator_helper.fetch_results( result_path, options ) @plugin_reportinator_helper.process_results(aggregated_results, results) end return aggregated_results end - - + + def register_test_results_template(template) @test_results_template = template if (@test_results_template.nil?) end - - + + def run_test_results_report(hash, verbosity=Verbosity::NORMAL, &block) run_report( $stdout, ((@test_results_template.nil?) ? DEFAULT_TESTS_RESULTS_REPORT_TEMPLATE : @test_results_template), @@ -49,19 +49,19 @@ class PluginReportinator verbosity, &block ) end - - + + def run_report(stream, template, hash=nil, verbosity=Verbosity::NORMAL) failure = nil failure = yield() if block_given? - + @plugin_manager.register_build_failure( failure ) - + @plugin_reportinator_helper.run_report( stream, template, hash, verbosity ) end - + private ############################### - + def get_results_structure return { :successes => [], @@ -72,5 +72,5 @@ class PluginReportinator :time => 0.0 } end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator_helper.rb index 322a530b5..783158797 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator_helper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator_helper.rb @@ -4,11 +4,11 @@ require 'rake' # for ext() require 'ceedling/constants' class PluginReportinatorHelper - + attr_writer :ceedling - + constructor :configurator, :streaminator, :yaml_wrapper, :file_wrapper - + def fetch_results(results_path, options) pass_path = File.join(results_path.ext( @configurator.extension_testpass )) fail_path = File.join(results_path.ext( @configurator.extension_testfail )) @@ -23,7 +23,7 @@ class PluginReportinatorHelper raise end end - + return {} end @@ -47,5 +47,5 @@ class PluginReportinatorHelper output = ERB.new(template, 0, "%<>") @streaminator.stream_puts(stream, output.result(binding()), verbosity) end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb b/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb index 8b89c0b3a..916d31332 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb @@ -94,7 +94,7 @@ class PreprocessinatorIncludesHandler target_file = make_rule.split[0].gsub(':', '').gsub('\\','/') base = File.basename(target_file, File.extname(target_file)) make_rule_dependencies = make_rule.gsub(/.*\b#{Regexp.escape(base)}\S*/, '').gsub(/\\$/, '') - + # Extract the headers dependencies from the make rule hdr_ext = @configurator.extension_header headers_dependencies = make_rule_dependencies.split.find_all {|path| path.end_with?(hdr_ext) }.uniq diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/project_config_manager.rb b/test/unit-test/vendor/ceedling/lib/ceedling/project_config_manager.rb index ed7a73b8c..b1d455127 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/project_config_manager.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/project_config_manager.rb @@ -20,7 +20,7 @@ class ProjectConfigManager def merge_options(config_hash, option_filepath) @options_files << File.basename( option_filepath ) config_hash.deep_merge!( @yaml_wrapper.load( option_filepath ) ) - end + end def filter_internal_sources(sources) diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rake_utils.rb b/test/unit-test/vendor/ceedling/lib/ceedling/rake_utils.rb index 3f667c852..b13749738 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/rake_utils.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/rake_utils.rb @@ -1,6 +1,6 @@ class RakeUtils - + constructor :rake_wrapper def task_invoked?(task_regex) diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/reportinator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/reportinator.rb index 0f583d06d..fcb5286b9 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/reportinator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/reportinator.rb @@ -14,8 +14,8 @@ class Reportinator # ==== Examples # # rp = Reportinator.new - # rp.generate_banner("Hello world!") => "------------\nHello world!\n------------\n" - # rp.generate_banner("Hello world!", 3) => "---\nHello world!\n---\n" + # rp.generate_banner("Hello world!") => "------------\nHello world!\n------------\n" + # rp.generate_banner("Hello world!", 3) => "---\nHello world!\n---\n" # # def generate_banner(message, width=nil) diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_cmock.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_cmock.rake index 70ddcbc2e..51485d3a8 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_cmock.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_cmock.rake @@ -3,7 +3,7 @@ rule(/#{CMOCK_MOCK_PREFIX}[^\/\\]+#{'\\'+EXTENSION_SOURCE}$/ => [ proc do |task_name| @ceedling[:file_finder].find_header_input_for_mock_file(task_name) - end + end ]) do |mock| @ceedling[:generator].generate_mock(TEST_SYM, mock.source) end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake index c29111272..936961ce8 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake @@ -6,7 +6,7 @@ rule(/#{PROJECT_TEST_PREPROCESS_FILES_PATH}\/.+/ => [ proc do |task_name| @ceedling[:file_finder].find_test_or_source_or_header_file(task_name) - end + end ]) do |file| if (not @ceedling[:configurator].project_use_deep_dependencies) raise 'ERROR: Ceedling preprocessing rule invoked though neccessary auxiliary dependency support not enabled.' @@ -19,8 +19,7 @@ end rule(/#{PROJECT_TEST_PREPROCESS_INCLUDES_PATH}\/.+/ => [ proc do |task_name| @ceedling[:file_finder].find_test_or_source_or_header_file(task_name) - end + end ]) do |file| @ceedling[:generator].generate_shallow_includes_list(TEST_SYM, file.source) end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_release.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_release.rake index 4a583bd6c..47eec858f 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_release.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_release.rake @@ -96,4 +96,3 @@ namespace RELEASE_SYM do end end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_release_deep_dependencies.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_release_deep_dependencies.rake index 9550783cc..bf944de25 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_release_deep_dependencies.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_release_deep_dependencies.rake @@ -3,7 +3,7 @@ rule(/#{PROJECT_RELEASE_DEPENDENCIES_PATH}\/#{'.+\\'+EXTENSION_DEPENDENCIES}$/ => [ proc do |task_name| @ceedling[:file_finder].find_compilation_input_file(task_name, :error, true) - end + end ]) do |dep| @ceedling[:generator].generate_dependencies_file( TOOLS_RELEASE_DEPENDENCIES_GENERATOR, @@ -12,4 +12,3 @@ rule(/#{PROJECT_RELEASE_DEPENDENCIES_PATH}\/#{'.+\\'+EXTENSION_DEPENDENCIES}$/ = @ceedling[:file_path_utils].form_release_build_c_object_filepath(dep.source), dep.name) end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests.rake index 61e15e2cc..3ab80f3a9 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests.rake @@ -70,4 +70,3 @@ namespace TEST_SYM do @ceedling[:test_invoker].setup_and_invoke([test.source]) end end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests_deep_dependencies.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests_deep_dependencies.rake index 7175ee3f2..a8dfd296e 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests_deep_dependencies.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests_deep_dependencies.rake @@ -12,4 +12,3 @@ rule(/#{PROJECT_TEST_DEPENDENCIES_PATH}\/#{'.+\\'+EXTENSION_DEPENDENCIES}$/ => [ @ceedling[:file_path_utils].form_test_build_c_object_filepath(dep.source), dep.name) end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/setupinator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/setupinator.rb index ea78fd97e..cf9922f07 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/setupinator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/setupinator.rb @@ -18,7 +18,7 @@ class Setupinator @config_hash = config_hash # load up all the constants and accessors our rake files, objects, & external scripts will need; - # note: configurator modifies the cmock section of the hash with a couple defaults to tie + # note: configurator modifies the cmock section of the hash with a couple defaults to tie # project together - the modified hash is used to build cmock object @ceedling[:configurator].populate_defaults( config_hash ) @ceedling[:configurator].populate_unity_defaults( config_hash ) @@ -31,16 +31,16 @@ class Setupinator @ceedling[:configurator].standardize_paths( config_hash ) @ceedling[:configurator].validate( config_hash ) @ceedling[:configurator].build( config_hash, :environment ) - + @ceedling[:configurator].insert_rake_plugins( @ceedling[:configurator].rake_plugins ) @ceedling[:configurator].tools_supplement_arguments( config_hash ) - + # merge in any environment variables plugins specify, after the main build @ceedling[:plugin_manager].load_plugin_scripts( @ceedling[:configurator].script_plugins, @ceedling ) do |env| @ceedling[:configurator].eval_environment_variables( env ) @ceedling[:configurator].build_supplement( config_hash, env ) end - + @ceedling[:plugin_reportinator].set_system_objects( @ceedling ) @ceedling[:file_finder].prepare_search_sources @ceedling[:loginator].setup_log_filepath diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/stream_wrapper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/stream_wrapper.rb index 7e160527f..2cee58d3e 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/stream_wrapper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/stream_wrapper.rb @@ -16,7 +16,7 @@ class StreamWrapper def stdout_flush $stdout.flush end - + def stderr_puts(string) $stderr.puts(string) end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/streaminator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/streaminator.rb index b8dcd070f..e30440c7d 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/streaminator.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/streaminator.rb @@ -12,7 +12,7 @@ class Streaminator @stream_wrapper.stdout_puts(string) @stream_wrapper.stdout_flush end - + # write to log as though Verbosity::OBNOXIOUS @loginator.log( string, @streaminator_helper.extract_name($stdout) ) end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/streaminator_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/streaminator_helper.rb index 9fb5cc0b7..cbaef7c92 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/streaminator_helper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/streaminator_helper.rb @@ -8,7 +8,7 @@ class StreaminatorHelper when 2 then '#' else stream.inspect end - + return name end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb b/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb index 477aba4f1..81bb7bc54 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb @@ -13,7 +13,7 @@ class SystemUtils constructor :system_wrapper ## - # Sets up the class. + # Sets up the class. def setup @tcsh_shell = nil end @@ -23,7 +23,7 @@ class SystemUtils def tcsh_shell? # once run a single time, return state determined at that execution return @tcsh_shell if not @tcsh_shell.nil? - + result = @system_wrapper.shell_backticks('echo $version') if ((result[:exit_code] == 0) and (result[:output].strip =~ /^tcsh/)) @@ -31,7 +31,7 @@ class SystemUtils else @tcsh_shell = false end - + return @tcsh_shell end end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/task_invoker.rb b/test/unit-test/vendor/ceedling/lib/ceedling/task_invoker.rb index 7bfabbb12..35f92ae03 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/task_invoker.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/task_invoker.rb @@ -11,7 +11,7 @@ class TaskInvoker @release_regexs = [/^#{RELEASE_ROOT_NAME}(:|$)/] @first_run = true end - + def add_test_task_regex(regex) @test_regexs << regex end @@ -19,26 +19,26 @@ class TaskInvoker def add_release_task_regex(regex) @release_regexs << regex end - + def test_invoked? invoked = false - + @test_regexs.each do |regex| invoked = true if (@rake_utils.task_invoked?(regex)) break if invoked end - + return invoked end - + def release_invoked? invoked = false - + @release_regexs.each do |regex| invoked = true if (@rake_utils.task_invoked?(regex)) break if invoked end - + return invoked end @@ -60,7 +60,7 @@ class TaskInvoker @rake_wrapper[mock].invoke } end - + def invoke_test_runner(runner) @dependinator.enhance_runner_dependencies( runner ) reset_rake_task_for_changed_defines( runner ) @@ -112,11 +112,11 @@ class TaskInvoker @rake_wrapper[file].invoke end end - + def invoke_release_objects(objects) par_map(PROJECT_COMPILE_THREADS, objects) do |object| @rake_wrapper[object].invoke end end - + end diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_base.rake b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_base.rake index a35cde75e..67a3b503a 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_base.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_base.rake @@ -113,4 +113,3 @@ task :summary do puts "\nNOTE: Summaries may be out of date with project sources.\n\n" end end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_filesystem.rake b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_filesystem.rake index 7b950ca0b..8263955fa 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_filesystem.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_filesystem.rake @@ -109,5 +109,3 @@ namespace :files do end end - - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_release.rake b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_release.rake index b313b2f53..9d3a59c53 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_release.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_release.rake @@ -5,8 +5,8 @@ require 'ceedling/file_path_utils' desc "Build release target." task RELEASE_SYM => [:directories] do header = "Release build '#{File.basename(PROJECT_RELEASE_BUILD_TARGET)}'" - @ceedling[:streaminator].stdout_puts("\n\n#{header}\n#{'-' * header.length}") - + @ceedling[:streaminator].stdout_puts("\n\n#{header}\n#{'-' * header.length}") + begin @ceedling[:plugin_manager].pre_release @@ -15,16 +15,15 @@ task RELEASE_SYM => [:directories] do @ceedling[:project_config_manager].process_release_config_change core_objects.concat( @ceedling[:release_invoker].setup_and_invoke_c_objects( COLLECTION_ALL_SOURCE ) ) - + # if assembler use isn't enabled, COLLECTION_ALL_ASSEMBLY is empty array & nothing happens core_objects.concat( @ceedling[:release_invoker].setup_and_invoke_asm_objects( COLLECTION_ALL_ASSEMBLY ) ) - + # if we're using libraries, we need to add those to our collection as well library_objects = (defined? LIBRARIES_RELEASE && !LIBRARIES_RELEASE.empty?) ? LIBRARIES_RELEASE.flatten.compact : [] file( PROJECT_RELEASE_BUILD_TARGET => (core_objects + extra_objects + library_objects) ) Rake::Task[PROJECT_RELEASE_BUILD_TARGET].invoke ensure - @ceedling[:plugin_manager].post_release + @ceedling[:plugin_manager].post_release end end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_tests.rake b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_tests.rake index 6c51ebcc9..5c1006b36 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_tests.rake +++ b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_tests.rake @@ -59,4 +59,3 @@ namespace TEST_SYM do end end - diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/test_invoker_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/test_invoker_helper.rb index 403d93e3e..a48edf9f9 100644 --- a/test/unit-test/vendor/ceedling/lib/ceedling/test_invoker_helper.rb +++ b/test/unit-test/vendor/ceedling/lib/ceedling/test_invoker_helper.rb @@ -19,14 +19,14 @@ class TestInvokerHelper yield( dependencies_list ) if block_given? end - + def extract_sources(test) sources = [] includes = @test_includes_extractor.lookup_includes_list(test) - + includes.each { |include| sources << @file_finder.find_compilation_input_file(include, :ignore) } - + return sources.compact end - + end diff --git a/test/unit-test/vendor/ceedling/plugins/beep/lib/beep.rb b/test/unit-test/vendor/ceedling/plugins/beep/lib/beep.rb index 6a6d01ab2..cbc5e3e38 100644 --- a/test/unit-test/vendor/ceedling/plugins/beep/lib/beep.rb +++ b/test/unit-test/vendor/ceedling/plugins/beep/lib/beep.rb @@ -37,4 +37,3 @@ class Beep < Plugin end end end - diff --git a/test/unit-test/vendor/ceedling/plugins/bullseye/README.md b/test/unit-test/vendor/ceedling/plugins/bullseye/README.md index ab0b53b45..aad449204 100644 --- a/test/unit-test/vendor/ceedling/plugins/bullseye/README.md +++ b/test/unit-test/vendor/ceedling/plugins/bullseye/README.md @@ -5,7 +5,7 @@ ceedling-bullseye Plugin for integrating Bullseye code coverage tool into Ceedling projects. This plugin requires a working license to Bullseye code coverage tools. The tools -must be within the path or the path should be added to the environment in the +must be within the path or the path should be added to the environment in the `project.yml file`. ## Configuration diff --git a/test/unit-test/vendor/ceedling/plugins/bullseye/assets/template.erb b/test/unit-test/vendor/ceedling/plugins/bullseye/assets/template.erb index 504f85583..e1ef9874b 100644 --- a/test/unit-test/vendor/ceedling/plugins/bullseye/assets/template.erb +++ b/test/unit-test/vendor/ceedling/plugins/bullseye/assets/template.erb @@ -12,4 +12,3 @@ BRANCHES: <%=sprintf(format_string, hash[:coverage][:branches])%>% % else BRANCHES: none % end - diff --git a/test/unit-test/vendor/ceedling/plugins/bullseye/lib/bullseye.rb b/test/unit-test/vendor/ceedling/plugins/bullseye/lib/bullseye.rb index ffa444ac7..3e7622006 100644 --- a/test/unit-test/vendor/ceedling/plugins/bullseye/lib/bullseye.rb +++ b/test/unit-test/vendor/ceedling/plugins/bullseye/lib/bullseye.rb @@ -38,7 +38,7 @@ class Bullseye < Plugin @ceedling[:plugin_manager].pre_compile_execute(arg_hash) @ceedling[:streaminator].stdout_puts("Compiling #{File.basename(source)} with coverage...") - compile_command = + compile_command = @ceedling[:tool_executor].build_command_line( TOOLS_BULLSEYE_COMPILER, @ceedling[:flaginator].flag_down( OPERATION_COMPILE_SYM, BULLSEYE_SYM, source ), @@ -48,14 +48,14 @@ class Bullseye < Plugin coverage_command = @ceedling[:tool_executor].build_command_line(TOOLS_BULLSEYE_INSTRUMENTATION, [], compile_command[:line] ) shell_result = @ceedling[:tool_executor].exec( coverage_command[:line], coverage_command[:options] ) - + arg_hash[:shell_result] = shell_result @ceedling[:plugin_manager].post_compile_execute(arg_hash) end def post_test_fixture_execute(arg_hash) result_file = arg_hash[:result_file] - + if ((result_file =~ /#{BULLSEYE_RESULTS_PATH}/) and (not @result_list.include?(result_file))) @result_list << arg_hash[:result_file] end @@ -70,13 +70,13 @@ class Bullseye < Plugin :header => BULLSEYE_ROOT_NAME.upcase, :results => results } - + @ceedling[:plugin_reportinator].run_test_results_report(hash) do message = '' message = 'Unit test failures.' if (results[:counts][:failed] > 0) message end - + # coverage results return if (verify_coverage_file() == false) if (@ceedling[:task_invoker].invoked?(/^#{BULLSEYE_TASK_ROOT}(all|delta)/)) @@ -100,13 +100,13 @@ class Bullseye < Plugin } @ceedling[:plugin_reportinator].run_test_results_report(hash) - + # coverage results command = @ceedling[:tool_executor].build_command_line(TOOLS_BULLSEYE_REPORT_COVSRC) shell_result = @ceedling[:tool_executor].exec(command[:line], command[:options]) report_coverage_results_all(shell_result[:output]) end - + def enableBullseye(enable) if BULLSEYE_AUTO_LICENSE if (enable) @@ -117,14 +117,14 @@ class Bullseye < Plugin @ceedling[:streaminator].stdout_puts("Reverting Bullseye to previous state") end - args.each do |arg| + args.each do |arg| command = @ceedling[:tool_executor].build_command_line(TOOLS_BULLSEYE_BUILD_ENABLE_DISABLE, [], arg) shell_result = @ceedling[:tool_executor].exec(command[:line], command[:options]) end end end - + private ################################### def report_coverage_results_all(coverage) @@ -139,7 +139,7 @@ class Bullseye < Plugin if (coverage =~ /^Total.*?=\s+([0-9]+)\%/) results[:coverage][:functions] = $1.to_i end - + if (coverage =~ /^Total.*=\s+([0-9]+)\%\s*$/) results[:coverage][:branches] = $1.to_i end @@ -177,10 +177,10 @@ class Bullseye < Plugin banner = @ceedling[:plugin_reportinator].generate_banner( "#{BULLSEYE_ROOT_NAME.upcase}: CODE COVERAGE SUMMARY" ) @ceedling[:streaminator].stdout_puts "\n" + banner + "\nNo coverage file.\n\n" end - + return exist end - + end @@ -188,7 +188,7 @@ end END { # cache our input configurations to use in comparison upon next execution if (@ceedling[:task_invoker].invoked?(/^#{BULLSEYE_TASK_ROOT}/)) - @ceedling[:cacheinator].cache_test_config( @ceedling[:setupinator].config_hash ) + @ceedling[:cacheinator].cache_test_config( @ceedling[:setupinator].config_hash ) @ceedling[BULLSEYE_SYM].enableBullseye(false) end } diff --git a/test/unit-test/vendor/ceedling/plugins/colour_report/README.md b/test/unit-test/vendor/ceedling/plugins/colour_report/README.md index 4e0fcd45e..5f4ff77b1 100644 --- a/test/unit-test/vendor/ceedling/plugins/colour_report/README.md +++ b/test/unit-test/vendor/ceedling/plugins/colour_report/README.md @@ -3,7 +3,7 @@ ceedling-colour-report ## Overview -The colour_report replaces the normal ceedling "pretty" output with +The colour_report replaces the normal ceedling "pretty" output with a colorized variant, in order to make the results easier to read from a standard command line. This is very useful on developer machines, but can occasionally cause problems with parsing on CI servers. diff --git a/test/unit-test/vendor/ceedling/plugins/command_hooks/lib/command_hooks.rb b/test/unit-test/vendor/ceedling/plugins/command_hooks/lib/command_hooks.rb index 4bf8b5312..67e94f935 100644 --- a/test/unit-test/vendor/ceedling/plugins/command_hooks/lib/command_hooks.rb +++ b/test/unit-test/vendor/ceedling/plugins/command_hooks/lib/command_hooks.rb @@ -89,4 +89,3 @@ class CommandHooks < Plugin end end end - diff --git a/test/unit-test/vendor/ceedling/plugins/compile_commands_json/README.md b/test/unit-test/vendor/ceedling/plugins/compile_commands_json/README.md index ea80b7397..7e3846e56 100644 --- a/test/unit-test/vendor/ceedling/plugins/compile_commands_json/README.md +++ b/test/unit-test/vendor/ceedling/plugins/compile_commands_json/README.md @@ -9,7 +9,7 @@ In June of 2016, Microsoft with Red Hat and Codenvy got together to create a sta For C and C++ projects, many people use the `clangd` backend. So that it can do things like "go to definition", `clangd` needs to know how to build the project so that it can figure out all the pieces to the puzzle. There are manual tools such as `bear` which can be run with `gcc` or `clang` to extract this information it has a big limitation in that if run with `ceedling release` you won't get any auto completion for Unity and you'll also get error messages reported by your IDE because of what it perceives as missing headers. If you do the same with `ceedling test` now you get Unity but you might miss things that are only seen in the release build. -This plugin resolves that issue. As it is run by Ceedling, it has access to all the build information it needs to create the perfect `compile_commands.json`. Once enabled, this plugin will generate that file and place it in `./build/artifacts/compile_commands.json`. `clangd` will search your project for this file, but it is easier to symlink it into the root directory (for example `ln -s ./build/artifacts/compile_commands.json`. +This plugin resolves that issue. As it is run by Ceedling, it has access to all the build information it needs to create the perfect `compile_commands.json`. Once enabled, this plugin will generate that file and place it in `./build/artifacts/compile_commands.json`. `clangd` will search your project for this file, but it is easier to symlink it into the root directory (for example `ln -s ./build/artifacts/compile_commands.json`. For more information on LSP and to find out if your editor supports it, check out https://langserver.org/ diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/Rakefile b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/Rakefile index bc5594110..2fd9f859f 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/Rakefile +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/Rakefile @@ -16,4 +16,4 @@ task :integration_test do end end -task :default => [:spec, :integration_test] \ No newline at end of file +task :default => [:spec, :integration_test] diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml index 6bda22291..00e395d0c 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml @@ -28,7 +28,7 @@ :source: - src/** :support: - + :defines: # in order to add common defines: # 1) remove the trailing [] from the :common: section diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/src/display.c b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/src/display.c index 2f03449b0..797d46878 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/src/display.c +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/src/display.c @@ -4,4 +4,4 @@ void display_turnOffStatusLed(void) { printf("Display: Status LED off"); -} \ No newline at end of file +} diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fff_mock_generator.rb b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fff_mock_generator.rb index 9dc03a653..d439a8d7f 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fff_mock_generator.rb +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fff_mock_generator.rb @@ -90,7 +90,7 @@ class FffMockGenerator # In the init function, reset the FFF globals. These are used for things # like the call history. output.puts " FFF_RESET_HISTORY();" - + # Also, reset all of the fakes. if parsed_header[:functions] parsed_header[:functions].each do |function| diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_header_generator_spec.rb b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_header_generator_spec.rb index e6ac11dd0..09d317551 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_header_generator_spec.rb +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_header_generator_spec.rb @@ -254,7 +254,7 @@ describe "FffMockGenerator.create_mock_header" do ) end end - + context "when there is a function that returns a const int" do let(:mock_header){ parsed_header = {} diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_source_generator_spec.rb b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_source_generator_spec.rb index 364f8521e..7b7f04f58 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_source_generator_spec.rb +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_source_generator_spec.rb @@ -146,4 +146,4 @@ describe "FffMockGenerator.create_mock_source" do ) end end -end \ No newline at end of file +end diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/header_generator.rb b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/header_generator.rb index cda278440..3b6fa7120 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/header_generator.rb +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/header_generator.rb @@ -48,4 +48,4 @@ def create_cmock_style_parsed_header(functions, typedefs = nil) end end parsed_header -end \ No newline at end of file +end diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/src/fff_unity_helper.h b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/src/fff_unity_helper.h index de3db44aa..970ecbb35 100644 --- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/src/fff_unity_helper.h +++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/src/fff_unity_helper.h @@ -30,4 +30,4 @@ fff.call_history[order_], \ "Function " #function_ " not called in order " #order_ ) -#endif \ No newline at end of file +#endif diff --git a/test/unit-test/vendor/ceedling/plugins/gcov/assets/template.erb b/test/unit-test/vendor/ceedling/plugins/gcov/assets/template.erb index 5e5a1742b..266750497 100644 --- a/test/unit-test/vendor/ceedling/plugins/gcov/assets/template.erb +++ b/test/unit-test/vendor/ceedling/plugins/gcov/assets/template.erb @@ -12,4 +12,3 @@ BRANCHES: <%=sprintf(format_string, hash[:coverage][:branches])%>% % else BRANCHES: none % end - diff --git a/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportinator_helper.rb b/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportinator_helper.rb index 92617fba5..10a0a6c5c 100644 --- a/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportinator_helper.rb +++ b/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportinator_helper.rb @@ -5,7 +5,7 @@ class ReportinatorHelper def print_shell_result(shell_result) if !(shell_result.nil?) puts "Done in %.3f seconds." % shell_result[:time] - + if !(shell_result[:output].nil?) && (shell_result[:output].length > 0) puts shell_result[:output] end diff --git a/test/unit-test/vendor/ceedling/plugins/json_tests_report/README.md b/test/unit-test/vendor/ceedling/plugins/json_tests_report/README.md index 8e5a1e571..b383492e2 100644 --- a/test/unit-test/vendor/ceedling/plugins/json_tests_report/README.md +++ b/test/unit-test/vendor/ceedling/plugins/json_tests_report/README.md @@ -3,8 +3,8 @@ json_tests_report ## Overview -The json_tests_report plugin creates a JSON file of test results, which is -handy for Continuous Integration build servers or as input into other +The json_tests_report plugin creates a JSON file of test results, which is +handy for Continuous Integration build servers or as input into other reporting tools. The JSON file is output to the appropriate `/artifacts/` directory (e.g. `artifacts/test/` for test tasks, `artifacts/gcov/` for gcov, or `artifacts/bullseye/` for bullseye runs). diff --git a/test/unit-test/vendor/ceedling/plugins/json_tests_report/lib/json_tests_report.rb b/test/unit-test/vendor/ceedling/plugins/json_tests_report/lib/json_tests_report.rb index e7023db7b..f09339ee2 100644 --- a/test/unit-test/vendor/ceedling/plugins/json_tests_report/lib/json_tests_report.rb +++ b/test/unit-test/vendor/ceedling/plugins/json_tests_report/lib/json_tests_report.rb @@ -33,7 +33,7 @@ class JsonTestsReport < Plugin "IgnoredTests" => write_tests(results[:ignores]), "Summary" => write_statistics(results[:counts]) } - + f << JSON.pretty_generate(json) end end @@ -62,7 +62,7 @@ class JsonTestsReport < Plugin results.each do |result| result[:collection].each do |item| @test_counter += 1 - retval << { + retval << { "file" => File.join(result[:source][:path], result[:source][:file]), "test" => item[:test] } diff --git a/test/unit-test/vendor/ceedling/plugins/module_generator/README.md b/test/unit-test/vendor/ceedling/plugins/module_generator/README.md index a3c2c7ad9..61cf45bd6 100644 --- a/test/unit-test/vendor/ceedling/plugins/module_generator/README.md +++ b/test/unit-test/vendor/ceedling/plugins/module_generator/README.md @@ -96,7 +96,7 @@ put that corporate copyright notice (or maybe a copyleft notice, if that's your ### Test Defines You can specify the "#ifdef TEST" at the top of the test files with a custom define. -This example will put a "#ifdef CEEDLING_TEST" at the top of the test files. +This example will put a "#ifdef CEEDLING_TEST" at the top of the test files. ``` :module_generator: @@ -115,5 +115,3 @@ Your options are as follows: - `:camel` - camelFilesAreSimilarButStartLow - `:snake` - snake_case_is_all_lower_and_uses_underscores - `:caps` - CAPS_FEELS_LIKE_YOU_ARE_SCREAMING - - diff --git a/test/unit-test/vendor/ceedling/plugins/module_generator/config/module_generator.yml b/test/unit-test/vendor/ceedling/plugins/module_generator/config/module_generator.yml index cdb2da2eb..b90afd0ff 100644 --- a/test/unit-test/vendor/ceedling/plugins/module_generator/config/module_generator.yml +++ b/test/unit-test/vendor/ceedling/plugins/module_generator/config/module_generator.yml @@ -1,4 +1,4 @@ :module_generator: :project_root: ./ :source_root: src/ - :test_root: test/ \ No newline at end of file + :test_root: test/ diff --git a/test/unit-test/vendor/ceedling/plugins/stdout_gtestlike_tests_report/README.md b/test/unit-test/vendor/ceedling/plugins/stdout_gtestlike_tests_report/README.md index 9ab60847e..e95106ed1 100644 --- a/test/unit-test/vendor/ceedling/plugins/stdout_gtestlike_tests_report/README.md +++ b/test/unit-test/vendor/ceedling/plugins/stdout_gtestlike_tests_report/README.md @@ -3,8 +3,8 @@ ceedling-stdout-gtestlike-tests-report ## Overview -The stdout_gtestlike_tests_report replaces the normal ceedling "pretty" output with -a variant that resembles the output of gtest. This is most helpful when trying to +The stdout_gtestlike_tests_report replaces the normal ceedling "pretty" output with +a variant that resembles the output of gtest. This is most helpful when trying to integrate into an IDE or CI that is meant to work with google test. ## Setup diff --git a/test/unit-test/vendor/ceedling/plugins/stdout_ide_tests_report/README.md b/test/unit-test/vendor/ceedling/plugins/stdout_ide_tests_report/README.md index ed6c65582..da04d1c14 100644 --- a/test/unit-test/vendor/ceedling/plugins/stdout_ide_tests_report/README.md +++ b/test/unit-test/vendor/ceedling/plugins/stdout_ide_tests_report/README.md @@ -3,7 +3,7 @@ ceedling-stdout-ide-tests-report ## Overview -The stdout_ide_tests_report replaces the normal ceedling "pretty" output with +The stdout_ide_tests_report replaces the normal ceedling "pretty" output with a simplified variant intended to be easily parseable. ## Setup diff --git a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/README.md b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/README.md index 7e1be2382..358aa93ab 100644 --- a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/README.md +++ b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/README.md @@ -5,7 +5,7 @@ ceedling-pretty-tests-report The stdout_pretty_tests_report is the default output of ceedling. Instead of showing most of the raw output of CMock, Ceedling, etc., it shows a simplified -view. It also creates a nice summary at the end of execution which groups the +view. It also creates a nice summary at the end of execution which groups the results into ignored and failed tests. ## Setup diff --git a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/assets/template.erb b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/assets/template.erb index 52b29f7f0..1c025bf1b 100644 --- a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/assets/template.erb +++ b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/assets/template.erb @@ -56,4 +56,3 @@ IGNORED: <%=sprintf(format_string, ignored)%> No tests executed. % end - diff --git a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/lib/stdout_pretty_tests_report.rb b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/lib/stdout_pretty_tests_report.rb index 018388fc1..fd9589183 100644 --- a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/lib/stdout_pretty_tests_report.rb +++ b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/lib/stdout_pretty_tests_report.rb @@ -2,20 +2,20 @@ require 'ceedling/plugin' require 'ceedling/defaults' class StdoutPrettyTestsReport < Plugin - + def setup @result_list = [] @plugin_root = File.expand_path(File.join(File.dirname(__FILE__), '..')) template = @ceedling[:file_wrapper].read(File.join(@plugin_root, 'assets/template.erb')) @ceedling[:plugin_reportinator].register_test_results_template( template ) end - + def post_test_fixture_execute(arg_hash) return if not (arg_hash[:context] == TEST_SYM) - + @result_list << arg_hash[:result_file] end - + def post_build return if not (@ceedling[:task_invoker].test_invoked?) diff --git a/test/unit-test/vendor/ceedling/plugins/subprojects/README.md b/test/unit-test/vendor/ceedling/plugins/subprojects/README.md index e51a4e60e..ef4caa57b 100644 --- a/test/unit-test/vendor/ceedling/plugins/subprojects/README.md +++ b/test/unit-test/vendor/ceedling/plugins/subprojects/README.md @@ -1,9 +1,9 @@ ceedling-subprojects ==================== -Plugin for supporting subprojects that are built as static libraries. It continues to support -dependency tracking, without getting confused between your main project files and your -subproject files. It accepts different compiler flags and linker flags, allowing you to +Plugin for supporting subprojects that are built as static libraries. It continues to support +dependency tracking, without getting confused between your main project files and your +subproject files. It accepts different compiler flags and linker flags, allowing you to optimize for your situation. First, you're going to want to add the extension to your list of known extensions: @@ -13,12 +13,12 @@ First, you're going to want to add the extension to your list of known extension :subprojects: '.a' ``` -Define a new section called :subprojects. There, you can list as many subprojects -as you may need under the :paths key. For each, you specify a unique place to build +Define a new section called :subprojects. There, you can list as many subprojects +as you may need under the :paths key. For each, you specify a unique place to build and a unique name. ``` -:subprojects: +:subprojects: :paths: - :name: libprojectA :source: @@ -27,7 +27,7 @@ and a unique name. :include: - ./subprojectA/include/dir :build_root: ./subprojectA/build/dir - :defines: + :defines: - DEFINE_JUST_FOR_THIS_FILE - AND_ANOTHER - :name: libprojectB diff --git a/test/unit-test/vendor/ceedling/plugins/subprojects/subprojects.rake b/test/unit-test/vendor/ceedling/plugins/subprojects/subprojects.rake index 0025c3ecd..f80c812f3 100644 --- a/test/unit-test/vendor/ceedling/plugins/subprojects/subprojects.rake +++ b/test/unit-test/vendor/ceedling/plugins/subprojects/subprojects.rake @@ -73,6 +73,5 @@ SUBPROJECTS_PATHS.each do |subproj| task :directories => subproj_directories.clone # Finally, add the static library to our RELEASE build dependency list - task RELEASE_SYM => ["#{subproj_build_root}/#{subproj_name}#{EXTENSION_SUBPROJECTS}"] + task RELEASE_SYM => ["#{subproj_build_root}/#{subproj_name}#{EXTENSION_SUBPROJECTS}"] end - diff --git a/test/unit-test/vendor/ceedling/plugins/teamcity_tests_report/README.md b/test/unit-test/vendor/ceedling/plugins/teamcity_tests_report/README.md index 9fcda7d5b..2467ebe99 100644 --- a/test/unit-test/vendor/ceedling/plugins/teamcity_tests_report/README.md +++ b/test/unit-test/vendor/ceedling/plugins/teamcity_tests_report/README.md @@ -3,7 +3,7 @@ ceedling-teamcity-tests-report ## Overview -The teamcity_tests_report replaces the normal ceedling "pretty" output with +The teamcity_tests_report replaces the normal ceedling "pretty" output with a version that has results tagged to be consumed with the teamcity CI server. ## Setup diff --git a/test/unit-test/vendor/ceedling/vendor/c_exception/lib/CException.c b/test/unit-test/vendor/ceedling/vendor/c_exception/lib/CException.c index fdff8f475..24b3b09e8 100644 --- a/test/unit-test/vendor/ceedling/vendor/c_exception/lib/CException.c +++ b/test/unit-test/vendor/ceedling/vendor/c_exception/lib/CException.c @@ -43,4 +43,3 @@ void Throw(CEXCEPTION_T ExceptionID) } <- finish off that local scope we created to have our own variables if (CExceptionFrames[CEXCEPTION_GET_ID].Exception != CEXCEPTION_NONE) <- start the actual 'catch' processing if we have an exception id saved away */ - diff --git a/test/unit-test/vendor/ceedling/vendor/c_exception/lib/meson.build b/test/unit-test/vendor/ceedling/vendor/c_exception/lib/meson.build index 2770122af..9694e51c7 100644 --- a/test/unit-test/vendor/ceedling/vendor/c_exception/lib/meson.build +++ b/test/unit-test/vendor/ceedling/vendor/c_exception/lib/meson.build @@ -6,6 +6,6 @@ # cexception_dir = include_directories('.') -cexception_lib = static_library(meson.project_name(), +cexception_lib = static_library(meson.project_name(), files('CException.c'), include_directories : cexception_dir) diff --git a/test/unit-test/vendor/ceedling/vendor/cmock/src/cmock.c b/test/unit-test/vendor/ceedling/vendor/cmock/src/cmock.c index 88f2c2b25..d8bdb1369 100644 --- a/test/unit-test/vendor/ceedling/vendor/cmock/src/cmock.c +++ b/test/unit-test/vendor/ceedling/vendor/cmock/src/cmock.c @@ -213,4 +213,3 @@ void CMock_Guts_MemFreeFinal(void) } #endif } - diff --git a/test/unit-test/vendor/ceedling/vendor/cmock/src/meson.build b/test/unit-test/vendor/ceedling/vendor/cmock/src/meson.build index c03c4e5bb..b3145c02e 100644 --- a/test/unit-test/vendor/ceedling/vendor/cmock/src/meson.build +++ b/test/unit-test/vendor/ceedling/vendor/cmock/src/meson.build @@ -6,7 +6,7 @@ # cmock_dir = include_directories('.') -cmock_lib = static_library(meson.project_name(), +cmock_lib = static_library(meson.project_name(), files('cmock.c'), dependencies: [unity_dep], include_directories: cmock_dir) diff --git a/test/unit-test/vendor/ceedling/vendor/diy/lib/diy.rb b/test/unit-test/vendor/ceedling/vendor/diy/lib/diy.rb index 581afc7e6..cbeb8267a 100644 --- a/test/unit-test/vendor/ceedling/vendor/diy/lib/diy.rb +++ b/test/unit-test/vendor/ceedling/vendor/diy/lib/diy.rb @@ -18,8 +18,8 @@ module DIY #:nodoc:# raise "Nil context hash" unless context_hash raise "Need a hash" unless context_hash.kind_of?(Hash) [ "[]", "keys" ].each do |mname| - unless extra_inputs.respond_to?(mname) - raise "Extra inputs must respond to hash-like [] operator and methods #keys and #each" + unless extra_inputs.respond_to?(mname) + raise "Extra inputs must respond to hash-like [] operator and methods #keys and #each" end end @@ -37,7 +37,7 @@ module DIY #:nodoc:# @cache = {} @cache['this_context'] = self end - + # Convenience: create a new DIY::Context by loading from a String (or open file handle.) def self.from_yaml(io_or_string, extra_inputs={}) @@ -51,7 +51,7 @@ module DIY #:nodoc:# self.from_yaml(File.read(fname), extra_inputs) end - # Return a reference to the object named. If necessary, the object will + # Return a reference to the object named. If necessary, the object will # be instantiated on first use. If the object is non-singleton, a new # object will be produced each time. def get_object(obj_name) @@ -77,7 +77,7 @@ module DIY #:nodoc:# end alias :[] :get_object - # Inject a named object into the Context. This must be done before the Context has instantiated the + # Inject a named object into the Context. This must be done before the Context has instantiated the # object in question. def set_object(obj_name,obj) key = obj_name.to_s @@ -108,9 +108,9 @@ module DIY #:nodoc:# @defs.keys.member?(key) or extra_inputs_has(key) end - # Every top level object in the Context is instantiated. This is especially useful for + # Every top level object in the Context is instantiated. This is especially useful for # systems that have "floating observers"... objects that are never directly accessed, who - # would thus never be instantiated by coincedence. This does not build any subcontexts + # would thus never be instantiated by coincedence. This does not build any subcontexts # that may exist. def build_everything @defs.keys.each { |k| self[k] } @@ -131,7 +131,7 @@ module DIY #:nodoc:# # we modify the info hash below so it's important to have a new # instance to play with info = info.dup if info - + # see if we are building a factory if info and info.has_key?('builds') unless info.has_key?('auto_require') @@ -150,21 +150,21 @@ module DIY #:nodoc:# name = name.to_s case name - when /^\+/ + when /^\+/ # subcontext @sub_context_defs[name.gsub(/^\+/,'')] = info - + when /^using_namespace/ # namespace: use a module(s) prefix for the classname of contained object defs # NOTE: namespacing is NOT scope... it's just a convenient way to setup class names for a group of objects. get_defs_from info, parse_namespace(name) when /^method\s/ key_name = name.gsub(/^method\s/, "") - @defs[key_name] = MethodDef.new(:name => key_name, - :object => info['object'], + @defs[key_name] = MethodDef.new(:name => key_name, + :object => info['object'], :method => info['method'], :attach => info['attach']) - else + else # Normal object def info ||= {} if extra_inputs_has(name) @@ -173,14 +173,14 @@ module DIY #:nodoc:# unless info.has_key?('auto_require') info['auto_require'] = self.class.auto_require end - if namespace + if namespace if info['class'] info['class'] = namespace.build_classname(info['class']) else info['class'] = namespace.build_classname(name) end end - + @defs[name] = ObjectDef.new(:name => name, :info => info) end @@ -191,10 +191,10 @@ module DIY #:nodoc:# method_definition = @defs[key] object = get_object(method_definition.object) method = object.method(method_definition.method) - + unless method_definition.attach.nil? instance_var_name = "@__diy_#{method_definition.object}" - + method_definition.attach.each do |object_key| get_object(object_key).instance_eval do instance_variable_set(instance_var_name, object) @@ -202,14 +202,14 @@ module DIY #:nodoc:# #{instance_var_name}.#{method_definition.method}(*args) end| end - end + end end - + return method rescue Exception => oops build_and_raise_construction_error(key, oops) end - + def construct_object(key) # Find the object definition obj_def = @defs[key] @@ -242,13 +242,13 @@ module DIY #:nodoc:# rescue Exception => oops build_and_raise_construction_error(key, oops) end - + def build_and_raise_construction_error(key, oops) cerr = ConstructionError.new(key,oops) cerr.set_backtrace(oops.backtrace) raise cerr end - + def get_class_for_name_with_module_delimeters(class_name) class_name.split(/::/).inject(Object) do |mod,const_name| mod.const_get(const_name) end end @@ -264,7 +264,7 @@ module DIY #:nodoc:# Namespace.new(str) end end - + class Namespace #:nodoc:# def initialize(str) # 'using_namespace Animal Reptile' @@ -292,15 +292,15 @@ module DIY #:nodoc:# @name = obj_name end end - + class MethodDef #:nodoc: attr_accessor :name, :object, :method, :attach - + def initialize(opts) @name, @object, @method, @attach = opts[:name], opts[:object], opts[:method], opts[:attach] end end - + class ObjectDef #:nodoc: attr_accessor :name, :class_name, :library, :components def initialize(opts) @@ -330,7 +330,7 @@ module DIY #:nodoc:# # Use Class Directly @use_class_directly = info.delete 'use_class_directly' - + # Auto-compose compose = info.delete 'compose' if compose @@ -380,7 +380,7 @@ module DIY #:nodoc:# object_name = object_name cause = cause m = "Failed to construct '#{object_name}'" - if cause + if cause m << "\n ...caused by:\n >>> #{cause}" end super m @@ -388,11 +388,11 @@ module DIY #:nodoc:# end class NamespaceError < RuntimeError #:nodoc:# - end + end module Infl #:nodoc:# # Ganked this from Inflector: - def self.camelize(lower_case_and_underscored_word) + def self.camelize(lower_case_and_underscored_word) lower_case_and_underscored_word.to_s.gsub(/\/(.?)/) { "::" + $1.upcase }.gsub(/(^|_)(.)/) { $2.upcase } end # Ganked this from Inflector: diff --git a/test/unit-test/vendor/ceedling/vendor/diy/lib/diy/factory.rb b/test/unit-test/vendor/ceedling/vendor/diy/lib/diy/factory.rb index d2566c5d1..8f00e5e45 100644 --- a/test/unit-test/vendor/ceedling/vendor/diy/lib/diy/factory.rb +++ b/test/unit-test/vendor/ceedling/vendor/diy/lib/diy/factory.rb @@ -1,7 +1,7 @@ module DIY #:nodoc:# class FactoryDef #:nodoc: attr_accessor :name, :target, :class_name, :library - + def initialize(opts) @name, @target, @library, @auto_require = opts[:name], opts[:target], opts[:library], opts[:auto_require] @@ -10,7 +10,7 @@ module DIY #:nodoc:# @library ||= Infl.underscore(@class_name) if @auto_require end end - + class Context def construct_factory(key) factory_def = @defs[key] @@ -33,4 +33,3 @@ module DIY #:nodoc:# end end end - diff --git a/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_config.yml b/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_config.yml index 4a5e47424..c7679aefc 100644 --- a/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_config.yml +++ b/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_config.yml @@ -18,7 +18,7 @@ - Defs.h - Board.h - Exception.h - :boilerplates: + :boilerplates: #these are inserted at the top of generated files. #just comment out or remove if not desired. #use %1$s where you would like the file name to appear (path/extension not included) diff --git a/test/unit-test/vendor/ceedling/vendor/unity/src/meson.build b/test/unit-test/vendor/ceedling/vendor/unity/src/meson.build index 1c7b426ff..5acd51a9b 100644 --- a/test/unit-test/vendor/ceedling/vendor/unity/src/meson.build +++ b/test/unit-test/vendor/ceedling/vendor/unity/src/meson.build @@ -6,6 +6,6 @@ # unity_dir = include_directories('.') -unity_lib = static_library(meson.project_name(), +unity_lib = static_library(meson.project_name(), files('unity.c'), include_directories: unity_dir) diff --git a/tools/build_board.py b/tools/build_board.py index 4593dafa5..13376d126 100644 --- a/tools/build_board.py +++ b/tools/build_board.py @@ -56,7 +56,7 @@ if __name__ == '__main__': result = pool.starmap(build_utils.build_example, pool_args) # sum all element of same index (column sum) result = list(map(sum, list(zip(*result)))) - + # add to total result total_result = list(map(lambda x, y: x + y, total_result, result)) diff --git a/tools/build_utils.py b/tools/build_utils.py index de9052d2d..d0ef52717 100644 --- a/tools/build_utils.py +++ b/tools/build_utils.py @@ -124,4 +124,4 @@ def build_size(make_cmd): sram_size = int(size_list[1]) + int(size_list[2]) return (flash_size, sram_size) - return (0, 0) \ No newline at end of file + return (0, 0) diff --git a/tools/iar_template.ipcf b/tools/iar_template.ipcf index ba54fe057..d243aab0a 100644 --- a/tools/iar_template.ipcf +++ b/tools/iar_template.ipcf @@ -141,5 +141,5 @@ $TUSB_DIR$/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_IAR.c - + diff --git a/tools/mksunxi.py b/tools/mksunxi.py index 04786f429..fd8557cfc 100644 --- a/tools/mksunxi.py +++ b/tools/mksunxi.py @@ -45,4 +45,4 @@ if __name__ == "__main__": if len(sys.argv) != 3: print("Usage: mksunxi.py input.bin output.bin") exit(1) - exit(process_file(sys.argv[1], sys.argv[2])) \ No newline at end of file + exit(process_file(sys.argv[1], sys.argv[2])) diff --git a/tools/pcapng_to_corpus.py b/tools/pcapng_to_corpus.py index 78b1f77a2..9c31365eb 100755 --- a/tools/pcapng_to_corpus.py +++ b/tools/pcapng_to_corpus.py @@ -16,7 +16,7 @@ def extract_packets(pcap_file): def build_corpus_zip(zip_file_output, packets): """Builds a zip file with a file per packet - + The structure of this zip corpus is a simple content addressable storage i.e. seed_file_name == sha256_digest(packet). """ @@ -25,7 +25,7 @@ def build_corpus_zip(zip_file_output, packets): hash = hashlib.sha256(packet).hexdigest() if hash not in out.namelist(): out.writestr(hash, packet) - + def main(pcap_file, output_zip_file): packets = extract_packets(pcap_file) @@ -35,12 +35,10 @@ if __name__ == "__main__": parser = argparse.ArgumentParser( prog = "pcapng_to_corpus.py", description="""Converts a wireshark capture to a zip of binary packet - files suitable for an oss-fuzz corpus. In the case the - zip corpus already exists, this script will modify + files suitable for an oss-fuzz corpus. In the case the + zip corpus already exists, this script will modify the zip file in place adding seed entries.""") parser.add_argument('pcapng_capture_file') parser.add_argument('oss_fuzz_corpus_zip') args = parser.parse_args() main(args.pcapng_capture_file, args.oss_fuzz_corpus_zip) - - diff --git a/tools/usb_drivers/tinyusb_win_usbser.inf b/tools/usb_drivers/tinyusb_win_usbser.inf index e7f7a9b22..659f048ae 100644 --- a/tools/usb_drivers/tinyusb_win_usbser.inf +++ b/tools/usb_drivers/tinyusb_win_usbser.inf @@ -105,4 +105,4 @@ DRIVERFILENAME ="usbser" MFGNAME="tinyusb.org" INSTDISK="tinyusb CDC Driver" DESCRIPTION="tinyusb Serial" -SERVICE="USB RS-232 Emulation Driver" \ No newline at end of file +SERVICE="USB RS-232 Emulation Driver" -- cgit v1.3.1 From d919f107c71021b2dfa20cd9bfe252c4f544422f Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 18 Mar 2023 11:22:44 +0700 Subject: minor clean up --- examples/device/uac2_headset/src/usb_descriptors.h | 8 ++++---- examples/device/usbtmc/src/usbtmc_app.c | 1 - src/class/video/video.h | 2 +- src/common/tusb_compiler.h | 2 +- src/device/usbd.h | 8 ++++---- 5 files changed, 10 insertions(+), 11 deletions(-) (limited to 'src/common') diff --git a/examples/device/uac2_headset/src/usb_descriptors.h b/examples/device/uac2_headset/src/usb_descriptors.h index 2069cc975..457e69882 100644 --- a/examples/device/uac2_headset/src/usb_descriptors.h +++ b/examples/device/uac2_headset/src/usb_descriptors.h @@ -114,7 +114,7 @@ enum /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_RX),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_MILLISEC, /*_lockdelay*/ 0x0001),\ /* Interface 1, Alternate 2 - alternate interface for data streaming */\ @@ -124,7 +124,7 @@ enum /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_RX),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_MILLISEC, /*_lockdelay*/ 0x0001),\ /* Standard AS Interface Descriptor(4.9.1) */\ @@ -138,7 +138,7 @@ enum /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_TX),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\ /* Interface 2, Alternate 2 - alternate interface for data streaming */\ @@ -148,7 +148,7 @@ enum /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_TX),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000) diff --git a/examples/device/usbtmc/src/usbtmc_app.c b/examples/device/usbtmc/src/usbtmc_app.c index f1596f6d0..72989b4fe 100644 --- a/examples/device/usbtmc/src/usbtmc_app.c +++ b/examples/device/usbtmc/src/usbtmc_app.c @@ -242,7 +242,6 @@ void usbtmc_app_task_iter(void) { break; default: TU_ASSERT(false,); - return; } } diff --git a/src/class/video/video.h b/src/class/video/video.h index 40dae4c1a..c0088c4f6 100644 --- a/src/class/video/video.h +++ b/src/class/video/video.h @@ -549,7 +549,7 @@ TU_VERIFY_STATIC( sizeof(video_probe_and_commit_control_t) == 48, "size is not c /* 3.10.1.1 */ #define TUD_VIDEO_DESC_EP_ISO(_ep, _epsize, _ep_interval) \ - 7, TUSB_DESC_ENDPOINT, _ep, (uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS,\ + 7, TUSB_DESC_ENDPOINT, _ep, (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS),\ U16_TO_U8S_LE(_epsize), _ep_interval /* 3.10.1.2 */ diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index cea876413..713bbb8d4 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -196,7 +196,7 @@ #define TU_ATTR_DEPRECATED(mess) __attribute__ ((deprecated(mess))) // warn if function with this attribute is used #define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused #define TU_ATTR_USED __attribute__ ((used)) // Function/Variable is meant to be used - #define TU_ATTR_FALLTHROUGH + #define TU_ATTR_FALLTHROUGH do {} while (0) /* fallthrough */ #define TU_ATTR_PACKED_BEGIN #define TU_ATTR_PACKED_END diff --git a/src/device/usbd.h b/src/device/usbd.h index 7bb9f916b..255e5a844 100644 --- a/src/device/usbd.h +++ b/src/device/usbd.h @@ -420,7 +420,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */ #define TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN 7 #define TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(_ep, _interval) \ - TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN, TUSB_DESC_ENDPOINT, _ep, ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_NO_SYNC | TUSB_ISO_EP_ATT_EXPLICIT_FB), U16_TO_U8S_LE(4), _interval + TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN, TUSB_DESC_ENDPOINT, _ep, (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_NO_SYNC | TUSB_ISO_EP_ATT_EXPLICIT_FB), U16_TO_U8S_LE(4), _interval // AUDIO simple descriptor (UAC2) for 1 microphone input // - 1 Input Terminal, 1 Feature Unit (Mute and Volume Control), 1 Output Terminal, 1 Clock Source @@ -467,7 +467,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000) @@ -516,7 +516,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000) @@ -564,7 +564,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\ TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\ /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\ - TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ + TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\ /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\ TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\ /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */\ -- cgit v1.3.1 From f9b8a0667a2cc42a6c6521c51bba695ca8e9e28f Mon Sep 17 00:00:00 2001 From: Bob Paddock Date: Mon, 16 Jan 2023 15:05:31 -0500 Subject: Add support for NXP FRDM_K32L2A4S eval board. --- hw/bsp/board_mcu.h | 2 +- hw/bsp/frdm_k32l2a4s/README.rst | 51 +++++++++++ hw/bsp/frdm_k32l2a4s/board.h | 58 ++++++++++++ hw/bsp/frdm_k32l2a4s/board.mk | 80 ++++++++++++++++ hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c | 171 +++++++++++++++++++++++++++++++++++ src/common/tusb_mcu.h | 2 +- src/portable/nxp/khci/dcd_khci.c | 9 +- src/portable/nxp/khci/hcd_khci.c | 9 +- src/tusb_option.h | 1 + 9 files changed, 375 insertions(+), 8 deletions(-) create mode 100644 hw/bsp/frdm_k32l2a4s/README.rst create mode 100644 hw/bsp/frdm_k32l2a4s/board.h create mode 100644 hw/bsp/frdm_k32l2a4s/board.mk create mode 100644 hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c (limited to 'src/common') diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index b34197e6c..920e7d0d9 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -47,7 +47,7 @@ #elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX || CFG_TUSB_MCU == OPT_MCU_LPC54XXX || \ CFG_TUSB_MCU == OPT_MCU_LPC55XX || CFG_TUSB_MCU == OPT_MCU_MKL25ZXX || \ - CFG_TUSB_MCU == OPT_MCU_K32L2BXX + CFG_TUSB_MCU == OPT_MCU_K32L2AXX || OPT_MCU_K32L2BXX #include "fsl_device_registers.h" #elif CFG_TUSB_MCU == OPT_MCU_NRF5X diff --git a/hw/bsp/frdm_k32l2a4s/README.rst b/hw/bsp/frdm_k32l2a4s/README.rst new file mode 100644 index 000000000..68ab409c3 --- /dev/null +++ b/hw/bsp/frdm_k32l2a4s/README.rst @@ -0,0 +1,51 @@ +Jan/13/2023 13:04 + +The FRDM-K32L2B3 Freedom development board provides a platform for +evaluation and development of the K32 L2B MCU Family. - +https://www.nxp.com/part/FRDM-K32L2B3#/ + +TinyUSB does not include the board specific drivers. Those drivers +need to be extracted from the MCUXpresso IDE and SDK. + +Install MCUXPresso version 11.6 or later and SDK 2.12 or later. Then +build the example project "frdmk32l2b_hellow_worldvirual_com". + +From the frdmk32l2b_hellow_worldvirual_com project copy these files to +this directory structure, in this directory: + +hw/mcu/nxp/mcux-sdk/devices/K32L2B31A + +CMSIS/ +config/ +drivers/ +gcc/ +fsl_device_registers.h +K32L2B31A_features.h +K32L2B31A.h + +./CMSIS: +cmsis_armcc.h cmsis_armclang_ltm.h cmsis_gcc.h cmsis_version.h mpu_armv7.h +cmsis_armclang.h cmsis_compiler.h cmsis_iccarm.h core_cm0plus.h + +./config: +clock_config.c clock_config.h system_K32L2B31A.c system_K32L2B31A.h + +./drivers: +fsl_clock.c fsl_common_arm.h fsl_gpio.c fsl_lpuart.h fsl_smc.h +fsl_clock.h fsl_common.c fsl_gpio.h fsl_port.h fsl_uart.c +fsl_common_arm.c fsl_common.h fsl_lpuart.c fsl_smc.c fsl_uart.h + +./gcc: +frdmk32l2b.ld startup_k32l2b31a.c +frdmk32l2b_library.ld frdmk32l2b_memory.ld + +The linker files have been renamed and the #include directive edited +to match. + +Then to build a test project change to the directory +examples/devices/cdc_msc and do: + +make BOARD=frdm_k32l2b + +The resulting .hex file will be found in the _build directory, copy +that will to the FRDM board to run the demo. diff --git a/hw/bsp/frdm_k32l2a4s/board.h b/hw/bsp/frdm_k32l2a4s/board.h new file mode 100644 index 000000000..14eefda17 --- /dev/null +++ b/hw/bsp/frdm_k32l2a4s/board.h @@ -0,0 +1,58 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + + +#ifndef BOARD_H_ +#define BOARD_H_ + +#include "fsl_device_registers.h" + +// LED +// The Red LED is on PTE29. +// The Green LED is on PTC4. +// The Blue LED is on PTE31. +#define LED_PIN_CLOCK kCLOCK_PortC +#define LED_GPIO GPIOC +#define LED_PORT PORTC +#define LED_PIN 4 +#define LED_STATE_ON 0 + +// SW3 button1 +#define BUTTON_PIN_CLOCK kCLOCK_PortE +#define BUTTON_GPIO GPIOE +#define BUTTON_PORT PORTE +#define BUTTON_PIN 4 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_PORT LPUART0 +#define UART_PIN_CLOCK kCLOCK_PortB +#define UART_PIN_GPIO GPIOB +#define UART_PIN_PORT PORTB +#define UART_PIN_RX 16u +#define UART_PIN_TX 17u + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/frdm_k32l2a4s/board.mk b/hw/bsp/frdm_k32l2a4s/board.mk new file mode 100644 index 000000000..e9e606fe6 --- /dev/null +++ b/hw/bsp/frdm_k32l2a4s/board.mk @@ -0,0 +1,80 @@ + +# Default to a less-verbose build. If you want all the gory compiler output, +# "VERBOSE=1" to the make command line. +ifndef VERBOSE +.SILENT: +$(info Non-Verbose Output) +else +$(info Verbose Output) +endif + +SDK_DIR = hw/mcu/nxp/mcux-sdk +MCU_DIR = $(SDK_DIR)/devices/K32L2A4S + +ifdef VERBOSE +$(info TOP='$(TOP)') +$(info ) + +$(info BSP='$(TOP)/hw/bsp/$(BOARD)') +$(info ) + +$(info TOP/SDK_DIR='$(TOP)/$(SDK_DIR)') +$(info ) + +$(info MCU_DIR='$(MCU_DIR)') +$(info ) +endif + +DEPS_SUBMODULES += $(SDK_DIR) + +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m0plus \ + -DCPU_K32L2A41VLH1A \ + -DCFG_TUSB_MCU=OPT_MCU_K32L2AXX + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual + +# All source paths should be relative to the top level. + +LD_FILE = $(MCU_DIR)/gcc/frdmk32l2a4s.ld +LDFLAGS += -L$(TOP)/$(MCU_DIR)/gcc + +# Define Recursive Depth wildcard: +rwildcard=$(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2) $(filter $(subst *,%,$2),$d)) + +SRC_C += \ + src/portable/nxp/khci/dcd_khci.c \ + $(MCU_DIR)/gcc/startup_k32l2a41a.c + +SRC_C += $(call rwildcard,$(TOP)/$(MCU_DIR)/config,*.c) +SRC_C += $(call rwildcard,$(TOP)/$(MCU_DIR)/drivers,*.c) + +INC += \ + $(TOP)/hw/bsp/$(BOARD) \ + $(TOP)/$(MCU_DIR)/CMSIS/ \ + $(TOP)/$(MCU_DIR) \ + $(TOP)/$(MCU_DIR)/config \ + $(TOP)/$(MCU_DIR)/drivers + +ifdef VERBOSE +$(info INC = '$(strip $(INC))') +$(info ) + +$(info SRC_C = '$(sort $(strip $(SRC_C)))') +$(info ) +endif + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM0 + +# For flash-jlink target +#JLINK_DEVICE = ? + +# For flash-pyocd target +PYOCD_TARGET = K32L2A + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c new file mode 100644 index 000000000..47dd0c8ec --- /dev/null +++ b/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c @@ -0,0 +1,171 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * Copyright (c) 2020, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "../board.h" +#include "board.h" +#include "fsl_gpio.h" +#include "fsl_port.h" +#include "fsl_clock.h" +#include "fsl_lpuart.h" + +#include "clock_config.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ + tud_int_handler(0); +} + +void board_init(void) +{ + /* Enable port clocks for UART/LED/Button pins */ + CLOCK_EnableClock(UART_PIN_CLOCK); + CLOCK_EnableClock(LED_PIN_CLOCK); + CLOCK_EnableClock(BUTTON_PIN_CLOCK); + + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit(LED_GPIO, LED_PIN, &led_config); + PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); + + gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); + const port_pin_config_t BUTTON_CFG = { + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_OpenDrainDisable, + kPORT_LowDriveStrength, + kPORT_MuxAsGpio, + kPORT_UnlockRegister + }; + PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); + + /* + Enable LPUART0 clock and configure port pins. + FIR clock is being used so the USB examples work. + */ + PCC_LPUART0 = 0U; /* Clock must be off to set PCS */ + PCC_LPUART0 = PCC_CLKCFG_PCS( 3U ); /* Select the clock. 1:OSCCLK/Bus Clock, 2:Slow IRC, 3: Fast IRC, 6: System PLL */ + PCC_LPUART0 |= PCC_CLKCFG_CGC( 1U ); /* Enable LPUART */ + + /* PORTB16 (pin 62) is configured as LPUART0_RX */ + gpio_pin_config_t const lpuart_config_rx = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(UART_PIN_GPIO, UART_PIN_RX, &lpuart_config_rx); + const port_pin_config_t UART_CFG = { + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_OpenDrainDisable, + kPORT_LowDriveStrength, + kPORT_MuxAsGpio, + kPORT_UnlockRegister + }; + PORT_SetPinConfig(UART_PIN_PORT, UART_PIN_RX, &UART_CFG); + PORT_SetPinMux( UART_PIN_PORT, UART_PIN_RX, kPORT_MuxAlt3); + + /* PORTB17 (pin 63) is configured as LPUART0_TX */ + gpio_pin_config_t const lpuart_config_tx = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit( UART_PIN_GPIO, UART_PIN_TX, &lpuart_config_tx); + PORT_SetPinMux( UART_PIN_PORT, UART_PIN_TX, kPORT_MuxAlt3); + + BOARD_BootClockRUN(); + SystemCoreClockUpdate(); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + lpuart_config_t uart_config; + LPUART_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_ScgFircClk)); + + // USB + CLOCK_EnableUsbfs0Clock(kCLOCK_IpSrcFircAsync, 48000000U); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); +} + +int board_uart_read(uint8_t* buf, int len) +{ +#if 0 /* + Use this version if want the LED to blink during BOARD=board_test, + without having to hit a key. + */ + if( 0U != (kLPUART_RxDataRegFullFlag & LPUART_GetStatusFlags( UART_PORT )) ) + { + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; + } + + return( 0 ); +#else /* Wait for 'len' characters to come in */ + + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; + +#endif +} + +int board_uart_write(void const * buf, int len) +{ + LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 1d27f47af..18e40e1b1 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -85,7 +85,7 @@ #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_RHPORT_HIGHSPEED 1 // Port0 HS, Port1 HS -#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX) +#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2AXX, OPT_MCU_K32L2BXX) #define TUP_DCD_ENDPOINT_MAX 16 #elif TU_CHECK_MCU(OPT_MCU_MM32F327X) diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c index b6daec3de..2678cdca1 100644 --- a/src/portable/nxp/khci/dcd_khci.c +++ b/src/portable/nxp/khci/dcd_khci.c @@ -26,9 +26,12 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && ( \ - ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX ) \ - ) +#if CFG_TUD_ENABLED && \ + ( \ + ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || \ + ( CFG_TUSB_MCU == OPT_MCU_K32L2AXX ) || \ + ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX ) \ + ) #include "fsl_device_registers.h" #define KHCI USB0 diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c index 35763f121..8ff1feff7 100644 --- a/src/portable/nxp/khci/hcd_khci.c +++ b/src/portable/nxp/khci/hcd_khci.c @@ -26,9 +26,12 @@ #include "tusb_option.h" -#if CFG_TUH_ENABLED && ( \ - ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX ) \ - ) +#if CFG_TUD_ENABLED && \ + ( \ + ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || \ + ( CFG_TUSB_MCU == OPT_MCU_K32L2AXX ) || \ + ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX ) \ + ) #include "fsl_device_registers.h" #define KHCI USB0 diff --git a/src/tusb_option.h b/src/tusb_option.h index c019b0ba4..5a234e357 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -119,6 +119,7 @@ // NXP Kinetis #define OPT_MCU_MKL25ZXX 1200 ///< NXP MKL25Zxx #define OPT_MCU_K32L2BXX 1201 ///< NXP K32L2Bxx +#define OPT_MCU_K32L2AXX 1202 ///< NXP K32L2Axx // Silabs #define OPT_MCU_EFM32GG 1300 ///< Silabs EFM32GG -- cgit v1.3.1 From 2d187777c0eb625ad7c63c21dd881ca7362363fc Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 18 Mar 2023 18:30:51 +0700 Subject: merge kinetis into its own family in bsp --- hw/bsp/frdm_k32l2a4s/README.rst | 51 ------ hw/bsp/frdm_k32l2a4s/board.h | 58 ------- hw/bsp/frdm_k32l2a4s/board.mk | 80 ---------- hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c | 171 -------------------- hw/bsp/frdm_k32l2b/board.h | 56 ------- hw/bsp/frdm_k32l2b/board.mk | 51 ------ hw/bsp/frdm_k32l2b/frdm_k32l2b.c | 140 ---------------- hw/bsp/frdm_kl25z/board.mk | 52 ------ hw/bsp/frdm_kl25z/frdm_kl25z.c | 176 --------------------- hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h | 58 +++++++ hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk | 26 +++ .../kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c | 171 ++++++++++++++++++++ hw/bsp/kinetis/boards/frdm_k32l2b/board.h | 56 +++++++ hw/bsp/kinetis/boards/frdm_k32l2b/board.mk | 26 +++ hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c | 140 ++++++++++++++++ hw/bsp/kinetis/boards/frdm_kl25z/board.mk | 31 ++++ hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c | 176 +++++++++++++++++++++ hw/bsp/kinetis/family.mk | 46 ++++++ src/common/tusb_mcu.h | 2 + src/portable/nxp/khci/dcd_khci.c | 17 +- src/portable/nxp/khci/hcd_khci.c | 2 +- 21 files changed, 741 insertions(+), 845 deletions(-) delete mode 100644 hw/bsp/frdm_k32l2a4s/README.rst delete mode 100644 hw/bsp/frdm_k32l2a4s/board.h delete mode 100644 hw/bsp/frdm_k32l2a4s/board.mk delete mode 100644 hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c delete mode 100644 hw/bsp/frdm_k32l2b/board.h delete mode 100644 hw/bsp/frdm_k32l2b/board.mk delete mode 100644 hw/bsp/frdm_k32l2b/frdm_k32l2b.c delete mode 100644 hw/bsp/frdm_kl25z/board.mk delete mode 100644 hw/bsp/frdm_kl25z/frdm_kl25z.c create mode 100644 hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h create mode 100644 hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk create mode 100644 hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c create mode 100644 hw/bsp/kinetis/boards/frdm_k32l2b/board.h create mode 100644 hw/bsp/kinetis/boards/frdm_k32l2b/board.mk create mode 100644 hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c create mode 100644 hw/bsp/kinetis/boards/frdm_kl25z/board.mk create mode 100644 hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c create mode 100644 hw/bsp/kinetis/family.mk (limited to 'src/common') diff --git a/hw/bsp/frdm_k32l2a4s/README.rst b/hw/bsp/frdm_k32l2a4s/README.rst deleted file mode 100644 index 68ab409c3..000000000 --- a/hw/bsp/frdm_k32l2a4s/README.rst +++ /dev/null @@ -1,51 +0,0 @@ -Jan/13/2023 13:04 - -The FRDM-K32L2B3 Freedom development board provides a platform for -evaluation and development of the K32 L2B MCU Family. - -https://www.nxp.com/part/FRDM-K32L2B3#/ - -TinyUSB does not include the board specific drivers. Those drivers -need to be extracted from the MCUXpresso IDE and SDK. - -Install MCUXPresso version 11.6 or later and SDK 2.12 or later. Then -build the example project "frdmk32l2b_hellow_worldvirual_com". - -From the frdmk32l2b_hellow_worldvirual_com project copy these files to -this directory structure, in this directory: - -hw/mcu/nxp/mcux-sdk/devices/K32L2B31A - -CMSIS/ -config/ -drivers/ -gcc/ -fsl_device_registers.h -K32L2B31A_features.h -K32L2B31A.h - -./CMSIS: -cmsis_armcc.h cmsis_armclang_ltm.h cmsis_gcc.h cmsis_version.h mpu_armv7.h -cmsis_armclang.h cmsis_compiler.h cmsis_iccarm.h core_cm0plus.h - -./config: -clock_config.c clock_config.h system_K32L2B31A.c system_K32L2B31A.h - -./drivers: -fsl_clock.c fsl_common_arm.h fsl_gpio.c fsl_lpuart.h fsl_smc.h -fsl_clock.h fsl_common.c fsl_gpio.h fsl_port.h fsl_uart.c -fsl_common_arm.c fsl_common.h fsl_lpuart.c fsl_smc.c fsl_uart.h - -./gcc: -frdmk32l2b.ld startup_k32l2b31a.c -frdmk32l2b_library.ld frdmk32l2b_memory.ld - -The linker files have been renamed and the #include directive edited -to match. - -Then to build a test project change to the directory -examples/devices/cdc_msc and do: - -make BOARD=frdm_k32l2b - -The resulting .hex file will be found in the _build directory, copy -that will to the FRDM board to run the demo. diff --git a/hw/bsp/frdm_k32l2a4s/board.h b/hw/bsp/frdm_k32l2a4s/board.h deleted file mode 100644 index 14eefda17..000000000 --- a/hw/bsp/frdm_k32l2a4s/board.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - - -#ifndef BOARD_H_ -#define BOARD_H_ - -#include "fsl_device_registers.h" - -// LED -// The Red LED is on PTE29. -// The Green LED is on PTC4. -// The Blue LED is on PTE31. -#define LED_PIN_CLOCK kCLOCK_PortC -#define LED_GPIO GPIOC -#define LED_PORT PORTC -#define LED_PIN 4 -#define LED_STATE_ON 0 - -// SW3 button1 -#define BUTTON_PIN_CLOCK kCLOCK_PortE -#define BUTTON_GPIO GPIOE -#define BUTTON_PORT PORTE -#define BUTTON_PIN 4 -#define BUTTON_STATE_ACTIVE 0 - -// UART -#define UART_PORT LPUART0 -#define UART_PIN_CLOCK kCLOCK_PortB -#define UART_PIN_GPIO GPIOB -#define UART_PIN_PORT PORTB -#define UART_PIN_RX 16u -#define UART_PIN_TX 17u - -#endif /* BOARD_H_ */ diff --git a/hw/bsp/frdm_k32l2a4s/board.mk b/hw/bsp/frdm_k32l2a4s/board.mk deleted file mode 100644 index e9e606fe6..000000000 --- a/hw/bsp/frdm_k32l2a4s/board.mk +++ /dev/null @@ -1,80 +0,0 @@ - -# Default to a less-verbose build. If you want all the gory compiler output, -# "VERBOSE=1" to the make command line. -ifndef VERBOSE -.SILENT: -$(info Non-Verbose Output) -else -$(info Verbose Output) -endif - -SDK_DIR = hw/mcu/nxp/mcux-sdk -MCU_DIR = $(SDK_DIR)/devices/K32L2A4S - -ifdef VERBOSE -$(info TOP='$(TOP)') -$(info ) - -$(info BSP='$(TOP)/hw/bsp/$(BOARD)') -$(info ) - -$(info TOP/SDK_DIR='$(TOP)/$(SDK_DIR)') -$(info ) - -$(info MCU_DIR='$(MCU_DIR)') -$(info ) -endif - -DEPS_SUBMODULES += $(SDK_DIR) - -CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ - -DCPU_K32L2A41VLH1A \ - -DCFG_TUSB_MCU=OPT_MCU_K32L2AXX - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual - -# All source paths should be relative to the top level. - -LD_FILE = $(MCU_DIR)/gcc/frdmk32l2a4s.ld -LDFLAGS += -L$(TOP)/$(MCU_DIR)/gcc - -# Define Recursive Depth wildcard: -rwildcard=$(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2) $(filter $(subst *,%,$2),$d)) - -SRC_C += \ - src/portable/nxp/khci/dcd_khci.c \ - $(MCU_DIR)/gcc/startup_k32l2a41a.c - -SRC_C += $(call rwildcard,$(TOP)/$(MCU_DIR)/config,*.c) -SRC_C += $(call rwildcard,$(TOP)/$(MCU_DIR)/drivers,*.c) - -INC += \ - $(TOP)/hw/bsp/$(BOARD) \ - $(TOP)/$(MCU_DIR)/CMSIS/ \ - $(TOP)/$(MCU_DIR) \ - $(TOP)/$(MCU_DIR)/config \ - $(TOP)/$(MCU_DIR)/drivers - -ifdef VERBOSE -$(info INC = '$(strip $(INC))') -$(info ) - -$(info SRC_C = '$(sort $(strip $(SRC_C)))') -$(info ) -endif - -# For freeRTOS port source -FREERTOS_PORT = ARM_CM0 - -# For flash-jlink target -#JLINK_DEVICE = ? - -# For flash-pyocd target -PYOCD_TARGET = K32L2A - -# flash using pyocd -flash: flash-pyocd diff --git a/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c deleted file mode 100644 index 47dd0c8ec..000000000 --- a/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c +++ /dev/null @@ -1,171 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * Copyright (c) 2020, Koji Kitayama - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "../board.h" -#include "board.h" -#include "fsl_gpio.h" -#include "fsl_port.h" -#include "fsl_clock.h" -#include "fsl_lpuart.h" - -#include "clock_config.h" - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB0_IRQHandler(void) -{ - tud_int_handler(0); -} - -void board_init(void) -{ - /* Enable port clocks for UART/LED/Button pins */ - CLOCK_EnableClock(UART_PIN_CLOCK); - CLOCK_EnableClock(LED_PIN_CLOCK); - CLOCK_EnableClock(BUTTON_PIN_CLOCK); - - gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; - GPIO_PinInit(LED_GPIO, LED_PIN, &led_config); - PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); - - gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; - GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); - const port_pin_config_t BUTTON_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_OpenDrainDisable, - kPORT_LowDriveStrength, - kPORT_MuxAsGpio, - kPORT_UnlockRegister - }; - PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); - - /* - Enable LPUART0 clock and configure port pins. - FIR clock is being used so the USB examples work. - */ - PCC_LPUART0 = 0U; /* Clock must be off to set PCS */ - PCC_LPUART0 = PCC_CLKCFG_PCS( 3U ); /* Select the clock. 1:OSCCLK/Bus Clock, 2:Slow IRC, 3: Fast IRC, 6: System PLL */ - PCC_LPUART0 |= PCC_CLKCFG_CGC( 1U ); /* Enable LPUART */ - - /* PORTB16 (pin 62) is configured as LPUART0_RX */ - gpio_pin_config_t const lpuart_config_rx = { kGPIO_DigitalInput, 0 }; - GPIO_PinInit(UART_PIN_GPIO, UART_PIN_RX, &lpuart_config_rx); - const port_pin_config_t UART_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_OpenDrainDisable, - kPORT_LowDriveStrength, - kPORT_MuxAsGpio, - kPORT_UnlockRegister - }; - PORT_SetPinConfig(UART_PIN_PORT, UART_PIN_RX, &UART_CFG); - PORT_SetPinMux( UART_PIN_PORT, UART_PIN_RX, kPORT_MuxAlt3); - - /* PORTB17 (pin 63) is configured as LPUART0_TX */ - gpio_pin_config_t const lpuart_config_tx = { kGPIO_DigitalOutput, 0 }; - GPIO_PinInit( UART_PIN_GPIO, UART_PIN_TX, &lpuart_config_tx); - PORT_SetPinMux( UART_PIN_PORT, UART_PIN_TX, kPORT_MuxAlt3); - - BOARD_BootClockRUN(); - SystemCoreClockUpdate(); - -#if CFG_TUSB_OS == OPT_OS_NONE - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); -#endif - - lpuart_config_t uart_config; - LPUART_GetDefaultConfig(&uart_config); - uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; - uart_config.enableTx = true; - uart_config.enableRx = true; - LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_ScgFircClk)); - - // USB - CLOCK_EnableUsbfs0Clock(kCLOCK_IpSrcFircAsync, 48000000U); -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); -} - -uint32_t board_button_read(void) -{ - return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); -} - -int board_uart_read(uint8_t* buf, int len) -{ -#if 0 /* - Use this version if want the LED to blink during BOARD=board_test, - without having to hit a key. - */ - if( 0U != (kLPUART_RxDataRegFullFlag & LPUART_GetStatusFlags( UART_PORT )) ) - { - LPUART_ReadBlocking(UART_PORT, buf, len); - return len; - } - - return( 0 ); -#else /* Wait for 'len' characters to come in */ - - LPUART_ReadBlocking(UART_PORT, buf, len); - return len; - -#endif -} - -int board_uart_write(void const * buf, int len) -{ - LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); - return len; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif diff --git a/hw/bsp/frdm_k32l2b/board.h b/hw/bsp/frdm_k32l2b/board.h deleted file mode 100644 index 8d21fdcd4..000000000 --- a/hw/bsp/frdm_k32l2b/board.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - - -#ifndef BOARD_H_ -#define BOARD_H_ - -#include "fsl_device_registers.h" - -// LED -#define LED_PIN_CLOCK kCLOCK_PortD -#define LED_GPIO GPIOD -#define LED_PORT PORTD -#define LED_PIN 5 -#define LED_STATE_ON 0 - -// SW3 button1 -#define BUTTON_PIN_CLOCK kCLOCK_PortC -#define BUTTON_GPIO GPIOC -#define BUTTON_PORT PORTC -#define BUTTON_PIN 3 -#define BUTTON_STATE_ACTIVE 0 - -// UART -#define UART_PORT LPUART0 -#define UART_PIN_CLOCK kCLOCK_PortA -#define UART_PIN_PORT PORTA -#define UART_PIN_RX 1u -#define UART_PIN_TX 2u -#define SOPT5_LPUART0RXSRC_LPUART_RX 0x00u /*!<@brief LPUART0 Receive Data Source Select: LPUART_RX pin */ -#define SOPT5_LPUART0TXSRC_LPUART_TX 0x00u /*!<@brief LPUART0 Transmit Data Source Select: LPUART0_TX pin */ - -#endif /* BOARD_H_ */ diff --git a/hw/bsp/frdm_k32l2b/board.mk b/hw/bsp/frdm_k32l2b/board.mk deleted file mode 100644 index feb0a25f4..000000000 --- a/hw/bsp/frdm_k32l2b/board.mk +++ /dev/null @@ -1,51 +0,0 @@ -SDK_DIR = hw/mcu/nxp/mcux-sdk -DEPS_SUBMODULES += $(SDK_DIR) - -CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ - -DCPU_K32L2B31VLH0A \ - -DCFG_TUSB_MCU=OPT_MCU_K32L2BXX - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls - -MCU_DIR = $(SDK_DIR)/devices/K32L2B31A - -# All source paths should be relative to the top level. -LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld - -SRC_C += \ - src/portable/nxp/khci/dcd_khci.c \ - $(MCU_DIR)/system_K32L2B31A.c \ - $(MCU_DIR)/project_template/clock_config.c \ - $(MCU_DIR)/drivers/fsl_clock.c \ - $(SDK_DIR)/drivers/gpio/fsl_gpio.c \ - $(SDK_DIR)/drivers/lpuart/fsl_lpuart.c - -INC += \ - $(TOP)/hw/bsp/$(BOARD) \ - $(TOP)/$(SDK_DIR)/CMSIS/Include \ - $(TOP)/$(SDK_DIR)/drivers/smc \ - $(TOP)/$(SDK_DIR)/drivers/common \ - $(TOP)/$(SDK_DIR)/drivers/gpio \ - $(TOP)/$(SDK_DIR)/drivers/port \ - $(TOP)/$(SDK_DIR)/drivers/lpuart \ - $(TOP)/$(MCU_DIR) \ - $(TOP)/$(MCU_DIR)/drivers \ - $(TOP)/$(MCU_DIR)/project_template \ - -SRC_S += $(MCU_DIR)/gcc/startup_K32L2B31A.S - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = MKL25Z128xxx4 - -# For flash-pyocd target -PYOCD_TARGET = K32L2B - -# flash using pyocd -flash: flash-pyocd diff --git a/hw/bsp/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/frdm_k32l2b/frdm_k32l2b.c deleted file mode 100644 index 8d2b39500..000000000 --- a/hw/bsp/frdm_k32l2b/frdm_k32l2b.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * Copyright (c) 2020, Koji Kitayama - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "../board.h" -#include "board.h" -#include "fsl_gpio.h" -#include "fsl_port.h" -#include "fsl_clock.h" -#include "fsl_lpuart.h" - -#include "clock_config.h" - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB0_IRQHandler(void) -{ - tud_int_handler(0); -} - -void board_init(void) -{ - /* Enable port clocks for UART/LED/Button pins */ - CLOCK_EnableClock(UART_PIN_CLOCK); - CLOCK_EnableClock(LED_PIN_CLOCK); - CLOCK_EnableClock(BUTTON_PIN_CLOCK); - - gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; - GPIO_PinInit(LED_GPIO, LED_PIN, &led_config); - PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); - - gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; - GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); - const port_pin_config_t BUTTON_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_LowDriveStrength, - kPORT_MuxAsGpio - }; - PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); - - /* PORTA1 (pin 23) is configured as LPUART0_RX */ - PORT_SetPinMux(PORTA, 1U, kPORT_MuxAlt2); - /* PORTA2 (pin 24) is configured as LPUART0_TX */ - PORT_SetPinMux(PORTA, 2U, kPORT_MuxAlt2); - - SIM->SOPT5 = ((SIM->SOPT5 & - /* Mask bits to zero which are setting */ - (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK))) - /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */ - | SIM_SOPT5_LPUART0TXSRC(SOPT5_LPUART0TXSRC_LPUART_TX) - /* LPUART0 Receive Data Source Select: LPUART_RX pin. */ - | SIM_SOPT5_LPUART0RXSRC(SOPT5_LPUART0RXSRC_LPUART_RX)); - - BOARD_BootClockRUN(); - SystemCoreClockUpdate(); - CLOCK_SetLpuart0Clock(1); - -#if CFG_TUSB_OS == OPT_OS_NONE - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); -#endif - - lpuart_config_t uart_config; - LPUART_GetDefaultConfig(&uart_config); - uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; - uart_config.enableTx = true; - uart_config.enableRx = true; - LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_McgIrc48MClk)); - - // USB - CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); -} - -uint32_t board_button_read(void) -{ - return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); -} - -int board_uart_read(uint8_t* buf, int len) -{ - LPUART_ReadBlocking(UART_PORT, buf, len); - return len; -} - -int board_uart_write(void const * buf, int len) -{ - LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); - return len; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif diff --git a/hw/bsp/frdm_kl25z/board.mk b/hw/bsp/frdm_kl25z/board.mk deleted file mode 100644 index fd616f7ed..000000000 --- a/hw/bsp/frdm_kl25z/board.mk +++ /dev/null @@ -1,52 +0,0 @@ -SDK_DIR = hw/mcu/nxp/nxp_sdk -DEPS_SUBMODULES += $(SDK_DIR) - -CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ - -DCPU_MKL25Z128VLK4 \ - -DCFG_TUSB_MCU=OPT_MCU_MKL25ZXX \ - -DCFG_EXAMPLE_VIDEO_READONLY - -LDFLAGS += \ - -Wl,--defsym,__stack_size__=0x400 \ - -Wl,--defsym,__heap_size__=0 - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=format -Wno-error=redundant-decls - -MCU_DIR = $(SDK_DIR)/devices/MKL25Z4 - -# All source paths should be relative to the top level. -LD_FILE = $(MCU_DIR)/gcc/MKL25Z128xxx4_flash.ld - -SRC_C += \ - src/portable/nxp/khci/dcd_khci.c \ - src/portable/nxp/khci/hcd_khci.c \ - $(MCU_DIR)/system_MKL25Z4.c \ - $(MCU_DIR)/project_template/clock_config.c \ - $(MCU_DIR)/drivers/fsl_clock.c \ - $(MCU_DIR)/drivers/fsl_gpio.c \ - $(MCU_DIR)/drivers/fsl_lpsci.c - -INC += \ - $(TOP)/hw/bsp/$(BOARD) \ - $(TOP)/$(SDK_DIR)/CMSIS/Include \ - $(TOP)/$(MCU_DIR) \ - $(TOP)/$(MCU_DIR)/drivers \ - $(TOP)/$(MCU_DIR)/project_template \ - -SRC_S += $(MCU_DIR)/gcc/startup_MKL25Z4.S - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = MKL25Z128xxx4 - -# For flash-pyocd target -PYOCD_TARGET = mkl25zl128 - -# flash using pyocd -flash: flash-pyocd diff --git a/hw/bsp/frdm_kl25z/frdm_kl25z.c b/hw/bsp/frdm_kl25z/frdm_kl25z.c deleted file mode 100644 index 46f85f6a5..000000000 --- a/hw/bsp/frdm_kl25z/frdm_kl25z.c +++ /dev/null @@ -1,176 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * Copyright (c) 2020, Koji Kitayama - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "../board.h" -#include "fsl_device_registers.h" -#include "fsl_gpio.h" -#include "fsl_port.h" -#include "fsl_clock.h" -#include "fsl_lpsci.h" - -#include "clock_config.h" - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB0_IRQHandler(void) -{ -#if CFG_TUH_ENABLED - tuh_int_handler(0); -#endif -#if CFG_TUD_ENABLED - tud_int_handler(0); -#endif -} - -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM DECLARATION -//--------------------------------------------------------------------+ -// LED -#define LED_PINMUX IOMUXC_GPIO_AD_B0_09_GPIO1_IO09 -#define LED_PORT GPIOB -#define LED_PIN_CLOCK kCLOCK_PortB -#define LED_PIN_PORT PORTB -#define LED_PIN 19U -#define LED_PIN_FUNCTION kPORT_MuxAsGpio -#define LED_STATE_ON 0 - -// Button -#define BUTTON_PORT GPIOC -#define BUTTON_PIN_CLOCK kCLOCK_PortC -#define BUTTON_PIN_PORT PORTC -#define BUTTON_PIN 9U -#define BUTTON_PIN_FUNCTION kPORT_MuxAsGpio -#define BUTTON_STATE_ACTIVE 0 - -// UART -#define UART_PORT UART0 -#define UART_PIN_CLOCK kCLOCK_PortA -#define UART_PIN_PORT PORTA -#define UART_PIN_RX 1u -#define UART_PIN_TX 2u -#define UART_PIN_FUNCTION kPORT_MuxAlt2 -#define SOPT5_UART0RXSRC_UART_RX 0x00u /*!< UART0 receive data source select: UART0_RX pin */ -#define SOPT5_UART0TXSRC_UART_TX 0x00u /*!< UART0 transmit data source select: UART0_TX pin */ - -const uint8_t dcd_data[] = { 0x00 }; - -void board_init(void) -{ - BOARD_BootClockRUN(); - SystemCoreClockUpdate(); - -#if CFG_TUSB_OS == OPT_OS_NONE - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); -#endif - - // LED - CLOCK_EnableClock(LED_PIN_CLOCK); - PORT_SetPinMux(LED_PIN_PORT, LED_PIN, LED_PIN_FUNCTION); - gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; - GPIO_PinInit(LED_PORT, LED_PIN, &led_config); - board_led_write(false); - -#if defined(BUTTON_PORT) && defined(BUTTON_PIN) - // Button - CLOCK_EnableClock(BUTTON_PIN_CLOCK); - port_pin_config_t button_port = { - .pullSelect = kPORT_PullUp, - .mux = BUTTON_PIN_FUNCTION, - }; - PORT_SetPinConfig(BUTTON_PIN_PORT, BUTTON_PIN, &button_port); - gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; - GPIO_PinInit(BUTTON_PORT, BUTTON_PIN, &button_config); -#endif - - // UART - CLOCK_EnableClock(UART_PIN_CLOCK); - PORT_SetPinMux(UART_PIN_PORT, UART_PIN_RX, UART_PIN_FUNCTION); - PORT_SetPinMux(UART_PIN_PORT, UART_PIN_TX, UART_PIN_FUNCTION); - SIM->SOPT5 = ((SIM->SOPT5 & - (~(SIM_SOPT5_UART0TXSRC_MASK | SIM_SOPT5_UART0RXSRC_MASK))) - | SIM_SOPT5_UART0TXSRC(SOPT5_UART0TXSRC_UART_TX) - | SIM_SOPT5_UART0RXSRC(SOPT5_UART0RXSRC_UART_RX) - ); - - lpsci_config_t uart_config; - CLOCK_SetLpsci0Clock(1); - LPSCI_GetDefaultConfig(&uart_config); - uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; - uart_config.enableTx = true; - uart_config.enableRx = true; - LPSCI_Init(UART_PORT, &uart_config, CLOCK_GetPllFllSelClkFreq()); - - // USB - CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcPll0, CLOCK_GetFreq(kCLOCK_PllFllSelClk)); -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - GPIO_WritePinOutput(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); -} - -uint32_t board_button_read(void) -{ -#if defined(BUTTON_PORT) && defined(BUTTON_PIN) - return BUTTON_STATE_ACTIVE == GPIO_ReadPinInput(BUTTON_PORT, BUTTON_PIN); -#endif - return 0; -} - -int board_uart_read(uint8_t* buf, int len) -{ - LPSCI_ReadBlocking(UART_PORT, buf, len); - return len; -} - -int board_uart_write(void const * buf, int len) -{ - LPSCI_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); - return len; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif diff --git a/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h b/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h new file mode 100644 index 000000000..b1f38c997 --- /dev/null +++ b/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h @@ -0,0 +1,58 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + + +#ifndef BOARD_H_ +#define BOARD_H_ + +#include "fsl_device_registers.h" + +// LED +// The Red LED is on PTE29. +// The Green LED is on PTC4. +// The Blue LED is on PTE31. +#define LED_PIN_CLOCK kCLOCK_PortC +#define LED_GPIO GPIOC +#define LED_PORT PORTC +#define LED_PIN 4 +#define LED_STATE_ON 0 + +// SW3 button1 +#define BUTTON_PIN_CLOCK kCLOCK_PortE +#define BUTTON_GPIO GPIOE +#define BUTTON_PORT PORTE +#define BUTTON_PIN 4 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_PORT LPUART0 +#define UART_PIN_CLOCK kCLOCK_PortB +#define UART_PIN_GPIO GPIOB +#define UART_PIN_PORT PORTB +#define UART_PIN_RX 16u +#define UART_PIN_TX 17u + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk new file mode 100644 index 000000000..723fb3893 --- /dev/null +++ b/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk @@ -0,0 +1,26 @@ +SDK_DIR = hw/mcu/nxp/mcux-sdk +MCU = K32L2A41A +MCU_DIR = $(SDK_DIR)/devices/$(MCU) + +CFLAGS += \ + -mcpu=cortex-m0plus \ + -DCPU_K32L2A41VLH1A \ + -DCFG_TUSB_MCU=OPT_MCU_K32L2AXX + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual + +# All source paths should be relative to the top level. +LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 + +# For flash-jlink target +JLINK_DEVICE = K32L2A41xxxxA + +# For flash-pyocd target +PYOCD_TARGET = K32L2A + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c new file mode 100644 index 000000000..80830163b --- /dev/null +++ b/hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c @@ -0,0 +1,171 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * Copyright (c) 2020, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "bsp/board.h" +#include "board.h" +#include "fsl_gpio.h" +#include "fsl_port.h" +#include "fsl_clock.h" +#include "fsl_lpuart.h" + +#include "clock_config.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ + tud_int_handler(0); +} + +void board_init(void) +{ + /* Enable port clocks for UART/LED/Button pins */ + CLOCK_EnableClock(UART_PIN_CLOCK); + CLOCK_EnableClock(LED_PIN_CLOCK); + CLOCK_EnableClock(BUTTON_PIN_CLOCK); + + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit(LED_GPIO, LED_PIN, &led_config); + PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); + + gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); + const port_pin_config_t BUTTON_CFG = { + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_OpenDrainDisable, + kPORT_LowDriveStrength, + kPORT_MuxAsGpio, + kPORT_UnlockRegister + }; + PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); + + /* + Enable LPUART0 clock and configure port pins. + FIR clock is being used so the USB examples work. + */ + PCC_LPUART0 = 0U; /* Clock must be off to set PCS */ + PCC_LPUART0 = PCC_CLKCFG_PCS( 3U ); /* Select the clock. 1:OSCCLK/Bus Clock, 2:Slow IRC, 3: Fast IRC, 6: System PLL */ + PCC_LPUART0 |= PCC_CLKCFG_CGC( 1U ); /* Enable LPUART */ + + /* PORTB16 (pin 62) is configured as LPUART0_RX */ + gpio_pin_config_t const lpuart_config_rx = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(UART_PIN_GPIO, UART_PIN_RX, &lpuart_config_rx); + const port_pin_config_t UART_CFG = { + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_OpenDrainDisable, + kPORT_LowDriveStrength, + kPORT_MuxAsGpio, + kPORT_UnlockRegister + }; + PORT_SetPinConfig(UART_PIN_PORT, UART_PIN_RX, &UART_CFG); + PORT_SetPinMux( UART_PIN_PORT, UART_PIN_RX, kPORT_MuxAlt3); + + /* PORTB17 (pin 63) is configured as LPUART0_TX */ + gpio_pin_config_t const lpuart_config_tx = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit( UART_PIN_GPIO, UART_PIN_TX, &lpuart_config_tx); + PORT_SetPinMux( UART_PIN_PORT, UART_PIN_TX, kPORT_MuxAlt3); + + BOARD_BootClockRUN(); + SystemCoreClockUpdate(); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + lpuart_config_t uart_config; + LPUART_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_ScgFircClk)); + + // USB + CLOCK_EnableUsbfs0Clock(kCLOCK_IpSrcFircAsync, 48000000U); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); +} + +int board_uart_read(uint8_t* buf, int len) +{ +#if 0 /* + Use this version if want the LED to blink during BOARD=board_test, + without having to hit a key. + */ + if( 0U != (kLPUART_RxDataRegFullFlag & LPUART_GetStatusFlags( UART_PORT )) ) + { + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; + } + + return( 0 ); +#else /* Wait for 'len' characters to come in */ + + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; + +#endif +} + +int board_uart_write(void const * buf, int len) +{ + LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/kinetis/boards/frdm_k32l2b/board.h b/hw/bsp/kinetis/boards/frdm_k32l2b/board.h new file mode 100644 index 000000000..8d21fdcd4 --- /dev/null +++ b/hw/bsp/kinetis/boards/frdm_k32l2b/board.h @@ -0,0 +1,56 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + + +#ifndef BOARD_H_ +#define BOARD_H_ + +#include "fsl_device_registers.h" + +// LED +#define LED_PIN_CLOCK kCLOCK_PortD +#define LED_GPIO GPIOD +#define LED_PORT PORTD +#define LED_PIN 5 +#define LED_STATE_ON 0 + +// SW3 button1 +#define BUTTON_PIN_CLOCK kCLOCK_PortC +#define BUTTON_GPIO GPIOC +#define BUTTON_PORT PORTC +#define BUTTON_PIN 3 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_PORT LPUART0 +#define UART_PIN_CLOCK kCLOCK_PortA +#define UART_PIN_PORT PORTA +#define UART_PIN_RX 1u +#define UART_PIN_TX 2u +#define SOPT5_LPUART0RXSRC_LPUART_RX 0x00u /*!<@brief LPUART0 Receive Data Source Select: LPUART_RX pin */ +#define SOPT5_LPUART0TXSRC_LPUART_TX 0x00u /*!<@brief LPUART0 Transmit Data Source Select: LPUART0_TX pin */ + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk new file mode 100644 index 000000000..66d408c67 --- /dev/null +++ b/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk @@ -0,0 +1,26 @@ +SDK_DIR = hw/mcu/nxp/mcux-sdk +MCU = K32L2B31A +MCU_DIR = $(SDK_DIR)/devices/$(MCU) + +CFLAGS += \ + -mcpu=cortex-m0plus \ + -DCPU_K32L2B31VLH0A \ + -DCFG_TUSB_MCU=OPT_MCU_K32L2BXX + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls + +# All source paths should be relative to the top level. +LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 + +# For flash-jlink target +JLINK_DEVICE = K32L2B31xxxxA + +# For flash-pyocd target +PYOCD_TARGET = K32L2B + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c new file mode 100644 index 000000000..1566b4e2e --- /dev/null +++ b/hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c @@ -0,0 +1,140 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * Copyright (c) 2020, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "bsp/board.h" +#include "board.h" +#include "fsl_gpio.h" +#include "fsl_port.h" +#include "fsl_clock.h" +#include "fsl_lpuart.h" + +#include "clock_config.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ + tud_int_handler(0); +} + +void board_init(void) +{ + /* Enable port clocks for UART/LED/Button pins */ + CLOCK_EnableClock(UART_PIN_CLOCK); + CLOCK_EnableClock(LED_PIN_CLOCK); + CLOCK_EnableClock(BUTTON_PIN_CLOCK); + + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit(LED_GPIO, LED_PIN, &led_config); + PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); + + gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); + const port_pin_config_t BUTTON_CFG = { + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_LowDriveStrength, + kPORT_MuxAsGpio + }; + PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); + + /* PORTA1 (pin 23) is configured as LPUART0_RX */ + PORT_SetPinMux(PORTA, 1U, kPORT_MuxAlt2); + /* PORTA2 (pin 24) is configured as LPUART0_TX */ + PORT_SetPinMux(PORTA, 2U, kPORT_MuxAlt2); + + SIM->SOPT5 = ((SIM->SOPT5 & + /* Mask bits to zero which are setting */ + (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK))) + /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */ + | SIM_SOPT5_LPUART0TXSRC(SOPT5_LPUART0TXSRC_LPUART_TX) + /* LPUART0 Receive Data Source Select: LPUART_RX pin. */ + | SIM_SOPT5_LPUART0RXSRC(SOPT5_LPUART0RXSRC_LPUART_RX)); + + BOARD_BootClockRUN(); + SystemCoreClockUpdate(); + CLOCK_SetLpuart0Clock(1); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + lpuart_config_t uart_config; + LPUART_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_McgIrc48MClk)); + + // USB + CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); +} + +int board_uart_read(uint8_t* buf, int len) +{ + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; +} + +int board_uart_write(void const * buf, int len) +{ + LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/kinetis/boards/frdm_kl25z/board.mk b/hw/bsp/kinetis/boards/frdm_kl25z/board.mk new file mode 100644 index 000000000..5ce6cd51e --- /dev/null +++ b/hw/bsp/kinetis/boards/frdm_kl25z/board.mk @@ -0,0 +1,31 @@ +SDK_DIR = hw/mcu/nxp/nxp_sdk +MCU = MKL25Z4 +MCU_DIR = $(SDK_DIR)/devices/$(MCU) + +CFLAGS += \ + -mcpu=cortex-m0plus \ + -DCPU_MKL25Z128VLK4 \ + -DCFG_TUSB_MCU=OPT_MCU_MKL25ZXX \ + -DCFG_EXAMPLE_VIDEO_READONLY + +LDFLAGS += \ + -Wl,--defsym,__stack_size__=0x400 \ + -Wl,--defsym,__heap_size__=0 + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=format -Wno-error=redundant-decls + +# All source paths should be relative to the top level. +LD_FILE = $(MCU_DIR)/gcc/MKL25Z128xxx4_flash.ld + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 + +# For flash-jlink target +JLINK_DEVICE = MKL25Z128xxx4 + +# For flash-pyocd target +PYOCD_TARGET = mkl25zl128 + +# flash using pyocd +flash: flash-jlink diff --git a/hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c b/hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c new file mode 100644 index 000000000..46f85f6a5 --- /dev/null +++ b/hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c @@ -0,0 +1,176 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * Copyright (c) 2020, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "../board.h" +#include "fsl_device_registers.h" +#include "fsl_gpio.h" +#include "fsl_port.h" +#include "fsl_clock.h" +#include "fsl_lpsci.h" + +#include "clock_config.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ +#if CFG_TUH_ENABLED + tuh_int_handler(0); +#endif +#if CFG_TUD_ENABLED + tud_int_handler(0); +#endif +} + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM DECLARATION +//--------------------------------------------------------------------+ +// LED +#define LED_PINMUX IOMUXC_GPIO_AD_B0_09_GPIO1_IO09 +#define LED_PORT GPIOB +#define LED_PIN_CLOCK kCLOCK_PortB +#define LED_PIN_PORT PORTB +#define LED_PIN 19U +#define LED_PIN_FUNCTION kPORT_MuxAsGpio +#define LED_STATE_ON 0 + +// Button +#define BUTTON_PORT GPIOC +#define BUTTON_PIN_CLOCK kCLOCK_PortC +#define BUTTON_PIN_PORT PORTC +#define BUTTON_PIN 9U +#define BUTTON_PIN_FUNCTION kPORT_MuxAsGpio +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_PORT UART0 +#define UART_PIN_CLOCK kCLOCK_PortA +#define UART_PIN_PORT PORTA +#define UART_PIN_RX 1u +#define UART_PIN_TX 2u +#define UART_PIN_FUNCTION kPORT_MuxAlt2 +#define SOPT5_UART0RXSRC_UART_RX 0x00u /*!< UART0 receive data source select: UART0_RX pin */ +#define SOPT5_UART0TXSRC_UART_TX 0x00u /*!< UART0 transmit data source select: UART0_TX pin */ + +const uint8_t dcd_data[] = { 0x00 }; + +void board_init(void) +{ + BOARD_BootClockRUN(); + SystemCoreClockUpdate(); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + // LED + CLOCK_EnableClock(LED_PIN_CLOCK); + PORT_SetPinMux(LED_PIN_PORT, LED_PIN, LED_PIN_FUNCTION); + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit(LED_PORT, LED_PIN, &led_config); + board_led_write(false); + +#if defined(BUTTON_PORT) && defined(BUTTON_PIN) + // Button + CLOCK_EnableClock(BUTTON_PIN_CLOCK); + port_pin_config_t button_port = { + .pullSelect = kPORT_PullUp, + .mux = BUTTON_PIN_FUNCTION, + }; + PORT_SetPinConfig(BUTTON_PIN_PORT, BUTTON_PIN, &button_port); + gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(BUTTON_PORT, BUTTON_PIN, &button_config); +#endif + + // UART + CLOCK_EnableClock(UART_PIN_CLOCK); + PORT_SetPinMux(UART_PIN_PORT, UART_PIN_RX, UART_PIN_FUNCTION); + PORT_SetPinMux(UART_PIN_PORT, UART_PIN_TX, UART_PIN_FUNCTION); + SIM->SOPT5 = ((SIM->SOPT5 & + (~(SIM_SOPT5_UART0TXSRC_MASK | SIM_SOPT5_UART0RXSRC_MASK))) + | SIM_SOPT5_UART0TXSRC(SOPT5_UART0TXSRC_UART_TX) + | SIM_SOPT5_UART0RXSRC(SOPT5_UART0RXSRC_UART_RX) + ); + + lpsci_config_t uart_config; + CLOCK_SetLpsci0Clock(1); + LPSCI_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPSCI_Init(UART_PORT, &uart_config, CLOCK_GetPllFllSelClkFreq()); + + // USB + CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcPll0, CLOCK_GetFreq(kCLOCK_PllFllSelClk)); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_WritePinOutput(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ +#if defined(BUTTON_PORT) && defined(BUTTON_PIN) + return BUTTON_STATE_ACTIVE == GPIO_ReadPinInput(BUTTON_PORT, BUTTON_PIN); +#endif + return 0; +} + +int board_uart_read(uint8_t* buf, int len) +{ + LPSCI_ReadBlocking(UART_PORT, buf, len); + return len; +} + +int board_uart_write(void const * buf, int len) +{ + LPSCI_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/kinetis/family.mk b/hw/bsp/kinetis/family.mk new file mode 100644 index 000000000..65767988a --- /dev/null +++ b/hw/bsp/kinetis/family.mk @@ -0,0 +1,46 @@ +DEPS_SUBMODULES += hw/mcu/nxp/nxp_sdk hw/mcu/nxp/mcux-sdk + +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + +SRC_C += \ + src/portable/nxp/khci/dcd_khci.c \ + src/portable/nxp/khci/hcd_khci.c \ + $(MCU_DIR)/system_$(MCU).c \ + $(MCU_DIR)/project_template/clock_config.c \ + $(MCU_DIR)/drivers/fsl_clock.c \ + +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/$(SDK_DIR)/CMSIS/Include \ + $(TOP)/$(MCU_DIR) \ + $(TOP)/$(MCU_DIR)/project_template \ + $(TOP)/$(MCU_DIR)/drivers + +# mcu-sdk has different driver layout than previous old sdk +ifeq ($(SDK_DIR),hw/mcu/nxp/mcux-sdk) + +SRC_C += \ + $(SDK_DIR)/drivers/gpio/fsl_gpio.c \ + $(SDK_DIR)/drivers/lpuart/fsl_lpuart.c + +INC += \ + $(TOP)/$(SDK_DIR)/drivers/smc \ + $(TOP)/$(SDK_DIR)/drivers/common \ + $(TOP)/$(SDK_DIR)/drivers/gpio \ + $(TOP)/$(SDK_DIR)/drivers/port \ + $(TOP)/$(SDK_DIR)/drivers/lpuart \ + +else + +SRC_C += \ + $(MCU_DIR)/drivers/fsl_gpio.c \ + $(MCU_DIR)/drivers/fsl_lpsci.c \ + $(MCU_DIR)/drivers/fsl_uart.c + +endif + +SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 18e40e1b1..a94e1877f 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -86,6 +86,8 @@ #define TUP_RHPORT_HIGHSPEED 1 // Port0 HS, Port1 HS #elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2AXX, OPT_MCU_K32L2BXX) + #define TUP_USBIP_CHIPIDEA_FS + #define TUP_USBIP_CHIPIDEA_FS_KINETIS #define TUP_DCD_ENDPOINT_MAX 16 #elif TU_CHECK_MCU(OPT_MCU_MM32F327X) diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c index 2678cdca1..52f4145f2 100644 --- a/src/portable/nxp/khci/dcd_khci.c +++ b/src/portable/nxp/khci/dcd_khci.c @@ -26,15 +26,14 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && \ - ( \ - ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || \ - ( CFG_TUSB_MCU == OPT_MCU_K32L2AXX ) || \ - ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX ) \ - ) - -#include "fsl_device_registers.h" -#define KHCI USB0 +#if CFG_TUD_ENABLED && defined(TUP_USBIP_CHIPIDEA_FS) + +#ifdef TUP_USBIP_CHIPIDEA_FS_KINETIS + #include "fsl_device_registers.h" + #define KHCI USB0 +#else + #error "MCU is not supported" +#endif #include "device/dcd.h" diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c index 8ff1feff7..27073dce7 100644 --- a/src/portable/nxp/khci/hcd_khci.c +++ b/src/portable/nxp/khci/hcd_khci.c @@ -26,7 +26,7 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && \ +#if CFG_TUH_ENABLED && \ ( \ ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || \ ( CFG_TUSB_MCU == OPT_MCU_K32L2AXX ) || \ -- cgit v1.3.1 From 1fc203b085ba6ce2edef90e9dcc75ec72eaeb314 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 18 Mar 2023 19:50:24 +0700 Subject: more update to kinetis bsp --- docs/reference/supported.rst | 2 +- hw/bsp/board_mcu.h | 14 +- hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h | 58 ------ hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk | 26 --- .../kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c | 171 ---------------- hw/bsp/kinetis/boards/frdm_k32l2b/board.h | 56 ------ hw/bsp/kinetis/boards/frdm_k32l2b/board.mk | 26 --- hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c | 140 ------------- hw/bsp/kinetis/boards/frdm_kl25z/board.mk | 31 --- hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c | 176 ----------------- hw/bsp/kinetis/family.mk | 46 ----- hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.h | 58 ++++++ hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.mk | 26 +++ .../boards/frdm_k32l2a4s/frdm_k32l2a4s.c | 171 ++++++++++++++++ hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.h | 56 ++++++ hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.mk | 26 +++ .../kinetis_k32/boards/frdm_k32l2b/frdm_k32l2b.c | 140 +++++++++++++ .../boards/kuiic/K32L2B31xxxxA_flash.ld | 216 +++++++++++++++++++++ hw/bsp/kinetis_k32/boards/kuiic/board.h | 45 +++++ hw/bsp/kinetis_k32/boards/kuiic/board.mk | 26 +++ hw/bsp/kinetis_k32/boards/kuiic/kuiic.c | 203 +++++++++++++++++++ hw/bsp/kinetis_k32/family.mk | 32 +++ hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk | 20 ++ hw/bsp/kinetis_kl/boards/frdm_kl25z/frdm_kl25z.c | 176 +++++++++++++++++ hw/bsp/kinetis_kl/family.mk | 37 ++++ hw/bsp/kuiic/K32L2B31xxxxA_flash.ld | 216 --------------------- hw/bsp/kuiic/board.h | 45 ----- hw/bsp/kuiic/board.mk | 52 ----- hw/bsp/kuiic/kuiic.c | 203 ------------------- src/common/tusb_mcu.h | 2 +- src/portable/nxp/khci/hcd_khci.c | 17 +- src/tusb_option.h | 8 +- 32 files changed, 1254 insertions(+), 1267 deletions(-) delete mode 100644 hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h delete mode 100644 hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk delete mode 100644 hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c delete mode 100644 hw/bsp/kinetis/boards/frdm_k32l2b/board.h delete mode 100644 hw/bsp/kinetis/boards/frdm_k32l2b/board.mk delete mode 100644 hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c delete mode 100644 hw/bsp/kinetis/boards/frdm_kl25z/board.mk delete mode 100644 hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c delete mode 100644 hw/bsp/kinetis/family.mk create mode 100644 hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.h create mode 100644 hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.mk create mode 100644 hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/frdm_k32l2a4s.c create mode 100644 hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.h create mode 100644 hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.mk create mode 100644 hw/bsp/kinetis_k32/boards/frdm_k32l2b/frdm_k32l2b.c create mode 100644 hw/bsp/kinetis_k32/boards/kuiic/K32L2B31xxxxA_flash.ld create mode 100644 hw/bsp/kinetis_k32/boards/kuiic/board.h create mode 100644 hw/bsp/kinetis_k32/boards/kuiic/board.mk create mode 100644 hw/bsp/kinetis_k32/boards/kuiic/kuiic.c create mode 100644 hw/bsp/kinetis_k32/family.mk create mode 100644 hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk create mode 100644 hw/bsp/kinetis_kl/boards/frdm_kl25z/frdm_kl25z.c create mode 100644 hw/bsp/kinetis_kl/family.mk delete mode 100644 hw/bsp/kuiic/K32L2B31xxxxA_flash.ld delete mode 100644 hw/bsp/kuiic/board.h delete mode 100644 hw/bsp/kuiic/board.mk delete mode 100644 hw/bsp/kuiic/kuiic.c (limited to 'src/common') diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst index b1e0c0a68..a5d055893 100644 --- a/docs/reference/supported.rst +++ b/docs/reference/supported.rst @@ -253,7 +253,7 @@ Kinetis ^^^^^^^ - `Freedom FRDM-KL25Z `__ -- `Freedom FRDM-K32L2A `__ +- `Freedom FRDM-K32L2A4S `__ - `Freedom FRDM-K32L2B3 `__ - `KUIIC `__ diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index 920e7d0d9..cd195a19b 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -39,15 +39,15 @@ //--------------------------------------------------------------------+ // Include order follows OPT_MCU_ number -#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX || \ - CFG_TUSB_MCU == OPT_MCU_LPC15XX || CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || \ - CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ - CFG_TUSB_MCU == OPT_MCU_LPC40XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX +#if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) || \ + TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC18XX) || \ + TU_CHECK_MCU(OPT_MCU_LPC40XX, OPT_MCU_LPC43XX) #include "chip.h" -#elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX || CFG_TUSB_MCU == OPT_MCU_LPC54XXX || \ - CFG_TUSB_MCU == OPT_MCU_LPC55XX || CFG_TUSB_MCU == OPT_MCU_MKL25ZXX || \ - CFG_TUSB_MCU == OPT_MCU_K32L2AXX || OPT_MCU_K32L2BXX +#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX, OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX) + #include "fsl_device_registers.h" + +#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32) #include "fsl_device_registers.h" #elif CFG_TUSB_MCU == OPT_MCU_NRF5X diff --git a/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h b/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h deleted file mode 100644 index b1f38c997..000000000 --- a/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - - -#ifndef BOARD_H_ -#define BOARD_H_ - -#include "fsl_device_registers.h" - -// LED -// The Red LED is on PTE29. -// The Green LED is on PTC4. -// The Blue LED is on PTE31. -#define LED_PIN_CLOCK kCLOCK_PortC -#define LED_GPIO GPIOC -#define LED_PORT PORTC -#define LED_PIN 4 -#define LED_STATE_ON 0 - -// SW3 button1 -#define BUTTON_PIN_CLOCK kCLOCK_PortE -#define BUTTON_GPIO GPIOE -#define BUTTON_PORT PORTE -#define BUTTON_PIN 4 -#define BUTTON_STATE_ACTIVE 0 - -// UART -#define UART_PORT LPUART0 -#define UART_PIN_CLOCK kCLOCK_PortB -#define UART_PIN_GPIO GPIOB -#define UART_PIN_PORT PORTB -#define UART_PIN_RX 16u -#define UART_PIN_TX 17u - -#endif /* BOARD_H_ */ diff --git a/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk deleted file mode 100644 index 723fb3893..000000000 --- a/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk +++ /dev/null @@ -1,26 +0,0 @@ -SDK_DIR = hw/mcu/nxp/mcux-sdk -MCU = K32L2A41A -MCU_DIR = $(SDK_DIR)/devices/$(MCU) - -CFLAGS += \ - -mcpu=cortex-m0plus \ - -DCPU_K32L2A41VLH1A \ - -DCFG_TUSB_MCU=OPT_MCU_K32L2AXX - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual - -# All source paths should be relative to the top level. -LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = K32L2A41xxxxA - -# For flash-pyocd target -PYOCD_TARGET = K32L2A - -# flash using pyocd -flash: flash-pyocd diff --git a/hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c deleted file mode 100644 index 80830163b..000000000 --- a/hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c +++ /dev/null @@ -1,171 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * Copyright (c) 2020, Koji Kitayama - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "bsp/board.h" -#include "board.h" -#include "fsl_gpio.h" -#include "fsl_port.h" -#include "fsl_clock.h" -#include "fsl_lpuart.h" - -#include "clock_config.h" - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB0_IRQHandler(void) -{ - tud_int_handler(0); -} - -void board_init(void) -{ - /* Enable port clocks for UART/LED/Button pins */ - CLOCK_EnableClock(UART_PIN_CLOCK); - CLOCK_EnableClock(LED_PIN_CLOCK); - CLOCK_EnableClock(BUTTON_PIN_CLOCK); - - gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; - GPIO_PinInit(LED_GPIO, LED_PIN, &led_config); - PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); - - gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; - GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); - const port_pin_config_t BUTTON_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_OpenDrainDisable, - kPORT_LowDriveStrength, - kPORT_MuxAsGpio, - kPORT_UnlockRegister - }; - PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); - - /* - Enable LPUART0 clock and configure port pins. - FIR clock is being used so the USB examples work. - */ - PCC_LPUART0 = 0U; /* Clock must be off to set PCS */ - PCC_LPUART0 = PCC_CLKCFG_PCS( 3U ); /* Select the clock. 1:OSCCLK/Bus Clock, 2:Slow IRC, 3: Fast IRC, 6: System PLL */ - PCC_LPUART0 |= PCC_CLKCFG_CGC( 1U ); /* Enable LPUART */ - - /* PORTB16 (pin 62) is configured as LPUART0_RX */ - gpio_pin_config_t const lpuart_config_rx = { kGPIO_DigitalInput, 0 }; - GPIO_PinInit(UART_PIN_GPIO, UART_PIN_RX, &lpuart_config_rx); - const port_pin_config_t UART_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_OpenDrainDisable, - kPORT_LowDriveStrength, - kPORT_MuxAsGpio, - kPORT_UnlockRegister - }; - PORT_SetPinConfig(UART_PIN_PORT, UART_PIN_RX, &UART_CFG); - PORT_SetPinMux( UART_PIN_PORT, UART_PIN_RX, kPORT_MuxAlt3); - - /* PORTB17 (pin 63) is configured as LPUART0_TX */ - gpio_pin_config_t const lpuart_config_tx = { kGPIO_DigitalOutput, 0 }; - GPIO_PinInit( UART_PIN_GPIO, UART_PIN_TX, &lpuart_config_tx); - PORT_SetPinMux( UART_PIN_PORT, UART_PIN_TX, kPORT_MuxAlt3); - - BOARD_BootClockRUN(); - SystemCoreClockUpdate(); - -#if CFG_TUSB_OS == OPT_OS_NONE - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); -#endif - - lpuart_config_t uart_config; - LPUART_GetDefaultConfig(&uart_config); - uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; - uart_config.enableTx = true; - uart_config.enableRx = true; - LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_ScgFircClk)); - - // USB - CLOCK_EnableUsbfs0Clock(kCLOCK_IpSrcFircAsync, 48000000U); -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); -} - -uint32_t board_button_read(void) -{ - return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); -} - -int board_uart_read(uint8_t* buf, int len) -{ -#if 0 /* - Use this version if want the LED to blink during BOARD=board_test, - without having to hit a key. - */ - if( 0U != (kLPUART_RxDataRegFullFlag & LPUART_GetStatusFlags( UART_PORT )) ) - { - LPUART_ReadBlocking(UART_PORT, buf, len); - return len; - } - - return( 0 ); -#else /* Wait for 'len' characters to come in */ - - LPUART_ReadBlocking(UART_PORT, buf, len); - return len; - -#endif -} - -int board_uart_write(void const * buf, int len) -{ - LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); - return len; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif diff --git a/hw/bsp/kinetis/boards/frdm_k32l2b/board.h b/hw/bsp/kinetis/boards/frdm_k32l2b/board.h deleted file mode 100644 index 8d21fdcd4..000000000 --- a/hw/bsp/kinetis/boards/frdm_k32l2b/board.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - - -#ifndef BOARD_H_ -#define BOARD_H_ - -#include "fsl_device_registers.h" - -// LED -#define LED_PIN_CLOCK kCLOCK_PortD -#define LED_GPIO GPIOD -#define LED_PORT PORTD -#define LED_PIN 5 -#define LED_STATE_ON 0 - -// SW3 button1 -#define BUTTON_PIN_CLOCK kCLOCK_PortC -#define BUTTON_GPIO GPIOC -#define BUTTON_PORT PORTC -#define BUTTON_PIN 3 -#define BUTTON_STATE_ACTIVE 0 - -// UART -#define UART_PORT LPUART0 -#define UART_PIN_CLOCK kCLOCK_PortA -#define UART_PIN_PORT PORTA -#define UART_PIN_RX 1u -#define UART_PIN_TX 2u -#define SOPT5_LPUART0RXSRC_LPUART_RX 0x00u /*!<@brief LPUART0 Receive Data Source Select: LPUART_RX pin */ -#define SOPT5_LPUART0TXSRC_LPUART_TX 0x00u /*!<@brief LPUART0 Transmit Data Source Select: LPUART0_TX pin */ - -#endif /* BOARD_H_ */ diff --git a/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk deleted file mode 100644 index 66d408c67..000000000 --- a/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk +++ /dev/null @@ -1,26 +0,0 @@ -SDK_DIR = hw/mcu/nxp/mcux-sdk -MCU = K32L2B31A -MCU_DIR = $(SDK_DIR)/devices/$(MCU) - -CFLAGS += \ - -mcpu=cortex-m0plus \ - -DCPU_K32L2B31VLH0A \ - -DCFG_TUSB_MCU=OPT_MCU_K32L2BXX - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls - -# All source paths should be relative to the top level. -LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = K32L2B31xxxxA - -# For flash-pyocd target -PYOCD_TARGET = K32L2B - -# flash using pyocd -flash: flash-pyocd diff --git a/hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c deleted file mode 100644 index 1566b4e2e..000000000 --- a/hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * Copyright (c) 2020, Koji Kitayama - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "bsp/board.h" -#include "board.h" -#include "fsl_gpio.h" -#include "fsl_port.h" -#include "fsl_clock.h" -#include "fsl_lpuart.h" - -#include "clock_config.h" - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB0_IRQHandler(void) -{ - tud_int_handler(0); -} - -void board_init(void) -{ - /* Enable port clocks for UART/LED/Button pins */ - CLOCK_EnableClock(UART_PIN_CLOCK); - CLOCK_EnableClock(LED_PIN_CLOCK); - CLOCK_EnableClock(BUTTON_PIN_CLOCK); - - gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; - GPIO_PinInit(LED_GPIO, LED_PIN, &led_config); - PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); - - gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; - GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); - const port_pin_config_t BUTTON_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_LowDriveStrength, - kPORT_MuxAsGpio - }; - PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); - - /* PORTA1 (pin 23) is configured as LPUART0_RX */ - PORT_SetPinMux(PORTA, 1U, kPORT_MuxAlt2); - /* PORTA2 (pin 24) is configured as LPUART0_TX */ - PORT_SetPinMux(PORTA, 2U, kPORT_MuxAlt2); - - SIM->SOPT5 = ((SIM->SOPT5 & - /* Mask bits to zero which are setting */ - (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK))) - /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */ - | SIM_SOPT5_LPUART0TXSRC(SOPT5_LPUART0TXSRC_LPUART_TX) - /* LPUART0 Receive Data Source Select: LPUART_RX pin. */ - | SIM_SOPT5_LPUART0RXSRC(SOPT5_LPUART0RXSRC_LPUART_RX)); - - BOARD_BootClockRUN(); - SystemCoreClockUpdate(); - CLOCK_SetLpuart0Clock(1); - -#if CFG_TUSB_OS == OPT_OS_NONE - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); -#endif - - lpuart_config_t uart_config; - LPUART_GetDefaultConfig(&uart_config); - uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; - uart_config.enableTx = true; - uart_config.enableRx = true; - LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_McgIrc48MClk)); - - // USB - CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); -} - -uint32_t board_button_read(void) -{ - return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); -} - -int board_uart_read(uint8_t* buf, int len) -{ - LPUART_ReadBlocking(UART_PORT, buf, len); - return len; -} - -int board_uart_write(void const * buf, int len) -{ - LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); - return len; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif diff --git a/hw/bsp/kinetis/boards/frdm_kl25z/board.mk b/hw/bsp/kinetis/boards/frdm_kl25z/board.mk deleted file mode 100644 index 5ce6cd51e..000000000 --- a/hw/bsp/kinetis/boards/frdm_kl25z/board.mk +++ /dev/null @@ -1,31 +0,0 @@ -SDK_DIR = hw/mcu/nxp/nxp_sdk -MCU = MKL25Z4 -MCU_DIR = $(SDK_DIR)/devices/$(MCU) - -CFLAGS += \ - -mcpu=cortex-m0plus \ - -DCPU_MKL25Z128VLK4 \ - -DCFG_TUSB_MCU=OPT_MCU_MKL25ZXX \ - -DCFG_EXAMPLE_VIDEO_READONLY - -LDFLAGS += \ - -Wl,--defsym,__stack_size__=0x400 \ - -Wl,--defsym,__heap_size__=0 - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=format -Wno-error=redundant-decls - -# All source paths should be relative to the top level. -LD_FILE = $(MCU_DIR)/gcc/MKL25Z128xxx4_flash.ld - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = MKL25Z128xxx4 - -# For flash-pyocd target -PYOCD_TARGET = mkl25zl128 - -# flash using pyocd -flash: flash-jlink diff --git a/hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c b/hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c deleted file mode 100644 index 46f85f6a5..000000000 --- a/hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c +++ /dev/null @@ -1,176 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * Copyright (c) 2020, Koji Kitayama - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "../board.h" -#include "fsl_device_registers.h" -#include "fsl_gpio.h" -#include "fsl_port.h" -#include "fsl_clock.h" -#include "fsl_lpsci.h" - -#include "clock_config.h" - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB0_IRQHandler(void) -{ -#if CFG_TUH_ENABLED - tuh_int_handler(0); -#endif -#if CFG_TUD_ENABLED - tud_int_handler(0); -#endif -} - -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM DECLARATION -//--------------------------------------------------------------------+ -// LED -#define LED_PINMUX IOMUXC_GPIO_AD_B0_09_GPIO1_IO09 -#define LED_PORT GPIOB -#define LED_PIN_CLOCK kCLOCK_PortB -#define LED_PIN_PORT PORTB -#define LED_PIN 19U -#define LED_PIN_FUNCTION kPORT_MuxAsGpio -#define LED_STATE_ON 0 - -// Button -#define BUTTON_PORT GPIOC -#define BUTTON_PIN_CLOCK kCLOCK_PortC -#define BUTTON_PIN_PORT PORTC -#define BUTTON_PIN 9U -#define BUTTON_PIN_FUNCTION kPORT_MuxAsGpio -#define BUTTON_STATE_ACTIVE 0 - -// UART -#define UART_PORT UART0 -#define UART_PIN_CLOCK kCLOCK_PortA -#define UART_PIN_PORT PORTA -#define UART_PIN_RX 1u -#define UART_PIN_TX 2u -#define UART_PIN_FUNCTION kPORT_MuxAlt2 -#define SOPT5_UART0RXSRC_UART_RX 0x00u /*!< UART0 receive data source select: UART0_RX pin */ -#define SOPT5_UART0TXSRC_UART_TX 0x00u /*!< UART0 transmit data source select: UART0_TX pin */ - -const uint8_t dcd_data[] = { 0x00 }; - -void board_init(void) -{ - BOARD_BootClockRUN(); - SystemCoreClockUpdate(); - -#if CFG_TUSB_OS == OPT_OS_NONE - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); -#endif - - // LED - CLOCK_EnableClock(LED_PIN_CLOCK); - PORT_SetPinMux(LED_PIN_PORT, LED_PIN, LED_PIN_FUNCTION); - gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; - GPIO_PinInit(LED_PORT, LED_PIN, &led_config); - board_led_write(false); - -#if defined(BUTTON_PORT) && defined(BUTTON_PIN) - // Button - CLOCK_EnableClock(BUTTON_PIN_CLOCK); - port_pin_config_t button_port = { - .pullSelect = kPORT_PullUp, - .mux = BUTTON_PIN_FUNCTION, - }; - PORT_SetPinConfig(BUTTON_PIN_PORT, BUTTON_PIN, &button_port); - gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; - GPIO_PinInit(BUTTON_PORT, BUTTON_PIN, &button_config); -#endif - - // UART - CLOCK_EnableClock(UART_PIN_CLOCK); - PORT_SetPinMux(UART_PIN_PORT, UART_PIN_RX, UART_PIN_FUNCTION); - PORT_SetPinMux(UART_PIN_PORT, UART_PIN_TX, UART_PIN_FUNCTION); - SIM->SOPT5 = ((SIM->SOPT5 & - (~(SIM_SOPT5_UART0TXSRC_MASK | SIM_SOPT5_UART0RXSRC_MASK))) - | SIM_SOPT5_UART0TXSRC(SOPT5_UART0TXSRC_UART_TX) - | SIM_SOPT5_UART0RXSRC(SOPT5_UART0RXSRC_UART_RX) - ); - - lpsci_config_t uart_config; - CLOCK_SetLpsci0Clock(1); - LPSCI_GetDefaultConfig(&uart_config); - uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; - uart_config.enableTx = true; - uart_config.enableRx = true; - LPSCI_Init(UART_PORT, &uart_config, CLOCK_GetPllFllSelClkFreq()); - - // USB - CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcPll0, CLOCK_GetFreq(kCLOCK_PllFllSelClk)); -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - GPIO_WritePinOutput(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); -} - -uint32_t board_button_read(void) -{ -#if defined(BUTTON_PORT) && defined(BUTTON_PIN) - return BUTTON_STATE_ACTIVE == GPIO_ReadPinInput(BUTTON_PORT, BUTTON_PIN); -#endif - return 0; -} - -int board_uart_read(uint8_t* buf, int len) -{ - LPSCI_ReadBlocking(UART_PORT, buf, len); - return len; -} - -int board_uart_write(void const * buf, int len) -{ - LPSCI_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); - return len; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif diff --git a/hw/bsp/kinetis/family.mk b/hw/bsp/kinetis/family.mk deleted file mode 100644 index 65767988a..000000000 --- a/hw/bsp/kinetis/family.mk +++ /dev/null @@ -1,46 +0,0 @@ -DEPS_SUBMODULES += hw/mcu/nxp/nxp_sdk hw/mcu/nxp/mcux-sdk - -include $(TOP)/$(BOARD_PATH)/board.mk - -CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -SRC_C += \ - src/portable/nxp/khci/dcd_khci.c \ - src/portable/nxp/khci/hcd_khci.c \ - $(MCU_DIR)/system_$(MCU).c \ - $(MCU_DIR)/project_template/clock_config.c \ - $(MCU_DIR)/drivers/fsl_clock.c \ - -INC += \ - $(TOP)/$(BOARD_PATH) \ - $(TOP)/$(SDK_DIR)/CMSIS/Include \ - $(TOP)/$(MCU_DIR) \ - $(TOP)/$(MCU_DIR)/project_template \ - $(TOP)/$(MCU_DIR)/drivers - -# mcu-sdk has different driver layout than previous old sdk -ifeq ($(SDK_DIR),hw/mcu/nxp/mcux-sdk) - -SRC_C += \ - $(SDK_DIR)/drivers/gpio/fsl_gpio.c \ - $(SDK_DIR)/drivers/lpuart/fsl_lpuart.c - -INC += \ - $(TOP)/$(SDK_DIR)/drivers/smc \ - $(TOP)/$(SDK_DIR)/drivers/common \ - $(TOP)/$(SDK_DIR)/drivers/gpio \ - $(TOP)/$(SDK_DIR)/drivers/port \ - $(TOP)/$(SDK_DIR)/drivers/lpuart \ - -else - -SRC_C += \ - $(MCU_DIR)/drivers/fsl_gpio.c \ - $(MCU_DIR)/drivers/fsl_lpsci.c \ - $(MCU_DIR)/drivers/fsl_uart.c - -endif - -SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S diff --git a/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.h b/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.h new file mode 100644 index 000000000..b1f38c997 --- /dev/null +++ b/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.h @@ -0,0 +1,58 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + + +#ifndef BOARD_H_ +#define BOARD_H_ + +#include "fsl_device_registers.h" + +// LED +// The Red LED is on PTE29. +// The Green LED is on PTC4. +// The Blue LED is on PTE31. +#define LED_PIN_CLOCK kCLOCK_PortC +#define LED_GPIO GPIOC +#define LED_PORT PORTC +#define LED_PIN 4 +#define LED_STATE_ON 0 + +// SW3 button1 +#define BUTTON_PIN_CLOCK kCLOCK_PortE +#define BUTTON_GPIO GPIOE +#define BUTTON_PORT PORTE +#define BUTTON_PIN 4 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_PORT LPUART0 +#define UART_PIN_CLOCK kCLOCK_PortB +#define UART_PIN_GPIO GPIOB +#define UART_PIN_PORT PORTB +#define UART_PIN_RX 16u +#define UART_PIN_TX 17u + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.mk new file mode 100644 index 000000000..d96ab58b8 --- /dev/null +++ b/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.mk @@ -0,0 +1,26 @@ +MCU = K32L2A41A + +CFLAGS += \ + -mcpu=cortex-m0plus \ + -DCPU_K32L2A41VLH1A \ + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual + +# All source paths should be relative to the top level. +LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld + +SRC_C += \ + $(MCU_DIR)/project_template/clock_config.c \ + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 + +# For flash-jlink target +JLINK_DEVICE = K32L2A41xxxxA + +# For flash-pyocd target +PYOCD_TARGET = K32L2A + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/frdm_k32l2a4s.c new file mode 100644 index 000000000..80830163b --- /dev/null +++ b/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/frdm_k32l2a4s.c @@ -0,0 +1,171 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * Copyright (c) 2020, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "bsp/board.h" +#include "board.h" +#include "fsl_gpio.h" +#include "fsl_port.h" +#include "fsl_clock.h" +#include "fsl_lpuart.h" + +#include "clock_config.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ + tud_int_handler(0); +} + +void board_init(void) +{ + /* Enable port clocks for UART/LED/Button pins */ + CLOCK_EnableClock(UART_PIN_CLOCK); + CLOCK_EnableClock(LED_PIN_CLOCK); + CLOCK_EnableClock(BUTTON_PIN_CLOCK); + + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit(LED_GPIO, LED_PIN, &led_config); + PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); + + gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); + const port_pin_config_t BUTTON_CFG = { + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_OpenDrainDisable, + kPORT_LowDriveStrength, + kPORT_MuxAsGpio, + kPORT_UnlockRegister + }; + PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); + + /* + Enable LPUART0 clock and configure port pins. + FIR clock is being used so the USB examples work. + */ + PCC_LPUART0 = 0U; /* Clock must be off to set PCS */ + PCC_LPUART0 = PCC_CLKCFG_PCS( 3U ); /* Select the clock. 1:OSCCLK/Bus Clock, 2:Slow IRC, 3: Fast IRC, 6: System PLL */ + PCC_LPUART0 |= PCC_CLKCFG_CGC( 1U ); /* Enable LPUART */ + + /* PORTB16 (pin 62) is configured as LPUART0_RX */ + gpio_pin_config_t const lpuart_config_rx = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(UART_PIN_GPIO, UART_PIN_RX, &lpuart_config_rx); + const port_pin_config_t UART_CFG = { + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_OpenDrainDisable, + kPORT_LowDriveStrength, + kPORT_MuxAsGpio, + kPORT_UnlockRegister + }; + PORT_SetPinConfig(UART_PIN_PORT, UART_PIN_RX, &UART_CFG); + PORT_SetPinMux( UART_PIN_PORT, UART_PIN_RX, kPORT_MuxAlt3); + + /* PORTB17 (pin 63) is configured as LPUART0_TX */ + gpio_pin_config_t const lpuart_config_tx = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit( UART_PIN_GPIO, UART_PIN_TX, &lpuart_config_tx); + PORT_SetPinMux( UART_PIN_PORT, UART_PIN_TX, kPORT_MuxAlt3); + + BOARD_BootClockRUN(); + SystemCoreClockUpdate(); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + lpuart_config_t uart_config; + LPUART_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_ScgFircClk)); + + // USB + CLOCK_EnableUsbfs0Clock(kCLOCK_IpSrcFircAsync, 48000000U); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); +} + +int board_uart_read(uint8_t* buf, int len) +{ +#if 0 /* + Use this version if want the LED to blink during BOARD=board_test, + without having to hit a key. + */ + if( 0U != (kLPUART_RxDataRegFullFlag & LPUART_GetStatusFlags( UART_PORT )) ) + { + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; + } + + return( 0 ); +#else /* Wait for 'len' characters to come in */ + + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; + +#endif +} + +int board_uart_write(void const * buf, int len) +{ + LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.h b/hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.h new file mode 100644 index 000000000..8d21fdcd4 --- /dev/null +++ b/hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.h @@ -0,0 +1,56 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + + +#ifndef BOARD_H_ +#define BOARD_H_ + +#include "fsl_device_registers.h" + +// LED +#define LED_PIN_CLOCK kCLOCK_PortD +#define LED_GPIO GPIOD +#define LED_PORT PORTD +#define LED_PIN 5 +#define LED_STATE_ON 0 + +// SW3 button1 +#define BUTTON_PIN_CLOCK kCLOCK_PortC +#define BUTTON_GPIO GPIOC +#define BUTTON_PORT PORTC +#define BUTTON_PIN 3 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_PORT LPUART0 +#define UART_PIN_CLOCK kCLOCK_PortA +#define UART_PIN_PORT PORTA +#define UART_PIN_RX 1u +#define UART_PIN_TX 2u +#define SOPT5_LPUART0RXSRC_LPUART_RX 0x00u /*!<@brief LPUART0 Receive Data Source Select: LPUART_RX pin */ +#define SOPT5_LPUART0TXSRC_LPUART_TX 0x00u /*!<@brief LPUART0 Transmit Data Source Select: LPUART0_TX pin */ + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.mk new file mode 100644 index 000000000..5f8ecbfe4 --- /dev/null +++ b/hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.mk @@ -0,0 +1,26 @@ +MCU = K32L2B31A + +CFLAGS += \ + -mcpu=cortex-m0plus \ + -DCPU_K32L2B31VLH0A \ + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls + +# All source paths should be relative to the top level. +LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld + +SRC_C += \ + $(MCU_DIR)/project_template/clock_config.c \ + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 + +# For flash-jlink target +JLINK_DEVICE = K32L2B31xxxxA + +# For flash-pyocd target +PYOCD_TARGET = K32L2B + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/kinetis_k32/boards/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/kinetis_k32/boards/frdm_k32l2b/frdm_k32l2b.c new file mode 100644 index 000000000..1566b4e2e --- /dev/null +++ b/hw/bsp/kinetis_k32/boards/frdm_k32l2b/frdm_k32l2b.c @@ -0,0 +1,140 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * Copyright (c) 2020, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "bsp/board.h" +#include "board.h" +#include "fsl_gpio.h" +#include "fsl_port.h" +#include "fsl_clock.h" +#include "fsl_lpuart.h" + +#include "clock_config.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ + tud_int_handler(0); +} + +void board_init(void) +{ + /* Enable port clocks for UART/LED/Button pins */ + CLOCK_EnableClock(UART_PIN_CLOCK); + CLOCK_EnableClock(LED_PIN_CLOCK); + CLOCK_EnableClock(BUTTON_PIN_CLOCK); + + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit(LED_GPIO, LED_PIN, &led_config); + PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); + + gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); + const port_pin_config_t BUTTON_CFG = { + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_LowDriveStrength, + kPORT_MuxAsGpio + }; + PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); + + /* PORTA1 (pin 23) is configured as LPUART0_RX */ + PORT_SetPinMux(PORTA, 1U, kPORT_MuxAlt2); + /* PORTA2 (pin 24) is configured as LPUART0_TX */ + PORT_SetPinMux(PORTA, 2U, kPORT_MuxAlt2); + + SIM->SOPT5 = ((SIM->SOPT5 & + /* Mask bits to zero which are setting */ + (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK))) + /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */ + | SIM_SOPT5_LPUART0TXSRC(SOPT5_LPUART0TXSRC_LPUART_TX) + /* LPUART0 Receive Data Source Select: LPUART_RX pin. */ + | SIM_SOPT5_LPUART0RXSRC(SOPT5_LPUART0RXSRC_LPUART_RX)); + + BOARD_BootClockRUN(); + SystemCoreClockUpdate(); + CLOCK_SetLpuart0Clock(1); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + lpuart_config_t uart_config; + LPUART_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_McgIrc48MClk)); + + // USB + CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); +} + +int board_uart_read(uint8_t* buf, int len) +{ + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; +} + +int board_uart_write(void const * buf, int len) +{ + LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/kinetis_k32/boards/kuiic/K32L2B31xxxxA_flash.ld b/hw/bsp/kinetis_k32/boards/kuiic/K32L2B31xxxxA_flash.ld new file mode 100644 index 000000000..f478a99c7 --- /dev/null +++ b/hw/bsp/kinetis_k32/boards/kuiic/K32L2B31xxxxA_flash.ld @@ -0,0 +1,216 @@ +/* +** ################################################################### +** Processors: K32L2B31VFM0A +** K32L2B31VFT0A +** K32L2B31VLH0A +** K32L2B31VMP0A +** +** Compiler: GNU C Compiler +** Reference manual: K32L2B3xRM, Rev.0, July 2019 +** Version: rev. 1.0, 2019-07-30 +** Build: b190930 +** +** Abstract: +** Linker file for the GNU C Compiler +** +** Copyright 2016 Freescale Semiconductor, Inc. +** Copyright 2016-2019 NXP +** All rights reserved. +** +** SPDX-License-Identifier: BSD-3-Clause +** +** http: www.nxp.com +** mail: support@nxp.com +** +** ################################################################### +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; +STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; + +/* Specify the memory areas */ +MEMORY +{ + m_interrupts (RX) : ORIGIN = 0x00008000, LENGTH = 0x00000200 + m_flash_config (RX) : ORIGIN = 0x00008400, LENGTH = 0x00000010 + m_text (RX) : ORIGIN = 0x00008410, LENGTH = 0x00037BF0 + m_data (RW) : ORIGIN = 0x1FFFE000, LENGTH = 0x00008000 +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into internal flash */ + .interrupts : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > m_interrupts + + .flash_config : + { + . = ALIGN(4); + KEEP(*(.FlashConfig)) /* Flash Configuration Field (FCF) */ + . = ALIGN(4); + } > m_flash_config + + /* The program code and other data goes into internal flash */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + KEEP (*(.init)) + KEEP (*(.fini)) + . = ALIGN(4); + } > m_text + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > m_text + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } > m_text + + .ctors : + { + __CTOR_LIST__ = .; + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + } > m_text + + .dtors : + { + __DTOR_LIST__ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + } > m_text + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } > m_text + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } > m_text + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } > m_text + + __etext = .; /* define a global symbol at end of code */ + __DATA_ROM = .; /* Symbol is used by startup for data initialization */ + + /* reserve MTB memory at the beginning of m_data */ + .mtb : /* MTB buffer address as defined by the hardware */ + { + . = ALIGN(8); + _mtb_start = .; + KEEP(*(.mtb_buf)) /* need to KEEP Micro Trace Buffer as not referenced by application */ + . = ALIGN(8); + _mtb_end = .; + } > m_data + + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + __DATA_RAM = .; + __data_start__ = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + KEEP(*(.jcr*)) + . = ALIGN(4); + __data_end__ = .; /* define a global symbol at data end */ + } > m_data + + __DATA_END = __DATA_ROM + (__data_end__ - __data_start__); + text_end = ORIGIN(m_text) + LENGTH(m_text); + ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data") + + /* Uninitialized data section */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + . = ALIGN(4); + __START_BSS = .; + __bss_start__ = .; + *(.bss) + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + __END_BSS = .; + } > m_data + + .heap : + { + . = ALIGN(8); + __end__ = .; + PROVIDE(end = .); + __HeapBase = .; + . += HEAP_SIZE; + __HeapLimit = .; + __heap_limit = .; /* Add for _sbrk */ + } > m_data + + .stack : + { + . = ALIGN(8); + . += STACK_SIZE; + } > m_data + + /* Initializes stack on the end of block */ + __StackTop = ORIGIN(m_data) + LENGTH(m_data); + __StackLimit = __StackTop - STACK_SIZE; + PROVIDE(__stack = __StackTop); + + .ARM.attributes 0 : { *(.ARM.attributes) } + + ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") +} diff --git a/hw/bsp/kinetis_k32/boards/kuiic/board.h b/hw/bsp/kinetis_k32/boards/kuiic/board.h new file mode 100644 index 000000000..1e2d4f18b --- /dev/null +++ b/hw/bsp/kinetis_k32/boards/kuiic/board.h @@ -0,0 +1,45 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + + +#ifndef BOARD_H_ +#define BOARD_H_ + +#include "fsl_device_registers.h" + +// LED +#define LED_PIN_CLOCK kCLOCK_PortA +#define LED_GPIO GPIOA +#define LED_PORT PORTA +#define LED_PIN 2 +#define LED_STATE_ON 1 + +// UART +#define UART_PORT LPUART1 +#define UART_PIN_RX 3u +#define UART_PIN_TX 0u + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/kinetis_k32/boards/kuiic/board.mk b/hw/bsp/kinetis_k32/boards/kuiic/board.mk new file mode 100644 index 000000000..29a12e982 --- /dev/null +++ b/hw/bsp/kinetis_k32/boards/kuiic/board.mk @@ -0,0 +1,26 @@ +MCU = K32L2B31A + +# This board uses TinyUF2 for updates +UF2_FAMILY_ID = 0x7f83e793 + +CFLAGS += \ + -mcpu=cortex-m0plus \ + -DCPU_K32L2B31VLH0A \ + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/K32L2B31xxxxA_flash.ld + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 + +# For flash-jlink target +JLINK_DEVICE = K32L2B31xxxxA + +# For flash-pyocd target +PYOCD_TARGET = K32L2B + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/kinetis_k32/boards/kuiic/kuiic.c b/hw/bsp/kinetis_k32/boards/kuiic/kuiic.c new file mode 100644 index 000000000..f9002a6d3 --- /dev/null +++ b/hw/bsp/kinetis_k32/boards/kuiic/kuiic.c @@ -0,0 +1,203 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * Copyright (c) 2020, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "bsp/board.h" +#include "board.h" +#include "fsl_smc.h" +#include "fsl_gpio.h" +#include "fsl_port.h" +#include "fsl_clock.h" +#include "fsl_lpuart.h" + +/******************************************************************************* + * Definitions + ******************************************************************************/ +#define SIM_OSC32KSEL_LPO_CLK 3U /*!< OSC32KSEL select: LPO clock */ +#define SOPT5_LPUART1RXSRC_LPUART_RX 0x00u /*!<@brief LPUART1 Receive Data Source Select: LPUART_RX pin */ +#define SOPT5_LPUART1TXSRC_LPUART_TX 0x00u /*!<@brief LPUART1 Transmit Data Source Select: LPUART_TX pin */ +#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ + +/******************************************************************************* + * Variables + ******************************************************************************/ +/* System clock frequency. */ +// extern uint32_t SystemCoreClock; + +/******************************************************************************* + * Variables for BOARD_BootClockRUN configuration + ******************************************************************************/ +const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN = { + .outSrc = kMCGLITE_ClkSrcHirc, /* MCGOUTCLK source is HIRC */ + .irclkEnableMode = kMCGLITE_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */ + .ircs = kMCGLITE_Lirc8M, /* Slow internal reference (LIRC) 8 MHz clock selected */ + .fcrdiv = kMCGLITE_LircDivBy1, /* Low-frequency Internal Reference Clock Divider: divided by 1 */ + .lircDiv2 = kMCGLITE_LircDivBy1, /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */ + .hircEnableInNotHircMode = true, /* HIRC source is enabled */ +}; +const sim_clock_config_t simConfig_BOARD_BootClockRUN = { + .er32kSrc = SIM_OSC32KSEL_LPO_CLK, /* OSC32KSEL select: LPO clock */ + .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */ +}; + +/******************************************************************************* + * Code for BOARD_BootClockRUN configuration + ******************************************************************************/ +void BOARD_BootClockRUN(void) +{ + /* Set the system clock dividers in SIM to safe value. */ + CLOCK_SetSimSafeDivs(); + /* Set MCG to HIRC mode. */ + CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockRUN); + /* Set the clock configuration in SIM module. */ + CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN); + /* Set SystemCoreClock variable. */ + SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; +} + + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ + tud_int_handler(0); +} + +void board_init(void) +{ + /* Enable port clocks for GPIO pins */ + CLOCK_EnableClock(kCLOCK_PortA); + CLOCK_EnableClock(kCLOCK_PortB); + CLOCK_EnableClock(kCLOCK_PortC); + CLOCK_EnableClock(kCLOCK_PortD); + CLOCK_EnableClock(kCLOCK_PortE); + + + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 1 }; + GPIO_PinInit(GPIOA, 1U, &led_config); + PORT_SetPinMux(PORTA, 1U, kPORT_MuxAsGpio); + led_config.outputLogic = 0; + GPIO_PinInit(GPIOA, 2U, &led_config); + PORT_SetPinMux(PORTA, 2U, kPORT_MuxAsGpio); + +#ifdef BUTTON_PIN + gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); + const port_pin_config_t BUTTON_CFG = { + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_LowDriveStrength, + kPORT_MuxAsGpio + }; + PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); +#endif + + /* PORTC3 is configured as LPUART0_RX */ + PORT_SetPinMux(PORTC, 3U, kPORT_MuxAlt3); + /* PORTA2 (pin 24) is configured as LPUART0_TX */ + PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt3); + + SIM->SOPT5 = ((SIM->SOPT5 & + /* Mask bits to zero which are setting */ + (~(SIM_SOPT5_LPUART1TXSRC_MASK | SIM_SOPT5_LPUART1RXSRC_MASK))) + /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */ + | SIM_SOPT5_LPUART1TXSRC(SOPT5_LPUART1TXSRC_LPUART_TX) + /* LPUART0 Receive Data Source Select: LPUART_RX pin. */ + | SIM_SOPT5_LPUART1RXSRC(SOPT5_LPUART1RXSRC_LPUART_RX)); + + BOARD_BootClockRUN(); + SystemCoreClockUpdate(); + CLOCK_SetLpuart1Clock(1); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + lpuart_config_t uart_config; + LPUART_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_McgIrc48MClk)); + + // USB + CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + if (state) { + LED_GPIO->PDDR |= GPIO_FIT_REG((1UL << LED_PIN)); + } else { + LED_GPIO->PDDR &= GPIO_FIT_REG(~(1UL << LED_PIN)); + } +// GPIO_PinWrite(GPIOA, 1, state ? LED_STATE_ON : (1-LED_STATE_ON) ); +// GPIO_PinWrite(GPIOA, 2, state ? (1-LED_STATE_ON) : LED_STATE_ON ); +} + +uint32_t board_button_read(void) +{ +#ifdef BUTTON_PIN + return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); +#else + return 0; +#endif +} + +int board_uart_read(uint8_t* buf, int len) +{ + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; +} + +int board_uart_write(void const * buf, int len) +{ + LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/kinetis_k32/family.mk b/hw/bsp/kinetis_k32/family.mk new file mode 100644 index 000000000..f89138b72 --- /dev/null +++ b/hw/bsp/kinetis_k32/family.mk @@ -0,0 +1,32 @@ +SDK_DIR = hw/mcu/nxp/mcux-sdk +DEPS_SUBMODULES += $(SDK_DIR) + +MCU_DIR = $(SDK_DIR)/devices/$(MCU) +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + -DCFG_TUSB_MCU=OPT_MCU_KINETIS_K32 + +SRC_C += \ + src/portable/nxp/khci/dcd_khci.c \ + src/portable/nxp/khci/hcd_khci.c \ + $(MCU_DIR)/system_$(MCU).c \ + $(MCU_DIR)/drivers/fsl_clock.c \ + $(SDK_DIR)/drivers/gpio/fsl_gpio.c \ + $(SDK_DIR)/drivers/lpuart/fsl_lpuart.c + +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/$(SDK_DIR)/CMSIS/Include \ + $(TOP)/$(MCU_DIR) \ + $(TOP)/$(MCU_DIR)/project_template \ + $(TOP)/$(MCU_DIR)/drivers \ + $(TOP)/$(SDK_DIR)/drivers/smc \ + $(TOP)/$(SDK_DIR)/drivers/common \ + $(TOP)/$(SDK_DIR)/drivers/gpio \ + $(TOP)/$(SDK_DIR)/drivers/port \ + $(TOP)/$(SDK_DIR)/drivers/lpuart \ + +SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S diff --git a/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk new file mode 100644 index 000000000..affe864fb --- /dev/null +++ b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk @@ -0,0 +1,20 @@ +MCU = MKL25Z4 + +CFLAGS += \ + -DCPU_MKL25Z128VLK4 \ + -DCFG_EXAMPLE_VIDEO_READONLY + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=format -Wno-error=redundant-decls + +# All source paths should be relative to the top level. +LD_FILE = $(MCU_DIR)/gcc/MKL25Z128xxx4_flash.ld + +# For flash-jlink target +JLINK_DEVICE = MKL25Z128xxx4 + +# For flash-pyocd target +PYOCD_TARGET = mkl25zl128 + +# flash using pyocd +flash: flash-jlink diff --git a/hw/bsp/kinetis_kl/boards/frdm_kl25z/frdm_kl25z.c b/hw/bsp/kinetis_kl/boards/frdm_kl25z/frdm_kl25z.c new file mode 100644 index 000000000..46f85f6a5 --- /dev/null +++ b/hw/bsp/kinetis_kl/boards/frdm_kl25z/frdm_kl25z.c @@ -0,0 +1,176 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * Copyright (c) 2020, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "../board.h" +#include "fsl_device_registers.h" +#include "fsl_gpio.h" +#include "fsl_port.h" +#include "fsl_clock.h" +#include "fsl_lpsci.h" + +#include "clock_config.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ +#if CFG_TUH_ENABLED + tuh_int_handler(0); +#endif +#if CFG_TUD_ENABLED + tud_int_handler(0); +#endif +} + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM DECLARATION +//--------------------------------------------------------------------+ +// LED +#define LED_PINMUX IOMUXC_GPIO_AD_B0_09_GPIO1_IO09 +#define LED_PORT GPIOB +#define LED_PIN_CLOCK kCLOCK_PortB +#define LED_PIN_PORT PORTB +#define LED_PIN 19U +#define LED_PIN_FUNCTION kPORT_MuxAsGpio +#define LED_STATE_ON 0 + +// Button +#define BUTTON_PORT GPIOC +#define BUTTON_PIN_CLOCK kCLOCK_PortC +#define BUTTON_PIN_PORT PORTC +#define BUTTON_PIN 9U +#define BUTTON_PIN_FUNCTION kPORT_MuxAsGpio +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_PORT UART0 +#define UART_PIN_CLOCK kCLOCK_PortA +#define UART_PIN_PORT PORTA +#define UART_PIN_RX 1u +#define UART_PIN_TX 2u +#define UART_PIN_FUNCTION kPORT_MuxAlt2 +#define SOPT5_UART0RXSRC_UART_RX 0x00u /*!< UART0 receive data source select: UART0_RX pin */ +#define SOPT5_UART0TXSRC_UART_TX 0x00u /*!< UART0 transmit data source select: UART0_TX pin */ + +const uint8_t dcd_data[] = { 0x00 }; + +void board_init(void) +{ + BOARD_BootClockRUN(); + SystemCoreClockUpdate(); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + // LED + CLOCK_EnableClock(LED_PIN_CLOCK); + PORT_SetPinMux(LED_PIN_PORT, LED_PIN, LED_PIN_FUNCTION); + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit(LED_PORT, LED_PIN, &led_config); + board_led_write(false); + +#if defined(BUTTON_PORT) && defined(BUTTON_PIN) + // Button + CLOCK_EnableClock(BUTTON_PIN_CLOCK); + port_pin_config_t button_port = { + .pullSelect = kPORT_PullUp, + .mux = BUTTON_PIN_FUNCTION, + }; + PORT_SetPinConfig(BUTTON_PIN_PORT, BUTTON_PIN, &button_port); + gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(BUTTON_PORT, BUTTON_PIN, &button_config); +#endif + + // UART + CLOCK_EnableClock(UART_PIN_CLOCK); + PORT_SetPinMux(UART_PIN_PORT, UART_PIN_RX, UART_PIN_FUNCTION); + PORT_SetPinMux(UART_PIN_PORT, UART_PIN_TX, UART_PIN_FUNCTION); + SIM->SOPT5 = ((SIM->SOPT5 & + (~(SIM_SOPT5_UART0TXSRC_MASK | SIM_SOPT5_UART0RXSRC_MASK))) + | SIM_SOPT5_UART0TXSRC(SOPT5_UART0TXSRC_UART_TX) + | SIM_SOPT5_UART0RXSRC(SOPT5_UART0RXSRC_UART_RX) + ); + + lpsci_config_t uart_config; + CLOCK_SetLpsci0Clock(1); + LPSCI_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPSCI_Init(UART_PORT, &uart_config, CLOCK_GetPllFllSelClkFreq()); + + // USB + CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcPll0, CLOCK_GetFreq(kCLOCK_PllFllSelClk)); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_WritePinOutput(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ +#if defined(BUTTON_PORT) && defined(BUTTON_PIN) + return BUTTON_STATE_ACTIVE == GPIO_ReadPinInput(BUTTON_PORT, BUTTON_PIN); +#endif + return 0; +} + +int board_uart_read(uint8_t* buf, int len) +{ + LPSCI_ReadBlocking(UART_PORT, buf, len); + return len; +} + +int board_uart_write(void const * buf, int len) +{ + LPSCI_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/kinetis_kl/family.mk b/hw/bsp/kinetis_kl/family.mk new file mode 100644 index 000000000..e805d6dae --- /dev/null +++ b/hw/bsp/kinetis_kl/family.mk @@ -0,0 +1,37 @@ +SDK_DIR = hw/mcu/nxp/nxp_sdk +DEPS_SUBMODULES += $(SDK_DIR) + +MCU_DIR = $(SDK_DIR)/devices/$(MCU) +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m0plus \ + -DCFG_TUSB_MCU=OPT_MCU_KINETIS_KL \ + +LDFLAGS += \ + -Wl,--defsym,__stack_size__=0x400 \ + -Wl,--defsym,__heap_size__=0 + +SRC_C += \ + src/portable/nxp/khci/dcd_khci.c \ + src/portable/nxp/khci/hcd_khci.c \ + $(MCU_DIR)/system_$(MCU).c \ + $(MCU_DIR)/project_template/clock_config.c \ + $(MCU_DIR)/drivers/fsl_clock.c \ + $(MCU_DIR)/drivers/fsl_gpio.c \ + $(MCU_DIR)/drivers/fsl_lpsci.c \ + $(MCU_DIR)/drivers/fsl_uart.c + +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/$(SDK_DIR)/CMSIS/Include \ + $(TOP)/$(MCU_DIR) \ + $(TOP)/$(MCU_DIR)/project_template \ + $(TOP)/$(MCU_DIR)/drivers + +SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld b/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld deleted file mode 100644 index f478a99c7..000000000 --- a/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld +++ /dev/null @@ -1,216 +0,0 @@ -/* -** ################################################################### -** Processors: K32L2B31VFM0A -** K32L2B31VFT0A -** K32L2B31VLH0A -** K32L2B31VMP0A -** -** Compiler: GNU C Compiler -** Reference manual: K32L2B3xRM, Rev.0, July 2019 -** Version: rev. 1.0, 2019-07-30 -** Build: b190930 -** -** Abstract: -** Linker file for the GNU C Compiler -** -** Copyright 2016 Freescale Semiconductor, Inc. -** Copyright 2016-2019 NXP -** All rights reserved. -** -** SPDX-License-Identifier: BSD-3-Clause -** -** http: www.nxp.com -** mail: support@nxp.com -** -** ################################################################### -*/ - -/* Entry Point */ -ENTRY(Reset_Handler) - -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; -STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; - -/* Specify the memory areas */ -MEMORY -{ - m_interrupts (RX) : ORIGIN = 0x00008000, LENGTH = 0x00000200 - m_flash_config (RX) : ORIGIN = 0x00008400, LENGTH = 0x00000010 - m_text (RX) : ORIGIN = 0x00008410, LENGTH = 0x00037BF0 - m_data (RW) : ORIGIN = 0x1FFFE000, LENGTH = 0x00008000 -} - -/* Define output sections */ -SECTIONS -{ - /* The startup code goes first into internal flash */ - .interrupts : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } > m_interrupts - - .flash_config : - { - . = ALIGN(4); - KEEP(*(.FlashConfig)) /* Flash Configuration Field (FCF) */ - . = ALIGN(4); - } > m_flash_config - - /* The program code and other data goes into internal flash */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - *(.glue_7) /* glue arm to thumb code */ - *(.glue_7t) /* glue thumb to arm code */ - *(.eh_frame) - KEEP (*(.init)) - KEEP (*(.fini)) - . = ALIGN(4); - } > m_text - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > m_text - - .ARM : - { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } > m_text - - .ctors : - { - __CTOR_LIST__ = .; - /* gcc uses crtbegin.o to find the start of - the constructors, so we make sure it is - first. Because this is a wildcard, it - doesn't matter if the user does not - actually link against crtbegin.o; the - linker won't look for a file to match a - wildcard. The wildcard also means that it - doesn't matter which directory crtbegin.o - is in. */ - KEEP (*crtbegin.o(.ctors)) - KEEP (*crtbegin?.o(.ctors)) - /* We don't want to include the .ctor section from - from the crtend.o file until after the sorted ctors. - The .ctor section from the crtend file contains the - end of ctors marker and it must be last */ - KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - __CTOR_END__ = .; - } > m_text - - .dtors : - { - __DTOR_LIST__ = .; - KEEP (*crtbegin.o(.dtors)) - KEEP (*crtbegin?.o(.dtors)) - KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - __DTOR_END__ = .; - } > m_text - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array*)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } > m_text - - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array*)) - PROVIDE_HIDDEN (__init_array_end = .); - } > m_text - - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(SORT(.fini_array.*))) - KEEP (*(.fini_array*)) - PROVIDE_HIDDEN (__fini_array_end = .); - } > m_text - - __etext = .; /* define a global symbol at end of code */ - __DATA_ROM = .; /* Symbol is used by startup for data initialization */ - - /* reserve MTB memory at the beginning of m_data */ - .mtb : /* MTB buffer address as defined by the hardware */ - { - . = ALIGN(8); - _mtb_start = .; - KEEP(*(.mtb_buf)) /* need to KEEP Micro Trace Buffer as not referenced by application */ - . = ALIGN(8); - _mtb_end = .; - } > m_data - - .data : AT(__DATA_ROM) - { - . = ALIGN(4); - __DATA_RAM = .; - __data_start__ = .; /* create a global symbol at data start */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - KEEP(*(.jcr*)) - . = ALIGN(4); - __data_end__ = .; /* define a global symbol at data end */ - } > m_data - - __DATA_END = __DATA_ROM + (__data_end__ - __data_start__); - text_end = ORIGIN(m_text) + LENGTH(m_text); - ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data") - - /* Uninitialized data section */ - .bss : - { - /* This is used by the startup in order to initialize the .bss section */ - . = ALIGN(4); - __START_BSS = .; - __bss_start__ = .; - *(.bss) - *(.bss*) - *(COMMON) - . = ALIGN(4); - __bss_end__ = .; - __END_BSS = .; - } > m_data - - .heap : - { - . = ALIGN(8); - __end__ = .; - PROVIDE(end = .); - __HeapBase = .; - . += HEAP_SIZE; - __HeapLimit = .; - __heap_limit = .; /* Add for _sbrk */ - } > m_data - - .stack : - { - . = ALIGN(8); - . += STACK_SIZE; - } > m_data - - /* Initializes stack on the end of block */ - __StackTop = ORIGIN(m_data) + LENGTH(m_data); - __StackLimit = __StackTop - STACK_SIZE; - PROVIDE(__stack = __StackTop); - - .ARM.attributes 0 : { *(.ARM.attributes) } - - ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") -} diff --git a/hw/bsp/kuiic/board.h b/hw/bsp/kuiic/board.h deleted file mode 100644 index 1e2d4f18b..000000000 --- a/hw/bsp/kuiic/board.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - - -#ifndef BOARD_H_ -#define BOARD_H_ - -#include "fsl_device_registers.h" - -// LED -#define LED_PIN_CLOCK kCLOCK_PortA -#define LED_GPIO GPIOA -#define LED_PORT PORTA -#define LED_PIN 2 -#define LED_STATE_ON 1 - -// UART -#define UART_PORT LPUART1 -#define UART_PIN_RX 3u -#define UART_PIN_TX 0u - -#endif /* BOARD_H_ */ diff --git a/hw/bsp/kuiic/board.mk b/hw/bsp/kuiic/board.mk deleted file mode 100644 index cb3459586..000000000 --- a/hw/bsp/kuiic/board.mk +++ /dev/null @@ -1,52 +0,0 @@ -SDK_DIR = hw/mcu/nxp/mcux-sdk -DEPS_SUBMODULES += $(SDK_DIR) tools/uf2 - -# This board uses TinyUF2 for updates -UF2_FAMILY_ID = 0x7f83e793 - -CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ - -DCPU_K32L2B31VLH0A \ - -DCFG_TUSB_MCU=OPT_MCU_K32L2BXX - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter - -MCU_DIR = $(SDK_DIR)/devices/K32L2B31A - -# All source paths should be relative to the top level. -LD_FILE = /hw/bsp/$(BOARD)/K32L2B31xxxxA_flash.ld - -SRC_C += \ - src/portable/nxp/khci/dcd_khci.c \ - $(MCU_DIR)/system_K32L2B31A.c \ - $(MCU_DIR)/drivers/fsl_clock.c \ - $(SDK_DIR)/drivers/gpio/fsl_gpio.c \ - $(SDK_DIR)/drivers/lpuart/fsl_lpuart.c - -INC += \ - $(TOP)/hw/bsp/$(BOARD) \ - $(TOP)/$(SDK_DIR)/CMSIS/Include \ - $(TOP)/$(SDK_DIR)/drivers/smc \ - $(TOP)/$(SDK_DIR)/drivers/common \ - $(TOP)/$(SDK_DIR)/drivers/gpio \ - $(TOP)/$(SDK_DIR)/drivers/port \ - $(TOP)/$(SDK_DIR)/drivers/lpuart \ - $(TOP)/$(MCU_DIR) \ - $(TOP)/$(MCU_DIR)/drivers - -SRC_S += $(MCU_DIR)/gcc/startup_K32L2B31A.S - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = MKL25Z128xxx4 - -# For flash-pyocd target -PYOCD_TARGET = K32L2B - -# flash using pyocd -flash: flash-pyocd diff --git a/hw/bsp/kuiic/kuiic.c b/hw/bsp/kuiic/kuiic.c deleted file mode 100644 index 97677d47a..000000000 --- a/hw/bsp/kuiic/kuiic.c +++ /dev/null @@ -1,203 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * Copyright (c) 2020, Koji Kitayama - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "../board.h" -#include "board.h" -#include "fsl_smc.h" -#include "fsl_gpio.h" -#include "fsl_port.h" -#include "fsl_clock.h" -#include "fsl_lpuart.h" - -/******************************************************************************* - * Definitions - ******************************************************************************/ -#define SIM_OSC32KSEL_LPO_CLK 3U /*!< OSC32KSEL select: LPO clock */ -#define SOPT5_LPUART1RXSRC_LPUART_RX 0x00u /*!<@brief LPUART1 Receive Data Source Select: LPUART_RX pin */ -#define SOPT5_LPUART1TXSRC_LPUART_TX 0x00u /*!<@brief LPUART1 Transmit Data Source Select: LPUART_TX pin */ -#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ - -/******************************************************************************* - * Variables - ******************************************************************************/ -/* System clock frequency. */ -// extern uint32_t SystemCoreClock; - -/******************************************************************************* - * Variables for BOARD_BootClockRUN configuration - ******************************************************************************/ -const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN = { - .outSrc = kMCGLITE_ClkSrcHirc, /* MCGOUTCLK source is HIRC */ - .irclkEnableMode = kMCGLITE_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */ - .ircs = kMCGLITE_Lirc8M, /* Slow internal reference (LIRC) 8 MHz clock selected */ - .fcrdiv = kMCGLITE_LircDivBy1, /* Low-frequency Internal Reference Clock Divider: divided by 1 */ - .lircDiv2 = kMCGLITE_LircDivBy1, /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */ - .hircEnableInNotHircMode = true, /* HIRC source is enabled */ -}; -const sim_clock_config_t simConfig_BOARD_BootClockRUN = { - .er32kSrc = SIM_OSC32KSEL_LPO_CLK, /* OSC32KSEL select: LPO clock */ - .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */ -}; - -/******************************************************************************* - * Code for BOARD_BootClockRUN configuration - ******************************************************************************/ -void BOARD_BootClockRUN(void) -{ - /* Set the system clock dividers in SIM to safe value. */ - CLOCK_SetSimSafeDivs(); - /* Set MCG to HIRC mode. */ - CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockRUN); - /* Set the clock configuration in SIM module. */ - CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN); - /* Set SystemCoreClock variable. */ - SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; -} - - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB0_IRQHandler(void) -{ - tud_int_handler(0); -} - -void board_init(void) -{ - /* Enable port clocks for GPIO pins */ - CLOCK_EnableClock(kCLOCK_PortA); - CLOCK_EnableClock(kCLOCK_PortB); - CLOCK_EnableClock(kCLOCK_PortC); - CLOCK_EnableClock(kCLOCK_PortD); - CLOCK_EnableClock(kCLOCK_PortE); - - - gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 1 }; - GPIO_PinInit(GPIOA, 1U, &led_config); - PORT_SetPinMux(PORTA, 1U, kPORT_MuxAsGpio); - led_config.outputLogic = 0; - GPIO_PinInit(GPIOA, 2U, &led_config); - PORT_SetPinMux(PORTA, 2U, kPORT_MuxAsGpio); - -#ifdef BUTTON_PIN - gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; - GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); - const port_pin_config_t BUTTON_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_LowDriveStrength, - kPORT_MuxAsGpio - }; - PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); -#endif - - /* PORTC3 is configured as LPUART0_RX */ - PORT_SetPinMux(PORTC, 3U, kPORT_MuxAlt3); - /* PORTA2 (pin 24) is configured as LPUART0_TX */ - PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt3); - - SIM->SOPT5 = ((SIM->SOPT5 & - /* Mask bits to zero which are setting */ - (~(SIM_SOPT5_LPUART1TXSRC_MASK | SIM_SOPT5_LPUART1RXSRC_MASK))) - /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */ - | SIM_SOPT5_LPUART1TXSRC(SOPT5_LPUART1TXSRC_LPUART_TX) - /* LPUART0 Receive Data Source Select: LPUART_RX pin. */ - | SIM_SOPT5_LPUART1RXSRC(SOPT5_LPUART1RXSRC_LPUART_RX)); - - BOARD_BootClockRUN(); - SystemCoreClockUpdate(); - CLOCK_SetLpuart1Clock(1); - -#if CFG_TUSB_OS == OPT_OS_NONE - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); -#endif - - lpuart_config_t uart_config; - LPUART_GetDefaultConfig(&uart_config); - uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; - uart_config.enableTx = true; - uart_config.enableRx = true; - LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_McgIrc48MClk)); - - // USB - CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - if (state) { - LED_GPIO->PDDR |= GPIO_FIT_REG((1UL << LED_PIN)); - } else { - LED_GPIO->PDDR &= GPIO_FIT_REG(~(1UL << LED_PIN)); - } -// GPIO_PinWrite(GPIOA, 1, state ? LED_STATE_ON : (1-LED_STATE_ON) ); -// GPIO_PinWrite(GPIOA, 2, state ? (1-LED_STATE_ON) : LED_STATE_ON ); -} - -uint32_t board_button_read(void) -{ -#ifdef BUTTON_PIN - return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); -#else - return 0; -#endif -} - -int board_uart_read(uint8_t* buf, int len) -{ - LPUART_ReadBlocking(UART_PORT, buf, len); - return len; -} - -int board_uart_write(void const * buf, int len) -{ - LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); - return len; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index a94e1877f..b903abeca 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -85,7 +85,7 @@ #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_RHPORT_HIGHSPEED 1 // Port0 HS, Port1 HS -#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2AXX, OPT_MCU_K32L2BXX) +#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32) #define TUP_USBIP_CHIPIDEA_FS #define TUP_USBIP_CHIPIDEA_FS_KINETIS #define TUP_DCD_ENDPOINT_MAX 16 diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c index 27073dce7..6d25cd862 100644 --- a/src/portable/nxp/khci/hcd_khci.c +++ b/src/portable/nxp/khci/hcd_khci.c @@ -26,15 +26,14 @@ #include "tusb_option.h" -#if CFG_TUH_ENABLED && \ - ( \ - ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || \ - ( CFG_TUSB_MCU == OPT_MCU_K32L2AXX ) || \ - ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX ) \ - ) - -#include "fsl_device_registers.h" -#define KHCI USB0 +#if CFG_TUH_ENABLED && defined(TUP_USBIP_CHIPIDEA_FS) + +#ifdef TUP_USBIP_CHIPIDEA_FS_KINETIS + #include "fsl_device_registers.h" + #define KHCI USB0 +#else + #error "MCU is not supported" +#endif #include "host/hcd.h" diff --git a/src/tusb_option.h b/src/tusb_option.h index 5a234e357..c679f2f12 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -117,9 +117,11 @@ #define OPT_MCU_RP2040 1100 ///< Raspberry Pi RP2040 // NXP Kinetis -#define OPT_MCU_MKL25ZXX 1200 ///< NXP MKL25Zxx -#define OPT_MCU_K32L2BXX 1201 ///< NXP K32L2Bxx -#define OPT_MCU_K32L2AXX 1202 ///< NXP K32L2Axx +#define OPT_MCU_KINETIS_KL 1200 ///< NXP KL series +#define OPT_MCU_KINETIS_K32 1201 ///< NXP K32 series + +#define OPT_MCU_MKL25ZXX 1200 ///< Alias to KL (obsolete) +#define OPT_MCU_K32L2BXX 1201 ///< Alias to K32 (obsolete) // Silabs #define OPT_MCU_EFM32GG 1300 ///< Silabs EFM32GG -- cgit v1.3.1 From e44e461ce3295f5680ea211048ade473963ba016 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 21 Mar 2023 12:54:43 +0700 Subject: add tuh_set_interface --- src/class/cdc/cdc_host.c | 6 +++--- src/class/cdc/cdc_host.h | 2 +- src/common/tusb_common.h | 6 ------ src/common/tusb_types.h | 5 +++++ src/host/usbh.c | 50 +++++++++++++++++++++++++++++++++++++++--------- src/host/usbh.h | 5 +++++ 6 files changed, 55 insertions(+), 19 deletions(-) (limited to 'src/common') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 011ee49dc..d34662cb7 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -97,7 +97,7 @@ static inline uint8_t get_idx_by_ep_addr(uint8_t daddr, uint8_t ep_addr) } } - return TU_INDEX_INVALID_8; + return TUSB_INDEX_INVALID_8; } @@ -124,7 +124,7 @@ uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num) if (p_cdc->daddr == daddr && p_cdc->bInterfaceNumber == itf_num) return i; } - return TU_INDEX_INVALID_8; + return TUSB_INDEX_INVALID_8; } bool tuh_cdc_itf_get_info(uint8_t idx, tuh_cdc_itf_info_t* info) @@ -533,7 +533,7 @@ static void process_cdc_config(tuh_xfer_t* xfer) uintptr_t const state = xfer->user_data; uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex); uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num); - TU_ASSERT(idx != TU_INDEX_INVALID_8, ); + TU_ASSERT(idx != TUSB_INDEX_INVALID_8, ); switch(state) { diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index 4090d0e9f..03f32e542 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -80,7 +80,7 @@ typedef struct } tuh_cdc_itf_info_t; // Get Interface index from device address + interface number -// return TUSB_INDEX_INVALID (0xFF) if not found +// return TUSB_INDEX_INVALID_8 (0xFF) if not found uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num); // Get Interface information diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index faccf8726..957491aa9 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -75,12 +75,6 @@ #include "tusb_timeout.h" // TODO remove -enum -{ - TU_INDEX_INVALID_8 = 0xFFu -}; - - //--------------------------------------------------------------------+ // Optional API implemented by application if needed // TODO move to a more ovious place/file diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index d567bd482..39a2d4564 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -273,6 +273,11 @@ enum CONTROL_STAGE_ACK }; +enum +{ + TUSB_INDEX_INVALID_8 = 0xFFu +}; + //--------------------------------------------------------------------+ // USB Descriptors //--------------------------------------------------------------------+ diff --git a/src/host/usbh.c b/src/host/usbh.c index 9ccbe7557..5a14aea5f 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -195,7 +195,7 @@ enum { CONFIG_NUM = 1 }; // default to use configuration 1 // sum of end device + hub #define TOTAL_DEVICES (CFG_TUH_DEVICE_MAX + CFG_TUH_HUB) -static uint8_t _usbh_controller = TU_INDEX_INVALID_8; +static uint8_t _usbh_controller = TUSB_INDEX_INVALID_8; // Device with address = 0 for enumeration static usbh_dev0_t _dev0; @@ -303,13 +303,13 @@ tusb_speed_t tuh_speed_get (uint8_t dev_addr) static void clear_device(usbh_device_t* dev) { tu_memclr(dev, sizeof(usbh_device_t)); - memset(dev->itf2drv, TU_INDEX_INVALID_8, sizeof(dev->itf2drv)); // invalid mapping - memset(dev->ep2drv , TU_INDEX_INVALID_8, sizeof(dev->ep2drv )); // invalid mapping + memset(dev->itf2drv, TUSB_INDEX_INVALID_8, sizeof(dev->itf2drv)); // invalid mapping + memset(dev->ep2drv , TUSB_INDEX_INVALID_8, sizeof(dev->ep2drv )); // invalid mapping } bool tuh_inited(void) { - return _usbh_controller != TU_INDEX_INVALID_8; + return _usbh_controller != TUSB_INDEX_INVALID_8; } bool tuh_init(uint8_t controller_id) @@ -1033,6 +1033,38 @@ bool tuh_configuration_set(uint8_t daddr, uint8_t config_num, return tuh_control_xfer(&xfer); } +bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt, + tuh_xfer_cb_t complete_cb, uintptr_t user_data) +{ + TU_LOG_USBH("Set Interface %u Alternate %u\r\n", itf_num, itf_alt); + + tusb_control_request_t const request = + { + .bmRequestType_bit = + { + .recipient = TUSB_REQ_RCPT_DEVICE, + .type = TUSB_REQ_TYPE_STANDARD, + .direction = TUSB_DIR_OUT + }, + .bRequest = TUSB_REQ_SET_INTERFACE, + .wValue = tu_htole16(itf_alt), + .wIndex = tu_htole16(itf_num), + .wLength = 0 + }; + + tuh_xfer_t xfer = + { + .daddr = daddr, + .ep_addr = 0, + .setup = &request, + .buffer = NULL, + .complete_cb = complete_cb, + .user_data = user_data + }; + + return tuh_control_xfer(&xfer); +} + //--------------------------------------------------------------------+ // Descriptor Sync //--------------------------------------------------------------------+ @@ -1358,11 +1390,11 @@ static void process_enumeration(tuh_xfer_t* xfer) dev->configured = 1; - // Start the Set Configuration process for interfaces (itf = TU_INDEX_INVALID_8) + // Start the Set Configuration process for interfaces (itf = TUSB_INDEX_INVALID_8) // Since driver can perform control transfer within its set_config, this is done asynchronously. // The process continue with next interface when class driver complete its sequence with usbh_driver_set_config_complete() - // TODO use separated API instead of using TU_INDEX_INVALID_8 - usbh_driver_set_config_complete(daddr, TU_INDEX_INVALID_8); + // TODO use separated API instead of using TUSB_INDEX_INVALID_8 + usbh_driver_set_config_complete(daddr, TUSB_INDEX_INVALID_8); } break; @@ -1562,7 +1594,7 @@ static bool _parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configur uint8_t const itf_num = desc_itf->bInterfaceNumber+i; // Interface number must not be used already - TU_ASSERT( TU_INDEX_INVALID_8 == dev->itf2drv[itf_num] ); + TU_ASSERT( TUSB_INDEX_INVALID_8 == dev->itf2drv[itf_num] ); dev->itf2drv[itf_num] = drv_id; } @@ -1596,7 +1628,7 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num) // IAD binding interface such as CDCs should return itf_num + 1 when complete // with usbh_driver_set_config_complete() uint8_t const drv_id = dev->itf2drv[itf_num]; - if (drv_id != TU_INDEX_INVALID_8) + if (drv_id != TUSB_INDEX_INVALID_8) { usbh_class_driver_t const * driver = &usbh_class_drivers[drv_id]; TU_LOG_USBH("%s set config: itf = %u\r\n", driver->name, itf_num); diff --git a/src/host/usbh.h b/src/host/usbh.h index 7942de5c2..45e6356bc 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -171,6 +171,11 @@ bool tuh_edpt_open(uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep); bool tuh_configuration_set(uint8_t daddr, uint8_t config_num, tuh_xfer_cb_t complete_cb, uintptr_t user_data); +// Set Interface (control transfer) +// true on success, false if there is on-going control transfer or incorrect parameters +bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt, + tuh_xfer_cb_t complete_cb, uintptr_t user_data); + //--------------------------------------------------------------------+ // Descriptors Asynchronous (non-blocking) //--------------------------------------------------------------------+ -- cgit v1.3.1 From 718bcdb8bc3b9b522e9bad12ace2c7b62589cb4c Mon Sep 17 00:00:00 2001 From: John Cronin Date: Mon, 3 Apr 2023 13:56:16 +0100 Subject: Add STM32L5 support - no OTG similar to some L4s --- src/common/tusb_mcu.h | 6 ++++++ src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 6 ++++++ src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 8 ++++++++ src/tusb_option.h | 1 + 4 files changed, 21 insertions(+) (limited to 'src/common') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index b903abeca..ba8976a8c 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -229,6 +229,12 @@ #define TUP_USBIP_DWC2_STM32 #define TUP_DCD_ENDPOINT_MAX 6 +#elif TU_CHECK_MCU(OPT_MCU_STM32L5) + #define TUP_USBIP_FSDEV + #define TUP_USBIP_FSDEV_STM32 + #define TUP_DCD_ENDPOINT_MAX 8 + + //--------------------------------------------------------------------+ // Sony //--------------------------------------------------------------------+ diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index 1677cfa12..98d3d0829 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -362,6 +362,9 @@ void dcd_int_enable (uint8_t rhport) NVIC_EnableIRQ(USB_HP_IRQn); NVIC_EnableIRQ(USB_LP_IRQn); +#elif CFG_TUSB_MCU == OPT_MCU_STM32L5 + NVIC_EnableIRQ(USB_FS_IRQn); + #else #error Unknown arch in USB driver #endif @@ -409,6 +412,9 @@ void dcd_int_disable(uint8_t rhport) NVIC_DisableIRQ(USB_HP_IRQn); NVIC_DisableIRQ(USB_LP_IRQn); +#elif CFG_TUSB_MCU == OPT_MCU_STM32L5 + NVIC_DisableIRQ(USB_FS_IRQn); + #else #error Unknown arch in USB driver #endif diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h index 015b177cf..e3fc8aeb5 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h @@ -93,6 +93,14 @@ #include "stm32l4xx.h" #define PMA_LENGTH (1024u) +#elif CFG_TUSB_MCU == OPT_MCU_STM32L5 + #include "stm32l5xx.h" + #define PMA_LENGTH (1024u) + + #ifndef USB_PMAADDR + #define USB_PMAADDR (USB_BASE + (USB_PMAADDR_NS - USB_BASE_NS)) + #endif + #else #error You are using an untested or unimplemented STM32 variant. Please update the driver. // This includes L1x0, L1x1, L1x2, L4x2 and L4x3, G1x1, G1x3, and G1x4 diff --git a/src/tusb_option.h b/src/tusb_option.h index f8ac722f4..44d036ea4 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -82,6 +82,7 @@ #define OPT_MCU_STM32G4 311 ///< ST G4 #define OPT_MCU_STM32WB 312 ///< ST WB #define OPT_MCU_STM32U5 313 ///< ST U5 +#define OPT_MCU_STM32L5 314 ///< ST L5 // Sony #define OPT_MCU_CXD56 400 ///< SONY CXD56 -- cgit v1.3.1 From d97b6d57de0b2586624dec51b37ccd699a0314a6 Mon Sep 17 00:00:00 2001 From: Reimu NotMoe Date: Mon, 17 Apr 2023 20:20:22 +0800 Subject: Fix compatibility with the latest Microchip XC16 compiler --- src/common/tusb_compiler.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 713bbb8d4..a1794584d 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -138,10 +138,14 @@ #define TU_ATTR_BIT_FIELD_ORDER_BEGIN #define TU_ATTR_BIT_FIELD_ORDER_END - #if __has_attribute(__fallthrough__) - #define TU_ATTR_FALLTHROUGH __attribute__((fallthrough)) - #else + #if defined(__XC16) #define TU_ATTR_FALLTHROUGH do {} while (0) /* fallthrough */ + #else + #if __has_attribute(__fallthrough__) + #define TU_ATTR_FALLTHROUGH __attribute__((fallthrough)) + #else + #define TU_ATTR_FALLTHROUGH do {} while (0) /* fallthrough */ + #endif #endif // Endian conversion use well-known host to network (big endian) naming -- cgit v1.3.1 From fa8f3731c1b2e069dd07d30e86ea4a3af18c34dc Mon Sep 17 00:00:00 2001 From: Reimu NotMoe Date: Mon, 17 Apr 2023 21:02:12 +0800 Subject: Implement TU_BSWAP{16,32} correctly for Microchip XC16 --- src/common/tusb_compiler.h | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index a1794584d..dce32e92b 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -155,8 +155,17 @@ #define TU_BYTE_ORDER TU_BIG_ENDIAN #endif - #define TU_BSWAP16(u16) (__builtin_bswap16(u16)) - #define TU_BSWAP32(u32) (__builtin_bswap32(u32)) + // Unfortunately XC16 doesn't provide builtins for 32bit endian conversion + #if defined(__XC16) + #define TU_BSWAP16(u16) (__builtin_swap(u16)) + #define TU_BSWAP32(u32) ((((u32) & 0xff000000) >> 24) | \ + (((u32) & 0x00ff0000) >> 8) | \ + (((u32) & 0x0000ff00) << 8) | \ + (((u32) & 0x000000ff) << 24)) + #else + #define TU_BSWAP16(u16) (__builtin_bswap16(u16)) + #define TU_BSWAP32(u32) (__builtin_bswap32(u32)) + #endif #ifndef __ARMCC_VERSION // List of obsolete callback function that is renamed and should not be defined. -- cgit v1.3.1 From 9002dc706711741b6db2c53de4e5b94b02322f37 Mon Sep 17 00:00:00 2001 From: Reimu NotMoe Date: Tue, 18 Apr 2023 17:27:42 +0800 Subject: Use __GNUC__ macro to determine if __has_attribute is supported --- src/common/tusb_compiler.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/common') diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index dce32e92b..5ab56e145 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -138,7 +138,7 @@ #define TU_ATTR_BIT_FIELD_ORDER_BEGIN #define TU_ATTR_BIT_FIELD_ORDER_END - #if defined(__XC16) + #if __GNUC__ < 5 #define TU_ATTR_FALLTHROUGH do {} while (0) /* fallthrough */ #else #if __has_attribute(__fallthrough__) -- cgit v1.3.1 From 206d63e038744b228cfa6051d701cab50b520fe6 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 11 May 2023 14:26:12 +0700 Subject: correct EHCI reporting failed xfer (instead of stalled) when device is unplugged --- src/class/cdc/cdc_host.c | 21 +++++++++++---------- src/class/hid/hid_host.c | 27 ++++++++++++++++----------- src/class/msc/msc_host.c | 10 +++++++--- src/common/tusb_debug.h | 1 + src/device/usbd_control.c | 9 ++++++--- src/host/hub.c | 9 ++++++++- src/host/usbh.c | 20 +++++++++++++------- src/portable/ehci/ehci.c | 11 ++++++++--- src/tusb.c | 4 ++++ 9 files changed, 74 insertions(+), 38 deletions(-) (limited to 'src/common') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index fe3691bf4..9ff666ed4 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -35,8 +35,7 @@ // Debug level, TUSB_CFG_DEBUG must be at least this level for debug message #define CDCH_DEBUG 2 - -#define TU_LOG_CDCH(...) TU_LOG(CDCH_DEBUG, __VA_ARGS__) +#define TU_LOG_DRV(...) TU_LOG(CDCH_DEBUG, __VA_ARGS__) //--------------------------------------------------------------------+ // Host CDC Interface @@ -537,6 +536,8 @@ void cdch_close(uint8_t daddr) cdch_interface_t* p_cdc = &cdch_data[idx]; if (p_cdc->daddr == daddr) { + TU_LOG_DRV(" CDCh close addr = %u index = %u\r\n", daddr, idx); + // Invoke application callback if (tuh_cdc_umount_cb) tuh_cdc_umount_cb(idx); @@ -804,7 +805,7 @@ static void acm_process_config(tuh_xfer_t* xfer) static bool acm_set_control_line_state(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { TU_VERIFY(p_cdc->acm_capability.support_line_request); - TU_LOG_CDCH("CDC ACM Set Control Line State\r\n"); + TU_LOG_DRV("CDC ACM Set Control Line State\r\n"); tusb_control_request_t const request = { .bmRequestType_bit = { @@ -834,7 +835,7 @@ static bool acm_set_control_line_state(cdch_interface_t* p_cdc, uint16_t line_st } static bool acm_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { - TU_LOG_CDCH("CDC ACM Set Line Conding\r\n"); + TU_LOG_DRV("CDC ACM Set Line Conding\r\n"); tusb_control_request_t const request = { .bmRequestType_bit = { @@ -894,7 +895,7 @@ static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc); TU_VERIFY(p_cdc); - TU_LOG_CDCH("FTDI opened\r\n"); + TU_LOG_DRV("FTDI opened\r\n"); p_cdc->serial_drid = SERIAL_DRIVER_FTDI; @@ -938,7 +939,7 @@ static bool ftdi_sio_reset(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_cb, u static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { - TU_LOG_CDCH("CDC FTDI Set Control Line State\r\n"); + TU_LOG_DRV("CDC FTDI Set Control Line State\r\n"); p_cdc->user_control_cb = complete_cb; TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_MODEM_CTRL, 0x0300 | line_state, complete_cb ? cdch_internal_control_complete : NULL, user_data)); @@ -974,7 +975,7 @@ static uint32_t ftdi_232bm_baud_to_divisor(uint32_t baud) static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { uint16_t const divisor = (uint16_t) ftdi_232bm_baud_to_divisor(baudrate); - TU_LOG_CDCH("CDC FTDI Set BaudRate = %lu, divisor = 0x%04x\n", baudrate, divisor); + TU_LOG_DRV("CDC FTDI Set BaudRate = %lu, divisor = 0x%04x\n", baudrate, divisor); p_cdc->user_control_cb = complete_cb; _ftdi_requested_baud = baudrate; @@ -1061,7 +1062,7 @@ static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, ui cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc); TU_VERIFY(p_cdc); - TU_LOG_CDCH("CP210x opened\r\n"); + TU_LOG_DRV("CP210x opened\r\n"); p_cdc->serial_drid = SERIAL_DRIVER_CP210X; // endpoint pair @@ -1109,7 +1110,7 @@ static bool cp210x_ifc_enable(cdch_interface_t* p_cdc, uint16_t enabled, tuh_xfe } static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { - TU_LOG_CDCH("CDC CP210x Set BaudRate = %lu\n", baudrate); + TU_LOG_DRV("CDC CP210x Set BaudRate = %lu\n", baudrate); uint32_t baud_le = tu_htole32(baudrate); p_cdc->user_control_cb = complete_cb; return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baud_le, 4, @@ -1118,7 +1119,7 @@ static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_ static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { - TU_LOG_CDCH("CDC CP210x Set Control Line State\r\n"); + TU_LOG_DRV("CDC CP210x Set Control Line State\r\n"); p_cdc->user_control_cb = complete_cb; return cp210x_set_request(p_cdc, CP210X_SET_MHS, 0x0300 | line_state, NULL, 0, complete_cb ? cdch_internal_control_complete : NULL, user_data); diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index d95d3ef35..3a491937a 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -33,6 +33,10 @@ #include "hid_host.h" +// Debug level, TUSB_CFG_DEBUG must be at least this level for debug message +#define HIDH_DEBUG 2 +#define TU_LOG_DRV(...) TU_LOG(HIDH_DEBUG, __VA_ARGS__) + //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ @@ -207,7 +211,7 @@ static void set_protocol_complete(tuh_xfer_t* xfer) static bool _hidh_set_protocol(uint8_t daddr, uint8_t itf_num, uint8_t protocol, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { - TU_LOG2("HID Set Protocol = %d\r\n", protocol); + TU_LOG_DRV("HID Set Protocol = %d\r\n", protocol); tusb_control_request_t const request = { @@ -246,7 +250,7 @@ bool tuh_hid_set_protocol(uint8_t daddr, uint8_t idx, uint8_t protocol) static void set_report_complete(tuh_xfer_t* xfer) { - TU_LOG2("HID Set Report complete\r\n"); + TU_LOG_DRV("HID Set Report complete\r\n"); if (tuh_hid_set_report_complete_cb) { @@ -266,7 +270,7 @@ bool tuh_hid_set_report(uint8_t daddr, uint8_t idx, uint8_t report_id, uint8_t r hidh_interface_t* p_hid = get_hid_itf(daddr, idx); TU_VERIFY(p_hid); - TU_LOG2("HID Set Report: id = %u, type = %u, len = %u\r\n", report_id, report_type, len); + TU_LOG_DRV("HID Set Report: id = %u, type = %u, len = %u\r\n", report_id, report_type, len); tusb_control_request_t const request = { @@ -298,7 +302,7 @@ bool tuh_hid_set_report(uint8_t daddr, uint8_t idx, uint8_t report_id, uint8_t r static bool _hidh_set_idle(uint8_t daddr, uint8_t itf_num, uint16_t idle_rate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { // SET IDLE request, device can stall if not support this request - TU_LOG2("HID Set Idle \r\n"); + TU_LOG_DRV("HID Set Idle \r\n"); tusb_control_request_t const request = { @@ -367,7 +371,7 @@ bool tuh_hid_send_ready(uint8_t dev_addr, uint8_t idx) bool tuh_hid_send_report(uint8_t daddr, uint8_t idx, uint8_t report_id, const void* report, uint16_t len) { - TU_LOG2("HID Send Report %d\r\n", report_id); + TU_LOG_DRV("HID Send Report %d\r\n", report_id); hidh_interface_t* p_hid = get_hid_itf(daddr, idx); TU_VERIFY(p_hid); @@ -430,7 +434,7 @@ bool hidh_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t result, uint32_t if ( dir == TUSB_DIR_IN ) { - TU_LOG2(" Get Report callback (%u, %u)\r\n", daddr, idx); + TU_LOG_DRV(" Get Report callback (%u, %u)\r\n", daddr, idx); TU_LOG3_MEM(p_hid->epin_buf, xferred_bytes, 2); tuh_hid_report_received_cb(daddr, idx, p_hid->epin_buf, (uint16_t) xferred_bytes); }else @@ -448,8 +452,9 @@ void hidh_close(uint8_t daddr) hidh_interface_t* p_hid = &_hidh_itf[i]; if (p_hid->daddr == daddr) { - if(tuh_hid_umount_cb) tuh_hid_umount_cb(daddr, i); - p_hid->daddr = 0; + TU_LOG_DRV(" HIDh close addr = %u index = %u\r\n", daddr, i); + if(tuh_hid_umount_cb) tuh_hid_umount_cb(daddr, i); + p_hid->daddr = 0; } } } @@ -465,7 +470,7 @@ bool hidh_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *desc_ TU_VERIFY(TUSB_CLASS_HID == desc_itf->bInterfaceClass); - TU_LOG2("[%u] HID opening Interface %u\r\n", daddr, desc_itf->bInterfaceNumber); + TU_LOG_DRV("[%u] HID opening Interface %u\r\n", daddr, desc_itf->bInterfaceNumber); // len = interface + hid + n*endpoints uint16_t const drv_len = (uint16_t) (sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + @@ -592,7 +597,7 @@ static void process_set_config(tuh_xfer_t* xfer) // using usbh enumeration buffer since report descriptor can be very long if( p_hid->report_desc_len > CFG_TUH_ENUMERATION_BUFSIZE ) { - TU_LOG2("HID Skip Report Descriptor since it is too large %u bytes\r\n", p_hid->report_desc_len); + TU_LOG_DRV("HID Skip Report Descriptor since it is too large %u bytes\r\n", p_hid->report_desc_len); // Driver is mounted without report descriptor config_driver_mount_complete(daddr, idx, NULL, 0); @@ -763,7 +768,7 @@ uint8_t tuh_hid_parse_report_descriptor(tuh_hid_report_info_t* report_info_arr, for ( uint8_t i = 0; i < report_num; i++ ) { info = report_info_arr+i; - TU_LOG2("%u: id = %u, usage_page = %u, usage = %u\r\n", i, info->report_id, info->usage_page, info->usage); + TU_LOG_DRV("%u: id = %u, usage_page = %u, usage = %u\r\n", i, info->report_id, info->usage_page, info->usage); } return report_num; diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 1b48813ec..138443de4 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -35,7 +35,6 @@ // Debug level, TUSB_CFG_DEBUG must be at least this level for debug message #define MSCH_DEBUG 2 - #define TU_LOG_MSCH(...) TU_LOG(MSCH_DEBUG, __VA_ARGS__) //--------------------------------------------------------------------+ @@ -82,6 +81,7 @@ CFG_TUH_MEM_SECTION static msch_interface_t _msch_itf[CFG_TUH_DEVICE_MAX]; CFG_TUH_MEM_SECTION CFG_TUH_MEM_ALIGN static uint8_t _msch_buffer[sizeof(scsi_inquiry_resp_t)]; +// FIXME potential nul reference TU_ATTR_ALWAYS_INLINE static inline msch_interface_t* get_itf(uint8_t dev_addr) { @@ -305,11 +305,15 @@ void msch_init(void) void msch_close(uint8_t dev_addr) { TU_VERIFY(dev_addr <= CFG_TUH_DEVICE_MAX, ); - msch_interface_t* p_msc = get_itf(dev_addr); + TU_VERIFY(p_msc->configured, ); + + TU_LOG_MSCH(" MSCh close addr = %d\r\n", dev_addr); // invoke Application Callback - if (p_msc->mounted && tuh_msc_umount_cb) tuh_msc_umount_cb(dev_addr); + if (p_msc->mounted) { + if(tuh_msc_umount_cb) tuh_msc_umount_cb(dev_addr); + } tu_memclr(p_msc, sizeof(msch_interface_t)); } diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index 82f682043..36507041f 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -46,6 +46,7 @@ #if CFG_TUSB_DEBUG >= 2 extern char const* const tu_str_speed[]; extern char const* const tu_str_std_request[]; +extern char const* const tu_str_xfer_result[]; #endif void tu_print_mem(void const *buf, uint32_t count, uint8_t indent); diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c index ea8eef285..2afe967b5 100644 --- a/src/device/usbd_control.c +++ b/src/device/usbd_control.c @@ -32,7 +32,10 @@ #include "tusb.h" #include "device/usbd_pvt.h" -#if CFG_TUSB_DEBUG >= 2 +// Debug level of USBD Control +#define USBD_CONTROL_DEBUG 2 + +#if CFG_TUSB_DEBUG >= USBD_CONTROL_DEBUG extern void usbd_driver_print_control_complete_name(usbd_control_xfer_cb_t callback); #endif @@ -188,7 +191,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result { TU_VERIFY(_ctrl_xfer.buffer); memcpy(_ctrl_xfer.buffer, _usbd_ctrl_buf, xferred_bytes); - TU_LOG_MEM(2, _usbd_ctrl_buf, xferred_bytes, 2); + TU_LOG_MEM(USBD_CONTROL_DEBUG, _usbd_ctrl_buf, xferred_bytes, 2); } _ctrl_xfer.total_xferred += (uint16_t) xferred_bytes; @@ -205,7 +208,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result // callback can still stall control in status phase e.g out data does not make sense if ( _ctrl_xfer.complete_cb ) { - #if CFG_TUSB_DEBUG >= 2 + #if CFG_TUSB_DEBUG >= USBD_CONTROL_DEBUG usbd_driver_print_control_complete_name(_ctrl_xfer.complete_cb); #endif diff --git a/src/host/hub.c b/src/host/hub.c index 386ad6aae..85bf22b3e 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -33,6 +33,10 @@ #include "usbh_classdriver.h" #include "hub.h" +// Debug level, TUSB_CFG_DEBUG must be at least this level for debug message +#define HUB_DEBUG 2 +#define TU_LOG_DRV(...) TU_LOG(HUB_DEBUG, __VA_ARGS__) + //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ @@ -218,7 +222,10 @@ void hub_close(uint8_t dev_addr) TU_VERIFY(dev_addr > CFG_TUH_DEVICE_MAX, ); hub_interface_t* p_hub = get_itf(dev_addr); - if (p_hub->ep_in) tu_memclr(p_hub, sizeof( hub_interface_t)); + if (p_hub->ep_in) { + TU_LOG_DRV(" HUB close addr = %d\r\n", dev_addr); + tu_memclr(p_hub, sizeof( hub_interface_t)); + } } bool hub_edpt_status_xfer(uint8_t dev_addr) diff --git a/src/host/usbh.c b/src/host/usbh.c index 24ce47a7f..4cfc7c5c2 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -61,6 +61,8 @@ typedef struct uint8_t hub_addr; uint8_t hub_port; uint8_t speed; + + // enumeration is in progress, done when all interfaces are configured volatile uint8_t enumerating; // struct TU_ATTR_PACKED { @@ -436,7 +438,8 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const ep_dir = tu_edpt_dir(ep_addr); - TU_LOG_USBH("on EP %02X with %u bytes\r\n", ep_addr, (unsigned int) event.xfer_complete.len); + TU_LOG_USBH("on EP %02X with %u bytes %s\r\n", ep_addr, (unsigned int) event.xfer_complete.len, + tu_str_xfer_result[event.xfer_complete.result]); if (event.dev_addr == 0) { @@ -866,6 +869,10 @@ TU_ATTR_FAST_FUNC void hcd_event_handler(hcd_event_t const* event, bool in_isr) { switch (event->event_id) { +// case HCD_EVENT_DEVICE_REMOVE: +// +// break; + default: osal_queue_send(_usbh_q, event, in_isr); break; @@ -1128,30 +1135,28 @@ static void process_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t h usbh_device_t* dev = &_usbh_devices[dev_id]; uint8_t const dev_addr = dev_id+1; - // TODO Hub multiple level if (dev->rhport == rhport && (hub_addr == 0 || dev->hub_addr == hub_addr) && // hub_addr = 0 means roothub (hub_port == 0 || dev->hub_port == hub_port) && // hub_port = 0 means all devices of downstream hub dev->connected) { - TU_LOG_USBH(" Address = %u\r\n", dev_addr); + TU_LOG_USBH("Device unplugged address = %u\r\n", dev_addr); if (is_hub_addr(dev_addr)) { - TU_LOG(USBH_DEBUG, "HUB address = %u is unmounted\r\n", dev_addr); + TU_LOG(USBH_DEBUG, " is a HUB device\r\n", dev_addr); // If the device itself is a usb hub, unplug downstream devices. // FIXME un-roll recursive calls to prevent potential stack overflow process_device_unplugged(rhport, dev_addr, 0); }else { - // Invoke callback before closing driver + // Invoke callback before closing driver (maybe call it later ?) if (tuh_umount_cb) tuh_umount_cb(dev_addr); } // Close class driver for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) { - TU_LOG_USBH("%s close\r\n", usbh_class_drivers[drv_id].name); usbh_class_drivers[drv_id].close(dev_addr); } @@ -1449,6 +1454,7 @@ static uint8_t get_new_address(bool is_hub) { uint8_t start; uint8_t end; + if ( is_hub ) { start = CFG_TUH_DEVICE_MAX; @@ -1459,7 +1465,7 @@ static uint8_t get_new_address(bool is_hub) end = start + CFG_TUH_DEVICE_MAX; } - for ( uint8_t idx = start; idx < end; idx++) + for (uint8_t idx = start; idx < end; idx++) { if (!_usbh_devices[idx].connected) return (idx+1); } diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index 494e2e50f..69e59ce65 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -142,8 +142,11 @@ static inline ehci_qhd_t* qhd_get_from_addr (uint8_t dev_addr, uint8_t ep_addr); // determine if a queue head has bus-related error static inline bool qhd_has_xact_error (ehci_qhd_t * p_qhd) { - return (p_qhd->qtd_overlay.buffer_err || p_qhd->qtd_overlay.babble_err || p_qhd->qtd_overlay.xact_err); - //p_qhd->qtd_overlay.non_hs_period_missed_uframe || p_qhd->qtd_overlay.pingstate_err TODO split transaction error + volatile ehci_qtd_t *qtd_overlay = &p_qhd->qtd_overlay; + + // Error count = 0 often occurs when device disconnected + return (qtd_overlay->err_count == 0 || qtd_overlay->buffer_err || qtd_overlay->babble_err || qtd_overlay->xact_err); + //qtd_overlay->non_hs_period_missed_uframe || qtd_overlay->pingstate_err TODO split transaction error } static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); @@ -630,7 +633,9 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) p_qhd->total_xferred_bytes += p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes; -// if ( XFER_RESULT_FAILED == error_event ) TU_BREAKPOINT(); // TODO skip unplugged device +// if ( XFER_RESULT_FAILED == error_event ) { +// TU_BREAKPOINT(); // TODO skip unplugged device +// } p_qhd->p_qtd_list_head->used = 0; // free QTD qtd_remove_1st_from_qhd(p_qhd); diff --git a/src/tusb.c b/src/tusb.c index 85fe5a3cc..7327db685 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -439,6 +439,10 @@ char const* const tu_str_std_request[] = "Synch Frame" }; +char const* const tu_str_xfer_result[] = { + "OK", "Failed", "Stalled", "Timeout" +}; + #endif static void dump_str_line(uint8_t const* buf, uint16_t count) -- cgit v1.3.1 From 1ef820ecfe569e181b8f20cb936f632e51d8257e Mon Sep 17 00:00:00 2001 From: Ha Thach Date: Tue, 23 May 2023 21:45:00 +0700 Subject: Enhance chipidea (#2075) * update chipidea dcd, remove manual ep_count and use DCCPARAMS to get number of endpoint instead * add dcd dcache for chipidea * add cmake for lpc18 * add makefile build for mcx * use fork of mcu sdk * fix ci build with nrf * flash rp2040 with openocd --- .github/workflows/build_arm.yml | 3 +- .github/workflows/cmake_arm.yml | 1 + .idea/cmake.xml | 7 +- .idea/runConfigurations/rt1010_jlink.xml | 10 + .idea/runConfigurations/rt1010_nxplink.xml | 10 - .idea/runConfigurations/rt1060_nxplink.xml | 10 - .pre-commit-config.yaml | 16 +- examples/device/CMakeLists.txt | 2 +- hw/bsp/board_mcu.h | 2 +- hw/bsp/family_support.cmake | 7 + hw/bsp/imxrt/family.cmake | 11 +- hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake | 11 + hw/bsp/lpc18/boards/mcb1800/board.cmake | 11 + hw/bsp/lpc18/family.cmake | 155 +++++++++++ hw/bsp/lpc55/family.cmake | 6 +- hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h | 166 ++++++++++++ hw/bsp/mcx/boards/mcxn947brk/board.cmake | 18 ++ hw/bsp/mcx/boards/mcxn947brk/board.h | 66 +++++ hw/bsp/mcx/boards/mcxn947brk/board.mk | 11 + hw/bsp/mcx/boards/mcxn947brk/clock_config.c | 338 ++++++++++++++++++++++++ hw/bsp/mcx/boards/mcxn947brk/clock_config.h | 177 +++++++++++++ hw/bsp/mcx/boards/mcxn947brk/pin_mux.c | 141 ++++++++++ hw/bsp/mcx/boards/mcxn947brk/pin_mux.h | 51 ++++ hw/bsp/mcx/family.c | 262 ++++++++++++++++++ hw/bsp/mcx/family.cmake | 179 +++++++++++++ hw/bsp/mcx/family.mk | 48 ++++ hw/bsp/nrf/family.cmake | 11 +- src/common/tusb_mcu.h | 26 +- src/device/dcd.h | 16 ++ src/portable/chipidea/ci_hs/ci_hs_imxrt.h | 32 ++- src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h | 6 +- src/portable/chipidea/ci_hs/ci_hs_mcx.h | 52 ++++ src/portable/chipidea/ci_hs/ci_hs_type.h | 14 +- src/portable/chipidea/ci_hs/dcd_ci_hs.c | 96 +++++-- src/portable/chipidea/ci_hs/hcd_ci_hs.c | 21 +- src/portable/ehci/ehci.c | 13 +- src/tusb_option.h | 6 +- tools/cmake/cpu/cortex-m3.cmake | 10 + tools/cmake/cpu/cortex-m33.cmake | 5 +- tools/cmake/toolchain/arm_gcc.cmake | 2 + tools/get_deps.py | 2 +- tools/make/cpu/cortex-m33.mk | 4 +- 42 files changed, 1914 insertions(+), 121 deletions(-) create mode 100644 .idea/runConfigurations/rt1010_jlink.xml delete mode 100644 .idea/runConfigurations/rt1010_nxplink.xml delete mode 100644 .idea/runConfigurations/rt1060_nxplink.xml create mode 100644 hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake create mode 100644 hw/bsp/lpc18/boards/mcb1800/board.cmake create mode 100644 hw/bsp/lpc18/family.cmake create mode 100644 hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h create mode 100644 hw/bsp/mcx/boards/mcxn947brk/board.cmake create mode 100644 hw/bsp/mcx/boards/mcxn947brk/board.h create mode 100644 hw/bsp/mcx/boards/mcxn947brk/board.mk create mode 100644 hw/bsp/mcx/boards/mcxn947brk/clock_config.c create mode 100644 hw/bsp/mcx/boards/mcxn947brk/clock_config.h create mode 100644 hw/bsp/mcx/boards/mcxn947brk/pin_mux.c create mode 100644 hw/bsp/mcx/boards/mcxn947brk/pin_mux.h create mode 100644 hw/bsp/mcx/family.c create mode 100644 hw/bsp/mcx/family.cmake create mode 100644 hw/bsp/mcx/family.mk create mode 100644 src/portable/chipidea/ci_hs/ci_hs_mcx.h create mode 100644 tools/cmake/cpu/cortex-m3.cmake (limited to 'src/common') diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index f0b01b43d..917c83d74 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -142,8 +142,7 @@ jobs: - name: Create flash.sh run: | - #echo > flash.sh 'cmdout=$(openocd -f "interface/picoprobe.cfg" -f "target/rp2040.cfg" -c "program $1 reset exit")' - echo > flash.sh 'pyocd flash -t rp2040 $1' + echo > flash.sh 'cmdout=$(openocd -f "interface/cmsis-dap.cfg" -f "target/rp2040.cfg" -c "adapter speed 5000" -c "program $1 reset exit")' echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi' chmod +x flash.sh diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml index 844a03443..12173fb63 100644 --- a/.github/workflows/cmake_arm.yml +++ b/.github/workflows/cmake_arm.yml @@ -32,6 +32,7 @@ jobs: matrix: family: # Alphabetical order + - 'mcx' - 'imxrt' steps: - name: Setup Python diff --git a/.idea/cmake.xml b/.idea/cmake.xml index 7dacd0003..a80ebed3c 100644 --- a/.idea/cmake.xml +++ b/.idea/cmake.xml @@ -2,8 +2,9 @@ - - + + + @@ -29,6 +30,8 @@ + + \ No newline at end of file diff --git a/.idea/runConfigurations/rt1010_jlink.xml b/.idea/runConfigurations/rt1010_jlink.xml new file mode 100644 index 000000000..70cfeea53 --- /dev/null +++ b/.idea/runConfigurations/rt1010_jlink.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/rt1010_nxplink.xml b/.idea/runConfigurations/rt1010_nxplink.xml deleted file mode 100644 index cf3bf842f..000000000 --- a/.idea/runConfigurations/rt1010_nxplink.xml +++ /dev/null @@ -1,10 +0,0 @@ - - - - - - - - - \ No newline at end of file diff --git a/.idea/runConfigurations/rt1060_nxplink.xml b/.idea/runConfigurations/rt1060_nxplink.xml deleted file mode 100644 index d3303bdb6..000000000 --- a/.idea/runConfigurations/rt1060_nxplink.xml +++ /dev/null @@ -1,10 +0,0 @@ - - - - - - - - - \ No newline at end of file diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index 6fb98afb8..4071ec326 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -8,8 +8,16 @@ repos: hooks: - id: check-yaml - id: trailing-whitespace + exclude: | + (?x)^( + hw/bsp/mcx/sdk/ + ) - id: end-of-file-fixer - exclude: ^.idea/ + exclude: | + (?x)^( + .idea/| + hw/bsp/mcx/sdk/ + ) - id: forbid-submodules - repo: https://github.com/codespell-project/codespell @@ -17,7 +25,11 @@ repos: hooks: - id: codespell args: [-w] - exclude: ^lib/ + exclude: | + (?x)^( + lib/| + hw/bsp/mcx/sdk/ + ) - repo: local hooks: diff --git a/examples/device/CMakeLists.txt b/examples/device/CMakeLists.txt index 10a1f4c26..89cfceeeb 100644 --- a/examples/device/CMakeLists.txt +++ b/examples/device/CMakeLists.txt @@ -24,7 +24,7 @@ family_add_subdirectory(midi_test) family_add_subdirectory(msc_dual_lun) # FIXME temp skip net_lwip_webserver for imxrt for now -if (NOT ${FAMILY} STREQUAL "imxrt") +if (NOT ${FAMILY} STREQUAL "imxrt" AND NOT ${FAMILY} STREQUAL "mcx") family_add_subdirectory(net_lwip_webserver) endif() diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index cd195a19b..35210dbae 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -44,7 +44,7 @@ TU_CHECK_MCU(OPT_MCU_LPC40XX, OPT_MCU_LPC43XX) #include "chip.h" -#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX, OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX) +#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX, OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX, OPT_MCU_MCXN9) #include "fsl_device_registers.h" #elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32) diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index 442aba955..d2d675332 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -135,6 +135,13 @@ function(family_add_default_example_warnings TARGET) endif() endfunction() + +# add_custom_command(TARGET ${TARGET} POST_BUILD +# COMMAND ${CMAKE_OBJCOPY} -O ihex $ ${TARGET}.hex +# COMMAND ${CMAKE_OBJCOPY} -O binary $ ${TARGET}.bin +# COMMENT "Creating ${TARGET}.hex and ${TARGET}.bin" +# ) + # Add flash jlink target function(family_flash_jlink TARGET) if (NOT DEFINED JLINKEXE) diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake index 5261e5810..ade744aa5 100644 --- a/hw/bsp/imxrt/family.cmake +++ b/hw/bsp/imxrt/family.cmake @@ -1,8 +1,4 @@ -if (TARGET _imxrt_family_inclusion_marker) - return() -endif () - -add_library(_imxrt_family_inclusion_marker INTERFACE) +include_guard() if (NOT BOARD) message(FATAL_ERROR "BOARD not specified") @@ -87,6 +83,11 @@ function(family_configure_target TARGET) # set output name to .elf set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf) + # run size after build + add_custom_command(TARGET ${TARGET} POST_BUILD + COMMAND ${TOOLCHAIN_SIZE} $ + ) + # TOP is path to root directory set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..") diff --git a/hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake b/hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake new file mode 100644 index 000000000..b540012a4 --- /dev/null +++ b/hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake @@ -0,0 +1,11 @@ +set(MCU_VARIANT LPC18S37) + +set(JLINK_DEVICE LPC18S37) +set(PYOCD_TARGET LPC18S37) +set(NXPLINK_DEVICE LPC18S37:LPCXPRESSO18S37) + +set(LD_FILE_gcc ${CMAKE_CURRENT_LIST_DIR}/lpc1837.ld) + +function(update_board TARGET) + # nothing to do +endfunction() diff --git a/hw/bsp/lpc18/boards/mcb1800/board.cmake b/hw/bsp/lpc18/boards/mcb1800/board.cmake new file mode 100644 index 000000000..1efeafd12 --- /dev/null +++ b/hw/bsp/lpc18/boards/mcb1800/board.cmake @@ -0,0 +1,11 @@ +set(MCU_VARIANT LPC1857) + +set(JLINK_DEVICE LPC1857) +set(PYOCD_TARGET LPC1857) +set(NXPLINK_DEVICE LPC1857:MCB1857) + +set(LD_FILE_gcc ${CMAKE_CURRENT_LIST_DIR}/lpc1857.ld) + +function(update_board TARGET) + # nothing to do +endfunction() diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake new file mode 100644 index 000000000..059408fe9 --- /dev/null +++ b/hw/bsp/lpc18/family.cmake @@ -0,0 +1,155 @@ +include_guard() + +if (NOT BOARD) + message(FATAL_ERROR "BOARD not specified") +endif () + +# TOP is path to root directory +set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..") +set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc18xx/lpc_chip_18xx) + +# toolchain set up +set(CMAKE_SYSTEM_PROCESSOR cortex-m3 CACHE INTERNAL "System Processor") +set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) + +set(FAMILY_MCUS LPC18XX CACHE INTERNAL "") + +# include board specific +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) + + +#------------------------------------ +# BOARD_TARGET +#------------------------------------ +# only need to be built ONCE for all examples +set(BOARD_TARGET board_${BOARD}) +if (NOT TARGET ${BOARD_TARGET}) + add_library(${BOARD_TARGET} STATIC + ${SDK_DIR}/../gcc/cr_startup_lpc18xx.c + ${SDK_DIR}/src/chip_18xx_43xx.c + ${SDK_DIR}/src/clock_18xx_43xx.c + ${SDK_DIR}/src/gpio_18xx_43xx.c + ${SDK_DIR}/src/sysinit_18xx_43xx.c + ${SDK_DIR}/src/uart_18xx_43xx.c + ) + target_compile_options(${BOARD_TARGET} PUBLIC + -nostdlib + ) + target_compile_definitions(${BOARD_TARGET} PUBLIC + __USE_LPCOPEN + CORE_M3 + ) + target_include_directories(${BOARD_TARGET} PUBLIC + ${SDK_DIR}/inc + ${SDK_DIR}/inc/config_18xx + ) + update_board(${BOARD_TARGET}) + + if (NOT DEFINED LD_FILE_${TOOLCHAIN}) + MESSAGE(FATAL_ERROR "LD_FILE_${TOOLCHAIN} not defined") + endif () + + if (TOOLCHAIN STREQUAL "gcc") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--script=${LD_FILE_gcc}" + "LINKER:-Map=$>,$,$>${CMAKE_EXECUTABLE_SUFFIX}.map" + # nanolib + --specs=nosys.specs + --specs=nano.specs + ) + else () + # TODO support IAR + endif () +endif () # BOARD_TARGET + +#------------------------------------ +# Functions +#------------------------------------ +function(family_configure_target TARGET) + # set output name to .elf + set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf) + + # run size after build + add_custom_command(TARGET ${TARGET} POST_BUILD + COMMAND ${TOOLCHAIN_SIZE} $ + ) + + #---------- Port Specific ---------- + # These files are built for each example since it depends on example's tusb_config.h + target_sources(${TARGET} PUBLIC + # TinyUSB Port + ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c + ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c + ${TOP}/src/portable/ehci/ehci.c + # BSP + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c + ) + target_include_directories(${TARGET} PUBLIC + # family, hw, board + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} + ) + + #---------- TinyUSB ---------- + # tinyusb target is built for each example since it depends on example's tusb_config.h + set(TINYUSB_TARGET_PREFIX ${TARGET}-) + add_library(${TARGET}-tinyusb_config INTERFACE) + + target_include_directories(${TARGET}-tinyusb_config INTERFACE + ${CMAKE_CURRENT_SOURCE_DIR}/src + ) + target_compile_definitions(${TARGET}-tinyusb_config INTERFACE + CFG_TUSB_MCU=OPT_MCU_LPC18XX + ) + + # tinyusb's CMakeList.txt + add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb) + + # Link dependencies + target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb) + + # group target (not yet supported by clion) + set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config + PROPERTIES FOLDER ${TARGET}_sub + ) + + #---------- Flash ---------- + family_flash_jlink(${TARGET}) +endfunction() + + +function(family_add_freertos TARGET) + # freertos_config + add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/FreeRTOSConfig ${CMAKE_CURRENT_BINARY_DIR}/freertos_config) + + ## freertos + if (NOT TARGET freertos_kernel) + add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../../lib/FreeRTOS-Kernel ${CMAKE_CURRENT_BINARY_DIR}/freertos_kernel) + endif () + + # Add FreeRTOS option to tinyusb_config + target_compile_definitions(${TARGET}-tinyusb_config INTERFACE + CFG_TUSB_OS=OPT_OS_FREERTOS + ) + # link tinyusb with freeRTOS kernel + target_link_libraries(${TARGET}-tinyusb PUBLIC + freertos_kernel + ) + target_link_libraries(${TARGET} PUBLIC + freertos_kernel + ) +endfunction() + +function(family_configure_device_example TARGET) + family_configure_target(${TARGET}) +endfunction() + +function(family_configure_host_example TARGET) + family_configure_target(${TARGET}) +endfunction() + +function(family_configure_dual_usb_example TARGET) + family_configure_target(${TARGET}) +endfunction() diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake index 611c88eb5..3aeda5b2d 100644 --- a/hw/bsp/lpc55/family.cmake +++ b/hw/bsp/lpc55/family.cmake @@ -1,8 +1,4 @@ -if (TARGET _lpc55_family_inclusion_marker) - return() -endif () - -add_library(_lpc55_family_inclusion_marker INTERFACE) +include_guard() if (NOT BOARD) message(FATAL_ERROR "BOARD not specified") diff --git a/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h new file mode 100644 index 000000000..4c6058d27 --- /dev/null +++ b/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h @@ -0,0 +1,166 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +// IAR assembler have limited preprocessor support and it only need following macros: +#ifndef __IASMARM__ +// FIXME cause redundant-decls warnings +extern uint32_t SystemCoreClock; +#endif + +/* Cortex M23/M33 port configuration. */ +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE ( 1024 ) + +#define configUSE_PREEMPTION 1 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +#define configCPU_CLOCK_HZ SystemCoreClock +#define configTICK_RATE_HZ ( 1000 ) +#define configMAX_PRIORITIES ( 5 ) +#define configMINIMAL_STACK_SIZE ( 128 ) +#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 ) +#define configMAX_TASK_NAME_LEN 16 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configQUEUE_REGISTRY_SIZE 2 +#define configUSE_QUEUE_SETS 0 +#define configUSE_TIME_SLICING 0 +#define configUSE_NEWLIB_REENTRANT 0 +#define configENABLE_BACKWARD_COMPATIBILITY 1 +#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 + +#define configSUPPORT_STATIC_ALLOCATION 0 +#define configSUPPORT_DYNAMIC_ALLOCATION 1 + +/* Hook function related definitions. */ +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning +#define configCHECK_FOR_STACK_OVERFLOW 2 + +/* Run time and task stats gathering related definitions. */ +#define configGENERATE_RUN_TIME_STATS 0 +#define configRECORD_STACK_HIGH_ADDRESS 1 +#define configUSE_TRACE_FACILITY 1 // legacy trace +#define configUSE_STATS_FORMATTING_FUNCTIONS 0 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES 2 + +/* Software timer related definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2) +#define configTIMER_QUEUE_LENGTH 32 +#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE + +/* Optional functions - most linkers will remove unused functions anyway. */ +#define INCLUDE_vTaskPrioritySet 0 +#define INCLUDE_uxTaskPriorityGet 0 +#define INCLUDE_vTaskDelete 0 +#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY +#define INCLUDE_xResumeFromISR 0 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_xTaskGetSchedulerState 0 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 0 +#define INCLUDE_xTaskGetIdleTaskHandle 0 +#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 +#define INCLUDE_pcTaskGetTaskName 0 +#define INCLUDE_eTaskGetState 0 +#define INCLUDE_xEventGroupSetBitFromISR 0 +#define INCLUDE_xTimerPendFunctionCall 0 + +/* Define to trap errors during development. */ +// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7 +#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) + #define configASSERT(_exp) \ + do {\ + if ( !(_exp) ) { \ + volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ + if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \ + taskDISABLE_INTERRUPTS(); \ + __asm("BKPT #0\n"); \ + }\ + }\ + } while(0) +#else + #define configASSERT( x ) +#endif + +/* FreeRTOS hooks to NVIC vectors */ +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler +#define vPortSVCHandler SVC_Handler + +//--------------------------------------------------------------------+ +// Interrupt nesting behavior configuration. +//--------------------------------------------------------------------+ + +// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header +#define configPRIO_BITS 3 + +/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<FRO192M_CTRL |= ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK; + CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false); + CLOCK_AttachClk(kFRO_HF_to_USB0_CLK); + + /*According to reference manual, device mode setting has to be set by access usb host register */ + CLOCK_EnableClock(kCLOCK_Usbhsl0); // enable usb0 host clock + USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK; + CLOCK_DisableClock(kCLOCK_Usbhsl0); // disable usb0 host clock + + /* enable USB Device clock */ + CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); +#endif + +#if PORT_SUPPORT_DEVICE(1) + // Port1 is High Speed + + // Power + SPC0->ACTIVE_VDELAY = 0x0500; + /* Change the power DCDC to 1.8v (By default, DCDC is 1.8V), CORELDO to 1.1v (By default, CORELDO is 1.0V) */ + SPC0->ACTIVE_CFG &= ~SPC_ACTIVE_CFG_CORELDO_VDD_DS_MASK; + SPC0->ACTIVE_CFG |= SPC_ACTIVE_CFG_DCDC_VDD_LVL(0x3) | SPC_ACTIVE_CFG_CORELDO_VDD_LVL(0x3) | + SPC_ACTIVE_CFG_SYSLDO_VDD_DS_MASK | SPC_ACTIVE_CFG_DCDC_VDD_DS(0x2u); + /* Wait until it is done */ + while (SPC0->SC & SPC_SC_BUSY_MASK) {} + if (0u == (SCG0->LDOCSR & SCG_LDOCSR_LDOEN_MASK)) { + SCG0->TRIM_LOCK = 0x5a5a0001U; + SCG0->LDOCSR |= SCG_LDOCSR_LDOEN_MASK; + /* wait LDO ready */ + while (0U == (SCG0->LDOCSR & SCG_LDOCSR_VOUT_OK_MASK)); + } + SYSCON->AHBCLKCTRLSET[2] |= SYSCON_AHBCLKCTRL2_USB_HS_MASK | SYSCON_AHBCLKCTRL2_USB_HS_PHY_MASK; + SCG0->SOSCCFG &= ~(SCG_SOSCCFG_RANGE_MASK | SCG_SOSCCFG_EREFS_MASK); + /* xtal = 20 ~ 30MHz */ + SCG0->SOSCCFG = (1U << SCG_SOSCCFG_RANGE_SHIFT) | (1U << SCG_SOSCCFG_EREFS_SHIFT); + SCG0->SOSCCSR |= SCG_SOSCCSR_SOSCEN_MASK; + while (1) { + if (SCG0->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK) { + break; + } + } + + // Clock + SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK | SYSCON_CLOCK_CTRL_CLKIN_ENA_FM_USBH_LPT_MASK; + CLOCK_EnableClock(kCLOCK_UsbHs); + CLOCK_EnableClock(kCLOCK_UsbHsPhy); + CLOCK_EnableUsbhsPhyPllClock(kCLOCK_Usbphy480M, 24000000U); + CLOCK_EnableUsbhsClock(); + + // USB PHY +#if ((!(defined FSL_FEATURE_SOC_CCM_ANALOG_COUNT)) && (!(defined FSL_FEATURE_SOC_ANATOP_COUNT))) + USBPHY->TRIM_OVERRIDE_EN = 0x001fU; /* override IFR value */ +#endif + + // Enable PHY support for Low speed device + LS via FS Hub + USBPHY->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK; + + // Enable all power for normal operation + USBPHY->PWD = 0; + + // TX Timing + uint32_t phytx = USBPHY->TX; + phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK); + phytx |= USBPHY_TX_D_CAL(0x04) | USBPHY_TX_TXCAL45DP(0x07) | USBPHY_TX_TXCAL45DM(0x07); + //phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06); + USBPHY->TX = phytx; +#endif +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); + +#ifdef NEOPIXEL_PIN + if (state) { + sctpix_setPixel(NEOPIXEL_CH, 0, 0x100000); + sctpix_setPixel(NEOPIXEL_CH, 1, 0x101010); + } else { + sctpix_setPixel(NEOPIXEL_CH, 0, 0x001000); + sctpix_setPixel(NEOPIXEL_CH, 1, 0x000010); + } + sctpix_show(); +#endif +} + +uint32_t board_button_read(void) +{ +#ifdef BUTTON_GPIO + return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); +#endif +} + +int board_uart_read(uint8_t* buf, int len) +{ + (void) buf; (void) len; + return 0; +} + +int board_uart_write(void const * buf, int len) +{ +#ifdef UART_DEV + LPUART_WriteBlocking(UART_DEV, (uint8_t const *) buf, len); + return len; +#else + (void) buf; (void) len; + return 0; +#endif +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake new file mode 100644 index 000000000..e4bc11be5 --- /dev/null +++ b/hw/bsp/mcx/family.cmake @@ -0,0 +1,179 @@ +include_guard() + +if (NOT BOARD) + message(FATAL_ERROR "BOARD not specified") +endif () + +# TOP is path to root directory +set(TOP ${CMAKE_CURRENT_LIST_DIR}/../../..) +set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk) +set(CMSIS_DIR ${TOP}/lib/CMSIS_5) + +# toolchain set up +set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor") +set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) + +set(FAMILY_MCUS LPC55XX CACHE INTERNAL "") + +# include board specific +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) + + +#------------------------------------ +# BOARD_TARGET +#------------------------------------ +# only need to be built ONCE for all examples +set(BOARD_TARGET board_${BOARD}) +if (NOT TARGET ${BOARD_TARGET}) + add_library(${BOARD_TARGET} STATIC + # external driver + #lib/sct_neopixel/sct_neopixel.c + + # driver + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_gpio.c + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_common_arm.c + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpuart.c + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpflexcomm.c + # mcu + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c + ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c + ) +# target_compile_definitions(${BOARD_TARGET} PUBLIC +# ) + target_include_directories(${BOARD_TARGET} PUBLIC + # driver + # mcu + ${CMSIS_DIR}/CMSIS/Core/Include + ${SDK_DIR}/devices/${MCU_VARIANT} + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers + ) + update_board(${BOARD_TARGET}) + + if (TOOLCHAIN STREQUAL "gcc") + target_sources(${BOARD_TARGET} PUBLIC + ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S + ) + target_link_options(${BOARD_TARGET} PUBLIC + # linker file + "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld" + # link map + "LINKER:-Map=$>,$,$>${CMAKE_EXECUTABLE_SUFFIX}.map" + # nanolib + --specs=nosys.specs + --specs=nano.specs + ) + else () + # TODO support IAR + endif () +endif () # BOARD_TARGET + +#------------------------------------ +# Functions +#------------------------------------ +function(family_configure_target TARGET) + # set output name to .elf + set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf) + + # run size after build + add_custom_command(TARGET ${TARGET} POST_BUILD + COMMAND ${TOOLCHAIN_SIZE} $ + ) + + # TOP is path to root directory + set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..") + + #---------- Port Specific ---------- + # These files are built for each example since it depends on example's tusb_config.h + target_sources(${TARGET} PUBLIC + # TinyUSB Port + ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c + # BSP + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c + ) + target_include_directories(${TARGET} PUBLIC + # family, hw, board + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} + ) + + #---------- TinyUSB ---------- + # tinyusb target is built for each example since it depends on example's tusb_config.h + set(TINYUSB_TARGET_PREFIX ${TARGET}-) + add_library(${TARGET}-tinyusb_config INTERFACE) + + target_include_directories(${TARGET}-tinyusb_config INTERFACE + ${CMAKE_CURRENT_SOURCE_DIR}/src + ) + target_compile_definitions(${TARGET}-tinyusb_config INTERFACE + CFG_TUSB_MCU=OPT_MCU_MCXN9 + ) + + # tinyusb's CMakeList.txt + add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb) + + # Link dependencies + target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb) + + # group target (not yet supported by clion) + set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config + PROPERTIES FOLDER ${TARGET}_sub + ) + + #---------- Flash ---------- + # use MCUXpresso GUI Flash Tool to flash the elf + +# set(REDLINK_EXE /usr/local/LinkServer/binaries/crt_emu_cm_redlink) +# add_custom_target(${TARGET}-redlink +# DEPENDS ${TARGET} +# COMMAND ${REDLINK_EXE} --flash-load-exec $ --vendor NXP -p MCXN947 --bootromstall +# 0x50000040 -CoreIndex=0 --flash-driver= -x ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/flash --flash-dir +# ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/flash --flash-hashing +# ) + + #family_flash_jlink(${TARGET}) + #family_flash_nxplink(${TARGET}) + #family_flash_pyocd(${TARGET}) +endfunction() + + +function(family_add_freertos TARGET) + # freertos_config + if (NOT TARGET freertos_config) + add_library(freertos_config INTERFACE) + target_include_directories(freertos_config SYSTEM INTERFACE + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/FreeRTOSConfig + ) + endif() + + ## freertos + if (NOT TARGET freertos_kernel) + add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../../lib/FreeRTOS-Kernel ${CMAKE_CURRENT_BINARY_DIR}/freertos_kernel) + endif () + + # Add FreeRTOS option to tinyusb_config + target_compile_definitions(${TARGET}-tinyusb_config INTERFACE + CFG_TUSB_OS=OPT_OS_FREERTOS + ) + # link tinyusb with freeRTOS kernel + target_link_libraries(${TARGET}-tinyusb PUBLIC + freertos_kernel + ) + target_link_libraries(${TARGET} PUBLIC + freertos_kernel + ) +endfunction() + +function(family_configure_device_example TARGET) + family_configure_target(${TARGET}) +endfunction() + +function(family_configure_host_example TARGET) + family_configure_target(${TARGET}) +endfunction() + +function(family_configure_dual_usb_example TARGET) + family_configure_target(${TARGET}) +endfunction() diff --git a/hw/bsp/mcx/family.mk b/hw/bsp/mcx/family.mk new file mode 100644 index 000000000..2cd4c2448 --- /dev/null +++ b/hw/bsp/mcx/family.mk @@ -0,0 +1,48 @@ +UF2_FAMILY_ID = 0x2abc77ec +SDK_DIR = hw/mcu/nxp/mcux-sdk + +DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 + +include $(TOP)/$(BOARD_PATH)/board.mk + +CPU_CORE ?= cortex-m33 +include $(TOP)/tools/make/cpu/$(CPU_CORE).mk + +# Default to Highspeed PORT1 +PORT ?= 1 + +CFLAGS += \ + -flto \ + -DCFG_TUSB_MCU=OPT_MCU_MCXN9 \ + -DBOARD_TUD_RHPORT=$(PORT) \ + +ifeq ($(PORT), 1) + $(info "PORT1 High Speed") + CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED +else + $(info "PORT0 Full Speed") +endif + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration + +# All source paths should be relative to the top level. +LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld + +SRC_C += \ + src/portable/chipidea/ci_hs/dcd_ci_hs.c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/system_$(MCU_CORE).c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_gpio.c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_common_arm.c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpflexcomm.c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpuart.c \ + +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ + $(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT) \ + $(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers \ + +SRC_S += $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/startup_$(MCU_CORE).S diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake index 9c43478e8..1156a171b 100644 --- a/hw/bsp/nrf/family.cmake +++ b/hw/bsp/nrf/family.cmake @@ -1,8 +1,4 @@ -if (TARGET _nrf_family_inclusion_marker) - return() -endif () - -add_library(_nrf_family_inclusion_marker INTERFACE) +include_guard() if (NOT BOARD) message(FATAL_ERROR "BOARD not specified") @@ -89,6 +85,11 @@ function(family_configure_target TARGET) # set output name to .elf set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf) + # run size after build + add_custom_command(TARGET ${TARGET} POST_BUILD + COMMAND ${TOOLCHAIN_SIZE} $ + ) + # TOP is path to root directory set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..") diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index ba8976a8c..9c2933983 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -59,14 +59,6 @@ #define TUP_USBIP_OHCI #define TUP_OHCI_RHPORTS 2 -#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) - // TODO USB0 has 6, USB1 has 4 - #define TUP_USBIP_CHIPIDEA_HS - #define TUP_USBIP_EHCI - - #define TUP_DCD_ENDPOINT_MAX 6 - #define TUP_RHPORT_HIGHSPEED 1 // Port0 HS, Port1 FS - #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX) #define TUP_DCD_ENDPOINT_MAX 5 @@ -78,12 +70,28 @@ // TODO USB0 has 5, USB1 has 6 #define TUP_DCD_ENDPOINT_MAX 6 +#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) + // USB0 has 6 with HS PHY, USB1 has 4 only FS + #define TUP_USBIP_CHIPIDEA_HS + #define TUP_USBIP_EHCI + + #define TUP_DCD_ENDPOINT_MAX 6 + #define TUP_RHPORT_HIGHSPEED 1 + +#elif TU_CHECK_MCU(OPT_MCU_MCXN9) + // NOTE: MCXN943 port 1 use chipidea HS, port 0 use chipidea FS + #define TUP_USBIP_CHIPIDEA_HS + #define TUP_USBIP_EHCI + + #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_RHPORT_HIGHSPEED 1 + #elif TU_CHECK_MCU(OPT_MCU_MIMXRT) #define TUP_USBIP_CHIPIDEA_HS #define TUP_USBIP_EHCI #define TUP_DCD_ENDPOINT_MAX 8 - #define TUP_RHPORT_HIGHSPEED 1 // Port0 HS, Port1 HS + #define TUP_RHPORT_HIGHSPEED 1 #elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32) #define TUP_USBIP_CHIPIDEA_FS diff --git a/src/device/dcd.h b/src/device/dcd.h index 00419ff05..f82b8633d 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -102,6 +102,22 @@ typedef struct TU_ATTR_ALIGNED(4) //TU_VERIFY_STATIC(sizeof(dcd_event_t) <= 12, "size is not correct"); +//--------------------------------------------------------------------+ +// Memory API +//--------------------------------------------------------------------+ + +// clean/flush data cache: write cache -> memory. +// Required before an DMA TX transfer to make sure data is in memory +void dcd_dcache_clean(void* addr, uint32_t data_size) TU_ATTR_WEAK; + +// invalidate data cache: mark cache as invalid, next read will read from memory +// Required BOTH before and after an DMA RX transfer +void dcd_dcache_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK; + +// clean and invalidate data cache +// Required before an DMA transfer where memory is both read/write by DMA +void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK; + //--------------------------------------------------------------------+ // Controller API //--------------------------------------------------------------------+ diff --git a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h index 607926a65..ceff893bd 100644 --- a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h +++ b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h @@ -46,18 +46,44 @@ static const ci_hs_controller_t _ci_controller[] = { // RT1010 and RT1020 only has 1 USB controller #if FSL_FEATURE_SOC_USBHS_COUNT == 1 - { .reg_base = USB_BASE , .irqnum = USB_OTG1_IRQn, .ep_count = 8 } + { .reg_base = USB_BASE , .irqnum = USB_OTG1_IRQn } #else - { .reg_base = USB1_BASE, .irqnum = USB_OTG1_IRQn, .ep_count = 8 }, - { .reg_base = USB2_BASE, .irqnum = USB_OTG2_IRQn, .ep_count = 8 } + { .reg_base = USB1_BASE, .irqnum = USB_OTG1_IRQn}, + { .reg_base = USB2_BASE, .irqnum = USB_OTG2_IRQn} #endif }; +#define CI_HS_REG(_port) ((ci_hs_regs_t*) _ci_controller[_port].reg_base) + +//------------- DCD -------------// #define CI_DCD_INT_ENABLE(_p) NVIC_EnableIRQ (_ci_controller[_p].irqnum) #define CI_DCD_INT_DISABLE(_p) NVIC_DisableIRQ(_ci_controller[_p].irqnum) +//------------- HCD -------------// #define CI_HCD_INT_ENABLE(_p) NVIC_EnableIRQ (_ci_controller[_p].irqnum) #define CI_HCD_INT_DISABLE(_p) NVIC_DisableIRQ(_ci_controller[_p].irqnum) +//------------- DCache -------------// +TU_ATTR_ALWAYS_INLINE static inline bool imxrt_is_cache_mem(uint32_t addr) { + return !(0x20000000 <= addr && addr < 0x20100000); +} + +TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean(void* addr, uint32_t data_size) { + if (imxrt_is_cache_mem((uint32_t) addr)) { + SCB_CleanDCache_by_Addr((uint32_t *) addr, (int32_t) data_size); + } +} + +TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_invalidate(void* addr, uint32_t data_size) { + if (imxrt_is_cache_mem((uint32_t) addr)) { + SCB_InvalidateDCache_by_Addr(addr, (int32_t) data_size); + } +} + +TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean_invalidate(void* addr, uint32_t data_size) { + if (imxrt_is_cache_mem((uint32_t) addr)) { + SCB_CleanInvalidateDCache_by_Addr(addr, (int32_t) data_size); + } +} #endif diff --git a/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h b/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h index 8c2e7dfa6..2e84c93e7 100644 --- a/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h +++ b/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h @@ -32,10 +32,12 @@ static const ci_hs_controller_t _ci_controller[] = { - { .reg_base = LPC_USB0_BASE, .irqnum = USB0_IRQn, .ep_count = 6 }, - { .reg_base = LPC_USB1_BASE, .irqnum = USB1_IRQn, .ep_count = 4 } + { .reg_base = LPC_USB0_BASE, .irqnum = USB0_IRQn }, + { .reg_base = LPC_USB1_BASE, .irqnum = USB1_IRQn } }; +#define CI_HS_REG(_port) ((ci_hs_regs_t*) _ci_controller[_port].reg_base) + #define CI_DCD_INT_ENABLE(_p) NVIC_EnableIRQ (_ci_controller[_p].irqnum) #define CI_DCD_INT_DISABLE(_p) NVIC_DisableIRQ(_ci_controller[_p].irqnum) diff --git a/src/portable/chipidea/ci_hs/ci_hs_mcx.h b/src/portable/chipidea/ci_hs/ci_hs_mcx.h new file mode 100644 index 000000000..f940f4a9d --- /dev/null +++ b/src/portable/chipidea/ci_hs/ci_hs_mcx.h @@ -0,0 +1,52 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _CI_HS_MCX_H_ +#define _CI_HS_MCX_H_ + +#include "fsl_device_registers.h" + +// NOTE: MCX N9 has 2 different USB Controller +// - USB0 is KHCI FullSpeed +// - USB1 is ChipIdea HighSpeed, therefore rhport = 1 is actually index 0 + +static const ci_hs_controller_t _ci_controller[] = { + {.reg_base = USBHS1__USBC_BASE, .irqnum = USB1_HS_IRQn} +}; + +TU_ATTR_ALWAYS_INLINE static inline ci_hs_regs_t* CI_HS_REG(uint8_t port) { + (void) port; + return ((ci_hs_regs_t*) _ci_controller[0].reg_base); +} + +#define CI_DCD_INT_ENABLE(_p) do { (void) _p; NVIC_EnableIRQ (_ci_controller[0].irqnum); } while (0) +#define CI_DCD_INT_DISABLE(_p) do { (void) _p; NVIC_DisableIRQ(_ci_controller[0].irqnum); } while (0) + +#define CI_HCD_INT_ENABLE(_p) NVIC_EnableIRQ (_ci_controller[_p].irqnum) +#define CI_HCD_INT_DISABLE(_p) NVIC_DisableIRQ(_ci_controller[_p].irqnum) + + +#endif diff --git a/src/portable/chipidea/ci_hs/ci_hs_type.h b/src/portable/chipidea/ci_hs/ci_hs_type.h index 31b5a012d..2f3aa3694 100644 --- a/src/portable/chipidea/ci_hs/ci_hs_type.h +++ b/src/portable/chipidea/ci_hs/ci_hs_type.h @@ -31,13 +31,21 @@ extern "C" { #endif +// DCCPARAMS +enum { + DCCPARAMS_DEN_MASK = 0x1Fu, ///< DEN bit 4:0 +}; + // USBCMD enum { USBCMD_RUN_STOP = TU_BIT(0), USBCMD_RESET = TU_BIT(1), USBCMD_SETUP_TRIPWIRE = TU_BIT(13), - USBCMD_ADD_QTD_TRIPWIRE = TU_BIT(14) ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD -// Interrupt Threshold bit 23:16 + USBCMD_ADD_QTD_TRIPWIRE = TU_BIT(14), // This bit is used as a semaphore to ensure the to proper addition of a + // new dTD to an active (primed) endpoint’s linked list. This bit is set and + // cleared by software during the process of adding a new dTD + + USBCMD_INTR_THRESHOLD_MASK = 0x00FF0000u, // Interrupt Threshold bit 23:16 }; // PORTSC1 @@ -72,6 +80,7 @@ enum { // USBMode enum { + USBMOD_CM_MASK = TU_BIT(0) | TU_BIT(1), USBMODE_CM_DEVICE = 2, USBMODE_CM_HOST = 3, @@ -134,7 +143,6 @@ typedef struct { uint32_t reg_base; uint32_t irqnum; - uint8_t ep_count; // Max bi-directional Endpoints }ci_hs_controller_t; #ifdef __cplusplus diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 9be79a2f1..850c82e43 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -28,34 +28,52 @@ #if CFG_TUD_ENABLED && defined(TUP_USBIP_CHIPIDEA_HS) -//--------------------------------------------------------------------+ -// INCLUDE -//--------------------------------------------------------------------+ #include "device/dcd.h" #include "ci_hs_type.h" #if CFG_TUSB_MCU == OPT_MCU_MIMXRT #include "ci_hs_imxrt.h" -#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) + + void dcd_dcache_clean(void* addr, uint32_t data_size) { + imxrt_dcache_clean(addr, data_size); + } + + void dcd_dcache_invalidate(void* addr, uint32_t data_size) { + imxrt_dcache_invalidate(addr, data_size); + } + + void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) { + imxrt_dcache_clean_invalidate(addr, data_size); + } + +#else + +#if TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) #include "ci_hs_lpc18_43.h" + +#elif TU_CHECK_MCU(OPT_MCU_MCXN9) + // MCX N9 only port 1 use this controller + #include "ci_hs_mcx.h" #else #error "Unsupported MCUs" #endif -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ + TU_ATTR_WEAK void dcd_dcache_clean(void* addr, uint32_t data_size) { + (void) addr; (void) data_size; + } -#define CI_HS_REG(_port) ((ci_hs_regs_t*) _ci_controller[_port].reg_base) + TU_ATTR_WEAK void dcd_dcache_invalidate(void* addr, uint32_t data_size) { + (void) addr; (void) data_size; + } -// Clean means to push any cached changes to RAM and invalidate "removes" the -// entry from the cache. -#if defined(__CORTEX_M) && __CORTEX_M == 7 && __DCACHE_PRESENT == 1 - #define CleanInvalidateDCache_by_Addr SCB_CleanInvalidateDCache_by_Addr -#else - #define CleanInvalidateDCache_by_Addr(_addr, _dsize) + TU_ATTR_WEAK void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) { + (void) addr; (void) data_size; + } #endif +//--------------------------------------------------------------------+ +// MACRO CONSTANT TYPEDEF +//--------------------------------------------------------------------+ // ENDPTCTRL enum { @@ -160,6 +178,16 @@ typedef struct { CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048) static dcd_data_t _dcd_data; +//--------------------------------------------------------------------+ +// Prototypes and Helper Functions +//--------------------------------------------------------------------+ + +TU_ATTR_ALWAYS_INLINE +static inline uint8_t ci_ep_count(ci_hs_regs_t const* dcd_reg) +{ + return dcd_reg->DCCPARAMS & DCCPARAMS_DEN_MASK; +} + //--------------------------------------------------------------------+ // Controller API //--------------------------------------------------------------------+ @@ -174,7 +202,8 @@ static void bus_reset(uint8_t rhport) // endpoint type of the unused direction must be changed from the control type to any other // type (e.g. bulk). Leaving an un-configured endpoint control will cause undefined behavior // for the data PID tracking on the active endpoint. - for( uint8_t i=1; i < _ci_controller[rhport].ep_count; i++) + uint8_t const ep_count = ci_ep_count(dcd_reg); + for( uint8_t i=1; i < ep_count; i++) { dcd_reg->ENDPTCTRL[i] = (TUSB_XFER_BULK << ENDPTCTRL_TYPE_POS) | (TUSB_XFER_BULK << (16+ENDPTCTRL_TYPE_POS)); } @@ -202,7 +231,7 @@ static void bus_reset(uint8_t rhport) _dcd_data.qhd[0][0].int_on_setup = 1; // OUT only - CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t)); + dcd_dcache_clean_invalidate(&_dcd_data, sizeof(dcd_data_t)); } void dcd_init(uint8_t rhport) @@ -211,26 +240,34 @@ void dcd_init(uint8_t rhport) ci_hs_regs_t* dcd_reg = CI_HS_REG(rhport); + TU_ASSERT(ci_ep_count(dcd_reg) <= TUP_DCD_ENDPOINT_MAX, ); + // Reset controller dcd_reg->USBCMD |= USBCMD_RESET; while( dcd_reg->USBCMD & USBCMD_RESET ) {} // Set mode to device, must be set immediately after reset - dcd_reg->USBMODE = USBMODE_CM_DEVICE; + uint32_t usbmode = dcd_reg->USBMODE & ~USBMOD_CM_MASK; + usbmode |= USBMODE_CM_DEVICE; + dcd_reg->USBMODE = usbmode; + dcd_reg->OTGSC = OTGSC_VBUS_DISCHARGE | OTGSC_OTG_TERMINATION; #if !TUD_OPT_HIGH_SPEED dcd_reg->PORTSC1 = PORTSC1_FORCE_FULL_SPEED; #endif - CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t)); + dcd_dcache_clean_invalidate(&_dcd_data, sizeof(dcd_data_t)); dcd_reg->ENDPTLISTADDR = (uint32_t) _dcd_data.qhd; // Endpoint List Address has to be 2K alignment dcd_reg->USBSTS = dcd_reg->USBSTS; dcd_reg->USBINTR = INTR_USB | INTR_ERROR | INTR_PORT_CHANGE | INTR_SUSPEND; - dcd_reg->USBCMD &= ~0x00FF0000; // Interrupt Threshold Interval = 0 - dcd_reg->USBCMD |= USBCMD_RUN_STOP; // Connect + uint32_t usbcmd = dcd_reg->USBCMD; + usbcmd &= ~USBCMD_INTR_THRESHOLD_MASK; // Interrupt Threshold Interval = 0 + usbcmd |= USBCMD_RUN_STOP; // run + + dcd_reg->USBCMD = usbcmd; } void dcd_int_enable(uint8_t rhport) @@ -286,7 +323,7 @@ static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes) { // Force the CPU to flush the buffer. We increase the size by 31 because the call aligns the // address to 32-byte boundaries. Buffer must be word aligned - CleanInvalidateDCache_by_Addr((uint32_t*) tu_align((uint32_t) data_ptr, 4), total_bytes + 31); + dcd_dcache_clean_invalidate((uint32_t*) tu_align((uint32_t) data_ptr, 4), total_bytes + 31); tu_memclr(p_qtd, sizeof(dcd_qtd_t)); @@ -343,8 +380,10 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress); uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress); + ci_hs_regs_t* dcd_reg = CI_HS_REG(rhport); + // Must not exceed max endpoint number - TU_ASSERT( epnum < _ci_controller[rhport].ep_count ); + TU_ASSERT(epnum < ci_ep_count(dcd_reg)); //------------- Prepare Queue Head -------------// dcd_qhd_t * p_qhd = &_dcd_data.qhd[epnum][dir]; @@ -359,11 +398,9 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) p_qhd->qtd_overlay.next = QTD_NEXT_INVALID; - CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t)); + dcd_dcache_clean_invalidate(&_dcd_data, sizeof(dcd_data_t)); // Enable EP Control - ci_hs_regs_t* dcd_reg = CI_HS_REG(rhport); - uint32_t const epctrl = (p_endpoint_desc->bmAttributes.xfer << ENDPTCTRL_TYPE_POS) | ENDPTCTRL_ENABLE | ENDPTCTRL_TOGGLE_RESET; if ( dir == TUSB_DIR_OUT ) @@ -382,7 +419,8 @@ void dcd_edpt_close_all (uint8_t rhport) ci_hs_regs_t* dcd_reg = CI_HS_REG(rhport); // Disable all non-control endpoints - for( uint8_t epnum=1; epnum < _ci_controller[rhport].ep_count; epnum++) + uint8_t const ep_count = ci_ep_count(dcd_reg); + for (uint8_t epnum = 1; epnum < ep_count; epnum++) { _dcd_data.qhd[epnum][TUSB_DIR_OUT].qtd_overlay.halted = 1; _dcd_data.qhd[epnum][TUSB_DIR_IN ].qtd_overlay.halted = 1; @@ -420,7 +458,7 @@ static void qhd_start_xfer(uint8_t rhport, uint8_t epnum, uint8_t dir) p_qhd->qtd_overlay.next = (uint32_t) p_qtd; // link qtd to qhd // flush cache - CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t)); + dcd_dcache_clean_invalidate(&_dcd_data, sizeof(dcd_data_t)); if ( epnum == 0 ) { @@ -498,7 +536,7 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16 } } - CleanInvalidateDCache_by_Addr((uint32_t*) tu_align((uint32_t) fifo_info.ptr_wrap, 4), total_bytes - fifo_info.len_wrap + 31); + dcd_dcache_clean_invalidate((uint32_t*) tu_align((uint32_t) fifo_info.ptr_wrap, 4), total_bytes - fifo_info.len_wrap + 31); } else { @@ -611,7 +649,7 @@ void dcd_int_handler(uint8_t rhport) if (int_status & INTR_USB) { // Make sure we read the latest version of _dcd_data. - CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t)); + dcd_dcache_clean_invalidate(&_dcd_data, sizeof(dcd_data_t)); uint32_t const edpt_complete = dcd_reg->ENDPTCOMPLETE; dcd_reg->ENDPTCOMPLETE = edpt_complete; // acknowledge diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c index ab6a42e11..8c27abbf6 100644 --- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -42,28 +42,17 @@ #if CFG_TUSB_MCU == OPT_MCU_MIMXRT #include "ci_hs_imxrt.h" - // check if memory is cacheable i.e not in DTCM - TU_ATTR_ALWAYS_INLINE static inline bool is_cache_mem(uint32_t addr) { - return !(0x20000000 <= addr && addr < 0x20100000); - } - void hcd_dcache_clean(void* addr, uint32_t data_size) { - if (is_cache_mem((uint32_t) addr)) { - SCB_CleanDCache_by_Addr((uint32_t *) addr, (int32_t) data_size); - } + imxrt_dcache_clean(addr, data_size); } void hcd_dcache_invalidate(void* addr, uint32_t data_size) { - if (is_cache_mem((uint32_t) addr)) { - SCB_InvalidateDCache_by_Addr(addr, (int32_t) data_size); - } + imxrt_dcache_invalidate(addr, data_size); } -void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) { - if (is_cache_mem((uint32_t) addr)) { - SCB_CleanInvalidateDCache_by_Addr(addr, (int32_t) data_size); + void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) { + imxrt_dcache_clean_invalidate(addr, data_size); } -} #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) #include "ci_hs_lpc18_43.h" @@ -75,8 +64,6 @@ void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) { // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ -#define CI_HS_REG(_port) ((ci_hs_regs_t*) _ci_controller[_port].reg_base) - //--------------------------------------------------------------------+ // Controller API //--------------------------------------------------------------------+ diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index 852e7f4fe..2b25eee9d 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -163,22 +163,15 @@ static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t static inline ehci_link_t* list_next (ehci_link_t const *p_link); TU_ATTR_WEAK void hcd_dcache_clean(void* addr, uint32_t data_size) { - (void) addr; - (void) data_size; + (void) addr; (void) data_size; } -// invalidate data cache: mark cache as invalid, next read will read from memory -// Required BOTH before and after an DMA RX transfer TU_ATTR_WEAK void hcd_dcache_invalidate(void* addr, uint32_t data_size) { - (void) addr; - (void) data_size; + (void) addr; (void) data_size; } -// clean and invalidate data cache -// Required before an DMA transfer where memory is both read/write by DMA TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) { - (void) addr; - (void) data_size; + (void) addr; (void) data_size; } //--------------------------------------------------------------------+ diff --git a/src/tusb_option.h b/src/tusb_option.h index 4f3f3a985..948c9edf3 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -166,6 +166,10 @@ // WCH #define OPT_MCU_CH32V307 2200 ///< WCH CH32V307 + +// NXP LPC MCX +#define OPT_MCU_MCXN9 2300 ///< NXP MCX N9 Series + // Helper to check if configured MCU is one of listed // Apply _TU_CHECK_MCU with || as separator to list of input #define _TU_CHECK_MCU(_m) (CFG_TUSB_MCU == _m) @@ -274,7 +278,7 @@ // In case TUP_MCU_STRICT_ALIGN = 1 and TUP_ARCH_STRICT_ALIGN =0, we will not reply on compiler // to generate unaligned access code. // LPC_IP3511 Highspeed cannot access unaligned memory on USB_RAM -#if TUD_OPT_HIGH_SPEED && (CFG_TUSB_MCU == OPT_MCU_LPC54XXX || CFG_TUSB_MCU == OPT_MCU_LPC55XX) +#if TUD_OPT_HIGH_SPEED && TU_CHECK_MCU(OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX) #define TUP_MCU_STRICT_ALIGN 1 #else #define TUP_MCU_STRICT_ALIGN 0 diff --git a/tools/cmake/cpu/cortex-m3.cmake b/tools/cmake/cpu/cortex-m3.cmake new file mode 100644 index 000000000..b740ee44c --- /dev/null +++ b/tools/cmake/cpu/cortex-m3.cmake @@ -0,0 +1,10 @@ +if (TOOLCHAIN STREQUAL "gcc") + list(APPEND TOOLCHAIN_COMMON_FLAGS + -mthumb + -mcpu=cortex-m3 + ) + + set(FREERTOS_PORT GCC_ARM_CM3 CACHE INTERNAL "") +else () + # TODO support IAR +endif () diff --git a/tools/cmake/cpu/cortex-m33.cmake b/tools/cmake/cpu/cortex-m33.cmake index fbd5027b1..26c91a64f 100644 --- a/tools/cmake/cpu/cortex-m33.cmake +++ b/tools/cmake/cpu/cortex-m33.cmake @@ -3,10 +3,11 @@ if (TOOLCHAIN STREQUAL "gcc") -mthumb -mcpu=cortex-m33 -mfloat-abi=hard - -mfpu=fpv5-d16 + #-mfpu=fpv5-d16 + -mfpu=fpv5-sp-d16 ) - set(FREERTOS_PORT GCC_ARM_CM33_NONSECURE CACHE INTERNAL "") + set(FREERTOS_PORT GCC_ARM_CM33_NTZ_NONSECURE CACHE INTERNAL "") else () # TODO support IAR endif () diff --git a/tools/cmake/toolchain/arm_gcc.cmake b/tools/cmake/toolchain/arm_gcc.cmake index c7b6cff98..5f25d637b 100644 --- a/tools/cmake/toolchain/arm_gcc.cmake +++ b/tools/cmake/toolchain/arm_gcc.cmake @@ -3,6 +3,8 @@ set(CMAKE_SYSTEM_NAME Generic) set(CMAKE_ASM_COMPILER "arm-none-eabi-gcc") set(CMAKE_C_COMPILER "arm-none-eabi-gcc") set(CMAKE_CXX_COMPILER "arm-none-eabi-g++") + +set(TOOLCHAIN_SIZE "arm-none-eabi-size" CACHE INTERNAL "") set(GCC_ELF2BIN "arm-none-eabi-objcopy") set_property(GLOBAL PROPERTY ELF2BIN ${GCC_ELF2BIN}) diff --git a/tools/get_deps.py b/tools/get_deps.py index be5738dc1..f499562cb 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -24,7 +24,7 @@ deps_optional = { 'hw/mcu/nordic/nrfx' : ['2527e3c8449cfd38aee41598e8af8492f410ed15', 'https://github.com/NordicSemiconductor/nrfx.git' ], 'hw/mcu/nuvoton' : ['2204191ec76283371419fbcec207da02e1bc22fa', 'https://github.com/majbthrd/nuc_driver.git' ], 'hw/mcu/nxp/lpcopen' : ['43c45c85405a5dd114fff0ea95cca62837740c13', 'https://github.com/hathach/nxp_lpcopen.git' ], - 'hw/mcu/nxp/mcux-sdk' : ['f357a1150f6cf6c6b844f53f2d426bfb3e649850', 'https://github.com/NXPmicro/mcux-sdk.git' ], + 'hw/mcu/nxp/mcux-sdk' : ['950819b7de9b32f92c3edf396bc5ffb8d66e7009', 'https://github.com/hathach/mcux-sdk.git' ], 'hw/mcu/nxp/nxp_sdk' : ['845c8fc49b6fb660f06a5c45225494eacb06f00c', 'https://github.com/hathach/nxp_sdk.git' ], 'hw/mcu/raspberry_pi/Pico-PIO-USB' : ['c3715ce94b6f6391856de56081d4d9b3e98fa93d', 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git' ], 'hw/mcu/renesas/fsp' : ['8dc14709f2a6518b43f71efad70d900b7718d9f1', 'https://github.com/renesas/fsp.git' ], diff --git a/tools/make/cpu/cortex-m33.mk b/tools/make/cpu/cortex-m33.mk index 2ea3a0753..3d12b01fd 100644 --- a/tools/make/cpu/cortex-m33.mk +++ b/tools/make/cpu/cortex-m33.mk @@ -3,7 +3,9 @@ ifeq ($(TOOLCHAIN),gcc) -mthumb \ -mcpu=cortex-m33 \ -mfloat-abi=hard \ - -mfpu=fpv5-d16 \ + -mfpu=fpv5-sp-d16 \ + + #-mfpu=fpv5-d16 \ #set(FREERTOS_PORT GCC_ARM_CM33_NONSECURE CACHE INTERNAL "") FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure -- cgit v1.3.1 From 26d05d7fc922f3715799f6049556232d5ed5c8e3 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 25 May 2023 16:53:32 +0700 Subject: fix issue with ftdi host driver with status bytes add workflow_dispatch to all ci workflow --- .github/workflows/build_aarch64.yml | 1 + .github/workflows/build_arm.yml | 1 + .github/workflows/build_esp.yml | 1 + .github/workflows/build_iar.yml | 1 + .github/workflows/build_msp430.yml | 1 + .github/workflows/build_renesas.yml | 1 + .github/workflows/build_riscv.yml | 1 + .github/workflows/build_win_mac.yml | 1 + .github/workflows/cifuzz.yml | 1 + src/class/cdc/cdc_host.c | 36 +++++++++++++++++------------------- src/common/tusb_private.h | 17 +++++++++++------ 11 files changed, 37 insertions(+), 25 deletions(-) (limited to 'src/common') diff --git a/.github/workflows/build_aarch64.yml b/.github/workflows/build_aarch64.yml index cc8ddb070..77d3778d7 100644 --- a/.github/workflows/build_aarch64.yml +++ b/.github/workflows/build_aarch64.yml @@ -1,6 +1,7 @@ name: Build AArch64 on: + workflow_dispatch: push: paths: - 'src/**' diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index 917c83d74..1db9586af 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -1,6 +1,7 @@ name: Build ARM on: + workflow_dispatch: push: paths: - 'src/**' diff --git a/.github/workflows/build_esp.yml b/.github/workflows/build_esp.yml index 0a6815ea2..29585cb36 100644 --- a/.github/workflows/build_esp.yml +++ b/.github/workflows/build_esp.yml @@ -1,6 +1,7 @@ name: Build ESP on: + workflow_dispatch: push: paths: - 'src/**' diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index a5d24892f..8c3b57e10 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -1,6 +1,7 @@ name: Build IAR on: + workflow_dispatch: push: paths: - 'src/**' diff --git a/.github/workflows/build_msp430.yml b/.github/workflows/build_msp430.yml index 7cb60dceb..5424a88d6 100644 --- a/.github/workflows/build_msp430.yml +++ b/.github/workflows/build_msp430.yml @@ -1,6 +1,7 @@ name: Build MSP430 on: + workflow_dispatch: push: paths: - 'src/**' diff --git a/.github/workflows/build_renesas.yml b/.github/workflows/build_renesas.yml index ffdeedb71..3f0a4b694 100644 --- a/.github/workflows/build_renesas.yml +++ b/.github/workflows/build_renesas.yml @@ -1,6 +1,7 @@ name: Build Renesas on: + workflow_dispatch: push: paths: - 'src/**' diff --git a/.github/workflows/build_riscv.yml b/.github/workflows/build_riscv.yml index 87c7b522e..8682d655a 100644 --- a/.github/workflows/build_riscv.yml +++ b/.github/workflows/build_riscv.yml @@ -1,6 +1,7 @@ name: Build RISC-V on: + workflow_dispatch: push: paths: - 'src/**' diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml index 4b743a686..45fc62f78 100644 --- a/.github/workflows/build_win_mac.yml +++ b/.github/workflows/build_win_mac.yml @@ -1,6 +1,7 @@ name: Build Windows/MacOS on: + workflow_dispatch: push: paths: - 'src/**' diff --git a/.github/workflows/cifuzz.yml b/.github/workflows/cifuzz.yml index 7314fd9e6..4c4b12a6b 100644 --- a/.github/workflows/cifuzz.yml +++ b/.github/workflows/cifuzz.yml @@ -1,5 +1,6 @@ name: CIFuzz on: + workflow_dispatch: pull_request: branches: - master diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 9ff666ed4..ce9f27c33 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -550,8 +550,7 @@ void cdch_close(uint8_t daddr) } } -bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) -{ +bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) { // TODO handle stall response, retry failed transfer ... TU_ASSERT(event == XFER_RESULT_SUCCESS); @@ -559,41 +558,40 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t cdch_interface_t * p_cdc = get_itf(idx); TU_ASSERT(p_cdc); - if ( ep_addr == p_cdc->stream.tx.ep_addr ) - { + if ( ep_addr == p_cdc->stream.tx.ep_addr ) { // invoke tx complete callback to possibly refill tx fifo if (tuh_cdc_tx_complete_cb) tuh_cdc_tx_complete_cb(idx); - if ( 0 == tu_edpt_stream_write_xfer(&p_cdc->stream.tx) ) - { + if ( 0 == tu_edpt_stream_write_xfer(&p_cdc->stream.tx) ) { // If there is no data left, a ZLP should be sent if: // - xferred_bytes is multiple of EP Packet size and not zero tu_edpt_stream_write_zlp_if_needed(&p_cdc->stream.tx, xferred_bytes); } } - else if ( ep_addr == p_cdc->stream.rx.ep_addr ) - { - tu_edpt_stream_read_xfer_complete(&p_cdc->stream.rx, xferred_bytes); - + else if ( ep_addr == p_cdc->stream.rx.ep_addr ) { #if CFG_TUH_CDC_FTDI - // FTDI reserve 2 bytes for status if (p_cdc->serial_drid == SERIAL_DRIVER_FTDI) { - uint8_t status[2]; - tu_edpt_stream_read(&p_cdc->stream.rx, status, 2); - (void) status; // TODO handle status - } + // FTDI reserve 2 bytes for status + // FTDI status +// uint8_t status[2] = { +// p_cdc->stream.rx.ep_buf[0], +// p_cdc->stream.rx.ep_buf[1] +// }; + tu_edpt_stream_read_xfer_complete_offset(&p_cdc->stream.rx, xferred_bytes, 2); + }else #endif + { + tu_edpt_stream_read_xfer_complete(&p_cdc->stream.rx, xferred_bytes); + } // invoke receive callback if (tuh_cdc_rx_cb) tuh_cdc_rx_cb(idx); // prepare for next transfer if needed tu_edpt_stream_read_xfer(&p_cdc->stream.rx); - }else if ( ep_addr == p_cdc->ep_notif ) - { + }else if ( ep_addr == p_cdc->ep_notif ) { // TODO handle notification endpoint - }else - { + }else { TU_ASSERT(false); } diff --git a/src/common/tusb_private.h b/src/common/tusb_private.h index d5541856c..db1ba974d 100644 --- a/src/common/tusb_private.h +++ b/src/common/tusb_private.h @@ -148,21 +148,26 @@ uint32_t tu_edpt_stream_read_xfer(tu_edpt_stream_t* s); // Must be called in the transfer complete callback TU_ATTR_ALWAYS_INLINE static inline -void tu_edpt_stream_read_xfer_complete(tu_edpt_stream_t* s, uint32_t xferred_bytes) -{ +void tu_edpt_stream_read_xfer_complete(tu_edpt_stream_t* s, uint32_t xferred_bytes) { tu_fifo_write_n(&s->ff, s->ep_buf, (uint16_t) xferred_bytes); } +// Same as tu_edpt_stream_read_xfer_complete but skip the first n bytes +TU_ATTR_ALWAYS_INLINE static inline +void tu_edpt_stream_read_xfer_complete_offset(tu_edpt_stream_t* s, uint32_t xferred_bytes, uint32_t skip_offset) { + if (skip_offset < xferred_bytes) { + tu_fifo_write_n(&s->ff, s->ep_buf + skip_offset, (uint16_t) (xferred_bytes - skip_offset)); + } +} + // Get the number of bytes available for reading TU_ATTR_ALWAYS_INLINE static inline -uint32_t tu_edpt_stream_read_available(tu_edpt_stream_t* s) -{ +uint32_t tu_edpt_stream_read_available(tu_edpt_stream_t* s) { return (uint32_t) tu_fifo_count(&s->ff); } TU_ATTR_ALWAYS_INLINE static inline -bool tu_edpt_stream_peek(tu_edpt_stream_t* s, uint8_t* ch) -{ +bool tu_edpt_stream_peek(tu_edpt_stream_t* s, uint8_t* ch) { return tu_fifo_peek(&s->ff, ch); } -- cgit v1.3.1 From b3fda4a35433a4102743ea9719e2323e4076ff34 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 6 Jun 2023 23:55:33 +0700 Subject: able to get usbpd irq handler - handle cc1, cc2 voltage changes - get order set, rx message end interrupt - add segger rtt support for cmake --- hw/bsp/family_support.cmake | 15 +++ hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h | 22 ++-- hw/bsp/stm32g4/family.c | 183 ++++++++++++++++++++++++---- src/common/tusb_types.h | 13 ++ 4 files changed, 196 insertions(+), 37 deletions(-) (limited to 'src/common') diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index 2c0ee95d6..e9b4f2fdb 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -97,6 +97,18 @@ function(family_initialize_project PROJECT DIR) endfunction() +# Add segger rtt to example +function(family_add_segger_rtt TARGET) + if (NOT TARGET segger_rtt) + add_library(segger_rtt STATIC + ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c + ) + target_include_directories(segger_rtt PUBLIC ${TOP}/lib/SEGGER_RTT/RTT) + endif() + + target_link_libraries(${TARGET} PUBLIC segger_rtt) +endfunction() + #------------------------------------ # Main target configure #------------------------------------ @@ -119,6 +131,9 @@ function(family_configure_common TARGET) # LOGGER if (DEFINED LOGGER) target_compile_definitions(${TARGET} PUBLIC LOGGER_${LOGGER}) + if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt") + family_add_segger_rtt(${TARGET}) + endif () endif () endfunction() diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h index 21d4e459b..b1a98ba97 100644 --- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h +++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h @@ -58,7 +58,7 @@ // RCC Clock //--------------------------------------------------------------------+ -// CPU Frequency (Core Clock) is 170MHz +// CPU Frequency (Core Clock) is 150MHz static inline void board_clock_init(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {0}; @@ -68,16 +68,16 @@ static inline void board_clock_init(void) HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST); /* Activate PLL with HSI as source */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4; - RCC_OscInitStruct.PLL.PLLN = 85; - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV10; - RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; - RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4; + RCC_OscInitStruct.PLL.PLLN = 75; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; HAL_RCC_OscConfig(&RCC_OscInitStruct); // Initializes the CPU, AHB and APB buses clocks @@ -87,7 +87,7 @@ static inline void board_clock_init(void) RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8); + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4); //------------- HSI48 and CRS for USB -------------// RCC_OscInitTypeDef osc_hsi48 = {0}; diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c index 030abe0d0..8b17c0643 100644 --- a/hw/bsp/stm32g4/family.c +++ b/hw/bsp/stm32g4/family.c @@ -25,9 +25,127 @@ */ #include "stm32g4xx_hal.h" +#include "stm32g4xx_ll_bus.h" + #include "bsp/board.h" #include "board.h" + +//--------------------------------------------------------------------+ +// USB PD +//--------------------------------------------------------------------+ + +void usbpd_init(uint8_t port_num, tusb_typec_port_type_t port_type) { + (void) port_num; + + // Initialization phase: CFG1 + UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) | + (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) | + ( 0 << UCPD_CFG1_TXDMAEN_Pos) | (0 << UCPD_CFG1_RXDMAEN_Pos); + UCPD1->CFG1 |= UCPD_CFG1_UCPDEN; + + // General programming sequence (with UCPD configured then enabled) + if (port_type == TUSB_TYPEC_PORT_SNK) { + // Enable both CC Phy + UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos); + + // Read Voltage State on CC1 & CC2 fore initial state + uint32_t vstate_cc[2]; + vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; + vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; + + TU_LOG1_INT(vstate_cc[0]); + TU_LOG1_INT(vstate_cc[1]); + + // Enable CC1 & CC2 Interrupt + UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE; + } + + // Enable interrupt + //NVIC_SetPriority(UCPD1_IRQn, 0); +// NVIC_EnableIRQ(UCPD1_IRQn); +} + +uint8_t pd_rx_buf[262]; +uint32_t pd_rx_count = 0; + +void UCPD1_IRQHandler(void) { + uint32_t sr = UCPD1->SR; + sr &= UCPD1->IMR; + + TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr); + + if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) { + uint32_t vstate_cc[2]; + vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; + vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; + + TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]); + + uint32_t cr = UCPD1->CR; + + if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) { + TU_LOG1("Attach CC1\n"); + cr &= ~UCPD_CR_PHYCCSEL; + cr |= UCPD_CR_PHYRXEN; + } else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) { + TU_LOG1("Attach CC2\n"); + cr |= UCPD_CR_PHYCCSEL; + cr |= UCPD_CR_PHYRXEN; + } else { + TU_LOG1("Detach\n"); + cr &= ~UCPD_CR_PHYRXEN; + } + + // Enable Interrupt + UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | + /*UCPD_IMR_RXNEIE |*/ UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE | + UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE; + + // Enable PD RX + UCPD1->CR = cr; + + // ack + UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF; + } + + if (sr & UCPD_SR_RXORDDET) { + // SOP: Start of Packet + // TODO DMA later + uint8_t order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; + TU_LOG1_HEX(order_set); + + // ack + UCPD1->ICR = UCPD_ICR_RXORDDETCF; + } + + if ( sr & UCPD_SR_RXMSGEND) { + // End of message +// uint32_t payload_size = UCPD1->RX_PAYSZ; +// TU_LOG1_HEX(payload_size); +// +// for(uint32_t i=0; iRXDR; +// +// TU_LOG1("0x%02X ", pd_rx_buf[i]); +// } +// TU_LOG1("\n"); + + // ack + UCPD1->ICR = UCPD_ICR_RXMSGENDCF; + } + +// if (sr & UCPD_SR_RXNE) { +// uint8_t data = UCPD1->RXDR; +// pd_rx_buf[pd_rx_count++] = data; +// TU_LOG1_HEX(data); +// } + +// else { +// TU_LOG_LOCATION(); +// } +} + //--------------------------------------------------------------------+ // Forward USB interrupt events to TinyUSB IRQ Handler //--------------------------------------------------------------------+ @@ -79,35 +197,35 @@ void board_init(void) NVIC_SetPriority(USBWakeUp_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif - GPIO_InitTypeDef gpio_init; + GPIO_InitTypeDef GPIO_InitStruct; // LED - memset(&gpio_init, 0, sizeof(gpio_init)); - gpio_init.Pin = LED_PIN; - gpio_init.Mode = GPIO_MODE_OUTPUT_PP; - gpio_init.Pull = GPIO_PULLUP; - gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(LED_PORT, &gpio_init); + memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct)); + GPIO_InitStruct.Pin = LED_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); board_led_write(false); // Button - memset(&gpio_init, 0, sizeof(gpio_init)); - gpio_init.Pin = BUTTON_PIN; - gpio_init.Mode = GPIO_MODE_INPUT; - gpio_init.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP; - gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(BUTTON_PORT, &gpio_init); + memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct)); + GPIO_InitStruct.Pin = BUTTON_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); #ifdef UART_DEV // UART - memset(&gpio_init, 0, sizeof(gpio_init)); - gpio_init.Pin = UART_TX_PIN | UART_RX_PIN; - gpio_init.Mode = GPIO_MODE_AF_PP; - gpio_init.Pull = GPIO_PULLUP; - gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; - gpio_init.Alternate = UART_GPIO_AF; - HAL_GPIO_Init(UART_GPIO_PORT, &gpio_init); + memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct)); + GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + GPIO_InitStruct.Alternate = UART_GPIO_AF; + HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct); UartHandle = (UART_HandleTypeDef){ .Instance = UART_DEV, @@ -124,18 +242,31 @@ void board_init(void) // USB Pins TODO double check USB clock and pin setup // Configure USB DM and DP pins. This is optional, and maintained only for user guidance. - memset(&gpio_init, 0, sizeof(gpio_init)); - gpio_init.Pin = (GPIO_PIN_11 | GPIO_PIN_12); - gpio_init.Mode = GPIO_MODE_INPUT; - gpio_init.Pull = GPIO_NOPULL; - gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(GPIOA, &gpio_init); + memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct)); + GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); __HAL_RCC_USB_CLK_ENABLE(); board_vbus_sense_init(); +#if 0 // USB PD + /* PWR register access (for disabling dead battery feature) */ + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); + LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC); + + __HAL_RCC_UCPD1_CLK_ENABLE(); + + // Default CC1/CC2 is PB4/PB6 + // PB4 ------> UCPD1_CC2 + // PB6 ------> UCPD1_CC1 + + usbpd_init(0, TUSB_TYPEC_PORT_SNK); +#endif } diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 39a2d4564..7b82c51d9 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -232,6 +232,19 @@ enum { #define TUSB_DESC_CONFIG_POWER_MA(x) ((x)/2) +//--------------------------------------------------------------------+ +// TYPE-C +//--------------------------------------------------------------------+ + +typedef enum { + TUSB_TYPEC_PORT_SRC, + TUSB_TYPEC_PORT_SNK, + TUSB_TYPEC_PORT_DRP +} tusb_typec_port_type_t; + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ typedef enum { XFER_RESULT_SUCCESS = 0, -- cgit v1.3.1 From b893f1d5417adf8cf874d6b2e7946582ca37982a Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 7 Jun 2023 15:10:40 +0700 Subject: inital support for usb typec and pd example --- examples/typec/power_delivery/CMakeLists.txt | 32 +++++ examples/typec/power_delivery/Makefile | 11 ++ examples/typec/power_delivery/only.txt | 1 + examples/typec/power_delivery/src/main.c | 90 ++++++++++++ examples/typec/power_delivery/src/tusb_config.h | 79 +++++++++++ hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h | 8 +- hw/bsp/stm32g4/family.c | 133 +---------------- hw/bsp/stm32g4/family.cmake | 1 + src/CMakeLists.txt | 2 + src/common/tusb_mcu.h | 2 + src/common/tusb_types.h | 91 ++++++++++-- src/portable/st/typec/typec_stm32.c | 181 ++++++++++++++++++++++++ src/tusb.h | 5 + src/typec/tcd.h | 58 ++++++++ src/typec/utcd.c | 48 +++++++ src/typec/utcd.h | 54 +++++++ 16 files changed, 651 insertions(+), 145 deletions(-) create mode 100644 examples/typec/power_delivery/CMakeLists.txt create mode 100644 examples/typec/power_delivery/Makefile create mode 100644 examples/typec/power_delivery/only.txt create mode 100644 examples/typec/power_delivery/src/main.c create mode 100644 examples/typec/power_delivery/src/tusb_config.h create mode 100644 src/portable/st/typec/typec_stm32.c create mode 100644 src/typec/tcd.h create mode 100644 src/typec/utcd.c create mode 100644 src/typec/utcd.h (limited to 'src/common') diff --git a/examples/typec/power_delivery/CMakeLists.txt b/examples/typec/power_delivery/CMakeLists.txt new file mode 100644 index 000000000..4ab8d5a65 --- /dev/null +++ b/examples/typec/power_delivery/CMakeLists.txt @@ -0,0 +1,32 @@ +cmake_minimum_required(VERSION 3.17) + +include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake) + +# gets PROJECT name for the example (e.g. -) +family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR}) + +project(${PROJECT} C CXX ASM) + +# Checks this example is valid for the family and initializes the project +family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR}) + +# Espressif has its own cmake build system +if(FAMILY STREQUAL "espressif") + return() +endif() + +add_executable(${PROJECT}) + +# Example source +target_sources(${PROJECT} PUBLIC + ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c + ) + +# Example include +target_include_directories(${PROJECT} PUBLIC + ${CMAKE_CURRENT_SOURCE_DIR}/src + ) + +# Configure compilation flags and libraries for the example... see the corresponding function +# in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT}) diff --git a/examples/typec/power_delivery/Makefile b/examples/typec/power_delivery/Makefile new file mode 100644 index 000000000..2a3d854fb --- /dev/null +++ b/examples/typec/power_delivery/Makefile @@ -0,0 +1,11 @@ +include ../../make.mk + +INC += \ + src \ + $(TOP)/hw \ + +# Example source +EXAMPLE_SOURCE += $(wildcard src/*.c) +SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE)) + +include ../../rules.mk diff --git a/examples/typec/power_delivery/only.txt b/examples/typec/power_delivery/only.txt new file mode 100644 index 000000000..657aeaac5 --- /dev/null +++ b/examples/typec/power_delivery/only.txt @@ -0,0 +1 @@ +mcu:STM32G4 diff --git a/examples/typec/power_delivery/src/main.c b/examples/typec/power_delivery/src/main.c new file mode 100644 index 000000000..9d032b6bb --- /dev/null +++ b/examples/typec/power_delivery/src/main.c @@ -0,0 +1,90 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + */ + +#include +#include +#include + +#include "bsp/board.h" +#include "tusb.h" + +//--------------------------------------------------------------------+ +// MACRO CONSTANT TYPEDEF PROTOTYPES +//--------------------------------------------------------------------+ + +/* Blink pattern + * - 250 ms : button is not pressed + * - 1000 ms : button is pressed (and hold) + */ +enum { + BLINK_PRESSED = 250, + BLINK_UNPRESSED = 1000 +}; + +static uint32_t blink_interval_ms = BLINK_UNPRESSED; + +void led_blinking_task(void); + +#define HELLO_STR "Hello from TinyUSB\r\n" + +int main(void) +{ + board_init(); + board_led_write(true); + + tuc_init(0, TYPEC_PORT_SNK); + + uint32_t start_ms = 0; + bool led_state = false; + + while (1) { + led_blinking_task(); + +// tuc_task(); + } +} + +#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3 +void app_main(void) +{ + main(); +} +#endif + +//--------------------------------------------------------------------+ +// BLINKING TASK +//--------------------------------------------------------------------+ +void led_blinking_task(void) +{ + static uint32_t start_ms = 0; + static bool led_state = false; + + // Blink every interval ms + if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time + start_ms += blink_interval_ms; + + board_led_write(led_state); + led_state = 1 - led_state; // toggle +} diff --git a/examples/typec/power_delivery/src/tusb_config.h b/examples/typec/power_delivery/src/tusb_config.h new file mode 100644 index 000000000..deddcbfa4 --- /dev/null +++ b/examples/typec/power_delivery/src/tusb_config.h @@ -0,0 +1,79 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + */ + +#ifndef _TUSB_CONFIG_H_ +#define _TUSB_CONFIG_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +// special example that doesn't enable device or host stack +// This can cause some TinyUSB API missing, this define hack to allow us to fill those API +// to pass the compilation process +#define tud_int_handler(x) + +//-------------------------------------------------------------------- +// COMMON CONFIGURATION +//-------------------------------------------------------------------- + +// defined by compiler flags for flexibility +#ifndef CFG_TUSB_MCU + #error CFG_TUSB_MCU must be defined +#endif + +#ifndef CFG_TUSB_OS + #define CFG_TUSB_OS OPT_OS_NONE +#endif + +#define CFG_TUD_ENABLED 0 +#define CFG_TUH_ENABLED 0 + +// Enable TYPEC stack +#define CFG_TUC_ENABLED 1 + +// CFG_TUSB_DEBUG is defined by compiler in DEBUG build +// #define CFG_TUSB_DEBUG 0 + +/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. + * Tinyusb use follows macros to declare transferring memory so that they can be put + * into those specific section. + * e.g + * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") )) + * - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4))) + */ +#ifndef CFG_TUSB_MEM_SECTION +#define CFG_TUSB_MEM_SECTION +#endif + +#ifndef CFG_TUSB_MEM_ALIGN +#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) +#endif + +#ifdef __cplusplus + } +#endif + +#endif /* _TUSB_CONFIG_H_ */ diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h index 6b00efc8f..e61b13170 100644 --- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h +++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h @@ -58,7 +58,7 @@ // RCC Clock //--------------------------------------------------------------------+ -// CPU Frequency (Core Clock) is 150MHz +// CPU Frequency (Core Clock) is 170 MHz static inline void board_clock_init(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {0}; @@ -74,9 +74,9 @@ static inline void board_clock_init(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4; - RCC_OscInitStruct.PLL.PLLN = 75; - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4; + RCC_OscInitStruct.PLL.PLLN = 85; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV10; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; HAL_RCC_OscConfig(&RCC_OscInitStruct); diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c index 6c870ac7a..d0601b385 100644 --- a/hw/bsp/stm32g4/family.c +++ b/hw/bsp/stm32g4/family.c @@ -30,132 +30,6 @@ #include "bsp/board.h" #include "board.h" - -//--------------------------------------------------------------------+ -// USB PD -//--------------------------------------------------------------------+ - -void usbpd_init(uint8_t port_num, tusb_typec_port_type_t port_type) { - (void) port_num; - - // Initialization phase: CFG1 - UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) | - (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) | - ( 0 << UCPD_CFG1_TXDMAEN_Pos) | (0 << UCPD_CFG1_RXDMAEN_Pos); - UCPD1->CFG1 |= UCPD_CFG1_UCPDEN; - - // General programming sequence (with UCPD configured then enabled) - if (port_type == TUSB_TYPEC_PORT_SNK) { - // Enable both CC Phy - UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos); - - // Read Voltage State on CC1 & CC2 fore initial state - uint32_t vstate_cc[2]; - vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; - vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; - - TU_LOG1_INT(vstate_cc[0]); - TU_LOG1_INT(vstate_cc[1]); - - // Enable CC1 & CC2 Interrupt - UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE; - } - - // Enable interrupt - NVIC_EnableIRQ(UCPD1_IRQn); -} - -uint8_t pd_rx_buf[262]; -uint32_t pd_rx_count = 0; - -void UCPD1_IRQHandler(void) { - uint32_t sr = UCPD1->SR; - sr &= UCPD1->IMR; - -// TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr); - - if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) { - uint32_t vstate_cc[2]; - vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; - vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; - - TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]); - - uint32_t cr = UCPD1->CR; - - // TODO only support SNK for now, required highest voltage for now - if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) { - TU_LOG1("Attach CC1\n"); - cr &= ~UCPD_CR_PHYCCSEL; - cr |= UCPD_CR_PHYRXEN; - } else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) { - TU_LOG1("Attach CC2\n"); - cr |= UCPD_CR_PHYCCSEL; - cr |= UCPD_CR_PHYRXEN; - } else { - TU_LOG1("Detach\n"); - cr &= ~UCPD_CR_PHYRXEN; - } - - if (cr & UCPD_CR_PHYRXEN) { - // Enable Interrupt - UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | - UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | - UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE; - } - - // Enable PD RX - UCPD1->CR = cr; - - // ack - UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF; - } - - //------------- Receive -------------// - if (sr & UCPD_SR_RXORDDET) { - // SOP: Start of Packet. - // uint8_t order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; - - // reset count when received SOP - pd_rx_count = 0; - - // ack - UCPD1->ICR = UCPD_ICR_RXORDDETCF; - } - - if (sr & UCPD_SR_RXNE) { - // TODO DMA later - do { - pd_rx_buf[pd_rx_count++] = UCPD1->RXDR; - } while (UCPD1->SR & UCPD_SR_RXNE); - } - - if (sr & UCPD_SR_RXMSGEND) { - // End of message - uint32_t payload_size = UCPD1->RX_PAYSZ; - - // ack - UCPD1->ICR = UCPD_ICR_RXMSGENDCF; - } - - if (sr & UCPD_SR_RXOVR) { - TU_LOG1("RXOVR\n"); - TU_LOG1_HEX(pd_rx_count); - // ack - UCPD1->ICR = UCPD_ICR_RXOVRCF; - } - -// if (sr & UCPD_SR_RXNE) { -// uint8_t data = UCPD1->RXDR; -// pd_rx_buf[pd_rx_count++] = data; -// TU_LOG1_HEX(data); -// } - -// else { -// TU_LOG_LOCATION(); -// } -} - //--------------------------------------------------------------------+ // Forward USB interrupt events to TinyUSB IRQ Handler //--------------------------------------------------------------------+ @@ -174,6 +48,11 @@ void USBWakeUp_IRQHandler(void) tud_int_handler(0); } +// USB PD +void UCPD1_IRQHandler(void) { + tuc_int_handler(0); +} + //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM //--------------------------------------------------------------------+ @@ -274,8 +153,6 @@ void board_init(void) // Default CC1/CC2 is PB4/PB6 // PB4 ------> UCPD1_CC2 // PB6 ------> UCPD1_CC1 - - usbpd_init(0, TUSB_TYPEC_PORT_SNK); #endif } diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake index 2c10a9769..618563f66 100644 --- a/hw/bsp/stm32g4/family.cmake +++ b/hw/bsp/stm32g4/family.cmake @@ -90,6 +90,7 @@ function(family_configure_example TARGET) target_sources(${TARGET} PUBLIC # TinyUSB Port ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c + ${TOP}/src/portable/st/typec/typec_stm32.c # BSP ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 3dbd72d61..ce4486ecd 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -32,6 +32,8 @@ function(add_tinyusb TARGET) ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/hid/hid_host.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/msc/msc_host.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_host.c + # typec + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/typec/utcd.c ) target_include_directories(${TARGET} PUBLIC ${CMAKE_CURRENT_FUNCTION_LIST_DIR} diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 48f765674..bb4483f7d 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -199,6 +199,8 @@ #elif TU_CHECK_MCU(OPT_MCU_STM32G4) #define TUP_USBIP_FSDEV #define TUP_USBIP_FSDEV_STM32 + #define TUP_USBIP_TYPEC_STM32 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32G0) diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 7b82c51d9..e6b350a40 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -232,16 +232,6 @@ enum { #define TUSB_DESC_CONFIG_POWER_MA(x) ((x)/2) -//--------------------------------------------------------------------+ -// TYPE-C -//--------------------------------------------------------------------+ - -typedef enum { - TUSB_TYPEC_PORT_SRC, - TUSB_TYPEC_PORT_SNK, - TUSB_TYPEC_PORT_DRP -} tusb_typec_port_type_t; - //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ @@ -487,9 +477,9 @@ typedef struct TU_ATTR_PACKED uint16_t bcdDFUVersion; } tusb_desc_dfu_functional_t; -/*------------------------------------------------------------------*/ -/* Types - *------------------------------------------------------------------*/ +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ typedef struct TU_ATTR_PACKED{ union { struct TU_ATTR_PACKED { @@ -509,6 +499,81 @@ typedef struct TU_ATTR_PACKED{ TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct"); +//--------------------------------------------------------------------+ +// TYPE-C +//--------------------------------------------------------------------+ + +typedef enum { + TYPEC_PORT_SRC, + TYPEC_PORT_SNK, + TYPEC_PORT_DRP +} typec_port_type_t; + +typedef enum { + TYPEC_MSG_CTRL_RESERVED = 0, // 0b00000: 0 + TYPEC_MSG_CTRL_GOOD_CRC, // 0b00001: 1 + TYPEC_MSG_CTRL_GO_TO_MIN, // 0b00010: 2 + TYPEC_MSG_CTRL_ACCEPT, // 0b00011: 3 + TYPEC_MSG_CTRL_REJECT, // 0b00100: 4 + TYPEC_MSG_CTRL_PING, // 0b00101: 5 + TYPEC_MSG_CTRL_PS_RDY, // 0b00110: 6 + TYPEC_MSG_CTRL_GET_SOURCE_CAP, // 0b00111: 7 + TYPEC_MSG_CTRL_GET_SINK_CAP, // 0b01000: 8 + TYPEC_MSG_CTRL_DR_SWAP, // 0b01001: 9 + TYPEC_MSG_CTRL_PR_SWAP, // 0b01010: 10 + TYPEC_MSG_CTRL_VCONN_SWAP, // 0b01011: 11 + TYPEC_MSG_CTRL_WAIT, // 0b01100: 12 + TYPEC_MSG_CTRL_SOFT_RESET, // 0b01101: 13 + TYPEC_MSG_CTRL_DATA_RESET, // 0b01110: 14 + TYPEC_MSG_CTRL_DATA_RESET_COMPLETE, // 0b01111: 15 + TYPEC_MSG_CTRL_NOT_SUPPORTED, // 0b10000: 16 + TYPEC_MSG_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17 + TYPEC_MSG_CTRL_GET_STATUS, // 0b10010: 18 + TYPEC_MSG_CTRL_FR_SWAP, // 0b10011: 19 + TYPEC_MSG_CTRL_GET_PPS_STATUS, // 0b10100: 20 + TYPEC_MSG_CTRL_GET_COUNTRY_CODES, // 0b10101: 21 + TYPEC_MSG_CTRL_GET_SINK_CAP_EXTENDED, // 0b10110: 22 + TYPEC_MSG_CTRL_GET_SOURCE_INFO, // 0b10111: 23 + TYPEC_MSG_CTRL_REVISION, // 0b11000: 24 +} typec_msg_ctrl_type_t; + +typedef enum { + TYPEC_MSG_DATA_RESERVED = 0, // 0b00000: 0 + TYPEC_MSG_DATA_SOURCE_CAP, // 0b00001: 1 + TYPEC_MSG_DATA_REQUEST, // 0b00010: 2 + TYPEC_MSG_DATA_BIST, // 0b00011: 3 + TYPEC_MSG_DATA_SINK_CAP, // 0b00100: 4 + TYPEC_MSG_DATA_BATTERY_STATUS, // 0b00101: 5 + TYPEC_MSG_DATA_ALERT, // 0b00110: 6 + TYPEC_MSG_DATA_GET_COUNTRY_INFO, // 0b00111: 7 + TYPEC_MSG_DATA_ENTER_USB, // 0b01000: 8 + TYPEC_MSG_DATA_EPR_REQUEST, // 0b01001: 9 + TYPEC_MSG_DATA_EPR_MODE, // 0b01010: 10 + TYPEC_MSG_DATA_SRC_INFO, // 0b01011: 11 + TYPEC_MSG_DATA_REVISION, // 0b01100: 12 + TYPEC_MSG_DATA_RESERVED_13, // 0b01101: 13 + TYPEC_MSG_DATA_RESERVED_14, // 0b01110: 14 + TYPEC_MSG_DATA_VENDOR_DEFINED, // 0b01111: 15 +} typec_msg_data_type_t; + +typedef struct TU_ATTR_PACKED { + uint16_t msg_type : 5; // [0:4] + uint16_t data_role : 1; // [5] SOP only + uint16_t specs_rev : 2; // [6:7] + uint16_t power_role : 1; // [8] SOP only + uint16_t msg_id : 3; // [9:11] + uint16_t n_data_obj : 3; // [12:14] + uint16_t extended : 1; // [15] +} tusb_typec_message_header_t; + +typedef struct TU_ATTR_PACKED { + uint16_t data_size : 9; // [0:8] + uint16_t reserved : 1; // [9] + uint16_t request_chunk : 1; // [10] + uint16_t chunk_number : 4; // [11:14] + uint16_t chunked : 1; // [15] +} tusb_typec_message_header_extended_t; + TU_ATTR_PACKED_END // End of all packed definitions TU_ATTR_BIT_FIELD_ORDER_END diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c new file mode 100644 index 000000000..fd029473d --- /dev/null +++ b/src/portable/st/typec/typec_stm32.c @@ -0,0 +1,181 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "tusb_option.h" +#include "typec/tcd.h" + +#if CFG_TUC_ENABLED && defined(TUP_USBIP_TYPEC_STM32) + +#include "common/tusb_common.h" + +#include "stm32g4xx.h" + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ +uint8_t pd_rx_buf[262]; +uint32_t pd_rx_count = 0; +uint8_t pd_rx_order_set; + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +bool tcd_init(uint8_t rhport, typec_port_type_t port_type) { + (void) rhport; + + // Initialization phase: CFG1 + UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) | + (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) | + (0 << UCPD_CFG1_TXDMAEN_Pos) | (0 << UCPD_CFG1_RXDMAEN_Pos); + UCPD1->CFG1 |= UCPD_CFG1_UCPDEN; + + // General programming sequence (with UCPD configured then enabled) + if (port_type == TYPEC_PORT_SNK) { + // Enable both CC Phy + UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos); + + // Read Voltage State on CC1 & CC2 fore initial state + uint32_t vstate_cc[2]; + vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; + vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; + + TU_LOG1_INT(vstate_cc[0]); + TU_LOG1_INT(vstate_cc[1]); + + // Enable CC1 & CC2 Interrupt + UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE; + } + + return true; +} + +// Enable interrupt +void tcd_int_enable (uint8_t rhport) { + (void) rhport; + NVIC_EnableIRQ(UCPD1_IRQn); +} + +// Disable interrupt +void tcd_int_disable(uint8_t rhport) { + (void) rhport; + NVIC_DisableIRQ(UCPD1_IRQn); +} + +void tcd_int_handler(uint8_t rhport) { + (void) rhport; + + uint32_t sr = UCPD1->SR; + sr &= UCPD1->IMR; + +// TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr); + + if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) { + uint32_t vstate_cc[2]; + vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; + vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; + + TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]); + + uint32_t cr = UCPD1->CR; + + // TODO only support SNK for now, required highest voltage for now + if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) { + TU_LOG1("Attach CC1\n"); + cr &= ~UCPD_CR_PHYCCSEL; + cr |= UCPD_CR_PHYRXEN; + } else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) { + TU_LOG1("Attach CC2\n"); + cr |= UCPD_CR_PHYCCSEL; + cr |= UCPD_CR_PHYRXEN; + } else { + TU_LOG1("Detach\n"); + cr &= ~UCPD_CR_PHYRXEN; + } + + if (cr & UCPD_CR_PHYRXEN) { + // Enable Interrupt + UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | + UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | + UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE; + } + + // Enable PD RX + UCPD1->CR = cr; + + // ack + UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF; + } + + //------------- Receive -------------// + if (sr & UCPD_SR_RXORDDET) { + // SOP: Start of Packet. + pd_rx_order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; + + // reset count when received SOP + pd_rx_count = 0; + + // ack + UCPD1->ICR = UCPD_ICR_RXORDDETCF; + } + + if (sr & UCPD_SR_RXNE) { + // TODO DMA later + do { + pd_rx_buf[pd_rx_count++] = UCPD1->RXDR; + } while (UCPD1->SR & UCPD_SR_RXNE); + } + + if (sr & UCPD_SR_RXMSGEND) { + // End of message + + // Skip if CRC failed + if (!(sr & UCPD_SR_RXERR)) { + uint32_t payload_size = UCPD1->RX_PAYSZ; + TU_LOG1("RXMSGEND: payload_size = %u, rx count = %u\n", payload_size, pd_rx_count); + } + + // ack + UCPD1->ICR = UCPD_ICR_RXMSGENDCF; + } + + if (sr & UCPD_SR_RXOVR) { + TU_LOG1("RXOVR\n"); + TU_LOG1_HEX(pd_rx_count); + // ack + UCPD1->ICR = UCPD_ICR_RXOVRCF; + } + +// if (sr & UCPD_SR_RXNE) { +// uint8_t data = UCPD1->RXDR; +// pd_rx_buf[pd_rx_count++] = data; +// TU_LOG1_HEX(data); +// } + +// else { +// TU_LOG_LOCATION(); +// } +} + +#endif diff --git a/src/tusb.h b/src/tusb.h index b776d7d01..0b87b1969 100644 --- a/src/tusb.h +++ b/src/tusb.h @@ -40,6 +40,11 @@ #include "class/hid/hid.h" +//------------- TypeC -------------// +#if CFG_TUC_ENABLED + #include "typec/utcd.h" +#endif + //------------- HOST -------------// #if CFG_TUH_ENABLED #include "host/usbh.h" diff --git a/src/typec/tcd.h b/src/typec/tcd.h new file mode 100644 index 000000000..397c0ac83 --- /dev/null +++ b/src/typec/tcd.h @@ -0,0 +1,58 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (thach@tinyusb.org) for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _TUSB_TCD_H_ +#define _TUSB_TCD_H_ + +#include "common/tusb_common.h" +#include "osal/osal.h" +#include "common/tusb_fifo.h" + +#ifdef __cplusplus +extern "C" { +#endif + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +// Initialize controller +bool tcd_init(uint8_t rhport, typec_port_type_t port_type); + +// Enable interrupt +void tcd_int_enable (uint8_t rhport); + +// Disable interrupt +void tcd_int_disable(uint8_t rhport); + +// Interrupt Handler +void tcd_int_handler(uint8_t rhport); + +#endif diff --git a/src/typec/utcd.c b/src/typec/utcd.c new file mode 100644 index 000000000..baa95fbe5 --- /dev/null +++ b/src/typec/utcd.c @@ -0,0 +1,48 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (thach@tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "tusb_option.h" + +#if CFG_TUC_ENABLED + +#include "tcd.h" + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +bool tuc_init(uint8_t rhport, typec_port_type_t port_type) { + TU_ASSERT(tcd_init(rhport, port_type)); + tcd_int_enable(rhport); + return true; +} + +#endif diff --git a/src/typec/utcd.h b/src/typec/utcd.h new file mode 100644 index 000000000..2f9b84fb7 --- /dev/null +++ b/src/typec/utcd.h @@ -0,0 +1,54 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _TUSB_UTCD_H_ +#define _TUSB_UTCD_H_ + +#include "common/tusb_common.h" + +#ifdef __cplusplus +extern "C" { +#endif + +//--------------------------------------------------------------------+ +// Application API +//--------------------------------------------------------------------+ + +// init typec stack +bool tuc_init(uint8_t rhport, typec_port_type_t port_type); + +#ifndef _TUSB_TCD_H_ +extern void tcd_int_handler(uint8_t rhport); +#endif + +// Interrupt handler, name alias to TCD +#define tuc_int_handler tcd_int_handler + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +#endif -- cgit v1.3.1 From 9b7dee563e83a548f0d0fb68dd991a868a6427c9 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 7 Jun 2023 18:57:48 +0700 Subject: able to response with good crc --- examples/typec/power_delivery/src/main.c | 2 +- src/common/tusb_mcu.h | 5 ++ src/common/tusb_types.h | 112 +++++++++++++++++-------------- src/device/usbd.c | 10 +++ src/host/usbh.c | 2 +- src/portable/st/typec/typec_stm32.c | 105 +++++++++++++++++++++++++---- src/typec/tcd.h | 15 ++++- src/typec/utcd.c | 57 +++++++++++++++- src/typec/utcd.h | 16 ++++- 9 files changed, 253 insertions(+), 71 deletions(-) (limited to 'src/common') diff --git a/examples/typec/power_delivery/src/main.c b/examples/typec/power_delivery/src/main.c index 9d032b6bb..648345a55 100644 --- a/examples/typec/power_delivery/src/main.c +++ b/examples/typec/power_delivery/src/main.c @@ -54,7 +54,7 @@ int main(void) board_init(); board_led_write(true); - tuc_init(0, TYPEC_PORT_SNK); + tuc_init(0, TUSB_TYPEC_PORT_SNK); uint32_t start_ms = 0; bool led_state = false; diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index bb4483f7d..f89467e75 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -197,12 +197,17 @@ #define TUP_DCD_ENDPOINT_MAX 9 #elif TU_CHECK_MCU(OPT_MCU_STM32G4) + // Device controller #define TUP_USBIP_FSDEV #define TUP_USBIP_FSDEV_STM32 + + // TypeC controller #define TUP_USBIP_TYPEC_STM32 #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_TYPEC_RHPORTS_NUM 1 + #elif TU_CHECK_MCU(OPT_MCU_STM32G0) #define TUP_USBIP_FSDEV #define TUP_USBIP_FSDEV_STM32 diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index e6b350a40..c92320e5c 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -504,67 +504,75 @@ TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct"); //--------------------------------------------------------------------+ typedef enum { - TYPEC_PORT_SRC, - TYPEC_PORT_SNK, - TYPEC_PORT_DRP -} typec_port_type_t; + TUSB_TYPEC_PORT_SRC, + TUSB_TYPEC_PORT_SNK, + TUSB_TYPEC_PORT_DRP +} tusb_typec_port_type_t; typedef enum { - TYPEC_MSG_CTRL_RESERVED = 0, // 0b00000: 0 - TYPEC_MSG_CTRL_GOOD_CRC, // 0b00001: 1 - TYPEC_MSG_CTRL_GO_TO_MIN, // 0b00010: 2 - TYPEC_MSG_CTRL_ACCEPT, // 0b00011: 3 - TYPEC_MSG_CTRL_REJECT, // 0b00100: 4 - TYPEC_MSG_CTRL_PING, // 0b00101: 5 - TYPEC_MSG_CTRL_PS_RDY, // 0b00110: 6 - TYPEC_MSG_CTRL_GET_SOURCE_CAP, // 0b00111: 7 - TYPEC_MSG_CTRL_GET_SINK_CAP, // 0b01000: 8 - TYPEC_MSG_CTRL_DR_SWAP, // 0b01001: 9 - TYPEC_MSG_CTRL_PR_SWAP, // 0b01010: 10 - TYPEC_MSG_CTRL_VCONN_SWAP, // 0b01011: 11 - TYPEC_MSG_CTRL_WAIT, // 0b01100: 12 - TYPEC_MSG_CTRL_SOFT_RESET, // 0b01101: 13 - TYPEC_MSG_CTRL_DATA_RESET, // 0b01110: 14 - TYPEC_MSG_CTRL_DATA_RESET_COMPLETE, // 0b01111: 15 - TYPEC_MSG_CTRL_NOT_SUPPORTED, // 0b10000: 16 - TYPEC_MSG_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17 - TYPEC_MSG_CTRL_GET_STATUS, // 0b10010: 18 - TYPEC_MSG_CTRL_FR_SWAP, // 0b10011: 19 - TYPEC_MSG_CTRL_GET_PPS_STATUS, // 0b10100: 20 - TYPEC_MSG_CTRL_GET_COUNTRY_CODES, // 0b10101: 21 - TYPEC_MSG_CTRL_GET_SINK_CAP_EXTENDED, // 0b10110: 22 - TYPEC_MSG_CTRL_GET_SOURCE_INFO, // 0b10111: 23 - TYPEC_MSG_CTRL_REVISION, // 0b11000: 24 -} typec_msg_ctrl_type_t; + TUSB_PD_CTRL_RESERVED = 0, // 0b00000: 0 + TUSB_PD_CTRL_GOOD_CRC, // 0b00001: 1 + TUSB_PD_CTRL_GO_TO_MIN, // 0b00010: 2 + TUSB_PD_CTRL_ACCEPT, // 0b00011: 3 + TUSB_PD_CTRL_REJECT, // 0b00100: 4 + TUSB_PD_CTRL_PING, // 0b00101: 5 + TUSB_PD_CTRL_PS_RDY, // 0b00110: 6 + TUSB_PD_CTRL_GET_SOURCE_CAP, // 0b00111: 7 + TUSB_PD_CTRL_GET_SINK_CAP, // 0b01000: 8 + TUSB_PD_CTRL_DR_SWAP, // 0b01001: 9 + TUSB_PD_CTRL_PR_SWAP, // 0b01010: 10 + TUSB_PD_CTRL_VCONN_SWAP, // 0b01011: 11 + TUSB_PD_CTRL_WAIT, // 0b01100: 12 + TUSB_PD_CTRL_SOFT_RESET, // 0b01101: 13 + TUSB_PD_CTRL_DATA_RESET, // 0b01110: 14 + TUSB_PD_CTRL_DATA_RESET_COMPLETE, // 0b01111: 15 + TUSB_PD_CTRL_NOT_SUPPORTED, // 0b10000: 16 + TUSB_PD_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17 + TUSB_PD_CTRL_GET_STATUS, // 0b10010: 18 + TUSB_PD_CTRL_FR_SWAP, // 0b10011: 19 + TUSB_PD_CTRL_GET_PPS_STATUS, // 0b10100: 20 + TUSB_PD_CTRL_GET_COUNTRY_CODES, // 0b10101: 21 + TUSB_PD_CTRL_GET_SINK_CAP_EXTENDED, // 0b10110: 22 + TUSB_PD_CTRL_GET_SOURCE_INFO, // 0b10111: 23 + TUSB_PD_CTRL_REVISION, // 0b11000: 24 +} tusb_pd_ctrl_type_t; typedef enum { - TYPEC_MSG_DATA_RESERVED = 0, // 0b00000: 0 - TYPEC_MSG_DATA_SOURCE_CAP, // 0b00001: 1 - TYPEC_MSG_DATA_REQUEST, // 0b00010: 2 - TYPEC_MSG_DATA_BIST, // 0b00011: 3 - TYPEC_MSG_DATA_SINK_CAP, // 0b00100: 4 - TYPEC_MSG_DATA_BATTERY_STATUS, // 0b00101: 5 - TYPEC_MSG_DATA_ALERT, // 0b00110: 6 - TYPEC_MSG_DATA_GET_COUNTRY_INFO, // 0b00111: 7 - TYPEC_MSG_DATA_ENTER_USB, // 0b01000: 8 - TYPEC_MSG_DATA_EPR_REQUEST, // 0b01001: 9 - TYPEC_MSG_DATA_EPR_MODE, // 0b01010: 10 - TYPEC_MSG_DATA_SRC_INFO, // 0b01011: 11 - TYPEC_MSG_DATA_REVISION, // 0b01100: 12 - TYPEC_MSG_DATA_RESERVED_13, // 0b01101: 13 - TYPEC_MSG_DATA_RESERVED_14, // 0b01110: 14 - TYPEC_MSG_DATA_VENDOR_DEFINED, // 0b01111: 15 -} typec_msg_data_type_t; + TUSB_PD_DATA_RESERVED = 0, // 0b00000: 0 + TUSB_PD_DATA_SOURCE_CAP, // 0b00001: 1 + TUSB_PD_DATA_REQUEST, // 0b00010: 2 + TUSB_PD_DATA_BIST, // 0b00011: 3 + TUSB_PD_DATA_SINK_CAP, // 0b00100: 4 + TUSB_PD_DATA_BATTERY_STATUS, // 0b00101: 5 + TUSB_PD_DATA_ALERT, // 0b00110: 6 + TUSB_PD_DATA_GET_COUNTRY_INFO, // 0b00111: 7 + TUSB_PD_DATA_ENTER_USB, // 0b01000: 8 + TUSB_PD_DATA_EPR_REQUEST, // 0b01001: 9 + TUSB_PD_DATA_EPR_MODE, // 0b01010: 10 + TUSB_PD_DATA_SRC_INFO, // 0b01011: 11 + TUSB_PD_DATA_REVISION, // 0b01100: 12 + TUSB_PD_DATA_RESERVED_13, // 0b01101: 13 + TUSB_PD_DATA_RESERVED_14, // 0b01110: 14 + TUSB_PD_DATA_VENDOR_DEFINED, // 0b01111: 15 +} tusb_pd_data_type_t; + +enum { + TUSB_PD_REV10 = 0x0, + TUSB_PD_REV20 = 0x1, + TUSB_PD_REV30 = 0x2, +}; typedef struct TU_ATTR_PACKED { uint16_t msg_type : 5; // [0:4] - uint16_t data_role : 1; // [5] SOP only + uint16_t data_role : 1; // [5] SOP only: 0 UFP, 1 DFP uint16_t specs_rev : 2; // [6:7] - uint16_t power_role : 1; // [8] SOP only + uint16_t power_role : 1; // [8] SOP only: 0 Sink, 1 Source uint16_t msg_id : 3; // [9:11] uint16_t n_data_obj : 3; // [12:14] uint16_t extended : 1; // [15] -} tusb_typec_message_header_t; +} tusb_pd_header_t; + +TU_VERIFY_STATIC( sizeof(tusb_pd_header_t) == 2, "size is not correct"); typedef struct TU_ATTR_PACKED { uint16_t data_size : 9; // [0:8] @@ -572,7 +580,9 @@ typedef struct TU_ATTR_PACKED { uint16_t request_chunk : 1; // [10] uint16_t chunk_number : 4; // [11:14] uint16_t chunked : 1; // [15] -} tusb_typec_message_header_extended_t; +} tusb_pd_header_extended_t; + +TU_VERIFY_STATIC( sizeof(tusb_pd_header_extended_t) == 2, "size is not correct"); TU_ATTR_PACKED_END // End of all packed definitions diff --git a/src/device/usbd.c b/src/device/usbd.c index 409a5ec10..44c2530ce 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -252,9 +252,19 @@ static inline usbd_class_driver_t const * get_driver(uint8_t drvid) drvid -= _app_driver_count; } + // when there is no built-in drivers BUILTIN_DRIVER_COUNT = 0 will cause -Wtype-limits warning +#ifdef __GNUC__ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wtype-limits" +#endif + // Built-in drivers if (drvid < BUILTIN_DRIVER_COUNT) return &_usbd_driver[drvid]; +#ifdef __GNUC__ +#pragma GCC diagnostic pop +#endif + return NULL; } diff --git a/src/host/usbh.c b/src/host/usbh.c index 6159044ab..98e959a12 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -724,7 +724,7 @@ uint8_t* usbh_get_enum_buf(void) void usbh_int_set(bool enabled) { - // TODO all host controller if multiple is used + // TODO all host controller if multiple are used since they shared the same event queue if (enabled) { hcd_int_enable(_usbh_controller); diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c index fd029473d..79f37b729 100644 --- a/src/portable/st/typec/typec_stm32.c +++ b/src/portable/st/typec/typec_stm32.c @@ -29,20 +29,43 @@ #include "common/tusb_common.h" -#include "stm32g4xx.h" +#if CFG_TUSB_MCU == OPT_MCU_STM32G4 + #include "stm32g4xx.h" +#else + #error "Unsupported STM32 family" +#endif //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ -uint8_t pd_rx_buf[262]; -uint32_t pd_rx_count = 0; -uint8_t pd_rx_order_set; + +#define PHY_SYNC1 0x18u +#define PHY_SYNC2 0x11u +#define PHY_SYNC3 0x06u +#define PHY_RST1 0x07u +#define PHY_RST2 0x19u +#define PHY_EOP 0x0Du + +#define PHY_ORDERED_SET_SOP (PHY_SYNC1 | (PHY_SYNC1<<5u) | (PHY_SYNC1<<10u) | (PHY_SYNC2<<15u)) // SOP Ordered set coding +#define PHY_ORDERED_SET_SOP_P (PHY_SYNC1 | (PHY_SYNC1<<5u) | (PHY_SYNC3<<10u) | (PHY_SYNC3<<15u)) // SOP' Ordered set coding +#define PHY_ORDERED_SET_SOP_PP (PHY_SYNC1 | (PHY_SYNC3<<5u) | (PHY_SYNC1<<10u) | (PHY_SYNC3<<15u)) // SOP'' Ordered set coding +#define PHY_ORDERED_SET_HARD_RESET (PHY_RST1 | (PHY_RST1<<5u) | (PHY_RST1<<10u) | (PHY_RST2<<15u )) // Hard Reset Ordered set coding +#define PHY_ORDERED_SET_CABLE_RESET (PHY_RST1 | (PHY_SYNC1<<5u) | (PHY_RST1<<10u) | (PHY_SYNC3<<15u)) // Cable Reset Ordered set coding +#define PHY_ORDERED_SET_SOP_P_DEBUG (PHY_SYNC1 | (PHY_RST2<<5u) | (PHY_RST2<<10u) | (PHY_SYNC3<<15u)) // SOP' Debug Ordered set coding +#define PHY_ORDERED_SET_SOP_PP_DEBUG (PHY_SYNC1 | (PHY_RST2<<5u) | (PHY_SYNC3<<10u) | (PHY_SYNC2<<15u)) // SOP'' Debug Ordered set coding + + +static uint8_t rx_buf[262] TU_ATTR_ALIGNED(4); +static uint32_t rx_count = 0; + +static uint8_t tx_buf[262] TU_ATTR_ALIGNED(4); +static uint32_t tx_count; //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ -bool tcd_init(uint8_t rhport, typec_port_type_t port_type) { +bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) { (void) rhport; // Initialization phase: CFG1 @@ -52,7 +75,7 @@ bool tcd_init(uint8_t rhport, typec_port_type_t port_type) { UCPD1->CFG1 |= UCPD_CFG1_UCPDEN; // General programming sequence (with UCPD configured then enabled) - if (port_type == TYPEC_PORT_SNK) { + if (port_type == TUSB_TYPEC_PORT_SNK) { // Enable both CC Phy UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos); @@ -83,6 +106,19 @@ void tcd_int_disable(uint8_t rhport) { NVIC_DisableIRQ(UCPD1_IRQn); } +bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) { + (void) rhport; + + return true; +} + +bool tcd_tx_start(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes) { + (void) rhport; + (void) buffer; + (void) total_bytes; + return false; +} + void tcd_int_handler(uint8_t rhport) { (void) rhport; @@ -116,7 +152,7 @@ void tcd_int_handler(uint8_t rhport) { if (cr & UCPD_CR_PHYRXEN) { // Enable Interrupt - UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | + UCPD1->IMR |= UCPD_IMR_TXISIE | UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE; } @@ -128,13 +164,13 @@ void tcd_int_handler(uint8_t rhport) { UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF; } - //------------- Receive -------------// + //------------- RX -------------// if (sr & UCPD_SR_RXORDDET) { // SOP: Start of Packet. - pd_rx_order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; + // UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; // reset count when received SOP - pd_rx_count = 0; + rx_count = 0; // ack UCPD1->ICR = UCPD_ICR_RXORDDETCF; @@ -143,17 +179,38 @@ void tcd_int_handler(uint8_t rhport) { if (sr & UCPD_SR_RXNE) { // TODO DMA later do { - pd_rx_buf[pd_rx_count++] = UCPD1->RXDR; + rx_buf[rx_count++] = UCPD1->RXDR; } while (UCPD1->SR & UCPD_SR_RXNE); + + // no ack needed } + // End of message if (sr & UCPD_SR_RXMSGEND) { - // End of message // Skip if CRC failed if (!(sr & UCPD_SR_RXERR)) { uint32_t payload_size = UCPD1->RX_PAYSZ; - TU_LOG1("RXMSGEND: payload_size = %u, rx count = %u\n", payload_size, pd_rx_count); + // TU_LOG1("RXMSGEND: payload_size = %u, rx count = %u\n", payload_size, pd_rx_count); + + tusb_pd_header_t const* rx_header = (tusb_pd_header_t const*) rx_buf; + (*(tusb_pd_header_t*) tx_buf) = (tusb_pd_header_t) { + .msg_type = TUSB_PD_CTRL_GOOD_CRC, + .data_role = 0, // UFP + .specs_rev = TUSB_PD_REV30, + .power_role = 0, // Sink + .msg_id = rx_header->msg_id, + .n_data_obj = 0, + .extended = 0 + }; + tx_count = 0; + + // response with good crc + UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP; + UCPD1->TX_PAYSZ = 2; + UCPD1->CR |= UCPD_CR_TXSEND; // will trigger TXIS interrupt + + // notify stack after good crc ? } // ack @@ -162,11 +219,31 @@ void tcd_int_handler(uint8_t rhport) { if (sr & UCPD_SR_RXOVR) { TU_LOG1("RXOVR\n"); - TU_LOG1_HEX(pd_rx_count); + TU_LOG1_HEX(rx_count); // ack UCPD1->ICR = UCPD_ICR_RXOVRCF; } + //------------- TX -------------// + if (sr & UCPD_SR_TXIS) { + // TU_LOG1("TXIS\n"); + + // TODO DMA later + do { + UCPD1->TXDR = tx_buf[tx_count++]; + } while (UCPD1->SR & UCPD_SR_TXIS); + + // no ack needed + } + + if (sr & UCPD_SR_TXMSGSENT) { + // all byte sent + TU_LOG1("TXMSGSENT\n"); + + // ack + UCPD1->ICR = UCPD_ICR_TXMSGSENTCF; + } + // if (sr & UCPD_SR_RXNE) { // uint8_t data = UCPD1->RXDR; // pd_rx_buf[pd_rx_count++] = data; diff --git a/src/typec/tcd.h b/src/typec/tcd.h index 397c0ac83..e823bf8d7 100644 --- a/src/typec/tcd.h +++ b/src/typec/tcd.h @@ -38,13 +38,19 @@ extern "C" { //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ +typedef struct { + uint8_t rhport; + uint8_t event_id; + + +} tcd_event_t;; //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ // Initialize controller -bool tcd_init(uint8_t rhport, typec_port_type_t port_type); +bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type); // Enable interrupt void tcd_int_enable (uint8_t rhport); @@ -55,4 +61,11 @@ void tcd_int_disable(uint8_t rhport); // Interrupt Handler void tcd_int_handler(uint8_t rhport); +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes); +bool tcd_tx_start(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes); + #endif diff --git a/src/typec/utcd.c b/src/typec/utcd.c index baa95fbe5..b5f9965fe 100644 --- a/src/typec/utcd.c +++ b/src/typec/utcd.c @@ -29,20 +29,75 @@ #if CFG_TUC_ENABLED #include "tcd.h" +#include "utcd.h" //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ +// Debug level of USBD +#define UTCD_DEBUG 2 +#define TU_LOG_UTCD(...) TU_LOG(UTCD_DEBUG, __VA_ARGS__) + +// Event queue +// utcd_int_set() is used as mutex in OS NONE config +void utcd_int_set(bool enabled); +OSAL_QUEUE_DEF(utcd_int_set, utcd_qdef, CFG_TUC_TASK_QUEUE_SZ, tcd_event_t); +tu_static osal_queue_t utcd_q; + +// if stack is initialized +static bool utcd_inited = false; + +// if port is initialized +static bool port_inited[TUP_TYPEC_RHPORTS_NUM]; //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ +bool tuc_inited(uint8_t rhport) { + return utcd_inited && port_inited[rhport]; +} + +bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) { + // Initialize stack + if (!utcd_inited) { + tu_memclr(port_inited, sizeof(port_inited)); + + utcd_q = osal_queue_create(&utcd_qdef); + TU_ASSERT(utcd_q != NULL); + + utcd_inited = true; + } + + // skip if port already initialized + if ( port_inited[rhport] ) { + return true; + } + + TU_LOG_UTCD("UTCD init on port %u\r\n", rhport); -bool tuc_init(uint8_t rhport, typec_port_type_t port_type) { TU_ASSERT(tcd_init(rhport, port_type)); tcd_int_enable(rhport); + + port_inited[rhport] = true; return true; } + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ +void utcd_int_set(bool enabled) { + // Disable all controllers since they shared the same event queue + for (uint8_t p = 0; p < TUP_TYPEC_RHPORTS_NUM; p++) { + if ( port_inited[p] ) { + if (enabled) { + tcd_int_enable(p); + }else { + tcd_int_disable(p); + } + } + } +} + #endif diff --git a/src/typec/utcd.h b/src/typec/utcd.h index 2f9b84fb7..06a62ef23 100644 --- a/src/typec/utcd.h +++ b/src/typec/utcd.h @@ -33,12 +33,24 @@ extern "C" { #endif +//--------------------------------------------------------------------+ +// TypeC Configuration +//--------------------------------------------------------------------+ + +#ifndef CFG_TUC_TASK_QUEUE_SZ +#define CFG_TUC_TASK_QUEUE_SZ 16 +#endif + + //--------------------------------------------------------------------+ // Application API //--------------------------------------------------------------------+ -// init typec stack -bool tuc_init(uint8_t rhport, typec_port_type_t port_type); +// Init typec stack on a port +bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type); + +// Check if typec port is initialized +bool tuc_inited(uint8_t rhport); #ifndef _TUSB_TCD_H_ extern void tcd_int_handler(uint8_t rhport); -- cgit v1.3.1 From debde4cc97cb7c6c13d62d0e3bbe195c80bfec9f Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 12 Jun 2023 12:14:55 +0700 Subject: response with request safe5v, get passed PS_READY --- src/common/tusb_types.h | 10 +++++ src/portable/st/typec/typec_stm32.c | 78 +++++++++++++++++++++++++++++-------- src/typec/tcd.h | 17 +++++++- src/typec/utcd.c | 59 ++++++++++++++++++++++++++++ src/typec/utcd.h | 34 +++++++++++++++- 5 files changed, 180 insertions(+), 18 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index c92320e5c..cad633ee4 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -562,6 +562,16 @@ enum { TUSB_PD_REV30 = 0x2, }; +enum { + TUSB_PD_DATA_ROLE_UFP = 0x0, + TUSB_PD_DATA_ROLE_DFP = 0x1, +}; + +enum { + TUSB_PD_POWER_ROLE_SINK = 0x0, + TUSB_PD_POWER_ROLE_SOURCE = 0x1, +}; + typedef struct TU_ATTR_PACKED { uint16_t msg_type : 5; // [0:4] uint16_t data_role : 1; // [5] SOP only: 0 UFP, 1 DFP diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c index 1dba54492..9b3b21707 100644 --- a/src/portable/st/typec/typec_stm32.c +++ b/src/portable/st/typec/typec_stm32.c @@ -63,6 +63,9 @@ enum { static uint8_t const* _rx_buf; +static uint8_t const* _tx_pending_buf; +static uint16_t _tx_pending_bytes; +static uint16_t _tx_xferring_bytes; static tusb_pd_header_t _good_crc = { .msg_type = TUSB_PD_CTRL_GOOD_CRC, @@ -141,10 +144,21 @@ TU_ATTR_ALWAYS_INLINE static inline void dma_stop(uint8_t rhport, bool is_rx) { dma_ch->CCR &= ~DMA_CCR_EN; } +TU_ATTR_ALWAYS_INLINE static inline bool dma_enabled(uint8_t rhport, bool is_rx) { + DMA_Channel_TypeDef* dma_ch = (DMA_Channel_TypeDef*) dma_get_addr(rhport, is_rx); + return dma_ch->CCR & DMA_CCR_EN; +} + + TU_ATTR_ALWAYS_INLINE static inline void dma_tx_start(uint8_t rhport, void const* buf, uint16_t len) { UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP; UCPD1->TX_PAYSZ = len; dma_start(rhport, false, buf, len); + UCPD1->CR |= UCPD_CR_TXSEND; +} + +TU_ATTR_ALWAYS_INLINE static inline void dma_tx_stop(uint8_t rhport) { + dma_stop(rhport, false); } //--------------------------------------------------------------------+ @@ -203,11 +217,23 @@ bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) { return true; } -bool tcd_tx_start(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes) { +bool tcd_msg_send(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes) { (void) rhport; - (void) buffer; - (void) total_bytes; - return false; + + if (dma_enabled(rhport, false)) { + // DMA is busy, probably sending GoodCRC, save as pending TX + _tx_pending_buf = buffer; + _tx_pending_bytes = total_bytes; + }else { + // DMA is free, start sending + _tx_pending_buf = NULL; + _tx_pending_bytes = 0; + + _tx_xferring_bytes = total_bytes; + dma_tx_start(rhport, buffer, total_bytes); + } + + return true; } void tcd_int_handler(uint8_t rhport) { @@ -275,6 +301,8 @@ void tcd_int_handler(uint8_t rhport) { // Received full message if (sr & UCPD_SR_RXMSGEND) { TU_LOG3("RX MSG END\n"); + + // stop TX dma_stop(rhport, true); uint8_t result; @@ -283,7 +311,6 @@ void tcd_int_handler(uint8_t rhport) { // response with good crc _good_crc.msg_id = ((tusb_pd_header_t const*) _rx_buf)->msg_id; dma_tx_start(rhport, &_good_crc, 2); - UCPD1->CR |= UCPD_CR_TXSEND; result = XFER_RESULT_SUCCESS; }else { @@ -305,19 +332,38 @@ void tcd_int_handler(uint8_t rhport) { } //------------- TX -------------// - if (sr & UCPD_SR_TXMSGSENT) { - TU_LOG3("TX MSG SENT\n"); - // all byte sent - dma_stop(rhport, false); + // All tx events: complete and error + if (sr & (UCPD_SR_TXMSGSENT | (UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND))) { + // force TX stop + dma_tx_stop(rhport); - // ack - UCPD1->ICR = UCPD_ICR_TXMSGSENTCF; - } + uint16_t const xferred_bytes = _tx_xferring_bytes - UCPD1->TX_PAYSZ; + uint8_t result; - if (sr & (UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND)) { - TU_LOG3("TX Error\n"); - dma_stop(rhport, false); - UCPD1->ICR = UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND; + if ( sr & UCPD_SR_TXMSGSENT ) { + TU_LOG3("TX MSG SENT\n"); + result = XFER_RESULT_SUCCESS; + // ack + UCPD1->ICR = UCPD_ICR_TXMSGSENTCF; + }else { + TU_LOG3("TX Error\n"); + result = XFER_RESULT_FAILED; + // ack + UCPD1->ICR = UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND; + } + + // start pending TX if any + if (_tx_pending_buf && _tx_pending_bytes ) { + // Start the pending TX + dma_tx_start(rhport, _tx_pending_buf, _tx_pending_bytes); + + // clear pending + _tx_pending_buf = NULL; + _tx_pending_bytes = 0; + } + + // notify stack + tcd_event_tx_complete(rhport, xferred_bytes, result, true); } } diff --git a/src/typec/tcd.h b/src/typec/tcd.h index 41dceaa74..b131d6ba9 100644 --- a/src/typec/tcd.h +++ b/src/typec/tcd.h @@ -43,6 +43,7 @@ enum { TCD_EVENT_INVALID = 0, TCD_EVENT_CC_CHANGED, TCD_EVENT_RX_COMPLETE, + TCD_EVENT_TX_COMPLETE, }; @@ -84,7 +85,7 @@ void tcd_int_handler(uint8_t rhport); //--------------------------------------------------------------------+ bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes); -bool tcd_tx_start(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes); +bool tcd_msg_send(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes); //--------------------------------------------------------------------+ // Event API (implemented by stack) @@ -120,4 +121,18 @@ void tcd_event_rx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t resul tcd_event_handler(&event, in_isr); } +TU_ATTR_ALWAYS_INLINE static inline +void tcd_event_tx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t result, bool in_isr) { + tcd_event_t event = { + .rhport = rhport, + .event_id = TCD_EVENT_TX_COMPLETE, + .rx_complete = { + .xferred_bytes = xferred_bytes, + .result = result + } + }; + + tcd_event_handler(&event, in_isr); +} + #endif diff --git a/src/typec/utcd.c b/src/typec/utcd.c index abbe8b43e..09031e5c9 100644 --- a/src/typec/utcd.c +++ b/src/typec/utcd.c @@ -53,6 +53,7 @@ static bool _port_inited[TUP_TYPEC_RHPORTS_NUM]; // Max possible PD size is 262 bytes static uint8_t _rx_buf[262] TU_ATTR_ALIGNED(4); +static uint8_t _tx_buf[100] TU_ATTR_ALIGNED(4); //--------------------------------------------------------------------+ // @@ -90,6 +91,19 @@ bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) { // //--------------------------------------------------------------------+ +bool utcd_msg_send(uint8_t rhport, tusb_pd_header_t const* header, void const* data) { + // copy header + memcpy(_tx_buf, header, sizeof(tusb_pd_header_t)); + + // copy data objcet if available + uint16_t const n_data_obj = header->n_data_obj; + if (n_data_obj > 0) { + memcpy(_tx_buf + sizeof(tusb_pd_header_t), data, n_data_obj * 4); + } + + return tcd_msg_send(rhport, _tx_buf, sizeof(tusb_pd_header_t) + n_data_obj * 4); +} + bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) { (void) rhport; uint8_t const* p_end = buf + len; @@ -98,10 +112,28 @@ bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) { if (header->n_data_obj == 0) { // control message + switch (header->msg_type) { + case TUSB_PD_CTRL_GOOD_CRC: + break; + + case TUSB_PD_CTRL_ACCEPT: + break; + + case TUSB_PD_CTRL_REJECT: + break; + + case TUSB_PD_CTRL_PS_RDY: + break; + + default: break; + } } else { // data message switch (header->msg_type) { case TUSB_PD_DATA_SOURCE_CAP: { + // Examine source capability and select a suitable PDO (starting from 1 with safe5v) + uint8_t obj_pos = 1; + for(size_t i=0; in_data_obj; i++) { TU_VERIFY(ptr < p_end); uint32_t const pdo = tu_le32toh(tu_unaligned_read32(ptr)); @@ -125,6 +157,33 @@ bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) { ptr += 4; } + + // Send request with selected PDO position as response to Source Cap + pd_rdo_fixed_variable_t rdo = { + .current_extremum_10ma = 50, // max 500mA + .current_operate_10ma = 30, // 300mA + .reserved = 0, + .epr_mode_capable = 0, + .unchunked_ext_msg_support = 0, + .no_usb_suspend = 0, + .usb_comm_capable = 1, + .capability_mismatch = 0, + .give_back_flag = 0, // exteremum is max + .object_position = obj_pos, + }; + + tusb_pd_header_t const req_header = { + .msg_type = TUSB_PD_DATA_REQUEST, + .data_role = TUSB_PD_DATA_ROLE_UFP, + .specs_rev = TUSB_PD_REV20, + .power_role = TUSB_PD_POWER_ROLE_SINK, + .msg_id = 0, + .n_data_obj = 1, + .extended = 0, + }; + + utcd_msg_send(rhport, &req_header, &rdo); + break; } diff --git a/src/typec/utcd.h b/src/typec/utcd.h index dbc909592..bb1523253 100644 --- a/src/typec/utcd.h +++ b/src/typec/utcd.h @@ -42,7 +42,7 @@ extern "C" { #endif //--------------------------------------------------------------------+ -// +// Source Capability //--------------------------------------------------------------------+ // All table references are from USBPD Specification rev3.1 version 1.8 @@ -102,6 +102,38 @@ typedef struct TU_ATTR_PACKED { } pd_pdo_apdo_t; TU_VERIFY_STATIC(sizeof(pd_pdo_apdo_t) == 4, "Invalid size"); +//--------------------------------------------------------------------+ +// Request +//--------------------------------------------------------------------+ + +typedef struct TU_ATTR_PACKED { + uint32_t current_extremum_10ma : 10; // [9..0] Max (give back = 0) or Min (give back = 1) current in 10mA unit + uint32_t current_operate_10ma : 10; // [19..10] Operating current in 10mA unit + uint32_t reserved : 2; // [21..20] Reserved + uint32_t epr_mode_capable : 1; // [22] EPR mode capable + uint32_t unchunked_ext_msg_support : 1; // [23] UnChunked Extended Message Supported + uint32_t no_usb_suspend : 1; // [24] No USB Suspend + uint32_t usb_comm_capable : 1; // [25] USB Communications Capable + uint32_t capability_mismatch : 1; // [26] Capability Mismatch + uint32_t give_back_flag : 1; // [27] GiveBack Flag: 0 = Max, 1 = Min + uint32_t object_position : 4; // [31..28] Object Position +} pd_rdo_fixed_variable_t; +TU_VERIFY_STATIC(sizeof(pd_rdo_fixed_variable_t) == 4, "Invalid size"); + +typedef struct TU_ATTR_PACKED { + uint32_t power_extremum_250mw : 10; // [9..0] Max (give back = 0) or Min (give back = 1) operating power in 250mW unit + uint32_t power_operate_250mw : 10; // [19..10] Operating power in 250mW unit + uint32_t reserved : 2; // [21..20] Reserved + uint32_t epr_mode_capable : 1; // [22] EPR mode capable + uint32_t unchunked_ext_msg_support : 1; // [23] UnChunked Extended Message Supported + uint32_t no_usb_suspend : 1; // [24] No USB Suspend + uint32_t usb_comm_capable : 1; // [25] USB Communications Capable + uint32_t capability_mismatch : 1; // [26] Capability Mismatch + uint32_t give_back_flag : 1; // [27] GiveBack Flag: 0 = Max, 1 = Min + uint32_t object_position : 4; // [31..28] Object Position +} pd_rdo_battery_t; +TU_VERIFY_STATIC(sizeof(pd_rdo_battery_t) == 4, "Invalid size"); + //--------------------------------------------------------------------+ // Application API //--------------------------------------------------------------------+ -- cgit v1.3.1 From c28503060c0c3cb09d8e2ce63d1b0009affbdf72 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 12 Jun 2023 14:57:50 +0700 Subject: ad pd_types.h --- src/common/tusb_types.h | 96 +-------------- src/portable/st/typec/typec_stm32.c | 13 +- src/typec/pd_types.h | 237 ++++++++++++++++++++++++++++++++++++ src/typec/tcd.h | 10 +- src/typec/utcd.c | 38 +++--- src/typec/utcd.h | 101 ++------------- 6 files changed, 278 insertions(+), 217 deletions(-) create mode 100644 src/typec/pd_types.h (limited to 'src/common') diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index cad633ee4..fab680989 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -480,6 +480,7 @@ typedef struct TU_ATTR_PACKED //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ + typedef struct TU_ATTR_PACKED{ union { struct TU_ATTR_PACKED { @@ -499,101 +500,6 @@ typedef struct TU_ATTR_PACKED{ TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct"); -//--------------------------------------------------------------------+ -// TYPE-C -//--------------------------------------------------------------------+ - -typedef enum { - TUSB_TYPEC_PORT_SRC, - TUSB_TYPEC_PORT_SNK, - TUSB_TYPEC_PORT_DRP -} tusb_typec_port_type_t; - -typedef enum { - TUSB_PD_CTRL_RESERVED = 0, // 0b00000: 0 - TUSB_PD_CTRL_GOOD_CRC, // 0b00001: 1 - TUSB_PD_CTRL_GO_TO_MIN, // 0b00010: 2 - TUSB_PD_CTRL_ACCEPT, // 0b00011: 3 - TUSB_PD_CTRL_REJECT, // 0b00100: 4 - TUSB_PD_CTRL_PING, // 0b00101: 5 - TUSB_PD_CTRL_PS_RDY, // 0b00110: 6 - TUSB_PD_CTRL_GET_SOURCE_CAP, // 0b00111: 7 - TUSB_PD_CTRL_GET_SINK_CAP, // 0b01000: 8 - TUSB_PD_CTRL_DR_SWAP, // 0b01001: 9 - TUSB_PD_CTRL_PR_SWAP, // 0b01010: 10 - TUSB_PD_CTRL_VCONN_SWAP, // 0b01011: 11 - TUSB_PD_CTRL_WAIT, // 0b01100: 12 - TUSB_PD_CTRL_SOFT_RESET, // 0b01101: 13 - TUSB_PD_CTRL_DATA_RESET, // 0b01110: 14 - TUSB_PD_CTRL_DATA_RESET_COMPLETE, // 0b01111: 15 - TUSB_PD_CTRL_NOT_SUPPORTED, // 0b10000: 16 - TUSB_PD_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17 - TUSB_PD_CTRL_GET_STATUS, // 0b10010: 18 - TUSB_PD_CTRL_FR_SWAP, // 0b10011: 19 - TUSB_PD_CTRL_GET_PPS_STATUS, // 0b10100: 20 - TUSB_PD_CTRL_GET_COUNTRY_CODES, // 0b10101: 21 - TUSB_PD_CTRL_GET_SINK_CAP_EXTENDED, // 0b10110: 22 - TUSB_PD_CTRL_GET_SOURCE_INFO, // 0b10111: 23 - TUSB_PD_CTRL_REVISION, // 0b11000: 24 -} tusb_pd_ctrl_type_t; - -typedef enum { - TUSB_PD_DATA_RESERVED = 0, // 0b00000: 0 - TUSB_PD_DATA_SOURCE_CAP, // 0b00001: 1 - TUSB_PD_DATA_REQUEST, // 0b00010: 2 - TUSB_PD_DATA_BIST, // 0b00011: 3 - TUSB_PD_DATA_SINK_CAP, // 0b00100: 4 - TUSB_PD_DATA_BATTERY_STATUS, // 0b00101: 5 - TUSB_PD_DATA_ALERT, // 0b00110: 6 - TUSB_PD_DATA_GET_COUNTRY_INFO, // 0b00111: 7 - TUSB_PD_DATA_ENTER_USB, // 0b01000: 8 - TUSB_PD_DATA_EPR_REQUEST, // 0b01001: 9 - TUSB_PD_DATA_EPR_MODE, // 0b01010: 10 - TUSB_PD_DATA_SRC_INFO, // 0b01011: 11 - TUSB_PD_DATA_REVISION, // 0b01100: 12 - TUSB_PD_DATA_RESERVED_13, // 0b01101: 13 - TUSB_PD_DATA_RESERVED_14, // 0b01110: 14 - TUSB_PD_DATA_VENDOR_DEFINED, // 0b01111: 15 -} tusb_pd_data_type_t; - -enum { - TUSB_PD_REV10 = 0x0, - TUSB_PD_REV20 = 0x1, - TUSB_PD_REV30 = 0x2, -}; - -enum { - TUSB_PD_DATA_ROLE_UFP = 0x0, - TUSB_PD_DATA_ROLE_DFP = 0x1, -}; - -enum { - TUSB_PD_POWER_ROLE_SINK = 0x0, - TUSB_PD_POWER_ROLE_SOURCE = 0x1, -}; - -typedef struct TU_ATTR_PACKED { - uint16_t msg_type : 5; // [0:4] - uint16_t data_role : 1; // [5] SOP only: 0 UFP, 1 DFP - uint16_t specs_rev : 2; // [6:7] - uint16_t power_role : 1; // [8] SOP only: 0 Sink, 1 Source - uint16_t msg_id : 3; // [9:11] - uint16_t n_data_obj : 3; // [12:14] - uint16_t extended : 1; // [15] -} tusb_pd_header_t; - -TU_VERIFY_STATIC( sizeof(tusb_pd_header_t) == 2, "size is not correct"); - -typedef struct TU_ATTR_PACKED { - uint16_t data_size : 9; // [0:8] - uint16_t reserved : 1; // [9] - uint16_t request_chunk : 1; // [10] - uint16_t chunk_number : 4; // [11:14] - uint16_t chunked : 1; // [15] -} tusb_pd_header_extended_t; - -TU_VERIFY_STATIC( sizeof(tusb_pd_header_extended_t) == 2, "size is not correct"); - TU_ATTR_PACKED_END // End of all packed definitions TU_ATTR_BIT_FIELD_ORDER_END diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c index 9b3b21707..b09dc5bae 100644 --- a/src/portable/st/typec/typec_stm32.c +++ b/src/portable/st/typec/typec_stm32.c @@ -67,10 +67,10 @@ static uint8_t const* _tx_pending_buf; static uint16_t _tx_pending_bytes; static uint16_t _tx_xferring_bytes; -static tusb_pd_header_t _good_crc = { - .msg_type = TUSB_PD_CTRL_GOOD_CRC, +static pd_header_t _good_crc = { + .msg_type = PD_CTRL_GOOD_CRC, .data_role = 0, // UFP - .specs_rev = TUSB_PD_REV20, + .specs_rev = PD_REV_20, .power_role = 0, // Sink .msg_id = 0, .n_data_obj = 0, @@ -149,7 +149,6 @@ TU_ATTR_ALWAYS_INLINE static inline bool dma_enabled(uint8_t rhport, bool is_rx) return dma_ch->CCR & DMA_CCR_EN; } - TU_ATTR_ALWAYS_INLINE static inline void dma_tx_start(uint8_t rhport, void const* buf, uint16_t len) { UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP; UCPD1->TX_PAYSZ = len; @@ -165,7 +164,7 @@ TU_ATTR_ALWAYS_INLINE static inline void dma_tx_stop(uint8_t rhport) { // //--------------------------------------------------------------------+ -bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) { +bool tcd_init(uint8_t rhport, uint32_t port_type) { (void) rhport; // Init DMA for RX, TX @@ -211,7 +210,7 @@ void tcd_int_disable(uint8_t rhport) { NVIC_DisableIRQ(UCPD1_IRQn); } -bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) { +bool tcd_msg_receive(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) { _rx_buf = buffer; dma_start(rhport, true, buffer, total_bytes); return true; @@ -309,7 +308,7 @@ void tcd_int_handler(uint8_t rhport) { if (!(sr & UCPD_SR_RXERR)) { // response with good crc - _good_crc.msg_id = ((tusb_pd_header_t const*) _rx_buf)->msg_id; + _good_crc.msg_id = ((pd_header_t const*) _rx_buf)->msg_id; dma_tx_start(rhport, &_good_crc, 2); result = XFER_RESULT_SUCCESS; diff --git a/src/typec/pd_types.h b/src/typec/pd_types.h new file mode 100644 index 000000000..1b2968f65 --- /dev/null +++ b/src/typec/pd_types.h @@ -0,0 +1,237 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _TUSB_PD_TYPES_H_ +#define _TUSB_PD_TYPES_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include "common/tusb_compiler.h" + +// Start of all packed definitions for compiler without per-type packed +TU_ATTR_PACKED_BEGIN +TU_ATTR_BIT_FIELD_ORDER_BEGIN + +//--------------------------------------------------------------------+ +// TYPE-C +//--------------------------------------------------------------------+ + +typedef enum { + TUSB_TYPEC_PORT_SRC, + TUSB_TYPEC_PORT_SNK, + TUSB_TYPEC_PORT_DRP +} tusb_typec_port_type_t; + +enum { + PD_CTRL_RESERVED = 0, // 0b00000: 0 + PD_CTRL_GOOD_CRC, // 0b00001: 1 + PD_CTRL_GO_TO_MIN, // 0b00010: 2 + PD_CTRL_ACCEPT, // 0b00011: 3 + PD_CTRL_REJECT, // 0b00100: 4 + PD_CTRL_PING, // 0b00101: 5 + PD_CTRL_PS_READY, // 0b00110: 6 + PD_CTRL_GET_SOURCE_CAP, // 0b00111: 7 + PD_CTRL_GET_SINK_CAP, // 0b01000: 8 + PD_CTRL_DR_SWAP, // 0b01001: 9 + PD_CTRL_PR_SWAP, // 0b01010: 10 + PD_CTRL_VCONN_SWAP, // 0b01011: 11 + PD_CTRL_WAIT, // 0b01100: 12 + PD_CTRL_SOFT_RESET, // 0b01101: 13 + PD_CTRL_DATA_RESET, // 0b01110: 14 + PD_CTRL_DATA_RESET_COMPLETE, // 0b01111: 15 + PD_CTRL_NOT_SUPPORTED, // 0b10000: 16 + PD_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17 + PD_CTRL_GET_STATUS, // 0b10010: 18 + PD_CTRL_FR_SWAP, // 0b10011: 19 + PD_CTRL_GET_PPS_STATUS, // 0b10100: 20 + PD_CTRL_GET_COUNTRY_CODES, // 0b10101: 21 + PD_CTRL_GET_SINK_CAP_EXTENDED, // 0b10110: 22 + PD_CTRL_GET_SOURCE_INFO, // 0b10111: 23 + PD_CTRL_REVISION, // 0b11000: 24 +}; + +enum { + PD_DATA_RESERVED = 0, // 0b00000: 0 + PD_DATA_SOURCE_CAP, // 0b00001: 1 + PD_DATA_REQUEST, // 0b00010: 2 + PD_DATA_BIST, // 0b00011: 3 + PD_DATA_SINK_CAP, // 0b00100: 4 + PD_DATA_BATTERY_STATUS, // 0b00101: 5 + PD_DATA_ALERT, // 0b00110: 6 + PD_DATA_GET_COUNTRY_INFO, // 0b00111: 7 + PD_DATA_ENTER_USB, // 0b01000: 8 + PD_DATA_EPR_REQUEST, // 0b01001: 9 + PD_DATA_EPR_MODE, // 0b01010: 10 + PD_DATA_SRC_INFO, // 0b01011: 11 + PD_DATA_REVISION, // 0b01100: 12 + PD_DATA_RESERVED_13, // 0b01101: 13 + PD_DATA_RESERVED_14, // 0b01110: 14 + PD_DATA_VENDOR_DEFINED, // 0b01111: 15 +}; + +enum { + PD_REV_10 = 0x0, + PD_REV_20 = 0x1, + PD_REV_30 = 0x2, +}; + +enum { + PD_DATA_ROLE_UFP = 0x0, + PD_DATA_ROLE_DFP = 0x1, +}; + +enum { + PD_POWER_ROLE_SINK = 0x0, + PD_POWER_ROLE_SOURCE = 0x1, +}; + +typedef struct TU_ATTR_PACKED { + uint16_t msg_type : 5; // [0:4] + uint16_t data_role : 1; // [5] SOP only: 0 UFP, 1 DFP + uint16_t specs_rev : 2; // [6:7] + uint16_t power_role : 1; // [8] SOP only: 0 Sink, 1 Source + uint16_t msg_id : 3; // [9:11] + uint16_t n_data_obj : 3; // [12:14] + uint16_t extended : 1; // [15] +} pd_header_t; +TU_VERIFY_STATIC(sizeof(pd_header_t) == 2, "size is not correct"); + +typedef struct TU_ATTR_PACKED { + uint16_t data_size : 9; // [0:8] + uint16_t reserved : 1; // [9] + uint16_t request_chunk : 1; // [10] + uint16_t chunk_number : 4; // [11:14] + uint16_t chunked : 1; // [15] +} pd_header_extended_t; +TU_VERIFY_STATIC(sizeof(pd_header_extended_t) == 2, "size is not correct"); + +//--------------------------------------------------------------------+ +// Source Capability +//--------------------------------------------------------------------+ + +// All table references are from USBPD Specification rev3.1 version 1.8 +enum { + PD_PDO_TYPE_FIXED = 0, // Vmin = Vmax + PD_PDO_TYPE_BATTERY, + PD_PDO_TYPE_VARIABLE, // non-battery + PD_PDO_TYPE_APDO, // Augmented Power Data Object +}; + +// Fixed Power Data Object (PDO) table 6-9 +typedef struct TU_ATTR_PACKED { + uint32_t current_max_10ma : 10; // [9..0] Max current in 10mA unit + uint32_t voltage_50mv : 10; // [19..10] Voltage in 50mV unit + uint32_t current_peak : 2; // [21..20] Peak current + uint32_t reserved : 1; // [22] Reserved + uint32_t epr_mode_capable : 1; // [23] epr_mode_capable + uint32_t unchunked_ext_msg_support : 1; // [24] UnChunked Extended Message Supported + uint32_t dual_role_data : 1; // [25] Dual Role Data + uint32_t usb_comm_capable : 1; // [26] USB Communications Capable + uint32_t unconstrained_power : 1; // [27] Unconstrained Power + uint32_t usb_suspend_supported : 1; // [28] USB Suspend Supported + uint32_t dual_role_power : 1; // [29] Dual Role Power + uint32_t type : 2; // [30] Fixed Supply type = PD_PDO_TYPE_FIXED +} pd_pdo_fixed_t; +TU_VERIFY_STATIC(sizeof(pd_pdo_fixed_t) == 4, "Invalid size"); + +// Battery Power Data Object (PDO) table 6-12 +typedef struct TU_ATTR_PACKED { + uint32_t power_max_250mw : 10; // [9..0] Max allowable power in 250mW unit + uint32_t voltage_min_50mv : 10; // [19..10] Minimum voltage in 50mV unit + uint32_t voltage_max_50mv : 10; // [29..20] Maximum voltage in 50mV unit + uint32_t type : 2; // [31..30] Battery type = PD_PDO_TYPE_BATTERY +} pd_pdo_battery_t; +TU_VERIFY_STATIC(sizeof(pd_pdo_battery_t) == 4, "Invalid size"); + +// Variable Power Data Object (PDO) table 6-11 +typedef struct TU_ATTR_PACKED { + uint32_t current_max_10ma : 10; // [9..0] Max current in 10mA unit + uint32_t voltage_min_50mv : 10; // [19..10] Minimum voltage in 50mV unit + uint32_t voltage_max_50mv : 10; // [29..20] Maximum voltage in 50mV unit + uint32_t type : 2; // [31..30] Variable Supply type = PD_PDO_TYPE_VARIABLE +} pd_pdo_variable_t; +TU_VERIFY_STATIC(sizeof(pd_pdo_variable_t) == 4, "Invalid size"); + +// Augmented Power Data Object (PDO) table 6-13 +typedef struct TU_ATTR_PACKED { + uint32_t current_max_50ma : 7; // [6..0] Max current in 50mA unit + uint32_t reserved1 : 1; // [7] Reserved + uint32_t voltage_min_100mv : 8; // [15..8] Minimum Voltage in 100mV unit + uint32_t reserved2 : 1; // [16] Reserved + uint32_t voltage_max_100mv : 8; // [24..17] Maximum Voltage in 100mV unit + uint32_t reserved3 : 2; // [26..25] Reserved + uint32_t pps_power_limited : 1; // [27] PPS Power Limited + uint32_t spr_programmable : 2; // [29..28] SPR Programmable Power Supply + uint32_t type : 2; // [31..30] Augmented Power Data Object = PD_PDO_TYPE_APDO +} pd_pdo_apdo_t; +TU_VERIFY_STATIC(sizeof(pd_pdo_apdo_t) == 4, "Invalid size"); + +//--------------------------------------------------------------------+ +// Request +//--------------------------------------------------------------------+ + +typedef struct TU_ATTR_PACKED { + uint32_t current_extremum_10ma : 10; // [9..0] Max (give back = 0) or Min (give back = 1) current in 10mA unit + uint32_t current_operate_10ma : 10; // [19..10] Operating current in 10mA unit + uint32_t reserved : 2; // [21..20] Reserved + uint32_t epr_mode_capable : 1; // [22] EPR mode capable + uint32_t unchunked_ext_msg_support : 1; // [23] UnChunked Extended Message Supported + uint32_t no_usb_suspend : 1; // [24] No USB Suspend + uint32_t usb_comm_capable : 1; // [25] USB Communications Capable + uint32_t capability_mismatch : 1; // [26] Capability Mismatch + uint32_t give_back_flag : 1; // [27] GiveBack Flag: 0 = Max, 1 = Min + uint32_t object_position : 4; // [31..28] Object Position +} pd_rdo_fixed_variable_t; +TU_VERIFY_STATIC(sizeof(pd_rdo_fixed_variable_t) == 4, "Invalid size"); + +typedef struct TU_ATTR_PACKED { + uint32_t power_extremum_250mw : 10; // [9..0] Max (give back = 0) or Min (give back = 1) operating power in 250mW unit + uint32_t power_operate_250mw : 10; // [19..10] Operating power in 250mW unit + uint32_t reserved : 2; // [21..20] Reserved + uint32_t epr_mode_capable : 1; // [22] EPR mode capable + uint32_t unchunked_ext_msg_support : 1; // [23] UnChunked Extended Message Supported + uint32_t no_usb_suspend : 1; // [24] No USB Suspend + uint32_t usb_comm_capable : 1; // [25] USB Communications Capable + uint32_t capability_mismatch : 1; // [26] Capability Mismatch + uint32_t give_back_flag : 1; // [27] GiveBack Flag: 0 = Max, 1 = Min + uint32_t object_position : 4; // [31..28] Object Position +} pd_rdo_battery_t; +TU_VERIFY_STATIC(sizeof(pd_rdo_battery_t) == 4, "Invalid size"); + + +TU_ATTR_PACKED_END // End of all packed definitions +TU_ATTR_BIT_FIELD_ORDER_END + + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/src/typec/tcd.h b/src/typec/tcd.h index b131d6ba9..ee73943bd 100644 --- a/src/typec/tcd.h +++ b/src/typec/tcd.h @@ -28,6 +28,8 @@ #define _TUSB_TCD_H_ #include "common/tusb_common.h" +#include "pd_types.h" + #include "osal/osal.h" #include "common/tusb_fifo.h" @@ -69,7 +71,7 @@ typedef struct { //--------------------------------------------------------------------+ // Initialize controller -bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type); +bool tcd_init(uint8_t rhport, uint32_t port_type); // Enable interrupt void tcd_int_enable (uint8_t rhport); @@ -84,7 +86,7 @@ void tcd_int_handler(uint8_t rhport); // //--------------------------------------------------------------------+ -bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes); +bool tcd_msg_receive(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes); bool tcd_msg_send(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes); //--------------------------------------------------------------------+ @@ -135,4 +137,8 @@ void tcd_event_tx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t resul tcd_event_handler(&event, in_isr); } +#ifdef __cplusplus +} +#endif + #endif diff --git a/src/typec/utcd.c b/src/typec/utcd.c index 09031e5c9..439fe89b9 100644 --- a/src/typec/utcd.c +++ b/src/typec/utcd.c @@ -62,7 +62,7 @@ bool tuc_inited(uint8_t rhport) { return _utcd_inited && _port_inited[rhport]; } -bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) { +bool tuc_init(uint8_t rhport, uint32_t port_type) { // Initialize stack if (!_utcd_inited) { tu_memclr(_port_inited, sizeof(_port_inited)); @@ -91,38 +91,38 @@ bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) { // //--------------------------------------------------------------------+ -bool utcd_msg_send(uint8_t rhport, tusb_pd_header_t const* header, void const* data) { +bool utcd_msg_send(uint8_t rhport, pd_header_t const* header, void const* data) { // copy header - memcpy(_tx_buf, header, sizeof(tusb_pd_header_t)); + memcpy(_tx_buf, header, sizeof(pd_header_t)); // copy data objcet if available uint16_t const n_data_obj = header->n_data_obj; if (n_data_obj > 0) { - memcpy(_tx_buf + sizeof(tusb_pd_header_t), data, n_data_obj * 4); + memcpy(_tx_buf + sizeof(pd_header_t), data, n_data_obj * 4); } - return tcd_msg_send(rhport, _tx_buf, sizeof(tusb_pd_header_t) + n_data_obj * 4); + return tcd_msg_send(rhport, _tx_buf, sizeof(pd_header_t) + n_data_obj * 4); } bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) { (void) rhport; uint8_t const* p_end = buf + len; - tusb_pd_header_t const* header = (tusb_pd_header_t const*) buf; - uint8_t const * ptr = buf + sizeof(tusb_pd_header_t); + pd_header_t const* header = (pd_header_t const*) buf; + uint8_t const * ptr = buf + sizeof(pd_header_t); if (header->n_data_obj == 0) { // control message switch (header->msg_type) { - case TUSB_PD_CTRL_GOOD_CRC: + case PD_CTRL_GOOD_CRC: break; - case TUSB_PD_CTRL_ACCEPT: + case PD_CTRL_ACCEPT: break; - case TUSB_PD_CTRL_REJECT: + case PD_CTRL_REJECT: break; - case TUSB_PD_CTRL_PS_RDY: + case PD_CTRL_PS_READY: break; default: break; @@ -130,7 +130,7 @@ bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) { } else { // data message switch (header->msg_type) { - case TUSB_PD_DATA_SOURCE_CAP: { + case PD_DATA_SOURCE_CAP: { // Examine source capability and select a suitable PDO (starting from 1 with safe5v) uint8_t obj_pos = 1; @@ -172,11 +172,11 @@ bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) { .object_position = obj_pos, }; - tusb_pd_header_t const req_header = { - .msg_type = TUSB_PD_DATA_REQUEST, - .data_role = TUSB_PD_DATA_ROLE_UFP, - .specs_rev = TUSB_PD_REV20, - .power_role = TUSB_PD_POWER_ROLE_SINK, + pd_header_t const req_header = { + .msg_type = PD_DATA_REQUEST, + .data_role = PD_DATA_ROLE_UFP, + .specs_rev = PD_REV_20, + .power_role = PD_POWER_ROLE_SINK, .msg_id = 0, .n_data_obj = 1, .extended = 0, @@ -200,7 +200,7 @@ void tcd_event_handler(tcd_event_t const * event, bool in_isr) { case TCD_EVENT_CC_CHANGED: if (event->cc_changed.cc_state[0] || event->cc_changed.cc_state[1]) { // Attach - tcd_rx_start(event->rhport, _rx_buf, sizeof(_rx_buf)); + tcd_msg_receive(event->rhport, _rx_buf, sizeof(_rx_buf)); }else { // Detach } @@ -213,7 +213,7 @@ void tcd_event_handler(tcd_event_t const * event, bool in_isr) { } // start new rx - tcd_rx_start(event->rhport, _rx_buf, sizeof(_rx_buf)); + tcd_msg_receive(event->rhport, _rx_buf, sizeof(_rx_buf)); break; default: break; diff --git a/src/typec/utcd.h b/src/typec/utcd.h index bb1523253..740e477ac 100644 --- a/src/typec/utcd.h +++ b/src/typec/utcd.h @@ -28,6 +28,7 @@ #define _TUSB_UTCD_H_ #include "common/tusb_common.h" +#include "pd_types.h" #ifdef __cplusplus extern "C" { @@ -41,105 +42,12 @@ extern "C" { #define CFG_TUC_TASK_QUEUE_SZ 8 #endif -//--------------------------------------------------------------------+ -// Source Capability -//--------------------------------------------------------------------+ - -// All table references are from USBPD Specification rev3.1 version 1.8 -enum { - PD_PDO_TYPE_FIXED = 0, // Vmin = Vmax - PD_PDO_TYPE_BATTERY, - PD_PDO_TYPE_VARIABLE, // non-battery - PD_PDO_TYPE_APDO, // Augmented Power Data Object -}; - -// Fixed Power Data Object (PDO) table 6-9 -typedef struct TU_ATTR_PACKED { - uint32_t current_max_10ma : 10; // [9..0] Max current in 10mA unit - uint32_t voltage_50mv : 10; // [19..10] Voltage in 50mV unit - uint32_t current_peak : 2; // [21..20] Peak current - uint32_t reserved : 1; // [22] Reserved - uint32_t epr_mode_capable : 1; // [23] epr_mode_capable - uint32_t unchunked_ext_msg_support : 1; // [24] UnChunked Extended Message Supported - uint32_t dual_role_data : 1; // [25] Dual Role Data - uint32_t usb_comm_capable : 1; // [26] USB Communications Capable - uint32_t unconstrained_power : 1; // [27] Unconstrained Power - uint32_t usb_suspend_supported : 1; // [28] USB Suspend Supported - uint32_t dual_role_power : 1; // [29] Dual Role Power - uint32_t type : 2; // [30] Fixed Supply type = PD_PDO_TYPE_FIXED -} pd_pdo_fixed_t; -TU_VERIFY_STATIC(sizeof(pd_pdo_fixed_t) == 4, "Invalid size"); - -// Battery Power Data Object (PDO) table 6-12 -typedef struct TU_ATTR_PACKED { - uint32_t power_max_250mw : 10; // [9..0] Max allowable power in 250mW unit - uint32_t voltage_min_50mv : 10; // [19..10] Minimum voltage in 50mV unit - uint32_t voltage_max_50mv : 10; // [29..20] Maximum voltage in 50mV unit - uint32_t type : 2; // [31..30] Battery type = PD_PDO_TYPE_BATTERY -} pd_pdo_battery_t; -TU_VERIFY_STATIC(sizeof(pd_pdo_battery_t) == 4, "Invalid size"); - -// Variable Power Data Object (PDO) table 6-11 -typedef struct TU_ATTR_PACKED { - uint32_t current_max_10ma : 10; // [9..0] Max current in 10mA unit - uint32_t voltage_min_50mv : 10; // [19..10] Minimum voltage in 50mV unit - uint32_t voltage_max_50mv : 10; // [29..20] Maximum voltage in 50mV unit - uint32_t type : 2; // [31..30] Variable Supply type = PD_PDO_TYPE_VARIABLE -} pd_pdo_variable_t; -TU_VERIFY_STATIC(sizeof(pd_pdo_variable_t) == 4, "Invalid size"); - -// Augmented Power Data Object (PDO) table 6-13 -typedef struct TU_ATTR_PACKED { - uint32_t current_max_50ma : 7; // [6..0] Max current in 50mA unit - uint32_t reserved1 : 1; // [7] Reserved - uint32_t voltage_min_100mv : 8; // [15..8] Minimum Voltage in 100mV unit - uint32_t reserved2 : 1; // [16] Reserved - uint32_t voltage_max_100mv : 8; // [24..17] Maximum Voltage in 100mV unit - uint32_t reserved3 : 2; // [26..25] Reserved - uint32_t pps_power_limited : 1; // [27] PPS Power Limited - uint32_t spr_programmable : 2; // [29..28] SPR Programmable Power Supply - uint32_t type : 2; // [31..30] Augmented Power Data Object = PD_PDO_TYPE_APDO -} pd_pdo_apdo_t; -TU_VERIFY_STATIC(sizeof(pd_pdo_apdo_t) == 4, "Invalid size"); - -//--------------------------------------------------------------------+ -// Request -//--------------------------------------------------------------------+ - -typedef struct TU_ATTR_PACKED { - uint32_t current_extremum_10ma : 10; // [9..0] Max (give back = 0) or Min (give back = 1) current in 10mA unit - uint32_t current_operate_10ma : 10; // [19..10] Operating current in 10mA unit - uint32_t reserved : 2; // [21..20] Reserved - uint32_t epr_mode_capable : 1; // [22] EPR mode capable - uint32_t unchunked_ext_msg_support : 1; // [23] UnChunked Extended Message Supported - uint32_t no_usb_suspend : 1; // [24] No USB Suspend - uint32_t usb_comm_capable : 1; // [25] USB Communications Capable - uint32_t capability_mismatch : 1; // [26] Capability Mismatch - uint32_t give_back_flag : 1; // [27] GiveBack Flag: 0 = Max, 1 = Min - uint32_t object_position : 4; // [31..28] Object Position -} pd_rdo_fixed_variable_t; -TU_VERIFY_STATIC(sizeof(pd_rdo_fixed_variable_t) == 4, "Invalid size"); - -typedef struct TU_ATTR_PACKED { - uint32_t power_extremum_250mw : 10; // [9..0] Max (give back = 0) or Min (give back = 1) operating power in 250mW unit - uint32_t power_operate_250mw : 10; // [19..10] Operating power in 250mW unit - uint32_t reserved : 2; // [21..20] Reserved - uint32_t epr_mode_capable : 1; // [22] EPR mode capable - uint32_t unchunked_ext_msg_support : 1; // [23] UnChunked Extended Message Supported - uint32_t no_usb_suspend : 1; // [24] No USB Suspend - uint32_t usb_comm_capable : 1; // [25] USB Communications Capable - uint32_t capability_mismatch : 1; // [26] Capability Mismatch - uint32_t give_back_flag : 1; // [27] GiveBack Flag: 0 = Max, 1 = Min - uint32_t object_position : 4; // [31..28] Object Position -} pd_rdo_battery_t; -TU_VERIFY_STATIC(sizeof(pd_rdo_battery_t) == 4, "Invalid size"); - //--------------------------------------------------------------------+ // Application API //--------------------------------------------------------------------+ // Init typec stack on a port -bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type); +bool tuc_init(uint8_t rhport, uint32_t port_type); // Check if typec port is initialized bool tuc_inited(uint8_t rhport); @@ -155,4 +63,9 @@ extern void tcd_int_handler(uint8_t rhport); // //--------------------------------------------------------------------+ + +#ifdef __cplusplus +} +#endif + #endif -- cgit v1.3.1 From d70403f1f496f5853251f83392ffe80130255489 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 15 Jun 2023 13:06:27 +0700 Subject: refactor khci to chipidea fs driver for device (host is not yet) --- .idea/cmake.xml | 3 +- .idea/runConfigurations/mcx947_jlink.xml | 2 +- .idea/runConfigurations/rt1010_jlink.xml | 2 +- .idea/runConfigurations/rt1060_jlink.xml | 2 +- hw/bsp/kinetis_kl/family.cmake | 2 +- hw/bsp/mcx/boards/mcxn947brk/board.cmake | 8 +- hw/bsp/mcx/family.c | 27 +- hw/bsp/mcx/family.cmake | 4 +- hw/bsp/mcx/family.mk | 17 +- src/common/tusb_mcu.h | 6 +- src/portable/chipidea/ci_fs/ci_fs_kinetis.h | 51 +++ src/portable/chipidea/ci_fs/ci_fs_mcx.h | 47 +++ src/portable/chipidea/ci_fs/ci_fs_type.h | 118 ++++++ src/portable/chipidea/ci_fs/dcd_ci_fs.c | 555 ++++++++++++++++++++++++++++ 14 files changed, 804 insertions(+), 40 deletions(-) create mode 100644 src/portable/chipidea/ci_fs/ci_fs_kinetis.h create mode 100644 src/portable/chipidea/ci_fs/ci_fs_mcx.h create mode 100644 src/portable/chipidea/ci_fs/ci_fs_type.h create mode 100644 src/portable/chipidea/ci_fs/dcd_ci_fs.c (limited to 'src/common') diff --git a/.idea/cmake.xml b/.idea/cmake.xml index 3c016ccff..c9024715c 100644 --- a/.idea/cmake.xml +++ b/.idea/cmake.xml @@ -2,7 +2,7 @@ - + @@ -37,6 +37,7 @@ + \ No newline at end of file diff --git a/.idea/runConfigurations/mcx947_jlink.xml b/.idea/runConfigurations/mcx947_jlink.xml index 71616ab70..27661bec5 100644 --- a/.idea/runConfigurations/mcx947_jlink.xml +++ b/.idea/runConfigurations/mcx947_jlink.xml @@ -1,5 +1,5 @@ - + diff --git a/.idea/runConfigurations/rt1010_jlink.xml b/.idea/runConfigurations/rt1010_jlink.xml index e660a46ae..68ebb8885 100644 --- a/.idea/runConfigurations/rt1010_jlink.xml +++ b/.idea/runConfigurations/rt1010_jlink.xml @@ -1,5 +1,5 @@ - + diff --git a/.idea/runConfigurations/rt1060_jlink.xml b/.idea/runConfigurations/rt1060_jlink.xml index b9a47a2ce..014a4d1b1 100644 --- a/.idea/runConfigurations/rt1060_jlink.xml +++ b/.idea/runConfigurations/rt1060_jlink.xml @@ -1,5 +1,5 @@ - + diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake index 77b932b8e..f491b3dee 100644 --- a/hw/bsp/kinetis_kl/family.cmake +++ b/hw/bsp/kinetis_kl/family.cmake @@ -88,7 +88,7 @@ function(family_configure_example TARGET) # These files are built for each example since it depends on example's tusb_config.h target_sources(${TARGET} PUBLIC # TinyUSB Port - ${TOP}/src/portable/nxp/khci/dcd_khci.c + ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c ${TOP}/src/portable/nxp/khci/hcd_khci.c # BSP ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.cmake b/hw/bsp/mcx/boards/mcxn947brk/board.cmake index 650f10967..8c3280743 100644 --- a/hw/bsp/mcx/boards/mcxn947brk/board.cmake +++ b/hw/bsp/mcx/boards/mcxn947brk/board.cmake @@ -5,12 +5,14 @@ set(JLINK_DEVICE MCXN947_M33_0) set(PYOCD_TARGET MCXN947) set(NXPLINK_DEVICE MCXN947:MCXN947) +set(PORT 1) + function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC CPU_MCXN947VDF_cm33_core0 - # port 1 is highspeed - BOARD_TUD_RHPORT=1 - BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED + BOARD_TUD_RHPORT=${PORT} + # port 0 is fullspeed, port 1 is highspeed + BOARD_TUD_MAX_SPEED=$ ) target_sources(${TARGET} PUBLIC ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c diff --git a/hw/bsp/mcx/family.c b/hw/bsp/mcx/family.c index 36d2f2d0a..4344ffc4e 100644 --- a/hw/bsp/mcx/family.c +++ b/hw/bsp/mcx/family.c @@ -66,6 +66,7 @@ void board_init(void) { BOARD_InitPins(); BOARD_InitBootClocks(); + CLOCK_SetupExtClocking(XTAL0_CLK_HZ); // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); @@ -122,31 +123,13 @@ void board_init(void) // USB VBUS /* PORT0 PIN22 configured as USB0_VBUS */ - CLOCK_SetupExtClocking(XTAL0_CLK_HZ); - #if PORT_SUPPORT_DEVICE(0) // Port0 is Full Speed - /* Turn on USB0 Phy */ - POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); - - /* reset the IP to make sure it's in reset state. */ - RESET_PeripheralReset(kUSB0D_RST_SHIFT_RSTn); - RESET_PeripheralReset(kUSB0HSL_RST_SHIFT_RSTn); - RESET_PeripheralReset(kUSB0HMR_RST_SHIFT_RSTn); - - // Enable USB Clock Adjustments to trim the FRO for the full speed controller - ANACTRL->FRO192M_CTRL |= ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK; - CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false); - CLOCK_AttachClk(kFRO_HF_to_USB0_CLK); - - /*According to reference manual, device mode setting has to be set by access usb host register */ - CLOCK_EnableClock(kCLOCK_Usbhsl0); // enable usb0 host clock - USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK; - CLOCK_DisableClock(kCLOCK_Usbhsl0); // disable usb0 host clock - - /* enable USB Device clock */ - CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); + CLOCK_AttachClk(kCLK_48M_to_USB0); + CLOCK_EnableClock(kCLOCK_Usb0Ram); + CLOCK_EnableClock(kCLOCK_Usb0Fs); + CLOCK_EnableUsbfsClock(); #endif #if PORT_SUPPORT_DEVICE(1) diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake index 1c85b51f8..7c5feaecf 100644 --- a/hw/bsp/mcx/family.cmake +++ b/hw/bsp/mcx/family.cmake @@ -88,8 +88,8 @@ function(family_configure_example TARGET) #---------- Port Specific ---------- # These files are built for each example since it depends on example's tusb_config.h target_sources(${TARGET} PUBLIC - # TinyUSB Port - ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c + # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS + ${TOP}/src/portable/chipidea/$ # BSP ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c diff --git a/hw/bsp/mcx/family.mk b/hw/bsp/mcx/family.mk index 2cd4c2448..2722c2038 100644 --- a/hw/bsp/mcx/family.mk +++ b/hw/bsp/mcx/family.mk @@ -16,21 +16,24 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_MCXN9 \ -DBOARD_TUD_RHPORT=$(PORT) \ +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration + +# All source paths should be relative to the top level. +LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld + +# TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS ifeq ($(PORT), 1) $(info "PORT1 High Speed") CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED + SRC_C += src/portable/chipidea/ci_hs/dcd_ci_hs.c else $(info "PORT0 Full Speed") + CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED + SRC_C += src/portable/chipidea/ci_fs/dcd_ci_fs.c endif -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration - -# All source paths should be relative to the top level. -LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld - SRC_C += \ - src/portable/chipidea/ci_hs/dcd_ci_hs.c \ $(SDK_DIR)/devices/$(MCU_VARIANT)/system_$(MCU_CORE).c \ $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \ $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \ diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index f89467e75..485d6168d 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -79,7 +79,11 @@ #define TUP_RHPORT_HIGHSPEED 1 #elif TU_CHECK_MCU(OPT_MCU_MCXN9) - // NOTE: MCXN943 port 1 use chipidea HS, port 0 use chipidea FS + // USB0 is chipidea FS + #define TUP_USBIP_CHIPIDEA_FS + #define TUP_USBIP_CHIPIDEA_FS_MCX + + // USB1 is chipidea HS #define TUP_USBIP_CHIPIDEA_HS #define TUP_USBIP_EHCI diff --git a/src/portable/chipidea/ci_fs/ci_fs_kinetis.h b/src/portable/chipidea/ci_fs/ci_fs_kinetis.h new file mode 100644 index 000000000..cd21af1c7 --- /dev/null +++ b/src/portable/chipidea/ci_fs/ci_fs_kinetis.h @@ -0,0 +1,51 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _CI_FS_KINETIS_H +#define _CI_FS_KINETIS_H + +#include "fsl_device_registers.h" + +//static const ci_fs_controller_t _ci_controller[] = { +// {.reg_base = USB0_BASE, .irqnum = USB0_IRQn} +//}; + +#define CI_FS_REG(_port) ((ci_fs_regs_t*) USB0_BASE) +#define CI_REG CI_FS_REG(0) + +void dcd_int_enable(uint8_t rhport) +{ + (void) rhport; + NVIC_EnableIRQ(USB0_IRQn); +} + +void dcd_int_disable(uint8_t rhport) +{ + (void) rhport; + NVIC_DisableIRQ(USB0_IRQn); +} + +#endif diff --git a/src/portable/chipidea/ci_fs/ci_fs_mcx.h b/src/portable/chipidea/ci_fs/ci_fs_mcx.h new file mode 100644 index 000000000..3bfcd398e --- /dev/null +++ b/src/portable/chipidea/ci_fs/ci_fs_mcx.h @@ -0,0 +1,47 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _CI_FS_MCX_H +#define _CI_FS_MCX_H + +#include "fsl_device_registers.h" + +#define CI_FS_REG(_port) ((ci_fs_regs_t*) USBFS0_BASE) +#define CI_REG CI_FS_REG(0) + +void dcd_int_enable(uint8_t rhport) +{ + (void) rhport; + NVIC_EnableIRQ(USB0_FS_IRQn); +} + +void dcd_int_disable(uint8_t rhport) +{ + (void) rhport; + NVIC_DisableIRQ(USB0_FS_IRQn); +} + +#endif diff --git a/src/portable/chipidea/ci_fs/ci_fs_type.h b/src/portable/chipidea/ci_fs/ci_fs_type.h new file mode 100644 index 000000000..5a5e53fb0 --- /dev/null +++ b/src/portable/chipidea/ci_fs/ci_fs_type.h @@ -0,0 +1,118 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _CI_FS_TYPE_H +#define _CI_FS_TYPE_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +// Note: some MCUs can only access these registers in 8-bit mode +// align 4 is used to get rid of reserved fields +#define _va32 volatile TU_ATTR_ALIGNED(4) + +typedef struct { + _va32 uint8_t PER_ID; // [00] Peripheral ID register + _va32 uint8_t ID_COMP; // [04] Peripheral ID complement register + _va32 uint8_t REV; // [08] Peripheral revision register + _va32 uint8_t ADD_INFO; // [0C] Peripheral additional info register + _va32 uint8_t OTG_ISTAT; // [10] OTG Interrupt Status Register + _va32 uint8_t OTG_ICTRL; // [14] OTG Interrupt Control Register + _va32 uint8_t OTG_STAT; // [18] OTG Status Register + _va32 uint8_t OTG_CTRL; // [1C] OTG Control register + uint32_t reserved_20[24]; // [20] + _va32 uint8_t INT_STAT; // [80] Interrupt status register + _va32 uint8_t INT_EN; // [84] Interrupt enable register + _va32 uint8_t ERR_STAT; // [88] Error interrupt status register + _va32 uint8_t ERR_ENB; // [8C] Error interrupt enable register + _va32 uint8_t STAT; // [90] Status register + _va32 uint8_t CTL; // [94] Control register + _va32 uint8_t ADDR; // [98] Address register + _va32 uint8_t BDT_PAGE1; // [9C] BDT page register 1 + _va32 uint8_t FRM_NUML; // [A0] Frame number register + _va32 uint8_t FRM_NUMH; // [A4] Frame number register + _va32 uint8_t TOKEN; // [A8] Token register + _va32 uint8_t SOF_THLD; // [AC] SOF threshold register + _va32 uint8_t BDT_PAGE2; // [B0] BDT page register 2 + _va32 uint8_t BDT_PAGE3; // [B4] BDT page register 3 + + uint32_t reserved_b8; // [B8] + uint32_t reserved_bc; // [BC] + + struct { + _va32 uint8_t CTL; + }EP[16]; // [C0] Endpoint control register + + //----- Following is only found available in NXP Kinetis + _va32 uint8_t USBCTRL; // [100] USB Control register, + _va32 uint8_t OBSERVE; // [104] USB OTG Observe register, + _va32 uint8_t CONTROL; // [108] USB OTG Control register, + _va32 uint8_t USBTRC0; // [10C] USB Transceiver Control Register 0, + uint32_t reserved_110; // [110] + _va32 uint8_t USBFRMADJUST; // [114] Frame Adjust Register, + + //----- Following is only found available in NXP MCX + uint32_t reserved_118[3]; // [118] + _va32 uint8_t KEEP_ALIVE_CTRL; // [124] Keep Alive Mode Control, + _va32 uint8_t KEEP_ALIVE_WKCTRL; // [128] Keep Alive Mode Wakeup Control, + _va32 uint8_t MISCCTRL; // [12C] Miscellaneous Control, + _va32 uint8_t STALL_IL_DIS; // [130] Peripheral Mode Stall Disable for Endpoints[ 7..0] IN + _va32 uint8_t STALL_IH_DIS; // [134] Peripheral Mode Stall Disable for Endpoints[15..8] IN + _va32 uint8_t STALL_OL_DIS; // [138] Peripheral Mode Stall Disable for Endpoints[ 7..0] OUT + _va32 uint8_t STALL_OH_DIS; // [13C] Peripheral Mode Stall Disable for Endpoints[15..8] OUT + _va32 uint8_t CLK_RECOVER_CTRL; // [140] USB Clock Recovery Control, + _va32 uint8_t CLK_RECOVER_IRC_EN; // [144] FIRC Oscillator Enable, + uint32_t reserved_148[3]; // [148] + _va32 uint8_t CLK_RECOVER_INT_EN; // [154] Clock Recovery Combined Interrupt Enable, + uint32_t reserved_158; // [158] + _va32 uint8_t CLK_RECOVER_INT_STATUS; // [15C] Clock Recovery Separated Interrupt Status, +} ci_fs_regs_t; + +TU_VERIFY_STATIC(sizeof(ci_fs_regs_t) == 0x160, "Size is not correct"); + +typedef struct +{ + uint32_t reg_base; + uint32_t irqnum; +} ci_fs_controller_t; + +#ifdef __cplusplus + } +#endif + +#endif diff --git a/src/portable/chipidea/ci_fs/dcd_ci_fs.c b/src/portable/chipidea/ci_fs/dcd_ci_fs.c new file mode 100644 index 000000000..37265df8b --- /dev/null +++ b/src/portable/chipidea/ci_fs/dcd_ci_fs.c @@ -0,0 +1,555 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020 Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "tusb_option.h" + +#if CFG_TUD_ENABLED && defined(TUP_USBIP_CHIPIDEA_FS) + +#include "device/dcd.h" +#include "ci_fs_type.h" + +#if defined(TUP_USBIP_CHIPIDEA_FS_KINETIS) + #include "ci_fs_kinetis.h" +#elif defined(TUP_USBIP_CHIPIDEA_FS_MCX) + #include "ci_fs_mcx.h" +#else + #error "MCU is not supported" +#endif + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM DECLARATION +//--------------------------------------------------------------------+ + +enum { + TOK_PID_OUT = 0x1u, + TOK_PID_IN = 0x9u, + TOK_PID_SETUP = 0xDu, +}; + +typedef struct TU_ATTR_PACKED +{ + union { + uint32_t head; + struct { + union { + struct { + uint16_t : 2; + __IO uint16_t tok_pid : 4; + uint16_t data : 1; + __IO uint16_t own : 1; + uint16_t : 8; + }; + struct { + uint16_t : 2; + uint16_t bdt_stall : 1; + uint16_t dts : 1; + uint16_t ninc : 1; + uint16_t keep : 1; + uint16_t : 10; + }; + }; + __IO uint16_t bc : 10; + uint16_t : 6; + }; + }; + uint8_t *addr; +}buffer_descriptor_t; + +TU_VERIFY_STATIC( sizeof(buffer_descriptor_t) == 8, "size is not correct" ); + +typedef struct TU_ATTR_PACKED +{ + union { + uint32_t state; + struct { + uint32_t max_packet_size :11; + uint32_t : 5; + uint32_t odd : 1; + uint32_t :15; + }; + }; + uint16_t length; + uint16_t remaining; +}endpoint_state_t; + +TU_VERIFY_STATIC( sizeof(endpoint_state_t) == 8, "size is not correct" ); + +typedef struct +{ + union { + /* [#EP][OUT,IN][EVEN,ODD] */ + buffer_descriptor_t bdt[16][2][2]; + uint16_t bda[512]; + }; + TU_ATTR_ALIGNED(4) union { + endpoint_state_t endpoint[16][2]; + endpoint_state_t endpoint_unified[16 * 2]; + }; + uint8_t setup_packet[8]; + uint8_t addr; +}dcd_data_t; + +//--------------------------------------------------------------------+ +// INTERNAL OBJECT & FUNCTION DECLARATION +//--------------------------------------------------------------------+ +// BDT(Buffer Descriptor Table) must be 256-byte aligned +CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(512) static dcd_data_t _dcd; + +TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 512, "size is not correct" ); + +static void prepare_next_setup_packet(uint8_t rhport) +{ + const unsigned out_odd = _dcd.endpoint[0][0].odd; + const unsigned in_odd = _dcd.endpoint[0][1].odd; + TU_ASSERT(0 == _dcd.bdt[0][0][out_odd].own, ); + + _dcd.bdt[0][0][out_odd].data = 0; + _dcd.bdt[0][0][out_odd ^ 1].data = 1; + _dcd.bdt[0][1][in_odd].data = 1; + _dcd.bdt[0][1][in_odd ^ 1].data = 0; + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_OUT), + _dcd.setup_packet, sizeof(_dcd.setup_packet)); +} + +static void process_stall(uint8_t rhport) +{ + for (int i = 0; i < 16; ++i) { + uint32_t const ep_ctl = CI_REG->EP[i].CTL; + + if (ep_ctl & USB_ENDPT_EPSTALL_MASK) { + // prepare next setup if endpoint0 + if ( i == 0 ) prepare_next_setup_packet(rhport); + + // clear stall bit + CI_REG->EP[i].CTL = ep_ctl & ~USB_ENDPT_EPSTALL_MASK; + } + } +} + +static void process_tokdne(uint8_t rhport) +{ + const unsigned s = CI_REG->STAT; + CI_REG->INT_STAT = USB_ISTAT_TOKDNE_MASK; /* fetch the next token if received */ + + uint8_t const epnum = (s >> USB_STAT_ENDP_SHIFT); + uint8_t const dir = (s & USB_STAT_TX_MASK) >> USB_STAT_TX_SHIFT; + unsigned const odd = (s & USB_STAT_ODD_MASK) ? 1 : 0; + + buffer_descriptor_t *bd = (buffer_descriptor_t *)&_dcd.bda[s]; + endpoint_state_t *ep = &_dcd.endpoint_unified[s >> 3]; + + /* fetch pid before discarded by the next steps */ + const unsigned pid = bd->tok_pid; + + /* reset values for a next transfer */ + bd->bdt_stall = 0; + bd->dts = 1; + bd->ninc = 0; + bd->keep = 0; + /* update the odd variable to prepare for the next transfer */ + ep->odd = odd ^ 1; + if (pid == TOK_PID_SETUP) { + dcd_event_setup_received(rhport, bd->addr, true); + CI_REG->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + return; + } + + const unsigned bc = bd->bc; + const unsigned remaining = ep->remaining - bc; + if (remaining && bc == ep->max_packet_size) { + /* continue the transferring consecutive data */ + ep->remaining = remaining; + const int next_remaining = remaining - ep->max_packet_size; + if (next_remaining > 0) { + /* prepare to the after next transfer */ + bd->addr += ep->max_packet_size * 2; + bd->bc = next_remaining > ep->max_packet_size ? ep->max_packet_size: next_remaining; + __DSB(); + bd->own = 1; /* the own bit must set after addr */ + } + return; + } + const unsigned length = ep->length; + dcd_event_xfer_complete(rhport, + tu_edpt_addr(epnum, dir), + length - remaining, XFER_RESULT_SUCCESS, true); + if (0 == epnum && 0 == length) { + /* After completion a ZLP of control transfer, + * it prepares for the next steup transfer. */ + if (_dcd.addr) { + /* When the transfer was the SetAddress, + * the device address should be updated here. */ + CI_REG->ADDR = _dcd.addr; + _dcd.addr = 0; + } + prepare_next_setup_packet(rhport); + } +} + +static void process_bus_reset(uint8_t rhport) +{ + CI_REG->USBCTRL &= ~USB_USBCTRL_SUSP_MASK; + CI_REG->CTL |= USB_CTL_ODDRST_MASK; + CI_REG->ADDR = 0; + CI_REG->INT_EN = USB_INTEN_USBRSTEN_MASK | USB_INTEN_TOKDNEEN_MASK | USB_INTEN_SLEEPEN_MASK | + USB_INTEN_ERROREN_MASK | USB_INTEN_STALLEN_MASK; + + CI_REG->EP[0].CTL = USB_ENDPT_EPHSHK_MASK | USB_ENDPT_EPRXEN_MASK | USB_ENDPT_EPTXEN_MASK; + for (unsigned i = 1; i < 16; ++i) { + CI_REG->EP[i].CTL = 0; + } + buffer_descriptor_t *bd = _dcd.bdt[0][0]; + for (unsigned i = 0; i < sizeof(_dcd.bdt)/sizeof(*bd); ++i, ++bd) { + bd->head = 0; + } + const endpoint_state_t ep0 = { + .max_packet_size = CFG_TUD_ENDPOINT0_SIZE, + .odd = 0, + .length = 0, + .remaining = 0, + }; + _dcd.endpoint[0][0] = ep0; + _dcd.endpoint[0][1] = ep0; + tu_memclr(_dcd.endpoint[1], sizeof(_dcd.endpoint) - sizeof(_dcd.endpoint[0])); + _dcd.addr = 0; + prepare_next_setup_packet(rhport); + CI_REG->CTL &= ~USB_CTL_ODDRST_MASK; + dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true); +} + +static void process_bus_sleep(uint8_t rhport) +{ + // Enable resume & disable suspend interrupt + const unsigned inten = CI_REG->INT_EN; + + CI_REG->INT_EN = (inten & ~USB_INTEN_SLEEPEN_MASK) | USB_INTEN_RESUMEEN_MASK; + CI_REG->USBTRC0 |= USB_USBTRC0_USBRESMEN_MASK; + CI_REG->USBCTRL |= USB_USBCTRL_SUSP_MASK; + + dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); +} + +static void process_bus_resume(uint8_t rhport) +{ + // Enable suspend & disable resume interrupt + const unsigned inten = CI_REG->INT_EN; + + CI_REG->USBCTRL &= ~USB_USBCTRL_SUSP_MASK; // will also clear USB_USBTRC0_USB_RESUME_INT_MASK + CI_REG->USBTRC0 &= ~USB_USBTRC0_USBRESMEN_MASK; + CI_REG->INT_EN = (inten & ~USB_INTEN_RESUMEEN_MASK) | USB_INTEN_SLEEPEN_MASK; + + dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); +} + +/*------------------------------------------------------------------*/ +/* Device API + *------------------------------------------------------------------*/ +void dcd_init(uint8_t rhport) +{ + (void) rhport; + + CI_REG->USBTRC0 |= USB_USBTRC0_USBRESET_MASK; + while (CI_REG->USBTRC0 & USB_USBTRC0_USBRESET_MASK); + + tu_memclr(&_dcd, sizeof(_dcd)); + CI_REG->USBTRC0 |= TU_BIT(6); /* software must set this bit to 1 */ + CI_REG->BDT_PAGE1 = (uint8_t)((uintptr_t)_dcd.bdt >> 8); + CI_REG->BDT_PAGE2 = (uint8_t)((uintptr_t)_dcd.bdt >> 16); + CI_REG->BDT_PAGE3 = (uint8_t)((uintptr_t)_dcd.bdt >> 24); + + CI_REG->INT_EN = USB_INTEN_USBRSTEN_MASK; + + dcd_connect(rhport); + // NVIC_ClearPendingIRQ(USB0_IRQn); +} + +void dcd_set_address(uint8_t rhport, uint8_t dev_addr) +{ + _dcd.addr = dev_addr & 0x7F; + /* Response with status first before changing device address */ + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); +} + +void dcd_remote_wakeup(uint8_t rhport) +{ + (void) rhport; + + CI_REG->CTL |= USB_CTL_RESUME_MASK; + + unsigned cnt = SystemCoreClock / 1000; + while (cnt--) __NOP(); + + CI_REG->CTL &= ~USB_CTL_RESUME_MASK; +} + +void dcd_connect(uint8_t rhport) +{ + (void) rhport; + CI_REG->USBCTRL = 0; + CI_REG->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK; + CI_REG->CTL |= USB_CTL_USBENSOFEN_MASK; +} + +void dcd_disconnect(uint8_t rhport) +{ + (void) rhport; + CI_REG->CTL = 0; + CI_REG->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; +} + +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + +//--------------------------------------------------------------------+ +// Endpoint API +//--------------------------------------------------------------------+ +bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) +{ + (void) rhport; + + const unsigned ep_addr = ep_desc->bEndpointAddress; + const unsigned epn = tu_edpt_number(ep_addr); + const unsigned dir = tu_edpt_dir(ep_addr); + const unsigned xfer = ep_desc->bmAttributes.xfer; + endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; + const unsigned odd = ep->odd; + buffer_descriptor_t *bd = _dcd.bdt[epn][dir]; + + /* No support for control transfer */ + TU_ASSERT(epn && (xfer != TUSB_XFER_CONTROL)); + + ep->max_packet_size = tu_edpt_packet_size(ep_desc); + unsigned val = USB_ENDPT_EPCTLDIS_MASK; + val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK: 0; + val |= dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK; + CI_REG->EP[epn].CTL |= val; + + if (xfer != TUSB_XFER_ISOCHRONOUS) { + bd[odd].dts = 1; + bd[odd].data = 0; + bd[odd ^ 1].dts = 1; + bd[odd ^ 1].data = 1; + } + + return true; +} + +void dcd_edpt_close_all(uint8_t rhport) +{ + dcd_int_disable(rhport); + + for (unsigned i = 1; i < 16; ++i) { + CI_REG->EP[i].CTL = 0; + } + + dcd_int_enable(rhport); + + buffer_descriptor_t *bd = _dcd.bdt[1][0]; + for (unsigned i = 2; i < sizeof(_dcd.bdt)/sizeof(*bd); ++i, ++bd) { + bd->head = 0; + } + + endpoint_state_t *ep = &_dcd.endpoint[1][0]; + for (unsigned i = 2; i < sizeof(_dcd.endpoint)/sizeof(*ep); ++i, ++ep) { + /* Clear except the odd */ + ep->max_packet_size = 0; + ep->length = 0; + ep->remaining = 0; + } +} + +void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) +{ + const unsigned epn = tu_edpt_number(ep_addr); + const unsigned dir = tu_edpt_dir(ep_addr); + endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; + buffer_descriptor_t *bd = _dcd.bdt[epn][dir]; + const unsigned msk = dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK; + + dcd_int_disable(rhport); + + CI_REG->EP[epn].CTL &= ~msk; + ep->max_packet_size = 0; + ep->length = 0; + ep->remaining = 0; + bd[0].head = 0; + bd[1].head = 0; + + dcd_int_enable(rhport); +} + +bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) +{ + const unsigned epn = tu_edpt_number(ep_addr); + const unsigned dir = tu_edpt_dir(ep_addr); + endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; + buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][ep->odd]; + TU_ASSERT(0 == bd->own); + + dcd_int_disable(rhport); + + ep->length = total_bytes; + ep->remaining = total_bytes; + + const unsigned mps = ep->max_packet_size; + if (total_bytes > mps) { + buffer_descriptor_t *next = ep->odd ? bd - 1: bd + 1; + /* When total_bytes is greater than the max packet size, + * it prepares to the next transfer to avoid NAK in advance. */ + next->bc = total_bytes >= 2 * mps ? mps: total_bytes - mps; + next->addr = buffer + mps; + next->own = 1; + } + bd->bc = total_bytes >= mps ? mps: total_bytes; + bd->addr = buffer; + __DSB(); + bd->own = 1; /* This bit must be set last */ + + dcd_int_enable(rhport); + + return true; +} + +void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) +{ + (void) rhport; + const unsigned epn = tu_edpt_number(ep_addr); + + if (0 == epn) { + CI_REG->EP[epn].CTL |= USB_ENDPT_EPSTALL_MASK; + } else { + const unsigned dir = tu_edpt_dir(ep_addr); + const unsigned odd = _dcd.endpoint[epn][dir].odd; + buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][odd]; + TU_ASSERT(0 == bd->own,); + + dcd_int_disable(rhport); + + bd->bdt_stall = 1; + __DSB(); + bd->own = 1; /* This bit must be set last */ + + dcd_int_enable(rhport); + } +} + +void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) +{ + const unsigned epn = tu_edpt_number(ep_addr); + TU_VERIFY(epn,); + const unsigned dir = tu_edpt_dir(ep_addr); + const unsigned odd = _dcd.endpoint[epn][dir].odd; + buffer_descriptor_t *bd = _dcd.bdt[epn][dir]; + TU_VERIFY(bd[odd].own,); + + dcd_int_disable(rhport); + + bd[odd].own = 0; + __DSB(); + + // clear stall + bd[odd].bdt_stall = 0; + + // Reset data toggle + bd[odd ].data = 0; + bd[odd ^ 1].data = 1; + + // We already cleared this in ISR, but just clear it here to be safe + const uint32_t ep_ctl = CI_REG->EP[epn].CTL; + if (ep_ctl & USB_ENDPT_EPSTALL_MASK) { + CI_REG->EP[epn].CTL = ep_ctl & ~USB_ENDPT_EPSTALL_MASK; + } + + dcd_int_enable(rhport); +} + +//--------------------------------------------------------------------+ +// ISR +//--------------------------------------------------------------------+ +void dcd_int_handler(uint8_t rhport) +{ + uint32_t is = CI_REG->INT_STAT; + uint32_t msk = CI_REG->INT_EN; + + // clear non-enabled interrupts + CI_REG->INT_STAT = is & ~msk; + is &= msk; + + if (is & USB_ISTAT_ERROR_MASK) { + /* TODO: */ + uint32_t es = CI_REG->ERR_STAT; + CI_REG->ERR_STAT = es; + CI_REG->INT_STAT = is; /* discard any pending events */ + } + + if (is & USB_ISTAT_USBRST_MASK) { + CI_REG->INT_STAT = is; /* discard any pending events */ + process_bus_reset(rhport); + } + + if (is & USB_ISTAT_SLEEP_MASK) { + // TU_LOG2("Suspend: "); TU_LOG2_HEX(is); + + // Note Host usually has extra delay after bus reset (without SOF), which could falsely + // detected as Sleep event. Though usbd has debouncing logic so we are good + CI_REG->INT_STAT = USB_ISTAT_SLEEP_MASK; + process_bus_sleep(rhport); + } + +#if 0 // ISTAT_RESUME never trigger, probably for host mode ? + if (is & USB_ISTAT_RESUME_MASK) { + // TU_LOG2("ISTAT Resume: "); TU_LOG2_HEX(is); + KHCI->ISTAT = USB_ISTAT_RESUME_MASK; + process_bus_resume(rhport); + } +#endif + + if (CI_REG->USBTRC0 & USB_USBTRC0_USB_RESUME_INT_MASK) { + // TU_LOG2("USBTRC0 Resume: "); TU_LOG2_HEX(is); TU_LOG2_HEX(KHCI->USBTRC0); + process_bus_resume(rhport); + } + + if (is & USB_ISTAT_SOFTOK_MASK) { + CI_REG->INT_STAT = USB_ISTAT_SOFTOK_MASK; + dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); + } + + if (is & USB_ISTAT_STALL_MASK) { + CI_REG->INT_STAT = USB_ISTAT_STALL_MASK; + process_stall(rhport); + } + + if (is & USB_ISTAT_TOKDNE_MASK) { + process_tokdne(rhport); + } +} + +#endif -- cgit v1.3.1 From 8af8869d3bcb1504835ead4ba472cd922d997e8d Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 16 Jun 2023 11:26:38 +0700 Subject: renam OPT_MCU_MIMXRT to OPT_MCU_MIMXRT1XXX fix build util with makefile --- examples/host/bare_api/only.txt | 2 +- examples/host/cdc_msc_hid/only.txt | 2 +- examples/host/hid_controller/only.txt | 2 +- examples/host/msc_file_explorer/only.txt | 2 +- hw/bsp/board_mcu.h | 2 +- hw/bsp/f1c100s/README.md | 2 +- hw/bsp/imxrt/family.cmake | 4 ++-- hw/bsp/imxrt/family.mk | 2 +- src/class/audio/audio_device.c | 4 ++-- src/common/tusb_mcu.h | 2 +- src/portable/chipidea/ci_hs/dcd_ci_hs.c | 2 +- src/portable/chipidea/ci_hs/hcd_ci_hs.c | 5 ++--- src/tusb_option.h | 6 +++--- tools/build_utils.py | 7 +------ 14 files changed, 19 insertions(+), 25 deletions(-) (limited to 'src/common') diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt index fa9c14857..45da6c3f2 100644 --- a/examples/host/bare_api/only.txt +++ b/examples/host/bare_api/only.txt @@ -3,7 +3,7 @@ mcu:LPC177X_8X mcu:LPC18XX mcu:LPC40XX mcu:LPC43XX -mcu:MIMXRT +mcu:MIMXRT1XXX mcu:MIMXRT10XX mcu:MIMXRT11XX mcu:RP2040 diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt index fa9c14857..45da6c3f2 100644 --- a/examples/host/cdc_msc_hid/only.txt +++ b/examples/host/cdc_msc_hid/only.txt @@ -3,7 +3,7 @@ mcu:LPC177X_8X mcu:LPC18XX mcu:LPC40XX mcu:LPC43XX -mcu:MIMXRT +mcu:MIMXRT1XXX mcu:MIMXRT10XX mcu:MIMXRT11XX mcu:RP2040 diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt index fa9c14857..45da6c3f2 100644 --- a/examples/host/hid_controller/only.txt +++ b/examples/host/hid_controller/only.txt @@ -3,7 +3,7 @@ mcu:LPC177X_8X mcu:LPC18XX mcu:LPC40XX mcu:LPC43XX -mcu:MIMXRT +mcu:MIMXRT1XXX mcu:MIMXRT10XX mcu:MIMXRT11XX mcu:RP2040 diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt index fa9c14857..45da6c3f2 100644 --- a/examples/host/msc_file_explorer/only.txt +++ b/examples/host/msc_file_explorer/only.txt @@ -3,7 +3,7 @@ mcu:LPC177X_8X mcu:LPC18XX mcu:LPC40XX mcu:LPC43XX -mcu:MIMXRT +mcu:MIMXRT1XXX mcu:MIMXRT10XX mcu:MIMXRT11XX mcu:RP2040 diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index edae4c645..ce2f919bf 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -116,7 +116,7 @@ #elif CFG_TUSB_MCU == OPT_MCU_VALENTYUSB_EPTRI // no header needed -#elif CFG_TUSB_MCU == OPT_MCU_MIMXRT +#elif CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX #include "fsl_device_registers.h" #elif CFG_TUSB_MCU == OPT_MCU_NUC120 diff --git a/hw/bsp/f1c100s/README.md b/hw/bsp/f1c100s/README.md index f7a863c34..86d454f8e 100644 --- a/hw/bsp/f1c100s/README.md +++ b/hw/bsp/f1c100s/README.md @@ -17,4 +17,4 @@ Flash: `make BOARD=f1c100s flash` will write the image to SPI flash, and then re ## TODO -* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT` high speed MCU check in examples (maybe we should extract the logic?) +* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX` high speed MCU check in examples (maybe we should extract the logic?) diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake index f687fe833..c2c067141 100644 --- a/hw/bsp/imxrt/family.cmake +++ b/hw/bsp/imxrt/family.cmake @@ -14,7 +14,7 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor") set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) -set(FAMILY_MCUS MIMXRT CACHE INTERNAL "") +set(FAMILY_MCUS MIMXRT1XXX CACHE INTERNAL "") # enable LTO if supported include(CheckIPOSupported) @@ -119,7 +119,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB - family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT) + family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX) # Link dependencies target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk index 0c297f060..c3a69e7c5 100644 --- a/hw/bsp/imxrt/family.mk +++ b/hw/bsp/imxrt/family.mk @@ -13,7 +13,7 @@ CFLAGS += \ -D__ARMVFP__=0 -D__ARMFPV5__=0\ -DXIP_EXTERNAL_FLASH=1 \ -DXIP_BOOT_HEADER_ENABLE=1 \ - -DCFG_TUSB_MCU=OPT_MCU_MIMXRT + -DCFG_TUSB_MCU=OPT_MCU_MIMXRT1XXX ifdef BOARD_TUD_RHPORT CFLAGS += -DBOARD_TUD_RHPORT=$(BOARD_TUD_RHPORT) diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index f487fe60e..e5dbe988a 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -66,7 +66,7 @@ // Use ring buffer if it's available, some MCUs need extra RAM requirements #ifndef TUD_AUDIO_PREFER_RING_BUFFER - #if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT + #if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX #define TUD_AUDIO_PREFER_RING_BUFFER 0 #else #define TUD_AUDIO_PREFER_RING_BUFFER 1 @@ -85,7 +85,7 @@ CFG_TUSB_MCU == OPT_MCU_RX72N || \ CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ CFG_TUSB_MCU == OPT_MCU_LPC43XX || \ - CFG_TUSB_MCU == OPT_MCU_MIMXRT || \ + CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX || \ CFG_TUSB_MCU == OPT_MCU_MSP432E4 #if TUD_AUDIO_PREFER_RING_BUFFER #define USE_LINEAR_BUFFER 0 diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 485d6168d..56525725e 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -90,7 +90,7 @@ #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_RHPORT_HIGHSPEED 1 -#elif TU_CHECK_MCU(OPT_MCU_MIMXRT) +#elif TU_CHECK_MCU(OPT_MCU_MIMXRT1XXX) #define TUP_USBIP_CHIPIDEA_HS #define TUP_USBIP_EHCI diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 850c82e43..588e761a9 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -31,7 +31,7 @@ #include "device/dcd.h" #include "ci_hs_type.h" -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX #include "ci_hs_imxrt.h" void dcd_dcache_clean(void* addr, uint32_t data_size) { diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c index 8c27abbf6..0f095147d 100644 --- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -28,8 +28,7 @@ // Chipidea Highspeed USB IP implement EHCI for host functionality -#if CFG_TUH_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT) +#if CFG_TUH_ENABLED && defined(TUP_USBIP_EHCI) //--------------------------------------------------------------------+ // INCLUDE @@ -39,7 +38,7 @@ #include "portable/ehci/ehci_api.h" #include "ci_hs_type.h" -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX #include "ci_hs_imxrt.h" void hcd_dcache_clean(void* addr, uint32_t data_size) { diff --git a/src/tusb_option.h b/src/tusb_option.h index bb669e693..43e67cf64 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -97,9 +97,9 @@ #define OPT_MCU_VALENTYUSB_EPTRI 600 ///< Fomu eptri config // NXP iMX RT -#define OPT_MCU_MIMXRT 700 ///< NXP iMX RT Series -#define OPT_MCU_MIMXRT10XX OPT_MCU_MIMXRT ///< RT10xx -#define OPT_MCU_MIMXRT11XX OPT_MCU_MIMXRT ///< RT11xx +#define OPT_MCU_MIMXRT1XXX 700 ///< NXP iMX RT1xxx Series +#define OPT_MCU_MIMXRT10XX OPT_MCU_MIMXRT1XXX ///< RT10xx +#define OPT_MCU_MIMXRT11XX OPT_MCU_MIMXRT1XXX ///< RT11xx // Nuvoton #define OPT_MCU_NUC121 800 diff --git a/tools/build_utils.py b/tools/build_utils.py index 6f907729b..5d735bc17 100644 --- a/tools/build_utils.py +++ b/tools/build_utils.py @@ -30,13 +30,8 @@ def skip_example(example, board): family_dir = board_dir.parent.parent family = family_dir.name - # family CMake - family_mk = family_dir / "family.cmake" - # family.mk - if not family_mk.exists(): - family_mk = family_dir / "family.mk" - + family_mk = family_dir / "family.mk" mk_contents = family_mk.read_text() # Find the mcu, first in family mk then board mk -- cgit v1.3.1 From b59b65d2ed0f6fa14b18b7bc233309d9b9710898 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 18:26:51 +0700 Subject: rename to kinetis_k32l2, rename OPT_MCU_KINETIS_K32 to OPT_MCU_KINETIS_K32L --- .github/workflows/build_arm.yml | 2 +- hw/bsp/board_mcu.h | 2 +- hw/bsp/imxrt/family.mk | 2 +- hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h | 58 ------ hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk | 26 --- .../boards/frdm_k32l2a4s/frdm_k32l2a4s.c | 171 ---------------- hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h | 56 ------ hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk | 26 --- .../kinetis_k32l/boards/frdm_k32l2b/frdm_k32l2b.c | 140 ------------- .../boards/kuiic/K32L2B31xxxxA_flash.ld | 216 --------------------- hw/bsp/kinetis_k32l/boards/kuiic/board.h | 45 ----- hw/bsp/kinetis_k32l/boards/kuiic/board.mk | 26 --- hw/bsp/kinetis_k32l/boards/kuiic/kuiic.c | 203 ------------------- hw/bsp/kinetis_k32l/family.mk | 32 --- hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h | 58 ++++++ hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk | 21 ++ .../boards/frdm_k32l2a4s/frdm_k32l2a4s.c | 171 ++++++++++++++++ hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h | 56 ++++++ hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk | 21 ++ .../kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c | 140 +++++++++++++ .../boards/kuiic/K32L2B31xxxxA_flash.ld | 216 +++++++++++++++++++++ hw/bsp/kinetis_k32l2/boards/kuiic/board.h | 45 +++++ hw/bsp/kinetis_k32l2/boards/kuiic/board.mk | 18 ++ hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c | 203 +++++++++++++++++++ hw/bsp/kinetis_k32l2/family.mk | 32 +++ src/common/tusb_mcu.h | 2 +- src/tusb_option.h | 3 +- tools/get_deps.py | 4 +- 28 files changed, 989 insertions(+), 1006 deletions(-) delete mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h delete mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk delete mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/frdm_k32l2a4s.c delete mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h delete mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk delete mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2b/frdm_k32l2b.c delete mode 100644 hw/bsp/kinetis_k32l/boards/kuiic/K32L2B31xxxxA_flash.ld delete mode 100644 hw/bsp/kinetis_k32l/boards/kuiic/board.h delete mode 100644 hw/bsp/kinetis_k32l/boards/kuiic/board.mk delete mode 100644 hw/bsp/kinetis_k32l/boards/kuiic/kuiic.c delete mode 100644 hw/bsp/kinetis_k32l/family.mk create mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h create mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk create mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/frdm_k32l2a4s.c create mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h create mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk create mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c create mode 100644 hw/bsp/kinetis_k32l2/boards/kuiic/K32L2B31xxxxA_flash.ld create mode 100644 hw/bsp/kinetis_k32l2/boards/kuiic/board.h create mode 100644 hw/bsp/kinetis_k32l2/boards/kuiic/board.mk create mode 100644 hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c create mode 100644 hw/bsp/kinetis_k32l2/family.mk (limited to 'src/common') diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index a7c7fd1e1..620aec193 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -34,7 +34,7 @@ jobs: family: # Alphabetical order - 'broadcom_32bit' - - 'kinetis_k32l kinetis_kl' + - 'kinetis_k32l2 kinetis_kl' - 'lpc11 lpc13 lpc15 lpc17' - 'lpc51 lpc54 lpc55' - 'mm32 msp432e4' diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index ce2f919bf..e5d2bb608 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -47,7 +47,7 @@ #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX, OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX, OPT_MCU_MCXN9) #include "fsl_device_registers.h" -#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32) +#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L) #include "fsl_device_registers.h" #elif CFG_TUSB_MCU == OPT_MCU_NRF5X diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk index d0bb5be17..9eb541473 100644 --- a/hw/bsp/imxrt/family.mk +++ b/hw/bsp/imxrt/family.mk @@ -5,7 +5,6 @@ DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 include $(TOP)/$(BOARD_PATH)/board.mk CPU_CORE ?= cortex-m7 -include $(TOP)/tools/make/cpu/$(CPU_CORE).mk CFLAGS += \ -D__ARMVFP__=0 \ @@ -17,6 +16,7 @@ CFLAGS += \ ifdef BOARD_TUD_RHPORT CFLAGS += -DBOARD_TUD_RHPORT=$(BOARD_TUD_RHPORT) endif + ifdef BOARD_TUH_RHPORT CFLAGS += -DBOARD_TUH_RHPORT=$(BOARD_TUH_RHPORT) endif diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h deleted file mode 100644 index b1f38c997..000000000 --- a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - - -#ifndef BOARD_H_ -#define BOARD_H_ - -#include "fsl_device_registers.h" - -// LED -// The Red LED is on PTE29. -// The Green LED is on PTC4. -// The Blue LED is on PTE31. -#define LED_PIN_CLOCK kCLOCK_PortC -#define LED_GPIO GPIOC -#define LED_PORT PORTC -#define LED_PIN 4 -#define LED_STATE_ON 0 - -// SW3 button1 -#define BUTTON_PIN_CLOCK kCLOCK_PortE -#define BUTTON_GPIO GPIOE -#define BUTTON_PORT PORTE -#define BUTTON_PIN 4 -#define BUTTON_STATE_ACTIVE 0 - -// UART -#define UART_PORT LPUART0 -#define UART_PIN_CLOCK kCLOCK_PortB -#define UART_PIN_GPIO GPIOB -#define UART_PIN_PORT PORTB -#define UART_PIN_RX 16u -#define UART_PIN_TX 17u - -#endif /* BOARD_H_ */ diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk deleted file mode 100644 index d96ab58b8..000000000 --- a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk +++ /dev/null @@ -1,26 +0,0 @@ -MCU = K32L2A41A - -CFLAGS += \ - -mcpu=cortex-m0plus \ - -DCPU_K32L2A41VLH1A \ - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual - -# All source paths should be relative to the top level. -LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld - -SRC_C += \ - $(MCU_DIR)/project_template/clock_config.c \ - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = K32L2A41xxxxA - -# For flash-pyocd target -PYOCD_TARGET = K32L2A - -# flash using pyocd -flash: flash-pyocd diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/frdm_k32l2a4s.c deleted file mode 100644 index 80830163b..000000000 --- a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/frdm_k32l2a4s.c +++ /dev/null @@ -1,171 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * Copyright (c) 2020, Koji Kitayama - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "bsp/board.h" -#include "board.h" -#include "fsl_gpio.h" -#include "fsl_port.h" -#include "fsl_clock.h" -#include "fsl_lpuart.h" - -#include "clock_config.h" - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB0_IRQHandler(void) -{ - tud_int_handler(0); -} - -void board_init(void) -{ - /* Enable port clocks for UART/LED/Button pins */ - CLOCK_EnableClock(UART_PIN_CLOCK); - CLOCK_EnableClock(LED_PIN_CLOCK); - CLOCK_EnableClock(BUTTON_PIN_CLOCK); - - gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; - GPIO_PinInit(LED_GPIO, LED_PIN, &led_config); - PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); - - gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; - GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); - const port_pin_config_t BUTTON_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_OpenDrainDisable, - kPORT_LowDriveStrength, - kPORT_MuxAsGpio, - kPORT_UnlockRegister - }; - PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); - - /* - Enable LPUART0 clock and configure port pins. - FIR clock is being used so the USB examples work. - */ - PCC_LPUART0 = 0U; /* Clock must be off to set PCS */ - PCC_LPUART0 = PCC_CLKCFG_PCS( 3U ); /* Select the clock. 1:OSCCLK/Bus Clock, 2:Slow IRC, 3: Fast IRC, 6: System PLL */ - PCC_LPUART0 |= PCC_CLKCFG_CGC( 1U ); /* Enable LPUART */ - - /* PORTB16 (pin 62) is configured as LPUART0_RX */ - gpio_pin_config_t const lpuart_config_rx = { kGPIO_DigitalInput, 0 }; - GPIO_PinInit(UART_PIN_GPIO, UART_PIN_RX, &lpuart_config_rx); - const port_pin_config_t UART_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_OpenDrainDisable, - kPORT_LowDriveStrength, - kPORT_MuxAsGpio, - kPORT_UnlockRegister - }; - PORT_SetPinConfig(UART_PIN_PORT, UART_PIN_RX, &UART_CFG); - PORT_SetPinMux( UART_PIN_PORT, UART_PIN_RX, kPORT_MuxAlt3); - - /* PORTB17 (pin 63) is configured as LPUART0_TX */ - gpio_pin_config_t const lpuart_config_tx = { kGPIO_DigitalOutput, 0 }; - GPIO_PinInit( UART_PIN_GPIO, UART_PIN_TX, &lpuart_config_tx); - PORT_SetPinMux( UART_PIN_PORT, UART_PIN_TX, kPORT_MuxAlt3); - - BOARD_BootClockRUN(); - SystemCoreClockUpdate(); - -#if CFG_TUSB_OS == OPT_OS_NONE - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); -#endif - - lpuart_config_t uart_config; - LPUART_GetDefaultConfig(&uart_config); - uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; - uart_config.enableTx = true; - uart_config.enableRx = true; - LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_ScgFircClk)); - - // USB - CLOCK_EnableUsbfs0Clock(kCLOCK_IpSrcFircAsync, 48000000U); -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); -} - -uint32_t board_button_read(void) -{ - return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); -} - -int board_uart_read(uint8_t* buf, int len) -{ -#if 0 /* - Use this version if want the LED to blink during BOARD=board_test, - without having to hit a key. - */ - if( 0U != (kLPUART_RxDataRegFullFlag & LPUART_GetStatusFlags( UART_PORT )) ) - { - LPUART_ReadBlocking(UART_PORT, buf, len); - return len; - } - - return( 0 ); -#else /* Wait for 'len' characters to come in */ - - LPUART_ReadBlocking(UART_PORT, buf, len); - return len; - -#endif -} - -int board_uart_write(void const * buf, int len) -{ - LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); - return len; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h deleted file mode 100644 index 8d21fdcd4..000000000 --- a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - - -#ifndef BOARD_H_ -#define BOARD_H_ - -#include "fsl_device_registers.h" - -// LED -#define LED_PIN_CLOCK kCLOCK_PortD -#define LED_GPIO GPIOD -#define LED_PORT PORTD -#define LED_PIN 5 -#define LED_STATE_ON 0 - -// SW3 button1 -#define BUTTON_PIN_CLOCK kCLOCK_PortC -#define BUTTON_GPIO GPIOC -#define BUTTON_PORT PORTC -#define BUTTON_PIN 3 -#define BUTTON_STATE_ACTIVE 0 - -// UART -#define UART_PORT LPUART0 -#define UART_PIN_CLOCK kCLOCK_PortA -#define UART_PIN_PORT PORTA -#define UART_PIN_RX 1u -#define UART_PIN_TX 2u -#define SOPT5_LPUART0RXSRC_LPUART_RX 0x00u /*!<@brief LPUART0 Receive Data Source Select: LPUART_RX pin */ -#define SOPT5_LPUART0TXSRC_LPUART_TX 0x00u /*!<@brief LPUART0 Transmit Data Source Select: LPUART0_TX pin */ - -#endif /* BOARD_H_ */ diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk deleted file mode 100644 index 5f8ecbfe4..000000000 --- a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk +++ /dev/null @@ -1,26 +0,0 @@ -MCU = K32L2B31A - -CFLAGS += \ - -mcpu=cortex-m0plus \ - -DCPU_K32L2B31VLH0A \ - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls - -# All source paths should be relative to the top level. -LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld - -SRC_C += \ - $(MCU_DIR)/project_template/clock_config.c \ - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = K32L2B31xxxxA - -# For flash-pyocd target -PYOCD_TARGET = K32L2B - -# flash using pyocd -flash: flash-pyocd diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/frdm_k32l2b.c deleted file mode 100644 index 1566b4e2e..000000000 --- a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/frdm_k32l2b.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * Copyright (c) 2020, Koji Kitayama - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "bsp/board.h" -#include "board.h" -#include "fsl_gpio.h" -#include "fsl_port.h" -#include "fsl_clock.h" -#include "fsl_lpuart.h" - -#include "clock_config.h" - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB0_IRQHandler(void) -{ - tud_int_handler(0); -} - -void board_init(void) -{ - /* Enable port clocks for UART/LED/Button pins */ - CLOCK_EnableClock(UART_PIN_CLOCK); - CLOCK_EnableClock(LED_PIN_CLOCK); - CLOCK_EnableClock(BUTTON_PIN_CLOCK); - - gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; - GPIO_PinInit(LED_GPIO, LED_PIN, &led_config); - PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); - - gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; - GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); - const port_pin_config_t BUTTON_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_LowDriveStrength, - kPORT_MuxAsGpio - }; - PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); - - /* PORTA1 (pin 23) is configured as LPUART0_RX */ - PORT_SetPinMux(PORTA, 1U, kPORT_MuxAlt2); - /* PORTA2 (pin 24) is configured as LPUART0_TX */ - PORT_SetPinMux(PORTA, 2U, kPORT_MuxAlt2); - - SIM->SOPT5 = ((SIM->SOPT5 & - /* Mask bits to zero which are setting */ - (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK))) - /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */ - | SIM_SOPT5_LPUART0TXSRC(SOPT5_LPUART0TXSRC_LPUART_TX) - /* LPUART0 Receive Data Source Select: LPUART_RX pin. */ - | SIM_SOPT5_LPUART0RXSRC(SOPT5_LPUART0RXSRC_LPUART_RX)); - - BOARD_BootClockRUN(); - SystemCoreClockUpdate(); - CLOCK_SetLpuart0Clock(1); - -#if CFG_TUSB_OS == OPT_OS_NONE - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); -#endif - - lpuart_config_t uart_config; - LPUART_GetDefaultConfig(&uart_config); - uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; - uart_config.enableTx = true; - uart_config.enableRx = true; - LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_McgIrc48MClk)); - - // USB - CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); -} - -uint32_t board_button_read(void) -{ - return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); -} - -int board_uart_read(uint8_t* buf, int len) -{ - LPUART_ReadBlocking(UART_PORT, buf, len); - return len; -} - -int board_uart_write(void const * buf, int len) -{ - LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); - return len; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/K32L2B31xxxxA_flash.ld b/hw/bsp/kinetis_k32l/boards/kuiic/K32L2B31xxxxA_flash.ld deleted file mode 100644 index f478a99c7..000000000 --- a/hw/bsp/kinetis_k32l/boards/kuiic/K32L2B31xxxxA_flash.ld +++ /dev/null @@ -1,216 +0,0 @@ -/* -** ################################################################### -** Processors: K32L2B31VFM0A -** K32L2B31VFT0A -** K32L2B31VLH0A -** K32L2B31VMP0A -** -** Compiler: GNU C Compiler -** Reference manual: K32L2B3xRM, Rev.0, July 2019 -** Version: rev. 1.0, 2019-07-30 -** Build: b190930 -** -** Abstract: -** Linker file for the GNU C Compiler -** -** Copyright 2016 Freescale Semiconductor, Inc. -** Copyright 2016-2019 NXP -** All rights reserved. -** -** SPDX-License-Identifier: BSD-3-Clause -** -** http: www.nxp.com -** mail: support@nxp.com -** -** ################################################################### -*/ - -/* Entry Point */ -ENTRY(Reset_Handler) - -HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; -STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; - -/* Specify the memory areas */ -MEMORY -{ - m_interrupts (RX) : ORIGIN = 0x00008000, LENGTH = 0x00000200 - m_flash_config (RX) : ORIGIN = 0x00008400, LENGTH = 0x00000010 - m_text (RX) : ORIGIN = 0x00008410, LENGTH = 0x00037BF0 - m_data (RW) : ORIGIN = 0x1FFFE000, LENGTH = 0x00008000 -} - -/* Define output sections */ -SECTIONS -{ - /* The startup code goes first into internal flash */ - .interrupts : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } > m_interrupts - - .flash_config : - { - . = ALIGN(4); - KEEP(*(.FlashConfig)) /* Flash Configuration Field (FCF) */ - . = ALIGN(4); - } > m_flash_config - - /* The program code and other data goes into internal flash */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - *(.glue_7) /* glue arm to thumb code */ - *(.glue_7t) /* glue thumb to arm code */ - *(.eh_frame) - KEEP (*(.init)) - KEEP (*(.fini)) - . = ALIGN(4); - } > m_text - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > m_text - - .ARM : - { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } > m_text - - .ctors : - { - __CTOR_LIST__ = .; - /* gcc uses crtbegin.o to find the start of - the constructors, so we make sure it is - first. Because this is a wildcard, it - doesn't matter if the user does not - actually link against crtbegin.o; the - linker won't look for a file to match a - wildcard. The wildcard also means that it - doesn't matter which directory crtbegin.o - is in. */ - KEEP (*crtbegin.o(.ctors)) - KEEP (*crtbegin?.o(.ctors)) - /* We don't want to include the .ctor section from - from the crtend.o file until after the sorted ctors. - The .ctor section from the crtend file contains the - end of ctors marker and it must be last */ - KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - __CTOR_END__ = .; - } > m_text - - .dtors : - { - __DTOR_LIST__ = .; - KEEP (*crtbegin.o(.dtors)) - KEEP (*crtbegin?.o(.dtors)) - KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - __DTOR_END__ = .; - } > m_text - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array*)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } > m_text - - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array*)) - PROVIDE_HIDDEN (__init_array_end = .); - } > m_text - - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(SORT(.fini_array.*))) - KEEP (*(.fini_array*)) - PROVIDE_HIDDEN (__fini_array_end = .); - } > m_text - - __etext = .; /* define a global symbol at end of code */ - __DATA_ROM = .; /* Symbol is used by startup for data initialization */ - - /* reserve MTB memory at the beginning of m_data */ - .mtb : /* MTB buffer address as defined by the hardware */ - { - . = ALIGN(8); - _mtb_start = .; - KEEP(*(.mtb_buf)) /* need to KEEP Micro Trace Buffer as not referenced by application */ - . = ALIGN(8); - _mtb_end = .; - } > m_data - - .data : AT(__DATA_ROM) - { - . = ALIGN(4); - __DATA_RAM = .; - __data_start__ = .; /* create a global symbol at data start */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - KEEP(*(.jcr*)) - . = ALIGN(4); - __data_end__ = .; /* define a global symbol at data end */ - } > m_data - - __DATA_END = __DATA_ROM + (__data_end__ - __data_start__); - text_end = ORIGIN(m_text) + LENGTH(m_text); - ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data") - - /* Uninitialized data section */ - .bss : - { - /* This is used by the startup in order to initialize the .bss section */ - . = ALIGN(4); - __START_BSS = .; - __bss_start__ = .; - *(.bss) - *(.bss*) - *(COMMON) - . = ALIGN(4); - __bss_end__ = .; - __END_BSS = .; - } > m_data - - .heap : - { - . = ALIGN(8); - __end__ = .; - PROVIDE(end = .); - __HeapBase = .; - . += HEAP_SIZE; - __HeapLimit = .; - __heap_limit = .; /* Add for _sbrk */ - } > m_data - - .stack : - { - . = ALIGN(8); - . += STACK_SIZE; - } > m_data - - /* Initializes stack on the end of block */ - __StackTop = ORIGIN(m_data) + LENGTH(m_data); - __StackLimit = __StackTop - STACK_SIZE; - PROVIDE(__stack = __StackTop); - - .ARM.attributes 0 : { *(.ARM.attributes) } - - ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") -} diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/board.h b/hw/bsp/kinetis_k32l/boards/kuiic/board.h deleted file mode 100644 index 1e2d4f18b..000000000 --- a/hw/bsp/kinetis_k32l/boards/kuiic/board.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - - -#ifndef BOARD_H_ -#define BOARD_H_ - -#include "fsl_device_registers.h" - -// LED -#define LED_PIN_CLOCK kCLOCK_PortA -#define LED_GPIO GPIOA -#define LED_PORT PORTA -#define LED_PIN 2 -#define LED_STATE_ON 1 - -// UART -#define UART_PORT LPUART1 -#define UART_PIN_RX 3u -#define UART_PIN_TX 0u - -#endif /* BOARD_H_ */ diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/board.mk b/hw/bsp/kinetis_k32l/boards/kuiic/board.mk deleted file mode 100644 index 29a12e982..000000000 --- a/hw/bsp/kinetis_k32l/boards/kuiic/board.mk +++ /dev/null @@ -1,26 +0,0 @@ -MCU = K32L2B31A - -# This board uses TinyUF2 for updates -UF2_FAMILY_ID = 0x7f83e793 - -CFLAGS += \ - -mcpu=cortex-m0plus \ - -DCPU_K32L2B31VLH0A \ - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls - -# All source paths should be relative to the top level. -LD_FILE = $(BOARD_PATH)/K32L2B31xxxxA_flash.ld - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - -# For flash-jlink target -JLINK_DEVICE = K32L2B31xxxxA - -# For flash-pyocd target -PYOCD_TARGET = K32L2B - -# flash using pyocd -flash: flash-pyocd diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/kuiic.c b/hw/bsp/kinetis_k32l/boards/kuiic/kuiic.c deleted file mode 100644 index f9002a6d3..000000000 --- a/hw/bsp/kinetis_k32l/boards/kuiic/kuiic.c +++ /dev/null @@ -1,203 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * Copyright (c) 2020, Koji Kitayama - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "bsp/board.h" -#include "board.h" -#include "fsl_smc.h" -#include "fsl_gpio.h" -#include "fsl_port.h" -#include "fsl_clock.h" -#include "fsl_lpuart.h" - -/******************************************************************************* - * Definitions - ******************************************************************************/ -#define SIM_OSC32KSEL_LPO_CLK 3U /*!< OSC32KSEL select: LPO clock */ -#define SOPT5_LPUART1RXSRC_LPUART_RX 0x00u /*!<@brief LPUART1 Receive Data Source Select: LPUART_RX pin */ -#define SOPT5_LPUART1TXSRC_LPUART_TX 0x00u /*!<@brief LPUART1 Transmit Data Source Select: LPUART_TX pin */ -#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ - -/******************************************************************************* - * Variables - ******************************************************************************/ -/* System clock frequency. */ -// extern uint32_t SystemCoreClock; - -/******************************************************************************* - * Variables for BOARD_BootClockRUN configuration - ******************************************************************************/ -const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN = { - .outSrc = kMCGLITE_ClkSrcHirc, /* MCGOUTCLK source is HIRC */ - .irclkEnableMode = kMCGLITE_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */ - .ircs = kMCGLITE_Lirc8M, /* Slow internal reference (LIRC) 8 MHz clock selected */ - .fcrdiv = kMCGLITE_LircDivBy1, /* Low-frequency Internal Reference Clock Divider: divided by 1 */ - .lircDiv2 = kMCGLITE_LircDivBy1, /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */ - .hircEnableInNotHircMode = true, /* HIRC source is enabled */ -}; -const sim_clock_config_t simConfig_BOARD_BootClockRUN = { - .er32kSrc = SIM_OSC32KSEL_LPO_CLK, /* OSC32KSEL select: LPO clock */ - .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */ -}; - -/******************************************************************************* - * Code for BOARD_BootClockRUN configuration - ******************************************************************************/ -void BOARD_BootClockRUN(void) -{ - /* Set the system clock dividers in SIM to safe value. */ - CLOCK_SetSimSafeDivs(); - /* Set MCG to HIRC mode. */ - CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockRUN); - /* Set the clock configuration in SIM module. */ - CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN); - /* Set SystemCoreClock variable. */ - SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; -} - - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB0_IRQHandler(void) -{ - tud_int_handler(0); -} - -void board_init(void) -{ - /* Enable port clocks for GPIO pins */ - CLOCK_EnableClock(kCLOCK_PortA); - CLOCK_EnableClock(kCLOCK_PortB); - CLOCK_EnableClock(kCLOCK_PortC); - CLOCK_EnableClock(kCLOCK_PortD); - CLOCK_EnableClock(kCLOCK_PortE); - - - gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 1 }; - GPIO_PinInit(GPIOA, 1U, &led_config); - PORT_SetPinMux(PORTA, 1U, kPORT_MuxAsGpio); - led_config.outputLogic = 0; - GPIO_PinInit(GPIOA, 2U, &led_config); - PORT_SetPinMux(PORTA, 2U, kPORT_MuxAsGpio); - -#ifdef BUTTON_PIN - gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; - GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); - const port_pin_config_t BUTTON_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_LowDriveStrength, - kPORT_MuxAsGpio - }; - PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); -#endif - - /* PORTC3 is configured as LPUART0_RX */ - PORT_SetPinMux(PORTC, 3U, kPORT_MuxAlt3); - /* PORTA2 (pin 24) is configured as LPUART0_TX */ - PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt3); - - SIM->SOPT5 = ((SIM->SOPT5 & - /* Mask bits to zero which are setting */ - (~(SIM_SOPT5_LPUART1TXSRC_MASK | SIM_SOPT5_LPUART1RXSRC_MASK))) - /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */ - | SIM_SOPT5_LPUART1TXSRC(SOPT5_LPUART1TXSRC_LPUART_TX) - /* LPUART0 Receive Data Source Select: LPUART_RX pin. */ - | SIM_SOPT5_LPUART1RXSRC(SOPT5_LPUART1RXSRC_LPUART_RX)); - - BOARD_BootClockRUN(); - SystemCoreClockUpdate(); - CLOCK_SetLpuart1Clock(1); - -#if CFG_TUSB_OS == OPT_OS_NONE - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); -#endif - - lpuart_config_t uart_config; - LPUART_GetDefaultConfig(&uart_config); - uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; - uart_config.enableTx = true; - uart_config.enableRx = true; - LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_McgIrc48MClk)); - - // USB - CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - if (state) { - LED_GPIO->PDDR |= GPIO_FIT_REG((1UL << LED_PIN)); - } else { - LED_GPIO->PDDR &= GPIO_FIT_REG(~(1UL << LED_PIN)); - } -// GPIO_PinWrite(GPIOA, 1, state ? LED_STATE_ON : (1-LED_STATE_ON) ); -// GPIO_PinWrite(GPIOA, 2, state ? (1-LED_STATE_ON) : LED_STATE_ON ); -} - -uint32_t board_button_read(void) -{ -#ifdef BUTTON_PIN - return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); -#else - return 0; -#endif -} - -int board_uart_read(uint8_t* buf, int len) -{ - LPUART_ReadBlocking(UART_PORT, buf, len); - return len; -} - -int board_uart_write(void const * buf, int len) -{ - LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); - return len; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif diff --git a/hw/bsp/kinetis_k32l/family.mk b/hw/bsp/kinetis_k32l/family.mk deleted file mode 100644 index 41f22e250..000000000 --- a/hw/bsp/kinetis_k32l/family.mk +++ /dev/null @@ -1,32 +0,0 @@ -SDK_DIR = hw/mcu/nxp/mcux-sdk -DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 - -MCU_DIR = $(SDK_DIR)/devices/$(MCU) -include $(TOP)/$(BOARD_PATH)/board.mk - -CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -DCFG_TUSB_MCU=OPT_MCU_KINETIS_K32 - -SRC_C += \ - src/portable/nxp/khci/dcd_khci.c \ - src/portable/nxp/khci/hcd_khci.c \ - $(MCU_DIR)/system_$(MCU).c \ - $(MCU_DIR)/drivers/fsl_clock.c \ - $(SDK_DIR)/drivers/gpio/fsl_gpio.c \ - $(SDK_DIR)/drivers/lpuart/fsl_lpuart.c - -INC += \ - $(TOP)/$(BOARD_PATH) \ - $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ - $(TOP)/$(MCU_DIR) \ - $(TOP)/$(MCU_DIR)/project_template \ - $(TOP)/$(MCU_DIR)/drivers \ - $(TOP)/$(SDK_DIR)/drivers/smc \ - $(TOP)/$(SDK_DIR)/drivers/common \ - $(TOP)/$(SDK_DIR)/drivers/gpio \ - $(TOP)/$(SDK_DIR)/drivers/port \ - $(TOP)/$(SDK_DIR)/drivers/lpuart \ - -SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h new file mode 100644 index 000000000..b1f38c997 --- /dev/null +++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h @@ -0,0 +1,58 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + + +#ifndef BOARD_H_ +#define BOARD_H_ + +#include "fsl_device_registers.h" + +// LED +// The Red LED is on PTE29. +// The Green LED is on PTC4. +// The Blue LED is on PTE31. +#define LED_PIN_CLOCK kCLOCK_PortC +#define LED_GPIO GPIOC +#define LED_PORT PORTC +#define LED_PIN 4 +#define LED_STATE_ON 0 + +// SW3 button1 +#define BUTTON_PIN_CLOCK kCLOCK_PortE +#define BUTTON_GPIO GPIOE +#define BUTTON_PORT PORTE +#define BUTTON_PIN 4 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_PORT LPUART0 +#define UART_PIN_CLOCK kCLOCK_PortB +#define UART_PIN_GPIO GPIOB +#define UART_PIN_PORT PORTB +#define UART_PIN_RX 16u +#define UART_PIN_TX 17u + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk new file mode 100644 index 000000000..f69700139 --- /dev/null +++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk @@ -0,0 +1,21 @@ +MCU = K32L2A41A + +CFLAGS += -DCPU_K32L2A41VLH1A + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual + +# All source paths should be relative to the top level. +LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld + +SRC_C += \ + $(MCU_DIR)/project_template/clock_config.c \ + +# For flash-jlink target +JLINK_DEVICE = K32L2A41xxxxA + +# For flash-pyocd target +PYOCD_TARGET = K32L2A + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/frdm_k32l2a4s.c new file mode 100644 index 000000000..80830163b --- /dev/null +++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/frdm_k32l2a4s.c @@ -0,0 +1,171 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * Copyright (c) 2020, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "bsp/board.h" +#include "board.h" +#include "fsl_gpio.h" +#include "fsl_port.h" +#include "fsl_clock.h" +#include "fsl_lpuart.h" + +#include "clock_config.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ + tud_int_handler(0); +} + +void board_init(void) +{ + /* Enable port clocks for UART/LED/Button pins */ + CLOCK_EnableClock(UART_PIN_CLOCK); + CLOCK_EnableClock(LED_PIN_CLOCK); + CLOCK_EnableClock(BUTTON_PIN_CLOCK); + + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit(LED_GPIO, LED_PIN, &led_config); + PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); + + gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); + const port_pin_config_t BUTTON_CFG = { + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_OpenDrainDisable, + kPORT_LowDriveStrength, + kPORT_MuxAsGpio, + kPORT_UnlockRegister + }; + PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); + + /* + Enable LPUART0 clock and configure port pins. + FIR clock is being used so the USB examples work. + */ + PCC_LPUART0 = 0U; /* Clock must be off to set PCS */ + PCC_LPUART0 = PCC_CLKCFG_PCS( 3U ); /* Select the clock. 1:OSCCLK/Bus Clock, 2:Slow IRC, 3: Fast IRC, 6: System PLL */ + PCC_LPUART0 |= PCC_CLKCFG_CGC( 1U ); /* Enable LPUART */ + + /* PORTB16 (pin 62) is configured as LPUART0_RX */ + gpio_pin_config_t const lpuart_config_rx = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(UART_PIN_GPIO, UART_PIN_RX, &lpuart_config_rx); + const port_pin_config_t UART_CFG = { + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_OpenDrainDisable, + kPORT_LowDriveStrength, + kPORT_MuxAsGpio, + kPORT_UnlockRegister + }; + PORT_SetPinConfig(UART_PIN_PORT, UART_PIN_RX, &UART_CFG); + PORT_SetPinMux( UART_PIN_PORT, UART_PIN_RX, kPORT_MuxAlt3); + + /* PORTB17 (pin 63) is configured as LPUART0_TX */ + gpio_pin_config_t const lpuart_config_tx = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit( UART_PIN_GPIO, UART_PIN_TX, &lpuart_config_tx); + PORT_SetPinMux( UART_PIN_PORT, UART_PIN_TX, kPORT_MuxAlt3); + + BOARD_BootClockRUN(); + SystemCoreClockUpdate(); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + lpuart_config_t uart_config; + LPUART_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_ScgFircClk)); + + // USB + CLOCK_EnableUsbfs0Clock(kCLOCK_IpSrcFircAsync, 48000000U); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); +} + +int board_uart_read(uint8_t* buf, int len) +{ +#if 0 /* + Use this version if want the LED to blink during BOARD=board_test, + without having to hit a key. + */ + if( 0U != (kLPUART_RxDataRegFullFlag & LPUART_GetStatusFlags( UART_PORT )) ) + { + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; + } + + return( 0 ); +#else /* Wait for 'len' characters to come in */ + + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; + +#endif +} + +int board_uart_write(void const * buf, int len) +{ + LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h new file mode 100644 index 000000000..8d21fdcd4 --- /dev/null +++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h @@ -0,0 +1,56 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + + +#ifndef BOARD_H_ +#define BOARD_H_ + +#include "fsl_device_registers.h" + +// LED +#define LED_PIN_CLOCK kCLOCK_PortD +#define LED_GPIO GPIOD +#define LED_PORT PORTD +#define LED_PIN 5 +#define LED_STATE_ON 0 + +// SW3 button1 +#define BUTTON_PIN_CLOCK kCLOCK_PortC +#define BUTTON_GPIO GPIOC +#define BUTTON_PORT PORTC +#define BUTTON_PIN 3 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_PORT LPUART0 +#define UART_PIN_CLOCK kCLOCK_PortA +#define UART_PIN_PORT PORTA +#define UART_PIN_RX 1u +#define UART_PIN_TX 2u +#define SOPT5_LPUART0RXSRC_LPUART_RX 0x00u /*!<@brief LPUART0 Receive Data Source Select: LPUART_RX pin */ +#define SOPT5_LPUART0TXSRC_LPUART_TX 0x00u /*!<@brief LPUART0 Transmit Data Source Select: LPUART0_TX pin */ + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk new file mode 100644 index 000000000..82456b721 --- /dev/null +++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk @@ -0,0 +1,21 @@ +MCU = K32L2B31A + +CFLAGS += -DCPU_K32L2B31VLH0A + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls + +# All source paths should be relative to the top level. +LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld + +SRC_C += \ + $(MCU_DIR)/project_template/clock_config.c \ + +# For flash-jlink target +JLINK_DEVICE = K32L2B31xxxxA + +# For flash-pyocd target +PYOCD_TARGET = K32L2B + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c new file mode 100644 index 000000000..1566b4e2e --- /dev/null +++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c @@ -0,0 +1,140 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * Copyright (c) 2020, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "bsp/board.h" +#include "board.h" +#include "fsl_gpio.h" +#include "fsl_port.h" +#include "fsl_clock.h" +#include "fsl_lpuart.h" + +#include "clock_config.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ + tud_int_handler(0); +} + +void board_init(void) +{ + /* Enable port clocks for UART/LED/Button pins */ + CLOCK_EnableClock(UART_PIN_CLOCK); + CLOCK_EnableClock(LED_PIN_CLOCK); + CLOCK_EnableClock(BUTTON_PIN_CLOCK); + + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit(LED_GPIO, LED_PIN, &led_config); + PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); + + gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); + const port_pin_config_t BUTTON_CFG = { + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_LowDriveStrength, + kPORT_MuxAsGpio + }; + PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); + + /* PORTA1 (pin 23) is configured as LPUART0_RX */ + PORT_SetPinMux(PORTA, 1U, kPORT_MuxAlt2); + /* PORTA2 (pin 24) is configured as LPUART0_TX */ + PORT_SetPinMux(PORTA, 2U, kPORT_MuxAlt2); + + SIM->SOPT5 = ((SIM->SOPT5 & + /* Mask bits to zero which are setting */ + (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK))) + /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */ + | SIM_SOPT5_LPUART0TXSRC(SOPT5_LPUART0TXSRC_LPUART_TX) + /* LPUART0 Receive Data Source Select: LPUART_RX pin. */ + | SIM_SOPT5_LPUART0RXSRC(SOPT5_LPUART0RXSRC_LPUART_RX)); + + BOARD_BootClockRUN(); + SystemCoreClockUpdate(); + CLOCK_SetLpuart0Clock(1); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + lpuart_config_t uart_config; + LPUART_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_McgIrc48MClk)); + + // USB + CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); +} + +int board_uart_read(uint8_t* buf, int len) +{ + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; +} + +int board_uart_write(void const * buf, int len) +{ + LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/K32L2B31xxxxA_flash.ld b/hw/bsp/kinetis_k32l2/boards/kuiic/K32L2B31xxxxA_flash.ld new file mode 100644 index 000000000..f478a99c7 --- /dev/null +++ b/hw/bsp/kinetis_k32l2/boards/kuiic/K32L2B31xxxxA_flash.ld @@ -0,0 +1,216 @@ +/* +** ################################################################### +** Processors: K32L2B31VFM0A +** K32L2B31VFT0A +** K32L2B31VLH0A +** K32L2B31VMP0A +** +** Compiler: GNU C Compiler +** Reference manual: K32L2B3xRM, Rev.0, July 2019 +** Version: rev. 1.0, 2019-07-30 +** Build: b190930 +** +** Abstract: +** Linker file for the GNU C Compiler +** +** Copyright 2016 Freescale Semiconductor, Inc. +** Copyright 2016-2019 NXP +** All rights reserved. +** +** SPDX-License-Identifier: BSD-3-Clause +** +** http: www.nxp.com +** mail: support@nxp.com +** +** ################################################################### +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; +STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; + +/* Specify the memory areas */ +MEMORY +{ + m_interrupts (RX) : ORIGIN = 0x00008000, LENGTH = 0x00000200 + m_flash_config (RX) : ORIGIN = 0x00008400, LENGTH = 0x00000010 + m_text (RX) : ORIGIN = 0x00008410, LENGTH = 0x00037BF0 + m_data (RW) : ORIGIN = 0x1FFFE000, LENGTH = 0x00008000 +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into internal flash */ + .interrupts : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > m_interrupts + + .flash_config : + { + . = ALIGN(4); + KEEP(*(.FlashConfig)) /* Flash Configuration Field (FCF) */ + . = ALIGN(4); + } > m_flash_config + + /* The program code and other data goes into internal flash */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + KEEP (*(.init)) + KEEP (*(.fini)) + . = ALIGN(4); + } > m_text + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > m_text + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } > m_text + + .ctors : + { + __CTOR_LIST__ = .; + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + } > m_text + + .dtors : + { + __DTOR_LIST__ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + } > m_text + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } > m_text + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } > m_text + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } > m_text + + __etext = .; /* define a global symbol at end of code */ + __DATA_ROM = .; /* Symbol is used by startup for data initialization */ + + /* reserve MTB memory at the beginning of m_data */ + .mtb : /* MTB buffer address as defined by the hardware */ + { + . = ALIGN(8); + _mtb_start = .; + KEEP(*(.mtb_buf)) /* need to KEEP Micro Trace Buffer as not referenced by application */ + . = ALIGN(8); + _mtb_end = .; + } > m_data + + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + __DATA_RAM = .; + __data_start__ = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + KEEP(*(.jcr*)) + . = ALIGN(4); + __data_end__ = .; /* define a global symbol at data end */ + } > m_data + + __DATA_END = __DATA_ROM + (__data_end__ - __data_start__); + text_end = ORIGIN(m_text) + LENGTH(m_text); + ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data") + + /* Uninitialized data section */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + . = ALIGN(4); + __START_BSS = .; + __bss_start__ = .; + *(.bss) + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + __END_BSS = .; + } > m_data + + .heap : + { + . = ALIGN(8); + __end__ = .; + PROVIDE(end = .); + __HeapBase = .; + . += HEAP_SIZE; + __HeapLimit = .; + __heap_limit = .; /* Add for _sbrk */ + } > m_data + + .stack : + { + . = ALIGN(8); + . += STACK_SIZE; + } > m_data + + /* Initializes stack on the end of block */ + __StackTop = ORIGIN(m_data) + LENGTH(m_data); + __StackLimit = __StackTop - STACK_SIZE; + PROVIDE(__stack = __StackTop); + + .ARM.attributes 0 : { *(.ARM.attributes) } + + ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") +} diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/board.h b/hw/bsp/kinetis_k32l2/boards/kuiic/board.h new file mode 100644 index 000000000..1e2d4f18b --- /dev/null +++ b/hw/bsp/kinetis_k32l2/boards/kuiic/board.h @@ -0,0 +1,45 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + + +#ifndef BOARD_H_ +#define BOARD_H_ + +#include "fsl_device_registers.h" + +// LED +#define LED_PIN_CLOCK kCLOCK_PortA +#define LED_GPIO GPIOA +#define LED_PORT PORTA +#define LED_PIN 2 +#define LED_STATE_ON 1 + +// UART +#define UART_PORT LPUART1 +#define UART_PIN_RX 3u +#define UART_PIN_TX 0u + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/board.mk b/hw/bsp/kinetis_k32l2/boards/kuiic/board.mk new file mode 100644 index 000000000..fc5bdeec8 --- /dev/null +++ b/hw/bsp/kinetis_k32l2/boards/kuiic/board.mk @@ -0,0 +1,18 @@ +MCU = K32L2B31A + +CFLAGS += -DCPU_K32L2B31VLH0A + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/K32L2B31xxxxA_flash.ld + +# For flash-jlink target +JLINK_DEVICE = K32L2B31xxxxA + +# For flash-pyocd target +PYOCD_TARGET = K32L2B + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c b/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c new file mode 100644 index 000000000..f9002a6d3 --- /dev/null +++ b/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c @@ -0,0 +1,203 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * Copyright (c) 2020, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "bsp/board.h" +#include "board.h" +#include "fsl_smc.h" +#include "fsl_gpio.h" +#include "fsl_port.h" +#include "fsl_clock.h" +#include "fsl_lpuart.h" + +/******************************************************************************* + * Definitions + ******************************************************************************/ +#define SIM_OSC32KSEL_LPO_CLK 3U /*!< OSC32KSEL select: LPO clock */ +#define SOPT5_LPUART1RXSRC_LPUART_RX 0x00u /*!<@brief LPUART1 Receive Data Source Select: LPUART_RX pin */ +#define SOPT5_LPUART1TXSRC_LPUART_TX 0x00u /*!<@brief LPUART1 Transmit Data Source Select: LPUART_TX pin */ +#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ + +/******************************************************************************* + * Variables + ******************************************************************************/ +/* System clock frequency. */ +// extern uint32_t SystemCoreClock; + +/******************************************************************************* + * Variables for BOARD_BootClockRUN configuration + ******************************************************************************/ +const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN = { + .outSrc = kMCGLITE_ClkSrcHirc, /* MCGOUTCLK source is HIRC */ + .irclkEnableMode = kMCGLITE_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */ + .ircs = kMCGLITE_Lirc8M, /* Slow internal reference (LIRC) 8 MHz clock selected */ + .fcrdiv = kMCGLITE_LircDivBy1, /* Low-frequency Internal Reference Clock Divider: divided by 1 */ + .lircDiv2 = kMCGLITE_LircDivBy1, /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */ + .hircEnableInNotHircMode = true, /* HIRC source is enabled */ +}; +const sim_clock_config_t simConfig_BOARD_BootClockRUN = { + .er32kSrc = SIM_OSC32KSEL_LPO_CLK, /* OSC32KSEL select: LPO clock */ + .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */ +}; + +/******************************************************************************* + * Code for BOARD_BootClockRUN configuration + ******************************************************************************/ +void BOARD_BootClockRUN(void) +{ + /* Set the system clock dividers in SIM to safe value. */ + CLOCK_SetSimSafeDivs(); + /* Set MCG to HIRC mode. */ + CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockRUN); + /* Set the clock configuration in SIM module. */ + CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN); + /* Set SystemCoreClock variable. */ + SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; +} + + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ + tud_int_handler(0); +} + +void board_init(void) +{ + /* Enable port clocks for GPIO pins */ + CLOCK_EnableClock(kCLOCK_PortA); + CLOCK_EnableClock(kCLOCK_PortB); + CLOCK_EnableClock(kCLOCK_PortC); + CLOCK_EnableClock(kCLOCK_PortD); + CLOCK_EnableClock(kCLOCK_PortE); + + + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 1 }; + GPIO_PinInit(GPIOA, 1U, &led_config); + PORT_SetPinMux(PORTA, 1U, kPORT_MuxAsGpio); + led_config.outputLogic = 0; + GPIO_PinInit(GPIOA, 2U, &led_config); + PORT_SetPinMux(PORTA, 2U, kPORT_MuxAsGpio); + +#ifdef BUTTON_PIN + gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; + GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); + const port_pin_config_t BUTTON_CFG = { + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_LowDriveStrength, + kPORT_MuxAsGpio + }; + PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); +#endif + + /* PORTC3 is configured as LPUART0_RX */ + PORT_SetPinMux(PORTC, 3U, kPORT_MuxAlt3); + /* PORTA2 (pin 24) is configured as LPUART0_TX */ + PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt3); + + SIM->SOPT5 = ((SIM->SOPT5 & + /* Mask bits to zero which are setting */ + (~(SIM_SOPT5_LPUART1TXSRC_MASK | SIM_SOPT5_LPUART1RXSRC_MASK))) + /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */ + | SIM_SOPT5_LPUART1TXSRC(SOPT5_LPUART1TXSRC_LPUART_TX) + /* LPUART0 Receive Data Source Select: LPUART_RX pin. */ + | SIM_SOPT5_LPUART1RXSRC(SOPT5_LPUART1RXSRC_LPUART_RX)); + + BOARD_BootClockRUN(); + SystemCoreClockUpdate(); + CLOCK_SetLpuart1Clock(1); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + lpuart_config_t uart_config; + LPUART_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_McgIrc48MClk)); + + // USB + CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + if (state) { + LED_GPIO->PDDR |= GPIO_FIT_REG((1UL << LED_PIN)); + } else { + LED_GPIO->PDDR &= GPIO_FIT_REG(~(1UL << LED_PIN)); + } +// GPIO_PinWrite(GPIOA, 1, state ? LED_STATE_ON : (1-LED_STATE_ON) ); +// GPIO_PinWrite(GPIOA, 2, state ? (1-LED_STATE_ON) : LED_STATE_ON ); +} + +uint32_t board_button_read(void) +{ +#ifdef BUTTON_PIN + return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); +#else + return 0; +#endif +} + +int board_uart_read(uint8_t* buf, int len) +{ + LPUART_ReadBlocking(UART_PORT, buf, len); + return len; +} + +int board_uart_write(void const * buf, int len) +{ + LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/kinetis_k32l2/family.mk b/hw/bsp/kinetis_k32l2/family.mk new file mode 100644 index 000000000..357485762 --- /dev/null +++ b/hw/bsp/kinetis_k32l2/family.mk @@ -0,0 +1,32 @@ +UF2_FAMILY_ID = 0x7f83e793 +SDK_DIR = hw/mcu/nxp/mcux-sdk +DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 +MCU_DIR = $(SDK_DIR)/devices/$(MCU) + +include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m0plus + +CFLAGS += \ + -DCFG_TUSB_MCU=OPT_MCU_KINETIS_K32L + +SRC_C += \ + src/portable/nxp/khci/dcd_khci.c \ + src/portable/nxp/khci/hcd_khci.c \ + $(MCU_DIR)/system_$(MCU).c \ + $(MCU_DIR)/drivers/fsl_clock.c \ + $(SDK_DIR)/drivers/gpio/fsl_gpio.c \ + $(SDK_DIR)/drivers/lpuart/fsl_lpuart.c + +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ + $(TOP)/$(MCU_DIR) \ + $(TOP)/$(MCU_DIR)/project_template \ + $(TOP)/$(MCU_DIR)/drivers \ + $(TOP)/$(SDK_DIR)/drivers/smc \ + $(TOP)/$(SDK_DIR)/drivers/common \ + $(TOP)/$(SDK_DIR)/drivers/gpio \ + $(TOP)/$(SDK_DIR)/drivers/port \ + $(TOP)/$(SDK_DIR)/drivers/lpuart \ + +SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 56525725e..9f3be78fd 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -97,7 +97,7 @@ #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_RHPORT_HIGHSPEED 1 -#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32) +#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L) #define TUP_USBIP_CHIPIDEA_FS #define TUP_USBIP_CHIPIDEA_FS_KINETIS #define TUP_DCD_ENDPOINT_MAX 16 diff --git a/src/tusb_option.h b/src/tusb_option.h index 43e67cf64..f16d8a5d0 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -119,7 +119,8 @@ // NXP Kinetis #define OPT_MCU_KINETIS_KL 1200 ///< NXP KL series -#define OPT_MCU_KINETIS_K32 1201 ///< NXP K32 series +#define OPT_MCU_KINETIS_K32L 1201 ///< NXP K32L series +#define OPT_MCU_KINETIS_K32 1201 ///< Alias to K32L #define OPT_MCU_MKL25ZXX 1200 ///< Alias to KL (obsolete) #define OPT_MCU_K32L2BXX 1201 ///< Alias to K32 (obsolete) diff --git a/tools/get_deps.py b/tools/get_deps.py index 7e798cf9e..b81dabae0 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -52,7 +52,7 @@ deps_optional = { 'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'], 'hw/mcu/nxp/mcux-sdk': ['https://github.com/hathach/mcux-sdk.git', '950819b7de9b32f92c3edf396bc5ffb8d66e7009', - 'kinetis_k32l lpc51 lpc54 lpc55 mcx imxrt'], + 'kinetis_k32l2 lpc51 lpc54 lpc55 mcx imxrt'], 'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git', 'c3715ce94b6f6391856de56081d4d9b3e98fa93d', 'rp2040'], @@ -166,7 +166,7 @@ deps_optional = { 'ch32v307'], 'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git', '20285262657d1b482d132d20d755c8c330d55c1f', - 'imxrt kinetis_k32l lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x' + 'imxrt kinetis_k32l2 lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x' 'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 ' 'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb'], 'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git', -- cgit v1.3.1 From e43387abaca2044f96017481ccb00b3b68dbdc2a Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 27 Jun 2023 15:45:38 +0700 Subject: rework cmake with rtos support add RTOS to family_configure_device/host/dual_example() --- examples/device/audio_4_channel_mic/CMakeLists.txt | 6 +- examples/device/audio_test/CMakeLists.txt | 6 +- .../device/audio_test_multi_rate/CMakeLists.txt | 6 +- examples/device/board_test/CMakeLists.txt | 6 +- examples/device/cdc_dual_ports/CMakeLists.txt | 6 +- examples/device/cdc_msc/CMakeLists.txt | 2 +- examples/device/cdc_msc_freertos/CMakeLists.txt | 9 +- examples/device/dfu/CMakeLists.txt | 6 +- examples/device/dfu_runtime/CMakeLists.txt | 6 +- .../device/dynamic_configuration/CMakeLists.txt | 6 +- examples/device/hid_boot_interface/CMakeLists.txt | 6 +- examples/device/hid_composite/CMakeLists.txt | 6 +- .../device/hid_composite_freertos/CMakeLists.txt | 9 +- examples/device/hid_generic_inout/CMakeLists.txt | 6 +- .../device/hid_multiple_interface/CMakeLists.txt | 6 +- examples/device/midi_test/CMakeLists.txt | 6 +- examples/device/msc_dual_lun/CMakeLists.txt | 6 +- examples/device/net_lwip_webserver/CMakeLists.txt | 6 +- examples/device/uac2_headset/CMakeLists.txt | 6 +- examples/device/usbtmc/CMakeLists.txt | 6 +- examples/device/video_capture/CMakeLists.txt | 6 +- examples/device/webusb_serial/CMakeLists.txt | 6 +- .../dual/host_hid_to_device_cdc/CMakeLists.txt | 6 +- examples/host/bare_api/CMakeLists.txt | 6 +- examples/host/cdc_msc_hid/CMakeLists.txt | 6 +- examples/host/hid_controller/CMakeLists.txt | 6 +- examples/host/msc_file_explorer/CMakeLists.txt | 6 +- examples/typec/power_delivery/CMakeLists.txt | 6 +- examples/typec/power_delivery/src/tusb_config.h | 14 +- hw/bsp/family_support.cmake | 164 ++++++++++++--------- hw/bsp/imxrt/family.cmake | 19 +-- hw/bsp/kinetis_kl/family.cmake | 19 +-- hw/bsp/lpc18/family.cmake | 19 +-- hw/bsp/lpc55/family.cmake | 19 +-- hw/bsp/mcx/family.cmake | 19 +-- hw/bsp/nrf/family.cmake | 19 +-- hw/bsp/rp2040/family.cmake | 43 ++++-- hw/bsp/stm32f0/family.cmake | 19 +-- hw/bsp/stm32f1/family.cmake | 19 +-- hw/bsp/stm32f7/family.cmake | 19 +-- hw/bsp/stm32g0/family.cmake | 19 +-- hw/bsp/stm32g4/family.cmake | 19 +-- hw/bsp/stm32h7/family.cmake | 19 +-- hw/bsp/stm32l4/family.cmake | 19 +-- src/common/tusb_compiler.h | 8 +- test/fuzz/device/cdc/CMakeLists.txt | 18 +-- test/fuzz/device/msc/CMakeLists.txt | 6 +- test/fuzz/device/net/CMakeLists.txt | 6 +- 48 files changed, 272 insertions(+), 404 deletions(-) (limited to 'src/common') diff --git a/examples/device/audio_4_channel_mic/CMakeLists.txt b/examples/device/audio_4_channel_mic/CMakeLists.txt index 87b7d07d4..f61e1b640 100644 --- a/examples/device/audio_4_channel_mic/CMakeLists.txt +++ b/examples/device/audio_4_channel_mic/CMakeLists.txt @@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/audio_test/CMakeLists.txt b/examples/device/audio_test/CMakeLists.txt index 87b7d07d4..f61e1b640 100644 --- a/examples/device/audio_test/CMakeLists.txt +++ b/examples/device/audio_test/CMakeLists.txt @@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/audio_test_multi_rate/CMakeLists.txt b/examples/device/audio_test_multi_rate/CMakeLists.txt index 87b7d07d4..f61e1b640 100644 --- a/examples/device/audio_test_multi_rate/CMakeLists.txt +++ b/examples/device/audio_test_multi_rate/CMakeLists.txt @@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/board_test/CMakeLists.txt b/examples/device/board_test/CMakeLists.txt index 4ab8d5a65..012eff095 100644 --- a/examples/device/board_test/CMakeLists.txt +++ b/examples/device/board_test/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/cdc_dual_ports/CMakeLists.txt b/examples/device/cdc_dual_ports/CMakeLists.txt index 87b7d07d4..f61e1b640 100644 --- a/examples/device/cdc_dual_ports/CMakeLists.txt +++ b/examples/device/cdc_dual_ports/CMakeLists.txt @@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/cdc_msc/CMakeLists.txt b/examples/device/cdc_msc/CMakeLists.txt index 4ec172f17..9415f8c68 100644 --- a/examples/device/cdc_msc/CMakeLists.txt +++ b/examples/device/cdc_msc/CMakeLists.txt @@ -32,4 +32,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt index 319ad0356..33c7a1ec0 100644 --- a/examples/device/cdc_msc_freertos/CMakeLists.txt +++ b/examples/device/cdc_msc_freertos/CMakeLists.txt @@ -30,9 +30,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) - -# Add FreeRTOS for this example -family_add_freertos(${PROJECT}) +# Configure compilation flags and libraries for the example with FreeRTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} freertos) diff --git a/examples/device/dfu/CMakeLists.txt b/examples/device/dfu/CMakeLists.txt index eb4c198d6..a01eb3456 100644 --- a/examples/device/dfu/CMakeLists.txt +++ b/examples/device/dfu/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/dfu_runtime/CMakeLists.txt b/examples/device/dfu_runtime/CMakeLists.txt index eb4c198d6..a01eb3456 100644 --- a/examples/device/dfu_runtime/CMakeLists.txt +++ b/examples/device/dfu_runtime/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/dynamic_configuration/CMakeLists.txt b/examples/device/dynamic_configuration/CMakeLists.txt index 046a32257..2b20d2234 100644 --- a/examples/device/dynamic_configuration/CMakeLists.txt +++ b/examples/device/dynamic_configuration/CMakeLists.txt @@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/hid_boot_interface/CMakeLists.txt b/examples/device/hid_boot_interface/CMakeLists.txt index eb4c198d6..a01eb3456 100644 --- a/examples/device/hid_boot_interface/CMakeLists.txt +++ b/examples/device/hid_boot_interface/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/hid_composite/CMakeLists.txt b/examples/device/hid_composite/CMakeLists.txt index eb4c198d6..a01eb3456 100644 --- a/examples/device/hid_composite/CMakeLists.txt +++ b/examples/device/hid_composite/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/hid_composite_freertos/CMakeLists.txt b/examples/device/hid_composite_freertos/CMakeLists.txt index 211904cf9..eb22014fb 100644 --- a/examples/device/hid_composite_freertos/CMakeLists.txt +++ b/examples/device/hid_composite_freertos/CMakeLists.txt @@ -29,9 +29,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) - -# Add FreeRTOS for this example -family_add_freertos(${PROJECT}) +# Configure compilation flags and libraries for the example with FreeRTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} freertos) diff --git a/examples/device/hid_generic_inout/CMakeLists.txt b/examples/device/hid_generic_inout/CMakeLists.txt index eb4c198d6..a01eb3456 100644 --- a/examples/device/hid_generic_inout/CMakeLists.txt +++ b/examples/device/hid_generic_inout/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/hid_multiple_interface/CMakeLists.txt b/examples/device/hid_multiple_interface/CMakeLists.txt index eb4c198d6..a01eb3456 100644 --- a/examples/device/hid_multiple_interface/CMakeLists.txt +++ b/examples/device/hid_multiple_interface/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/midi_test/CMakeLists.txt b/examples/device/midi_test/CMakeLists.txt index 5b1a5547d..e51f14c02 100644 --- a/examples/device/midi_test/CMakeLists.txt +++ b/examples/device/midi_test/CMakeLists.txt @@ -26,6 +26,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/msc_dual_lun/CMakeLists.txt b/examples/device/msc_dual_lun/CMakeLists.txt index dc8d5512c..e69fead35 100644 --- a/examples/device/msc_dual_lun/CMakeLists.txt +++ b/examples/device/msc_dual_lun/CMakeLists.txt @@ -29,6 +29,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/net_lwip_webserver/CMakeLists.txt b/examples/device/net_lwip_webserver/CMakeLists.txt index 2c21aa52b..1e34428fe 100644 --- a/examples/device/net_lwip_webserver/CMakeLists.txt +++ b/examples/device/net_lwip_webserver/CMakeLists.txt @@ -88,6 +88,6 @@ elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") endif () -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/uac2_headset/CMakeLists.txt b/examples/device/uac2_headset/CMakeLists.txt index d142e9c04..e92a57148 100644 --- a/examples/device/uac2_headset/CMakeLists.txt +++ b/examples/device/uac2_headset/CMakeLists.txt @@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/usbtmc/CMakeLists.txt b/examples/device/usbtmc/CMakeLists.txt index a6b22ab36..a63ca2d81 100644 --- a/examples/device/usbtmc/CMakeLists.txt +++ b/examples/device/usbtmc/CMakeLists.txt @@ -29,6 +29,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/video_capture/CMakeLists.txt b/examples/device/video_capture/CMakeLists.txt index e0bd975c4..80dc39ca5 100644 --- a/examples/device/video_capture/CMakeLists.txt +++ b/examples/device/video_capture/CMakeLists.txt @@ -34,6 +34,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/webusb_serial/CMakeLists.txt b/examples/device/webusb_serial/CMakeLists.txt index d142e9c04..e92a57148 100644 --- a/examples/device/webusb_serial/CMakeLists.txt +++ b/examples/device/webusb_serial/CMakeLists.txt @@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt index c6d19a720..a6557c2d0 100644 --- a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt +++ b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt @@ -23,9 +23,9 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_dual_usb_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_dual_usb_example(${PROJECT} noos) # due to warnings from Pico-PIO-USB target_compile_options(${PROJECT} PUBLIC diff --git a/examples/host/bare_api/CMakeLists.txt b/examples/host/bare_api/CMakeLists.txt index b6d8c9c89..95af48718 100644 --- a/examples/host/bare_api/CMakeLists.txt +++ b/examples/host/bare_api/CMakeLists.txt @@ -22,9 +22,9 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_host_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_host_example(${PROJECT} noos) # Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host if(FAMILY STREQUAL "rp2040") diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt index 68b52e274..3fdc832ab 100644 --- a/examples/host/cdc_msc_hid/CMakeLists.txt +++ b/examples/host/cdc_msc_hid/CMakeLists.txt @@ -25,9 +25,9 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_host_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_host_example(${PROJECT} noos) # Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host if(FAMILY STREQUAL "rp2040") diff --git a/examples/host/hid_controller/CMakeLists.txt b/examples/host/hid_controller/CMakeLists.txt index e27f83c53..d1d901b53 100644 --- a/examples/host/hid_controller/CMakeLists.txt +++ b/examples/host/hid_controller/CMakeLists.txt @@ -23,9 +23,9 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_host_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_host_example(${PROJECT} noos) # Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host if(FAMILY STREQUAL "rp2040") diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt index 327d1218a..99c797275 100644 --- a/examples/host/msc_file_explorer/CMakeLists.txt +++ b/examples/host/msc_file_explorer/CMakeLists.txt @@ -35,9 +35,9 @@ target_include_directories(${PROJECT} PUBLIC ${TOP}/lib/embedded-cli ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_host_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_host_example(${PROJECT} noos) # Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host if(FAMILY STREQUAL "rp2040") diff --git a/examples/typec/power_delivery/CMakeLists.txt b/examples/typec/power_delivery/CMakeLists.txt index 4ab8d5a65..012eff095 100644 --- a/examples/typec/power_delivery/CMakeLists.txt +++ b/examples/typec/power_delivery/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/typec/power_delivery/src/tusb_config.h b/examples/typec/power_delivery/src/tusb_config.h index deddcbfa4..f7cb3cc04 100644 --- a/examples/typec/power_delivery/src/tusb_config.h +++ b/examples/typec/power_delivery/src/tusb_config.h @@ -30,11 +30,6 @@ extern "C" { #endif -// special example that doesn't enable device or host stack -// This can cause some TinyUSB API missing, this define hack to allow us to fill those API -// to pass the compilation process -#define tud_int_handler(x) - //-------------------------------------------------------------------- // COMMON CONFIGURATION //-------------------------------------------------------------------- @@ -54,6 +49,15 @@ // Enable TYPEC stack #define CFG_TUC_ENABLED 1 + +// special example that doesn't enable device or host stack +// This can cause some TinyUSB API missing, this define hack to allow us to fill those API +// to pass the compilation process +#if CFG_TUD_ENABLED == 0 +#define tud_int_handler(x) +#endif + + // CFG_TUSB_DEBUG is defined by compiler in DEBUG build // #define CFG_TUSB_DEBUG 0 diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index 93cab8723..781c67bf7 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -64,6 +64,8 @@ set(WARNING_FLAGS_GNU set(WARNINGS_FLAGS_IAR "") + +# Filter example based on only.txt and skip.txt function(family_filter RESULT DIR) get_filename_component(DIR ${DIR} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_SOURCE_DIR}) @@ -142,112 +144,136 @@ function(family_initialize_project PROJECT DIR) endfunction() -# Add segger rtt to example -function(family_add_segger_rtt TARGET) - if (NOT TARGET segger_rtt) - add_library(segger_rtt STATIC - ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c - ) - target_include_directories(segger_rtt PUBLIC ${TOP}/lib/SEGGER_RTT/RTT) - endif() +#------------------------------------------------------------- +# Common Target Configure +# Most families use these settings except rp2040 and espressif +#------------------------------------------------------------- + +# Add RTOS to example +function(family_add_rtos TARGET RTOS) + if (RTOS STREQUAL "freertos") + # freertos config + if (NOT TARGET freertos_config) + add_library(freertos_config INTERFACE) + target_include_directories(freertos_config INTERFACE ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig) + # add board definition to freertos_config mostly for SystemCoreClock + target_link_libraries(freertos_config INTERFACE board_${BOARD}) + endif() + + # freertos kernel + if (NOT TARGET freertos_kernel) + add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel) + endif () - target_link_libraries(${TARGET} PUBLIC segger_rtt) + target_link_libraries(${TARGET} PUBLIC freertos_kernel) + endif () endfunction() -#------------------------------------ -# Main target configure -#------------------------------------ # Add common configuration to example -function(family_configure_common TARGET) +function(family_configure_common TARGET RTOS) + family_add_rtos(${TARGET} ${RTOS}) + # run size after build add_custom_command(TARGET ${TARGET} POST_BUILD COMMAND ${CMAKE_SIZE} $ ) + # Add warnings flags target_compile_options(${TARGET} PUBLIC ${WARNING_FLAGS_${CMAKE_C_COMPILER_ID}}) + # Generate linker map file if (CMAKE_C_COMPILER_ID STREQUAL "GNU") - # Generate map file - target_link_options(${TARGET} PUBLIC - # link map - "LINKER:-Map=$.map" - ) + target_link_options(${TARGET} PUBLIC "LINKER:-Map=$.map") endif() - # LOGGER - if (DEFINED LOGGER) - target_compile_definitions(${TARGET} PUBLIC LOGGER_${LOGGER}) - if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt") - family_add_segger_rtt(${TARGET}) - endif () - endif () - - # ETM Trace + # ETM Trace option if (TRACE_ETM STREQUAL "1") target_compile_definitions(${TARGET} PUBLIC TRACE_ETM) endif () -endfunction() - - -# configure an executable target to link to tinyusb in device mode, and add the board implementation -function(family_configure_device_example TARGET) - # default implementation is empty, the function should be redefined in the FAMILY/family.cmake -endfunction() - + # LOGGER option + if (DEFINED LOGGER) + target_compile_definitions(${TARGET} PUBLIC LOGGER_${LOGGER}) -# configure an executable target to link to tinyusb in host mode, and add the board implementation -function(family_configure_host_example TARGET) - # default implementation is empty, the function should be redefined in the FAMILY/family.cmake + # Add segger rtt to example + if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt") + if (NOT TARGET segger_rtt) + add_library(segger_rtt STATIC ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c) + target_include_directories(segger_rtt PUBLIC ${TOP}/lib/SEGGER_RTT/RTT) + endif() + target_link_libraries(${TARGET} PUBLIC segger_rtt) + endif () + endif () endfunction() # Add tinyusb to example -function(family_add_tinyusb TARGET OPT_MCU) +function(family_add_tinyusb TARGET OPT_MCU RTOS) # tinyusb target is built for each example since it depends on example's tusb_config.h set(TINYUSB_TARGET_PREFIX ${TARGET}-) add_library(${TARGET}-tinyusb_config INTERFACE) + # path to tusb_config.h target_include_directories(${TARGET}-tinyusb_config INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}/src) target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUSB_MCU=${OPT_MCU}) + if (DEFINED LOG) target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUSB_DEBUG=${LOG}) endif() + if (RTOS STREQUAL "freertos") + target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUSB_OS=OPT_OS_FREERTOS) + endif () + # tinyusb's CMakeList.txt add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb) + + if (RTOS STREQUAL "freertos") + # link tinyusb with freeRTOS kernel + target_link_libraries(${TARGET}-tinyusb PUBLIC freertos_kernel) + endif () endfunction() -# Add freeRTOS support to example -function(family_add_freertos TARGET) - # freeros config - if (NOT TARGET freertos_config) - add_library(freertos_config INTERFACE) - target_include_directories(freertos_config INTERFACE - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig - ) - # add board definition to freertos_config mostly for SystemCoreClock - target_link_libraries(freertos_config INTERFACE board_${BOARD}) - endif() +# Add bin/hex output +function(family_add_bin_hex TARGET) + add_custom_command(TARGET ${TARGET} POST_BUILD + COMMAND ${CMAKE_OBJCOPY} -Obinary $ $/${TARGET}.bin + COMMAND ${CMAKE_OBJCOPY} -Oihex $ $/${TARGET}.hex + VERBATIM) +endfunction() - # freertos kernel should be generic as freertos_config however, CMAKE complains with missing variable - # such as CMAKE_C_COMPILE_OBJECT - if (NOT TARGET freertos_kernel) - add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel) - endif () - # Add FreeRTOS option to tinyusb_config - target_compile_definitions(${TARGET}-tinyusb_config INTERFACE - CFG_TUSB_OS=OPT_OS_FREERTOS - ) - # link tinyusb with freeRTOS kernel - target_link_libraries(${TARGET}-tinyusb PUBLIC freertos_kernel) - target_link_libraries(${TARGET} PUBLIC freertos_kernel) +#---------------------------------- +# Example Target Configure (Default rule) +# These function can be redefined in FAMILY/family.cmake +#---------------------------------- + +function(family_configure_example TARGET RTOS) + # empty function, should be redefined in FAMILY/family.cmake +endfunction() + +# Configure device example with RTOS +function(family_configure_device_example TARGET RTOS) + family_configure_example(${TARGET} ${RTOS}) +endfunction() + + +# Configure host example with RTOS +function(family_configure_host_example TARGET RTOS) + family_configure_example(${TARGET} ${RTOS}) endfunction() +# Configure host + device example with RTOS +function(family_configure_dual_usb_example TARGET RTOS) + family_configure_example(${TARGET} ${RTOS}) +endfunction() + +#---------------------------------- +# RPI specific: refactor later +#---------------------------------- function(family_add_default_example_warnings TARGET) target_compile_options(${TARGET} PUBLIC -Wall @@ -294,16 +320,6 @@ function(family_add_default_example_warnings TARGET) endif() endfunction() - -# Add bin/hex output -function(family_add_bin_hex TARGET) - add_custom_command(TARGET ${TARGET} POST_BUILD - COMMAND ${CMAKE_OBJCOPY} -Obinary $ $/${TARGET}.bin - COMMAND ${CMAKE_OBJCOPY} -Oihex $ $/${TARGET}.hex - VERBATIM) -endfunction() - - #---------------------------------- # Flashing target #---------------------------------- @@ -374,6 +390,10 @@ function(family_flash_nxplink TARGET) endfunction() +#---------------------------------- +# Family specific +#---------------------------------- + # family specific: can override above functions include(${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake) diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake index 4a9842cf9..aaedfc9d6 100644 --- a/hw/bsp/imxrt/family.cmake +++ b/hw/bsp/imxrt/family.cmake @@ -94,8 +94,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -115,7 +115,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX) + family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -130,16 +130,3 @@ function(family_configure_example TARGET) family_flash_jlink(${TARGET}) #family_flash_nxplink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake index 5d4165185..4df3d1ed1 100644 --- a/hw/bsp/kinetis_kl/family.cmake +++ b/hw/bsp/kinetis_kl/family.cmake @@ -78,8 +78,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -99,7 +99,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_KL) + family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_KL ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c ${TOP}/src/portable/nxp/khci/hcd_khci.c @@ -113,16 +113,3 @@ function(family_configure_example TARGET) family_flash_jlink(${TARGET}) #family_flash_nxplink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake index 4e6e2b56d..da71a0e5d 100644 --- a/hw/bsp/lpc18/family.cmake +++ b/hw/bsp/lpc18/family.cmake @@ -70,8 +70,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -91,7 +91,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_LPC18XX) + family_add_tinyusb(${TARGET} OPT_MCU_LPC18XX ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -106,16 +106,3 @@ function(family_configure_example TARGET) family_flash_jlink(${TARGET}) #family_flash_nxplink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake index e443f47d3..dfd08a732 100644 --- a/hw/bsp/lpc55/family.cmake +++ b/hw/bsp/lpc55/family.cmake @@ -87,8 +87,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -117,7 +117,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_LPC55XX) + family_add_tinyusb(${TARGET} OPT_MCU_LPC55XX ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c ) @@ -131,16 +131,3 @@ function(family_configure_example TARGET) #family_flash_nxplink(${TARGET}) #family_flash_pyocd(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake index 83f44222b..f548ac4f3 100644 --- a/hw/bsp/mcx/family.cmake +++ b/hw/bsp/mcx/family.cmake @@ -79,8 +79,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -100,7 +100,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_MCXN9) + family_add_tinyusb(${TARGET} OPT_MCU_MCXN9 ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS ${TOP}/src/portable/chipidea/$ @@ -115,16 +115,3 @@ function(family_configure_example TARGET) #family_flash_nxplink(${TARGET}) #family_flash_pyocd(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake index 825380d0b..30fd41d7b 100644 --- a/hw/bsp/nrf/family.cmake +++ b/hw/bsp/nrf/family.cmake @@ -97,8 +97,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -118,7 +118,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_NRF5X) + family_add_tinyusb(${TARGET} OPT_MCU_NRF5X ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c ) @@ -132,16 +132,3 @@ function(family_configure_example TARGET) # Flashing family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index 2d37f8be9..b986b3ebb 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -11,6 +11,7 @@ include(${CMAKE_CURRENT_LIST_DIR}/pico_sdk_import.cmake) # include basic family CMake functionality set(FAMILY_MCUS RP2040) +set(JLINK_DEVICE rp2040_m0_0) include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) @@ -143,12 +144,23 @@ endif() # Functions #------------------------------------ -function(family_configure_target TARGET) +function(family_configure_target TARGET RTOS) + if (RTOS STREQUAL noos OR RTOS STREQUAL "") + set(RTOS_SUFFIX "") + else() + set(RTOS_SUFFIX _${RTOS}) + endif() + # export RTOS_SUFFIX to parent scope + set(RTOS_SUFFIX ${RTOS_SUFFIX} PARENT_SCOPE) + pico_add_extra_outputs(${TARGET}) pico_enable_stdio_uart(${TARGET} 1) - target_link_libraries(${TARGET} PUBLIC pico_stdlib pico_bootsel_via_double_reset tinyusb_board tinyusb_additions) + target_link_libraries(${TARGET} PUBLIC pico_stdlib pico_bootsel_via_double_reset tinyusb_board${RTOS_SUFFIX} tinyusb_additions) + + family_flash_jlink(${TARGET}) endfunction() + function(rp2040_family_configure_example_warnings TARGET) if (NOT PICO_TINYUSB_NO_EXAMPLE_WARNINGS) family_add_default_example_warnings(${TARGET}) @@ -159,19 +171,22 @@ function(rp2040_family_configure_example_warnings TARGET) suppress_tinyusb_warnings() endfunction() -function(family_configure_device_example TARGET) - family_configure_target(${TARGET}) - target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device) + +function(family_configure_device_example TARGET RTOS) + family_configure_target(${TARGET} ${RTOS}) + target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device${RTOS_SUFFIX}) rp2040_family_configure_example_warnings(${TARGET}) endfunction() + function(family_add_pico_pio_usb TARGET) target_link_libraries(${TARGET} PUBLIC tinyusb_pico_pio_usb) endfunction() -function(family_configure_host_example TARGET) - family_configure_target(${TARGET}) - target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_host) + +function(family_configure_host_example TARGET RTOS) + family_configure_target(${TARGET} ${RTOS}) + target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_host${RTOS_SUFFIX}) rp2040_family_configure_example_warnings(${TARGET}) # For rp2040 enable pico-pio-usb @@ -183,13 +198,15 @@ function(family_configure_host_example TARGET) endif() endfunction() -function(family_configure_dual_usb_example TARGET) - family_configure_target(${TARGET}) + +function(family_configure_dual_usb_example TARGET RTOS) + family_configure_target(${TARGET} ${RTOS}) # require tinyusb_pico_pio_usb target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device tinyusb_host tinyusb_pico_pio_usb ) rp2040_family_configure_example_warnings(${TARGET}) endfunction() + function(check_and_add_pico_pio_usb_support) # check for pico_generate_pio_header (as depending on environment we may be called before SDK is # initialized in which case it isn't available yet), and only do the initialization once @@ -243,6 +260,7 @@ endfunction() # when included by the SDK itself) check_and_add_pico_pio_usb_support() + function(family_initialize_project PROJECT DIR) # call the original version of this function from family_common.cmake _family_initialize_project(${PROJECT} ${DIR}) @@ -253,6 +271,7 @@ function(family_initialize_project PROJECT DIR) check_and_add_pico_pio_usb_support() endfunction() + # This method must be called from the project scope to suppress known warnings in TinyUSB source files function(suppress_tinyusb_warnings) # some of these are pretty silly warnings only occurring in some older GCC versions 9 or prior @@ -327,7 +346,3 @@ function(suppress_tinyusb_warnings) COMPILE_FLAGS "-Wno-cast-qual") endif() endfunction() - -# rp2040 does not support freeRTOS example yet -function(family_add_freertos TARGET) -endfunction() diff --git a/hw/bsp/stm32f0/family.cmake b/hw/bsp/stm32f0/family.cmake index ecf6a8424..73f43de82 100644 --- a/hw/bsp/stm32f0/family.cmake +++ b/hw/bsp/stm32f0/family.cmake @@ -84,8 +84,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -105,7 +105,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_STM32F0) + family_add_tinyusb(${TARGET} OPT_MCU_STM32F0 ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c ) @@ -118,16 +118,3 @@ function(family_configure_example TARGET) family_flash_stlink(${TARGET}) #family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/stm32f1/family.cmake b/hw/bsp/stm32f1/family.cmake index ab46c9872..efe41bc1b 100644 --- a/hw/bsp/stm32f1/family.cmake +++ b/hw/bsp/stm32f1/family.cmake @@ -81,8 +81,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -102,7 +102,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_STM32F1) + family_add_tinyusb(${TARGET} OPT_MCU_STM32F1 ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c ) @@ -115,16 +115,3 @@ function(family_configure_example TARGET) family_flash_stlink(${TARGET}) #family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/stm32f7/family.cmake b/hw/bsp/stm32f7/family.cmake index 3b6ba1a15..30bde9b0d 100644 --- a/hw/bsp/stm32f7/family.cmake +++ b/hw/bsp/stm32f7/family.cmake @@ -86,8 +86,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -107,7 +107,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_STM32F7) + family_add_tinyusb(${TARGET} OPT_MCU_STM32F7 ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c ) @@ -120,16 +120,3 @@ function(family_configure_example TARGET) family_flash_stlink(${TARGET}) family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake index fa93566bf..f7b665090 100644 --- a/hw/bsp/stm32g0/family.cmake +++ b/hw/bsp/stm32g0/family.cmake @@ -84,8 +84,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -105,7 +105,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_STM32G0) + family_add_tinyusb(${TARGET} OPT_MCU_STM32G0 ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c ${TOP}/src/portable/st/typec/typec_stm32.c @@ -119,16 +119,3 @@ function(family_configure_example TARGET) family_flash_stlink(${TARGET}) #family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake index c89993f6d..3c7633d64 100644 --- a/hw/bsp/stm32g4/family.cmake +++ b/hw/bsp/stm32g4/family.cmake @@ -84,8 +84,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -105,7 +105,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_STM32G4) + family_add_tinyusb(${TARGET} OPT_MCU_STM32G4 ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c ${TOP}/src/portable/st/typec/typec_stm32.c @@ -119,16 +119,3 @@ function(family_configure_example TARGET) family_flash_stlink(${TARGET}) family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake index f3705edb4..1a8c4354c 100644 --- a/hw/bsp/stm32h7/family.cmake +++ b/hw/bsp/stm32h7/family.cmake @@ -89,8 +89,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -110,7 +110,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_STM32H7) + family_add_tinyusb(${TARGET} OPT_MCU_STM32H7 ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c ) @@ -123,16 +123,3 @@ function(family_configure_example TARGET) family_flash_stlink(${TARGET}) family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake index 83c51c9bf..da017cdde 100644 --- a/hw/bsp/stm32l4/family.cmake +++ b/hw/bsp/stm32l4/family.cmake @@ -86,8 +86,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -107,7 +107,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS}) + family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS} ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -121,16 +121,3 @@ function(family_configure_example TARGET) family_flash_stlink(${TARGET}) family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 5ab56e145..6f07bdd53 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -128,7 +128,9 @@ #define TU_ATTR_SECTION(sec_name) __attribute__ ((section(#sec_name))) #define TU_ATTR_PACKED __attribute__ ((packed)) #define TU_ATTR_WEAK __attribute__ ((weak)) - #define TU_ATTR_ALWAYS_INLINE __attribute__ ((always_inline)) + #ifndef TU_ATTR_ALWAYS_INLINE // allow to override for debug + #define TU_ATTR_ALWAYS_INLINE __attribute__ ((always_inline)) + #endif #define TU_ATTR_DEPRECATED(mess) __attribute__ ((deprecated(mess))) // warn if function with this attribute is used #define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused #define TU_ATTR_USED __attribute__ ((used)) // Function/Variable is meant to be used @@ -205,7 +207,9 @@ #define TU_ATTR_SECTION(sec_name) __attribute__ ((section(#sec_name))) #define TU_ATTR_PACKED __attribute__ ((packed)) #define TU_ATTR_WEAK __attribute__ ((weak)) - #define TU_ATTR_ALWAYS_INLINE __attribute__ ((always_inline)) + #ifndef TU_ATTR_ALWAYS_INLINE // allow to override for debug + #define TU_ATTR_ALWAYS_INLINE __attribute__ ((always_inline)) + #endif #define TU_ATTR_DEPRECATED(mess) __attribute__ ((deprecated(mess))) // warn if function with this attribute is used #define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused #define TU_ATTR_USED __attribute__ ((used)) // Function/Variable is meant to be used diff --git a/test/fuzz/device/cdc/CMakeLists.txt b/test/fuzz/device/cdc/CMakeLists.txt index 8e4db9d29..c60f292b9 100644 --- a/test/fuzz/device/cdc/CMakeLists.txt +++ b/test/fuzz/device/cdc/CMakeLists.txt @@ -14,16 +14,16 @@ add_executable(${PROJECT}) # Example source target_sources(${PROJECT} PUBLIC - ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c - ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk.c - ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c - ) + ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c + ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk.c + ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c + ) # Example include target_include_directories(${PROJECT} PUBLIC - ${CMAKE_CURRENT_SOURCE_DIR}/src - ) + ${CMAKE_CURRENT_SOURCE_DIR}/src + ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/test/fuzz/device/msc/CMakeLists.txt b/test/fuzz/device/msc/CMakeLists.txt index 8e4db9d29..8bff217cb 100644 --- a/test/fuzz/device/msc/CMakeLists.txt +++ b/test/fuzz/device/msc/CMakeLists.txt @@ -24,6 +24,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/test/fuzz/device/net/CMakeLists.txt b/test/fuzz/device/net/CMakeLists.txt index 8e4db9d29..8bff217cb 100644 --- a/test/fuzz/device/net/CMakeLists.txt +++ b/test/fuzz/device/net/CMakeLists.txt @@ -24,6 +24,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) -- cgit v1.3.1 From 0693462ebad20338de78aeb93d60d6c3c73a6ca7 Mon Sep 17 00:00:00 2001 From: Lars Pötter Date: Sun, 2 Jul 2023 09:02:24 +0200 Subject: made line ends consistent. --- src/class/cdc/cdc_host.c | 4 ++-- src/class/video/video_device.c | 16 +++++++------- src/common/tusb_fifo.c | 2 +- src/portable/dialog/da146xx/dcd_da146xx.c | 2 +- src/portable/mentor/musb/dcd_musb.c | 30 +++++++++++++------------- src/portable/mentor/musb/hcd_musb.c | 8 +++---- src/portable/nxp/khci/hcd_khci.c | 16 +++++++------- src/portable/raspberrypi/rp2040/hcd_rp2040.c | 4 ++-- src/portable/raspberrypi/rp2040/rp2040_usb.c | 4 ++-- src/portable/renesas/rusb2/hcd_rusb2.c | 8 +++---- src/portable/st/typec/typec_stm32.c | 18 ++++++++-------- src/portable/sunxi/dcd_sunxi_musb.c | 32 ++++++++++++++-------------- 12 files changed, 72 insertions(+), 72 deletions(-) (limited to 'src/common') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index ce9f27c33..e1af8d801 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -973,7 +973,7 @@ static uint32_t ftdi_232bm_baud_to_divisor(uint32_t baud) static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { uint16_t const divisor = (uint16_t) ftdi_232bm_baud_to_divisor(baudrate); - TU_LOG_DRV("CDC FTDI Set BaudRate = %lu, divisor = 0x%04x\n", baudrate, divisor); + TU_LOG_DRV("CDC FTDI Set BaudRate = %lu, divisor = 0x%04x\r\n", baudrate, divisor); p_cdc->user_control_cb = complete_cb; _ftdi_requested_baud = baudrate; @@ -1108,7 +1108,7 @@ static bool cp210x_ifc_enable(cdch_interface_t* p_cdc, uint16_t enabled, tuh_xfe } static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { - TU_LOG_DRV("CDC CP210x Set BaudRate = %lu\n", baudrate); + TU_LOG_DRV("CDC CP210x Set BaudRate = %lu\r\n", baudrate); uint32_t baud_le = tu_htole32(baudrate); p_cdc->user_control_cb = complete_cb; return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baud_le, 4, diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index 91f452afc..16eae0ced 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -609,17 +609,17 @@ static bool _close_vc_itf(uint8_t rhport, videod_interface_t *self) * @param[in] altnum The target alternate setting number. */ static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, uint_fast8_t altnum) { - TU_LOG2(" open VC %d\n", altnum); + TU_LOG2(" open VC %d\r\n", altnum); uint8_t const *beg = self->beg; uint8_t const *end = beg + self->len; /* The first descriptor is a video control interface descriptor. */ uint8_t const *cur = _find_desc_itf(beg, end, _desc_itfnum(beg), altnum); - TU_LOG2(" cur %d\n", cur - beg); + TU_LOG2(" cur %d\r\n", cur - beg); TU_VERIFY(cur < end); tusb_desc_vc_itf_t const *vc = (tusb_desc_vc_itf_t const *)cur; - TU_LOG2(" bInCollection %d\n", vc->ctl.bInCollection); + TU_LOG2(" bInCollection %d\r\n", vc->ctl.bInCollection); /* Support for up to 2 streaming interfaces only. */ TU_ASSERT(vc->ctl.bInCollection <= CFG_TUD_VIDEO_STREAMING); @@ -628,7 +628,7 @@ static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, uint_fast8_t /* Advance to the next descriptor after the class-specific VC interface header descriptor. */ cur += vc->std.bLength + vc->ctl.bLength; - TU_LOG2(" bNumEndpoints %d\n", vc->std.bNumEndpoints); + TU_LOG2(" bNumEndpoints %d\r\n", vc->std.bNumEndpoints); /* Open the notification endpoint if it exist. */ if (vc->std.bNumEndpoints) { /* Support for 1 endpoint only. */ @@ -662,7 +662,7 @@ static bool _init_vs_configuration(videod_streaming_interface_t *stm) static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint_fast8_t altnum) { uint_fast8_t i; - TU_LOG2(" reopen VS %d\n", altnum); + TU_LOG2(" reopen VS %d\r\n", altnum); uint8_t const *desc = _videod_itf[stm->index_vc].beg; /* Close endpoints of previous settings. */ @@ -672,7 +672,7 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint uint8_t ep_adr = _desc_ep_addr(desc + ofs_ep); usbd_edpt_close(rhport, ep_adr); stm->desc.ep[i] = 0; - TU_LOG2(" close EP%02x\n", ep_adr); + TU_LOG2(" close EP%02x\r\n", ep_adr); } /* clear transfer management information */ @@ -709,12 +709,12 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint } TU_ASSERT(usbd_edpt_open(rhport, ep)); stm->desc.ep[i] = (uint16_t) (cur - desc); - TU_LOG2(" open EP%02x\n", _desc_ep_addr(cur)); + TU_LOG2(" open EP%02x\r\n", _desc_ep_addr(cur)); } if (altnum) { stm->state = VS_STATE_STREAMING; } - TU_LOG2(" done\n"); + TU_LOG2(" done\r\n"); return true; } diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index a52c92267..d6c3db4ce 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -539,7 +539,7 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu // Advance index f->wr_idx = advance_index(f->depth, wr_idx, n); - TU_LOG(TU_FIFO_DBG, "\tnew_wr = %u\n", f->wr_idx); + TU_LOG(TU_FIFO_DBG, "\tnew_wr = %u\r\n", f->wr_idx); } _ff_unlock(f->mutex_wr); diff --git a/src/portable/dialog/da146xx/dcd_da146xx.c b/src/portable/dialog/da146xx/dcd_da146xx.c index 961da81d6..d1e85c2df 100644 --- a/src/portable/dialog/da146xx/dcd_da146xx.c +++ b/src/portable/dialog/da146xx/dcd_da146xx.c @@ -651,7 +651,7 @@ static void handle_epx_tx_ev(xfer_ctl_t *xfer) } if (txs & USB_USB_TXS1_REG_USB_TX_URUN_Msk) { - TU_LOG1("EP %d FIFO underrun\n", epnum); + TU_LOG1("EP %d FIFO underrun\r\n", epnum); } // Start next or repeated packet. start_tx_packet(xfer); diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c index 487761847..3c0114e41 100644 --- a/src/portable/mentor/musb/dcd_musb.c +++ b/src/portable/mentor/musb/dcd_musb.c @@ -317,7 +317,7 @@ static bool handle_xfer_in(uint_fast8_t ep_addr) const unsigned mps = regs->TXMAXP; const unsigned len = TU_MIN(mps, rem); void *buf = pipe->buf; - // TU_LOG1(" %p mps %d len %d rem %d\n", buf, mps, len, rem); + // TU_LOG1(" %p mps %d len %d rem %d\r\n", buf, mps, len, rem); if (len) { if (_dcd.pipe_buf_is_fifo[TUSB_DIR_IN] & TU_BIT(epnum_minus1)) { pipe_read_write_packet_ff(buf, &USB0->FIFO1_WORD + epnum_minus1, len, TUSB_DIR_IN); @@ -328,7 +328,7 @@ static bool handle_xfer_in(uint_fast8_t ep_addr) pipe->remaining = rem - len; } regs->TXCSRL = USB_TXCSRL1_TXRDY; - // TU_LOG1(" TXCSRL%d = %x %d\n", epnum_minus1 + 1, regs->TXCSRL, rem - len); + // TU_LOG1(" TXCSRL%d = %x %d\r\n", epnum_minus1 + 1, regs->TXCSRL, rem - len); return false; } @@ -337,7 +337,7 @@ static bool handle_xfer_out(uint_fast8_t ep_addr) unsigned epnum_minus1 = tu_edpt_number(ep_addr) - 1; pipe_state_t *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1]; volatile hw_endpoint_t *regs = edpt_regs(epnum_minus1); - // TU_LOG1(" RXCSRL%d = %x\n", epnum_minus1 + 1, regs->RXCSRL); + // TU_LOG1(" RXCSRL%d = %x\r\n", epnum_minus1 + 1, regs->RXCSRL); TU_ASSERT(regs->RXCSRL & USB_RXCSRL1_RXRDY); @@ -399,14 +399,14 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_ * may have already finished and received the next setup packet * without calling this function, so we have no choice but to * invoke the callback function of status packet here. */ - // TU_LOG1(" STATUS OUT USB0->CSRL0 = %x\n", USB0->CSRL0); + // TU_LOG1(" STATUS OUT USB0->CSRL0 = %x\r\n", USB0->CSRL0); _dcd.status_out = 0; if (req == REQUEST_TYPE_INVALID) { dcd_event_xfer_complete(rhport, ep_addr, total_bytes, XFER_RESULT_SUCCESS, false); } else { /* The next setup packet has already been received, it aborts * invoking callback function to avoid confusing TUSB stack. */ - TU_LOG1("Drop CONTROL_STAGE_ACK\n"); + TU_LOG1("Drop CONTROL_STAGE_ACK\r\n"); } return true; } @@ -431,16 +431,16 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_ } else { USB0->CSRL0 = USB_CSRL0_TXRDY; /* Flush TX FIFO to return ACK. */ } - // TU_LOG1(" IN USB0->CSRL0 = %x\n", USB0->CSRL0); + // TU_LOG1(" IN USB0->CSRL0 = %x\r\n", USB0->CSRL0); } else { - // TU_LOG1(" OUT USB0->CSRL0 = %x\n", USB0->CSRL0); + // TU_LOG1(" OUT USB0->CSRL0 = %x\r\n", USB0->CSRL0); _dcd.pipe0.buf = buffer; _dcd.pipe0.length = len; _dcd.pipe0.remaining = len; USB0->CSRL0 = USB_CSRL0_RXRDYC; /* Clear RX FIFO to return ACK. */ } } else if (dir_in) { - // TU_LOG1(" STATUS IN USB0->CSRL0 = %x\n", USB0->CSRL0); + // TU_LOG1(" STATUS IN USB0->CSRL0 = %x\r\n", USB0->CSRL0); _dcd.pipe0.buf = NULL; _dcd.pipe0.length = 0; _dcd.pipe0.remaining = 0; @@ -454,7 +454,7 @@ static void process_ep0(uint8_t rhport) { uint_fast8_t csrl = USB0->CSRL0; - // TU_LOG1(" EP0 USB0->CSRL0 = %x\n", csrl); + // TU_LOG1(" EP0 USB0->CSRL0 = %x\r\n", csrl); if (csrl & USB_CSRL0_STALLED) { /* Returned STALL packet to HOST. */ @@ -464,7 +464,7 @@ static void process_ep0(uint8_t rhport) unsigned req = _dcd.setup_packet.bmRequestType; if (csrl & USB_CSRL0_SETEND) { - TU_LOG1(" ABORT by the next packets\n"); + TU_LOG1(" ABORT by the next packets\r\n"); USB0->CSRL0 = USB_CSRL0_SETENDC; if (req != REQUEST_TYPE_INVALID && _dcd.pipe0.buf) { /* DATA stage was aborted by receiving STATUS or SETUP packet. */ @@ -539,14 +539,14 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr) volatile hw_endpoint_t *regs = edpt_regs(epn_minus1); if (dir_in) { - // TU_LOG1(" TXCSRL%d = %x\n", epn_minus1 + 1, regs->TXCSRL); + // TU_LOG1(" TXCSRL%d = %x\r\n", epn_minus1 + 1, regs->TXCSRL); if (regs->TXCSRL & USB_TXCSRL1_STALLED) { regs->TXCSRL &= ~(USB_TXCSRL1_STALLED | USB_TXCSRL1_UNDRN); return; } completed = handle_xfer_in(ep_addr); } else { - // TU_LOG1(" RXCSRL%d = %x\n", epn_minus1 + 1, regs->RXCSRL); + // TU_LOG1(" RXCSRL%d = %x\r\n", epn_minus1 + 1, regs->RXCSRL); if (regs->RXCSRL & USB_RXCSRL1_STALLED) { regs->RXCSRL &= ~(USB_RXCSRL1_STALLED | USB_RXCSRL1_OVER); return; @@ -789,7 +789,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t { (void)rhport; bool ret; - // TU_LOG1("X %x %d\n", ep_addr, total_bytes); + // TU_LOG1("X %x %d\r\n", ep_addr, total_bytes); unsigned const epnum = tu_edpt_number(ep_addr); unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn); NVIC_DisableIRQ(USB0_IRQn); @@ -807,7 +807,7 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_ { (void)rhport; bool ret; - // TU_LOG1("X %x %d\n", ep_addr, total_bytes); + // TU_LOG1("X %x %d\r\n", ep_addr, total_bytes); unsigned const epnum = tu_edpt_number(ep_addr); TU_ASSERT(epnum); unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn); @@ -869,7 +869,7 @@ void dcd_int_handler(uint8_t rhport) is = USB0->IS; /* read and clear interrupt status */ txis = USB0->TXIS; /* read and clear interrupt status */ rxis = USB0->RXIS; /* read and clear interrupt status */ - // TU_LOG1("D%2x T%2x R%2x\n", is, txis, rxis); + // TU_LOG1("D%2x T%2x R%2x\r\n", is, txis, rxis); is &= USB0->IE; /* Clear disabled interrupts */ if (is & USB_IS_DISCON) { diff --git a/src/portable/mentor/musb/hcd_musb.c b/src/portable/mentor/musb/hcd_musb.c index 9eb2e005e..7e67b8291 100644 --- a/src/portable/mentor/musb/hcd_musb.c +++ b/src/portable/mentor/musb/hcd_musb.c @@ -418,7 +418,7 @@ static void process_ep0(uint8_t rhport) (void)rhport; uint_fast8_t csrl = USB0->CSRL0; - // TU_LOG1(" EP0 CSRL = %x\n", csrl); + // TU_LOG1(" EP0 CSRL = %x\r\n", csrl); unsigned const dev_addr = USB0->TXFUNCADDR0; unsigned const req = _hcd.bmRequestType; @@ -508,7 +508,7 @@ static void process_pipe_tx(uint8_t rhport, uint_fast8_t pipenum) volatile hw_endpoint_t *regs = edpt_regs(pipenum - 1); unsigned const csrl = regs->TXCSRL; - // TU_LOG1(" TXCSRL%d = %x\n", pipenum, csrl); + // TU_LOG1(" TXCSRL%d = %x\r\n", pipenum, csrl); if (csrl & (USB_TXCSRL1_STALLED | USB_TXCSRL1_ERROR)) { if (csrl & USB_TXCSRL1_TXRDY) regs->TXCSRL = (csrl & ~(USB_TXCSRL1_STALLED | USB_TXCSRL1_ERROR)) | USB_TXCSRL1_FLUSH; @@ -537,7 +537,7 @@ static void process_pipe_rx(uint8_t rhport, uint_fast8_t pipenum) volatile hw_endpoint_t *regs = edpt_regs(pipenum - 1); unsigned const csrl = regs->RXCSRL; - // TU_LOG1(" RXCSRL%d = %x\n", pipenum, csrl); + // TU_LOG1(" RXCSRL%d = %x\r\n", pipenum, csrl); if (csrl & (USB_RXCSRL1_STALLED | USB_RXCSRL1_ERROR)) { if (csrl & USB_RXCSRL1_RXRDY) regs->RXCSRL = (csrl & ~(USB_RXCSRL1_STALLED | USB_RXCSRL1_ERROR)) | USB_RXCSRL1_FLUSH; @@ -846,7 +846,7 @@ void hcd_int_handler(uint8_t rhport) is = USB0->IS; /* read and clear interrupt status */ txis = USB0->TXIS; /* read and clear interrupt status */ rxis = USB0->RXIS; /* read and clear interrupt status */ - // TU_LOG1("D%2x T%2x R%2x\n", is, txis, rxis); + // TU_LOG1("D%2x T%2x R%2x\r\n", is, txis, rxis); is &= USB0->IE; /* Clear disabled interrupts */ if (is & USB_IS_RESUME) { diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c index f6029ee0d..fb978cac8 100644 --- a/src/portable/nxp/khci/hcd_khci.c +++ b/src/portable/nxp/khci/hcd_khci.c @@ -161,7 +161,7 @@ static int prepare_packets(int pipenum) buffer_descriptor_t *bd = _hcd.bdt[dir_tx]; TU_ASSERT(0 == bd[odd].own, -1); - // TU_LOG1(" %p dir %d odd %d data %d\n", &bd[odd], dir_tx, odd, pipe->data); + // TU_LOG1(" %p dir %d odd %d data %d\r\n", &bd[odd], dir_tx, odd, pipe->data); ep->pipenum = pipenum; @@ -251,7 +251,7 @@ static bool resume_transfer(int pipenum) flags |= USB_ENDPT_EPHSHK_MASK | USB_ENDPT_EPCTLDIS_MASK | USB_ENDPT_RETRYDIS_MASK; break; } - // TU_LOG1(" resume pipenum %d flags %x\n", pipenum, flags); + // TU_LOG1(" resume pipenum %d flags %x\r\n", pipenum, flags); KHCI->ENDPOINT[0].ENDPT = flags; KHCI->ADDR = (KHCI->ADDR & USB_ADDR_LSEN_MASK) | pipe->dev_addr; @@ -302,7 +302,7 @@ static void process_tokdne(uint8_t rhport) int pipenum = ep->pipenum; int next_pipenum; - // TU_LOG1("TOKDNE %x PID %x pipe %d\n", s, pid, pipenum); + // TU_LOG1("TOKDNE %x PID %x pipe %d\r\n", s, pid, pipenum); xfer_result_t result; switch (pid) { @@ -479,7 +479,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) { (void)rhport; - // TU_LOG1("SETUP %u\n", dev_addr); + // TU_LOG1("SETUP %u\r\n", dev_addr); TU_ASSERT(0 == (_hcd.in_progress & TU_BIT(0))); int pipenum = find_pipe(dev_addr, 0); @@ -510,7 +510,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const { (void)rhport; uint8_t const ep_addr = ep_desc->bEndpointAddress; - // TU_LOG1("O %u %x\n", dev_addr, ep_addr); + // TU_LOG1("O %u %x\r\n", dev_addr, ep_addr); /* Find a free pipe */ pipe_state_t *p = &_hcd.pipe[0]; pipe_state_t *end = &_hcd.pipe[CFG_TUH_ENDPOINT_MAX * 2]; @@ -543,7 +543,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) { (void)rhport; - // TU_LOG1("X %u %x %x %d\n", dev_addr, ep_addr, (uintptr_t)buffer, buflen); + // TU_LOG1("X %u %x %x %d\r\n", dev_addr, ep_addr, (uintptr_t)buffer, buflen); int pipenum = find_pipe(dev_addr, ep_addr); TU_ASSERT(0 <= pipenum); @@ -580,7 +580,7 @@ void hcd_int_handler(uint8_t rhport) uint32_t is = KHCI->ISTAT; uint32_t msk = KHCI->INTEN; - // TU_LOG1("S %lx\n", is); + // TU_LOG1("S %lx\r\n", is); /* clear disabled interrupts */ KHCI->ISTAT = (is & ~msk & ~USB_ISTAT_TOKDNE_MASK) | USB_ISTAT_SOFTOK_MASK; @@ -589,7 +589,7 @@ void hcd_int_handler(uint8_t rhport) if (is & USB_ISTAT_ERROR_MASK) { unsigned err = KHCI->ERRSTAT; if (err) { - TU_LOG1(" ERR %x\n", err); + TU_LOG1(" ERR %x\r\n", err); KHCI->ERRSTAT = err; } else { KHCI->INTEN &= ~USB_ISTAT_ERROR_MASK; diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index 02f9968a7..51b8bf72d 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -219,7 +219,7 @@ static void __tusb_irq_path_func(hcd_rp2040_irq)(void) if ( status & USB_INTS_BUFF_STATUS_BITS ) { handled |= USB_INTS_BUFF_STATUS_BITS; - TU_LOG(2, "Buffer complete\n"); + TU_LOG(2, "Buffer complete\r\n"); hw_handle_buff_status(); } @@ -227,7 +227,7 @@ static void __tusb_irq_path_func(hcd_rp2040_irq)(void) { handled |= USB_INTS_TRANS_COMPLETE_BITS; usb_hw_clear->sie_status = USB_SIE_STATUS_TRANS_COMPLETE_BITS; - TU_LOG(2, "Transfer complete\n"); + TU_LOG(2, "Transfer complete\r\n"); hw_trans_complete(); } diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index 1f49665ff..53486a586 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -219,7 +219,7 @@ void hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t to if ( ep->active ) { // TODO: Is this acceptable for interrupt packets? - TU_LOG(1, "WARN: starting new transfer on already active ep %d %s\n", tu_edpt_number(ep->ep_addr), + TU_LOG(1, "WARN: starting new transfer on already active ep %d %s\r\n", tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]); hw_endpoint_reset_transfer(ep); @@ -419,7 +419,7 @@ static bool __tusb_irq_path_func(e15_is_critical_frame_period) (struct hw_endpoi if (delta < 800 || delta > 998) { return false; } - TU_LOG(3, "Avoiding sof %lu now %lu last %lu\n", (usb_hw->sof_rd + 1) & USB_SOF_RD_BITS, time_us_32(), e15_last_sof); + TU_LOG(3, "Avoiding sof %lu now %lu last %lu\r\n", (usb_hw->sof_rd + 1) & USB_SOF_RD_BITS, time_us_32(), e15_last_sof); return true; } diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c index 0e6fa1618..886a6f6b8 100644 --- a/src/portable/renesas/rusb2/hcd_rusb2.c +++ b/src/portable/renesas/rusb2/hcd_rusb2.c @@ -409,7 +409,7 @@ static void process_pipe_nrdy(uint8_t rhport, unsigned num) (void)rhport; xfer_result_t result; uint16_t volatile *ctr = get_pipectr(num); - // TU_LOG1("NRDY %d %x\n", num, *ctr); + // TU_LOG1("NRDY %d %x\r\n", num, *ctr); switch (*ctr & RUSB2_PIPE_CTR_PID_Msk) { default: return; case RUSB2_PIPE_CTR_PID_STALL: result = XFER_RESULT_STALLED; break; @@ -608,7 +608,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) { (void)rhport; - // TU_LOG1("S %d %x\n", dev_addr, RUSB2->DCPCTR); + // TU_LOG1("S %d %x\r\n", dev_addr, RUSB2->DCPCTR); TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */ TU_ASSERT(0 == RUSB2->DCPCTR_b.SUREQ); @@ -701,7 +701,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *b { bool r; hcd_int_disable(rhport); - // TU_LOG1("X %d %x %u\n", dev_addr, ep_addr, buflen); + // TU_LOG1("X %d %x %u\r\n", dev_addr, ep_addr, buflen); r = process_edpt_xfer(dev_addr, ep_addr, buffer, buflen); hcd_int_enable(rhport); return r; @@ -745,7 +745,7 @@ void hcd_int_handler(uint8_t rhport) /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */ RUSB2->INTSTS1 = ~((RUSB2_INTSTS1_SACK_Msk | RUSB2_INTSTS1_SIGN_Msk | RUSB2_INTSTS1_ATTCH_Msk | RUSB2_INTSTS1_DTCH_Msk) & is1); RUSB2->INTSTS0 = ~((RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_NRDY_Msk | RUSB2_INTSTS0_BEMP_Msk) & is0); - // TU_LOG1("IS %04x %04x\n", is0, is1); + // TU_LOG1("IS %04x %04x\r\n", is0, is1); is1 &= RUSB2->INTENB1; is0 &= RUSB2->INTENB0; diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c index bf8b660f0..8da2e39ba 100644 --- a/src/portable/st/typec/typec_stm32.c +++ b/src/portable/st/typec/typec_stm32.c @@ -246,7 +246,7 @@ void tcd_int_handler(uint8_t rhport) { v_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; v_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; - TU_LOG3("VState CC1 = %lu, CC2 = %lu\n", v_cc[0], v_cc[1]); + TU_LOG3("VState CC1 = %lu, CC2 = %lu\r\n", v_cc[0], v_cc[1]); uint32_t cr = UCPD1->CR; @@ -255,15 +255,15 @@ void tcd_int_handler(uint8_t rhport) { // FIXME somehow CC2 is vstate is not correct, always 1 even not attached. // on DPOW1 board, it is connected to PA10 (USBPD_DBCC2), we probably miss something. if ((sr & UCPD_SR_TYPECEVT1) && (v_cc[0] == 3)) { - TU_LOG3("Attach CC1\n"); + TU_LOG3("Attach CC1\r\n"); cr &= ~(UCPD_CR_PHYCCSEL | UCPD_CR_CCENABLE); cr |= UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_0; } else if ((sr & UCPD_SR_TYPECEVT2) && (v_cc[1] == 3)) { - TU_LOG3("Attach CC2\n"); + TU_LOG3("Attach CC2\r\n"); cr &= ~UCPD_CR_CCENABLE; cr |= (UCPD_CR_PHYCCSEL | UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_1); } else { - TU_LOG3("Detach\n"); + TU_LOG3("Detach\r\n"); cr &= ~UCPD_CR_PHYRXEN; cr |= UCPD_CR_CCENABLE_0 | UCPD_CR_CCENABLE_1; } @@ -290,7 +290,7 @@ void tcd_int_handler(uint8_t rhport) { //------------- RX -------------// if (sr & UCPD_SR_RXORDDET) { // SOP: Start of Packet. - TU_LOG3("SOP\n"); + TU_LOG3("SOP\r\n"); // UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; // ack @@ -299,7 +299,7 @@ void tcd_int_handler(uint8_t rhport) { // Received full message if (sr & UCPD_SR_RXMSGEND) { - TU_LOG3("RX MSG END\n"); + TU_LOG3("RX MSG END\r\n"); // stop TX dma_stop(rhport, true); @@ -328,7 +328,7 @@ void tcd_int_handler(uint8_t rhport) { } if (sr & UCPD_SR_RXOVR) { - TU_LOG3("RXOVR\n"); + TU_LOG3("RXOVR\r\n"); // ack UCPD1->ICR = UCPD_ICR_RXOVRCF; } @@ -343,12 +343,12 @@ void tcd_int_handler(uint8_t rhport) { uint8_t result; if ( sr & UCPD_SR_TXMSGSENT ) { - TU_LOG3("TX MSG SENT\n"); + TU_LOG3("TX MSG SENT\r\n"); result = XFER_RESULT_SUCCESS; // ack UCPD1->ICR = UCPD_ICR_TXMSGSENTCF; }else { - TU_LOG3("TX Error\n"); + TU_LOG3("TX Error\r\n"); result = XFER_RESULT_FAILED; // ack UCPD1->ICR = UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND; diff --git a/src/portable/sunxi/dcd_sunxi_musb.c b/src/portable/sunxi/dcd_sunxi_musb.c index e26be775d..6cc1975a8 100644 --- a/src/portable/sunxi/dcd_sunxi_musb.c +++ b/src/portable/sunxi/dcd_sunxi_musb.c @@ -408,9 +408,9 @@ static inline unsigned free_block_size(free_block_t const *blk) #if 0 static inline void print_block_list(free_block_t const *blk, unsigned num) { - TU_LOG1("*************\n"); + TU_LOG1("*************\r\n"); for (unsigned i = 0; i < num; ++i) { - TU_LOG1(" Blk%u %u %u\n", i, blk->beg, blk->end); + TU_LOG1(" Blk%u %u %u\r\n", i, blk->beg, blk->end); ++blk; } } @@ -590,7 +590,7 @@ static bool handle_xfer_in(uint_fast8_t ep_addr) const unsigned mps = USBC_Readw(USBC_REG_TXMAXP(USBC0_BASE)); const unsigned len = TU_MIN(mps, rem); uint8_t *buf = pipe->buf; - // TU_LOG1(" %p mps %d len %d rem %d\n", buf, mps, len, rem); + // TU_LOG1(" %p mps %d len %d rem %d\r\n", buf, mps, len, rem); if (len) { volatile void* addr = (volatile void*)(USBC_REG_EPFIFO1(USBC0_BASE) + (epnum_minus1 << 2)); if (_dcd.pipe_buf_is_fifo[TUSB_DIR_IN] & TU_BIT(epnum_minus1)) { @@ -602,7 +602,7 @@ static bool handle_xfer_in(uint_fast8_t ep_addr) pipe->remaining = rem - len; } __USBC_Dev_Tx_WriteDataComplete(); - // TU_LOG1(" TXCSRL%d = %x %d\n", epnum_minus1 + 1, regs->TXCSRL, rem - len); + // TU_LOG1(" TXCSRL%d = %x %d\r\n", epnum_minus1 + 1, regs->TXCSRL, rem - len); return false; } @@ -610,7 +610,7 @@ static bool handle_xfer_out(uint_fast8_t ep_addr) { unsigned epnum_minus1 = tu_edpt_number(ep_addr) - 1; pipe_state_t *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1]; - // TU_LOG1(" RXCSRL%d = %x\n", epnum_minus1 + 1, regs->RXCSRL); + // TU_LOG1(" RXCSRL%d = %x\r\n", epnum_minus1 + 1, regs->RXCSRL); TU_ASSERT(__USBC_Dev_Rx_IsReadDataReady()); @@ -677,14 +677,14 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_ * may have already finished and received the next setup packet * without calling this function, so we have no choice but to * invoke the callback function of status packet here. */ - // TU_LOG1(" STATUS OUT CSRL0 = %x\n", CSRL0); + // TU_LOG1(" STATUS OUT CSRL0 = %x\r\n", CSRL0); _dcd.status_out = 0; if (req == REQUEST_TYPE_INVALID) { dcd_event_xfer_complete(rhport, ep_addr, total_bytes, XFER_RESULT_SUCCESS, false); } else { /* The next setup packet has already been received, it aborts * invoking callback function to avoid confusing TUSB stack. */ - TU_LOG1("Drop CONTROL_STAGE_ACK\n"); + TU_LOG1("Drop CONTROL_STAGE_ACK\r\n"); } return true; } @@ -709,16 +709,16 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_ } else { __USBC_Dev_ep0_WriteDataHalf(); } - // TU_LOG1(" IN CSRL0 = %x\n", CSRL0); + // TU_LOG1(" IN CSRL0 = %x\r\n", CSRL0); } else { - // TU_LOG1(" OUT CSRL0 = %x\n", CSRL0); + // TU_LOG1(" OUT CSRL0 = %x\r\n", CSRL0); _dcd.pipe0.buf = buffer; _dcd.pipe0.length = len; _dcd.pipe0.remaining = len; __USBC_Dev_ep0_ReadDataHalf(); } } else if (dir_in) { - // TU_LOG1(" STATUS IN CSRL0 = %x\n", CSRL0); + // TU_LOG1(" STATUS IN CSRL0 = %x\r\n", CSRL0); _dcd.pipe0.buf = NULL; _dcd.pipe0.length = 0; _dcd.pipe0.remaining = 0; @@ -733,7 +733,7 @@ static void process_ep0(uint8_t rhport) USBC_SelectActiveEp(0); uint_fast8_t csrl = USBC_Readw(USBC_REG_CSR0(USBC0_BASE)); - // TU_LOG1(" EP0 CSRL0 = %x\n", csrl); + // TU_LOG1(" EP0 CSRL0 = %x\r\n", csrl); if (csrl & USB_CSRL0_STALLED) { /* Returned STALL packet to HOST. */ @@ -743,7 +743,7 @@ static void process_ep0(uint8_t rhport) unsigned req = _dcd.setup_packet.bmRequestType; if (csrl & USB_CSRL0_SETEND) { - // TU_LOG1(" ABORT by the next packets\n"); + // TU_LOG1(" ABORT by the next packets\r\n"); USBC_Dev_Ctrl_ClearSetupEnd(); if (req != REQUEST_TYPE_INVALID && _dcd.pipe0.buf) { /* DATA stage was aborted by receiving STATUS or SETUP packet. */ @@ -819,14 +819,14 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr) USBC_SelectActiveEp(epn); if (dir_in) { - // TU_LOG1(" TXCSRL%d = %x\n", epn_minus1 + 1, regs->TXCSRL); + // TU_LOG1(" TXCSRL%d = %x\r\n", epn_minus1 + 1, regs->TXCSRL); if (__USBC_Dev_Tx_IsEpStall()) { __USBC_Dev_Tx_ClearStall(); return; } completed = handle_xfer_in(ep_addr); } else { - // TU_LOG1(" RXCSRL%d = %x\n", epn_minus1 + 1, regs->RXCSRL); + // TU_LOG1(" RXCSRL%d = %x\r\n", epn_minus1 + 1, regs->RXCSRL); if (__USBC_Dev_Rx_IsEpStall()) { __USBC_Dev_Rx_ClearStall(); return; @@ -1092,7 +1092,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t { (void)rhport; bool ret; - // TU_LOG1("X %x %d\n", ep_addr, total_bytes); + // TU_LOG1("X %x %d\r\n", ep_addr, total_bytes); unsigned const epnum = tu_edpt_number(ep_addr); musb_int_mask(); @@ -1111,7 +1111,7 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_ { (void)rhport; bool ret; - // TU_LOG1("X %x %d\n", ep_addr, total_bytes); + // TU_LOG1("X %x %d\r\n", ep_addr, total_bytes); unsigned const epnum = tu_edpt_number(ep_addr); TU_ASSERT(epnum); -- cgit v1.3.1 From f79529c09c6e7c0d6ee5586633ceb8c83e345406 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 5 Jul 2023 17:13:01 +0700 Subject: usb hs work with ra 6m5 ek --- .idea/runConfigurations/ra4m1.xml | 10 ++ .idea/runConfigurations/ra6m1.xml | 10 ++ .idea/runConfigurations/ra6m5.xml | 10 ++ hw/bsp/ra/board_cfg.h | 45 +++++++++ hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h | 4 +- hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h | 4 +- hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h | 4 +- hw/bsp/ra/boards/ra6m5_ek/board.cmake | 20 +++- hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h | 4 +- hw/bsp/ra/family.c | 118 ++++++++++++++++-------- hw/bsp/ra/vector_data.h | 15 ++- src/common/tusb_mcu.h | 1 + src/portable/renesas/rusb2/dcd_rusb2.c | 3 +- 13 files changed, 188 insertions(+), 60 deletions(-) create mode 100644 .idea/runConfigurations/ra4m1.xml create mode 100644 .idea/runConfigurations/ra6m1.xml create mode 100644 .idea/runConfigurations/ra6m5.xml create mode 100644 hw/bsp/ra/board_cfg.h (limited to 'src/common') diff --git a/.idea/runConfigurations/ra4m1.xml b/.idea/runConfigurations/ra4m1.xml new file mode 100644 index 000000000..22bb61949 --- /dev/null +++ b/.idea/runConfigurations/ra4m1.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/ra6m1.xml b/.idea/runConfigurations/ra6m1.xml new file mode 100644 index 000000000..438ac4063 --- /dev/null +++ b/.idea/runConfigurations/ra6m1.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/ra6m5.xml b/.idea/runConfigurations/ra6m5.xml new file mode 100644 index 000000000..02df11610 --- /dev/null +++ b/.idea/runConfigurations/ra6m5.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/hw/bsp/ra/board_cfg.h b/hw/bsp/ra/board_cfg.h new file mode 100644 index 000000000..baed46b5f --- /dev/null +++ b/hw/bsp/ra/board_cfg.h @@ -0,0 +1,45 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + */ + +#ifndef _BOARD_CFG_H +#define _BOARD_CFG_H + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(BSP_MCU_GROUP_RA6M5) || defined(BSP_MCU_GROUP_RA6M3) || (BSP_CFG_MCU_PART_SERIES == 8) + #define BOARD_HAS_USB_HIGHSPEED +#endif + +// for SystemInit() +void bsp_init(void * p_args); + + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h index 19bb473eb..f0577b702 100644 --- a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h +++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h @@ -4,6 +4,7 @@ #include "bsp_clock_cfg.h" #include "bsp_mcu_family_cfg.h" +#include "board_cfg.h" #undef RA_NOT_DEFINED #define BSP_CFG_RTOS (0) @@ -31,7 +32,4 @@ #define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1) #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000 -// for SystemInit() -void bsp_init(void * p_args); - #endif /* BSP_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h index 6a47bccc6..47de7747d 100644 --- a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h +++ b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h @@ -7,6 +7,7 @@ extern "C" { #include "bsp_clock_cfg.h" #include "bsp_mcu_family_cfg.h" +#include "board_cfg.h" #define RA_NOT_DEFINED 0 #ifndef BSP_CFG_RTOS @@ -56,9 +57,6 @@ extern "C" { #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000 #endif -// for SystemInit() -void bsp_init(void * p_args); - #ifdef __cplusplus } #endif diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h index 75a331fc2..b5ed53a3b 100644 --- a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h +++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h @@ -8,6 +8,7 @@ extern "C" { #include "bsp_clock_cfg.h" #include "bsp_mcu_family_cfg.h" +#include "board_cfg.h" #define RA_NOT_DEFINED 0 #ifndef BSP_CFG_RTOS @@ -60,9 +61,6 @@ extern "C" { #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000 #endif -// for SystemInit() -void bsp_init(void * p_args); - #ifdef __cplusplus } #endif diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.cmake b/hw/bsp/ra/boards/ra6m5_ek/board.cmake index 42a4c7417..d934a0c0d 100644 --- a/hw/bsp/ra/boards/ra6m5_ek/board.cmake +++ b/hw/bsp/ra/boards/ra6m5_ek/board.cmake @@ -3,8 +3,22 @@ set(MCU_VARIANT ra6m5) set(JLINK_DEVICE R7FA6M5BH) +# default to PORT1 Highspeed +if (NOT DEFINED PORT) +set(PORT 1) +endif() + function(update_board TARGET) -# target_compile_definitions(${TARGET} PUBLIC) -# target_sources(${TARGET} PRIVATE) -# target_include_directories(${BOARD_TARGET} PUBLIC) + target_compile_definitions(${TARGET} PUBLIC + BOARD_TUD_RHPORT=${PORT} + # port 0 is fullspeed, port 1 is highspeed + BOARD_TUD_MAX_SPEED=$ + ) + + if (PORT STREQUAL 1) + target_compile_definitions(${TARGET} PUBLIC + CFG_TUSB_RHPORT1_MODE=OPT_MODE_DEVICE|OPT_MODE_HIGH_SPEED + CFG_TUSB_RHPORT0_MODE=0 + ) + endif () endfunction() diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h index e41f603ad..a41536eda 100644 --- a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h +++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h @@ -7,6 +7,7 @@ extern "C" { #include "bsp_clock_cfg.h" #include "bsp_mcu_family_cfg.h" +#include "board_cfg.h" #define RA_NOT_DEFINED 0 #ifndef BSP_CFG_RTOS @@ -56,9 +57,6 @@ extern "C" { #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000 #endif -// for SystemInit() -void bsp_init(void * p_args); - #ifdef __cplusplus } #endif diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c index 769678954..36b46beab 100644 --- a/hw/bsp/ra/family.c +++ b/hw/bsp/ra/family.c @@ -48,9 +48,9 @@ #include "board.h" /* Key code for writing PRCR register. */ -#define BSP_PRV_PRCR_KEY (0xA500U) +#define BSP_PRV_PRCR_KEY (0xA500U) #define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U) -#define BSP_PRV_PRCR_LOCK ((BSP_PRV_PRCR_KEY) | 0x0U) +#define BSP_PRV_PRCR_LOCK ((BSP_PRV_PRCR_KEY) | 0x0U) static const ioport_cfg_t family_pin_cfg = { .number_of_pins = sizeof(board_pin_cfg) / sizeof(ioport_pin_cfg_t), @@ -62,25 +62,38 @@ static ioport_instance_ctrl_t port_ctrl; // Vector Data //--------------------------------------------------------------------+ -BSP_DONT_REMOVE const fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = { +BSP_DONT_REMOVE BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) +const fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] = { [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */ [1] = usbfs_resume_handler, /* USBFS RESUME (USBFS resume interrupt) */ [2] = usbfs_d0fifo_handler, /* USBFS FIFO 0 (DMA transfer request 0) */ [3] = usbfs_d1fifo_handler, /* USBFS FIFO 1 (DMA transfer request 1) */ + +#ifdef BOARD_HAS_USB_HIGHSPEED + [4] = usbhs_interrupt_handler, /* USBHS INT (USBHS interrupt) */ + [5] = usbhs_d0fifo_handler, /* USBHS FIFO 0 (DMA transfer request 0) */ + [6] = usbhs_d1fifo_handler, /* USBHS FIFO 1 (DMA transfer request 1) */ +#endif }; + const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] = { - [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT), /* USBFS INT (USBFS interrupt) */ - [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */ - [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */ - [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1) /* USBFS FIFO 1 (DMA transfer request 1) */ + [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT), /* USBFS INT (USBFS interrupt) */ + [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */ + [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */ + [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1), /* USBFS FIFO 1 (DMA transfer request 1) */ + +#ifdef BOARD_HAS_USB_HIGHSPEED + [4] = BSP_PRV_IELS_ENUM(EVENT_USBHS_USB_INT_RESUME), /* USBHS USB INT RESUME (USBHS interrupt) */ + [5] = BSP_PRV_IELS_ENUM(EVENT_USBHS_FIFO_0), /* USBHS FIFO 0 (DMA transfer request 0) */ + [6] = BSP_PRV_IELS_ENUM(EVENT_USBHS_FIFO_1), /* USBHS FIFO 1 (DMA transfer request 1) */ +#endif }; //--------------------------------------------------------------------+ // Board porting API //--------------------------------------------------------------------+ -void board_init(void) -{ +void board_init(void) { /* Configure pins. */ R_IOPORT_Open(&port_ctrl, &family_pin_cfg); @@ -94,8 +107,8 @@ void board_init(void) // Enable USB module R_MSTP->MSTPCRB &= ~(1U << 11U); // FS -#ifdef R_USB_HS0_BASE -// R_MSTP->MSTPCRB &= ~(1U << 12U); // HS +#ifdef BOARD_HAS_USB_HIGHSPEED + R_MSTP->MSTPCRB &= ~(1U << 12U); #endif #if CFG_TUSB_OS == OPT_OS_FREERTOS @@ -145,66 +158,93 @@ void SysTick_Handler(void) { uint32_t board_millis(void) { return system_ticks; } + #endif //--------------------------------------------------------------------+ // Forward USB interrupt events to TinyUSB IRQ Handler //--------------------------------------------------------------------+ -void usbfs_interrupt_handler(void) -{ + +#if CFG_TUD_ENABLED && defined(BOARD_TUD_RHPORT) + #define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n) +#else + #define PORT_SUPPORT_DEVICE(_n) 0 +#endif + +#if CFG_TUH_ENABLED && defined(BOARD_TUH_RHPORT) + #define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n) +#else + #define PORT_SUPPORT_HOST(_n) 0 +#endif + +//------------- USB0 FullSpeed -------------// +void usbfs_interrupt_handler(void) { IRQn_Type irq = R_FSP_CurrentIrqGet(); R_BSP_IrqStatusClear(irq); -#if CFG_TUH_ENABLED + #if PORT_SUPPORT_HOST(0) tuh_int_handler(0); -#endif + #endif -#if CFG_TUD_ENABLED + #if PORT_SUPPORT_DEVICE(0) tud_int_handler(0); -#endif + #endif } -void usbfs_resume_handler(void) -{ +void usbfs_resume_handler(void) { IRQn_Type irq = R_FSP_CurrentIrqGet(); R_BSP_IrqStatusClear(irq); -#if CFG_TUH_ENABLED + #if PORT_SUPPORT_HOST(0) tuh_int_handler(0); -#endif + #endif -#if CFG_TUD_ENABLED + #if PORT_SUPPORT_DEVICE(0) tud_int_handler(0); -#endif + #endif } -void usbfs_d0fifo_handler(void) -{ +void usbfs_d0fifo_handler(void) { IRQn_Type irq = R_FSP_CurrentIrqGet(); R_BSP_IrqStatusClear(irq); + // TODO not used yet +} -#if CFG_TUH_ENABLED - tuh_int_handler(0); -#endif +void usbfs_d1fifo_handler(void) { + IRQn_Type irq = R_FSP_CurrentIrqGet(); + R_BSP_IrqStatusClear(irq); + // TODO not used yet +} -#if CFG_TUD_ENABLED - tud_int_handler(0); -#endif +//------------- USB1 HighSpeed -------------// +#ifdef BOARD_HAS_USB_HIGHSPEED + +void usbhs_interrupt_handler(void) { + IRQn_Type irq = R_FSP_CurrentIrqGet(); + R_BSP_IrqStatusClear(irq); + + #if PORT_SUPPORT_HOST(1) + tuh_int_handler(1); + #endif + + #if PORT_SUPPORT_DEVICE(1) + tud_int_handler(1); + #endif } -void usbfs_d1fifo_handler(void) -{ +void usbhs_d0fifo_handler(void) { IRQn_Type irq = R_FSP_CurrentIrqGet(); R_BSP_IrqStatusClear(irq); + // TODO not used yet +} -#if CFG_TUH_ENABLED - tuh_int_handler(0); -#endif +void usbhs_d1fifo_handler(void) { + IRQn_Type irq = R_FSP_CurrentIrqGet(); + R_BSP_IrqStatusClear(irq); + // TODO not used yet +} -#if CFG_TUD_ENABLED - tud_int_handler(0); #endif -} //--------------------------------------------------------------------+ // stdlib diff --git a/hw/bsp/ra/vector_data.h b/hw/bsp/ra/vector_data.h index 3d8a24634..ca667faa3 100644 --- a/hw/bsp/ra/vector_data.h +++ b/hw/bsp/ra/vector_data.h @@ -6,22 +6,29 @@ extern "C" { #endif -#ifndef VECTOR_DATA_IRQ_COUNT - #define VECTOR_DATA_IRQ_COUNT 4 -#endif - /* ISR prototypes */ void usbfs_interrupt_handler(void); void usbfs_resume_handler(void); void usbfs_d0fifo_handler(void); void usbfs_d1fifo_handler(void); +#ifdef BOARD_HAS_USB_HIGHSPEED +void usbhs_interrupt_handler(void); +void usbhs_d0fifo_handler(void); +void usbhs_d1fifo_handler(void); +#endif + /* Vector table allocations */ #define USBFS_INT_IRQn 0 #define USBFS_RESUME_IRQn 1 #define USBFS_FIFO_0_IRQn 2 #define USBFS_FIFO_1_IRQn 3 +#define USBHS_USB_INT_RESUME_IRQn 4 /* USBHS USB INT RESUME (USBHS interrupt) */ +#define USBHS_FIFO_0_IRQn 5 /* USBHS FIFO 0 (DMA transfer request 0) */ +#define USBHS_FIFO_1_IRQn 6 /* USBHS FIFO 1 (DMA transfer request 1) */ + + #ifdef __cplusplus } #endif diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 9f3be78fd..496ebfc85 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -327,6 +327,7 @@ // Renesas //--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N, OPT_MCU_RAXXX) + #define TUP_USBIP_RUSB2 #define TUP_DCD_ENDPOINT_MAX 10 //--------------------------------------------------------------------+ diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c index e9ac46517..83d2a34c6 100644 --- a/src/portable/renesas/rusb2/dcd_rusb2.c +++ b/src/portable/renesas/rusb2/dcd_rusb2.c @@ -31,8 +31,7 @@ // We disable SOF for now until needed later on #define USE_SOF 0 -#if CFG_TUD_ENABLED && (TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) || \ - TU_CHECK_MCU(OPT_MCU_RAXXX)) +#if CFG_TUD_ENABLED && defined(TUP_USBIP_RUSB2) #include "device/dcd.h" #include "rusb2_type.h" -- cgit v1.3.1 From 4c156100fafa682407f1a9a459d8b8800a029446 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 7 Jul 2023 12:27:18 +0700 Subject: use unaligned access read for hw fifo --- src/common/tusb_common.h | 18 ++++++-- src/common/tusb_mcu.h | 12 ++++-- src/portable/renesas/rusb2/dcd_rusb2.c | 77 +++++++++++++++++++++------------- 3 files changed, 71 insertions(+), 36 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 957491aa9..576cb123f 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -260,11 +260,21 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void* mem, uint16_ #else // MCU that could access unaligned memory natively -TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32 (const void* mem) { return *((uint32_t const *) mem); } -TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16 (const void* mem) { return *((uint16_t const *) mem); } +TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32(const void *mem) { + return *((uint32_t const *) mem); +} + +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16(const void *mem) { + return *((uint16_t const *) mem); +} -TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write32 (void* mem, uint32_t value ) { *((uint32_t*) mem) = value; } -TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16 (void* mem, uint16_t value ) { *((uint16_t*) mem) = value; } +TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write32(void *mem, uint32_t value) { + *((uint32_t *) mem) = value; +} + +TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void *mem, uint16_t value) { + *((uint16_t *) mem) = value; +} #endif diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 496ebfc85..89f89182e 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -34,10 +34,16 @@ //------------- Unaligned Memory Access -------------// -// ARMv7+ (M3-M7, M23-M33) can access unaligned memory -#if (defined(__ARM_ARCH) && (__ARM_ARCH >= 7)) - #define TUP_ARCH_STRICT_ALIGN 0 +#ifdef __ARM_ARCH + // ARM Architecture set __ARM_FEATURE_UNALIGNED to 1 for mcu supports unaligned access + #if defined(__ARM_FEATURE_UNALIGNED) && __ARM_FEATURE_UNALIGNED == 1 + #define TUP_ARCH_STRICT_ALIGN 0 + #else + #define TUP_ARCH_STRICT_ALIGN 1 + #endif #else + // TODO default to strict align for others + // Should investigate other architecture such as risv, xtensa, mips for optimal setting #define TUP_ARCH_STRICT_ALIGN 1 #endif diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c index 81b60b3bc..464929224 100644 --- a/src/portable/renesas/rusb2/dcd_rusb2.c +++ b/src/portable/renesas/rusb2/dcd_rusb2.c @@ -220,6 +220,11 @@ static inline void pipe_wait_for_ready(rusb2_reg_t * rusb, unsigned num) while ( !rusb->D0FIFOCTR_b.FRDY ) {} } +//--------------------------------------------------------------------+ +// Pipe FIFO +//--------------------------------------------------------------------+ + +// Write data buffer --> hw fifo static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len) { #if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE) @@ -228,54 +233,68 @@ static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len) volatile hw_fifo16_t *reg = (volatile hw_fifo16_t*) fifo; #endif - uintptr_t addr = (uintptr_t)buf; + uint8_t const* buf8 = (uint8_t const*) buf; while (len >= 2) { - reg->u16 = *(const uint16_t *)addr; - addr += 2; + reg->u16 = tu_unaligned_read16(buf8); + buf8 += 2; len -= 2; } if (len > 0) { - reg->u8 = *(const uint8_t *)addr; - ++addr; + reg->u8 = *buf8; + ++buf8; } } +// Read data buffer <-- hw fifo static void pipe_read_packet(void *buf, volatile void *fifo, unsigned len) { - uint8_t *p = (uint8_t*)buf; + uint8_t *p = (uint8_t*)buf; volatile uint8_t *reg = (volatile uint8_t*)fifo; /* byte access is always at base register address */ while (len--) *p++ = *reg; } -static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigned len, unsigned dir) -{ - static const struct { - void (*tu_fifo_get_info)(tu_fifo_t *f, tu_fifo_buffer_info_t *info); - void (*tu_fifo_advance)(tu_fifo_t *f, uint16_t n); - void (*pipe_read_write)(void *buf, volatile void *fifo, unsigned len); - } ops[] = { - /* OUT */ {tu_fifo_get_write_info,tu_fifo_advance_write_pointer,pipe_read_packet}, - /* IN */ {tu_fifo_get_read_info, tu_fifo_advance_read_pointer, pipe_write_packet}, - }; +// Write data sw fifo --> hw fifo +static void pipe_write_packet_ff(tu_fifo_t *f, volatile void *fifo, uint16_t total_len) { + tu_fifo_buffer_info_t info; + tu_fifo_get_read_info(f, &info); + + uint16_t count = tu_min16(total_len, info.len_lin); + pipe_write_packet(info.ptr_lin, fifo, count); + + uint16_t rem = total_len - count; + if (rem) { + rem = tu_min16(rem, info.len_wrap); + pipe_write_packet(info.ptr_wrap, fifo, rem); + count += rem; + } + + tu_fifo_advance_read_pointer(f, count); +} +// Read data sw fifo <-- hw fifo +static void pipe_read_packet_ff(tu_fifo_t *f, volatile void *fifo, uint16_t total_len) { tu_fifo_buffer_info_t info; - ops[dir].tu_fifo_get_info(f, &info); + tu_fifo_get_write_info(f, &info); - unsigned total_len = len; - len = TU_MIN(total_len, info.len_lin); - ops[dir].pipe_read_write(info.ptr_lin, fifo, len); + uint16_t count = tu_min16(total_len, info.len_lin); + pipe_read_packet(info.ptr_lin, fifo, count); - unsigned rem = total_len - len; + uint16_t rem = total_len - count; if (rem) { - len = TU_MIN(rem, info.len_wrap); - ops[dir].pipe_read_write(info.ptr_wrap, fifo, len); - rem -= len; + rem = tu_min16(rem, info.len_wrap); + pipe_read_packet(info.ptr_wrap, fifo, rem); + count += rem; } - ops[dir].tu_fifo_advance(f, total_len - rem); + + tu_fifo_advance_write_pointer(f, count); } +//--------------------------------------------------------------------+ +// Pipe Transfer +//--------------------------------------------------------------------+ + static bool pipe0_xfer_in(rusb2_reg_t* rusb) { pipe_state_t *pipe = &_dcd.pipe[0]; @@ -292,7 +311,7 @@ static bool pipe0_xfer_in(rusb2_reg_t* rusb) if (len) { if (pipe->ff) { - pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->CFIFO, len, TUSB_DIR_IN); + pipe_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->CFIFO, len); } else { pipe_write_packet(buf, (volatile void*)&rusb->CFIFO, len); pipe->buf = (uint8_t*)buf + len; @@ -319,7 +338,7 @@ static bool pipe0_xfer_out(rusb2_reg_t* rusb) if (len) { if (pipe->ff) { - pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->CFIFO, len, TUSB_DIR_OUT); + pipe_read_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->CFIFO, len); } else { pipe_read_packet(buf, (volatile void*)&rusb->CFIFO, len); pipe->buf = (uint8_t*)buf + len; @@ -357,7 +376,7 @@ static bool pipe_xfer_in(rusb2_reg_t* rusb, unsigned num) if (len) { if (pipe->ff) { - pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->D0FIFO, len, TUSB_DIR_IN); + pipe_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->D0FIFO, len); } else { pipe_write_packet(buf, (volatile void*)&rusb->D0FIFO, len); pipe->buf = (uint8_t*)buf + len; @@ -391,7 +410,7 @@ static bool pipe_xfer_out(rusb2_reg_t* rusb, unsigned num) if (len) { if (pipe->ff) { - pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->D0FIFO, len, TUSB_DIR_OUT); + pipe_read_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->D0FIFO, len); } else { pipe_read_packet(buf, (volatile void*)&rusb->D0FIFO, len); pipe->buf = (uint8_t*)buf + len; -- cgit v1.3.1 From c122e9df73331fa60d1713c7cc4cf46251b0cd76 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 21 Jul 2023 19:06:36 +0700 Subject: implement hcd_edpt_abort_xfer() for EHCI, also move thing around a bit --- src/common/tusb_common.h | 2 + src/host/hcd.h | 1 + src/host/usbh.c | 10 ++- src/host/usbh.h | 1 + src/portable/ehci/ehci.c | 200 +++++++++++++++++++++++++++++------------------ src/portable/ehci/ehci.h | 19 +++-- 6 files changed, 147 insertions(+), 86 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 957491aa9..b3d9fc7cd 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -53,6 +53,8 @@ #define U32_TO_U8S_LE(_u32) TU_U32_BYTE0(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE3(_u32) #define TU_BIT(n) (1UL << (n)) + +// Generate a mask with bit from high (31) to low (0) set, e.g TU_GENMASK(3, 0) = 0b1111 #define TU_GENMASK(h, l) ( (UINT32_MAX << (l)) & (UINT32_MAX >> (31 - (h))) ) //--------------------------------------------------------------------+ diff --git a/src/host/hcd.h b/src/host/hcd.h index cbfffb349..90bfd79db 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -172,6 +172,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen); // Abort a queued transfer. Note: it can only abort transfer that has not been started +// Return true if a queued transfer is aborted, false if there is no transfer to abort bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr); // Submit a special transfer to send 8-byte Setup Packet, when complete hcd_event_xfer_complete() must be invoked diff --git a/src/host/usbh.c b/src/host/usbh.c index bbf333d5f..15c48be47 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -718,9 +718,15 @@ bool tuh_edpt_abort_xfer(uint8_t daddr, uint8_t ep_addr) { uint8_t const dir = tu_edpt_dir(ep_addr); // skip if not busy - if (!dev->ep_status[epnum][dir].busy) return true; + TU_VERIFY(dev->ep_status[epnum][dir].busy); - return hcd_edpt_abort_xfer(dev->rhport, daddr, ep_addr); + bool const ret = hcd_edpt_abort_xfer(dev->rhport, daddr, ep_addr); + if (ret) { + // mark as ready if transfer is aborted + dev->ep_status[epnum][dir].busy = false; + } + + return ret; } //--------------------------------------------------------------------+ diff --git a/src/host/usbh.h b/src/host/usbh.h index d765f6744..0d56f40c9 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -176,6 +176,7 @@ bool tuh_edpt_xfer(tuh_xfer_t* xfer); bool tuh_edpt_open(uint8_t daddr, tusb_desc_endpoint_t const * desc_ep); // Abort a queued transfer. Note: it can only abort transfer that has not been started +// Return true if a queued transfer is aborted, false if there is no transfer to abort bool tuh_edpt_abort_xfer(uint8_t daddr, uint8_t ep_addr); // Set Configuration (control transfer) diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index 0a26986d5..6388add08 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -48,8 +48,8 @@ #ifdef TUP_USBIP_CHIPIDEA_HS // NXP Transdimension: 8 elements #define FRAMELIST_SIZE_BIT_VALUE 7u - #define FRAMELIST_SIZE_USBCMD_VALUE (((FRAMELIST_SIZE_BIT_VALUE & 3) << EHCI_USBCMD_POS_FRAMELIST_SIZE) | \ - ((FRAMELIST_SIZE_BIT_VALUE >> 2) << EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB)) + #define FRAMELIST_SIZE_USBCMD_VALUE (((FRAMELIST_SIZE_BIT_VALUE & 3) << EHCI_USBCMD_FRAMELIST_SIZE_SHIFT) | \ + ((FRAMELIST_SIZE_BIT_VALUE >> 2) << EHCI_USBCMD_CHIPIDEA_FRAMELIST_SIZE_MSB_SHIFT)) #else // STD EHCI: 256 elements #define FRAMELIST_SIZE_BIT_VALUE 2u @@ -132,24 +132,46 @@ TU_ATTR_WEAK void hcd_dcache_clean(void const* addr, uint32_t data_size) { (void TU_ATTR_WEAK void hcd_dcache_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; } TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; } -TU_ATTR_ALWAYS_INLINE static inline ehci_link_t* list_get_period_head(uint8_t rhport, uint32_t interval_ms); -TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* list_get_async_head(uint8_t rhport); - TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* qhd_control(uint8_t dev_addr); TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* qhd_next (ehci_qhd_t const * p_qhd); TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* qhd_find_free (void); static ehci_qhd_t* qhd_get_from_addr (uint8_t dev_addr, uint8_t ep_addr); static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); static void qhd_attach_qtd(ehci_qhd_t *qhd, ehci_qtd_t *qtd); +static void qhd_remove_qtd(ehci_qhd_t *qhd); TU_ATTR_ALWAYS_INLINE static inline ehci_qtd_t* qtd_control(uint8_t dev_addr); TU_ATTR_ALWAYS_INLINE static inline ehci_qtd_t* qtd_find_free (void); static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes); -static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type); -static inline ehci_link_t* list_next (ehci_link_t const *p_link); +TU_ATTR_ALWAYS_INLINE static inline ehci_link_t* list_get_period_head(uint8_t rhport, uint32_t interval_ms); +TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* list_get_async_head(uint8_t rhport); +TU_ATTR_ALWAYS_INLINE static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type); +TU_ATTR_ALWAYS_INLINE static inline ehci_link_t* list_next (ehci_link_t const *p_link); static void list_remove_qhd_by_daddr(ehci_link_t* list_head, uint8_t dev_addr); +static void ehci_disable_schedule(ehci_registers_t* regs, bool is_period) { + // maybe have a timeout for status + if (is_period) { + regs->command_bm.periodic_enable = 0; + while(regs->status_bm.periodic_status) {} + } else { + regs->command_bm.async_enable = 0; + while(regs->status_bm.async_status) {} // should have a timeout + } +} + +static void ehci_enable_schedule(ehci_registers_t* regs, bool is_period) { + // maybe have a timeout for status + if (is_period) { + regs->command_bm.periodic_enable = 1; + while ( 0 == regs->status_bm.periodic_status ) {} + } else { + regs->command_bm.async_enable = 1; + while( 0 == regs->status_bm.async_status ) {} + } +} + //--------------------------------------------------------------------+ // HCD API //--------------------------------------------------------------------+ @@ -204,43 +226,6 @@ tusb_speed_t hcd_port_speed_get(uint8_t rhport) return (tusb_speed_t) ehci_data.regs->portsc_bm.nxp_port_speed; // NXP specific port speed } -static void list_remove_qhd_by_daddr(ehci_link_t* list_head, uint8_t dev_addr) { - ehci_link_t* prev = list_head; - - while (prev && !prev->terminate) { - ehci_qhd_t* qhd = (ehci_qhd_t*) (uintptr_t) list_next(prev); - - // done if loop back to head - if ( (uintptr_t) qhd == (uintptr_t) list_head) { - break; - } - - if ( qhd->dev_addr == dev_addr ) { - // TODO deactivate all TD, wait for QHD to inactive before removal - prev->address = qhd->next.address; - - // EHCI 4.8.2 link the removed qhd's next to async head (which always reachable by Host Controller) - qhd->next.address = ((uint32_t) list_head) | (EHCI_QTYPE_QHD << 1); - - if ( qhd->int_smask ) - { - // period list queue element is guarantee to be free in the next frame (1 ms) - qhd->used = 0; - }else - { - // async list use async advance handshake - // mark as removing, will completely re-usable when async advance isr occurs - qhd->removing = 1; - } - - hcd_dcache_clean(qhd, sizeof(ehci_qhd_t)); - hcd_dcache_clean(prev, sizeof(ehci_qhd_t)); - }else { - prev = list_next(prev); - } - } -} - // Close all opened endpoint belong to this device void hcd_device_close(uint8_t rhport, uint8_t daddr) { @@ -347,8 +332,7 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg) regs->nxp_tt_control = 0; //------------- USB CMD Register -------------// - regs->command |= TU_BIT(EHCI_USBCMD_POS_RUN_STOP) | TU_BIT(EHCI_USBCMD_POS_ASYNC_ENABLE) | - TU_BIT(EHCI_USBCMD_POS_PERIOD_ENABLE) | // TODO enable period list only there is int/iso endpoint + regs->command |= EHCI_USBCMD_RUN_STOP | EHCI_USBCMD_PERIOD_SCHEDULE_ENABLE | EHCI_USBCMD_ASYNC_SCHEDULE_ENABLE | FRAMELIST_SIZE_USBCMD_VALUE; //------------- ConfigFlag Register (skip) -------------// @@ -358,7 +342,7 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg) if (ehci_data.cap_regs->hcsparams_bm.port_power_control) { // mask out all change bits since they are Write 1 to clear uint32_t portsc = (regs->portsc & ~EHCI_PORTSC_MASK_W1C); - portsc |= ECHI_PORTSC_MASK_PORT_POWER; + portsc |= EHCI_PORTSC_MASK_PORT_POWER; regs->portsc = portsc; } @@ -455,20 +439,17 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const dir = tu_edpt_dir(ep_addr); - ehci_qhd_t* qhd; + ehci_qhd_t* qhd = qhd_get_from_addr(dev_addr, ep_addr); ehci_qtd_t* qtd; if (epnum == 0) { - qhd = qhd_control(dev_addr); qtd = qtd_control(dev_addr); - qtd_init(qtd, buffer, buflen); // first data toggle is always 1 (data & setup stage) qtd->data_toggle = 1; qtd->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT; } else { - qhd = qhd_get_from_addr(dev_addr, ep_addr); qtd = qtd_find_free(); TU_ASSERT(qtd); @@ -491,20 +472,34 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) { (void) rhport; - (void) dev_addr; - (void) ep_addr; - return false; + // TODO ISO not supported yet + ehci_qhd_t* qhd = qhd_get_from_addr(dev_addr, ep_addr); + ehci_qtd_t * volatile qtd = qhd->attached_qtd; + TU_VERIFY(qtd != NULL); // no queued transfer + + hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t)); + TU_VERIFY(qtd->active); // transfer is already complete + + // HC is still processing, disable HC list schedule before making changes + bool const is_period = (qhd->interval_ms > 0); + + ehci_disable_schedule(ehci_data.regs, is_period); + + // check active bit again just in case HC has just processed the TD + bool const still_active = qtd->active; + if (still_active) { + // remove TD from QH overlay + qhd->qtd_overlay.next.terminate = 1; + hcd_dcache_clean(qhd, sizeof(ehci_qhd_t)); + + // remove TD from QH software list + qhd_remove_qtd(qhd); + } -// uint8_t const epnum = tu_edpt_number(ep_addr); -// ehci_qhd_t* qhd; -// -// // TODO ISO not supported -// if (epnum == 0) { -// qhd = qhd_control(dev_addr); -// }else { -// qhd = qhd_get_from_addr(dev_addr, ep_addr); -// } + ehci_enable_schedule(ehci_data.regs, is_period); + + return still_active; // true if removed an active transfer } bool hcd_edpt_clear_stall(uint8_t daddr, uint8_t ep_addr) @@ -554,8 +549,12 @@ void port_connect_status_change_isr(uint8_t rhport) TU_ATTR_ALWAYS_INLINE static inline void qhd_xfer_complete_isr(ehci_qhd_t * qhd) { // examine TD attached to queue head - ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) qhd->attached_qtd; - if (qtd == NULL) return; // no TD attached + ehci_qtd_t * volatile qtd = qhd->attached_qtd; + + if (qtd == NULL) { + return; // no TD attached + } + hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t)); // TD is still active, no need to process @@ -572,9 +571,7 @@ void qhd_xfer_complete_isr(ehci_qhd_t * qhd) { } // remove and free TD before invoking callback - qhd->attached_qtd = NULL; - qhd->attached_buffer = 0; - qtd->used = 0; // free QTD + qhd_remove_qtd(qhd); // notify usbh uint8_t const ep_addr = tu_edpt_addr(qhd->ep_number, dir); @@ -677,9 +674,7 @@ void qhd_xfer_error_isr(ehci_qhd_t * qhd) } // remove and free TD before invoking callback - qhd->attached_qtd = NULL; - qhd->attached_buffer = 0; - qtd->used = 0; // free QTD + qhd_remove_qtd(qhd); if (0 == qhd->ep_number ) { // control cannot be halted @@ -822,18 +817,55 @@ TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* list_get_async_head(uint8_t rhpo return qhd_control(0); // control qhd of dev0 is used as async head } -// insert at head -static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t new_type) +TU_ATTR_ALWAYS_INLINE static inline ehci_link_t* list_next(ehci_link_t const *p_link) { + return (ehci_link_t*) tu_align32(p_link->address); +} + +TU_ATTR_ALWAYS_INLINE static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t new_type) { new->address = current->address; current->address = ((uint32_t) new) | (new_type << 1); } -static inline ehci_link_t* list_next(ehci_link_t const *p_link) -{ - return (ehci_link_t*) tu_align32(p_link->address); +// Remove all queue head belong to this device address +static void list_remove_qhd_by_daddr(ehci_link_t* list_head, uint8_t dev_addr) { + ehci_link_t* prev = list_head; + + while (prev && !prev->terminate) { + ehci_qhd_t* qhd = (ehci_qhd_t*) (uintptr_t) list_next(prev); + + // done if loop back to head + if ( (uintptr_t) qhd == (uintptr_t) list_head) { + break; + } + + if ( qhd->dev_addr == dev_addr ) { + // TODO deactivate all TD, wait for QHD to inactive before removal + prev->address = qhd->next.address; + + // EHCI 4.8.2 link the removed qhd's next to async head (which always reachable by Host Controller) + qhd->next.address = ((uint32_t) list_head) | (EHCI_QTYPE_QHD << 1); + + if ( qhd->int_smask ) + { + // period list queue element is guarantee to be free in the next frame (1 ms) + qhd->used = 0; + }else + { + // async list use async advance handshake + // mark as removing, will completely re-usable when async advance isr occurs + qhd->removing = 1; + } + + hcd_dcache_clean(qhd, sizeof(ehci_qhd_t)); + hcd_dcache_clean(prev, sizeof(ehci_qhd_t)); + }else { + prev = list_next(prev); + } + } } + //--------------------------------------------------------------------+ // Queue Header helper //--------------------------------------------------------------------+ @@ -856,8 +888,12 @@ TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t *qhd_next(ehci_qhd_t const *p_qhd return (ehci_qhd_t *) tu_align32(p_qhd->next.address); } -// Get queue head from address +// Get queue head from device + endpoint address static ehci_qhd_t *qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr) { + if ( 0 == tu_edpt_number(ep_addr) ) { + return qhd_control(dev_addr); + } + ehci_qhd_t *qhd_pool = ehci_data.qhd_pool; for ( uint32_t i = 0; i < QHD_MAX; i++ ) { @@ -957,6 +993,16 @@ static void qhd_attach_qtd(ehci_qhd_t *qhd, ehci_qtd_t *qtd) { hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t)); } +// Remove an attached TD from queue head +static void qhd_remove_qtd(ehci_qhd_t *qhd) { + ehci_qtd_t * volatile qtd = qhd->attached_qtd; + + qhd->attached_qtd = NULL; + qhd->attached_buffer = 0; + + qtd->used = 0; // free QTD +} + //--------------------------------------------------------------------+ // Queue TD helper //--------------------------------------------------------------------+ diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h index 8338fb419..05de80539 100644 --- a/src/portable/ehci/ehci.h +++ b/src/portable/ehci/ehci.h @@ -289,12 +289,17 @@ enum { }; enum { - EHCI_USBCMD_POS_RUN_STOP = 0, - EHCI_USBCMD_POS_FRAMELIST_SIZE = 2, - EHCI_USBCMD_POS_PERIOD_ENABLE = 4, - EHCI_USBCMD_POS_ASYNC_ENABLE = 5, - EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB = 15, - EHCI_USBCMD_POS_INTERRUPT_THRESHOLD = 16 + EHCI_USBCMD_FRAMELIST_SIZE_SHIFT = 2, // [2..3] + EHCI_USBCMD_CHIPIDEA_FRAMELIST_SIZE_MSB_SHIFT = 15, + EHCI_USBCMD_INTERRUPT_THRESHOLD_SHIFT = 16 +}; + +enum { + EHCI_USBCMD_RUN_STOP = TU_BIT(0), // [0..0] 1 = Run, 0 = Stop + EHCI_USBCMD_HCRESET = TU_BIT(1), // [1..1] SW write 1 to reset HC, clear by HC when complete + EHCI_USBCMD_PERIOD_SCHEDULE_ENABLE = TU_BIT(4), // [4..4] Enable periodic schedule + EHCI_USBCMD_ASYNC_SCHEDULE_ENABLE = TU_BIT(5), // [5..5] Enable async schedule + EHCI_USBCMD_INTR_ON_ASYNC_ADVANCE_DOORBELL = TU_BIT(6), // [6..6] Tell HC to interrupt next time it advances async list. Clear by HC }; enum { @@ -306,7 +311,7 @@ enum { EHCI_PORTSC_MASK_FORCE_RESUME = TU_BIT(6), EHCI_PORTSC_MASK_PORT_SUSPEND = TU_BIT(7), EHCI_PORTSC_MASK_PORT_RESET = TU_BIT(8), - ECHI_PORTSC_MASK_PORT_POWER = TU_BIT(12), + EHCI_PORTSC_MASK_PORT_POWER = TU_BIT(12), EHCI_PORTSC_MASK_W1C = EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE | -- cgit v1.3.1 From e2f28bc134446dc081766055171ca427afd4f564 Mon Sep 17 00:00:00 2001 From: emb4fun Date: Sun, 23 Jul 2023 10:53:22 +0200 Subject: Added support for the NXP K64 series --- hw/bsp/board_mcu.h | 2 +- src/common/tusb_mcu.h | 2 +- src/portable/nxp/khci/dcd_khci.c | 14 ++++++++++++++ src/tusb_option.h | 1 + 4 files changed, 17 insertions(+), 2 deletions(-) (limited to 'src/common') diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index e5d2bb608..3928435f0 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -47,7 +47,7 @@ #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX, OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX, OPT_MCU_MCXN9) #include "fsl_device_registers.h" -#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L) +#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L, OPT_MCU_KINETIS_K64) #include "fsl_device_registers.h" #elif CFG_TUSB_MCU == OPT_MCU_NRF5X diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 9f3be78fd..4a0c5acef 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -97,7 +97,7 @@ #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_RHPORT_HIGHSPEED 1 -#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L) +#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L, OPT_MCU_KINETIS_K64) #define TUP_USBIP_CHIPIDEA_FS #define TUP_USBIP_CHIPIDEA_FS_KINETIS #define TUP_DCD_ENDPOINT_MAX 16 diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c index 52f4145f2..d957338ad 100644 --- a/src/portable/nxp/khci/dcd_khci.c +++ b/src/portable/nxp/khci/dcd_khci.c @@ -269,8 +269,22 @@ void dcd_init(uint8_t rhport) { (void) rhport; +#if (CFG_TUSB_MCU == OPT_MCU_KINETIS_K64) + uint32_t clk_recover_irc_en; + uint32_t clk_recover_ctrl; + + clk_recover_irc_en = KHCI->CLK_RECOVER_IRC_EN; + clk_recover_ctrl = KHCI->CLK_RECOVER_CTRL; + + KHCI->USBTRC0 |= USB_USBTRC0_USBRESET_MASK; + while (KHCI->USBTRC0 & USB_USBTRC0_USBRESET_MASK); + + KHCI->CLK_RECOVER_IRC_EN = clk_recover_irc_en; + KHCI->CLK_RECOVER_CTRL |= clk_recover_ctrl; +#else KHCI->USBTRC0 |= USB_USBTRC0_USBRESET_MASK; while (KHCI->USBTRC0 & USB_USBTRC0_USBRESET_MASK); +#endif tu_memclr(&_dcd, sizeof(_dcd)); KHCI->USBTRC0 |= TU_BIT(6); /* software must set this bit to 1 */ diff --git a/src/tusb_option.h b/src/tusb_option.h index c792efe6a..bbaa2a53a 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -121,6 +121,7 @@ #define OPT_MCU_KINETIS_KL 1200 ///< NXP KL series #define OPT_MCU_KINETIS_K32L 1201 ///< NXP K32L series #define OPT_MCU_KINETIS_K32 1201 ///< Alias to K32L +#define OPT_MCU_KINETIS_K64 1202 ///< NXP K64 series #define OPT_MCU_MKL25ZXX 1200 ///< Alias to KL (obsolete) #define OPT_MCU_K32L2BXX 1201 ///< Alias to K32 (obsolete) -- cgit v1.3.1 From d2542560470de242dd8988d0b3c10d7df0496bb0 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 24 Jul 2023 17:54:24 +0700 Subject: change dcache clean/invalidate return type to bool add tu_assert() check for aligned 32byte address for imxrt --- src/common/tusb_common.h | 13 +++++++------ src/host/hcd.h | 8 ++++---- src/portable/chipidea/ci_hs/ci_hs_imxrt.h | 15 +++++++++------ src/portable/chipidea/ci_hs/hcd_ci_hs.c | 12 ++++++------ src/portable/ehci/ehci.c | 9 ++++++--- 5 files changed, 32 insertions(+), 25 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 957491aa9..bae583c06 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -99,10 +99,9 @@ TU_ATTR_WEAK extern void* tusb_app_phys_to_virt(void *phys_addr); #define tu_varclr(_var) tu_memclr(_var, sizeof(*(_var))) // This is a backport of memset_s from c11 -TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count) -{ +TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count) { // TODO may check if desst and src is not NULL - if (count > destsz) { + if ( count > destsz ) { return -1; } memset(dest, ch, count); @@ -110,10 +109,9 @@ TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, i } // This is a backport of memcpy_s from c11 -TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, const void * src, size_t count ) -{ +TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, const void *src, size_t count) { // TODO may check if desst and src is not NULL - if (count > destsz) { + if ( count > destsz ) { return -1; } memcpy(dest, src, count); @@ -169,6 +167,9 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align32 (uint32_t value) { retur TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align4k (uint32_t value) { return (value & 0xFFFFF000UL); } TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_offset4k(uint32_t value) { return (value & 0xFFFUL); } +TU_ATTR_ALWAYS_INLINE static inline bool tu_is_aligned32(uint32_t value) { return (value & 0x1FUL) == 0; } +TU_ATTR_ALWAYS_INLINE static inline bool tu_is_aligned64(uint64_t value) { return (value & 0x3FUL) == 0; } + //------------- Mathematics -------------// TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_div_ceil(uint32_t v, uint32_t d) { return (v + d -1)/d; } diff --git a/src/host/hcd.h b/src/host/hcd.h index 3355c18b2..52fcc834e 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -104,21 +104,21 @@ typedef struct uint8_t speed; } hcd_devtree_info_t; -//--------------------------------------------------------------------+ +//-------------------------------------------------------------- // Memory API //--------------------------------------------------------------------+ // clean/flush data cache: write cache -> memory. // Required before an DMA TX transfer to make sure data is in memory -void hcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK; +bool hcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK; // invalidate data cache: mark cache as invalid, next read will read from memory // Required BOTH before and after an DMA RX transfer -void hcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK; +bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK; // clean and invalidate data cache // Required before an DMA transfer where memory is both read/write by DMA -void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK; +bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK; //--------------------------------------------------------------------+ // Controller API diff --git a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h index 96f0ba766..c59c107ff 100644 --- a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h +++ b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h @@ -68,31 +68,34 @@ TU_ATTR_ALWAYS_INLINE static inline bool imxrt_is_cache_mem(uintptr_t addr) { return !(0x20000000 <= addr && addr < 0x20100000); } -TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean(void const* addr, uint32_t data_size) { +TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_clean(void const* addr, uint32_t data_size) { const uintptr_t addr32 = (uintptr_t) addr; if (imxrt_is_cache_mem(addr32)) { + TU_ASSERT(tu_is_aligned32(addr32)); SCB_CleanDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size); } + return true; } -TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_invalidate(void const* addr, uint32_t data_size) { +TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_invalidate(void const* addr, uint32_t data_size) { const uintptr_t addr32 = (uintptr_t) addr; if (imxrt_is_cache_mem(addr32)) { // Invalidating does not push cached changes back to RAM so we need to be // *very* careful when we do it. If we're not aligned, then we risk resetting // values back to their RAM state. - // if (addr32 % 32 != 0) { - // TU_BREAKPOINT(); - // } + TU_ASSERT(tu_is_aligned32(addr32)); SCB_InvalidateDCache_by_Addr((void*) addr32, (int32_t) data_size); } + return true; } -TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean_invalidate(void const* addr, uint32_t data_size) { +TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_clean_invalidate(void const* addr, uint32_t data_size) { const uintptr_t addr32 = (uintptr_t) addr; if (imxrt_is_cache_mem(addr32)) { + TU_ASSERT(tu_is_aligned32(addr32)); SCB_CleanInvalidateDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size); } + return true; } #endif diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c index 56167b8f6..6ee91e18e 100644 --- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -41,16 +41,16 @@ #if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX #include "ci_hs_imxrt.h" - void hcd_dcache_clean(void const* addr, uint32_t data_size) { - imxrt_dcache_clean(addr, data_size); + bool hcd_dcache_clean(void const* addr, uint32_t data_size) { + return imxrt_dcache_clean(addr, data_size); } - void hcd_dcache_invalidate(void const* addr, uint32_t data_size) { - imxrt_dcache_invalidate(addr, data_size); + bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) { + return imxrt_dcache_invalidate(addr, data_size); } - void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { - imxrt_dcache_clean_invalidate(addr, data_size); + bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { + return imxrt_dcache_clean_invalidate(addr, data_size); } #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index 38711e382..6dfaab2a2 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -162,16 +162,19 @@ static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes) static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type); static inline ehci_link_t* list_next (ehci_link_t const *p_link); -TU_ATTR_WEAK void hcd_dcache_clean(void const* addr, uint32_t data_size) { +TU_ATTR_WEAK bool hcd_dcache_clean(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; + return true; } -TU_ATTR_WEAK void hcd_dcache_invalidate(void const* addr, uint32_t data_size) { +TU_ATTR_WEAK bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; + return true; } -TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { +TU_ATTR_WEAK bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; + return true; } //--------------------------------------------------------------------+ -- cgit v1.3.1 From b8b01c10758043d318716569e693912f3e02c75b Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 8 Aug 2023 21:59:36 +0700 Subject: update to dcd ip3511 to add work-around for lpc54628 usb hs errata USB.1 and USB.2 msc is mounted, but device couldn't work reliably and got constant reset due to other errata probably. --- .idea/cmake.xml | 4 +- hw/bsp/lpc54/family.c | 6 +- hw/bsp/lpc54/family.cmake | 1 + src/common/tusb_common.h | 5 +- src/common/tusb_mcu.h | 8 +- src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 266 ++++++++++++++++----------- 6 files changed, 170 insertions(+), 120 deletions(-) (limited to 'src/common') diff --git a/.idea/cmake.xml b/.idea/cmake.xml index 76143ba10..4a69d02cf 100644 --- a/.idea/cmake.xml +++ b/.idea/cmake.xml @@ -30,7 +30,8 @@ - + + @@ -51,6 +52,7 @@ + \ No newline at end of file diff --git a/hw/bsp/lpc54/family.c b/hw/bsp/lpc54/family.c index 108a7d783..7411c72d4 100644 --- a/hw/bsp/lpc54/family.c +++ b/hw/bsp/lpc54/family.c @@ -70,13 +70,11 @@ //--------------------------------------------------------------------+ // Forward USB interrupt events to TinyUSB IRQ Handler //--------------------------------------------------------------------+ -void USB0_IRQHandler(void) -{ +void USB0_IRQHandler(void) { tud_int_handler(0); } -void USB1_IRQHandler(void) -{ +void USB1_IRQHandler(void) { tud_int_handler(1); } diff --git a/hw/bsp/lpc54/family.cmake b/hw/bsp/lpc54/family.cmake index 0512fe31f..b016441c1 100644 --- a/hw/bsp/lpc54/family.cmake +++ b/hw/bsp/lpc54/family.cmake @@ -59,6 +59,7 @@ function(add_board_target BOARD_TARGET) BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED BOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED CFG_TUH_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\) + #CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\) ) endif () diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 25f85e501..c303c6eaf 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -159,11 +159,12 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_max16 (uint16_t x, uint16_t y) { TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_max32 (uint32_t x, uint32_t y) { return (x > y) ? x : y; } //------------- Align -------------// -TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align(uint32_t value, uint32_t alignment) -{ +TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align(uint32_t value, uint32_t alignment) { return value & ((uint32_t) ~(alignment-1)); } +TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align4 (uint32_t value) { return (value & 0xFFFFFFFCUL); } +TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align8 (uint32_t value) { return (value & 0xFFFFFFF8UL); } TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align16 (uint32_t value) { return (value & 0xFFFFFFF0UL); } TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align32 (uint32_t value) { return (value & 0xFFFFFFE0UL); } TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align4k (uint32_t value) { return (value & 0xFFFFF000UL); } diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 89f89182e..35f94efbc 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -58,6 +58,7 @@ // NXP //--------------------------------------------------------------------+ #if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) + #define TUP_USBIP_IP3511 #define TUP_DCD_ENDPOINT_MAX 5 #elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) @@ -66,14 +67,17 @@ #define TUP_OHCI_RHPORTS 2 #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX) + #define TUP_USBIP_IP3511 #define TUP_DCD_ENDPOINT_MAX 5 -#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX) +#elif TU_CHECK_MCU(OPT_MCU_LPC54) // TODO USB0 has 5, USB1 has 6 + #define TUP_USBIP_IP3511 #define TUP_DCD_ENDPOINT_MAX 6 -#elif TU_CHECK_MCU(OPT_MCU_LPC55XX) +#elif TU_CHECK_MCU(OPT_MCU_LPC55) // TODO USB0 has 5, USB1 has 6 + #define TUP_USBIP_IP3511 #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index 7ca698a93..f4ed09d83 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -34,18 +34,13 @@ * - LPC54114 * - LPC55s69 */ -#if CFG_TUD_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_LPC11UXX || \ - CFG_TUSB_MCU == OPT_MCU_LPC13XX || \ - CFG_TUSB_MCU == OPT_MCU_LPC15XX || \ - CFG_TUSB_MCU == OPT_MCU_LPC51UXX || \ - CFG_TUSB_MCU == OPT_MCU_LPC54XXX || \ - CFG_TUSB_MCU == OPT_MCU_LPC55XX) +#if CFG_TUD_ENABLED && defined(TUP_USBIP_IP3511) //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ -#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX || CFG_TUSB_MCU == OPT_MCU_LPC15XX +#if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) // LPCOpen #include "chip.h" #else @@ -80,7 +75,7 @@ typedef struct { enum { NBYTES_ISO_FS_MAX = 1023, // FS ISO NBYTES_ISO_HS_MAX = 1024, // HS ISO - NBYTES_CBI_FS_MAX = 64, // FS control/bulk/interrupt + NBYTES_CBI_FS_MAX = 64, // FS control/bulk/interrupt. TODO some FS can do burst with higher size e.g 1024. Need to test NBYTES_CBI_HS_MAX = 32767 // can be up to all 15-bit, but only tested with 4096 }; @@ -90,26 +85,36 @@ enum { }; enum { - CMDSTAT_DEVICE_ADDR_MASK = TU_BIT(7 )-1, - CMDSTAT_DEVICE_ENABLE_MASK = TU_BIT(7 ), - CMDSTAT_SETUP_RECEIVED_MASK = TU_BIT(8 ), - CMDSTAT_DEVICE_CONNECT_MASK = TU_BIT(16), // reflect the soft-connect only, does not reflect the actual attached state - CMDSTAT_DEVICE_SUSPEND_MASK = TU_BIT(17), - // 23-22 is link speed (only available for HighSpeed port) - CMDSTAT_CONNECT_CHANGE_MASK = TU_BIT(24), - CMDSTAT_SUSPEND_CHANGE_MASK = TU_BIT(25), - CMDSTAT_RESET_CHANGE_MASK = TU_BIT(26), - CMDSTAT_VBUS_DEBOUNCED_MASK = TU_BIT(28), + DEVCMDSTAT_DEVICE_ADDR_MASK = TU_BIT(7 )-1, + DEVCMDSTAT_DEVICE_ENABLE_MASK = TU_BIT(7 ), + DEVCMDSTAT_SETUP_RECEIVED_MASK = TU_BIT(8 ), + DEVCMDSTAT_DEVICE_CONNECT_MASK = TU_BIT(16), // reflect the soft-connect only, does not reflect the actual attached state + DEVCMDSTAT_DEVICE_SUSPEND_MASK = TU_BIT(17), + // 23-22 is link speed (only available for HighSpeed port) + DEVCMDSTAT_CONNECT_CHANGE_MASK = TU_BIT(24), + DEVCMDSTAT_SUSPEND_CHANGE_MASK = TU_BIT(25), + DEVCMDSTAT_RESET_CHANGE_MASK = TU_BIT(26), + DEVCMDSTAT_VBUS_DEBOUNCED_MASK = TU_BIT(28), }; enum { - CMDSTAT_SPEED_SHIFT = 22 + DEVCMDSTAT_SPEED_SHIFT = 22 }; //--------------------------------------------------------------------+ // Endpoint Command/Status List //--------------------------------------------------------------------+ +// EP Command/Status field definition +enum { + EPCS_TYPE = TU_BIT(26), + EPCS_RF_TV = TU_BIT(27), + EPCS_TOGGLE_RESET = TU_BIT(28), + EPCS_STALL = TU_BIT(29), + EPCS_DISABLED = TU_BIT(30), + EPCS_ACTIVE = TU_BIT(31), +}; + // Endpoint Command/Status typedef union TU_ATTR_PACKED { @@ -133,8 +138,8 @@ typedef union TU_ATTR_PACKED volatile struct { uint32_t TU_RESERVED : 26; - uint32_t is_iso : 1 ; - uint32_t toggle_mode : 1 ; + uint32_t type : 1 ; + uint32_t rf_tv : 1 ; // rate feedback or toggle value uint32_t toggle_reset : 1 ; uint32_t stall : 1 ; uint32_t disable : 1 ; @@ -180,6 +185,7 @@ typedef struct CFG_TUD_MEM_SECTION TU_ATTR_ALIGNED(256) static dcd_data_t _dcd; // Dummy buffer to fix ZLPs overwriting the buffer (probably an USB/DMA controller bug) +// TODO find way to save memory CFG_TUD_MEM_SECTION TU_ATTR_ALIGNED(64) static uint8_t dummy[8]; //--------------------------------------------------------------------+ @@ -188,59 +194,73 @@ CFG_TUD_MEM_SECTION TU_ATTR_ALIGNED(64) static uint8_t dummy[8]; typedef struct { - dcd_registers_t* regs; // registers - const tusb_speed_t max_speed; // max link speed - const IRQn_Type irqnum; // IRQ number - const uint8_t ep_pairs; // Max bi-directional Endpoints + dcd_registers_t* regs; // registers + const bool is_highspeed; // max link speed + const IRQn_Type irqnum; // IRQ number + const uint8_t ep_pairs; // Max bi-directional Endpoints }dcd_controller_t; #ifdef INCLUDE_FSL_DEVICE_REGISTERS -static const dcd_controller_t _dcd_controller[] = -{ - { .regs = (dcd_registers_t*) USB0_BASE , .max_speed = TUSB_SPEED_FULL, .irqnum = USB0_IRQn, .ep_pairs = FSL_FEATURE_USB_EP_NUM }, +static const dcd_controller_t _dcd_controller[] = { + { .regs = (dcd_registers_t*) USB0_BASE , .is_highspeed = false, .irqnum = USB0_IRQn, .ep_pairs = FSL_FEATURE_USB_EP_NUM }, #if defined(FSL_FEATURE_SOC_USBHSD_COUNT) && FSL_FEATURE_SOC_USBHSD_COUNT - { .regs = (dcd_registers_t*) USBHSD_BASE, .max_speed = TUSB_SPEED_HIGH, .irqnum = USB1_IRQn, .ep_pairs = FSL_FEATURE_USBHSD_EP_NUM } + { .regs = (dcd_registers_t*) USBHSD_BASE, .is_highspeed = true, .irqnum = USB1_IRQn, .ep_pairs = FSL_FEATURE_USBHSD_EP_NUM } #endif }; #else -static const dcd_controller_t _dcd_controller[] = -{ - { .regs = (dcd_registers_t*) LPC_USB0_BASE, .max_speed = TUSB_SPEED_FULL, .irqnum = USB0_IRQn, .ep_pairs = 5 }, +static const dcd_controller_t _dcd_controller[] = { + { .regs = (dcd_registers_t*) LPC_USB0_BASE, .is_highspeed = false, .irqnum = USB0_IRQn, .ep_pairs = 5 }, }; #endif +#if defined(FSL_FEATURE_SOC_USBHSD_COUNT) && FSL_FEATURE_SOC_USBHSD_COUNT + #define IP3511_HAS_HIGHSPEED +#endif + //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -static inline uint16_t get_buf_offset(void const * buffer) -{ +TU_ATTR_ALWAYS_INLINE static inline uint16_t get_buf_offset(void const * buffer) { uint32_t addr = (uint32_t) buffer; TU_ASSERT( (addr & 0x3f) == 0, 0 ); return ( (addr >> 6) & 0xFFFFUL ) ; } -static inline uint8_t ep_addr2id(uint8_t ep_addr) -{ +TU_ATTR_ALWAYS_INLINE static inline uint8_t ep_addr2id(uint8_t ep_addr) { return 2*(ep_addr & 0x0F) + ((ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0); } +TU_ATTR_ALWAYS_INLINE static inline bool ep_is_iso(ep_cmd_sts_t* ep_cs, bool is_highspeed) { + return is_highspeed ? (ep_cs[0].cmd_sts.type && !ep_cs[0].cmd_sts.rf_tv) : ep_cs->cmd_sts.type; +} + +TU_ATTR_ALWAYS_INLINE static inline bool ep_is_bulk(ep_cmd_sts_t* ep_cs) { + return (ep_cs[0].cmd_sts.type == 0) && (ep_cs[0].cmd_sts.rf_tv == 0); +} + +TU_ATTR_ALWAYS_INLINE static inline ep_cmd_sts_t* get_ep_cs(uint8_t ep_id) { + return _dcd.ep[ep_id]; +} + +TU_ATTR_ALWAYS_INLINE static inline bool rhport_is_highspeed(uint8_t rhport) { + return _dcd_controller[rhport].is_highspeed; +} + //--------------------------------------------------------------------+ // CONTROLLER API //--------------------------------------------------------------------+ -static void prepare_setup_packet(uint8_t rhport) -{ - if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL ) - { - _dcd.ep[0][1].buffer_fs.offset = get_buf_offset(_dcd.setup_packet); - }else - { - _dcd.ep[0][1].buffer_hs.offset = get_buf_offset(_dcd.setup_packet); +static void prepare_setup_packet(uint8_t rhport) { + uint16_t const buf_offset = get_buf_offset(_dcd.setup_packet); + if ( _dcd_controller[rhport].is_highspeed ) { + _dcd.ep[0][1].buffer_hs.offset = buf_offset; + } else { + _dcd.ep[0][1].buffer_fs.offset = buf_offset; } } @@ -268,8 +288,8 @@ void dcd_init(uint8_t rhport) dcd_reg->DATABUFSTART = tu_align((uint32_t) &_dcd, TU_BIT(22)); // 22-bit alignment dcd_reg->INTSTAT |= dcd_reg->INTSTAT; // clear all pending interrupt dcd_reg->INTEN = INT_DEVICE_STATUS_MASK; - dcd_reg->DEVCMDSTAT |= CMDSTAT_DEVICE_ENABLE_MASK | CMDSTAT_DEVICE_CONNECT_MASK | - CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK; + dcd_reg->DEVCMDSTAT |= DEVCMDSTAT_DEVICE_ENABLE_MASK | DEVCMDSTAT_DEVICE_CONNECT_MASK | + DEVCMDSTAT_RESET_CHANGE_MASK | DEVCMDSTAT_CONNECT_CHANGE_MASK | DEVCMDSTAT_SUSPEND_CHANGE_MASK; NVIC_ClearPendingIRQ(_dcd_controller[rhport].irqnum); } @@ -291,7 +311,7 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr) // Response with status first before changing device address dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); - dcd_reg->DEVCMDSTAT &= ~CMDSTAT_DEVICE_ADDR_MASK; + dcd_reg->DEVCMDSTAT &= ~DEVCMDSTAT_DEVICE_ADDR_MASK; dcd_reg->DEVCMDSTAT |= dev_addr; } @@ -303,13 +323,13 @@ void dcd_remote_wakeup(uint8_t rhport) void dcd_connect(uint8_t rhport) { dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->DEVCMDSTAT |= CMDSTAT_DEVICE_CONNECT_MASK; + dcd_reg->DEVCMDSTAT |= DEVCMDSTAT_DEVICE_CONNECT_MASK; } void dcd_disconnect(uint8_t rhport) { dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->DEVCMDSTAT &= ~CMDSTAT_DEVICE_CONNECT_MASK; + dcd_reg->DEVCMDSTAT &= ~DEVCMDSTAT_DEVICE_CONNECT_MASK; } void dcd_sof_enable(uint8_t rhport, bool en) @@ -340,19 +360,39 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) _dcd.ep[ep_id][0].cmd_sts.stall = 0; _dcd.ep[ep_id][0].cmd_sts.toggle_reset = 1; - _dcd.ep[ep_id][0].cmd_sts.toggle_mode = 0; + _dcd.ep[ep_id][0].cmd_sts.rf_tv = 0; } bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) { //------------- Prepare Queue Head -------------// uint8_t ep_id = ep_addr2id(p_endpoint_desc->bEndpointAddress); + ep_cmd_sts_t* ep_cs = get_ep_cs(ep_id); // Check if endpoint is available - TU_ASSERT( _dcd.ep[ep_id][0].cmd_sts.disable && _dcd.ep[ep_id][1].cmd_sts.disable ); + TU_ASSERT( ep_cs[0].cmd_sts.disable && ep_cs[1].cmd_sts.disable ); edpt_reset(rhport, ep_id); - _dcd.ep[ep_id][0].cmd_sts.is_iso = (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS); + + switch (p_endpoint_desc->bmAttributes.xfer) { + case TUSB_XFER_ISOCHRONOUS: + ep_cs[0].cmd_sts.type = 1; + break; + + case TUSB_XFER_INTERRUPT: + // What is interrupt endpoint in rate feedback mode ? + if ( rhport_is_highspeed(rhport) ) { + ep_cs[0].cmd_sts.type = 1; + ep_cs[0].cmd_sts.rf_tv = 1; + } + break; + + case TUSB_XFER_BULK: + // nothing to do both type and rf_tv are 0 + break; + + default: break; + } // Enable EP interrupt dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; @@ -379,42 +419,50 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) _dcd.ep[ep_id][0].cmd_sts.disable = _dcd.ep[ep_id][1].cmd_sts.disable = 1; } -static void prepare_ep_xfer(uint8_t rhport, uint8_t ep_id, uint16_t buf_offset, uint16_t total_bytes) -{ +static void prepare_ep_xfer(uint8_t rhport, uint8_t ep_id, uint16_t buf_offset, uint16_t total_bytes) { uint16_t nbytes; - - if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL ) - { - nbytes = tu_min16(total_bytes, _dcd.ep[ep_id][0].cmd_sts.is_iso ? NBYTES_ISO_FS_MAX : NBYTES_CBI_FS_MAX); - _dcd.ep[ep_id][0].buffer_fs.offset = buf_offset; - _dcd.ep[ep_id][0].buffer_fs.nbytes = nbytes; - }else - { - nbytes = tu_min16(total_bytes, NBYTES_CBI_HS_MAX); - _dcd.ep[ep_id][0].buffer_hs.offset = buf_offset; - _dcd.ep[ep_id][0].buffer_hs.nbytes = nbytes; + ep_cmd_sts_t* ep_cs = get_ep_cs(ep_id); + + const bool is_iso = ep_is_iso(ep_cs, _dcd_controller[rhport].is_highspeed); + + if ( rhport_is_highspeed(rhport) ) { + nbytes = tu_min16(total_bytes, is_iso ? NBYTES_ISO_HS_MAX : NBYTES_CBI_HS_MAX); + #if TU_CHECK_MCU(OPT_MCU_LPC54) + // LPC54 Errata USB.1: In USB high-speed device mode, the NBytes field does not decrement after BULK OUT transfer. + // Suggested Work-around: Program the NByte to the max packet size (512) + // Actual Work-around: round up NByte to multiple of 4. + // Note: this can cause buffer overflowed and corrupt data if host send more data than total_bytes + if ( (ep_id > 1) && (ep_id & 0x01) == 0 && ep_is_bulk(ep_cs) ) { + if ( nbytes & 0x03 ) { + nbytes = tu_align4(nbytes) + 4; + } + } + #endif + + ep_cs[0].buffer_hs.offset = buf_offset; + ep_cs[0].buffer_hs.nbytes = nbytes; + }else { + nbytes = tu_min16(total_bytes, is_iso ? NBYTES_ISO_FS_MAX : NBYTES_CBI_FS_MAX); + ep_cs[0].buffer_fs.offset = buf_offset; + ep_cs[0].buffer_fs.nbytes = nbytes; } _dcd.dma[ep_id].nbytes = nbytes; - - _dcd.ep[ep_id][0].cmd_sts.active = 1; + ep_cs[0].cmd_sts.active = 1; } -bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) -{ +bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) { uint8_t const ep_id = ep_addr2id(ep_addr); + if (!buffer || total_bytes == 0) { + // Although having no data, ZLPs can cause buffer overwritten to zeroes. Probably due to USB/DMA controller side + // effect/bug. Assigned buffer offset to (valid) dummy to prevent overwriting to DATABUFSTART + buffer = (uint8_t *) (uint32_t) dummy; + } + tu_memclr(&_dcd.dma[ep_id], sizeof(xfer_dma_t)); _dcd.dma[ep_id].total_bytes = total_bytes; - if (!buffer) - { - // Although having no data, ZLPs can cause buffer overwritten to zeroes. - // Probably due to USB/DMA controller side effect/bug. - // Assigned buffer offset to (valid) dummy to prevent overwriting to DATABUFSTART - buffer = (uint8_t*)(uint32_t)dummy; - } - prepare_ep_xfer(rhport, ep_id, get_buf_offset(buffer), total_bytes); return true; @@ -441,23 +489,19 @@ static void bus_reset(uint8_t rhport) dcd_reg->EPSKIP = 0xFFFFFFFF; dcd_reg->INTSTAT = dcd_reg->INTSTAT; // clear all pending interrupt - dcd_reg->DEVCMDSTAT |= CMDSTAT_SETUP_RECEIVED_MASK; // clear setup received interrupt + dcd_reg->DEVCMDSTAT |= DEVCMDSTAT_SETUP_RECEIVED_MASK; // clear setup received interrupt dcd_reg->INTEN = INT_DEVICE_STATUS_MASK | TU_BIT(0) | TU_BIT(1); // enable device status & control endpoints } -static void process_xfer_isr(uint8_t rhport, uint32_t int_status) -{ +static void process_xfer_isr(uint8_t rhport, uint32_t int_status) { uint8_t const max_ep = 2*_dcd_controller[rhport].ep_pairs; - for(uint8_t ep_id = 0; ep_id < max_ep; ep_id++ ) - { - if ( tu_bit_test(int_status, ep_id) ) - { + for(uint8_t ep_id = 0; ep_id < max_ep; ep_id++ ) { + if ( tu_bit_test(int_status, ep_id) ) { ep_cmd_sts_t * ep_cs = &_dcd.ep[ep_id][0]; xfer_dma_t* xfer_dma = &_dcd.dma[ep_id]; - if ( ep_id == 0 || ep_id == 1) - { + if ( ep_id <= 1 ) { // For control endpoint, we need to manually clear Active bit ep_cs->cmd_sts.active = 0; } @@ -465,26 +509,29 @@ static void process_xfer_isr(uint8_t rhport, uint32_t int_status) uint16_t buf_offset; uint16_t buf_nbytes; - if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL) - { - buf_offset = ep_cs->buffer_fs.offset; - buf_nbytes = ep_cs->buffer_fs.nbytes; - }else - { + if ( rhport_is_highspeed(rhport) ) { buf_offset = ep_cs->buffer_hs.offset; buf_nbytes = ep_cs->buffer_hs.nbytes; + + #if TU_CHECK_MCU(OPT_MCU_LPC54) + // LPC54 Errata USB.2: In USB high-speed device mode, the NBytes field is not correct after BULK IN transfer + // There is no work-around. For EP in transfer, the NByte value can be ignored after a packet is transmitted. + if ( (ep_id > 1) && (ep_id & 0x01) == 1 && ep_is_bulk(ep_cs) ) { + buf_nbytes = 0; + } + #endif + } else { + buf_offset = ep_cs->buffer_fs.offset; + buf_nbytes = ep_cs->buffer_fs.nbytes; } xfer_dma->xferred_bytes += xfer_dma->nbytes - buf_nbytes; - if ( (buf_nbytes == 0) && (xfer_dma->total_bytes > xfer_dma->xferred_bytes) ) - { + if ( (buf_nbytes == 0) && (xfer_dma->total_bytes > xfer_dma->xferred_bytes) ) { // There is more data to transfer // buff_offset has been already increased by hw to correct value for next transfer prepare_ep_xfer(rhport, ep_id, buf_offset, xfer_dma->total_bytes - xfer_dma->xferred_bytes); - } - else - { + } else { // for detecting ZLP xfer_dma->total_bytes = xfer_dma->xferred_bytes; @@ -511,19 +558,16 @@ void dcd_int_handler(uint8_t rhport) //------------- Device Status -------------// if ( int_status & INT_DEVICE_STATUS_MASK ) { - dcd_reg->DEVCMDSTAT |= CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK; + dcd_reg->DEVCMDSTAT |= DEVCMDSTAT_RESET_CHANGE_MASK | DEVCMDSTAT_CONNECT_CHANGE_MASK | DEVCMDSTAT_SUSPEND_CHANGE_MASK; - if ( cmd_stat & CMDSTAT_RESET_CHANGE_MASK) // bus reset + if ( cmd_stat & DEVCMDSTAT_RESET_CHANGE_MASK) // bus reset { bus_reset(rhport); tusb_speed_t speed = TUSB_SPEED_FULL; - - if (_dcd_controller[rhport].max_speed == TUSB_SPEED_HIGH) - { + if ( _dcd_controller[rhport].is_highspeed ) { // 0 : reserved, 1 : full, 2 : high, 3: super - if ( 2 == ((cmd_stat >> CMDSTAT_SPEED_SHIFT) & 0x3UL) ) - { + if ( 2 == ((cmd_stat >> DEVCMDSTAT_SPEED_SHIFT) & 0x3UL) ) { speed= TUSB_SPEED_HIGH; } } @@ -531,35 +575,35 @@ void dcd_int_handler(uint8_t rhport) dcd_event_bus_reset(rhport, speed, true); } - if (cmd_stat & CMDSTAT_CONNECT_CHANGE_MASK) + if (cmd_stat & DEVCMDSTAT_CONNECT_CHANGE_MASK) { // device disconnect - if (cmd_stat & CMDSTAT_DEVICE_ADDR_MASK) + if (cmd_stat & DEVCMDSTAT_DEVICE_ADDR_MASK) { // debouncing as this can be set when device is powering dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true); } } - if (cmd_stat & CMDSTAT_SUSPEND_CHANGE_MASK) + if (cmd_stat & DEVCMDSTAT_SUSPEND_CHANGE_MASK) { // suspend signal, bus idle for more than 3ms // Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration. - if (cmd_stat & CMDSTAT_DEVICE_ADDR_MASK) + if (cmd_stat & DEVCMDSTAT_DEVICE_ADDR_MASK) { - dcd_event_bus_signal(rhport, (cmd_stat & CMDSTAT_DEVICE_SUSPEND_MASK) ? DCD_EVENT_SUSPEND : DCD_EVENT_RESUME, true); + dcd_event_bus_signal(rhport, (cmd_stat & DEVCMDSTAT_DEVICE_SUSPEND_MASK) ? DCD_EVENT_SUSPEND : DCD_EVENT_RESUME, true); } } } // Setup Receive - if ( tu_bit_test(int_status, 0) && (cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) ) + if ( tu_bit_test(int_status, 0) && (cmd_stat & DEVCMDSTAT_SETUP_RECEIVED_MASK) ) { // Follow UM flowchart to clear Active & Stall on both Control IN/OUT endpoints _dcd.ep[0][0].cmd_sts.active = _dcd.ep[1][0].cmd_sts.active = 0; _dcd.ep[0][0].cmd_sts.stall = _dcd.ep[1][0].cmd_sts.stall = 0; - dcd_reg->DEVCMDSTAT |= CMDSTAT_SETUP_RECEIVED_MASK; + dcd_reg->DEVCMDSTAT |= DEVCMDSTAT_SETUP_RECEIVED_MASK; dcd_event_setup_received(rhport, _dcd.setup_packet, true); -- cgit v1.3.1 From 502b1bdda62f0f207d9a51daf134574e455f3aa2 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 27 Aug 2023 23:45:34 +0700 Subject: more update to transaction --- examples/host/cdc_msc_hid/src/tusb_config.h | 9 ++-- examples/host/msc_file_explorer/src/tusb_config.h | 10 +++-- src/common/tusb_mcu.h | 12 ++++++ src/host/hcd.h | 4 +- src/host/usbh.c | 1 + src/portable/analog/max3421/hcd_max3421.c | 51 +++++++++++++++-------- 6 files changed, 62 insertions(+), 25 deletions(-) (limited to 'src/common') diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index abb75f068..7d621d466 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -35,9 +35,12 @@ //--------------------------------------------------------------------+ #if CFG_TUSB_MCU == OPT_MCU_RP2040 -// change to 1 if using pico-pio-usb as host controller for raspberry rp2040 -#define CFG_TUH_RPI_PIO_USB 0 -#define BOARD_TUH_RHPORT CFG_TUH_RPI_PIO_USB + // change to 1 if using pico-pio-usb as host controller for raspberry rp2040 + #define CFG_TUH_RPI_PIO_USB 0 + #define BOARD_TUH_RHPORT CFG_TUH_RPI_PIO_USB +#elif CFG_TUSB_MCU == OPT_MCU_NRF5X + // Use external USB controller (via SPI) MAX3421E (aka usb host shield) + #define CFG_TUH_MAX3421 1 #endif // RHPort number used for host can be defined by board.mk, default to port 0 diff --git a/examples/host/msc_file_explorer/src/tusb_config.h b/examples/host/msc_file_explorer/src/tusb_config.h index 1e0d067bf..bb2fd4cf5 100644 --- a/examples/host/msc_file_explorer/src/tusb_config.h +++ b/examples/host/msc_file_explorer/src/tusb_config.h @@ -35,11 +35,15 @@ //--------------------------------------------------------------------+ #if CFG_TUSB_MCU == OPT_MCU_RP2040 -// change to 1 if using pico-pio-usb as host controller for raspberry rp2040 -#define CFG_TUH_RPI_PIO_USB 0 -#define BOARD_TUH_RHPORT CFG_TUH_RPI_PIO_USB + // change to 1 if using pico-pio-usb as host controller for raspberry rp2040 + #define CFG_TUH_RPI_PIO_USB 0 + #define BOARD_TUH_RHPORT CFG_TUH_RPI_PIO_US +#elif CFG_TUSB_MCU == OPT_MCU_NRF5X + // Use external USB controller (via SPI) MAX3421E (aka usb host shield) + #define CFG_TUH_MAX3421 1 #endif + // RHPort number used for host can be defined by board.mk, default to port 0 #ifndef BOARD_TUH_RHPORT #define BOARD_TUH_RHPORT 0 diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 35f94efbc..21939df7c 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -385,6 +385,18 @@ #define TUP_RHPORT_HIGHSPEED 1 #endif + +//--------------------------------------------------------------------+ +// External USB controller +//--------------------------------------------------------------------+ + +#if defined(CFG_TUH_MAX3421) & CFG_TUH_MAX3421 + #ifndef CFG_TUH_MAX3421_ENDPOINT_TOTAL + #define CFG_TUH_MAX3421_ENDPOINT_TOTAL (8 + 4*(CFG_TUH_DEVICE_MAX-1)) + #endif +#endif + + //--------------------------------------------------------------------+ // Default Values //--------------------------------------------------------------------+ diff --git a/src/host/hcd.h b/src/host/hcd.h index 1f01a1a2f..e25b20ea3 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -39,7 +39,7 @@ // Configuration //--------------------------------------------------------------------+ -// Max number of endpoints per device +// Max number of endpoints pair per device // TODO optimize memory usage #ifndef CFG_TUH_ENDPOINT_MAX #define CFG_TUH_ENDPOINT_MAX 16 @@ -167,7 +167,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr); //--------------------------------------------------------------------+ // Open an endpoint -bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); +bool hcd_edpt_open(uint8_t rhport, uint8_t daddr, tusb_desc_endpoint_t const * ep_desc); // Submit a transfer, when complete hcd_event_xfer_complete() must be invoked bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen); diff --git a/src/host/usbh.c b/src/host/usbh.c index 7a09f5b6e..12a7f5839 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -919,6 +919,7 @@ TU_ATTR_FAST_FUNC void hcd_event_handler(hcd_event_t const* event, bool in_isr) switch (event->event_id) { // case HCD_EVENT_DEVICE_REMOVE: +// // FIXME device remove from a hub need an HCD API for hcd to free up endpoint // // mark device as removing to prevent further xfer before the event is processed in usbh task // break; diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c index e546f99ce..574cca788 100644 --- a/src/portable/analog/max3421/hcd_max3421.c +++ b/src/portable/analog/max3421/hcd_max3421.c @@ -582,6 +582,7 @@ void xact_out(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) { } uint8_t const xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size); + TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ, ); fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, in_isr); sndbc_write(rhport, xact_len, in_isr); @@ -602,6 +603,28 @@ void xact_in(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) { hxfr_write(rhport, hxfr, in_isr); } +TU_ATTR_ALWAYS_INLINE static inline void xact_inout(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) { + if (ep->ep_dir) { + xact_in(rhport, ep, switch_ep, in_isr); + }else { + xact_out(rhport, ep, switch_ep, in_isr); + } +} + +void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t result, uint8_t data_toggle) { + (void) rhport; + (void) result; + ep->xfer_pending = 0; + ep->data_toggle = data_toggle; + //uint8_t const ep_addr = tu_edpt_addr(ep->ep_num, ep->ep_dir); + //hcd_event_xfer_complete(rhport, ep_addr, ep->xferred_len, result, true); + +// max3421_ep_t *next_ep = find_next_pending_ep(ep); +// if (next_ep) { +// xact_inout(rhport, next_ep, true, true); +// } +} + // Submit a transfer, when complete hcd_event_xfer_complete() must be invoked bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) { (void) rhport; @@ -612,6 +635,9 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf max3421_ep_t* ep = find_opened_ep(daddr, ep_num, ep_dir); TU_ASSERT(ep); + // control transfer can switch direction + ep->ep_dir = ep_dir; + ep->buf = buffer; ep->total_len = buflen; ep->xferred_len = 0; @@ -636,12 +662,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf } } - if ( 0 == ep_dir ) { - TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ); - xact_out(rhport, ep, true, false); - } else { - xact_in(rhport, ep, true, false); - } + xact_inout(rhport, ep, true, false); } return true; @@ -662,6 +683,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t daddr, uint8_t const setup_packet[8] (void) rhport; max3421_ep_t* ep = find_opened_ep(daddr, 0, 0); + ep->ep_dir = 0; ep->total_len = 8; ep->xferred_len = 0; @@ -715,18 +737,13 @@ static void handle_xfer_done(uint8_t rhport) { }else { // NAK on non-control, find next pending to switch max3421_ep_t *next_ep = find_next_pending_ep(ep); - TU_ASSERT(next_ep, ); if (ep == next_ep) { // only one pending, retry immediately hxfr_write(rhport, _hcd_data.hxfr, true); - }else { + }else if (next_ep) { // switch to next pending TODO could have issue with double buffered if not clear previously out data - if ( ep_dir ) { - xact_in(rhport, next_ep, true, true); - } else { - xact_out(rhport, next_ep, true, true); - } + xact_inout(rhport, next_ep, true, true); } } return; @@ -744,8 +761,8 @@ static void handle_xfer_done(uint8_t rhport) { // short packet or all bytes transferred if ( ep->xfer_complete ) { - // save data toggle - ep->data_toggle = (hrsl & HRSL_RCVTOGRD) ? 1 : 0; + uint8_t const dt = (hrsl & HRSL_RCVTOGRD) ? 1 : 0; // save data toggle + xfer_complete_isr(rhport, ep, xfer_result, dt); hcd_event_xfer_complete(_hcd_data.peraddr, TUSB_DIR_IN_MASK | ep_num, ep->xferred_len, xfer_result, true); }else { // more to transfer @@ -767,8 +784,8 @@ static void handle_xfer_done(uint8_t rhport) { ep->buf += xact_len; if (xact_len < ep->packet_size || ep->xferred_len >= ep->total_len) { - // save data toggle - ep->data_toggle = (hrsl & HRSL_SNDTOGRD) ? 1 : 0; + uint8_t const dt = (hrsl & HRSL_SNDTOGRD) ? 1 : 0; // save data toggle + xfer_complete_isr(rhport, ep, xfer_result, dt); hcd_event_xfer_complete(_hcd_data.peraddr, ep_num, ep->xferred_len, xfer_result, true); } else { xact_out(rhport, ep, false, true); -- cgit v1.3.1 From 588b758717f3c22aa8046d61247b9967de8840b7 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 28 Aug 2023 17:34:22 +0700 Subject: rename OPT_MCU_KINETIS_K64 to OPT_MCU_KINETIS_K --- hw/bsp/board_mcu.h | 2 +- src/common/tusb_mcu.h | 2 +- src/portable/nxp/khci/dcd_khci.c | 6 +++--- src/tusb_option.h | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) (limited to 'src/common') diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index 3928435f0..b0f7891b4 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -47,7 +47,7 @@ #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX, OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX, OPT_MCU_MCXN9) #include "fsl_device_registers.h" -#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L, OPT_MCU_KINETIS_K64) +#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L, OPT_MCU_KINETIS_K) #include "fsl_device_registers.h" #elif CFG_TUSB_MCU == OPT_MCU_NRF5X diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 4a0c5acef..d983f8677 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -97,7 +97,7 @@ #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_RHPORT_HIGHSPEED 1 -#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L, OPT_MCU_KINETIS_K64) +#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L, OPT_MCU_KINETIS_K) #define TUP_USBIP_CHIPIDEA_FS #define TUP_USBIP_CHIPIDEA_FS_KINETIS #define TUP_DCD_ENDPOINT_MAX 16 diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c index d957338ad..2293d1b59 100644 --- a/src/portable/nxp/khci/dcd_khci.c +++ b/src/portable/nxp/khci/dcd_khci.c @@ -269,10 +269,10 @@ void dcd_init(uint8_t rhport) { (void) rhport; -#if (CFG_TUSB_MCU == OPT_MCU_KINETIS_K64) +#if (CFG_TUSB_MCU == OPT_MCU_KINETIS_K) uint32_t clk_recover_irc_en; uint32_t clk_recover_ctrl; - + clk_recover_irc_en = KHCI->CLK_RECOVER_IRC_EN; clk_recover_ctrl = KHCI->CLK_RECOVER_CTRL; @@ -284,7 +284,7 @@ void dcd_init(uint8_t rhport) #else KHCI->USBTRC0 |= USB_USBTRC0_USBRESET_MASK; while (KHCI->USBTRC0 & USB_USBTRC0_USBRESET_MASK); -#endif +#endif tu_memclr(&_dcd, sizeof(_dcd)); KHCI->USBTRC0 |= TU_BIT(6); /* software must set this bit to 1 */ diff --git a/src/tusb_option.h b/src/tusb_option.h index bbaa2a53a..bf2667c4c 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -121,7 +121,7 @@ #define OPT_MCU_KINETIS_KL 1200 ///< NXP KL series #define OPT_MCU_KINETIS_K32L 1201 ///< NXP K32L series #define OPT_MCU_KINETIS_K32 1201 ///< Alias to K32L -#define OPT_MCU_KINETIS_K64 1202 ///< NXP K64 series +#define OPT_MCU_KINETIS_K 1202 ///< NXP K series #define OPT_MCU_MKL25ZXX 1200 ///< Alias to KL (obsolete) #define OPT_MCU_K32L2BXX 1201 ///< Alias to K32 (obsolete) -- cgit v1.3.1 From 1ab488eb06ef4cb8ad9c0cff91e6b0caf76f73c4 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 30 Aug 2023 16:04:18 +0700 Subject: call xfer_complete_isr() when result is not successful (stalled or failed) --- hw/bsp/nrf/boards/pca10095/board.h | 9 +++++++ hw/bsp/nrf/family.c | 7 +++-- hw/bsp/nrf/nrfx_config.h | 2 +- src/common/tusb_mcu.h | 2 +- src/portable/analog/max3421/hcd_max3421.c | 43 ++++++++++++++++++++++--------- 5 files changed, 47 insertions(+), 16 deletions(-) (limited to 'src/common') diff --git a/hw/bsp/nrf/boards/pca10095/board.h b/hw/bsp/nrf/boards/pca10095/board.h index fd3c63d6a..b9d3a19dc 100644 --- a/hw/bsp/nrf/boards/pca10095/board.h +++ b/hw/bsp/nrf/boards/pca10095/board.h @@ -31,6 +31,8 @@ extern "C" { #endif +#define _PINNUM(port, pin) ((port)*32 + (pin)) + // LED #define LED_PIN 28 #define LED_STATE_ON 0 @@ -43,6 +45,13 @@ #define UART_RX_PIN 32 #define UART_TX_PIN 33 +// SPI for USB host shield +#define MAX3421E_SCK_PIN _PINNUM(1, 15) +#define MAX3421E_MOSI_PIN _PINNUM(1, 13) +#define MAX3421E_MISO_PIN _PINNUM(1, 14) +#define MAX3421E_CS_PIN _PINNUM(1, 12) +#define MAX3241E_INTR_PIN _PINNUM(1, 11) + #ifdef __cplusplus } #endif diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c index 083efc235..2b4260083 100644 --- a/hw/bsp/nrf/family.c +++ b/hw/bsp/nrf/family.c @@ -34,6 +34,7 @@ #pragma GCC diagnostic ignored "-Wcast-align" #pragma GCC diagnostic ignored "-Wunused-parameter" #pragma GCC diagnostic ignored "-Wundef" +#pragma GCC diagnostic ignored "-Wredundant-decls" #endif #include "nrfx.h" @@ -94,7 +95,7 @@ TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) { //------------- Host using MAX2341E -------------// #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421 -static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(0); +static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(1); void max3421e_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) { if ( !(pin == MAX3241E_INTR_PIN && action == NRF_GPIOTE_POLARITY_HITOLO) ) return; @@ -222,7 +223,8 @@ void board_init(void) { #endif #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421 - // MAX3421 need 3.3v signal + // MAX3421 need 3.3v signal (may not be needed) + #if defined(UICR_REGOUT0_VOUT_Msk) && 0 if ((NRF_UICR->REGOUT0 & UICR_REGOUT0_VOUT_Msk) != UICR_REGOUT0_VOUT_3V3) { NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos; while (NRF_NVMC->READY == NVMC_READY_READY_Busy){} @@ -234,6 +236,7 @@ void board_init(void) { NVIC_SystemReset(); } + #endif // manually manage CS nrf_gpio_cfg_output(MAX3421E_CS_PIN); diff --git a/hw/bsp/nrf/nrfx_config.h b/hw/bsp/nrf/nrfx_config.h index e3d0ea91b..95ef33ce4 100644 --- a/hw/bsp/nrf/nrfx_config.h +++ b/hw/bsp/nrf/nrfx_config.h @@ -11,7 +11,7 @@ #define NRFX_UARTE0_ENABLED 1 #define NRFX_SPIM_ENABLED 1 -#define NRFX_SPIM0_ENABLED 1 +#define NRFX_SPIM1_ENABLED 1 // use SPI1 since nrf5340 share uart with spi #define NRFX_PRS_ENABLED 0 #define NRFX_USBREG_ENABLED 1 diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 21939df7c..8807ff8aa 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -390,7 +390,7 @@ // External USB controller //--------------------------------------------------------------------+ -#if defined(CFG_TUH_MAX3421) & CFG_TUH_MAX3421 +#if defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421 #ifndef CFG_TUH_MAX3421_ENDPOINT_TOTAL #define CFG_TUH_MAX3421_ENDPOINT_TOTAL (8 + 4*(CFG_TUH_DEVICE_MAX-1)) #endif diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c index 461e02593..705bb5bfd 100644 --- a/src/portable/analog/max3421/hcd_max3421.c +++ b/src/portable/analog/max3421/hcd_max3421.c @@ -374,7 +374,8 @@ static max3421_ep_t * find_next_pending_ep(max3421_ep_t * cur_ep) { // starting from next endpoint for (size_t i = idx + 1; i < CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) { max3421_ep_t* ep = &_hcd_data.ep[i]; - if (ep->xfer_pending) { + if (ep->xfer_pending && ep->packet_size) { +// TU_LOG3("next pending i = %u\n", i); return ep; } } @@ -382,7 +383,8 @@ static max3421_ep_t * find_next_pending_ep(max3421_ep_t * cur_ep) { // wrap around including current endpoint for (size_t i = 0; i <= idx; i++) { max3421_ep_t* ep = &_hcd_data.ep[i]; - if (ep->xfer_pending) { + if (ep->xfer_pending && ep->packet_size) { +// TU_LOG3("next pending i = %u\n", i); return ep; } } @@ -464,6 +466,10 @@ bool hcd_init(uint8_t rhport) { // full duplex, interrupt negative edge reg_write(rhport, PINCTL_ADDR, PINCTL_FDUPSPI, false); + // V1 is 0x01, V2 is 0x12, V3 is 0x13 + // uint8_t const revision = reg_read(rhport, REVISION_ADDR, false); + // TU_LOG2_HEX(revision); + // reset reg_write(rhport, USBCTL_ADDR, USBCTL_CHIPRES, false); reg_write(rhport, USBCTL_ADDR, 0, false); @@ -699,6 +705,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t daddr, uint8_t const setup_packet[8] ep->ep_dir = 0; ep->total_len = 8; ep->xferred_len = 0; + ep->xfer_pending = 1; ep->is_setup = 1; fifo_write(rhport, SUDFIFO_ADDR, setup_packet, 8, false); @@ -724,9 +731,16 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) { // Interrupt Handler //--------------------------------------------------------------------+ -static void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t result, uint8_t data_toggle) { +static void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t result, uint8_t hrsl) { uint8_t const ep_addr = tu_edpt_addr(ep->ep_num, ep->ep_dir); - ep->data_toggle = data_toggle; + + // save data toggle + if (ep->ep_dir) { + ep->data_toggle = (hrsl & HRSL_RCVTOGRD) ? 1 : 0; + }else { + ep->data_toggle = (hrsl & HRSL_SNDTOGRD) ? 1 : 0; + } + ep->xfer_pending = 0; hcd_event_xfer_complete(ep->daddr, ep_addr, ep->xferred_len, result, true); @@ -763,10 +777,6 @@ static void handle_xfer_done(uint8_t rhport) { xfer_result = XFER_RESULT_STALLED; break; - case HRSL_BAD_REQ: - // occurred when initialized without any pending transfer. Skip for now - return; - case HRSL_NAK: if (ep_num == 0) { // NAK on control, retry immediately @@ -781,15 +791,26 @@ static void handle_xfer_done(uint8_t rhport) { }else if (next_ep) { // switch to next pending TODO could have issue with double buffered if not clear previously out data xact_inout(rhport, next_ep, true, true); + }else { + TU_ASSERT(false,); } } return; + case HRSL_BAD_REQ: + // occurred when initialized without any pending transfer. Skip for now + return; + default: xfer_result = XFER_RESULT_FAILED; break; } + if (xfer_result != XFER_RESULT_SUCCESS) { + xfer_complete_isr(rhport, ep, xfer_result, hrsl); + return; + } + if (ep_dir) { // IN transfer: fifo data is already received in RCVDAV IRQ if ( hxfr_type & HXFR_HS ) { @@ -798,8 +819,7 @@ static void handle_xfer_done(uint8_t rhport) { // short packet or all bytes transferred if ( ep->xfer_complete ) { - uint8_t const dt = (hrsl & HRSL_RCVTOGRD) ? 1 : 0; // save data toggle - xfer_complete_isr(rhport, ep, xfer_result, dt); + xfer_complete_isr(rhport, ep, xfer_result, hrsl); }else { // more to transfer hxfr_write(rhport, _hcd_data.hxfr, true); @@ -820,8 +840,7 @@ static void handle_xfer_done(uint8_t rhport) { ep->buf += xact_len; if (xact_len < ep->packet_size || ep->xferred_len >= ep->total_len) { - uint8_t const dt = (hrsl & HRSL_SNDTOGRD) ? 1 : 0; // save data toggle - xfer_complete_isr(rhport, ep, xfer_result, dt); + xfer_complete_isr(rhport, ep, xfer_result, hrsl); } else { // more to transfer xact_out(rhport, ep, false, true); -- cgit v1.3.1 From 1b9108ea0dc237835e801d26cc7eef052acad987 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 6 Sep 2023 17:11:35 +0700 Subject: minor debug clean up --- src/common/tusb_common.h | 6 ++---- src/common/tusb_debug.h | 37 ++++++++++++++----------------------- src/device/usbd.c | 2 +- src/device/usbd_pvt.h | 15 ++++++--------- src/host/usbh.c | 6 ++---- 5 files changed, 25 insertions(+), 41 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index c303c6eaf..6fffed11c 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -122,13 +122,11 @@ TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, c //------------- Bytes -------------// -TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_u32(uint8_t b3, uint8_t b2, uint8_t b1, uint8_t b0) -{ +TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_u32(uint8_t b3, uint8_t b2, uint8_t b1, uint8_t b0) { return ( ((uint32_t) b3) << 24) | ( ((uint32_t) b2) << 16) | ( ((uint32_t) b1) << 8) | b0; } -TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u16(uint8_t high, uint8_t low) -{ +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u16(uint8_t high, uint8_t low) { return (uint16_t) ((((uint16_t) high) << 8) | low); } diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index 36507041f..99176c02a 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -58,16 +58,14 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent); #define tu_printf printf #endif -static inline void tu_print_arr(uint8_t const* buf, uint32_t bufsize) -{ +static inline void tu_print_buf(uint8_t const* buf, uint32_t bufsize) { for(uint32_t i=0; i= 2 #define TU_LOG2 TU_LOG1 #define TU_LOG2_MEM TU_LOG1_MEM - #define TU_LOG2_ARR TU_LOG1_ARR - #define TU_LOG2_PTR TU_LOG1_PTR + #define TU_LOG2_BUF TU_LOG1_BUF #define TU_LOG2_INT TU_LOG1_INT #define TU_LOG2_HEX TU_LOG1_HEX #endif @@ -95,30 +91,25 @@ static inline void tu_print_arr(uint8_t const* buf, uint32_t bufsize) #if CFG_TUSB_DEBUG >= 3 #define TU_LOG3 TU_LOG1 #define TU_LOG3_MEM TU_LOG1_MEM - #define TU_LOG3_ARR TU_LOG1_ARR - #define TU_LOG3_PTR TU_LOG1_PTR + #define TU_LOG3_BUF TU_LOG1_BUF #define TU_LOG3_INT TU_LOG1_INT #define TU_LOG3_HEX TU_LOG1_HEX #endif -typedef struct -{ +typedef struct { uint32_t key; const char* data; } tu_lookup_entry_t; -typedef struct -{ +typedef struct { uint16_t count; tu_lookup_entry_t const* items; } tu_lookup_table_t; -static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key) -{ +static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key) { tu_static char not_found[11]; - for(uint16_t i=0; icount; i++) - { + for(uint16_t i=0; icount; i++) { if (p_table->items[i].key == key) return p_table->items[i].data; } @@ -133,7 +124,7 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3 #ifndef TU_LOG #define TU_LOG(n, ...) #define TU_LOG_MEM(n, ...) - #define TU_LOG_PTR(n, ...) + #define TU_LOG_BUF(n, ...) #define TU_LOG_INT(n, ...) #define TU_LOG_HEX(n, ...) #define TU_LOG_LOCATION() @@ -144,14 +135,14 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3 #define TU_LOG0(...) #define TU_LOG0_MEM(...) -#define TU_LOG0_PTR(...) +#define TU_LOG0_BUF(...) #define TU_LOG0_INT(...) #define TU_LOG0_HEX(...) #ifndef TU_LOG1 #define TU_LOG1(...) #define TU_LOG1_MEM(...) - #define TU_LOG1_PTR(...) + #define TU_LOG1_BUF(...) #define TU_LOG1_INT(...) #define TU_LOG1_HEX(...) #endif @@ -159,7 +150,7 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3 #ifndef TU_LOG2 #define TU_LOG2(...) #define TU_LOG2_MEM(...) - #define TU_LOG2_PTR(...) + #define TU_LOG2_BUF(...) #define TU_LOG2_INT(...) #define TU_LOG2_HEX(...) #endif @@ -167,7 +158,7 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3 #ifndef TU_LOG3 #define TU_LOG3(...) #define TU_LOG3_MEM(...) - #define TU_LOG3_PTR(...) + #define TU_LOG3_BUF(...) #define TU_LOG3_INT(...) #define TU_LOG3_HEX(...) #endif diff --git a/src/device/usbd.c b/src/device/usbd.c index f0d9fba52..50941c46f 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -506,7 +506,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) break; case DCD_EVENT_SETUP_RECEIVED: - TU_LOG_PTR(CFG_TUD_LOG_LEVEL, &event.setup_received); + TU_LOG_BUF(CFG_TUD_LOG_LEVEL, &event.setup_received, 8); TU_LOG_USBD("\r\n"); // Mark as connected after receiving 1st setup packet. diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h index 16585167f..153be7cee 100644 --- a/src/device/usbd_pvt.h +++ b/src/device/usbd_pvt.h @@ -23,8 +23,8 @@ * * This file is part of the TinyUSB stack. */ -#ifndef USBD_PVT_H_ -#define USBD_PVT_H_ +#ifndef _TUSB_USBD_PVT_H_ +#define _TUSB_USBD_PVT_H_ #include "osal/osal.h" #include "common/tusb_fifo.h" @@ -44,8 +44,7 @@ // Class Driver API //--------------------------------------------------------------------+ -typedef struct -{ +typedef struct { #if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL char const* name; #endif @@ -111,8 +110,7 @@ bool usbd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * p_endp // Check if endpoint is ready (not busy and not stalled) TU_ATTR_ALWAYS_INLINE static inline -bool usbd_edpt_ready(uint8_t rhport, uint8_t ep_addr) -{ +bool usbd_edpt_ready(uint8_t rhport, uint8_t ep_addr) { return !usbd_edpt_busy(rhport, ep_addr) && !usbd_edpt_stalled(rhport, ep_addr); } @@ -124,11 +122,10 @@ void usbd_sof_enable(uint8_t rhport, bool en); *------------------------------------------------------------------*/ bool usbd_open_edpt_pair(uint8_t rhport, uint8_t const* p_desc, uint8_t ep_count, uint8_t xfer_type, uint8_t* ep_out, uint8_t* ep_in); -void usbd_defer_func( osal_task_func_t func, void* param, bool in_isr ); - +void usbd_defer_func(osal_task_func_t func, void *param, bool in_isr); #ifdef __cplusplus } #endif -#endif /* USBD_PVT_H_ */ +#endif diff --git a/src/host/usbh.c b/src/host/usbh.c index bacb3a719..e60e680c2 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -583,7 +583,7 @@ bool tuh_control_xfer (tuh_xfer_t* xfer) { TU_LOG_USBH("[%u:%u] %s: ", rhport, daddr, (xfer->setup->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD && xfer->setup->bRequest <= TUSB_REQ_SYNCH_FRAME) ? tu_str_std_request[xfer->setup->bRequest] : "Class Request"); - TU_LOG_PTR(CFG_TUH_LOG_LEVEL, xfer->setup); + TU_LOG_BUF(CFG_TUH_LOG_LEVEL, xfer->setup, 8); TU_LOG_USBH("\r\n"); if (xfer->complete_cb) { @@ -660,10 +660,8 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result if (XFER_RESULT_SUCCESS != result) { TU_LOG1("[%u:%u] Control %s, xferred_bytes = %lu\r\n", rhport, dev_addr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED", xferred_bytes); - #if CFG_TUSB_DEBUG == 1 - TU_LOG1_PTR(request); + TU_LOG1_BUF(request, 8); TU_LOG1("\r\n"); - #endif // terminate transfer if any stage failed _xfer_complete(dev_addr, result); -- cgit v1.3.1 From 3b0ffd0f488671f1bafa4bcd9e22dd51f8bb6dee Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 27 Sep 2023 15:51:03 +0700 Subject: change hcd_int_handler(rhport, in_isr) signature: add in_isr change tuh_int_handler() to take in_isr as optional parameter (default = true) --- examples/host/bare_api/only.txt | 1 + examples/host/cdc_msc_hid/only.txt | 1 + examples/host/hid_controller/only.txt | 1 + examples/host/msc_file_explorer/only.txt | 1 + hw/bsp/imxrt/family.c | 4 +- hw/bsp/kinetis_kl/family.c | 2 +- hw/bsp/kinetis_kl/family.cmake | 75 ++++++++++---------- .../lpc17/boards/lpcxpresso1769/lpcxpresso1769.c | 2 +- hw/bsp/lpc17/boards/mbed1768/mbed1768.c | 2 +- hw/bsp/lpc18/family.c | 55 ++++++--------- hw/bsp/lpc40/family.c | 2 +- hw/bsp/lpc43/family.c | 4 +- hw/bsp/msp432e4/family.c | 2 +- hw/bsp/ngx4330/ngx4330.c | 4 +- hw/bsp/nrf/family.c | 2 +- hw/bsp/ra/family.c | 6 +- hw/bsp/rx/boards/rx65n_target/rx65n_target.c | 2 +- hw/bsp/samd21/family.c | 2 +- hw/bsp/samd51/family.c | 2 +- hw/bsp/stm32g4/family.cmake | 81 +++++++++++----------- hw/bsp/tm4c123/family.c | 2 +- src/common/tusb_common.h | 2 - src/common/tusb_timeout.h | 80 --------------------- src/common/tusb_verify.h | 52 +++++--------- src/host/hcd.h | 2 +- src/host/usbh.h | 11 ++- src/portable/analog/max3421/hcd_max3421.c | 3 +- src/portable/ehci/ehci.c | 4 +- src/portable/mentor/musb/hcd_musb.c | 4 +- src/portable/nxp/khci/hcd_khci.c | 7 +- src/portable/ohci/ohci.c | 5 +- src/portable/raspberrypi/rp2040/hcd_rp2040.c | 4 +- src/portable/renesas/rusb2/hcd_rusb2.c | 5 +- src/portable/template/hcd_template.c | 3 +- src/tusb.h | 4 +- 35 files changed, 172 insertions(+), 267 deletions(-) delete mode 100644 src/common/tusb_timeout.h (limited to 'src/common') diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt index 3837ac8a2..fee10f9e2 100644 --- a/examples/host/bare_api/only.txt +++ b/examples/host/bare_api/only.txt @@ -1,3 +1,4 @@ +mcu:KINETIS_KL mcu:LPC175X_6X mcu:LPC177X_8X mcu:LPC18XX diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt index 3837ac8a2..fee10f9e2 100644 --- a/examples/host/cdc_msc_hid/only.txt +++ b/examples/host/cdc_msc_hid/only.txt @@ -1,3 +1,4 @@ +mcu:KINETIS_KL mcu:LPC175X_6X mcu:LPC177X_8X mcu:LPC18XX diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt index 3837ac8a2..fee10f9e2 100644 --- a/examples/host/hid_controller/only.txt +++ b/examples/host/hid_controller/only.txt @@ -1,3 +1,4 @@ +mcu:KINETIS_KL mcu:LPC175X_6X mcu:LPC177X_8X mcu:LPC18XX diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt index 3837ac8a2..fee10f9e2 100644 --- a/examples/host/msc_file_explorer/only.txt +++ b/examples/host/msc_file_explorer/only.txt @@ -1,3 +1,4 @@ +mcu:KINETIS_KL mcu:LPC175X_6X mcu:LPC177X_8X mcu:LPC18XX diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c index ec95a8b24..32d89f794 100644 --- a/hw/bsp/imxrt/family.c +++ b/hw/bsp/imxrt/family.c @@ -188,7 +188,7 @@ void USB_OTG1_IRQHandler(void) #endif #if PORT_SUPPORT_HOST(0) - tuh_int_handler(0); + tuh_int_handler(0, true); #endif } @@ -199,7 +199,7 @@ void USB_OTG2_IRQHandler(void) #endif #if PORT_SUPPORT_HOST(1) - tuh_int_handler(1); + tuh_int_handler(1, true); #endif } diff --git a/hw/bsp/kinetis_kl/family.c b/hw/bsp/kinetis_kl/family.c index 3e9aa83a4..c436be3e6 100644 --- a/hw/bsp/kinetis_kl/family.c +++ b/hw/bsp/kinetis_kl/family.c @@ -39,7 +39,7 @@ void USB0_IRQHandler(void) { #if CFG_TUH_ENABLED - tuh_int_handler(0); + tuh_int_handler(0, true); #endif #if CFG_TUD_ENABLED tud_int_handler(0); diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake index 793ef1783..4151979a0 100644 --- a/hw/bsp/kinetis_kl/family.cmake +++ b/hw/bsp/kinetis_kl/family.cmake @@ -22,48 +22,47 @@ set(FAMILY_MCUS KINETIS_KL CACHE INTERNAL "") #------------------------------------ # only need to be built ONCE for all examples function(add_board_target BOARD_TARGET) - if (NOT TARGET ${BOARD_TARGET}) - add_library(${BOARD_TARGET} STATIC - ${SDK_DIR}/drivers/gpio/fsl_gpio.c - ${SDK_DIR}/drivers/lpsci/fsl_lpsci.c - ${SDK_DIR}/drivers/uart/fsl_uart.c - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c - ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c - ) - target_compile_definitions(${BOARD_TARGET} PUBLIC - ) - target_include_directories(${BOARD_TARGET} PUBLIC - ${CMSIS_DIR}/CMSIS/Core/Include - ${SDK_DIR}/devices/${MCU_VARIANT} - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers - ${SDK_DIR}/drivers/common - ${SDK_DIR}/drivers/gpio - ${SDK_DIR}/drivers/lpsci - ${SDK_DIR}/drivers/port - ${SDK_DIR}/drivers/smc - ${SDK_DIR}/drivers/uart - ) + if (TARGET ${BOARD_TARGET}) + return() + endif () - update_board(${BOARD_TARGET}) + add_library(${BOARD_TARGET} STATIC + ${SDK_DIR}/drivers/gpio/fsl_gpio.c + ${SDK_DIR}/drivers/lpsci/fsl_lpsci.c + ${SDK_DIR}/drivers/uart/fsl_uart.c + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c + ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c + ) + target_compile_definitions(${BOARD_TARGET} PUBLIC + ) + target_include_directories(${BOARD_TARGET} PUBLIC + ${CMSIS_DIR}/CMSIS/Core/Include + ${SDK_DIR}/devices/${MCU_VARIANT} + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers + ${SDK_DIR}/drivers/common + ${SDK_DIR}/drivers/gpio + ${SDK_DIR}/drivers/lpsci + ${SDK_DIR}/drivers/port + ${SDK_DIR}/drivers/smc + ${SDK_DIR}/drivers/uart + ) + update_board(${BOARD_TARGET}) - # LD_FILE and STARTUP_FILE can be defined in board.cmake + # LD_FILE and STARTUP_FILE can be defined in board.cmake + target_sources(${BOARD_TARGET} PUBLIC + ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} + ) - target_sources(${BOARD_TARGET} PUBLIC - ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--script=${LD_FILE_GNU}" + # nanolib + --specs=nosys.specs --specs=nano.specs + ) + elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--config=${LD_FILE_IAR}" ) - - if (CMAKE_C_COMPILER_ID STREQUAL "GNU") - target_link_options(${BOARD_TARGET} PUBLIC - "LINKER:--script=${LD_FILE_GNU}" - # nanolib - --specs=nosys.specs - --specs=nano.specs - ) - elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") - target_link_options(${BOARD_TARGET} PUBLIC - "LINKER:--config=${LD_FILE_IAR}" - ) - endif () endif () endfunction() diff --git a/hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c b/hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c index c7d655368..8c26b906f 100644 --- a/hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c +++ b/hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c @@ -37,7 +37,7 @@ void USB_IRQHandler(void) #endif #if CFG_TUH_ENABLED - tuh_int_handler(0); + tuh_int_handler(0, true); #endif } diff --git a/hw/bsp/lpc17/boards/mbed1768/mbed1768.c b/hw/bsp/lpc17/boards/mbed1768/mbed1768.c index b2c92d640..613dcb570 100644 --- a/hw/bsp/lpc17/boards/mbed1768/mbed1768.c +++ b/hw/bsp/lpc17/boards/mbed1768/mbed1768.c @@ -151,7 +151,7 @@ void USB_IRQHandler(void) #endif #if CFG_TUH_ENABLED - tuh_int_handler(0); + tuh_int_handler(0, true); #endif } diff --git a/hw/bsp/lpc18/family.c b/hw/bsp/lpc18/family.c index b11f4fe0e..e6abecb4b 100644 --- a/hw/bsp/lpc18/family.c +++ b/hw/bsp/lpc18/family.c @@ -43,25 +43,23 @@ //--------------------------------------------------------------------+ // USB Interrupt Handler //--------------------------------------------------------------------+ -void USB0_IRQHandler(void) -{ +void USB0_IRQHandler(void) { #if PORT_SUPPORT_DEVICE(0) - tud_int_handler(0); + tud_int_handler(0); #endif #if PORT_SUPPORT_HOST(0) - tuh_int_handler(0); + tuh_int_handler(0, true); #endif } -void USB1_IRQHandler(void) -{ +void USB1_IRQHandler(void) { #if PORT_SUPPORT_DEVICE(1) - tud_int_handler(1); + tud_int_handler(1); #endif #if PORT_SUPPORT_HOST(1) - tuh_int_handler(1); + tuh_int_handler(1, true); #endif } @@ -74,28 +72,26 @@ const uint32_t OscRateIn = 12000000; const uint32_t ExtRateIn = 0; // Invoked by startup code -void SystemInit(void) -{ +void SystemInit(void) { #ifdef __USE_LPCOPEN - extern void (* const g_pfnVectors[])(void); + extern void (*const g_pfnVectors[])(void); unsigned int *pSCB_VTOR = (unsigned int *) 0xE000ED08; - *pSCB_VTOR = (unsigned int) g_pfnVectors; + *pSCB_VTOR = (unsigned int) g_pfnVectors; #endif board_lpc18_pinmux(); - #ifdef TRACE_ETM +#ifdef TRACE_ETM // Trace clock is limited to 60MHz, limit CPU clock to 120MHz Chip_SetupCoreClock(CLKIN_CRYSTAL, 120000000UL, true); - #else +#else // CPU clock max to 180 Mhz Chip_SetupCoreClock(CLKIN_CRYSTAL, MAX_CLOCK_FREQ, true); - #endif +#endif } -void board_init(void) -{ +void board_init(void) { SystemCoreClockUpdate(); #if CFG_TUSB_OS == OPT_OS_NONE @@ -135,27 +131,22 @@ void board_init(void) // Board porting API //--------------------------------------------------------------------+ -void board_led_write(bool state) -{ +void board_led_write(bool state) { Chip_GPIO_SetPinState(LPC_GPIO_PORT, LED_PORT, LED_PIN, state); } -uint32_t board_button_read(void) -{ +uint32_t board_button_read(void) { // active low return Chip_GPIO_GetPinState(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN) ? 0 : 1; } -int board_uart_read(uint8_t* buf, int len) -{ +int board_uart_read(uint8_t *buf, int len) { return Chip_UART_Read(UART_DEV, buf, len); } -int board_uart_write(void const * buf, int len) -{ - uint8_t const* buf8 = (uint8_t const*) buf; - for(int i=0; iINTFLAG.reg = EIC_INTFLAG_EXTINT(1 << MAX3421_INTR_EIC_ID); // Call the TinyUSB interrupt handler - tuh_int_handler(1); + tuh_int_handler(1, true); } void tuh_max3421_int_api(uint8_t rhport, bool enabled) { diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c index 2cf00c7af..268d60e48 100644 --- a/hw/bsp/samd51/family.c +++ b/hw/bsp/samd51/family.c @@ -296,7 +296,7 @@ void MAX3421_EIC_Handler(void) { EIC->INTFLAG.reg = EIC_INTFLAG_EXTINT(1 << MAX3421_INTR_EIC_ID); // Call the TinyUSB interrupt handler - tuh_int_handler(1); + tuh_int_handler(1, true); } void tuh_max3421_int_api(uint8_t rhport, bool enabled) { diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake index 675a96c74..f8cabcbe5 100644 --- a/hw/bsp/stm32g4/family.cmake +++ b/hw/bsp/stm32g4/family.cmake @@ -26,50 +26,47 @@ set(FAMILY_MCUS STM32G4 CACHE INTERNAL "") #------------------------------------ # only need to be built ONCE for all examples function(add_board_target BOARD_TARGET) - if (NOT TARGET ${BOARD_TARGET}) - # Startup & Linker script - set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) - set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) - set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) - - add_library(${BOARD_TARGET} STATIC - ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c - ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c - ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c - ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c - ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c - ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c - ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c - ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c - ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c - ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} - ) - target_include_directories(${BOARD_TARGET} PUBLIC - ${CMAKE_CURRENT_FUNCTION_LIST_DIR} - ${CMSIS_5}/CMSIS/Core/Include - ${ST_CMSIS}/Include - ${ST_HAL_DRIVER}/Inc - ) - target_compile_options(${BOARD_TARGET} PUBLIC + if (TARGET ${BOARD_TARGET}) + return() + endif () + + # Startup & Linker script + set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) + set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) + set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) + + add_library(${BOARD_TARGET} STATIC + ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c + ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} + ) + target_include_directories(${BOARD_TARGET} PUBLIC + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMSIS_5}/CMSIS/Core/Include + ${ST_CMSIS}/Include + ${ST_HAL_DRIVER}/Inc + ) + update_board(${BOARD_TARGET}) + + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--script=${LD_FILE_GNU}" + -nostartfiles + # nanolib + --specs=nosys.specs + --specs=nano.specs ) - target_compile_definitions(${BOARD_TARGET} PUBLIC + elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--config=${LD_FILE_IAR}" ) - - update_board(${BOARD_TARGET}) - - if (CMAKE_C_COMPILER_ID STREQUAL "GNU") - target_link_options(${BOARD_TARGET} PUBLIC - "LINKER:--script=${LD_FILE_GNU}" - -nostartfiles - # nanolib - --specs=nosys.specs - --specs=nano.specs - ) - elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") - target_link_options(${BOARD_TARGET} PUBLIC - "LINKER:--config=${LD_FILE_IAR}" - ) - endif () endif () endfunction() diff --git a/hw/bsp/tm4c123/family.c b/hw/bsp/tm4c123/family.c index ad5ae505f..738bc3fa0 100644 --- a/hw/bsp/tm4c123/family.c +++ b/hw/bsp/tm4c123/family.c @@ -8,7 +8,7 @@ void USB0_Handler(void) { #if CFG_TUH_ENABLED - tuh_int_handler(0); + tuh_int_handler(0, true); #endif #if CFG_TUD_ENABLED diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 6fffed11c..caeb5f2ef 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -75,8 +75,6 @@ #include "tusb_types.h" #include "tusb_debug.h" -#include "tusb_timeout.h" // TODO remove - //--------------------------------------------------------------------+ // Optional API implemented by application if needed // TODO move to a more ovious place/file diff --git a/src/common/tusb_timeout.h b/src/common/tusb_timeout.h deleted file mode 100644 index 533e67ab8..000000000 --- a/src/common/tusb_timeout.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -/** \ingroup Group_Common Common Files - * \defgroup Group_TimeoutTimer timeout timer - * @{ */ - -#ifndef _TUSB_TIMEOUT_H_ -#define _TUSB_TIMEOUT_H_ - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -typedef struct { - uint32_t start; - uint32_t interval; -}tu_timeout_t; - -#if 0 - -extern uint32_t tusb_hal_millis(void); - -static inline void tu_timeout_set(tu_timeout_t* tt, uint32_t msec) -{ - tt->interval = msec; - tt->start = tusb_hal_millis(); -} - -static inline bool tu_timeout_expired(tu_timeout_t* tt) -{ - return ( tusb_hal_millis() - tt->start ) >= tt->interval; -} - -// For used with periodic event to prevent drift -static inline void tu_timeout_reset(tu_timeout_t* tt) -{ - tt->start += tt->interval; -} - -static inline void tu_timeout_restart(tu_timeout_t* tt) -{ - tt->start = tusb_hal_millis(); -} - -#endif - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_TIMEOUT_H_ */ - -/** @} */ diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index 12355e8be..1b5f53dfc 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -56,12 +56,8 @@ * #define TU_VERIFY(cond) if(cond) return false; * #define TU_VERIFY(cond,ret) if(cond) return ret; * - * #define TU_VERIFY_HDLR(cond,handler) if(cond) {handler; return false;} - * #define TU_VERIFY_HDLR(cond,ret,handler) if(cond) {handler; return ret;} - * * #define TU_ASSERT(cond) if(cond) {_MESS_FAILED(); TU_BREAKPOINT(), return false;} * #define TU_ASSERT(cond,ret) if(cond) {_MESS_FAILED(); TU_BREAKPOINT(), return ret;} - * *------------------------------------------------------------------*/ #ifdef __cplusplus @@ -97,40 +93,23 @@ #define TU_BREAKPOINT() do {} while (0) #endif -/*------------------------------------------------------------------*/ -/* Macro Generator - *------------------------------------------------------------------*/ - // Helper to implement optional parameter for TU_VERIFY Macro family #define _GET_3RD_ARG(arg1, arg2, arg3, ...) arg3 -#define _GET_4TH_ARG(arg1, arg2, arg3, arg4, ...) arg4 - -/*------------- Generator for TU_VERIFY and TU_VERIFY_HDLR -------------*/ -#define TU_VERIFY_DEFINE(_cond, _handler, _ret) do \ -{ \ - if ( !(_cond) ) { _handler; return _ret; } \ -} while(0) /*------------------------------------------------------------------*/ /* TU_VERIFY * - TU_VERIFY_1ARGS : return false if failed * - TU_VERIFY_2ARGS : return provided value if failed *------------------------------------------------------------------*/ -#define TU_VERIFY_1ARGS(_cond) TU_VERIFY_DEFINE(_cond, , false) -#define TU_VERIFY_2ARGS(_cond, _ret) TU_VERIFY_DEFINE(_cond, , _ret) +#define TU_VERIFY_DEFINE(_cond, _ret) \ + do { \ + if ( !(_cond) ) { return _ret; } \ + } while(0) -#define TU_VERIFY(...) _GET_3RD_ARG(__VA_ARGS__, TU_VERIFY_2ARGS, TU_VERIFY_1ARGS, UNUSED)(__VA_ARGS__) +#define TU_VERIFY_1ARGS(_cond) TU_VERIFY_DEFINE(_cond, false) +#define TU_VERIFY_2ARGS(_cond, _ret) TU_VERIFY_DEFINE(_cond, _ret) - -/*------------------------------------------------------------------*/ -/* TU_VERIFY WITH HANDLER - * - TU_VERIFY_HDLR_2ARGS : execute handler, return false if failed - * - TU_VERIFY_HDLR_3ARGS : execute handler, return provided error if failed - *------------------------------------------------------------------*/ -#define TU_VERIFY_HDLR_2ARGS(_cond, _handler) TU_VERIFY_DEFINE(_cond, _handler, false) -#define TU_VERIFY_HDLR_3ARGS(_cond, _handler, _ret) TU_VERIFY_DEFINE(_cond, _handler, _ret) - -#define TU_VERIFY_HDLR(...) _GET_4TH_ARG(__VA_ARGS__, TU_VERIFY_HDLR_3ARGS, TU_VERIFY_HDLR_2ARGS,UNUSED)(__VA_ARGS__) +#define TU_VERIFY(...) _GET_3RD_ARG(__VA_ARGS__, TU_VERIFY_2ARGS, TU_VERIFY_1ARGS, _dummy)(__VA_ARGS__) /*------------------------------------------------------------------*/ /* ASSERT @@ -138,19 +117,20 @@ * - 1 arg : return false if failed * - 2 arg : return error if failed *------------------------------------------------------------------*/ -#define ASSERT_1ARGS(_cond) TU_VERIFY_DEFINE(_cond, _MESS_FAILED(); TU_BREAKPOINT(), false) -#define ASSERT_2ARGS(_cond, _ret) TU_VERIFY_DEFINE(_cond, _MESS_FAILED(); TU_BREAKPOINT(), _ret) +#define TU_ASSERT_DEFINE(_cond, _ret) \ + do { \ + if ( !(_cond) ) { _MESS_FAILED(); TU_BREAKPOINT(); return _ret; } \ + } while(0) + +#define TU_ASSERT_1ARGS(_cond) TU_ASSERT_DEFINE(_cond, false) +#define TU_ASSERT_2ARGS(_cond, _ret) TU_ASSERT_DEFINE(_cond, _ret) #ifndef TU_ASSERT -#define TU_ASSERT(...) _GET_3RD_ARG(__VA_ARGS__, ASSERT_2ARGS, ASSERT_1ARGS,UNUSED)(__VA_ARGS__) +#define TU_ASSERT(...) _GET_3RD_ARG(__VA_ARGS__, TU_ASSERT_2ARGS, TU_ASSERT_1ARGS, _dummy)(__VA_ARGS__) #endif -/*------------------------------------------------------------------*/ -/* ASSERT HDLR - *------------------------------------------------------------------*/ - #ifdef __cplusplus } #endif -#endif /* TUSB_VERIFY_H_ */ +#endif diff --git a/src/host/hcd.h b/src/host/hcd.h index e25b20ea3..2bde289df 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -131,7 +131,7 @@ bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) TU_AT bool hcd_init(uint8_t rhport); // Interrupt Handler -void hcd_int_handler(uint8_t rhport); +void hcd_int_handler(uint8_t rhport, bool in_isr); // Enable USB interrupt void hcd_int_enable (uint8_t rhport); diff --git a/src/host/usbh.h b/src/host/usbh.h index 684e8240e..770d70dfe 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -124,11 +124,16 @@ void tuh_task(void) { bool tuh_task_event_ready(void); #ifndef _TUSB_HCD_H_ -extern void hcd_int_handler(uint8_t rhport); +extern void hcd_int_handler(uint8_t rhport, bool in_isr); #endif -// Interrupt handler, name alias to HCD -#define tuh_int_handler hcd_int_handler +// Interrupt handler alias to HCD with in_isr as optional parameter +// - tuh_int_handler(rhport) --> hcd_int_handler(rhport, true) +// - tuh_int_handler(rhport, in_isr) --> hcd_int_handler(rhport, in_isr) +// Note: this is similar to TU_VERIFY(), _GET_3RD_ARG() is defined in tusb_verify.h +#define _tuh_int_handler_1arg(_rhport) hcd_int_handler(_rhport, true) +#define _tuh_int_hanlder_2arg(_rhport, _in_isr) hcd_int_handler(_rhport, _in_isr) +#define tuh_int_handler(...) _GET_3RD_ARG(__VA_ARGS__, _tuh_int_hanlder_2arg, _tuh_int_handler_1arg, _dummy)(__VA_ARGS__) // Check if roothub port is initialized and active as a host bool tuh_rhport_is_active(uint8_t rhport); diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c index 238b518a0..d013d6179 100644 --- a/src/portable/analog/max3421/hcd_max3421.c +++ b/src/portable/analog/max3421/hcd_max3421.c @@ -863,7 +863,8 @@ void print_hirq(uint8_t hirq) { #endif // Interrupt Handler -void hcd_int_handler(uint8_t rhport) { +void hcd_int_handler(uint8_t rhport, bool in_isr) { + (void) in_isr; uint8_t hirq = reg_read(rhport, HIRQ_ADDR, true) & _hcd_data.hien; if (!hirq) return; // print_hirq(hirq); diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index c93c33fc0..572b9826c 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -656,8 +656,8 @@ void process_period_xfer_isr(uint8_t rhport, uint32_t interval_ms) } //------------- Host Controller Driver's Interrupt Handler -------------// -void hcd_int_handler(uint8_t rhport) -{ +void hcd_int_handler(uint8_t rhport, bool in_isr) { + (void) in_isr; ehci_registers_t* regs = ehci_data.regs; uint32_t const int_status = regs->status; diff --git a/src/portable/mentor/musb/hcd_musb.c b/src/portable/mentor/musb/hcd_musb.c index 02090df85..5312c2812 100644 --- a/src/portable/mentor/musb/hcd_musb.c +++ b/src/portable/mentor/musb/hcd_musb.c @@ -847,8 +847,10 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) { /*------------------------------------------------------------------- * ISR *-------------------------------------------------------------------*/ -void hcd_int_handler(uint8_t rhport) +void hcd_int_handler(uint8_t rhport, bool in_isr) { + (void) in_isr; + uint_fast8_t is, txis, rxis; is = USB0->IS; /* read and clear interrupt status */ diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c index 55327e02d..57684b259 100644 --- a/src/portable/nxp/khci/hcd_khci.c +++ b/src/portable/nxp/khci/hcd_khci.c @@ -447,6 +447,10 @@ void hcd_port_reset(uint8_t rhport) _hcd.need_reset = false; } +void hcd_port_reset_end(uint8_t rhport) { + (void) rhport; +} + tusb_speed_t hcd_port_speed_get(uint8_t rhport) { (void)rhport; @@ -583,8 +587,9 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) { /*--------------------------------------------------------------------+ * ISR *--------------------------------------------------------------------+*/ -void hcd_int_handler(uint8_t rhport) +void hcd_int_handler(uint8_t rhport, bool in_isr) { + (void) in_isr; uint32_t is = KHCI->ISTAT; uint32_t msk = KHCI->INTEN; diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c index 413e72037..f978b0965 100644 --- a/src/portable/ohci/ohci.c +++ b/src/portable/ohci/ohci.c @@ -667,8 +667,9 @@ static void done_queue_isr(uint8_t hostid) } } -void hcd_int_handler(uint8_t hostid) -{ +void hcd_int_handler(uint8_t hostid, bool in_isr) { + (void) in_isr; + uint32_t const int_en = OHCI_REG->interrupt_enable; uint32_t const int_status = OHCI_REG->interrupt_status & int_en; diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index 21dc3f67d..4ed6d36bb 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -252,9 +252,9 @@ static void __tusb_irq_path_func(hcd_rp2040_irq)(void) } } -void __tusb_irq_path_func(hcd_int_handler)(uint8_t rhport) -{ +void __tusb_irq_path_func(hcd_int_handler)(uint8_t rhport, bool in_isr) { (void) rhport; + (void) in_isr; hcd_rp2040_irq(); } diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c index 790cd6b32..bf95be707 100644 --- a/src/portable/renesas/rusb2/hcd_rusb2.c +++ b/src/portable/renesas/rusb2/hcd_rusb2.c @@ -771,8 +771,9 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) { //--------------------------------------------------------------------+ // ISR //--------------------------------------------------------------------+ -void hcd_int_handler(uint8_t rhport) -{ +void hcd_int_handler(uint8_t rhport, bool in_isr) { + (void) in_isr; + rusb2_reg_t* rusb = RUSB2_REG(rhport); unsigned is0 = rusb->INTSTS0; unsigned is1 = rusb->INTSTS1; diff --git a/src/portable/template/hcd_template.c b/src/portable/template/hcd_template.c index 3e3b91558..b073d6057 100644 --- a/src/portable/template/hcd_template.c +++ b/src/portable/template/hcd_template.c @@ -51,8 +51,9 @@ bool hcd_init(uint8_t rhport) { } // Interrupt Handler -void hcd_int_handler(uint8_t rhport) { +void hcd_int_handler(uint8_t rhport, bool in_isr) { (void) rhport; + (void) in_isr; } // Enable USB interrupt diff --git a/src/tusb.h b/src/tusb.h index d6534ca28..c9d56d3c3 100644 --- a/src/tusb.h +++ b/src/tusb.h @@ -66,7 +66,7 @@ #endif #else #ifndef tuh_int_handler - #define tuh_int_handler(_x) + #define tuh_int_handler(...) #endif #endif @@ -123,7 +123,7 @@ #endif #else #ifndef tud_int_handler - #define tud_int_handler(_x) + #define tud_int_handler(...) #endif #endif -- cgit v1.3.1 From ce627f431831e1fbaa3bb7bad35a489b8006b749 Mon Sep 17 00:00:00 2001 From: "denis.krasutski" Date: Fri, 6 Oct 2023 13:04:54 +0300 Subject: feat(ch32f20x): add support of ch32f20x --- .gitignore | 1 + README.rst | 2 +- docs/reference/dependencies.rst | 1 + docs/reference/supported.rst | 5 +- hw/bsp/board_mcu.h | 3 + hw/bsp/ch32f20x/boards/ch32f205r-r0/board.h | 59 ++ hw/bsp/ch32f20x/boards/ch32f205r-r0/board.mk | 7 + hw/bsp/ch32f20x/ch32f205.ld | 111 +++ hw/bsp/ch32f20x/ch32f20x_conf.h | 40 + hw/bsp/ch32f20x/ch32f20x_it.c | 35 + hw/bsp/ch32f20x/ch32f20x_it.h | 25 + hw/bsp/ch32f20x/core_cm3.h | 11 + hw/bsp/ch32f20x/debug_uart.c | 105 +++ hw/bsp/ch32f20x/debug_uart.h | 31 + hw/bsp/ch32f20x/family.c | 141 ++++ hw/bsp/ch32f20x/family.mk | 30 + hw/bsp/ch32f20x/startup_gcc_ch32f20x_d8c.s | 493 +++++++++++ hw/bsp/ch32f20x/system_ch32f20x.c | 1122 ++++++++++++++++++++++++++ hw/bsp/ch32f20x/system_ch32f20x.h | 28 + hw/bsp/ch32v307/family.mk | 2 +- src/common/tusb_mcu.h | 4 + src/portable/wch/ch32_usbhs_reg.h | 349 ++++++++ src/portable/wch/ch32v307/ch32_usbhs_reg.h | 345 -------- src/portable/wch/ch32v307/dcd_usbhs.c | 391 --------- src/portable/wch/dcd_ch32_usbhs.c | 391 +++++++++ src/tusb_option.h | 1 + tools/get_deps.py | 3 + tools/iar_template.ipcf | 4 +- 28 files changed, 2999 insertions(+), 741 deletions(-) create mode 100644 hw/bsp/ch32f20x/boards/ch32f205r-r0/board.h create mode 100644 hw/bsp/ch32f20x/boards/ch32f205r-r0/board.mk create mode 100644 hw/bsp/ch32f20x/ch32f205.ld create mode 100644 hw/bsp/ch32f20x/ch32f20x_conf.h create mode 100644 hw/bsp/ch32f20x/ch32f20x_it.c create mode 100644 hw/bsp/ch32f20x/ch32f20x_it.h create mode 100644 hw/bsp/ch32f20x/core_cm3.h create mode 100644 hw/bsp/ch32f20x/debug_uart.c create mode 100644 hw/bsp/ch32f20x/debug_uart.h create mode 100644 hw/bsp/ch32f20x/family.c create mode 100644 hw/bsp/ch32f20x/family.mk create mode 100644 hw/bsp/ch32f20x/startup_gcc_ch32f20x_d8c.s create mode 100644 hw/bsp/ch32f20x/system_ch32f20x.c create mode 100644 hw/bsp/ch32f20x/system_ch32f20x.h create mode 100644 src/portable/wch/ch32_usbhs_reg.h delete mode 100644 src/portable/wch/ch32v307/ch32_usbhs_reg.h delete mode 100644 src/portable/wch/ch32v307/dcd_usbhs.c create mode 100644 src/portable/wch/dcd_ch32_usbhs.c (limited to 'src/common') diff --git a/.gitignore b/.gitignore index c665d6c73..e6ccec736 100644 --- a/.gitignore +++ b/.gitignore @@ -81,6 +81,7 @@ hw/mcu/st/stm32u5xx_hal_driver hw/mcu/st/stm32wbxx_hal_driver hw/mcu/ti hw/mcu/wch/ch32v307 +hw/mcu/wch/ch32f20x lib/CMSIS_5 lib/FreeRTOS-Kernel lib/lwip diff --git a/README.rst b/README.rst index aef310b98..919596e67 100644 --- a/README.rst +++ b/README.rst @@ -60,7 +60,7 @@ The stack supports the following MCUs: - **ST:** STM32 series: F0, F1, F2, F3, F4, F7, H7, G0, G4, L0, L1, L4, L4+, WB - **TI:** MSP430, MSP432E4, TM4C123 - **ValentyUSB:** eptri -- **WCH:** CH32V307 +- **WCH:** CH32V307, CH32F20x Here is the list of `Supported Devices`_ that can be used with provided examples. diff --git a/docs/reference/dependencies.rst b/docs/reference/dependencies.rst index 130527e2c..d532a3a1e 100644 --- a/docs/reference/dependencies.rst +++ b/docs/reference/dependencies.rst @@ -56,6 +56,7 @@ hw/mcu/st/stm32u5xx_hal_driver https://github.com/STMicroelectronics/ hw/mcu/st/stm32wbxx_hal_driver https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git 2c5f06638be516c1b772f768456ba637f077bac8 hw/mcu/ti https://github.com/hathach/ti_driver.git 143ed6cc20a7615d042b03b21e070197d473e6e5 hw/mcu/wch/ch32v307 https://github.com/openwch/ch32v307.git 17761f5cf9dbbf2dcf665b7c04934188add20082 +hw/mcu/wch/ch32f20x https://github.com/openwch/ch32f20x.git 77c4095087e5ed2c548ec9058e655d0b8757663b lib/CMSIS_5 https://github.com/ARM-software/CMSIS_5.git 20285262657d1b482d132d20d755c8c330d55c1f lib/FreeRTOS-Kernel https://github.com/FreeRTOS/FreeRTOS-Kernel.git def7d2df2b0506d3d249334974f51e427c17a41c lib/lwip https://github.com/lwip-tcpip/lwip.git 159e31b689577dbf69cf0683bbaffbd71fa5ee10 diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst index aed64782c..8843dd405 100644 --- a/docs/reference/supported.rst +++ b/docs/reference/supported.rst @@ -109,6 +109,8 @@ Supported MCUs | ValentyUSB | eptri | ✔ | ✖ | ✖ | eptri | | +--------------+-----------------------+--------+------+-----------+-------------------+--------------+ | WCH | CH32V307 | ✔ | | ✔ | ch32v307 | | +| +-----------------------+--------+------+-----------+-------------------+--------------+ +| | CH32F20x | ✔ | | ✔ | ch32f205 | | +--------------+-----------------------+--------+------+-----------+-------------------+--------------+ @@ -415,4 +417,5 @@ Tomu WCH --- -- `CH32V307V-R1-1v0 ` +- `CH32V307V-R1-1v0 `__ +- `CH32F205R-R0-1v0 `__ diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index e5d2bb608..4ce5c4139 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -161,6 +161,9 @@ #elif CFG_TUSB_MCU == OPT_MCU_TM4C123 #include "TM4C123.h" +#elif CFG_TUSB_MCU == OPT_MCU_CH32F20X + #include "ch32f20x.h" + #elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837) // no header needed diff --git a/hw/bsp/ch32f20x/boards/ch32f205r-r0/board.h b/hw/bsp/ch32f20x/boards/ch32f205r-r0/board.h new file mode 100644 index 000000000..d5849bddb --- /dev/null +++ b/hw/bsp/ch32f20x/boards/ch32f205r-r0/board.h @@ -0,0 +1,59 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023, Denis Krasutski + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +// LED: need to wire pin LED1 to PC0 in the P1 header +#define LED_PORT GPIOC +#define LED_PIN GPIO_Pin_1 +#define LED_STATE_ON 0 +#define LED_CLOCK_EN() RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE) + +// Button: need to wire pin KEY to PC1 in the P1 header +#define BUTTON_PORT GPIOC +#define BUTTON_PIN GPIO_Pin_0 +#define BUTTON_STATE_ACTIVE 0 +#define BUTTON_CLOCK_EN() RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE) + +// UART +#define UART_DEV USART2 +#define UART_DEV_IRQn USART2_IRQn +#define UART_DEV_IRQHandler USART2_IRQHandler +#define UART_DEV_GPIO_PORT GPIOA +#define UART_DEV_TX_PIN GPIO_Pin_2 +#define UART_DEV_CLK_EN() do { \ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); \ + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); \ + } while(0) + +#ifdef __cplusplus + } +#endif + +#endif diff --git a/hw/bsp/ch32f20x/boards/ch32f205r-r0/board.mk b/hw/bsp/ch32f20x/boards/ch32f205r-r0/board.mk new file mode 100644 index 000000000..f0e9bf30f --- /dev/null +++ b/hw/bsp/ch32f20x/boards/ch32f205r-r0/board.mk @@ -0,0 +1,7 @@ +LD_FILE = $(FAMILY_PATH)/ch32f205.ld + +SRC_S += \ + $(FAMILY_PATH)/startup_gcc_ch32f20x_d8c.s + +CFLAGS += \ + -DCH32F20x_D8C diff --git a/hw/bsp/ch32f20x/ch32f205.ld b/hw/bsp/ch32f20x/ch32f205.ld new file mode 100644 index 000000000..7c8d04cc5 --- /dev/null +++ b/hw/bsp/ch32f20x/ch32f205.ld @@ -0,0 +1,111 @@ +ENTRY(Reset_Handler) + +_Min_Heap_Size = 0x200; +_Min_Stack_Size = 0x400; + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K +} +SECTIONS +{ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) + . = ALIGN(4); + } >FLASH + + .text : + { + . = ALIGN(4); + _stext = .; + *(.text) + *(.text*) + *(.glue_7) + *(.glue_7t) + *(.eh_frame) + KEEP (*(.init)) + KEEP (*(.fini)) + . = ALIGN(4); + _etext = .; + } >FLASH + .rodata : + { + . = ALIGN(4); + *(.rodata) + *(.rodata*) + . = ALIGN(4); + } >FLASH + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + _sidata = LOADADDR(.data); + .data : + { + . = ALIGN(4); + _sdata = .; + *(.data) + *(.data*) + . = ALIGN(4); + _edata = .; + } >RAM AT> FLASH + . = ALIGN(4); + .bss : + { + _sbss = .; + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + . = ALIGN(4); + _ebss = .; + __bss_end__ = _ebss; + } >RAM + ._user_heap_stack : + { + . = ALIGN(4); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + __HeapStart = .; + . = . + _Min_Heap_Size; + __HeapEnd = .; + __StackLimit = .; + . = . + _Min_Stack_Size; + __StackTop = .; + . = ALIGN(4); + } >RAM +_estack = __StackTop; +_sstack = __StackLimit; + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/hw/bsp/ch32f20x/ch32f20x_conf.h b/hw/bsp/ch32f20x/ch32f20x_conf.h new file mode 100644 index 000000000..f94da5dec --- /dev/null +++ b/hw/bsp/ch32f20x/ch32f20x_conf.h @@ -0,0 +1,40 @@ +/********************************** (C) COPYRIGHT ******************************* + * File Name : ch32f20x_conf.h + * Author : WCH + * Version : V1.0.0 + * Date : 2021/08/08 + * Description : Library configuration file. + ********************************************************************************* + * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. + * Attention: This software (modified or not) and binary are used for + * microcontroller manufactured by Nanjing Qinheng Microelectronics. + *******************************************************************************/ +#ifndef __CH32F20x_CONF_H +#define __CH32F20x_CONF_H + +#include "ch32f20x_adc.h" +#include "ch32f20x_bkp.h" +#include "ch32f20x_can.h" +#include "ch32f20x_crc.h" +#include "ch32f20x_dac.h" +#include "ch32f20x_dbgmcu.h" +#include "ch32f20x_dma.h" +#include "ch32f20x_exti.h" +#include "ch32f20x_flash.h" +#include "ch32f20x_fsmc.h" +#include "ch32f20x_gpio.h" +#include "ch32f20x_i2c.h" +#include "ch32f20x_iwdg.h" +#include "ch32f20x_pwr.h" +#include "ch32f20x_rcc.h" +#include "ch32f20x_rtc.h" +#include "ch32f20x_sdio.h" +#include "ch32f20x_spi.h" +#include "ch32f20x_tim.h" +#include "ch32f20x_usart.h" +#include "ch32f20x_wwdg.h" +#include "ch32f20x_it.h" +#include "ch32f20x_misc.h" + +#endif /* __CH32F20x_CONF_H */ + diff --git a/hw/bsp/ch32f20x/ch32f20x_it.c b/hw/bsp/ch32f20x/ch32f20x_it.c new file mode 100644 index 000000000..94e28e380 --- /dev/null +++ b/hw/bsp/ch32f20x/ch32f20x_it.c @@ -0,0 +1,35 @@ +#include "ch32f20x_it.h" + +#include "ch32f20x.h" + +/* -------------------------------------------------------------------------- */ + +void NMI_Handler(void) { + +} + +/* -------------------------------------------------------------------------- */ + +void MemManage_Handler(void) { + +} + +/* -------------------------------------------------------------------------- */ + +void BusFault_Handler(void) { + +} + +/* -------------------------------------------------------------------------- */ + +void UsageFault_Handler(void) { + +} + +/* -------------------------------------------------------------------------- */ + +void DebugMon_Handler(void) { + +} + +/* -------------------------------------------------------------------------- */ diff --git a/hw/bsp/ch32f20x/ch32f20x_it.h b/hw/bsp/ch32f20x/ch32f20x_it.h new file mode 100644 index 000000000..34f3bbf96 --- /dev/null +++ b/hw/bsp/ch32f20x/ch32f20x_it.h @@ -0,0 +1,25 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32f20x_it.h +* Author : WCH +* Version : V1.0.0 +* Date : 2021/08/08 +* Description : This file contains the headers of the interrupt handlers. +********************************************************************************* +* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. +* Attention: This software (modified or not) and binary are used for +* microcontroller manufactured by Nanjing Qinheng Microelectronics. +*******************************************************************************/ +#ifndef __CH32F20xIT_H +#define __CH32F20xIT_H + +#include "ch32f20x.h" + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void DebugMon_Handler(void); + + +#endif /* __CH32F20xIT_H */ diff --git a/hw/bsp/ch32f20x/core_cm3.h b/hw/bsp/ch32f20x/core_cm3.h new file mode 100644 index 000000000..c35a4eec3 --- /dev/null +++ b/hw/bsp/ch32f20x/core_cm3.h @@ -0,0 +1,11 @@ +/* There is core_cm3.h wrapper just to avoid warnings from CMSIS headers */ +/* if you want use original file add to make file: + INC += \ + $(TOP)/$(CH32F20X_SDK_SRC)/CMSIS +*/ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wstrict-prototypes" + +#include <../../CMSIS/core_cm3.h> + +#pragma GCC diagnostic pop diff --git a/hw/bsp/ch32f20x/debug_uart.c b/hw/bsp/ch32f20x/debug_uart.c new file mode 100644 index 000000000..a595eb6f7 --- /dev/null +++ b/hw/bsp/ch32f20x/debug_uart.c @@ -0,0 +1,105 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Denis Krasutski + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ +#include + +#include "board.h" +#include "debug_uart.h" + +#define UART_RINGBUFFER_SIZE_TX 64 +#define UART_RINGBUFFER_MASK_TX (UART_RINGBUFFER_SIZE_TX-1) + +static char tx_buf[UART_RINGBUFFER_SIZE_TX]; +static unsigned int tx_produce = 0; +static volatile unsigned int tx_consume = 0; + +void UART_DEV_IRQHandler(void) +{ + if(USART_GetITStatus(UART_DEV, USART_IT_TC) != RESET) { + USART_ClearITPendingBit(UART_DEV, USART_IT_TC); + + if(tx_consume != tx_produce) { + USART_SendData(UART_DEV, tx_buf[tx_consume]); + tx_consume = (tx_consume + 1) & UART_RINGBUFFER_MASK_TX; + } + } +} + +void uart_write(char c) +{ + unsigned int tx_produce_next = (tx_produce + 1) & UART_RINGBUFFER_MASK_TX; + + NVIC_DisableIRQ(UART_DEV_IRQn); + if((tx_consume != tx_produce) || (USART_GetFlagStatus(UART_DEV, USART_FLAG_TXE) == RESET)) { + tx_buf[tx_produce] = c; + tx_produce = tx_produce_next; + } else { + USART_SendData(UART_DEV, c); + } + NVIC_EnableIRQ(UART_DEV_IRQn); +} + +void uart_sync(void) +{ + while(tx_consume != tx_produce) { + //Waiting for transfer complete + } +} + +void usart_printf_init(uint32_t baudrate) +{ + tx_produce = 0; + tx_consume = 0; + + UART_DEV_CLK_EN(); + + GPIO_InitTypeDef gpio_config = { + .GPIO_Pin = UART_DEV_TX_PIN, + .GPIO_Speed = GPIO_Speed_50MHz, + .GPIO_Mode = GPIO_Mode_AF_PP, + }; + GPIO_Init(UART_DEV_GPIO_PORT, &gpio_config); + + USART_InitTypeDef uart_config = { + .USART_BaudRate = baudrate, + .USART_WordLength = USART_WordLength_8b, + .USART_StopBits = USART_StopBits_1, + .USART_Parity = USART_Parity_No, + .USART_HardwareFlowControl = USART_HardwareFlowControl_None, + .USART_Mode = USART_Mode_Tx, + }; + + USART_Init(UART_DEV, &uart_config); + USART_ITConfig(UART_DEV, USART_IT_TC, ENABLE); + USART_Cmd(UART_DEV, ENABLE); + + NVIC_InitTypeDef nvic_config = { + .NVIC_IRQChannel = UART_DEV_IRQn, + .NVIC_IRQChannelPreemptionPriority = 1, + .NVIC_IRQChannelSubPriority = 3, + .NVIC_IRQChannelCmd = ENABLE, + }; + NVIC_Init(&nvic_config); +} diff --git a/hw/bsp/ch32f20x/debug_uart.h b/hw/bsp/ch32f20x/debug_uart.h new file mode 100644 index 000000000..10284cf6f --- /dev/null +++ b/hw/bsp/ch32f20x/debug_uart.h @@ -0,0 +1,31 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Denis Krasutski + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include + +void uart_write(char c); +void uart_sync(void); +void usart_printf_init(uint32_t baudrate); diff --git a/hw/bsp/ch32f20x/family.c b/hw/bsp/ch32f20x/family.c new file mode 100644 index 000000000..9717832d6 --- /dev/null +++ b/hw/bsp/ch32f20x/family.c @@ -0,0 +1,141 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Denis Krasutski + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "stdio.h" +#include "debug_uart.h" + +#include "ch32f20x.h" + +#include "bsp/board_api.h" +#include "board.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ + +void USBHS_IRQHandler(void) +{ + tud_int_handler(0); +} + +void board_init(void) { + + /* Disable interrupts during init */ + __disable_irq(); + +#if CFG_TUSB_OS == OPT_OS_NONE + SysTick_Config(SystemCoreClock / 1000); +#endif + +#if CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USBHS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); +#endif + + usart_printf_init(115200); + + // USB HS Clock config + RCC_USBCLK48MConfig(RCC_USBCLK48MCLKSource_USBPHY); + RCC_USBHSPLLCLKConfig(RCC_HSBHSPLLCLKSource_HSE); + RCC_USBHSConfig(RCC_USBPLL_Div2); + RCC_USBHSPLLCKREFCLKConfig(RCC_USBHSPLLCKREFCLK_4M); + RCC_USBHSPHYPLLALIVEcmd(ENABLE); + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_USBHS, ENABLE); + + // LED + LED_CLOCK_EN(); + GPIO_InitTypeDef led_pin_config = { + .GPIO_Pin = LED_PIN, + .GPIO_Mode = GPIO_Mode_Out_OD, + .GPIO_Speed = GPIO_Speed_50MHz, + }; + GPIO_Init(LED_PORT, &led_pin_config); + + // Button + BUTTON_CLOCK_EN(); + GPIO_InitTypeDef button_pin_config = { + .GPIO_Pin = BUTTON_PIN, + .GPIO_Mode = GPIO_Mode_IPU, + .GPIO_Speed = GPIO_Speed_50MHz, + }; + GPIO_Init(BUTTON_PORT, &button_pin_config); + + /* Enable interrupts globally */ + __enable_irq(); +} + +#if CFG_TUSB_OS == OPT_OS_NONE + +volatile uint32_t system_ticks = 0; + +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} + +#endif + +void HardFault_Handler(void) +{ + __asm("BKPT #0\n"); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_WriteBit(LED_PORT, LED_PIN, state); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == GPIO_ReadInputDataBit(BUTTON_PORT, BUTTON_PIN); +} + +int board_uart_read(uint8_t *buf, int len) +{ + (void) buf; + (void) len; + return 0; +} + +int board_uart_write(void const *buf, int len) +{ + int txsize = len; + while ( txsize-- ) + { + uart_write(*(uint8_t const*) buf); + buf++; + } + return len; +} diff --git a/hw/bsp/ch32f20x/family.mk b/hw/bsp/ch32f20x/family.mk new file mode 100644 index 000000000..c08451b9c --- /dev/null +++ b/hw/bsp/ch32f20x/family.mk @@ -0,0 +1,30 @@ +# Submodules +CH32F20X_SDK = hw/mcu/wch/ch32f20x +DEPS_SUBMODULES += $(CH32F20X_SDK) + +# WCH-SDK paths +CH32F20X_SDK_SRC = $(CH32F20X_SDK)/EVT/EXAM/SRC + +include $(TOP)/$(BOARD_PATH)/board.mk + +CPU_CORE ?= cortex-m3 + +CFLAGS += \ + -DCFG_TUSB_MCU=OPT_MCU_CH32F20X \ + -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED + +SRC_C += \ + src/portable/wch/dcd_ch32_usbhs.c \ + $(CH32F20X_SDK_SRC)/StdPeriphDriver/src/ch32f20x_gpio.c \ + $(CH32F20X_SDK_SRC)/StdPeriphDriver/src/ch32f20x_misc.c \ + $(CH32F20X_SDK_SRC)/StdPeriphDriver/src/ch32f20x_rcc.c \ + $(CH32F20X_SDK_SRC)/StdPeriphDriver/src/ch32f20x_usart.c + +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/$(CH32F20X_SDK_SRC)/StdPeriphDriver/inc + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 + +flash: flash-stlink diff --git a/hw/bsp/ch32f20x/startup_gcc_ch32f20x_d8c.s b/hw/bsp/ch32f20x/startup_gcc_ch32f20x_d8c.s new file mode 100644 index 000000000..2ecac2ac1 --- /dev/null +++ b/hw/bsp/ch32f20x/startup_gcc_ch32f20x_d8c.s @@ -0,0 +1,493 @@ +/** + ****************************************************************************** + * @file startup_gcc_ch32f20x_d8c.s + * @author Denis Krasutski + * @brief CH32F205 Devices vector table + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M3 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + */ + +.syntax unified +.cpu cortex-m3 +.thumb +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.section .text.Reset_Handler +.weak Reset_Handler +.type Reset_Handler, %function +Reset_Handler: + /* set stack pointer */ + ldr sp, =_estack + /* Call the clock system initialization function.*/ + bl SystemInit + /* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + ldr r1, =_edata + ldr r2, =_sidata + movs r3, #0 + b LoopCopyDataInit +CopyDataInit: + ldr r4, [r2, r3] + str r4, [r0, r3] + adds r3, r3, #4 +LoopCopyDataInit: + adds r4, r0, r3 + cmp r4, r1 + bcc CopyDataInit + + /* Zero fill the bss segment. */ + ldr r2, =_sbss + ldr r4, =_ebss + movs r3, #0 + b LoopFillZerobss +FillZerobss: + str r3, [r2] + adds r2, r2, #4 +LoopFillZerobss: + cmp r2, r4 + bcc FillZerobss + /* Call static constructors */ + bl __libc_init_array + /* Call the application's entry point.*/ + bl main + bx lr + .size Reset_Handler, .-Reset_Handler + +.section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler + +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + +/******************************************************************************* + External Interrupts +*******************************************************************************/ +.word WWDG_IRQHandler +.word PVD_IRQHandler +.word TAMPER_IRQHandler +.word RTC_IRQHandler +.word FLASH_IRQHandler +.word RCC_IRQHandler +.word EXTI0_IRQHandler +.word EXTI1_IRQHandler +.word EXTI2_IRQHandler +.word EXTI3_IRQHandler +.word EXTI4_IRQHandler +.word DMA1_Channel1_IRQHandler +.word DMA1_Channel2_IRQHandler +.word DMA1_Channel3_IRQHandler +.word DMA1_Channel4_IRQHandler +.word DMA1_Channel5_IRQHandler +.word DMA1_Channel6_IRQHandler +.word DMA1_Channel7_IRQHandler +.word ADC1_2_IRQHandler +.word USB_HP_CAN1_TX_IRQHandler +.word USB_LP_CAN1_RX0_IRQHandler +.word CAN1_RX1_IRQHandler +.word CAN1_SCE_IRQHandler +.word EXTI9_5_IRQHandler +.word TIM1_BRK_IRQHandler +.word TIM1_UP_IRQHandler +.word TIM1_TRG_COM_IRQHandler +.word TIM1_CC_IRQHandler +.word TIM2_IRQHandler +.word TIM3_IRQHandler +.word TIM4_IRQHandler +.word I2C1_EV_IRQHandler +.word I2C1_ER_IRQHandler +.word I2C2_EV_IRQHandler +.word I2C2_ER_IRQHandler +.word SPI1_IRQHandler +.word SPI2_IRQHandler +.word USART1_IRQHandler +.word USART2_IRQHandler +.word USART3_IRQHandler +.word EXTI15_10_IRQHandler +.word RTCAlarm_IRQHandler +.word 0 +.word TIM8_BRK_IRQHandler +.word TIM8_UP_IRQHandler +.word TIM8_TRG_COM_IRQHandler +.word TIM8_CC_IRQHandler +.word RNG_IRQHandler +.word FSMC_IRQHandler +.word SDIO_IRQHandler +.word TIM5_IRQHandler +.word SPI3_IRQHandler +.word UART4_IRQHandler +.word UART5_IRQHandler +.word TIM6_IRQHandler +.word TIM7_IRQHandler +.word DMA2_Channel1_IRQHandler +.word DMA2_Channel2_IRQHandler +.word DMA2_Channel3_IRQHandler +.word DMA2_Channel4_IRQHandler +.word DMA2_Channel5_IRQHandler +.word ETH_IRQHandler +.word ETH_WKUP_IRQHandler +.word CAN2_TX_IRQHandler +.word CAN2_RX0_IRQHandler +.word CAN2_RX1_IRQHandler +.word CAN2_SCE_IRQHandler +.word OTG_FS_IRQHandler +.word USBHSWakeup_IRQHandler +.word USBHS_IRQHandler +.word DVP_IRQHandler +.word UART6_IRQHandler +.word UART7_IRQHandler +.word UART8_IRQHandler +.word TIM9_BRK_IRQHandler +.word TIM9_UP_IRQHandler +.word TIM9_TRG_COM_IRQHandler +.word TIM9_CC_IRQHandler +.word TIM10_BRK_IRQHandler +.word TIM10_UP_IRQHandler +.word TIM10_TRG_COM_IRQHandler +.word TIM10_CC_IRQHandler +.word DMA2_Channel6_IRQHandler +.word DMA2_Channel7_IRQHandler +.word DMA2_Channel8_IRQHandler +.word DMA2_Channel9_IRQHandler +.word DMA2_Channel10_IRQHandler +.word DMA2_Channel11_IRQHandler + +/******************************************************************************* +* +* Provide weak aliases +* +*******************************************************************************/ +.weak NMI_Handler +.thumb_set NMI_Handler,Default_Handler + +.weak HardFault_Handler +.thumb_set HardFault_Handler,Default_Handler + +.weak MemManage_Handler +.thumb_set MemManage_Handler,Default_Handler + +.weak BusFault_Handler +.thumb_set BusFault_Handler,Default_Handler + +.weak UsageFault_Handler +.thumb_set UsageFault_Handler,Default_Handler + +.weak SVC_Handler +.thumb_set SVC_Handler,Default_Handler + +.weak DebugMon_Handler +.thumb_set DebugMon_Handler,Default_Handler + +.weak PendSV_Handler +.thumb_set PendSV_Handler,Default_Handler + +.weak SysTick_Handler +.thumb_set SysTick_Handler,Default_Handler + +.weak WWDG_IRQHandler +.thumb_set WWDG_IRQHandler,Default_Handler + +.weak PVD_IRQHandler +.thumb_set PVD_IRQHandler,Default_Handler + +.weak TAMPER_IRQHandler +.thumb_set TAMPER_IRQHandler,Default_Handler + +.weak RTC_IRQHandler +.thumb_set RTC_IRQHandler,Default_Handler + +.weak FLASH_IRQHandler +.thumb_set FLASH_IRQHandler,Default_Handler + +.weak RCC_IRQHandler +.thumb_set RCC_IRQHandler,Default_Handler + +.weak EXTI0_IRQHandler +.thumb_set EXTI0_IRQHandler,Default_Handler + +.weak EXTI1_IRQHandler +.thumb_set EXTI1_IRQHandler,Default_Handler + +.weak EXTI2_IRQHandler +.thumb_set EXTI2_IRQHandler,Default_Handler + +.weak EXTI3_IRQHandler +.thumb_set EXTI3_IRQHandler,Default_Handler + +.weak EXTI4_IRQHandler +.thumb_set EXTI4_IRQHandler,Default_Handler + +.weak DMA1_Channel1_IRQHandler +.thumb_set DMA1_Channel1_IRQHandler,Default_Handler + +.weak DMA1_Channel2_IRQHandler +.thumb_set DMA1_Channel2_IRQHandler,Default_Handler + +.weak DMA1_Channel3_IRQHandler +.thumb_set DMA1_Channel3_IRQHandler,Default_Handler + +.weak DMA1_Channel4_IRQHandler +.thumb_set DMA1_Channel4_IRQHandler,Default_Handler + +.weak DMA1_Channel5_IRQHandler +.thumb_set DMA1_Channel5_IRQHandler,Default_Handler + +.weak DMA1_Channel6_IRQHandler +.thumb_set DMA1_Channel6_IRQHandler,Default_Handler + +.weak DMA1_Channel7_IRQHandler +.thumb_set DMA1_Channel7_IRQHandler,Default_Handler + +.weak ADC1_2_IRQHandler +.thumb_set ADC1_2_IRQHandler,Default_Handler + +.weak USB_HP_CAN1_TX_IRQHandler +.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler + +.weak USB_LP_CAN1_RX0_IRQHandler +.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler + +.weak CAN1_RX1_IRQHandler +.thumb_set CAN1_RX1_IRQHandler,Default_Handler + +.weak CAN1_SCE_IRQHandler +.thumb_set CAN1_SCE_IRQHandler,Default_Handler + +.weak EXTI9_5_IRQHandler +.thumb_set EXTI9_5_IRQHandler,Default_Handler + +.weak TIM1_BRK_IRQHandler +.thumb_set TIM1_BRK_IRQHandler,Default_Handler + +.weak TIM1_UP_IRQHandler +.thumb_set TIM1_UP_IRQHandler,Default_Handler + +.weak TIM1_TRG_COM_IRQHandler +.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler + +.weak TIM1_CC_IRQHandler +.thumb_set TIM1_CC_IRQHandler,Default_Handler + +.weak TIM2_IRQHandler +.thumb_set TIM2_IRQHandler,Default_Handler + +.weak TIM3_IRQHandler +.thumb_set TIM3_IRQHandler,Default_Handler + +.weak TIM4_IRQHandler +.thumb_set TIM4_IRQHandler,Default_Handler + +.weak I2C1_EV_IRQHandler +.thumb_set I2C1_EV_IRQHandler,Default_Handler + +.weak I2C1_ER_IRQHandler +.thumb_set I2C1_ER_IRQHandler,Default_Handler + +.weak I2C2_EV_IRQHandler +.thumb_set I2C2_EV_IRQHandler,Default_Handler + +.weak I2C2_ER_IRQHandler +.thumb_set I2C2_ER_IRQHandler,Default_Handler + +.weak SPI1_IRQHandler +.thumb_set SPI1_IRQHandler,Default_Handler + +.weak SPI2_IRQHandler +.thumb_set SPI2_IRQHandler,Default_Handler + +.weak USART1_IRQHandler +.thumb_set USART1_IRQHandler,Default_Handler + +.weak USART2_IRQHandler +.thumb_set USART2_IRQHandler,Default_Handler + +.weak USART3_IRQHandler +.thumb_set USART3_IRQHandler,Default_Handler + +.weak EXTI15_10_IRQHandler +.thumb_set EXTI15_10_IRQHandler,Default_Handler + +.weak RTCAlarm_IRQHandler +.thumb_set RTCAlarm_IRQHandler,Default_Handler + +.weak TIM8_BRK_IRQHandler +.thumb_set TIM8_BRK_IRQHandler,Default_Handler + +.weak TIM8_UP_IRQHandler +.thumb_set TIM8_UP_IRQHandler,Default_Handler + +.weak TIM8_TRG_COM_IRQHandler +.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler + +.weak TIM8_CC_IRQHandler +.thumb_set TIM8_CC_IRQHandler,Default_Handler + +.weak RNG_IRQHandler +.thumb_set RNG_IRQHandler,Default_Handler + +.weak FSMC_IRQHandler +.thumb_set FSMC_IRQHandler,Default_Handler + +.weak SDIO_IRQHandler +.thumb_set SDIO_IRQHandler,Default_Handler + +.weak TIM5_IRQHandler +.thumb_set TIM5_IRQHandler,Default_Handler + +.weak SPI3_IRQHandler +.thumb_set SPI3_IRQHandler,Default_Handler + +.weak UART4_IRQHandler +.thumb_set UART4_IRQHandler,Default_Handler + +.weak UART5_IRQHandler +.thumb_set UART5_IRQHandler,Default_Handler + +.weak TIM6_IRQHandler +.thumb_set TIM6_IRQHandler,Default_Handler + +.weak TIM7_IRQHandler +.thumb_set TIM7_IRQHandler,Default_Handler + +.weak DMA2_Channel1_IRQHandler +.thumb_set DMA2_Channel1_IRQHandler,Default_Handler + +.weak DMA2_Channel2_IRQHandler +.thumb_set DMA2_Channel2_IRQHandler,Default_Handler + +.weak DMA2_Channel3_IRQHandler +.thumb_set DMA2_Channel3_IRQHandler,Default_Handler + +.weak DMA2_Channel4_IRQHandler +.thumb_set DMA2_Channel4_IRQHandler,Default_Handler + +.weak DMA2_Channel5_IRQHandler +.thumb_set DMA2_Channel5_IRQHandler,Default_Handler + +.weak ETH_IRQHandler +.thumb_set ETH_IRQHandler,Default_Handler + +.weak ETH_WKUP_IRQHandler +.thumb_set ETH_WKUP_IRQHandler,Default_Handler + +.weak CAN2_TX_IRQHandler +.thumb_set CAN2_TX_IRQHandler,Default_Handler + +.weak CAN2_RX0_IRQHandler +.thumb_set CAN2_RX0_IRQHandler,Default_Handler + +.weak CAN2_RX1_IRQHandler +.thumb_set CAN2_RX1_IRQHandler,Default_Handler + +.weak CAN2_SCE_IRQHandler +.thumb_set CAN2_SCE_IRQHandler,Default_Handler + +.weak OTG_FS_IRQHandler +.thumb_set OTG_FS_IRQHandler,Default_Handler + +.weak USBHSWakeup_IRQHandler +.thumb_set USBHSWakeup_IRQHandler,Default_Handler + +.weak USBHS_IRQHandler +.thumb_set USBHS_IRQHandler,Default_Handler + +.weak DVP_IRQHandler +.thumb_set DVP_IRQHandler,Default_Handler + +.weak UART6_IRQHandler +.thumb_set UART6_IRQHandler,Default_Handler + +.weak UART7_IRQHandler +.thumb_set UART7_IRQHandler,Default_Handler + +.weak UART8_IRQHandler +.thumb_set UART8_IRQHandler,Default_Handler + +.weak TIM9_BRK_IRQHandler +.thumb_set TIM9_BRK_IRQHandler,Default_Handler + +.weak TIM9_UP_IRQHandler +.thumb_set TIM9_UP_IRQHandler,Default_Handler + +.weak TIM9_TRG_COM_IRQHandler +.thumb_set TIM9_TRG_COM_IRQHandler,Default_Handler + +.weak TIM9_CC_IRQHandler +.thumb_set TIM9_CC_IRQHandler,Default_Handler + +.weak TIM10_BRK_IRQHandler +.thumb_set TIM10_BRK_IRQHandler,Default_Handler + +.weak TIM10_UP_IRQHandler +.thumb_set TIM10_UP_IRQHandler,Default_Handler + +.weak TIM10_TRG_COM_IRQHandler +.thumb_set TIM10_TRG_COM_IRQHandler,Default_Handler + +.weak TIM10_CC_IRQHandler +.thumb_set TIM10_CC_IRQHandler,Default_Handler + +.weak DMA2_Channel6_IRQHandler +.thumb_set DMA2_Channel6_IRQHandler,Default_Handler + +.weak DMA2_Channel7_IRQHandler +.thumb_set DMA2_Channel7_IRQHandler,Default_Handler + +.weak DMA2_Channel8_IRQHandler +.thumb_set DMA2_Channel8_IRQHandler,Default_Handler + +.weak DMA2_Channel9_IRQHandler +.thumb_set DMA2_Channel9_IRQHandler,Default_Handler + +.weak DMA2_Channel10_IRQHandler +.thumb_set DMA2_Channel10_IRQHandler,Default_Handler + +.weak DMA2_Channel11_IRQHandler +.thumb_set DMA2_Channel11_IRQHandler,Default_Handler diff --git a/hw/bsp/ch32f20x/system_ch32f20x.c b/hw/bsp/ch32f20x/system_ch32f20x.c new file mode 100644 index 000000000..0a59b9287 --- /dev/null +++ b/hw/bsp/ch32f20x/system_ch32f20x.c @@ -0,0 +1,1122 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : system_ch32f20x.c +* Author : WCH +* Version : V1.0.0 +* Date : 2021/08/08 +* Description : CH32F20x Device Peripheral Access Layer System Source File. +* For CH32F208 HSE = 32Mhz +* For others HSE = 8Mhz +********************************************************************************* +* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. +* Attention: This software (modified or not) and binary are used for +* microcontroller manufactured by Nanjing Qinheng Microelectronics. +*******************************************************************************/ +#include "ch32f20x.h" + +/* +* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after +* reset the HSI is used as SYSCLK source). +* If none of the define below is enabled, the HSI is used as System clock source. +*/ + +//#define SYSCLK_FREQ_HSE HSE_VALUE +//#define SYSCLK_FREQ_48MHz_HSE 48000000 +//#define SYSCLK_FREQ_56MHz_HSE 56000000 +//#define SYSCLK_FREQ_72MHz_HSE 72000000 +#define SYSCLK_FREQ_96MHz_HSE 96000000 +//#define SYSCLK_FREQ_120MHz_HSE 120000000 +//#define SYSCLK_FREQ_144MHz_HSE 144000000 +//#define SYSCLK_FREQ_HSI HSI_VALUE +//#define SYSCLK_FREQ_48MHz_HSI 48000000 +//#define SYSCLK_FREQ_56MHz_HSI 56000000 +//#define SYSCLK_FREQ_72MHz_HSI 72000000 +//#define SYSCLK_FREQ_96MHz_HSI 96000000 +//#define SYSCLK_FREQ_120MHz_HSI 120000000 +//#define SYSCLK_FREQ_144MHz_HSI 144000000 + + +/* Uncomment the following line if you need to relocate your vector Table in Internal SRAM */ +/* #define VECT_TAB_SRAM */ + +/* Vector Table base offset field This value must be a multiple of 0x200 */ +#define VECT_TAB_OFFSET 0x0 + +/* Clock Definitions */ +#ifdef SYSCLK_FREQ_HSE +uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_48MHz_HSE +uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz_HSE; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_56MHz_HSE +uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz_HSE; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_72MHz_HSE +uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz_HSE; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_96MHz_HSE +uint32_t SystemCoreClock = SYSCLK_FREQ_96MHz_HSE; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_120MHz_HSE +uint32_t SystemCoreClock = SYSCLK_FREQ_120MHz_HSE; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_144MHz_HSE +uint32_t SystemCoreClock = SYSCLK_FREQ_144MHz_HSE; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_48MHz_HSI +uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz_HSI; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_56MHz_HSI +uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz_HSI; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_72MHz_HSI +uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz_HSI; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_96MHz_HSI +uint32_t SystemCoreClock = SYSCLK_FREQ_96MHz_HSI; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_120MHz_HSI +uint32_t SystemCoreClock = SYSCLK_FREQ_120MHz_HSI; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_144MHz_HSI +uint32_t SystemCoreClock = SYSCLK_FREQ_144MHz_HSI; /* System Clock Frequency (Core Clock) */ +#else +uint32_t SystemCoreClock = HSI_VALUE; /* System Clock Frequency (Core Clock) */ + +#endif + +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + +/* system_private_function_proto_types */ +static void SetSysClock( void ); + +#ifdef SYSCLK_FREQ_HSE +static void SetSysClockToHSE( void ); +#elif defined SYSCLK_FREQ_48MHz_HSE +static void SetSysClockTo48_HSE( void ); +#elif defined SYSCLK_FREQ_56MHz_HSE +static void SetSysClockTo56_HSE( void ); +#elif defined SYSCLK_FREQ_72MHz_HSE +static void SetSysClockTo72_HSE( void ); +#elif defined SYSCLK_FREQ_96MHz_HSE +static void SetSysClockTo96_HSE( void ); +#elif defined SYSCLK_FREQ_120MHz_HSE +static void SetSysClockTo120_HSE( void ); +#elif defined SYSCLK_FREQ_144MHz_HSE +static void SetSysClockTo144_HSE( void ); +#elif defined SYSCLK_FREQ_48MHz_HSI +static void SetSysClockTo48_HSI( void ); +#elif defined SYSCLK_FREQ_56MHz_HSI +static void SetSysClockTo56_HSI( void ); +#elif defined SYSCLK_FREQ_72MHz_HSI +static void SetSysClockTo72_HSI( void ); +#elif defined SYSCLK_FREQ_96MHz_HSI +static void SetSysClockTo96_HSI( void ); +#elif defined SYSCLK_FREQ_120MHz_HSI +static void SetSysClockTo120_HSI( void ); +#elif defined SYSCLK_FREQ_144MHz_HSI +static void SetSysClockTo144_HSI( void ); + +#endif + + +/********************************************************************* + * @fn SystemInit + * + * @brief Setup the microcontroller system Initialize the Embedded Flash Interface, + * the PLL and update the SystemCoreClock variable. + * + * @return none + */ +void SystemInit( void ) +{ + RCC->CTLR |= ( uint32_t )0x00000001; + +#ifdef CH32F20x_D8C + RCC->CFGR0 &= ( uint32_t )0xF8FF0000; +#else + RCC->CFGR0 &= ( uint32_t )0xF0FF0000; +#endif + + RCC->CTLR &= ( uint32_t )0xFEF6FFFF; + RCC->CTLR &= ( uint32_t )0xFFFBFFFF; + RCC->CFGR0 &= ( uint32_t )0xFF80FFFF; +#ifdef CH32F20x_D8C + RCC->CTLR &= ( uint32_t )0xEBFFFFFF; + RCC->INTR = 0x00FF0000; + RCC->CFGR2 = 0x00000000; +#else + RCC->INTR = 0x009F0000; +#endif + + SetSysClock(); + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/********************************************************************* + * @fn SystemCoreClockUpdate + * + * @brief Update SystemCoreClock variable according to Clock Register Values. + * + * @return none + */ +void SystemCoreClockUpdate( void ) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0; + uint8_t Pll_6_5 = 0; + +#if defined (CH32F20x_D8C) + uint8_t Pll2mull = 0; + +#endif + + tmp = RCC->CFGR0 & RCC_SWS; + + switch( tmp ) + { + case 0x00: + SystemCoreClock = HSI_VALUE; + break; + case 0x04: + SystemCoreClock = HSE_VALUE; + break; + case 0x08: + pllmull = RCC->CFGR0 & RCC_PLLMULL; + pllsource = RCC->CFGR0 & RCC_PLLSRC; + pllmull = ( pllmull >> 18 ) + 2; + +#if defined (CH32F20x_D6) || defined (CH32F20x_D8) || defined (CH32F20x_D8W) + if( pllmull == 17 ) + { + pllmull = 18; + } +#else + if( pllmull == 2 ) + { + pllmull = 18; + } + if( pllmull == 15 ) + { + pllmull = 13; /* *6.5 */ + Pll_6_5 = 1; + } + if( pllmull == 16 ) + { + pllmull = 15; + } + if( pllmull == 17 ) + { + pllmull = 16; + } +#endif + + if( pllsource == 0x00 ) + { + if(EXTEN->EXTEN_CTR & EXTEN_PLL_HSI_PRE) SystemCoreClock = HSI_VALUE * pllmull; + else SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { +#if defined (CH32F20x_D8C) + if(RCC->CFGR2 & (1<<16)){ /* PLL2 */ + SystemCoreClock = HSE_VALUE/(((RCC->CFGR2 & 0xF0)>>4) + 1); /* PREDIV2 */ + + Pll2mull = (uint8_t)((RCC->CFGR2 & 0xF00)>>8); + + if(Pll2mull == 0) SystemCoreClock = (SystemCoreClock * 5)>>1; + else if(Pll2mull == 1) SystemCoreClock = (SystemCoreClock * 25)>>1; + else if(Pll2mull == 15) SystemCoreClock = SystemCoreClock * 20; + else SystemCoreClock = SystemCoreClock * (Pll2mull + 2); + + SystemCoreClock = SystemCoreClock/((RCC->CFGR2 & 0xF) + 1); /* PREDIV1 */ + } + else{/* HSE */ + SystemCoreClock = HSE_VALUE/((RCC->CFGR2 & 0xF) + 1); /* PREDIV1 */ + } + + SystemCoreClock = SystemCoreClock * pllmull; +#else + +#if defined (CH32F20x_D8W) + if((RCC->CFGR0 & (3<<22)) == (3<<22)) + { + SystemCoreClock = ((HSE_VALUE>>1)) * pllmull; + } + else +#endif + if( ( RCC->CFGR0 & RCC_PLLXTPRE ) != ( uint32_t )RESET ) + { +#ifdef CH32F20x_D8W + SystemCoreClock = ( ( HSE_VALUE >> 2 ) >> 1 ) * pllmull; +#else + SystemCoreClock = ( HSE_VALUE >> 1 ) * pllmull; +#endif + } + else + { +#ifdef CH32F20x_D8W + SystemCoreClock = ( HSE_VALUE >> 2 ) * pllmull; +#else + SystemCoreClock = HSE_VALUE * pllmull; +#endif + + } +#endif + } + + if( Pll_6_5 == 1 ) SystemCoreClock = ( SystemCoreClock / 2 ); + + break; + default: + SystemCoreClock = HSI_VALUE; + break; + } + + tmp = AHBPrescTable[( ( RCC->CFGR0 & RCC_HPRE ) >> 4 )]; + SystemCoreClock >>= tmp; +} + + + +/********************************************************************* + * @fn SetSysClock + * + * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClock( void ) +{ +#ifdef SYSCLK_FREQ_HSE + SetSysClockToHSE(); +#elif defined SYSCLK_FREQ_48MHz_HSE + SetSysClockTo48_HSE(); +#elif defined SYSCLK_FREQ_56MHz_HSE + SetSysClockTo56_HSE(); +#elif defined SYSCLK_FREQ_72MHz_HSE + SetSysClockTo72_HSE(); +#elif defined SYSCLK_FREQ_96MHz_HSE + SetSysClockTo96_HSE(); +#elif defined SYSCLK_FREQ_120MHz_HSE + SetSysClockTo120_HSE(); +#elif defined SYSCLK_FREQ_144MHz_HSE + SetSysClockTo144_HSE(); +#elif defined SYSCLK_FREQ_48MHz_HSI + SetSysClockTo48_HSI(); +#elif defined SYSCLK_FREQ_56MHz_HSI + SetSysClockTo56_HSI(); +#elif defined SYSCLK_FREQ_72MHz_HSI + SetSysClockTo72_HSI(); +#elif defined SYSCLK_FREQ_96MHz_HSI + SetSysClockTo96_HSI(); +#elif defined SYSCLK_FREQ_120MHz_HSI + SetSysClockTo120_HSI(); +#elif defined SYSCLK_FREQ_144MHz_HSI + SetSysClockTo144_HSI(); + +#endif + + /* If none of the define above is enabled, the HSI is used as System clock + * source (default after reset) + */ +} + + +#ifdef SYSCLK_FREQ_HSE + +/********************************************************************* + * @fn SetSysClockToHSE + * + * @brief Sets HSE as System clock source and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockToHSE( void ) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + + RCC->CTLR |= ( ( uint32_t )RCC_HSEON ); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } + while( ( HSEStatus == 0 ) && ( StartUpCounter != HSE_STARTUP_TIMEOUT ) ); + + if( ( RCC->CTLR & RCC_HSERDY ) != RESET ) + { + HSEStatus = ( uint32_t )0x01; + } + else + { + HSEStatus = ( uint32_t )0x00; + } + + if( HSEStatus == ( uint32_t )0x01 ) + { + /* HCLK = SYSCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE1_DIV1; + + /* Select HSE as system clock source + * CH32F20x_D6 (HSE=8Mhz) + * CH32F20x_D8 (HSE=8Mhz) + * CH32F20x_D8W (HSE=32Mhz) + */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_SW ) ); + RCC->CFGR0 |= ( uint32_t )RCC_SW_HSE; + + /* Wait till HSE is used as system clock source */ + while( ( RCC->CFGR0 & ( uint32_t )RCC_SWS ) != ( uint32_t )0x04 ) + { + } + } + else + { + /* If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + +#elif defined SYSCLK_FREQ_48MHz_HSE + +/********************************************************************* + * @fn SetSysClockTo48_HSE + * + * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo48_HSE( void ) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + + RCC->CTLR |= ( ( uint32_t )RCC_HSEON ); + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } + while( ( HSEStatus == 0 ) && ( StartUpCounter != HSE_STARTUP_TIMEOUT ) ); + + if( ( RCC->CTLR & RCC_HSERDY ) != RESET ) + { + HSEStatus = ( uint32_t )0x01; + } + else + { + HSEStatus = ( uint32_t )0x00; + } + + if( HSEStatus == ( uint32_t )0x01 ) + { + /* HCLK = SYSCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE1_DIV2; + + /* CH32F20x_D6-PLL configuration: PLLCLK = HSE * 6 = 48 MHz (HSE=8Mhz) + * CH32F20x_D8-PLL configuration: PLLCLK = HSE * 6 = 48 MHz (HSE=8Mhz) + * CH32F20x_D8W-PLL configuration: PLLCLK = HSE/4 * 6 = 48 MHz(HSE=32Mhz) + */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL ) ); + +#if defined (CH32F20x_D6) || defined (CH32F20x_D8) || defined (CH32F20x_D8W) + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL6 ); +#else + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL6_EXTEN ); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while( ( RCC->CTLR & RCC_PLLRDY ) == 0 ) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_SW ) ); + RCC->CFGR0 |= ( uint32_t )RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while( ( RCC->CFGR0 & ( uint32_t )RCC_SWS ) != ( uint32_t )0x08 ) + { + } + } + else + { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + +#elif defined SYSCLK_FREQ_56MHz_HSE + +/********************************************************************* + * @fn SetSysClockTo56_HSE + * + * @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo56_HSE( void ) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + RCC->CTLR |= ( ( uint32_t )RCC_HSEON ); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } + while( ( HSEStatus == 0 ) && ( StartUpCounter != HSE_STARTUP_TIMEOUT ) ); + + if( ( RCC->CTLR & RCC_HSERDY ) != RESET ) + { + HSEStatus = ( uint32_t )0x01; + } + else + { + HSEStatus = ( uint32_t )0x00; + } + + if( HSEStatus == ( uint32_t )0x01 ) + { + /* HCLK = SYSCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE1_DIV2; + + /* CH32F20x_D6-PLL configuration: PLLCLK = HSE * 7 = 56 MHz (HSE=8Mhz) + * CH32F20x_D8-PLL configuration: PLLCLK = HSE * 7 = 56 MHz (HSE=8Mhz) + * CH32F20x_D8W-PLL configuration: PLLCLK = HSE/4 * 7 = 56 MHz(HSE=32Mhz) + */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL ) ); + +#if defined (CH32F20x_D6) || defined (CH32F20x_D8) || defined (CH32F20x_D8W) + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL7 ); +#else + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL7_EXTEN ); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while( ( RCC->CTLR & RCC_PLLRDY ) == 0 ) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_SW ) ); + RCC->CFGR0 |= ( uint32_t )RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while( ( RCC->CFGR0 & ( uint32_t )RCC_SWS ) != ( uint32_t )0x08 ) + { + } + } + else + { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + +#elif defined SYSCLK_FREQ_72MHz_HSE + +/********************************************************************* + * @fn SetSysClockTo72_HSE + * + * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo72_HSE( void ) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + RCC->CTLR |= ( ( uint32_t )RCC_HSEON ); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } + while( ( HSEStatus == 0 ) && ( StartUpCounter != HSE_STARTUP_TIMEOUT ) ); + + if( ( RCC->CTLR & RCC_HSERDY ) != RESET ) + { + HSEStatus = ( uint32_t )0x01; + } + else + { + HSEStatus = ( uint32_t )0x00; + } + + if( HSEStatus == ( uint32_t )0x01 ) + { + /* HCLK = SYSCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE1_DIV2; + + /* CH32F20x_D6-PLL configuration: PLLCLK = HSE * 9 = 72 MHz (HSE=8Mhz) + * CH32F20x_D8-PLL configuration: PLLCLK = HSE * 9 = 72 MHz (HSE=8Mhz) + * CH32F20x_D8W-PLL configuration: PLLCLK = HSE/4 * 9 = 72 MHz(HSE=32Mhz) + */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_PLLSRC | RCC_PLLXTPRE | + RCC_PLLMULL ) ); + +#if defined (CH32F20x_D6) || defined (CH32F20x_D8) || defined (CH32F20x_D8W) + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL9 ); +#else + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL9_EXTEN ); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while( ( RCC->CTLR & RCC_PLLRDY ) == 0 ) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_SW ) ); + RCC->CFGR0 |= ( uint32_t )RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while( ( RCC->CFGR0 & ( uint32_t )RCC_SWS ) != ( uint32_t )0x08 ) + { + } + } + else + { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + + +#elif defined SYSCLK_FREQ_96MHz_HSE + +/********************************************************************* + * @fn SetSysClockTo96_HSE + * + * @brief Sets System clock frequency to 96MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo96_HSE( void ) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + RCC->CTLR |= ( ( uint32_t )RCC_HSEON ); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } + while( ( HSEStatus == 0 ) && ( StartUpCounter != HSE_STARTUP_TIMEOUT ) ); + + if( ( RCC->CTLR & RCC_HSERDY ) != RESET ) + { + HSEStatus = ( uint32_t )0x01; + } + else + { + HSEStatus = ( uint32_t )0x00; + } + + if( HSEStatus == ( uint32_t )0x01 ) + { + /* HCLK = SYSCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE1_DIV2; + + /* CH32F20x_D6-PLL configuration: PLLCLK = HSE * 12 = 96 MHz (HSE=8Mhz) + * CH32F20x_D8-PLL configuration: PLLCLK = HSE * 12 = 96 MHz (HSE=8Mhz) + * CH32F20x_D8W-PLL configuration: PLLCLK = HSE/4 * 12 = 96 MHz(HSE=32Mhz) + */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_PLLSRC | RCC_PLLXTPRE | + RCC_PLLMULL ) ); + +#if defined (CH32F20x_D6) || defined (CH32F20x_D8) || defined (CH32F20x_D8W) + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL12 ); +#else + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL12_EXTEN ); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while( ( RCC->CTLR & RCC_PLLRDY ) == 0 ) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_SW ) ); + RCC->CFGR0 |= ( uint32_t )RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while( ( RCC->CFGR0 & ( uint32_t )RCC_SWS ) != ( uint32_t )0x08 ) + { + } + } + else + { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + + +#elif defined SYSCLK_FREQ_120MHz_HSE + +/********************************************************************* + * @fn SetSysClockTo120_HSE + * + * @brief Sets System clock frequency to 120MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo120_HSE(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { +#if defined (CH32F20x_D8W) + RCC->CFGR0 |= (uint32_t)(3<<22); + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV2; +#else + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; +#endif + + /* PCLK2 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; + + /* CH32F20x_D6-PLL configuration: PLLCLK = HSE * 15 = 120 MHz (HSE=8Mhz) + * CH32F20x_D8-PLL configuration: PLLCLK = HSE * 15 = 120 MHz (HSE=8Mhz) + * CH32F20x_D8W-PLL configuration: PLLCLK = HSE/2 * 15 = 240 MHz(HSE=32Mhz) + */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | + RCC_PLLMULL)); + +#if defined (CH32F20x_D6) || defined (CH32F20x_D8) || defined (CH32F20x_D8W) + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL15); +#else + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL15_EXTEN); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while((RCC->CTLR & RCC_PLLRDY) == 0) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) + { + } + } + else + { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + + + +#elif defined SYSCLK_FREQ_144MHz_HSE + +/********************************************************************* + * @fn SetSysClockTo144_HSE + * + * @brief Sets System clock frequency to 144MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo144_HSE( void ) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + RCC->CTLR |= ( ( uint32_t )RCC_HSEON ); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } + while( ( HSEStatus == 0 ) && ( StartUpCounter != HSE_STARTUP_TIMEOUT ) ); + + if( ( RCC->CTLR & RCC_HSERDY ) != RESET ) + { + HSEStatus = ( uint32_t )0x01; + } + else + { + HSEStatus = ( uint32_t )0x00; + } + + if( HSEStatus == ( uint32_t )0x01 ) + { + /* HCLK = SYSCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE1_DIV2; + + /* CH32F20x_D6-PLL configuration: PLLCLK = HSE * 18 = 144 MHz (HSE=8Mhz) + * CH32F20x_D8-PLL configuration: PLLCLK = HSE * 18 = 144 MHz (HSE=8Mhz) + * CH32F20x_D8W-PLL configuration: PLLCLK = HSE/4 * 18 = 144 MHz(HSE=32Mhz) + */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_PLLSRC | RCC_PLLXTPRE | + RCC_PLLMULL ) ); + +#if defined (CH32F20x_D6) || defined (CH32F20x_D8) || defined (CH32F20x_D8W) + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL18 ); +#else + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL18_EXTEN ); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while( ( RCC->CTLR & RCC_PLLRDY ) == 0 ) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_SW ) ); + RCC->CFGR0 |= ( uint32_t )RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while( ( RCC->CFGR0 & ( uint32_t )RCC_SWS ) != ( uint32_t )0x08 ) + { + } + } + else + { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + +#elif defined SYSCLK_FREQ_48MHz_HSI + +/********************************************************************* + * @fn SetSysClockTo48_HSI + * + * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo48_HSI( void ) +{ + EXTEN->EXTEN_CTR |= EXTEN_PLL_HSI_PRE; + + /* HCLK = SYSCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSI * 6 = 48 MHz */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL ) ); + +#if defined (CH32F20x_D6) || defined (CH32F20x_D8) || defined (CH32F20x_D8W) + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL6 ); +#else + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL6_EXTEN ); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while( ( RCC->CTLR & RCC_PLLRDY ) == 0 ) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_SW ) ); + RCC->CFGR0 |= ( uint32_t )RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while( ( RCC->CFGR0 & ( uint32_t )RCC_SWS ) != ( uint32_t )0x08 ) + { + } +} + +#elif defined SYSCLK_FREQ_56MHz_HSI + +/********************************************************************* + * @fn SetSysClockTo56_HSI + * + * @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo56_HSI( void ) +{ + EXTEN->EXTEN_CTR |= EXTEN_PLL_HSI_PRE; + + /* HCLK = SYSCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSI * 7 = 56 MHz */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL ) ); + +#if defined (CH32F20x_D6) || defined (CH32F20x_D8) || defined (CH32F20x_D8W) + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL7 ); +#else + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL7_EXTEN ); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while( ( RCC->CTLR & RCC_PLLRDY ) == 0 ) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_SW ) ); + RCC->CFGR0 |= ( uint32_t )RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while( ( RCC->CFGR0 & ( uint32_t )RCC_SWS ) != ( uint32_t )0x08 ) + { + } +} + +#elif defined SYSCLK_FREQ_72MHz_HSI + +/********************************************************************* + * @fn SetSysClockTo72_HSI + * + * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo72_HSI( void ) +{ + EXTEN->EXTEN_CTR |= EXTEN_PLL_HSI_PRE; + + /* HCLK = SYSCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSI * 9 = 72 MHz */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL ) ); + +#if defined (CH32F20x_D6) || defined (CH32F20x_D8) || defined (CH32F20x_D8W) + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL9 ); +#else + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL9_EXTEN ); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while( ( RCC->CTLR & RCC_PLLRDY ) == 0 ) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_SW ) ); + RCC->CFGR0 |= ( uint32_t )RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while( ( RCC->CFGR0 & ( uint32_t )RCC_SWS ) != ( uint32_t )0x08 ) + { + } +} + + +#elif defined SYSCLK_FREQ_96MHz_HSI + +/********************************************************************* + * @fn SetSysClockTo96_HSI + * + * @brief Sets System clock frequency to 96MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo96_HSI( void ) +{ + EXTEN->EXTEN_CTR |= EXTEN_PLL_HSI_PRE; + + /* HCLK = SYSCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSI * 12 = 96 MHz */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL ) ); + +#if defined (CH32F20x_D6) || defined (CH32F20x_D8) || defined (CH32F20x_D8W) + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL12 ); +#else + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL12_EXTEN ); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while( ( RCC->CTLR & RCC_PLLRDY ) == 0 ) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_SW ) ); + RCC->CFGR0 |= ( uint32_t )RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while( ( RCC->CFGR0 & ( uint32_t )RCC_SWS ) != ( uint32_t )0x08 ) + { + } +} + + +#elif defined SYSCLK_FREQ_120MHz_HSI + +/********************************************************************* + * @fn SetSysClockTo120_HSI + * + * @brief Sets System clock frequency to 120MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo120_HSI(void) +{ + EXTEN->EXTEN_CTR |= EXTEN_PLL_HSI_PRE; + + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSI * 15 = 120 MHz */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | + RCC_PLLMULL)); + +#if defined (CH32F20x_D6) || defined (CH32F20x_D8) || defined (CH32F20x_D8W) + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL15 ); +#else + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL15_EXTEN ); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while((RCC->CTLR & RCC_PLLRDY) == 0) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) + { + } +} + + +#elif defined SYSCLK_FREQ_144MHz_HSI + +/********************************************************************* + * @fn SetSysClockTo144_HSI + * + * @brief Sets System clock frequency to 144MHz and configure HCLK, PCLK2 and PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo144_HSI( void ) +{ + EXTEN->EXTEN_CTR |= EXTEN_PLL_HSI_PRE; + + /* HCLK = SYSCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= ( uint32_t )RCC_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSI * 18 = 144 MHz */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL ) ); + +#if defined (CH32F20x_D6) || defined (CH32F20x_D8) || defined (CH32F20x_D8W) + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL18 ); +#else + RCC->CFGR0 |= ( uint32_t )( RCC_PLLSRC_HSI_Div2 | RCC_PLLMULL18_EXTEN ); +#endif + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while( ( RCC->CTLR & RCC_PLLRDY ) == 0 ) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= ( uint32_t )( ( uint32_t )~( RCC_SW ) ); + RCC->CFGR0 |= ( uint32_t )RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while( ( RCC->CFGR0 & ( uint32_t )RCC_SWS ) != ( uint32_t )0x08 ) + { + } +} + + +#endif diff --git a/hw/bsp/ch32f20x/system_ch32f20x.h b/hw/bsp/ch32f20x/system_ch32f20x.h new file mode 100644 index 000000000..734c80a5a --- /dev/null +++ b/hw/bsp/ch32f20x/system_ch32f20x.h @@ -0,0 +1,28 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : system_ch32f20x.h +* Author : WCH +* Version : V1.0.0 +* Date : 2021/08/08 +* Description : CH32F20x Device Peripheral Access Layer System Header File. +*******************************************************************************/ +#ifndef __SYSTEM_CH32F20x_H +#define __SYSTEM_CH32F20x_H + +#ifdef __cplusplus + extern "C" { +#endif + +extern uint32_t SystemCoreClock; /* System Clock Frequency (Core Clock) */ + +/* System_Exported_Functions */ +extern void SystemInit(void); +extern void SystemCoreClockUpdate(void); + +#ifdef __cplusplus +} +#endif + +#endif /*__CH32F20x_SYSTEM_H */ + + + diff --git a/hw/bsp/ch32v307/family.mk b/hw/bsp/ch32v307/family.mk index 4b06cf429..45f0317ee 100644 --- a/hw/bsp/ch32v307/family.mk +++ b/hw/bsp/ch32v307/family.mk @@ -29,7 +29,7 @@ CFLAGS += \ -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED SRC_C += \ - src/portable/wch/ch32v307/dcd_usbhs.c \ + src/portable/wch/dcd_ch32_usbhs.c \ $(CH32V307_SDK_SRC)/Core/core_riscv.c \ $(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_gpio.c \ $(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_misc.c \ diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 8807ff8aa..a72976ae9 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -383,6 +383,10 @@ #elif TU_CHECK_MCU(OPT_MCU_CH32V307) #define TUP_DCD_ENDPOINT_MAX 16 #define TUP_RHPORT_HIGHSPEED 1 + +#elif TU_CHECK_MCU(OPT_MCU_CH32F20X) + #define TUP_DCD_ENDPOINT_MAX 16 + #define TUP_RHPORT_HIGHSPEED 1 #endif diff --git a/src/portable/wch/ch32_usbhs_reg.h b/src/portable/wch/ch32_usbhs_reg.h new file mode 100644 index 000000000..9b956231f --- /dev/null +++ b/src/portable/wch/ch32_usbhs_reg.h @@ -0,0 +1,349 @@ +#ifndef _USB_CH32_USBHS_REG_H +#define _USB_CH32_USBHS_REG_H + +#if (CFG_TUSB_MCU == OPT_MCU_CH32V307) +#include +#elif (CFG_TUSB_MCU == OPT_MCU_CH32F20X) +#include +#endif + +/******************* GLOBAL ******************/ + +// USB CONTROL +#define USBHS_CONTROL_OFFSET 0x00 +#define USBHS_DMA_EN (1 << 0) +#define USBHS_ALL_CLR (1 << 1) +#define USBHS_FORCE_RST (1 << 2) +#define USBHS_INT_BUSY_EN (1 << 3) +#define USBHS_DEV_PU_EN (1 << 4) +#define USBHS_SPEED_MASK (3 << 5) +#define USBHS_FULL_SPEED (0 << 5) +#define USBHS_HIGH_SPEED (1 << 5) +#define USBHS_LOW_SPEED (2 << 5) +#define USBHS_HOST_MODE (1 << 7) + +// USB_INT_EN +#define USBHS_INT_EN_OFFSET 0x02 +#define USBHS_BUS_RST_EN (1 << 0) +#define USBHS_DETECT_EN (1 << 0) +#define USBHS_TRANSFER_EN (1 << 1) +#define USBHS_SUSPEND_EN (1 << 2) +#define USBHS_SOF_ACT_EN (1 << 3) +#define USBHS_FIFO_OV_EN (1 << 4) +#define USBHS_SETUP_ACT_EN (1 << 5) +#define USBHS_ISO_ACT_EN (1 << 6) +#define USBHS_DEV_NAK_EN (1 << 7) + +// USB DEV AD +#define USBHS_DEV_AD_OFFSET 0x03 +// USB FRAME_NO +#define USBHS_FRAME_NO_OFFSET 0x04 +// USB SUSPEND +#define USBHS_SUSPEND_OFFSET 0x06 +#define USBHS_DEV_REMOTE_WAKEUP (1 << 2) +#define USBHS_LINESTATE_MASK (2 << 4) /* Read Only */ + +// RESERVED0 + +// USB SPEED TYPE +#define USBHS_SPEED_TYPE_OFFSET 0x08 +#define USBSPEED_MASK (0x03) + +// USB_MIS_ST +#define USBHS_MIS_ST_OFFSET 0x09 +#define USBHS_SPLIT_CAN (1 << 0) +#define USBHS_ATTACH (1 << 1) +#define USBHS_SUSPEND (1 << 2) +#define USBHS_BUS_RESET (1 << 3) +#define USBHS_R_FIFO_RDY (1 << 4) +#define USBHS_SIE_FREE (1 << 5) +#define USBHS_SOF_ACT (1 << 6) +#define USBHS_SOF_PRES (1 << 7) + +// INT_FLAG +#define USBHS_INT_FLAG_OFFSET 0x0A +#define USBHS_BUS_RST_FLAG (1 << 0) +#define USBHS_DETECT_FLAG (1 << 0) +#define USBHS_TRANSFER_FLAG (1 << 1) +#define USBHS_SUSPEND_FLAG (1 << 2) +#define USBHS_HST_SOF_FLAG (1 << 3) +#define USBHS_FIFO_OV_FLAG (1 << 4) +#define USBHS_SETUP_FLAG (1 << 5) +#define USBHS_ISO_ACT_FLAG (1 << 6) + +// INT_ST +#define USBHS_INT_ST_OFFSET 0x0B +#define USBHS_DEV_UIS_IS_NAK (1 << 7) +#define USBHS_DEV_UIS_TOG_OK (1 << 6) +#define MASK_UIS_TOKEN (3 << 4) +#define MASK_UIS_ENDP (0x0F) +#define MASK_UIS_H_RES (0x0F) + +#define USBHS_TOGGLE_OK (0x40) +#define USBHS_HOST_RES (0x0f) + +//USB_RX_LEN +#define USBHS_RX_LEN_OFFSET 0x0C +/******************* DEVICE ******************/ + +//UEP_CONFIG +#define USBHS_UEP_CONFIG_OFFSET 0x10 +#define USBHS_EP0_T_EN (1 << 0) +#define USBHS_EP0_R_EN (1 << 16) + +#define USBHS_EP1_T_EN (1 << 1) +#define USBHS_EP1_R_EN (1 << 17) + +#define USBHS_EP2_T_EN (1 << 2) +#define USBHS_EP2_R_EN (1 << 18) + +#define USBHS_EP3_T_EN (1 << 3) +#define USBHS_EP3_R_EN (1 << 19) + +#define USBHS_EP4_T_EN (1 << 4) +#define USBHS_EP4_R_EN (1 << 20) + +#define USBHS_EP5_T_EN (1 << 5) +#define USBHS_EP5_R_EN (1 << 21) + +#define USBHS_EP6_T_EN (1 << 6) +#define USBHS_EP6_R_EN (1 << 22) + +#define USBHS_EP7_T_EN (1 << 7) +#define USBHS_EP7_R_EN (1 << 23) + +#define USBHS_EP8_T_EN (1 << 8) +#define USBHS_EP8_R_EN (1 << 24) + +#define USBHS_EP9_T_EN (1 << 9) +#define USBHS_EP9_R_EN (1 << 25) + +#define USBHS_EP10_T_EN (1 << 10) +#define USBHS_EP10_R_EN (1 << 26) + +#define USBHS_EP11_T_EN (1 << 11) +#define USBHS_EP11_R_EN (1 << 27) + +#define USBHS_EP12_T_EN (1 << 12) +#define USBHS_EP12_R_EN (1 << 28) + +#define USBHS_EP13_T_EN (1 << 13) +#define USBHS_EP13_R_EN (1 << 29) + +#define USBHS_EP14_T_EN (1 << 14) +#define USBHS_EP14_R_EN (1 << 30) + +#define USBHS_EP15_T_EN (1 << 15) +#define USBHS_EP15_R_EN (1 << 31) + +//UEP_TYPE +#define USBHS_UEP_TYPE_OFFSET 0x14 +#define USBHS_EP0_T_TYP (1 << 0) +#define USBHS_EP0_R_TYP (1 << 16) + +#define USBHS_EP1_T_TYP (1 << 1) +#define USBHS_EP1_R_TYP (1 << 17) + +#define USBHS_EP2_T_TYP (1 << 2) +#define USBHS_EP2_R_TYP (1 << 18) + +#define USBHS_EP3_T_TYP (1 << 3) +#define USBHS_EP3_R_TYP (1 << 19) + +#define USBHS_EP4_T_TYP (1 << 4) +#define USBHS_EP4_R_TYP (1 << 20) + +#define USBHS_EP5_T_TYP (1 << 5) +#define USBHS_EP5_R_TYP (1 << 21) + +#define USBHS_EP6_T_TYP (1 << 6) +#define USBHS_EP6_R_TYP (1 << 22) + +#define USBHS_EP7_T_TYP (1 << 7) +#define USBHS_EP7_R_TYP (1 << 23) + +#define USBHS_EP8_T_TYP (1 << 8) +#define USBHS_EP8_R_TYP (1 << 24) + +#define USBHS_EP9_T_TYP (1 << 8) +#define USBHS_EP9_R_TYP (1 << 25) + +#define USBHS_EP10_T_TYP (1 << 10) +#define USBHS_EP10_R_TYP (1 << 26) + +#define USBHS_EP11_T_TYP (1 << 11) +#define USBHS_EP11_R_TYP (1 << 27) + +#define USBHS_EP12_T_TYP (1 << 12) +#define USBHS_EP12_R_TYP (1 << 28) + +#define USBHS_EP13_T_TYP (1 << 13) +#define USBHS_EP13_R_TYP (1 << 29) + +#define USBHS_EP14_T_TYP (1 << 14) +#define USBHS_EP14_R_TYP (1 << 30) + +#define USBHS_EP15_T_TYP (1 << 15) +#define USBHS_EP15_R_TYP (1 << 31) + +/* BUF_MOD UEP1~15 */ +#define USBHS_BUF_MOD_OFFSET 0x18 +#define USBHS_EP0_BUF_MOD (1 << 0) +#define USBHS_EP0_ISO_BUF_MOD (1 << 16) + +#define USBHS_EP1_BUF_MOD (1 << 1) +#define USBHS_EP1_ISO_BUF_MOD (1 << 17) + +#define USBHS_EP2_BUF_MOD (1 << 2) +#define USBHS_EP2_ISO_BUF_MOD (1 << 18) + +#define USBHS_EP3_BUF_MOD (1 << 3) +#define USBHS_EP3_ISO_BUF_MOD (1 << 19) + +#define USBHS_EP4_BUF_MOD (1 << 4) +#define USBHS_EP4_ISO_BUF_MOD (1 << 20) + +#define USBHS_EP5_BUF_MOD (1 << 5) +#define USBHS_EP5_ISO_BUF_MOD (1 << 21) + +#define USBHS_EP6_BUF_MOD (1 << 6) +#define USBHS_EP6_ISO_BUF_MOD (1 << 22) + +#define USBHS_EP7_BUF_MOD (1 << 7) +#define USBHS_EP7_ISO_BUF_MOD (1 << 23) + +#define USBHS_EP8_BUF_MOD (1 << 8) +#define USBHS_EP8_ISO_BUF_MOD (1 << 24) + +#define USBHS_EP9_BUF_MOD (1 << 9) +#define USBHS_EP9_ISO_BUF_MOD (1 << 25) + +#define USBHS_EP10_BUF_MOD (1 << 10) +#define USBHS_EP10_ISO_BUF_MOD (1 << 26) + +#define USBHS_EP11_BUF_MOD (1 << 11) +#define USBHS_EP11_ISO_BUF_MOD (1 << 27) + +#define USBHS_EP12_BUF_MOD (1 << 12) +#define USBHS_EP12_ISO_BUF_MOD (1 << 28) + +#define USBHS_EP13_BUF_MOD (1 << 13) +#define USBHS_EP13_ISO_BUF_MOD (1 << 29) + +#define USBHS_EP14_BUF_MOD (1 << 14) +#define USBHS_EP14_ISO_BUF_MOD (1 << 30) + +#define USBHS_EP15_BUF_MOD (1 << 15) +#define USBHS_EP15_ISO_BUF_MOD (1 << 31) +//USBHS_EPn_T_EN USBHS_EPn_R_EN USBHS_EPn_BUF_MOD Description: Arrange from low to high with UEPn_DMA as the starting address +// 0 0 x The endpoint is disabled and the UEPn_*_DMA buffers are not used. +// 1 0 0 The first address of the receive (OUT) buffer is UEPn_RX_DMA +// 1 0 1 RB_UEPn_RX_TOG[0]=0, use buffer UEPn_RX_DMA RB_UEPn_RX_TOG[0]=1, use buffer UEPn_TX_DMA +// 0 1 0 The first address of the transmit (IN) buffer is UEPn_TX_DMA. +// 0 1 1 RB_UEPn_TX_TOG[0]=0, use buffer UEPn_TX_DMA RB_UEPn_TX_TOG[0]=1, use buffer UEPn_RX_DMA + +/* USB0_DMA */ +#define USBHS_UEP0_DMA_OFFSET(n) (0x1C) // endpoint 0 DMA buffer address + +/* USBX_RX_DMA */ +#define USBHS_UEPx_RX_DMA_OFFSET(n) (0x1C + 4 * (n)) // endpoint x DMA buffer address + +#define USBHS_UEPx_TX_DMA_OFFSET(n) (0x58 + 4 * (n)) // endpoint x DMA buffer address + +#define USBHS_UEPx_MAX_LEN_OFFSET(n) (0x98 + 4 * (n)) // endpoint x DMA buffer address + +#define USBHS_UEPx_T_LEN_OFFSET(n) (0xD8 + 4 * (n)) // endpoint x DMA buffer address +#define USBHS_UEPx_TX_CTRL_OFFSET(n) (0xD8 + 4 * (n) + 2) // endpoint x DMA buffer address +#define USBHS_UEPx_RX_CTRL_OFFSET(n) (0xD8 + 4 * (n) + 3) // endpoint x DMA buffer address + +// UEPn_T_LEN +#define USBHS_EP_T_LEN_MASK (0x7FF) + +//UEPn_TX_CTRL +#define USBHS_EP_T_RES_MASK (3 << 0) +#define USBHS_EP_T_RES_ACK (0 << 0) +#define USBHS_EP_T_RES_NYET (1 << 0) +#define USBHS_EP_T_RES_NAK (2 << 0) +#define USBHS_EP_T_RES_STALL (3 << 0) + +#define USBHS_EP_T_TOG_MASK (3 << 3) +#define USBHS_EP_T_TOG_0 (0 << 3) +#define USBHS_EP_T_TOG_1 (1 << 3) +#define USBHS_EP_T_TOG_2 (2 << 3) +#define USBHS_EP_T_TOG_M (3 << 3) + +#define USBHS_EP_T_AUTOTOG (1 << 5) + +//UEPn_RX_CTRL +#define USBHS_EP_R_RES_MASK (3 << 0) +#define USBHS_EP_R_RES_ACK (0 << 0) +#define USBHS_EP_R_RES_NYET (1 << 0) +#define USBHS_EP_R_RES_NAK (2 << 0) +#define USBHS_EP_R_RES_STALL (3 << 0) + +#define USBHS_EP_R_TOG_MASK (3 << 3) +#define USBHS_EP_R_TOG_0 (0 << 3) +#define USBHS_EP_R_TOG_1 (1 << 3) +#define USBHS_EP_R_TOG_2 (2 << 3) +#define USBHS_EP_R_TOG_M (3 << 3) + +#define USBHS_EP_R_AUTOTOG (1 << 5) + +#define USBHS_TOG_MATCH (1 << 6) + +/******************* HOST ******************/ +// USB HOST_CTRL +#define USBHS_SEND_BUS_RESET (1 << 0) +#define USBHS_SEND_BUS_SUSPEND (1 << 1) +#define USBHS_SEND_BUS_RESUME (1 << 2) +#define USBHS_REMOTE_WAKE (1 << 3) +#define USBHS_PHY_SUSPENDM (1 << 4) +#define USBHS_UH_SOFT_FREE (1 << 6) +#define USBHS_SEND_SOF_EN (1 << 7) + +//UH_CONFIG +#define USBHS_HOST_TX_EN (1 << 3) +#define USBHS_HOST_RX_EN (1 << 18) + +// HOST_EP_TYPE +#define USBHS_ENDP_TX_ISO (1 << 3) +#define USBHS_ENDP_RX_ISO (1 << (16 + 2)) + +// R32_UH_EP_PID +#define USBHS_HOST_MASK_TOKEN (0x0f) +#define USBHS_HOST_MASK_ENDP (0x0f << 4) + +//R8_UH_RX_CTRL +#define USBHS_EP_R_RES_MASK (3 << 0) +#define USBHS_EP_R_RES_ACK (0 << 0) +#define USBHS_EP_R_RES_NYET (1 << 0) +#define USBHS_EP_R_RES_NAK (2 << 0) +#define USBHS_EP_R_RES_STALL (3 << 0) + +#define USBHS_UH_R_RES_NO (1 << 2) +#define USBHS_UH_R_TOG_1 (1 << 3) +#define USBHS_UH_R_TOG_2 (2 << 3) +#define USBHS_UH_R_TOG_3 (3 << 3) +#define USBHS_UH_R_TOG_AUTO (1 << 5) +#define USBHS_UH_R_DATA_NO (1 << 6) +//R8_UH_TX_CTRL +#define USBHS_UH_T_RES_MASK (3 << 0) +#define USBHS_UH_T_RES_ACK (0 << 0) +#define USBHS_UH_T_RES_NYET (1 << 0) +#define USBHS_UH_T_RES_NAK (2 << 0) +#define USBHS_UH_T_RES_STALL (3 << 0) + +#define USBHS_UH_T_RES_NO (1 << 2) +#define USBHS_UH_T_TOG_1 (1 << 3) +#define USBHS_UH_T_TOG_2 (2 << 3) +#define USBHS_UH_T_TOG_3 (3 << 3) +#define USBHS_UH_T_TOG_AUTO (1 << 5) +#define USBHS_UH_T_DATA_NO (1 << 6) + +// 00: OUT, 01:SOF, 10:IN, 11:SETUP +#define PID_OUT 0 +#define PID_SOF 1 +#define PID_IN 2 +#define PID_SETUP 3 + +#endif diff --git a/src/portable/wch/ch32v307/ch32_usbhs_reg.h b/src/portable/wch/ch32v307/ch32_usbhs_reg.h deleted file mode 100644 index 5a2c1fbc9..000000000 --- a/src/portable/wch/ch32v307/ch32_usbhs_reg.h +++ /dev/null @@ -1,345 +0,0 @@ -#ifndef _USB_CH32_USBHS_REG_H -#define _USB_CH32_USBHS_REG_H - -#include - -/******************* GLOBAL ******************/ - -// USB CONTROL -#define USBHS_CONTROL_OFFSET 0x00 -#define USBHS_DMA_EN (1 << 0) -#define USBHS_ALL_CLR (1 << 1) -#define USBHS_FORCE_RST (1 << 2) -#define USBHS_INT_BUSY_EN (1 << 3) -#define USBHS_DEV_PU_EN (1 << 4) -#define USBHS_SPEED_MASK (3 << 5) -#define USBHS_FULL_SPEED (0 << 5) -#define USBHS_HIGH_SPEED (1 << 5) -#define USBHS_LOW_SPEED (2 << 5) -#define USBHS_HOST_MODE (1 << 7) - -// USB_INT_EN -#define USBHS_INT_EN_OFFSET 0x02 -#define USBHS_BUS_RST_EN (1 << 0) -#define USBHS_DETECT_EN (1 << 0) -#define USBHS_TRANSFER_EN (1 << 1) -#define USBHS_SUSPEND_EN (1 << 2) -#define USBHS_SOF_ACT_EN (1 << 3) -#define USBHS_FIFO_OV_EN (1 << 4) -#define USBHS_SETUP_ACT_EN (1 << 5) -#define USBHS_ISO_ACT_EN (1 << 6) -#define USBHS_DEV_NAK_EN (1 << 7) - -// USB DEV AD -#define USBHS_DEV_AD_OFFSET 0x03 -// USB FRAME_NO -#define USBHS_FRAME_NO_OFFSET 0x04 -// USB SUSPEND -#define USBHS_SUSPEND_OFFSET 0x06 -#define USBHS_DEV_REMOTE_WAKEUP (1 << 2) -#define USBHS_LINESTATE_MASK (2 << 4) /* Read Only */ - -// RESERVED0 - -// USB SPEED TYPE -#define USBHS_SPEED_TYPE_OFFSET 0x08 -#define USBSPEED_MASK (0x03) - -// USB_MIS_ST -#define USBHS_MIS_ST_OFFSET 0x09 -#define USBHS_SPLIT_CAN (1 << 0) -#define USBHS_ATTACH (1 << 1) -#define USBHS_SUSPEND (1 << 2) -#define USBHS_BUS_RESET (1 << 3) -#define USBHS_R_FIFO_RDY (1 << 4) -#define USBHS_SIE_FREE (1 << 5) -#define USBHS_SOF_ACT (1 << 6) -#define USBHS_SOF_PRES (1 << 7) - -// INT_FLAG -#define USBHS_INT_FLAG_OFFSET 0x0A -#define USBHS_BUS_RST_FLAG (1 << 0) -#define USBHS_DETECT_FLAG (1 << 0) -#define USBHS_TRANSFER_FLAG (1 << 1) -#define USBHS_SUSPEND_FLAG (1 << 2) -#define USBHS_HST_SOF_FLAG (1 << 3) -#define USBHS_FIFO_OV_FLAG (1 << 4) -#define USBHS_SETUP_FLAG (1 << 5) -#define USBHS_ISO_ACT_FLAG (1 << 6) - -// INT_ST -#define USBHS_INT_ST_OFFSET 0x0B -#define USBHS_DEV_UIS_IS_NAK (1 << 7) -#define USBHS_DEV_UIS_TOG_OK (1 << 6) -#define MASK_UIS_TOKEN (3 << 4) -#define MASK_UIS_ENDP (0x0F) -#define MASK_UIS_H_RES (0x0F) - -#define USBHS_TOGGLE_OK (0x40) -#define USBHS_HOST_RES (0x0f) - -//USB_RX_LEN -#define USBHS_RX_LEN_OFFSET 0x0C -/******************* DEVICE ******************/ - -//UEP_CONFIG -#define USBHS_UEP_CONFIG_OFFSET 0x10 -#define USBHS_EP0_T_EN (1 << 0) -#define USBHS_EP0_R_EN (1 << 16) - -#define USBHS_EP1_T_EN (1 << 1) -#define USBHS_EP1_R_EN (1 << 17) - -#define USBHS_EP2_T_EN (1 << 2) -#define USBHS_EP2_R_EN (1 << 18) - -#define USBHS_EP3_T_EN (1 << 3) -#define USBHS_EP3_R_EN (1 << 19) - -#define USBHS_EP4_T_EN (1 << 4) -#define USBHS_EP4_R_EN (1 << 20) - -#define USBHS_EP5_T_EN (1 << 5) -#define USBHS_EP5_R_EN (1 << 21) - -#define USBHS_EP6_T_EN (1 << 6) -#define USBHS_EP6_R_EN (1 << 22) - -#define USBHS_EP7_T_EN (1 << 7) -#define USBHS_EP7_R_EN (1 << 23) - -#define USBHS_EP8_T_EN (1 << 8) -#define USBHS_EP8_R_EN (1 << 24) - -#define USBHS_EP9_T_EN (1 << 9) -#define USBHS_EP9_R_EN (1 << 25) - -#define USBHS_EP10_T_EN (1 << 10) -#define USBHS_EP10_R_EN (1 << 26) - -#define USBHS_EP11_T_EN (1 << 11) -#define USBHS_EP11_R_EN (1 << 27) - -#define USBHS_EP12_T_EN (1 << 12) -#define USBHS_EP12_R_EN (1 << 28) - -#define USBHS_EP13_T_EN (1 << 13) -#define USBHS_EP13_R_EN (1 << 29) - -#define USBHS_EP14_T_EN (1 << 14) -#define USBHS_EP14_R_EN (1 << 30) - -#define USBHS_EP15_T_EN (1 << 15) -#define USBHS_EP15_R_EN (1 << 31) - -//UEP_TYPE -#define USBHS_UEP_TYPE_OFFSET 0x14 -#define USBHS_EP0_T_TYP (1 << 0) -#define USBHS_EP0_R_TYP (1 << 16) - -#define USBHS_EP1_T_TYP (1 << 1) -#define USBHS_EP1_R_TYP (1 << 17) - -#define USBHS_EP2_T_TYP (1 << 2) -#define USBHS_EP2_R_TYP (1 << 18) - -#define USBHS_EP3_T_TYP (1 << 3) -#define USBHS_EP3_R_TYP (1 << 19) - -#define USBHS_EP4_T_TYP (1 << 4) -#define USBHS_EP4_R_TYP (1 << 20) - -#define USBHS_EP5_T_TYP (1 << 5) -#define USBHS_EP5_R_TYP (1 << 21) - -#define USBHS_EP6_T_TYP (1 << 6) -#define USBHS_EP6_R_TYP (1 << 22) - -#define USBHS_EP7_T_TYP (1 << 7) -#define USBHS_EP7_R_TYP (1 << 23) - -#define USBHS_EP8_T_TYP (1 << 8) -#define USBHS_EP8_R_TYP (1 << 24) - -#define USBHS_EP9_T_TYP (1 << 8) -#define USBHS_EP9_R_TYP (1 << 25) - -#define USBHS_EP10_T_TYP (1 << 10) -#define USBHS_EP10_R_TYP (1 << 26) - -#define USBHS_EP11_T_TYP (1 << 11) -#define USBHS_EP11_R_TYP (1 << 27) - -#define USBHS_EP12_T_TYP (1 << 12) -#define USBHS_EP12_R_TYP (1 << 28) - -#define USBHS_EP13_T_TYP (1 << 13) -#define USBHS_EP13_R_TYP (1 << 29) - -#define USBHS_EP14_T_TYP (1 << 14) -#define USBHS_EP14_R_TYP (1 << 30) - -#define USBHS_EP15_T_TYP (1 << 15) -#define USBHS_EP15_R_TYP (1 << 31) - -/* BUF_MOD UEP1~15 */ -#define USBHS_BUF_MOD_OFFSET 0x18 -#define USBHS_EP0_BUF_MOD (1 << 0) -#define USBHS_EP0_ISO_BUF_MOD (1 << 16) - -#define USBHS_EP1_BUF_MOD (1 << 1) -#define USBHS_EP1_ISO_BUF_MOD (1 << 17) - -#define USBHS_EP2_BUF_MOD (1 << 2) -#define USBHS_EP2_ISO_BUF_MOD (1 << 18) - -#define USBHS_EP3_BUF_MOD (1 << 3) -#define USBHS_EP3_ISO_BUF_MOD (1 << 19) - -#define USBHS_EP4_BUF_MOD (1 << 4) -#define USBHS_EP4_ISO_BUF_MOD (1 << 20) - -#define USBHS_EP5_BUF_MOD (1 << 5) -#define USBHS_EP5_ISO_BUF_MOD (1 << 21) - -#define USBHS_EP6_BUF_MOD (1 << 6) -#define USBHS_EP6_ISO_BUF_MOD (1 << 22) - -#define USBHS_EP7_BUF_MOD (1 << 7) -#define USBHS_EP7_ISO_BUF_MOD (1 << 23) - -#define USBHS_EP8_BUF_MOD (1 << 8) -#define USBHS_EP8_ISO_BUF_MOD (1 << 24) - -#define USBHS_EP9_BUF_MOD (1 << 9) -#define USBHS_EP9_ISO_BUF_MOD (1 << 25) - -#define USBHS_EP10_BUF_MOD (1 << 10) -#define USBHS_EP10_ISO_BUF_MOD (1 << 26) - -#define USBHS_EP11_BUF_MOD (1 << 11) -#define USBHS_EP11_ISO_BUF_MOD (1 << 27) - -#define USBHS_EP12_BUF_MOD (1 << 12) -#define USBHS_EP12_ISO_BUF_MOD (1 << 28) - -#define USBHS_EP13_BUF_MOD (1 << 13) -#define USBHS_EP13_ISO_BUF_MOD (1 << 29) - -#define USBHS_EP14_BUF_MOD (1 << 14) -#define USBHS_EP14_ISO_BUF_MOD (1 << 30) - -#define USBHS_EP15_BUF_MOD (1 << 15) -#define USBHS_EP15_ISO_BUF_MOD (1 << 31) -//USBHS_EPn_T_EN USBHS_EPn_R_EN USBHS_EPn_BUF_MOD Description: Arrange from low to high with UEPn_DMA as the starting address -// 0 0 x The endpoint is disabled and the UEPn_*_DMA buffers are not used. -// 1 0 0 The first address of the receive (OUT) buffer is UEPn_RX_DMA -// 1 0 1 RB_UEPn_RX_TOG[0]=0, use buffer UEPn_RX_DMA RB_UEPn_RX_TOG[0]=1, use buffer UEPn_TX_DMA -// 0 1 0 The first address of the transmit (IN) buffer is UEPn_TX_DMA. -// 0 1 1 RB_UEPn_TX_TOG[0]=0, use buffer UEPn_TX_DMA RB_UEPn_TX_TOG[0]=1, use buffer UEPn_RX_DMA - -/* USB0_DMA */ -#define USBHS_UEP0_DMA_OFFSET(n) (0x1C) // endpoint 0 DMA buffer address - -/* USBX_RX_DMA */ -#define USBHS_UEPx_RX_DMA_OFFSET(n) (0x1C + 4 * (n)) // endpoint x DMA buffer address - -#define USBHS_UEPx_TX_DMA_OFFSET(n) (0x58 + 4 * (n)) // endpoint x DMA buffer address - -#define USBHS_UEPx_MAX_LEN_OFFSET(n) (0x98 + 4 * (n)) // endpoint x DMA buffer address - -#define USBHS_UEPx_T_LEN_OFFSET(n) (0xD8 + 4 * (n)) // endpoint x DMA buffer address -#define USBHS_UEPx_TX_CTRL_OFFSET(n) (0xD8 + 4 * (n) + 2) // endpoint x DMA buffer address -#define USBHS_UEPx_RX_CTRL_OFFSET(n) (0xD8 + 4 * (n) + 3) // endpoint x DMA buffer address - -// UEPn_T_LEN -#define USBHS_EP_T_LEN_MASK (0x7FF) - -//UEPn_TX_CTRL -#define USBHS_EP_T_RES_MASK (3 << 0) -#define USBHS_EP_T_RES_ACK (0 << 0) -#define USBHS_EP_T_RES_NYET (1 << 0) -#define USBHS_EP_T_RES_NAK (2 << 0) -#define USBHS_EP_T_RES_STALL (3 << 0) - -#define USBHS_EP_T_TOG_MASK (3 << 3) -#define USBHS_EP_T_TOG_0 (0 << 3) -#define USBHS_EP_T_TOG_1 (1 << 3) -#define USBHS_EP_T_TOG_2 (2 << 3) -#define USBHS_EP_T_TOG_M (3 << 3) - -#define USBHS_EP_T_AUTOTOG (1 << 5) - -//UEPn_RX_CTRL -#define USBHS_EP_R_RES_MASK (3 << 0) -#define USBHS_EP_R_RES_ACK (0 << 0) -#define USBHS_EP_R_RES_NYET (1 << 0) -#define USBHS_EP_R_RES_NAK (2 << 0) -#define USBHS_EP_R_RES_STALL (3 << 0) - -#define USBHS_EP_R_TOG_MASK (3 << 3) -#define USBHS_EP_R_TOG_0 (0 << 3) -#define USBHS_EP_R_TOG_1 (1 << 3) -#define USBHS_EP_R_TOG_2 (2 << 3) -#define USBHS_EP_R_TOG_M (3 << 3) - -#define USBHS_EP_R_AUTOTOG (1 << 5) - -#define USBHS_TOG_MATCH (1 << 6) - -/******************* HOST ******************/ -// USB HOST_CTRL -#define USBHS_SEND_BUS_RESET (1 << 0) -#define USBHS_SEND_BUS_SUSPEND (1 << 1) -#define USBHS_SEND_BUS_RESUME (1 << 2) -#define USBHS_REMOTE_WAKE (1 << 3) -#define USBHS_PHY_SUSPENDM (1 << 4) -#define USBHS_UH_SOFT_FREE (1 << 6) -#define USBHS_SEND_SOF_EN (1 << 7) - -//UH_CONFIG -#define USBHS_HOST_TX_EN (1 << 3) -#define USBHS_HOST_RX_EN (1 << 18) - -// HOST_EP_TYPE -#define USBHS_ENDP_TX_ISO (1 << 3) -#define USBHS_ENDP_RX_ISO (1 << (16 + 2)) - -// R32_UH_EP_PID -#define USBHS_HOST_MASK_TOKEN (0x0f) -#define USBHS_HOST_MASK_ENDP (0x0f << 4) - -//R8_UH_RX_CTRL -#define USBHS_EP_R_RES_MASK (3 << 0) -#define USBHS_EP_R_RES_ACK (0 << 0) -#define USBHS_EP_R_RES_NYET (1 << 0) -#define USBHS_EP_R_RES_NAK (2 << 0) -#define USBHS_EP_R_RES_STALL (3 << 0) - -#define USBHS_UH_R_RES_NO (1 << 2) -#define USBHS_UH_R_TOG_1 (1 << 3) -#define USBHS_UH_R_TOG_2 (2 << 3) -#define USBHS_UH_R_TOG_3 (3 << 3) -#define USBHS_UH_R_TOG_AUTO (1 << 5) -#define USBHS_UH_R_DATA_NO (1 << 6) -//R8_UH_TX_CTRL -#define USBHS_UH_T_RES_MASK (3 << 0) -#define USBHS_UH_T_RES_ACK (0 << 0) -#define USBHS_UH_T_RES_NYET (1 << 0) -#define USBHS_UH_T_RES_NAK (2 << 0) -#define USBHS_UH_T_RES_STALL (3 << 0) - -#define USBHS_UH_T_RES_NO (1 << 2) -#define USBHS_UH_T_TOG_1 (1 << 3) -#define USBHS_UH_T_TOG_2 (2 << 3) -#define USBHS_UH_T_TOG_3 (3 << 3) -#define USBHS_UH_T_TOG_AUTO (1 << 5) -#define USBHS_UH_T_DATA_NO (1 << 6) - -// 00: OUT, 01:SOF, 10:IN, 11:SETUP -#define PID_OUT 0 -#define PID_SOF 1 -#define PID_IN 2 -#define PID_SETUP 3 - -#endif diff --git a/src/portable/wch/ch32v307/dcd_usbhs.c b/src/portable/wch/ch32v307/dcd_usbhs.c deleted file mode 100644 index 3ad011cff..000000000 --- a/src/portable/wch/ch32v307/dcd_usbhs.c +++ /dev/null @@ -1,391 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2022 Greg Davill - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "tusb_option.h" - -#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_CH32V307) -#include "device/dcd.h" - -#include "ch32_usbhs_reg.h" -#include "core_riscv.h" - -// Max number of bi-directional endpoints including EP0 -#define EP_MAX 16 - -typedef struct { - uint8_t *buffer; - // tu_fifo_t * ff; // TODO support dcd_edpt_xfer_fifo API - uint16_t total_len; - uint16_t queued_len; - uint16_t max_size; - bool short_packet; -} xfer_ctl_t; - -#define XFER_CTL_BASE(_ep, _dir) &xfer_status[_ep][_dir] -static xfer_ctl_t xfer_status[EP_MAX][2]; - -#define EP_TX_LEN(ep) *(volatile uint16_t *)((volatile uint16_t *)&(USBHSD->UEP0_TX_LEN) + (ep)*2) -#define EP_TX_CTRL(ep) *(volatile uint8_t *)((volatile uint8_t *)&(USBHSD->UEP0_TX_CTRL) + (ep)*4) -#define EP_RX_CTRL(ep) *(volatile uint8_t *)((volatile uint8_t *)&(USBHSD->UEP0_RX_CTRL) + (ep)*4) -#define EP_RX_MAX_LEN(ep) *(volatile uint16_t *)((volatile uint16_t *)&(USBHSD->UEP0_MAX_LEN) + (ep)*2) - -#define EP_TX_DMA_ADDR(ep) *(volatile uint32_t *)((volatile uint32_t *)&(USBHSD->UEP1_TX_DMA) + (ep - 1)) -#define EP_RX_DMA_ADDR(ep) *(volatile uint32_t *)((volatile uint32_t *)&(USBHSD->UEP1_RX_DMA) + (ep - 1)) - -/* Endpoint Buffer */ -TU_ATTR_ALIGNED(4) uint8_t EP0_DatabufHD[64]; // ep0(64) - -volatile uint8_t USBHS_Dev_Endp0_Tog = 0x01; - -void dcd_init(uint8_t rhport) { - (void)rhport; - - memset(&xfer_status, 0, sizeof(xfer_status)); - - USBHSD->HOST_CTRL = 0x00; - USBHSD->HOST_CTRL = USBHS_PHY_SUSPENDM; - - USBHSD->CONTROL = 0; - -#if TUD_OPT_HIGH_SPEED - USBHSD->CONTROL = USBHS_DMA_EN | USBHS_INT_BUSY_EN | USBHS_HIGH_SPEED; -#else - #error OPT_MODE_FULL_SPEED not currently supported on CH32V307 - USBHSD->CONTROL = USBHS_DMA_EN | USBHS_INT_BUSY_EN | USBHS_FULL_SPEED; -#endif - - USBHSD->INT_EN = 0; - USBHSD->INT_EN = USBHS_SETUP_ACT_EN | USBHS_TRANSFER_EN | USBHS_DETECT_EN | USBHS_SUSPEND_EN; - - /* ALL endpoint enable */ - USBHSD->ENDP_CONFIG = 0xffffffff; - - USBHSD->ENDP_CONFIG = USBHS_EP0_T_EN | USBHS_EP0_R_EN; - USBHSD->ENDP_TYPE = 0x00; - USBHSD->BUF_MODE = 0x00; - - USBHSD->UEP0_MAX_LEN = 64; - - USBHSD->UEP0_DMA = (uint32_t)EP0_DatabufHD; - - USBHSD->UEP0_TX_LEN = 0; - USBHSD->UEP0_TX_CTRL = USBHS_EP_T_RES_NAK; - USBHSD->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK; - - for (int ep = 1; ep < EP_MAX; ep++) { - EP_TX_LEN(ep) = 0; - EP_TX_CTRL(ep) = USBHS_EP_T_AUTOTOG | USBHS_EP_T_RES_NAK; - EP_RX_CTRL(ep) = USBHS_EP_R_AUTOTOG | USBHS_EP_R_RES_NAK; - - EP_RX_MAX_LEN(ep) = 512; - } - - USBHSD->DEV_AD = 0; - USBHSD->CONTROL |= USBHS_DEV_PU_EN; -} - -void dcd_int_enable(uint8_t rhport) { - (void)rhport; - - NVIC_EnableIRQ(USBHS_IRQn); -} - -void dcd_int_disable(uint8_t rhport) { - (void)rhport; - - NVIC_DisableIRQ(USBHS_IRQn); -} - -void dcd_edpt_close_all(uint8_t rhport) { - (void)rhport; -} - -void dcd_set_address(uint8_t rhport, uint8_t dev_addr) { - (void)dev_addr; - - // Response with zlp status - dcd_edpt_xfer(rhport, 0x80, NULL, 0); -} - -void dcd_remote_wakeup(uint8_t rhport) -{ - (void) rhport; -} - -void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const *request) { - (void)rhport; - - if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE && - request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD && - request->bRequest == TUSB_REQ_SET_ADDRESS) { - USBHSD->DEV_AD = (uint8_t)request->wValue; - } - - EP_TX_CTRL(0) = USBHS_EP_T_RES_NAK; - EP_RX_CTRL(0) = USBHS_EP_R_RES_ACK; -} - -bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_edpt) { - (void)rhport; - - uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress); - uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress); - - TU_ASSERT(epnum < EP_MAX); - - xfer_ctl_t *xfer = XFER_CTL_BASE(epnum, dir); - xfer->max_size = tu_edpt_packet_size(desc_edpt); - - if (epnum != 0) { - if (tu_edpt_dir(desc_edpt->bEndpointAddress) == TUSB_DIR_OUT) { - EP_RX_CTRL(epnum) = USBHS_EP_R_AUTOTOG | USBHS_EP_R_RES_ACK; - } else { - EP_TX_LEN(epnum) = 0; - EP_TX_CTRL(epnum) = USBHS_EP_T_AUTOTOG | USBHS_EP_T_RES_NAK | USBHS_EP_T_TOG_0; - } - } - - return true; -} - -int usbd_ep_close(const uint8_t ep) { - (void)ep; - - return 0; -} -void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) { - (void)rhport; - - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - if (epnum == 0) { - if (dir == TUSB_DIR_OUT) { - USBHSD->UEP0_RX_CTRL = USBHS_EP_R_RES_STALL; - } else { - USBHSD->UEP0_TX_LEN = 0; - USBHSD->UEP0_TX_CTRL = USBHS_EP_T_RES_STALL; - } - } else { - if (dir == TUSB_DIR_OUT) { - EP_RX_CTRL(epnum) = (EP_RX_CTRL(epnum) & ~USBHS_EP_R_RES_MASK) | USBHS_EP_R_RES_STALL; - - } else { - EP_TX_CTRL(epnum) = (EP_TX_CTRL(epnum) & ~USBHS_EP_T_RES_MASK) | USBHS_EP_T_RES_STALL; - } - } -} - -void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { - (void)rhport; - - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - if (epnum == 0) { - if (dir == TUSB_DIR_OUT) { - USBHSD->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK; - } else { - } - } else { - if (dir == TUSB_DIR_OUT) { - EP_RX_CTRL(epnum) = (EP_RX_CTRL(epnum) & ~(USBHS_EP_R_RES_MASK | USBHS_EP_T_TOG_MASK)) | USBHS_EP_T_RES_ACK; - - } else { - EP_TX_CTRL(epnum) = (EP_TX_CTRL(epnum) & ~(USBHS_EP_T_RES_MASK | USBHS_EP_T_TOG_MASK)) | USBHS_EP_T_RES_NAK; - } - } -} - -bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes) { - (void)rhport; - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - xfer_ctl_t *xfer = XFER_CTL_BASE(epnum, dir); - xfer->buffer = buffer; - // xfer->ff = NULL; // TODO support dcd_edpt_xfer_fifo API - xfer->total_len = total_bytes; - xfer->queued_len = 0; - xfer->short_packet = false; - - // uint16_t num_packets = (total_bytes / xfer->max_size); - uint16_t short_packet_size = total_bytes % (xfer->max_size + 1); - - // Zero-size packet is special case. - if (short_packet_size == 0 || (total_bytes == 0)) { - xfer->short_packet = true; - } - - if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) { - if (!total_bytes) { - xfer->short_packet = true; - if (epnum == 0) { - USBHSD->UEP0_TX_LEN = 0; - USBHSD->UEP0_TX_CTRL = USBHS_EP_T_RES_ACK | (USBHS_Dev_Endp0_Tog ? USBHS_EP_T_TOG_1 : USBHS_EP_T_TOG_0); - USBHS_Dev_Endp0_Tog ^= 1; - } else { - EP_TX_LEN(epnum) = 0; - EP_TX_CTRL(epnum) = (EP_TX_CTRL(epnum) & ~(USBHS_EP_T_RES_MASK)) | USBHS_EP_T_RES_ACK; - } - } else { - if (epnum == 0) { - xfer->queued_len += short_packet_size; - memcpy(&EP0_DatabufHD[0], buffer, short_packet_size); - - USBHSD->UEP0_TX_LEN = short_packet_size; - USBHSD->UEP0_TX_CTRL = USBHS_EP_T_RES_ACK | (USBHS_Dev_Endp0_Tog ? USBHS_EP_T_TOG_1 : USBHS_EP_T_TOG_0); - USBHS_Dev_Endp0_Tog ^= 1; - } else { - xfer->queued_len += short_packet_size; - - EP_TX_DMA_ADDR(epnum) = (uint32_t)buffer; - USBHSD->ENDP_CONFIG |= (USBHS_EP0_T_EN << epnum); - EP_TX_LEN(epnum) = short_packet_size; - EP_TX_CTRL(epnum) = (EP_TX_CTRL(epnum) & ~(USBHS_EP_T_RES_MASK)) | USBHS_EP_T_RES_ACK; - } - } - } else { /* TUSB_DIR_OUT */ - if (epnum == 0) { - uint32_t read_count = USBHSD->RX_LEN; - read_count = TU_MIN(read_count, total_bytes); - - if ((total_bytes == 8)) { - read_count = 8; - memcpy(buffer, &EP0_DatabufHD[0], 8); - } else { - memcpy(buffer, &EP0_DatabufHD[0], read_count); - } - } else { - EP_RX_DMA_ADDR(epnum) = (uint32_t)xfer->buffer; - USBHSD->ENDP_CONFIG |= (USBHS_EP0_R_EN << epnum); - } - - // usbd_ep_read(ep_addr, buffer, total_bytes, &ret_bytes); - } - return true; -} - - -static void receive_packet(xfer_ctl_t *xfer, uint16_t xfer_size) { - // xfer->queued_len = xfer->total_len - remaining; - - uint16_t remaining = xfer->total_len - xfer->queued_len; - uint16_t to_recv_size; - - if (remaining <= xfer->max_size) { - // Avoid buffer overflow. - to_recv_size = (xfer_size > remaining) ? remaining : xfer_size; - } else { - // Room for full packet, choose recv_size based on what the microcontroller - // claims. - to_recv_size = (xfer_size > xfer->max_size) ? xfer->max_size : xfer_size; - } - - if (to_recv_size) { - } - - xfer->queued_len += xfer_size; - - // Per USB spec, a short OUT packet (including length 0) is always - // indicative of the end of a transfer (at least for ctl, bulk, int). - xfer->short_packet = (xfer_size < xfer->max_size); -} - -void dcd_int_handler(uint8_t rhport) { - (void)rhport; - - uint32_t end_num, rx_token; - uint8_t intflag = 0; - - intflag = USBHSD->INT_FG; - - if (intflag & USBHS_TRANSFER_FLAG) { - - end_num = (USBHSD->INT_ST) & MASK_UIS_ENDP; - rx_token = (((USBHSD->INT_ST) & MASK_UIS_TOKEN) >> 4) & 0x03; - - uint8_t endp = end_num | (rx_token == PID_IN ? TUSB_DIR_IN_MASK : 0); - - xfer_ctl_t *xfer = XFER_CTL_BASE(end_num, tu_edpt_dir(endp)); - - if (rx_token == PID_OUT) { - uint16_t rx_len = USBHSD->RX_LEN; - - receive_packet(xfer, rx_len); - - if (xfer->short_packet || (xfer->queued_len == xfer->total_len)) { - xfer->short_packet = false; - - dcd_event_xfer_complete(0, endp, xfer->queued_len, XFER_RESULT_SUCCESS, true); - } - - if (end_num == 0) { - USBHSD->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK | USBHS_EP_R_TOG_0; - } - - } else if (rx_token == PID_IN) { - if (xfer->short_packet || (xfer->queued_len == xfer->total_len)) { - xfer->short_packet = false; - xfer->total_len = 0; - dcd_event_xfer_complete(0, endp, xfer->queued_len, XFER_RESULT_SUCCESS, true); - - EP_TX_CTRL(end_num) = (EP_TX_CTRL(end_num) & ~(USBHS_EP_T_RES_MASK)) | USBHS_EP_T_RES_NAK; - - if (end_num == 0) { - } - } else { - dcd_edpt_xfer(0, endp, xfer->buffer + xfer->queued_len, xfer->total_len - xfer->queued_len); - } - } - - USBHSD->INT_FG = USBHS_TRANSFER_FLAG; /* Clear flag */ - } else if (intflag & USBHS_SETUP_FLAG) { - USBHS_Dev_Endp0_Tog = 1; - dcd_event_setup_received(0, EP0_DatabufHD, true); - - USBHSD->INT_FG = USBHS_SETUP_FLAG; /* Clear flag */ - } else if (intflag & USBHS_DETECT_FLAG) { - USBHS_Dev_Endp0_Tog = 1; - - xfer_status[0][TUSB_DIR_OUT].max_size = 64; - xfer_status[0][TUSB_DIR_IN].max_size = 64; - - dcd_event_bus_reset(0, TUSB_SPEED_HIGH, true); - - USBHSD->DEV_AD = 0; - USBHSD->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK | USBHS_EP_R_TOG_0; - - USBHSD->INT_FG = USBHS_DETECT_FLAG; /* Clear flag */ - } else if (intflag & USBHS_SUSPEND_FLAG) { - dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_SUSPEND }; - dcd_event_handler(&event, true); - - USBHSD->INT_FG = USBHS_SUSPEND_FLAG; /* Clear flag */ - } -} - -#endif diff --git a/src/portable/wch/dcd_ch32_usbhs.c b/src/portable/wch/dcd_ch32_usbhs.c new file mode 100644 index 000000000..1f1c0b876 --- /dev/null +++ b/src/portable/wch/dcd_ch32_usbhs.c @@ -0,0 +1,391 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022 Greg Davill + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "tusb_option.h" + +#if CFG_TUD_ENABLED && ((CFG_TUSB_MCU == OPT_MCU_CH32V307) || (CFG_TUSB_MCU == OPT_MCU_CH32F20X)) +#include "device/dcd.h" + +#include "ch32_usbhs_reg.h" + + +// Max number of bi-directional endpoints including EP0 +#define EP_MAX 16 + +typedef struct { + uint8_t *buffer; + // tu_fifo_t * ff; // TODO support dcd_edpt_xfer_fifo API + uint16_t total_len; + uint16_t queued_len; + uint16_t max_size; + bool short_packet; +} xfer_ctl_t; + +#define XFER_CTL_BASE(_ep, _dir) &xfer_status[_ep][_dir] +static xfer_ctl_t xfer_status[EP_MAX][2]; + +#define EP_TX_LEN(ep) *(volatile uint16_t *)((volatile uint16_t *)&(USBHSD->UEP0_TX_LEN) + (ep)*2) +#define EP_TX_CTRL(ep) *(volatile uint8_t *)((volatile uint8_t *)&(USBHSD->UEP0_TX_CTRL) + (ep)*4) +#define EP_RX_CTRL(ep) *(volatile uint8_t *)((volatile uint8_t *)&(USBHSD->UEP0_RX_CTRL) + (ep)*4) +#define EP_RX_MAX_LEN(ep) *(volatile uint16_t *)((volatile uint16_t *)&(USBHSD->UEP0_MAX_LEN) + (ep)*2) + +#define EP_TX_DMA_ADDR(ep) *(volatile uint32_t *)((volatile uint32_t *)&(USBHSD->UEP1_TX_DMA) + (ep - 1)) +#define EP_RX_DMA_ADDR(ep) *(volatile uint32_t *)((volatile uint32_t *)&(USBHSD->UEP1_RX_DMA) + (ep - 1)) + +/* Endpoint Buffer */ +TU_ATTR_ALIGNED(4) uint8_t EP0_DatabufHD[64]; // ep0(64) + +volatile uint8_t USBHS_Dev_Endp0_Tog = 0x01; + +void dcd_init(uint8_t rhport) { + (void)rhport; + + memset(&xfer_status, 0, sizeof(xfer_status)); + + USBHSD->HOST_CTRL = 0x00; + USBHSD->HOST_CTRL = USBHS_PHY_SUSPENDM; + + USBHSD->CONTROL = 0; + +#if TUD_OPT_HIGH_SPEED + USBHSD->CONTROL = USBHS_DMA_EN | USBHS_INT_BUSY_EN | USBHS_HIGH_SPEED; +#else + #error OPT_MODE_FULL_SPEED not currently supported on CH32 + USBHSD->CONTROL = USBHS_DMA_EN | USBHS_INT_BUSY_EN | USBHS_FULL_SPEED; +#endif + + USBHSD->INT_EN = 0; + USBHSD->INT_EN = USBHS_SETUP_ACT_EN | USBHS_TRANSFER_EN | USBHS_DETECT_EN | USBHS_SUSPEND_EN; + + /* ALL endpoint enable */ + USBHSD->ENDP_CONFIG = 0xffffffff; + + USBHSD->ENDP_CONFIG = USBHS_EP0_T_EN | USBHS_EP0_R_EN; + USBHSD->ENDP_TYPE = 0x00; + USBHSD->BUF_MODE = 0x00; + + USBHSD->UEP0_MAX_LEN = 64; + + USBHSD->UEP0_DMA = (uint32_t)EP0_DatabufHD; + + USBHSD->UEP0_TX_LEN = 0; + USBHSD->UEP0_TX_CTRL = USBHS_EP_T_RES_NAK; + USBHSD->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK; + + for (int ep = 1; ep < EP_MAX; ep++) { + EP_TX_LEN(ep) = 0; + EP_TX_CTRL(ep) = USBHS_EP_T_AUTOTOG | USBHS_EP_T_RES_NAK; + EP_RX_CTRL(ep) = USBHS_EP_R_AUTOTOG | USBHS_EP_R_RES_NAK; + + EP_RX_MAX_LEN(ep) = 512; + } + + USBHSD->DEV_AD = 0; + USBHSD->CONTROL |= USBHS_DEV_PU_EN; +} + +void dcd_int_enable(uint8_t rhport) { + (void)rhport; + + NVIC_EnableIRQ(USBHS_IRQn); +} + +void dcd_int_disable(uint8_t rhport) { + (void)rhport; + + NVIC_DisableIRQ(USBHS_IRQn); +} + +void dcd_edpt_close_all(uint8_t rhport) { + (void)rhport; +} + +void dcd_set_address(uint8_t rhport, uint8_t dev_addr) { + (void)dev_addr; + + // Response with zlp status + dcd_edpt_xfer(rhport, 0x80, NULL, 0); +} + +void dcd_remote_wakeup(uint8_t rhport) +{ + (void) rhport; +} + +void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const *request) { + (void)rhport; + + if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE && + request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD && + request->bRequest == TUSB_REQ_SET_ADDRESS) { + USBHSD->DEV_AD = (uint8_t)request->wValue; + } + + EP_TX_CTRL(0) = USBHS_EP_T_RES_NAK; + EP_RX_CTRL(0) = USBHS_EP_R_RES_ACK; +} + +bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_edpt) { + (void)rhport; + + uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress); + uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress); + + TU_ASSERT(epnum < EP_MAX); + + xfer_ctl_t *xfer = XFER_CTL_BASE(epnum, dir); + xfer->max_size = tu_edpt_packet_size(desc_edpt); + + if (epnum != 0) { + if (tu_edpt_dir(desc_edpt->bEndpointAddress) == TUSB_DIR_OUT) { + EP_RX_CTRL(epnum) = USBHS_EP_R_AUTOTOG | USBHS_EP_R_RES_ACK; + } else { + EP_TX_LEN(epnum) = 0; + EP_TX_CTRL(epnum) = USBHS_EP_T_AUTOTOG | USBHS_EP_T_RES_NAK | USBHS_EP_T_TOG_0; + } + } + + return true; +} + +int usbd_ep_close(const uint8_t ep) { + (void)ep; + + return 0; +} +void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) { + (void)rhport; + + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); + + if (epnum == 0) { + if (dir == TUSB_DIR_OUT) { + USBHSD->UEP0_RX_CTRL = USBHS_EP_R_RES_STALL; + } else { + USBHSD->UEP0_TX_LEN = 0; + USBHSD->UEP0_TX_CTRL = USBHS_EP_T_RES_STALL; + } + } else { + if (dir == TUSB_DIR_OUT) { + EP_RX_CTRL(epnum) = (EP_RX_CTRL(epnum) & ~USBHS_EP_R_RES_MASK) | USBHS_EP_R_RES_STALL; + + } else { + EP_TX_CTRL(epnum) = (EP_TX_CTRL(epnum) & ~USBHS_EP_T_RES_MASK) | USBHS_EP_T_RES_STALL; + } + } +} + +void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { + (void)rhport; + + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); + + if (epnum == 0) { + if (dir == TUSB_DIR_OUT) { + USBHSD->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK; + } else { + } + } else { + if (dir == TUSB_DIR_OUT) { + EP_RX_CTRL(epnum) = (EP_RX_CTRL(epnum) & ~(USBHS_EP_R_RES_MASK | USBHS_EP_T_TOG_MASK)) | USBHS_EP_T_RES_ACK; + + } else { + EP_TX_CTRL(epnum) = (EP_TX_CTRL(epnum) & ~(USBHS_EP_T_RES_MASK | USBHS_EP_T_TOG_MASK)) | USBHS_EP_T_RES_NAK; + } + } +} + +bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes) { + (void)rhport; + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); + + xfer_ctl_t *xfer = XFER_CTL_BASE(epnum, dir); + xfer->buffer = buffer; + // xfer->ff = NULL; // TODO support dcd_edpt_xfer_fifo API + xfer->total_len = total_bytes; + xfer->queued_len = 0; + xfer->short_packet = false; + + // uint16_t num_packets = (total_bytes / xfer->max_size); + uint16_t short_packet_size = total_bytes % (xfer->max_size + 1); + + // Zero-size packet is special case. + if (short_packet_size == 0 || (total_bytes == 0)) { + xfer->short_packet = true; + } + + if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) { + if (!total_bytes) { + xfer->short_packet = true; + if (epnum == 0) { + USBHSD->UEP0_TX_LEN = 0; + USBHSD->UEP0_TX_CTRL = USBHS_EP_T_RES_ACK | (USBHS_Dev_Endp0_Tog ? USBHS_EP_T_TOG_1 : USBHS_EP_T_TOG_0); + USBHS_Dev_Endp0_Tog ^= 1; + } else { + EP_TX_LEN(epnum) = 0; + EP_TX_CTRL(epnum) = (EP_TX_CTRL(epnum) & ~(USBHS_EP_T_RES_MASK)) | USBHS_EP_T_RES_ACK; + } + } else { + if (epnum == 0) { + xfer->queued_len += short_packet_size; + memcpy(&EP0_DatabufHD[0], buffer, short_packet_size); + + USBHSD->UEP0_TX_LEN = short_packet_size; + USBHSD->UEP0_TX_CTRL = USBHS_EP_T_RES_ACK | (USBHS_Dev_Endp0_Tog ? USBHS_EP_T_TOG_1 : USBHS_EP_T_TOG_0); + USBHS_Dev_Endp0_Tog ^= 1; + } else { + xfer->queued_len += short_packet_size; + + EP_TX_DMA_ADDR(epnum) = (uint32_t)buffer; + USBHSD->ENDP_CONFIG |= (USBHS_EP0_T_EN << epnum); + EP_TX_LEN(epnum) = short_packet_size; + EP_TX_CTRL(epnum) = (EP_TX_CTRL(epnum) & ~(USBHS_EP_T_RES_MASK)) | USBHS_EP_T_RES_ACK; + } + } + } else { /* TUSB_DIR_OUT */ + if (epnum == 0) { + uint32_t read_count = USBHSD->RX_LEN; + read_count = TU_MIN(read_count, total_bytes); + + if ((total_bytes == 8)) { + read_count = 8; + memcpy(buffer, &EP0_DatabufHD[0], 8); + } else { + memcpy(buffer, &EP0_DatabufHD[0], read_count); + } + } else { + EP_RX_DMA_ADDR(epnum) = (uint32_t)xfer->buffer; + USBHSD->ENDP_CONFIG |= (USBHS_EP0_R_EN << epnum); + } + + // usbd_ep_read(ep_addr, buffer, total_bytes, &ret_bytes); + } + return true; +} + + +static void receive_packet(xfer_ctl_t *xfer, uint16_t xfer_size) { + // xfer->queued_len = xfer->total_len - remaining; + + uint16_t remaining = xfer->total_len - xfer->queued_len; + uint16_t to_recv_size; + + if (remaining <= xfer->max_size) { + // Avoid buffer overflow. + to_recv_size = (xfer_size > remaining) ? remaining : xfer_size; + } else { + // Room for full packet, choose recv_size based on what the microcontroller + // claims. + to_recv_size = (xfer_size > xfer->max_size) ? xfer->max_size : xfer_size; + } + + if (to_recv_size) { + } + + xfer->queued_len += xfer_size; + + // Per USB spec, a short OUT packet (including length 0) is always + // indicative of the end of a transfer (at least for ctl, bulk, int). + xfer->short_packet = (xfer_size < xfer->max_size); +} + +void dcd_int_handler(uint8_t rhport) { + (void)rhport; + + uint32_t end_num, rx_token; + uint8_t intflag = 0; + + intflag = USBHSD->INT_FG; + + if (intflag & USBHS_TRANSFER_FLAG) { + + end_num = (USBHSD->INT_ST) & MASK_UIS_ENDP; + rx_token = (((USBHSD->INT_ST) & MASK_UIS_TOKEN) >> 4) & 0x03; + + uint8_t endp = end_num | (rx_token == PID_IN ? TUSB_DIR_IN_MASK : 0); + + xfer_ctl_t *xfer = XFER_CTL_BASE(end_num, tu_edpt_dir(endp)); + + if (rx_token == PID_OUT) { + uint16_t rx_len = USBHSD->RX_LEN; + + receive_packet(xfer, rx_len); + + if (xfer->short_packet || (xfer->queued_len == xfer->total_len)) { + xfer->short_packet = false; + + dcd_event_xfer_complete(0, endp, xfer->queued_len, XFER_RESULT_SUCCESS, true); + } + + if (end_num == 0) { + USBHSD->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK | USBHS_EP_R_TOG_0; + } + + } else if (rx_token == PID_IN) { + if (xfer->short_packet || (xfer->queued_len == xfer->total_len)) { + xfer->short_packet = false; + xfer->total_len = 0; + dcd_event_xfer_complete(0, endp, xfer->queued_len, XFER_RESULT_SUCCESS, true); + + EP_TX_CTRL(end_num) = (EP_TX_CTRL(end_num) & ~(USBHS_EP_T_RES_MASK)) | USBHS_EP_T_RES_NAK; + + if (end_num == 0) { + } + } else { + dcd_edpt_xfer(0, endp, xfer->buffer + xfer->queued_len, xfer->total_len - xfer->queued_len); + } + } + + USBHSD->INT_FG = USBHS_TRANSFER_FLAG; /* Clear flag */ + } else if (intflag & USBHS_SETUP_FLAG) { + USBHS_Dev_Endp0_Tog = 1; + dcd_event_setup_received(0, EP0_DatabufHD, true); + + USBHSD->INT_FG = USBHS_SETUP_FLAG; /* Clear flag */ + } else if (intflag & USBHS_DETECT_FLAG) { + USBHS_Dev_Endp0_Tog = 1; + + xfer_status[0][TUSB_DIR_OUT].max_size = 64; + xfer_status[0][TUSB_DIR_IN].max_size = 64; + + dcd_event_bus_reset(0, TUSB_SPEED_HIGH, true); + + USBHSD->DEV_AD = 0; + USBHSD->UEP0_RX_CTRL = USBHS_EP_R_RES_ACK | USBHS_EP_R_TOG_0; + + USBHSD->INT_FG = USBHS_DETECT_FLAG; /* Clear flag */ + } else if (intflag & USBHS_SUSPEND_FLAG) { + dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_SUSPEND }; + dcd_event_handler(&event, true); + + USBHSD->INT_FG = USBHS_SUSPEND_FLAG; /* Clear flag */ + } +} + +#endif diff --git a/src/tusb_option.h b/src/tusb_option.h index a41f5a07e..f4b1a1dd4 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -169,6 +169,7 @@ // WCH #define OPT_MCU_CH32V307 2200 ///< WCH CH32V307 +#define OPT_MCU_CH32F20X 2210 ///< WCH CH32F20x // NXP LPC MCX diff --git a/tools/get_deps.py b/tools/get_deps.py index 1fac291a3..af3043e4e 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -164,6 +164,9 @@ deps_optional = { 'hw/mcu/wch/ch32v307': ['https://github.com/openwch/ch32v307.git', '17761f5cf9dbbf2dcf665b7c04934188add20082', 'ch32v307'], + 'hw/mcu/wch/ch32f20x': ['https://github.com/openwch/ch32f20x.git', + '77c4095087e5ed2c548ec9058e655d0b8757663b', + 'ch32f20x'], 'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git', '20285262657d1b482d132d20d755c8c330d55c1f', 'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x' diff --git a/tools/iar_template.ipcf b/tools/iar_template.ipcf index 4919fe7b4..c3683c3d7 100644 --- a/tools/iar_template.ipcf +++ b/tools/iar_template.ipcf @@ -164,8 +164,8 @@ $TUSB_DIR$/src/portable/valentyusb/eptri/dcd_eptri.c - - $TUSB_DIR$/src/portable/wch/ch32v307/dcd_usbhs.c + + $TUSB_DIR$/src/portable/wch/dcd_ch32_usbhs.c $TUSB_DIR$/src/typec/usbc.c -- cgit v1.3.1 From 27a2c8cba4dc7c56509bb3d9b6415a6fe8f638ac Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 18 Oct 2023 18:43:07 +0700 Subject: adding nulceo stm32u5a5, fix clock configure issue dwc2 core stuck at reset --- hw/bsp/stm32u5/boards/stm32u575eval/board.h | 15 +- hw/bsp/stm32u5/boards/stm32u575nucleo/board.h | 15 +- .../boards/stm32u5a5nucleo/STM32U5A5ZJTXQ_FLASH.ld | 167 ++++++++++ hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.cmake | 2 +- hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h | 57 ++-- hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.mk | 2 +- .../stm32u5a5nucleo/cubemx/stm32u5a5nucleo.ioc | 352 +++++++++++++++++++++ hw/bsp/stm32u5/family.c | 53 +++- src/common/tusb_mcu.h | 13 +- src/portable/synopsys/dwc2/dwc2_stm32.h | 10 +- src/tusb_option.h | 6 +- tools/get_deps.py | 21 +- 12 files changed, 643 insertions(+), 70 deletions(-) create mode 100644 hw/bsp/stm32u5/boards/stm32u5a5nucleo/STM32U5A5ZJTXQ_FLASH.ld create mode 100644 hw/bsp/stm32u5/boards/stm32u5a5nucleo/cubemx/stm32u5a5nucleo.ioc (limited to 'src/common') diff --git a/hw/bsp/stm32u5/boards/stm32u575eval/board.h b/hw/bsp/stm32u5/boards/stm32u575eval/board.h index 5562b95a8..bd91502af 100644 --- a/hw/bsp/stm32u5/boards/stm32u575eval/board.h +++ b/hw/bsp/stm32u5/boards/stm32u575eval/board.h @@ -55,12 +55,10 @@ extern "C" // RCC Clock //--------------------------------------------------------------------+ -static inline void board_clock_init(void) -{ - - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; +static void SystemClock_Config(void) { + RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; + RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; + RCC_PeriphCLKInitTypeDef PeriphClkInit = { 0 }; /* Enable Power Clock*/ __HAL_RCC_PWR_CLK_ENABLE(); @@ -94,7 +92,8 @@ static inline void board_clock_init(void) /** Initializes the CPU, AHB and APB buses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; + RCC_ClkInitStruct.ClockType = + RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; @@ -104,6 +103,8 @@ static inline void board_clock_init(void) HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4); } +static void SystemPower_Config(void) { +} #ifdef __cplusplus } diff --git a/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h index 54a6d4cd7..6d244d418 100644 --- a/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h +++ b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h @@ -54,12 +54,10 @@ extern "C" // RCC Clock //--------------------------------------------------------------------+ -static inline void board_clock_init(void) -{ - - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; +static void SystemClock_Config(void) { + RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; + RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; + RCC_PeriphCLKInitTypeDef PeriphClkInit = { 0 }; /* Enable Power Clock */ __HAL_RCC_PWR_CLK_ENABLE(); @@ -93,7 +91,8 @@ static inline void board_clock_init(void) /** Initializes the CPU, AHB and APB buses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; + RCC_ClkInitStruct.ClockType = + RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; @@ -103,6 +102,8 @@ static inline void board_clock_init(void) HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4); } +static void SystemPower_Config(void) { +} #ifdef __cplusplus } diff --git a/hw/bsp/stm32u5/boards/stm32u5a5nucleo/STM32U5A5ZJTXQ_FLASH.ld b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/STM32U5A5ZJTXQ_FLASH.ld new file mode 100644 index 000000000..8aa68a6a6 --- /dev/null +++ b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/STM32U5A5ZJTXQ_FLASH.ld @@ -0,0 +1,167 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Author : STM32CubeIDE +** +** Abstract : Linker script for STM32U5A5xJ Device from STM32U5 series +** 4096Kbytes FLASH +** 2512Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +** Copyright (c) 2023 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 2496K + SRAM4 (xrw) : ORIGIN = 0x28000000, LENGTH = 16K + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 4096K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + KEEP(*(.isr_vector)) /* Startup code */ + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + } >FLASH + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } >FLASH + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.cmake b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.cmake index eea16213b..24d4ef95a 100644 --- a/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.cmake +++ b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.cmake @@ -1,7 +1,7 @@ set(MCU_VARIANT stm32u5a5xx) set(JLINK_DEVICE stm32u5a5zj) -set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/STM32U5A9xx_FLASH.ld) +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32U5A5ZJTXQ_FLASH.ld) function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC diff --git a/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h index 54a6d4cd7..37b008727 100644 --- a/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h +++ b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h @@ -54,46 +54,44 @@ extern "C" // RCC Clock //--------------------------------------------------------------------+ -static inline void board_clock_init(void) -{ - - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; +static void SystemClock_Config(void) { + RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; + RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; - /* Enable Power Clock */ __HAL_RCC_PWR_CLK_ENABLE(); + HAL_PWREx_EnableVddA(); /** Configure the main internal regulator output voltage - */ - HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { + Error_Handler(); + } /** Initializes the CPU, AHB and APB buses clocks */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1; RCC_OscInitStruct.PLL.PLLM = 1; - RCC_OscInitStruct.PLL.PLLN = 10; - RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLN = 20; + RCC_OscInitStruct.PLL.PLLP = 8; RCC_OscInitStruct.PLL.PLLQ = 2; - RCC_OscInitStruct.PLL.PLLR = 1; + RCC_OscInitStruct.PLL.PLLR = 2; RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_1; RCC_OscInitStruct.PLL.PLLFRACN = 0; - HAL_RCC_OscConfig(&RCC_OscInitStruct); - - PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_CLK48; - PeriphClkInit.IclkClockSelection = RCC_CLK48CLKSOURCE_HSI48; - - HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit); + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } /** Initializes the CPU, AHB and APB buses clocks - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 + | RCC_CLOCKTYPE_PCLK3; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; @@ -103,6 +101,19 @@ static inline void board_clock_init(void) HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4); } +static void SystemPower_Config(void) { + HAL_PWREx_EnableVddIO2(); + + /* + * Switch to SMPS regulator instead of LDO + */ + if (HAL_PWREx_ConfigSupply(PWR_SMPS_SUPPLY) != HAL_OK) { + Error_Handler(); + } +/* USER CODE BEGIN PWR */ +/* USER CODE END PWR */ +} + #ifdef __cplusplus } diff --git a/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.mk b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.mk index 48a4206a6..13025efa6 100644 --- a/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.mk +++ b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.mk @@ -2,7 +2,7 @@ CFLAGS += \ -DSTM32U5A5xx \ # All source paths should be relative to the top level. -LD_FILE = ${ST_CMSIS}/Source/Templates/gcc/linker/STM32U5A9xx_FLASH.ld +LD_FILE = ${BOARD_PATH}/STM32U5A5ZJTXQ_FLASH.ld SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u5a5xx.s diff --git a/hw/bsp/stm32u5/boards/stm32u5a5nucleo/cubemx/stm32u5a5nucleo.ioc b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/cubemx/stm32u5a5nucleo.ioc new file mode 100644 index 000000000..289734040 --- /dev/null +++ b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/cubemx/stm32u5a5nucleo.ioc @@ -0,0 +1,352 @@ +#MicroXplorer Configuration settings - do not modify +ADC1.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_2 +ADC1.IPParameters=Rank-1\#ChannelRegularConversion,master,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,OffsetNumber-1\#ChannelRegularConversion,MonitoredBy-1\#ChannelRegularConversion,NbrOfConversionFlag +ADC1.MonitoredBy-1\#ChannelRegularConversion=__NULL +ADC1.NbrOfConversionFlag=1 +ADC1.OffsetNumber-1\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.Rank-1\#ChannelRegularConversion=1 +ADC1.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLETIME_5CYCLE +ADC1.master=1 +CAD.formats= +CAD.pinconfig= +CAD.provider= +CORTEX_M33_NS.userName=CORTEX_M33 +File.Version=6 +GPDMA1.DIRECTION_GPDMACH0=DMA_MEMORY_TO_PERIPH +GPDMA1.DIRECTION_GPDMACH3=DMA_MEMORY_TO_PERIPH +GPDMA1.IPHANDLE_GPDMACH0-SIMPLEREQUEST_GPDMACH0=__NULL +GPDMA1.IPHANDLE_GPDMACH3-SIMPLEREQUEST_GPDMACH3=__NULL +GPDMA1.IPHANDLE_GPDMACH5-SIMPLEREQUEST_GPDMACH5=__NULL +GPDMA1.IPParameters=IPHANDLE_GPDMACH5-SIMPLEREQUEST_GPDMACH5,REQUEST_GPDMACH5,IPHANDLE_GPDMACH3-SIMPLEREQUEST_GPDMACH3,REQUEST_GPDMACH3,DIRECTION_GPDMACH3,IPHANDLE_GPDMACH0-SIMPLEREQUEST_GPDMACH0,REQUEST_GPDMACH0,DIRECTION_GPDMACH0,SRCINC_GPDMACH0 +GPDMA1.REQUEST_GPDMACH0=GPDMA1_REQUEST_USART1_TX +GPDMA1.REQUEST_GPDMACH3=GPDMA1_REQUEST_UCPD1_TX +GPDMA1.REQUEST_GPDMACH5=GPDMA1_REQUEST_UCPD1_RX +GPDMA1.SRCINC_GPDMACH0=DMA_SINC_INCREMENTED +GPIO.groupedBy=Group By Peripherals +KeepUserPlacement=false +MMTAppReg1.MEMORYMAP.AP=RW_priv_only +MMTAppReg1.MEMORYMAP.AppRegionName=RAM +MMTAppReg1.MEMORYMAP.ContextName=CortexM33 +MMTAppReg1.MEMORYMAP.CoreName=ARM Cortex-M33 +MMTAppReg1.MEMORYMAP.DefaultDataRegion=true +MMTAppReg1.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,DefaultDataRegion,ContextName,Name,AP +MMTAppReg1.MEMORYMAP.Name=RAM +MMTAppReg1.MEMORYMAP.Size=2555904 +MMTAppReg1.MEMORYMAP.StartAddress=0x20000000 +MMTAppReg2.MEMORYMAP.AppRegionName=RAM Reserved Alias Region +MMTAppReg2.MEMORYMAP.CoreName=ARM Cortex-M33 +MMTAppReg2.MEMORYMAP.DefaultDataRegion=false +MMTAppReg2.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,DefaultDataRegion,ReservedRegion,Name +MMTAppReg2.MEMORYMAP.Name=RAM Reserved Alias Region +MMTAppReg2.MEMORYMAP.ReservedRegion=true +MMTAppReg2.MEMORYMAP.Size=2555904 +MMTAppReg2.MEMORYMAP.StartAddress=0x0A000000 +MMTAppReg3.MEMORYMAP.AP=RO_priv_only +MMTAppReg3.MEMORYMAP.AppRegionName=FLASH +MMTAppReg3.MEMORYMAP.Cacheability=WTRA +MMTAppReg3.MEMORYMAP.ContextName=CortexM33 +MMTAppReg3.MEMORYMAP.CoreName=ARM Cortex-M33 +MMTAppReg3.MEMORYMAP.DefaultCodeRegion=true +MMTAppReg3.MEMORYMAP.DefaultDataRegion=false +MMTAppReg3.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,DefaultDataRegion,MemType,ContextName,Name,AP,Cacheability,DefaultCodeRegion +MMTAppReg3.MEMORYMAP.MemType=ROM +MMTAppReg3.MEMORYMAP.Name=FLASH +MMTAppReg3.MEMORYMAP.Size=4194304 +MMTAppReg3.MEMORYMAP.StartAddress=0x08000000 +MMTAppRegionsCount=3 +MMTConfigApplied=false +Mcu.CPN=STM32U5A5ZJT6Q +Mcu.ContextProject=TrustZoneDisabled +Mcu.Family=STM32U5 +Mcu.IP0=ADC1 +Mcu.IP1=CORTEX_M33_NS +Mcu.IP10=UCPD1 +Mcu.IP11=USART1 +Mcu.IP12=USBPD +Mcu.IP13=USBX +Mcu.IP14=USB_OTG_HS +Mcu.IP2=GPDMA1 +Mcu.IP3=ICACHE +Mcu.IP4=MEMORYMAP +Mcu.IP5=NVIC +Mcu.IP6=PWR +Mcu.IP7=RCC +Mcu.IP8=SYS +Mcu.IP9=THREADX +Mcu.IPNb=15 +Mcu.Name=STM32U5A5ZJTxQ +Mcu.Package=LQFP144 +Mcu.Pin0=PH0-OSC_IN (PH0) +Mcu.Pin1=PH1-OSC_OUT (PH1) +Mcu.Pin10=VP_GPDMA1_VS_GPDMACH0 +Mcu.Pin11=VP_GPDMA1_VS_GPDMACH3 +Mcu.Pin12=VP_GPDMA1_VS_GPDMACH5 +Mcu.Pin13=VP_ICACHE_VS_ICACHE +Mcu.Pin14=VP_PWR_VS_DBSignals +Mcu.Pin15=VP_PWR_VS_SECSignals +Mcu.Pin16=VP_PWR_VS_LPOM +Mcu.Pin17=VP_SYS_VS_tim6 +Mcu.Pin18=VP_THREADX_VS_RTOSJjThreadXJjCoreJjDefault +Mcu.Pin19=VP_USBPD_VS_USBPD1 +Mcu.Pin2=PC1 +Mcu.Pin20=VP_USBPD_VS_PD3TYPEC +Mcu.Pin21=VP_USBPD_VS_usbpd_tim2 +Mcu.Pin22=VP_USBPD_VS_usbpd_usb_cohabitation +Mcu.Pin23=VP_USBX_Core_System +Mcu.Pin24=VP_USBX_UX Device CoreStack_HS +Mcu.Pin25=VP_USBX_UX Device Controller_HS +Mcu.Pin26=VP_USBX_UX Device CDC ACM Class_HS +Mcu.Pin27=VP_MEMORYMAP_VS_MEMORYMAP +Mcu.Pin3=PB15 +Mcu.Pin4=PG2 +Mcu.Pin5=PA9 +Mcu.Pin6=PA10 +Mcu.Pin7=PA11 +Mcu.Pin8=PA12 +Mcu.Pin9=PA15 (JTDI) +Mcu.PinsNb=28 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32U5A5ZJTxQ +MxCube.Version=6.9.2 +MxDb.Version=DB.6.0.92 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.ForceEnableDMAVector=true +NVIC.GPDMA1_Channel0_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true\:true +NVIC.GPDMA1_Channel3_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true\:true +NVIC.GPDMA1_Channel5_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true\:true +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.OTG_HS_IRQn=true\:7\:0\:true\:false\:true\:false\:true\:true\:true +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false +NVIC.SavedPendsvIrqHandlerGenerated=true +NVIC.SavedSvcallIrqHandlerGenerated=true +NVIC.SavedSystickIrqHandlerGenerated=true +NVIC.SysTick_IRQn=true\:0\:0\:true\:false\:false\:false\:false\:true\:false +NVIC.TIM6_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true +NVIC.TimeBase=TIM6_IRQn +NVIC.TimeBaseIP=TIM6 +NVIC.UCPD1_IRQn=true\:5\:0\:true\:false\:true\:false\:true\:false\:true +NVIC.USART1_IRQn=true\:6\:0\:true\:false\:true\:false\:true\:true\:true +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +PA10.GPIOParameters=GPIO_Speed,GPIO_PuPd +PA10.GPIO_PuPd=GPIO_PULLUP +PA10.GPIO_Speed=GPIO_SPEED_FREQ_HIGH +PA10.Mode=Asynchronous +PA10.Signal=USART1_RX +PA11.GPIOParameters=GPIO_Speed +PA11.GPIO_Speed=GPIO_SPEED_FREQ_LOW +PA11.Mode=Internal_Phy_Device +PA11.Signal=USB_OTG_HS_DM +PA12.GPIOParameters=GPIO_Speed +PA12.GPIO_Speed=GPIO_SPEED_FREQ_LOW +PA12.Mode=Internal_Phy_Device +PA12.Signal=USB_OTG_HS_DP +PA15\ (JTDI).Mode=Sink_AllSignals +PA15\ (JTDI).Signal=UCPD1_CC1 +PA9.GPIOParameters=GPIO_Speed,GPIO_PuPd +PA9.GPIO_PuPd=GPIO_PULLUP +PA9.GPIO_Speed=GPIO_SPEED_FREQ_HIGH +PA9.Mode=Asynchronous +PA9.Signal=USART1_TX +PB15.Mode=Sink_AllSignals +PB15.Signal=UCPD1_CC2 +PC1.Mode=IN2-Single-Ended +PC1.Signal=ADC1_IN2 +PG2.GPIOParameters=GPIO_Label +PG2.GPIO_Label=LED_RED +PG2.Locked=true +PG2.Signal=GPIO_Output +PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator +PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN +PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator +PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT +PWR.IPParameters=PowerMode +PWR.PowerMode=PWR_SMPS_SUPPLY +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=false +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32U5A5ZJTxQ +ProjectManager.Example=Ux_Device_CDC_ACM +ProjectManager.ExampleSource=MxCubeFw +ProjectManager.FirmwarePackage=STM32Cube FW_U5 V1.3.0 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LPBAM.generateCode= +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=1 +ProjectManager.MainLocation=Core/Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=stm32u5a5nucleo.ioc +ProjectManager.ProjectName=stm32u5a5nucleo +ProjectManager.ProjectStructure= +ProjectManager.RegisterCallBack= +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=STM32CubeIDE +ProjectManager.ToolChainLocation= +ProjectManager.UAScriptAfterPath= +ProjectManager.UAScriptBeforePath= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_GPDMA1_Init-GPDMA1-false-HAL-true,4-MX_ICACHE_Init-ICACHE-false-HAL-true,5-MX_USART1_UART_Init-USART1-false-HAL-false,6-MX_UCPD1_Init-UCPD1-false-LL-true,7-MX_USB_OTG_HS_PCD_Init-USB_OTG_HS-true-HAL-false,8-MX_USBPD_Init-USBPD-false-HAL-false,9-MX_USBX_Init-USBX-false-HAL-false,10-MX_ADC1_Init-ADC1-false-HAL-true,11-MX_MEMORYMAP_Init-MEMORYMAP-false-HAL-true,0-MX_CORTEX_M33_NS_Init-CORTEX_M33_NS-false-HAL-true,0-MX_PWR_Init-PWR-false-HAL-true +RCC.ADCFreq_Value=16000000 +RCC.ADF1Freq_Value=160000000 +RCC.AHBFreq_Value=160000000 +RCC.APB1Freq_Value=160000000 +RCC.APB1TimFreq_Value=160000000 +RCC.APB2Freq_Value=160000000 +RCC.APB2TimFreq_Value=160000000 +RCC.APB3Freq_Value=160000000 +RCC.CK48Freq_Value=48000000 +RCC.CRSFreq_Value=48000000 +RCC.CortexFreq_Value=160000000 +RCC.DACCLockSelectionVirtual=RCC_DAC1CLKSOURCE_LSI +RCC.DACFreq_Value=32000 +RCC.EPOD_VALUE=16000000 +RCC.FCLKCortexFreq_Value=160000000 +RCC.FDCANFreq_Value=160000000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=160000000 +RCC.HSE_VALUE=16000000 +RCC.HSI48_VALUE=48000000 +RCC.HSI_VALUE=16000000 +RCC.I2C1Freq_Value=160000000 +RCC.I2C2Freq_Value=160000000 +RCC.I2C3Freq_Value=160000000 +RCC.I2C4Freq_Value=160000000 +RCC.I2C5Freq_Value=160000000 +RCC.I2C6Freq_Value=160000000 +RCC.IPParameters=ADCFreq_Value,ADF1Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,APB3Freq_Value,CK48Freq_Value,CRSFreq_Value,CortexFreq_Value,DACCLockSelectionVirtual,DACFreq_Value,EPOD_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2C5Freq_Value,I2C6Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSIDIV_VALUE,LSI_VALUE,MCO1PinFreq_Value,MDF1Freq_Value,MSIClockRange,MSI_VALUE,OCTOSPIMFreq_Value,PLL1P,PLL2FRACN,PLL2PoutputFreq_Value,PLL2QoutputFreq_Value,PLL2RoutputFreq_Value,PLL3FRACN,PLL3PoutputFreq_Value,PLL3QoutputFreq_Value,PLL3RoutputFreq_Value,PLLFRACN,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSourceVirtual,RNGFreq_Value,SAESFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SPI1Freq_Value,SPI2Freq_Value,SPI3Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBPHYCLockSelection,USBPHYFreq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOPLL2OutputFreq_Value,VCOPLL3OutputFreq_Value +RCC.LPTIM2Freq_Value=160000000 +RCC.LPUART1Freq_Value=160000000 +RCC.LSCOPinFreq_Value=32000 +RCC.LSE_VALUE=32768 +RCC.LSIDIV_VALUE=32000 +RCC.LSI_VALUE=32000 +RCC.MCO1PinFreq_Value=160000000 +RCC.MDF1Freq_Value=160000000 +RCC.MSIClockRange=RCC_MSIRANGE_0 +RCC.MSI_VALUE=48000000 +RCC.OCTOSPIMFreq_Value=160000000 +RCC.PLL1P=8 +RCC.PLL2FRACN=0 +RCC.PLL2PoutputFreq_Value=3096000000 +RCC.PLL2QoutputFreq_Value=3096000000 +RCC.PLL2RoutputFreq_Value=3096000000 +RCC.PLL3FRACN=0 +RCC.PLL3PoutputFreq_Value=3096000000 +RCC.PLL3QoutputFreq_Value=3096000000 +RCC.PLL3RoutputFreq_Value=3096000000 +RCC.PLLFRACN=0 +RCC.PLLN=20 +RCC.PLLPoutputFreq_Value=40000000 +RCC.PLLQoutputFreq_Value=160000000 +RCC.PLLRCLKFreq_Value=160000000 +RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE +RCC.RNGFreq_Value=48000000 +RCC.SAESFreq_Value=48000000 +RCC.SAI1Freq_Value=3096000000 +RCC.SAI2Freq_Value=3096000000 +RCC.SDMMCFreq_Value=40000000 +RCC.SPI1Freq_Value=160000000 +RCC.SPI2Freq_Value=160000000 +RCC.SPI3Freq_Value=160000000 +RCC.SYSCLKFreq_VALUE=160000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.UART4Freq_Value=160000000 +RCC.UART5Freq_Value=160000000 +RCC.USART1Freq_Value=160000000 +RCC.USART2Freq_Value=160000000 +RCC.USART3Freq_Value=160000000 +RCC.USART6Freq_Value=160000000 +RCC.USBPHYCLockSelection=RCC_USBPHYCLKSOURCE_HSE +RCC.USBPHYFreq_Value=16000000 +RCC.VCOInput2Freq_Value=48000000 +RCC.VCOInput3Freq_Value=48000000 +RCC.VCOInputFreq_Value=16000000 +RCC.VCOOutputFreq_Value=320000000 +RCC.VCOPLL2OutputFreq_Value=6192000000 +RCC.VCOPLL3OutputFreq_Value=6192000000 +USART1.IPParameters=VirtualMode-Asynchronous +USART1.VirtualMode-Asynchronous=VM_ASYNC +USBX.BSP.number=1 +USBX.Core_System=1 +USBX.IPParameters=Core_System,UX_Device_CoreStack,UX_Device_Controller,UX_DEVICE_CDC_ACM,USBD_CDCACM_EPIN_ADDR,USBD_CDCACM_EPOUT_HS_MPS,USBD_CDCACM_EPIN_HS_MPS,UX_DEVICE_APP_MEM_POOL_SIZE,USBD_PRODUCT_STRING,UX_SLAVE_REQUEST_DATA_MAX_LENGTH,USBX_DEVICE_SYS_SIZE,USBD_PID,USBD_SERIAL_NUMBER,UX_SLAVE_REQUEST_CONTROL_MAX_LENGTH,USBD_CDCACM_EPINCMD_ADDR,MAX_POWER_IN_MILLI_AMPER +USBX.MAX_POWER_IN_MILLI_AMPER=0 +USBX.USBD_CDCACM_EPINCMD_ADDR=2 +USBX.USBD_CDCACM_EPIN_ADDR=1 +USBX.USBD_CDCACM_EPIN_HS_MPS=512 +USBX.USBD_CDCACM_EPOUT_HS_MPS=512 +USBX.USBD_PID=22336 +USBX.USBD_PRODUCT_STRING=STM32 Virtual ComPort +USBX.USBD_SERIAL_NUMBER=CDC_ACM001 +USBX.USBX_DEVICE_SYS_SIZE=4*1024 +USBX.UX_DEVICE_APP_MEM_POOL_SIZE=8192 +USBX.UX_DEVICE_CDC_ACM=1 +USBX.UX_Device_Controller=1 +USBX.UX_Device_CoreStack=1 +USBX.UX_SLAVE_REQUEST_CONTROL_MAX_LENGTH=256 +USBX.UX_SLAVE_REQUEST_DATA_MAX_LENGTH=512 +USBX0.BSP.STBoard=false +USBX0.BSP.api=Unknown +USBX0.BSP.component= +USBX0.BSP.condition= +USBX0.BSP.instance=USB_OTG_HS +USBX0.BSP.ip=USB_OTG_HS +USBX0.BSP.mode=Device_Only +USBX0.BSP.name=USBDevice +USBX0.BSP.semaphore= +USBX0.BSP.solution=USB_OTG_HS +USB_OTG_HS.IPParameters=VirtualMode +USB_OTG_HS.VirtualMode=Device_HS +VP_GPDMA1_VS_GPDMACH0.Mode=SIMPLEREQUEST_GPDMACH0 +VP_GPDMA1_VS_GPDMACH0.Signal=GPDMA1_VS_GPDMACH0 +VP_GPDMA1_VS_GPDMACH3.Mode=SIMPLEREQUEST_GPDMACH3 +VP_GPDMA1_VS_GPDMACH3.Signal=GPDMA1_VS_GPDMACH3 +VP_GPDMA1_VS_GPDMACH5.Mode=SIMPLEREQUEST_GPDMACH5 +VP_GPDMA1_VS_GPDMACH5.Signal=GPDMA1_VS_GPDMACH5 +VP_ICACHE_VS_ICACHE.Mode=DirectMappedCache +VP_ICACHE_VS_ICACHE.Signal=ICACHE_VS_ICACHE +VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg +VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP +VP_PWR_VS_DBSignals.Mode=DisableDeadBatterySignals +VP_PWR_VS_DBSignals.Signal=PWR_VS_DBSignals +VP_PWR_VS_LPOM.Mode=PowerOptimisation +VP_PWR_VS_LPOM.Signal=PWR_VS_LPOM +VP_PWR_VS_SECSignals.Mode=Security/Privilege +VP_PWR_VS_SECSignals.Signal=PWR_VS_SECSignals +VP_SYS_VS_tim6.Mode=TIM6 +VP_SYS_VS_tim6.Signal=SYS_VS_tim6 +VP_THREADX_VS_RTOSJjThreadXJjCoreJjDefault.Mode=Core_Default +VP_THREADX_VS_RTOSJjThreadXJjCoreJjDefault.Signal=THREADX_VS_RTOSJjThreadXJjCoreJjDefault +VP_USBPD_VS_PD3TYPEC.Mode=PD3_TypeC +VP_USBPD_VS_PD3TYPEC.Signal=USBPD_VS_PD3TYPEC +VP_USBPD_VS_USBPD1.Mode=USBPD_P0 +VP_USBPD_VS_USBPD1.Signal=USBPD_VS_USBPD1 +VP_USBPD_VS_usbpd_tim2.Mode=TIM2 +VP_USBPD_VS_usbpd_tim2.Signal=USBPD_VS_usbpd_tim2 +VP_USBPD_VS_usbpd_usb_cohabitation.Mode=Enable USB Support +VP_USBPD_VS_usbpd_usb_cohabitation.Signal=USBPD_VS_usbpd_usb_cohabitation +VP_USBX_Core_System.Mode=Core_System +VP_USBX_Core_System.Signal=USBX_Core_System +VP_USBX_UX\ Device\ CDC\ ACM\ Class_HS.Mode=UX_Device_class_CDC_ACM_HS +VP_USBX_UX\ Device\ CDC\ ACM\ Class_HS.Signal=USBX_UX Device CDC ACM Class_HS +VP_USBX_UX\ Device\ Controller_HS.Mode=UX_Device_Controller_HS +VP_USBX_UX\ Device\ Controller_HS.Signal=USBX_UX Device Controller_HS +VP_USBX_UX\ Device\ CoreStack_HS.Mode=UX_Device_CoreStack_HS +VP_USBX_UX\ Device\ CoreStack_HS.Signal=USBX_UX Device CoreStack_HS +board=NUCLEO-U5A5ZJ-Q +boardIOC=true diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c index ab4194623..16a86cbbb 100644 --- a/hw/bsp/stm32u5/family.c +++ b/hw/bsp/stm32u5/family.c @@ -37,6 +37,9 @@ #pragma GCC diagnostic pop #endif +static void Error_Handler(void) { +} + #include "bsp/board_api.h" #include "board.h" @@ -47,6 +50,10 @@ void OTG_FS_IRQHandler(void) { tud_int_handler(0); } +void OTG_HS_IRQHandler(void) { + tud_int_handler(0); +} + //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM //--------------------------------------------------------------------+ @@ -54,8 +61,9 @@ void OTG_FS_IRQHandler(void) { UART_HandleTypeDef UartHandle; void board_init(void) { - - board_clock_init(); + // Init clock, implemented in board.h + SystemClock_Config(); + SystemPower_Config(); // Enable All GPIOs clocks __HAL_RCC_GPIOA_CLK_ENABLE(); @@ -75,9 +83,6 @@ void board_init(void) { #if CFG_TUSB_OS == OPT_OS_NONE // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(OTG_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif GPIO_InitTypeDef GPIO_InitStruct; @@ -135,7 +140,13 @@ void board_init(void) { GPIO_InitStruct.Alternate = GPIO_AF10_USB; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); -#if defined(OTG_FS_VBUS_SENSE) && OTG_FS_VBUS_SENSE +#ifdef USB_OTG_FS + #if CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(OTG_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + #endif + + #if defined(OTG_FS_VBUS_SENSE) && OTG_FS_VBUS_SENSE // Configure VBUS Pin OTG_FS_VBUS_SENSE GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; @@ -144,20 +155,44 @@ void board_init(void) { // Enable VBUS sense (B device) via pin PA9 USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN; -#else + #else // Disable VBUS sense (B device) via pin PA9 USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN; // B-peripheral session valid override enable USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN; USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL; -#endif // vbus sense + #endif // vbus sense /* Enable USB power on Pwrctrl CR2 register */ HAL_PWREx_EnableVddUSB(); - /* USB_OTG_FS clock enable */ + /* USB clock enable */ __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); +#else + // STM59x/Ax/Fx/Gx only have 1 USB HS port + + #if CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(OTG_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + #endif + + + // Disable VBUS sense (B device) + USB_OTG_HS->GCCFG &= ~USB_OTG_GCCFG_VBDEN; + + // B-peripheral session valid override enable + USB_OTG_HS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN; + USB_OTG_HS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL; + + /* Enable USB power on Pwrctrl CR2 register */ + HAL_PWREx_EnableVddUSB(); + + /* USB clock enable */ + __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); +#endif // USB_OTG_FS + + } //--------------------------------------------------------------------+ diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 8807ff8aa..1797f0bc4 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -217,9 +217,7 @@ // TypeC controller #define TUP_USBIP_TYPEC_STM32 - #define TUP_DCD_ENDPOINT_MAX 8 - #define TUP_TYPEC_RHPORTS_NUM 1 #elif TU_CHECK_MCU(OPT_MCU_STM32G0) @@ -261,14 +259,21 @@ #elif TU_CHECK_MCU(OPT_MCU_STM32U5) #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_STM32 - #define TUP_DCD_ENDPOINT_MAX 6 + + // U59x/5Ax/5Fx/5Gx are highspeed with built-in HS PHY + #if defined(STM32U595xx) || defined(STM32U599xx) || defined(STM32U5A5xx) || defined(STM32U5A9xx) || \ + defined(STM32U5F7xx) || defined(STM32U5F9xx) || defined(STM32U5G7xx) || defined(STM32U5G9xx) + #define TUP_DCD_ENDPOINT_MAX 9 + #define TUP_RHPORT_HIGHSPEED 1 + #else + #define TUP_DCD_ENDPOINT_MAX 6 + #endif #elif TU_CHECK_MCU(OPT_MCU_STM32L5) #define TUP_USBIP_FSDEV #define TUP_USBIP_FSDEV_STM32 #define TUP_DCD_ENDPOINT_MAX 8 - //--------------------------------------------------------------------+ // Sony //--------------------------------------------------------------------+ diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index aa77511fa..a97a10223 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -86,18 +86,16 @@ #include "stm32u5xx.h" // NOTE: STM595/5A5/599/5A9 only have 1 USB port (with integrated HS PHY) // USB_OTG_FS_BASE and OTG_FS_IRQn not defined - #if (! defined USB_OTG_FS) + #if !defined(USB_OTG_FS) #define USB_OTG_HS_PERIPH_BASE USB_OTG_HS_BASE #define EP_MAX_HS 9 #define EP_FIFO_SIZE_HS 4096 - #define USB_OTG_FS_PERIPH_BASE USB_OTG_HS_BASE - #define OTG_FS_IRQn OTG_HS_IRQn + //#define OTG_FS_IRQn OTG_HS_IRQn #else #define USB_OTG_FS_PERIPH_BASE USB_OTG_FS_BASE + #define EP_MAX_FS 6 + #define EP_FIFO_SIZE_FS 1280 #endif - #define EP_MAX_FS 6 - #define EP_FIFO_SIZE_FS 1280 - #else #error "Unsupported MCUs" #endif diff --git a/src/tusb_option.h b/src/tusb_option.h index a41f5a07e..a29eb8a3a 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -174,10 +174,10 @@ // NXP LPC MCX #define OPT_MCU_MCXN9 2300 ///< NXP MCX N9 Series -// Helper to check if configured MCU is one of listed +// Check if configured MCU is one of listed // Apply _TU_CHECK_MCU with || as separator to list of input -#define _TU_CHECK_MCU(_m) (CFG_TUSB_MCU == _m) -#define TU_CHECK_MCU(...) (TU_ARGS_APPLY(_TU_CHECK_MCU, ||, __VA_ARGS__)) +#define _TU_CHECK_MCU(_m) (CFG_TUSB_MCU == _m) +#define TU_CHECK_MCU(...) (TU_ARGS_APPLY(_TU_CHECK_MCU, ||, __VA_ARGS__)) //--------------------------------------------------------------------+ // Supported OS diff --git a/tools/get_deps.py b/tools/get_deps.py index 9fdefac9d..8f93ca61f 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -181,6 +181,10 @@ deps_all = {**deps_mandatory, **deps_optional} TOP = Path(__file__).parent.parent.resolve() +def run_cmd(cmd): + return subprocess.run(cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + + def get_a_dep(d): if d not in deps_all.keys(): print('{} is not found in dependency list') @@ -189,25 +193,24 @@ def get_a_dep(d): commit = deps_all[d][1] families = deps_all[d][2] - print('cloning {} with {}'.format(d, url)) + print(f'cloning {d} with {url}') p = Path(TOP / d) - git_cmd = "git -C {}".format(p) + git_cmd = f"git -C {p}" # Init git deps if not existed if not p.exists(): p.mkdir(parents=True) - subprocess.run("{} init".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) - subprocess.run("{} remote add origin {}".format(git_cmd, url), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + run_cmd(f"git -C {p} init") + run_cmd(f"git -C {p} remote add origin {url}") # Check if commit is already fetched - result = subprocess.run("{} rev-parse HEAD".format(git_cmd, commit), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + result = run_cmd(f"git -C {p} rev-parse HEAD") head = result.stdout.decode("utf-8").splitlines()[0] - + run_cmd(f"git -C {p} reset --hard") if commit != head: - subprocess.run("{} reset --hard".format(git_cmd, commit), shell=True) - subprocess.run("{} fetch --depth 1 origin {}".format(git_cmd, commit), shell=True) - subprocess.run("{} checkout FETCH_HEAD".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + run_cmd(f"git -C {p} fetch --depth 1 origin {commit}") + run_cmd(f"git -C {p} checkout FETCH_HEAD") return 0 -- cgit v1.3.1 From b8881a3a141530a1d383d8869881e773b8a07d80 Mon Sep 17 00:00:00 2001 From: IngHK Date: Fri, 24 Nov 2023 22:34:28 +0100 Subject: fixed compile errors due to untreated CFG_TUH_LOG_LEVEL --- src/common/tusb_debug.h | 2 +- src/host/usbh.c | 8 ++++---- src/host/usbh_pvt.h | 2 +- src/tusb.c | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index 99176c02a..bd388d910 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -43,7 +43,7 @@ #if CFG_TUSB_DEBUG // Enum to String for debugging purposes -#if CFG_TUSB_DEBUG >= 2 +#if CFG_TUSB_DEBUG >= CFG_TUH_LOG_LEVEL extern char const* const tu_str_speed[]; extern char const* const tu_str_std_request[]; extern char const* const tu_str_xfer_result[]; diff --git a/src/host/usbh.c b/src/host/usbh.c index d8fff9905..78c8abfbd 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -113,7 +113,7 @@ typedef struct { // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ -#if CFG_TUSB_DEBUG >= 2 +#if CFG_TUSB_DEBUG >= CFG_TUH_LOG_LEVEL #define DRIVER_NAME(_name) .name = _name, #else #define DRIVER_NAME(_name) @@ -1233,7 +1233,7 @@ static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hu TU_LOG_USBH("Device unplugged address = %u\r\n", daddr); if (is_hub_addr(daddr)) { - TU_LOG(CFG_TUH_LOG_LEVEL, " is a HUB device %u\r\n", daddr); + TU_LOG_USBH(" is a HUB device %u\r\n", daddr); // Submit removed event If the device itself is a hub (un-rolled recursive) // TODO a better to unroll recursrive is using array of removing_hubs and mark it here @@ -1708,7 +1708,7 @@ static bool _parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configur if ( drv_id == TOTAL_DRIVER_COUNT - 1 ) { - TU_LOG(CFG_TUH_LOG_LEVEL, "[%u:%u] Interface %u: class = %u subclass = %u protocol = %u is not supported\r\n", + TU_LOG_USBH("[%u:%u] Interface %u: class = %u subclass = %u protocol = %u is not supported\r\n", dev->rhport, dev_addr, desc_itf->bInterfaceNumber, desc_itf->bInterfaceClass, desc_itf->bInterfaceSubClass, desc_itf->bInterfaceProtocol); } } @@ -1741,7 +1741,7 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num) { enum_full_complete(); if (is_hub_addr(dev_addr)) { - TU_LOG(CFG_TUH_LOG_LEVEL, "HUB address = %u is mounted\r\n", dev_addr); + TU_LOG_USBH("HUB address = %u is mounted\r\n", dev_addr); }else { // Invoke callback if available if (tuh_mount_cb) tuh_mount_cb(dev_addr); diff --git a/src/host/usbh_pvt.h b/src/host/usbh_pvt.h index 2b61a77db..3363ab9eb 100644 --- a/src/host/usbh_pvt.h +++ b/src/host/usbh_pvt.h @@ -51,7 +51,7 @@ enum { //--------------------------------------------------------------------+ typedef struct { - #if CFG_TUSB_DEBUG >= 2 + #if CFG_TUSB_DEBUG >= CFG_TUH_LOG_LEVEL char const* name; #endif diff --git a/src/tusb.c b/src/tusb.c index 7b0a669a0..e0c1066d4 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -419,7 +419,7 @@ uint32_t tu_edpt_stream_read(tu_edpt_stream_t* s, void* buffer, uint32_t bufsize #if CFG_TUSB_DEBUG #include -#if CFG_TUSB_DEBUG >= 2 +#if CFG_TUSB_DEBUG >= CFG_TUH_LOG_LEVEL char const* const tu_str_speed[] = { "Full", "Low", "High" }; char const* const tu_str_std_request[] = -- cgit v1.3.1 From efde252ed0a577536f409db980f46db844a23b2b Mon Sep 17 00:00:00 2001 From: IngHK Date: Fri, 8 Dec 2023 16:59:52 +0100 Subject: improved CFG_TUSB_DEBUG handling due to compile errors --- src/common/tusb_debug.h | 2 +- src/tusb.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index bd388d910..0f4dc93f3 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -43,7 +43,7 @@ #if CFG_TUSB_DEBUG // Enum to String for debugging purposes -#if CFG_TUSB_DEBUG >= CFG_TUH_LOG_LEVEL +#if CFG_TUSB_DEBUG >= CFG_TUH_LOG_LEVEL || CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL extern char const* const tu_str_speed[]; extern char const* const tu_str_std_request[]; extern char const* const tu_str_xfer_result[]; diff --git a/src/tusb.c b/src/tusb.c index e0c1066d4..7943ea5ef 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -419,7 +419,7 @@ uint32_t tu_edpt_stream_read(tu_edpt_stream_t* s, void* buffer, uint32_t bufsize #if CFG_TUSB_DEBUG #include -#if CFG_TUSB_DEBUG >= CFG_TUH_LOG_LEVEL +#if CFG_TUSB_DEBUG >= CFG_TUH_LOG_LEVEL || CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL char const* const tu_str_speed[] = { "Full", "Low", "High" }; char const* const tu_str_std_request[] = -- cgit v1.3.1 From 93c40b6966db53ce70f4bea6b8a72bf2986ac180 Mon Sep 17 00:00:00 2001 From: henneboi Date: Fri, 8 Dec 2023 13:34:42 +0100 Subject: Add Support stm32h5 for stm32h573i based on stm32_fsdev G0 implementation Tested on Windows with IAR and gcc toolchain ( via cubeide) Tested only with audio examples, but sould be ok for other examples Cmake pacthed : but not tested Linux build : not tested Added a temporary workaround in make file to support H5 HAL repo ( ARMCC_VERSION=0) --- hw/bsp/board_mcu.h | 11 +- hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h | 165 ++++++++++ .../boards/stm32h573i-dk/STM32H573I-DK_FLASH.ld | 187 +++++++++++ hw/bsp/stm32h5/boards/stm32h573i-dk/board.cmake | 10 + hw/bsp/stm32h5/boards/stm32h573i-dk/board.h | 125 ++++++++ hw/bsp/stm32h5/boards/stm32h573i-dk/board.mk | 13 + hw/bsp/stm32h5/family.c | 206 ++++++++++++ hw/bsp/stm32h5/family.cmake | 116 +++++++ hw/bsp/stm32h5/family.mk | 57 ++++ hw/bsp/stm32h5/stm32h5xx_hal_conf.h | 355 +++++++++++++++++++++ src/common/tusb_mcu.h | 6 + src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 11 +- .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 29 ++ src/tusb_option.h | 1 + tools/get_deps.py | 9 +- 15 files changed, 1295 insertions(+), 6 deletions(-) create mode 100644 hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h create mode 100644 hw/bsp/stm32h5/boards/stm32h573i-dk/STM32H573I-DK_FLASH.ld create mode 100644 hw/bsp/stm32h5/boards/stm32h573i-dk/board.cmake create mode 100644 hw/bsp/stm32h5/boards/stm32h573i-dk/board.h create mode 100644 hw/bsp/stm32h5/boards/stm32h573i-dk/board.mk create mode 100644 hw/bsp/stm32h5/family.c create mode 100644 hw/bsp/stm32h5/family.cmake create mode 100644 hw/bsp/stm32h5/family.mk create mode 100644 hw/bsp/stm32h5/stm32h5xx_hal_conf.h (limited to 'src/common') diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index 4ce5c4139..d40f33bbe 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -40,8 +40,8 @@ // Include order follows OPT_MCU_ number #if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) || \ - TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC18XX) || \ - TU_CHECK_MCU(OPT_MCU_LPC40XX, OPT_MCU_LPC43XX) + TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC18XX) || \ + TU_CHECK_MCU(OPT_MCU_LPC40XX, OPT_MCU_LPC43XX) #include "chip.h" #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX, OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX, OPT_MCU_MCXN9) @@ -54,8 +54,8 @@ #include "nrf.h" #elif CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21 || \ - CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAME5X || \ - CFG_TUSB_MCU == OPT_MCU_SAML22 || CFG_TUSB_MCU == OPT_MCU_SAML21 + CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAME5X || \ + CFG_TUSB_MCU == OPT_MCU_SAML22 || CFG_TUSB_MCU == OPT_MCU_SAML21 #include "sam.h" #elif CFG_TUSB_MCU == OPT_MCU_SAMG @@ -83,6 +83,9 @@ #elif CFG_TUSB_MCU == OPT_MCU_STM32G4 #include "stm32g4xx.h" +#elif CFG_TUSB_MCU == OPT_MCU_STM32H5 + #include "stm32h5xx.h" + #elif CFG_TUSB_MCU == OPT_MCU_STM32H7 #include "stm32h7xx.h" diff --git a/hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h new file mode 100644 index 000000000..52dfa095f --- /dev/null +++ b/hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h @@ -0,0 +1,165 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +// skip if included from IAR assembler +#ifndef __IASMARM__ + #include "stm32g0xx.h" +#endif + +/* Cortex M23/M33 port configuration. */ +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) + +#define configUSE_PREEMPTION 1 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +#define configCPU_CLOCK_HZ SystemCoreClock +#define configTICK_RATE_HZ ( 1000 ) +#define configMAX_PRIORITIES ( 5 ) +#define configMINIMAL_STACK_SIZE ( 128 ) +#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 ) +#define configMAX_TASK_NAME_LEN 16 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configQUEUE_REGISTRY_SIZE 4 +#define configUSE_QUEUE_SETS 0 +#define configUSE_TIME_SLICING 0 +#define configUSE_NEWLIB_REENTRANT 0 +#define configENABLE_BACKWARD_COMPATIBILITY 1 +#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 + +#define configSUPPORT_STATIC_ALLOCATION 1 +#define configSUPPORT_DYNAMIC_ALLOCATION 0 + +/* Hook function related definitions. */ +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning +#define configCHECK_FOR_STACK_OVERFLOW 2 + +/* Run time and task stats gathering related definitions. */ +#define configGENERATE_RUN_TIME_STATS 0 +#define configRECORD_STACK_HIGH_ADDRESS 1 +#define configUSE_TRACE_FACILITY 1 // legacy trace +#define configUSE_STATS_FORMATTING_FUNCTIONS 0 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES 2 + +/* Software timer related definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2) +#define configTIMER_QUEUE_LENGTH 32 +#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE + +/* Optional functions - most linkers will remove unused functions anyway. */ +#define INCLUDE_vTaskPrioritySet 0 +#define INCLUDE_uxTaskPriorityGet 0 +#define INCLUDE_vTaskDelete 0 +#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY +#define INCLUDE_xResumeFromISR 0 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_xTaskGetSchedulerState 0 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 0 +#define INCLUDE_xTaskGetIdleTaskHandle 0 +#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 +#define INCLUDE_pcTaskGetTaskName 0 +#define INCLUDE_eTaskGetState 0 +#define INCLUDE_xEventGroupSetBitFromISR 0 +#define INCLUDE_xTimerPendFunctionCall 0 + +/* Define to trap errors during development. */ +// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7 +#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) +#define configASSERT(_exp) \ + do {\ + if ( !(_exp) ) { \ + volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ + if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \ + taskDISABLE_INTERRUPTS(); \ + __asm("BKPT #0\n"); \ + }\ + }\ + } while(0) +#else +#define configASSERT( x ) +#endif + +/* FreeRTOS hooks to NVIC vectors */ +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler +#define vPortSVCHandler SVC_Handler + +//--------------------------------------------------------------------+ +// Interrupt nesting behavior configuration. +//--------------------------------------------------------------------+ + +// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header +#define configPRIO_BITS 2 + +/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<
© COPYRIGHT(c) 2019 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 640K +FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 2048K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/hw/bsp/stm32h5/boards/stm32h573i-dk/board.cmake b/hw/bsp/stm32h5/boards/stm32h573i-dk/board.cmake new file mode 100644 index 000000000..82d4474af --- /dev/null +++ b/hw/bsp/stm32h5/boards/stm32h573i-dk/board.cmake @@ -0,0 +1,10 @@ +set(MCU_VARIANT stm32h573i-dk) +set(JLINK_DEVICE stm32h573i-dk) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32H573I-DK_FLASH.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32H573xx + ) +endfunction() diff --git a/hw/bsp/stm32h5/boards/stm32h573i-dk/board.h b/hw/bsp/stm32h5/boards/stm32h573i-dk/board.h new file mode 100644 index 000000000..01834f151 --- /dev/null +++ b/hw/bsp/stm32h5/boards/stm32h573i-dk/board.h @@ -0,0 +1,125 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020, Ha Thach (tinyusb.org) + * Copyright (c) 2034, HiFiPhile + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +// LED +#define LED_PORT GPIOI +#define LED_PIN GPIO_PIN_9 +#define LED_STATE_ON 0 + +// Button +#define BUTTON_PORT GPIOC +#define BUTTON_PIN GPIO_PIN_13 +#define BUTTON_STATE_ACTIVE 0 + +// UART Enable for STLink VCOM +#define UART_DEV USART1 +#define UART_CLK_EN __USART1_CLK_ENABLE +#define UART_GPIO_PORT GPIOA +#define UART_GPIO_AF GPIO_AF7_USART1 + +#define UART_TX_PIN GPIO_PIN_9 +#define UART_RX_PIN GPIO_PIN_10 + + + + +//--------------------------------------------------------------------+ +// RCC Clock +//--------------------------------------------------------------------+ +// Clock configure for STM32stm32h573i-dk +static inline void board_clock_init(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage */ + HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + Freq 250MHZ */ + + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS_DIGITAL; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 5; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 10; + RCC_OscInitStruct.PLL.PLLR = 2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + /** Initializes the CPU, AHB and APB buses clocks */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5); + + // Configure CRS clock source + __HAL_RCC_CRS_CLK_ENABLE(); + RCC_CRSInitTypeDef RCC_CRSInitStruct = {0}; + RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1; + RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB; + RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING; + RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000); + RCC_CRSInitStruct.ErrorLimitValue = 34; + RCC_CRSInitStruct.HSI48CalibrationValue = 32; + HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct); + + + /* Select HSI48 as USB clock source */ + RCC_PeriphCLKInitTypeDef usb_clk = {0 }; + usb_clk.PeriphClockSelection = RCC_PERIPHCLK_USB; + usb_clk.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + HAL_RCCEx_PeriphCLKConfig(&usb_clk); + + /* Peripheral clock enable */ + __HAL_RCC_USB_CLK_ENABLE(); + + SystemCoreClockUpdate(); + + +} + +#ifdef __cplusplus +} +#endif + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/stm32h5/boards/stm32h573i-dk/board.mk b/hw/bsp/stm32h5/boards/stm32h573i-dk/board.mk new file mode 100644 index 000000000..66b299886 --- /dev/null +++ b/hw/bsp/stm32h5/boards/stm32h573i-dk/board.mk @@ -0,0 +1,13 @@ +CFLAGS += \ + -DSTM32H573xx + +# GCC +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h573xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32H573I-DK_FLASH.ld + +# IAR +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h573xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h573xx_flash.icf + +# For flash-jlink target +JLINK_DEVICE = stm32h573i-dk diff --git a/hw/bsp/stm32h5/family.c b/hw/bsp/stm32h5/family.c new file mode 100644 index 000000000..d035b791c --- /dev/null +++ b/hw/bsp/stm32h5/family.c @@ -0,0 +1,206 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * Copyright (c) 2023 HiFiPhile + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "stm32h5xx_hal.h" +#include "bsp/board_api.h" +#include "board.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB_DRD_FS_IRQHandler(void) +{ + tud_int_handler(0); +} + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM +//--------------------------------------------------------------------+ +UART_HandleTypeDef UartHandle; + +void board_init(void) +{ + HAL_Init(); // required for HAL_RCC_Osc TODO check with freeRTOS + board_clock_init(); + + // Enable All GPIOs clocks + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOI_CLK_ENABLE(); + + //__HAL_RCC_SYSCFG_CLK_ENABLE(); + //__HAL_RCC_PWR_CLK_ENABLE(); + + UART_CLK_EN(); + + #if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); + #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR runs before scheduler start + SysTick->CTRL &= ~1U; + + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB_DRD_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + #endif + + GPIO_InitTypeDef GPIO_InitStruct; + + // LED + GPIO_InitStruct.Pin = LED_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); + + board_led_write(false); + + // Button + GPIO_InitStruct.Pin = BUTTON_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); + + #ifdef UART_DEV + // UART + GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + GPIO_InitStruct.Alternate = UART_GPIO_AF; + HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct); + + UartHandle = (UART_HandleTypeDef) + { + .Instance = UART_DEV, + .Init.BaudRate = CFG_BOARD_UART_BAUDRATE, + .Init.WordLength = UART_WORDLENGTH_8B, + .Init.StopBits = UART_STOPBITS_1, + .Init.Parity = UART_PARITY_NONE, + .Init.HwFlowCtl = UART_HWCONTROL_NONE, + .Init.Mode = UART_MODE_TX_RX, + .Init.OverSampling = UART_OVERSAMPLING_16, + .AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT + }; + HAL_UART_Init(&UartHandle); + #endif + + // USB Pins TODO double check USB clock and pin setup + // Configure USB DM and DP pins. This is optional, and maintained only for user guidance. + GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* Peripheral clock enable */ + __HAL_RCC_USB_CLK_ENABLE(); + + /* Enable VDDUSB */ + HAL_PWREx_EnableVddUSB(); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_PinState pin_state = (GPIO_PinState)(state ? LED_STATE_ON : (1 - LED_STATE_ON)); + HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN); +} + +size_t board_get_unique_id(uint8_t id[], size_t max_len) +{ + (void) max_len; + volatile uint32_t *stm32_uuid = (volatile uint32_t *) UID_BASE; + uint32_t *id32 = (uint32_t *)(uintptr_t) id; + uint8_t const len = 12; + + id32[0] = stm32_uuid[0]; + id32[1] = stm32_uuid[1]; + id32[2] = stm32_uuid[2]; + + return len; +} + +int board_uart_read(uint8_t *buf, int len) +{ + (void) buf; + (void) len; + return 0; +} + +int board_uart_write(void const *buf, int len) +{ + #ifdef UART_DEV + HAL_UART_Transmit(&UartHandle, (uint8_t *)(uintptr_t) buf, len, 0xffff); + return len; + #else + (void) buf; + (void) len; + (void) UartHandle; + return 0; + #endif +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; + +void SysTick_Handler(void) +{ + system_ticks++; + HAL_IncTick(); +} + +uint32_t board_millis(void) +{ + return system_ticks; +} + +#endif + +void HardFault_Handler(void) +{ + __asm("BKPT #0\n"); +} + +// Required by __libc_init_array in startup code if we are compiling using +// -nostdlib/-nostartfiles. +void _init(void) +{ + +} diff --git a/hw/bsp/stm32h5/family.cmake b/hw/bsp/stm32h5/family.cmake new file mode 100644 index 000000000..8edee1887 --- /dev/null +++ b/hw/bsp/stm32h5/family.cmake @@ -0,0 +1,116 @@ +include_guard() + +if (NOT BOARD) + message(FATAL_ERROR "BOARD not specified") +endif () + +set(ST_FAMILY h5) +set(ST_PREFIX stm32${ST_FAMILY}xx) + +set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver) +set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY}) +set(CMSIS_5 ${TOP}/lib/CMSIS_5) + +# include board specific +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) + +# toolchain set up +set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus CACHE INTERNAL "System Processor") +set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake) + +set(FAMILY_MCUS STM32H5 CACHE INTERNAL "") + + +#------------------------------------ +# BOARD_TARGET +#------------------------------------ +# only need to be built ONCE for all examples +function(add_board_target BOARD_TARGET) + if (NOT TARGET ${BOARD_TARGET}) + # Startup & Linker script + set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) + set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) + set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) + + add_library(${BOARD_TARGET} STATIC + ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c + ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} + ) + target_include_directories(${BOARD_TARGET} PUBLIC + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMSIS_5}/CMSIS/Core/Include + ${ST_CMSIS}/Include + ${ST_HAL_DRIVER}/Inc + ) + target_compile_options(${BOARD_TARGET} PUBLIC + ) + target_compile_definitions(${BOARD_TARGET} PUBLIC + ) + + update_board(${BOARD_TARGET}) + + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--script=${LD_FILE_GNU}" + -nostartfiles + # nanolib + --specs=nosys.specs + --specs=nano.specs + ) + elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--config=${LD_FILE_IAR}" + ) + endif () + endif () +endfunction() + + +#------------------------------------ +# Functions +#------------------------------------ +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) + + # Board target + add_board_target(board_${BOARD}) + + #---------- Port Specific ---------- + # These files are built for each example since it depends on example's tusb_config.h + target_sources(${TARGET} PUBLIC + # BSP + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c + ) + target_include_directories(${TARGET} PUBLIC + # family, hw, board + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} + ) + + # Add TinyUSB target and port source + family_add_tinyusb(${TARGET} OPT_MCU_STM32H5 ${RTOS}) + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c + ${TOP}/src/portable/st/typec/typec_stm32.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) + + # Link dependencies + target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) + + # Flashing + family_flash_stlink(${TARGET}) + #family_flash_jlink(${TARGET}) +endfunction() diff --git a/hw/bsp/stm32h5/family.mk b/hw/bsp/stm32h5/family.mk new file mode 100644 index 000000000..e04e08d80 --- /dev/null +++ b/hw/bsp/stm32h5/family.mk @@ -0,0 +1,57 @@ +ST_FAMILY = h5 +DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver + +ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) +ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver + +include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m33 + +# -------------- +# Compiler Flags +# -------------- +CFLAGS += \ + -DCFG_TUSB_MCU=OPT_MCU_STM32H5 + +# workaround to fix a build issue due to a wrong define check in hal, this define must be removed as soon as the repo is fixed +CFLAGS += \ + -D__ARMCC_VERSION=0 + +# GCC Flags +CFLAGS_GCC += \ + -flto \ + -nostdlib -nostartfiles \ + -Wno-unused-parameter \ + -Wno-cast-align + +# suppress warning caused by vendor mcu driver +CFLAGS_GCC += -Wno-error=cast-align + +#LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs + +# ----------------- +# Sources & Include +# ----------------- + +SRC_C += \ + src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \ + $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_dma.c + +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ + $(TOP)/$(ST_CMSIS)/Include \ + $(TOP)/$(ST_HAL_DRIVER)/Inc + +# flash target using on-board stlink +flash: flash-stlink diff --git a/hw/bsp/stm32h5/stm32h5xx_hal_conf.h b/hw/bsp/stm32h5/stm32h5xx_hal_conf.h new file mode 100644 index 000000000..d017bb06b --- /dev/null +++ b/hw/bsp/stm32h5/stm32h5xx_hal_conf.h @@ -0,0 +1,355 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32h5xx_hal_conf.h + * @author MCD Application Team + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32h5xx_HAL_CONF_H +#define STM32h5xx_HAL_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED +/* #define HAL_ADC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_COMP_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +/* #define HAL_FDCAN_MODULE_ENABLED */ +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_I2C_MODULE_ENABLED */ +/* #define HAL_I2S_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_PCD_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_SMBUS_MODULE_ENABLED */ +/* #define HAL_SPI_MODULE_ENABLED */ +/* #define HAL_TIM_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED + +/* ########################## Register Callbacks selection ############################## */ +/** + * @brief This is the list of modules where register callback can be used + */ +#define USE_HAL_ADC_REGISTER_CALLBACKS 0u +#define USE_HAL_CEC_REGISTER_CALLBACKS 0u +#define USE_HAL_COMP_REGISTER_CALLBACKS 0u +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0u +#define USE_HAL_DAC_REGISTER_CALLBACKS 0u +#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0u +#define USE_HAL_HCD_REGISTER_CALLBACKS 0u +#define USE_HAL_I2C_REGISTER_CALLBACKS 0u +#define USE_HAL_I2S_REGISTER_CALLBACKS 0u +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0u +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0u +#define USE_HAL_PCD_REGISTER_CALLBACKS 0u +#define USE_HAL_RNG_REGISTER_CALLBACKS 0u +#define USE_HAL_RTC_REGISTER_CALLBACKS 0u +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0u +#define USE_HAL_SPI_REGISTER_CALLBACKS 0u +#define USE_HAL_TIM_REGISTER_CALLBACKS 0u +#define USE_HAL_UART_REGISTER_CALLBACKS 0u +#define USE_HAL_USART_REGISTER_CALLBACKS 0u +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0u + + +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) +#define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) +#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal Core Speed oscillator (CSI) default value. + * This value is the default CSI range value after Reset. + */ +#if !defined (CSI_VALUE) +#define CSI_VALUE 4000000UL /*!< Value of the Internal oscillator in Hz*/ +#endif /* CSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) +#define HSI_VALUE 64000000UL /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG. + * This internal oscillator is mainly dedicated to provide a high precision clock to + * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry. + * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency + * which is subject to manufacturing process variations. + */ +#if !defined (HSI48_VALUE) +#define HSI48_VALUE 48000000UL /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. + The real value my vary depending on manufacturing process variations.*/ +#endif /* HSI48_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) +#define LSI_VALUE 32000UL /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz +The real value may vary depending on the variations +in voltage and temperature.*/ + +#if !defined (LSI_STARTUP_TIME) +#define LSI_STARTUP_TIME 130UL /*!< Time out for LSI start up, in ms */ +#endif /* LSI_STARTUP_TIME */ + +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) +#define LSE_VALUE 32768UL /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) +#define LSE_STARTUP_TIMEOUT 5000UL /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for SPI/SAI peripheral + * This value is used by the SPI/SAI HAL module to compute the SPI/SAI clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + + */ +#if !defined (EXTERNAL_CLOCK_VALUE) +#define EXTERNAL_CLOCK_VALUE 12288000UL /*!< Value of the External clock in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ############################################ System Configuration ################################################ */ + +/** + * @brief This is the HAL system configuration section + */ + +#define VDD_VALUE 3300UL /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY (15UL) /*!< tick interrupt priority (lowest by default) */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 0U /*!< Enable prefetch */ + + + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* ################## CRYP peripheral configuration ########################## */ + +#define USE_HAL_CRYP_SUSPEND_RESUME 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include modules header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED +#include "stm32h5xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED +#include "stm32h5xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED +#include "stm32h5xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED +#include "stm32h5xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED +#include "stm32h5xx_hal_adc.h" +#include "stm32h5xx_hal_adc_ex.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED +#include "stm32h5xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED +#include "stm32h5xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED +#include "stm32h5xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED +#include "stm32h5xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED +#include "stm32h5xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED +#include "stm32h5xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED +#include "stm32h5xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_FDCAN_MODULE_ENABLED +#include "stm32h5xx_hal_fdcan.h" +#endif /* HAL_FDCAN_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED +#include "stm32h5xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED +#include "stm32h5xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED +#include "stm32h5xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED +#include "stm32h5xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED +#include "stm32h5xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED +#include "stm32h5xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED +#include "stm32h5xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED +#include "stm32h5xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED +#include "stm32h5xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED +#include "stm32h5xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED +#include "stm32h5xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED +#include "stm32h5xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED +#include "stm32h5xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED +#include "stm32h5xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED +#include "stm32h5xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED +#include "stm32h5xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED +#include "stm32h5xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for functions parameters check. + * @param expr If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ +#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ +void assert_failed(uint8_t *file, uint32_t line); +#else +#define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32h5xx_HAL_CONF_H */ diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 6fab190ea..9c4083031 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -210,6 +210,12 @@ #define TUP_DCD_ENDPOINT_MAX 9 +#elif TU_CHECK_MCU(OPT_MCU_STM32H5) + #define TUP_USBIP_FSDEV + #define TUP_USBIP_FSDEV_STM32 + #define TUP_DCD_ENDPOINT_MAX 8 + + #elif TU_CHECK_MCU(OPT_MCU_STM32G4) // Device controller #define TUP_USBIP_FSDEV diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index 14cabaf8d..b0a00b7ee 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -242,7 +242,7 @@ void dcd_init (uint8_t rhport) } USB->CNTR = 0; // Enable USB -#ifndef STM32G0 // BTABLE register does not exist any more on STM32G0, it is fixed to USB SRAM base address +#if !defined(STM32G0) && !defined(STM32H5) // BTABLE register does not exist any more on STM32G0, it is fixed to USB SRAM base address USB->BTABLE = DCD_STM32_BTABLE_BASE; #endif USB->ISTR = 0; // Clear pending interrupts @@ -357,6 +357,11 @@ void dcd_int_enable (uint8_t rhport) #else NVIC_EnableIRQ(USB_UCPD1_2_IRQn); #endif + + +#elif CFG_TUSB_MCU == OPT_MCU_STM32H5 + NVIC_EnableIRQ(USB_DRD_FS_IRQn); + #elif CFG_TUSB_MCU == OPT_MCU_STM32WB NVIC_EnableIRQ(USB_HP_IRQn); @@ -414,6 +419,10 @@ void dcd_int_disable(uint8_t rhport) #else NVIC_DisableIRQ(USB_UCPD1_2_IRQn); #endif + +#elif CFG_TUSB_MCU == OPT_MCU_STM32H5 + NVIC_DisableIRQ(USB_DRD_FS_IRQn); + #elif CFG_TUSB_MCU == OPT_MCU_STM32WB NVIC_DisableIRQ(USB_HP_IRQn); diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h index e6649de5a..0db426e50 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h @@ -110,6 +110,35 @@ #define USB_CNTR_LPMODE USB_CNTR_SUSPRDY #define USB_CNTR_FSUSP USB_CNTR_SUSPEN +#elif CFG_TUSB_MCU == OPT_MCU_STM32H5 + #include "stm32h5xx.h" + #define PMA_32BIT_ACCESS + #define PMA_LENGTH (2048u) + #undef USB_PMAADDR + #define USB_PMAADDR USB_DRD_PMAADDR + #define USB_TypeDef USB_DRD_TypeDef + #define EP0R CHEP0R + #define USB_EP_CTR_RX USB_EP_VTRX + #define USB_EP_CTR_TX USB_EP_VTTX + #define USB_EP_T_FIELD USB_CHEP_UTYPE + #define USB_EPREG_MASK USB_CHEP_REG_MASK + #define USB_EPTX_DTOGMASK USB_CHEP_TX_DTOGMASK + #define USB_EPRX_DTOGMASK USB_CHEP_RX_DTOGMASK + #define USB_EPTX_DTOG1 USB_CHEP_TX_DTOG1 + #define USB_EPTX_DTOG2 USB_CHEP_TX_DTOG2 + #define USB_EPRX_DTOG1 USB_CHEP_RX_DTOG1 + #define USB_EPRX_DTOG2 USB_CHEP_RX_DTOG2 + #define USB_EPRX_STAT USB_CH_RX_VALID + #define USB_EPKIND_MASK USB_EP_KIND_MASK + #define USB USB_DRD_FS + #define USB_CNTR_FRES USB_CNTR_USBRST + #define USB_CNTR_RESUME USB_CNTR_L2RES + #define USB_ISTR_EP_ID USB_ISTR_IDN + #define USB_EPADDR_FIELD USB_CHEP_ADDR + #define USB_CNTR_LPMODE USB_CNTR_SUSPRDY + #define USB_CNTR_FSUSP USB_CNTR_SUSPEN + + #elif CFG_TUSB_MCU == OPT_MCU_STM32WB #include "stm32wbxx.h" #define PMA_LENGTH (1024u) diff --git a/src/tusb_option.h b/src/tusb_option.h index 7597392d6..699691b53 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -86,6 +86,7 @@ #define OPT_MCU_STM32WB 312 ///< ST WB #define OPT_MCU_STM32U5 313 ///< ST U5 #define OPT_MCU_STM32L5 314 ///< ST L5 +#define OPT_MCU_STM32H5 315 ///< ST H5 // Sony #define OPT_MCU_CXD56 400 ///< SONY CXD56 diff --git a/tools/get_deps.py b/tools/get_deps.py index 79c272c07..cda4fc8da 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -95,6 +95,10 @@ deps_optional = { 'hw/mcu/st/cmsis_device_h7': ['https://github.com/STMicroelectronics/cmsis_device_h7.git', '60dc2c913203dc8629dc233d4384dcc41c91e77f', 'stm32h7'], + 'hw/mcu/st/cmsis_device_h5': ['https://github.com/STMicroelectronics/cmsis_device_h5.git', + '62b2cb0fbfe10c5791ee469bbde7b397c2fea8f5', + 'stm32h5'], + 'hw/mcu/st/cmsis_device_l0': ['https://github.com/STMicroelectronics/cmsis_device_l0.git', '06748ca1f93827befdb8b794402320d94d02004f', 'stm32l0'], @@ -140,6 +144,9 @@ deps_optional = { 'hw/mcu/st/stm32h7xx_hal_driver': ['https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git', 'd8461b980b59b1625207d8c4f2ce0a9c2a7a3b04', 'stm32h7'], + 'hw/mcu/st/stm32h5xx_hal_driver': ['https://github.com/STMicroelectronics/stm32h5xx_hal_driver.git', + '2cf77de584196d619cec1b4586c3b9e2820a254e', + 'stm32h5'], 'hw/mcu/st/stm32l0xx_hal_driver': ['https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git', 'fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b', 'stm32l0'], @@ -170,7 +177,7 @@ deps_optional = { 'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git', '20285262657d1b482d132d20d755c8c330d55c1f', 'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x' - 'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 ' + 'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5' 'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb'], 'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git', 'e73e04ca63495672d955f9268e003cffe168fcd8', -- cgit v1.3.1 From f3d713ac7336913a68326eae5a7e146ec2cd22c3 Mon Sep 17 00:00:00 2001 From: HiFiPhile Date: Tue, 12 Dec 2023 22:35:05 +0100 Subject: Fix CI & typo. --- hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h | 2 +- hw/bsp/stm32h5/boards/stm32h573i-dk/board.h | 2 +- hw/bsp/stm32h5/family.mk | 4 ++-- src/common/tusb_mcu.h | 1 - src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 7 ++----- src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 4 ++-- tools/get_deps.py | 1 - 7 files changed, 8 insertions(+), 13 deletions(-) (limited to 'src/common') diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h index ae0820529..9ebaf73f0 100644 --- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h +++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h @@ -2,7 +2,7 @@ * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) - * Copyright (c) 2034, HiFiPhile + * Copyright (c) 2023, HiFiPhile * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal diff --git a/hw/bsp/stm32h5/boards/stm32h573i-dk/board.h b/hw/bsp/stm32h5/boards/stm32h573i-dk/board.h index 01834f151..a8808e32b 100644 --- a/hw/bsp/stm32h5/boards/stm32h573i-dk/board.h +++ b/hw/bsp/stm32h5/boards/stm32h573i-dk/board.h @@ -2,7 +2,7 @@ * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) - * Copyright (c) 2034, HiFiPhile + * Copyright (c) 2023, HiFiPhile * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal diff --git a/hw/bsp/stm32h5/family.mk b/hw/bsp/stm32h5/family.mk index e04e08d80..2fd95ecec 100644 --- a/hw/bsp/stm32h5/family.mk +++ b/hw/bsp/stm32h5/family.mk @@ -11,9 +11,9 @@ CPU_CORE ?= cortex-m33 # Compiler Flags # -------------- CFLAGS += \ - -DCFG_TUSB_MCU=OPT_MCU_STM32H5 + -DCFG_TUSB_MCU=OPT_MCU_STM32H5 -# workaround to fix a build issue due to a wrong define check in hal, this define must be removed as soon as the repo is fixed +# workaround to fix a build issue due to a wrong define check in hal, this define must be removed as soon as the repo is fixed CFLAGS += \ -D__ARMCC_VERSION=0 diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 9c4083031..e589c4c86 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -214,7 +214,6 @@ #define TUP_USBIP_FSDEV #define TUP_USBIP_FSDEV_STM32 #define TUP_DCD_ENDPOINT_MAX 8 - #elif TU_CHECK_MCU(OPT_MCU_STM32G4) // Device controller diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index b0a00b7ee..21cd3da26 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -357,11 +357,9 @@ void dcd_int_enable (uint8_t rhport) #else NVIC_EnableIRQ(USB_UCPD1_2_IRQn); #endif - - + #elif CFG_TUSB_MCU == OPT_MCU_STM32H5 NVIC_EnableIRQ(USB_DRD_FS_IRQn); - #elif CFG_TUSB_MCU == OPT_MCU_STM32WB NVIC_EnableIRQ(USB_HP_IRQn); @@ -419,10 +417,9 @@ void dcd_int_disable(uint8_t rhport) #else NVIC_DisableIRQ(USB_UCPD1_2_IRQn); #endif - + #elif CFG_TUSB_MCU == OPT_MCU_STM32H5 NVIC_DisableIRQ(USB_DRD_FS_IRQn); - #elif CFG_TUSB_MCU == OPT_MCU_STM32WB NVIC_DisableIRQ(USB_HP_IRQn); diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h index 0db426e50..b71e4f498 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h @@ -137,8 +137,8 @@ #define USB_EPADDR_FIELD USB_CHEP_ADDR #define USB_CNTR_LPMODE USB_CNTR_SUSPRDY #define USB_CNTR_FSUSP USB_CNTR_SUSPEN - - + + #elif CFG_TUSB_MCU == OPT_MCU_STM32WB #include "stm32wbxx.h" #define PMA_LENGTH (1024u) diff --git a/tools/get_deps.py b/tools/get_deps.py index cda4fc8da..38ff81412 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -98,7 +98,6 @@ deps_optional = { 'hw/mcu/st/cmsis_device_h5': ['https://github.com/STMicroelectronics/cmsis_device_h5.git', '62b2cb0fbfe10c5791ee469bbde7b397c2fea8f5', 'stm32h5'], - 'hw/mcu/st/cmsis_device_l0': ['https://github.com/STMicroelectronics/cmsis_device_l0.git', '06748ca1f93827befdb8b794402320d94d02004f', 'stm32l0'], -- cgit v1.3.1 From a39be99a58847318e67d06db17c24e481d318f08 Mon Sep 17 00:00:00 2001 From: IngHK Date: Tue, 26 Dec 2023 12:24:54 +0100 Subject: improved hex debug print, improved USBH debug prints, added pid/vid debug print --- src/common/tusb_debug.h | 2 +- src/host/usbh.c | 29 ++++++++++++++++------------- src/host/usbh_pvt.h | 6 +++++- 3 files changed, 22 insertions(+), 15 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index 0f4dc93f3..8db1606ae 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -76,7 +76,7 @@ static inline void tu_print_buf(uint8_t const* buf, uint32_t bufsize) { #define TU_LOG1_MEM tu_print_mem #define TU_LOG1_BUF(_x, _n) tu_print_buf((uint8_t const*)(_x), _n) #define TU_LOG1_INT(_x) tu_printf(#_x " = %ld\r\n", (unsigned long) (_x) ) -#define TU_LOG1_HEX(_x) tu_printf(#_x " = %lX\r\n", (unsigned long) (_x) ) +#define TU_LOG1_HEX(_x) tu_printf(#_x " = 0x%lX\r\n", (unsigned long) (_x) ) // Log Level 2: Warn #if CFG_TUSB_DEBUG >= 2 diff --git a/src/host/usbh.c b/src/host/usbh.c index 4d30d9f81..ee7424ed9 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -291,6 +291,9 @@ bool tuh_vid_pid_get(uint8_t dev_addr, uint16_t *vid, uint16_t *pid) { *vid = dev->vid; *pid = dev->pid; + TU_LOG_HEX_USBH(*vid); + TU_LOG_HEX_USBH(*pid); + return true; } @@ -340,12 +343,12 @@ bool tuh_init(uint8_t controller_id) { if ( tuh_inited() ) return true; TU_LOG_USBH("USBH init on controller %u\r\n", controller_id); - TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(usbh_device_t)); - TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(hcd_event_t)); - TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(_ctrl_xfer)); - TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(tuh_xfer_t)); - TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(tu_fifo_t)); - TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(tu_edpt_stream_t)); + TU_LOG_INT_USBH(sizeof(usbh_device_t)); + TU_LOG_INT_USBH(sizeof(hcd_event_t)); + TU_LOG_INT_USBH(sizeof(_ctrl_xfer)); + TU_LOG_INT_USBH(sizeof(tuh_xfer_t)); + TU_LOG_INT_USBH(sizeof(tu_fifo_t)); + TU_LOG_INT_USBH(sizeof(tu_edpt_stream_t)); // Event queue _usbh_q = osal_queue_create( &_usbh_qdef ); @@ -589,7 +592,7 @@ bool tuh_control_xfer (tuh_xfer_t* xfer) { TU_LOG_USBH("[%u:%u] %s: ", rhport, daddr, (xfer->setup->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD && xfer->setup->bRequest <= TUSB_REQ_SYNCH_FRAME) ? tu_str_std_request[xfer->setup->bRequest] : "Class Request"); - TU_LOG_BUF(CFG_TUH_LOG_LEVEL, xfer->setup, 8); + TU_LOG_BUF_USBH(xfer->setup, 8); TU_LOG_USBH("\r\n"); if (xfer->complete_cb) { @@ -665,9 +668,9 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result tusb_control_request_t const * request = &_ctrl_xfer.request; if (XFER_RESULT_SUCCESS != result) { - TU_LOG1("[%u:%u] Control %s, xferred_bytes = %lu\r\n", rhport, dev_addr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED", xferred_bytes); - TU_LOG1_BUF(request, 8); - TU_LOG1("\r\n"); + TU_LOG_USBH("[%u:%u] Control %s, xferred_bytes = %lu\r\n", rhport, dev_addr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED", xferred_bytes); + TU_LOG_BUF_USBH(request, 8); + TU_LOG_USBH("\r\n"); // terminate transfer if any stage failed _xfer_complete(dev_addr, result); @@ -685,7 +688,7 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result case CONTROL_STAGE_DATA: if (request->wLength) { TU_LOG_USBH("[%u:%u] Control data:\r\n", rhport, dev_addr); - TU_LOG_MEM(CFG_TUH_LOG_LEVEL, _ctrl_xfer.buffer, xferred_bytes, 2); + TU_LOG_MEM_USBH(_ctrl_xfer.buffer, xferred_bytes, 2); } _ctrl_xfer.actual_len = (uint16_t) xferred_bytes; @@ -860,7 +863,7 @@ bool usbh_edpt_xfer_with_callback(uint8_t dev_addr, uint8_t ep_addr, uint8_t * b // HCD error, mark endpoint as ready to allow next transfer ep_state->busy = 0; ep_state->claimed = 0; - TU_LOG1("Failed\r\n"); + TU_LOG_USBH("Failed\r\n"); // TU_BREAKPOINT(); return false; } @@ -1318,7 +1321,7 @@ static void process_enumeration(tuh_xfer_t* xfer) { if ( retry ) { failed_count++; osal_task_delay(ATTEMPT_DELAY_MS); // delay a bit - TU_LOG1("Enumeration attempt %u\r\n", failed_count); + TU_LOG_USBH("Enumeration attempt %u\r\n", failed_count); retry = tuh_control_xfer(xfer); } diff --git a/src/host/usbh_pvt.h b/src/host/usbh_pvt.h index 4a97a1c18..4ed2a72b5 100644 --- a/src/host/usbh_pvt.h +++ b/src/host/usbh_pvt.h @@ -35,7 +35,11 @@ extern "C" { #endif -#define TU_LOG_USBH(...) TU_LOG(CFG_TUH_LOG_LEVEL, __VA_ARGS__) +#define TU_LOG_USBH(...) TU_LOG(CFG_TUH_LOG_LEVEL, __VA_ARGS__) +#define TU_LOG_MEM_USBH(...) TU_LOG_MEM(CFG_TUH_LOG_LEVEL, __VA_ARGS__) +#define TU_LOG_BUF_USBH(...) TU_LOG_BUF(CFG_TUH_LOG_LEVEL, __VA_ARGS__) +#define TU_LOG_INT_USBH(...) TU_LOG_INT(CFG_TUH_LOG_LEVEL, __VA_ARGS__) +#define TU_LOG_HEX_USBH(...) TU_LOG_HEX(CFG_TUH_LOG_LEVEL, __VA_ARGS__) enum { USBH_EPSIZE_BULK_MAX = (TUH_OPT_HIGH_SPEED ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS) -- cgit v1.3.1 From 9a1559a35653e34c2fc8b4dccdc9f40ad476913c Mon Sep 17 00:00:00 2001 From: YixingShen Date: Thu, 28 Dec 2023 00:28:24 +0800 Subject: add __ARM_ARCH_8_1M_MAIN__ for M55 --- src/common/tusb_verify.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index 1b5f53dfc..8aa66b4df 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -75,8 +75,8 @@ #define _MESS_FAILED() do {} while (0) #endif -// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33 -#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) +// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33. M55 +#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) #define TU_BREAKPOINT() do \ { \ volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ -- cgit v1.3.1 From 1f2901e8b12258c953e3c338897f188c98b5eaed Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 15 Jan 2024 18:42:39 +0700 Subject: fix conflict of BIT() macro --- src/class/cdc/cdc_host.c | 2 +- src/class/cdc/serial/ch34x.h | 11 ++++------- src/common/tusb_common.h | 1 + 3 files changed, 6 insertions(+), 8 deletions(-) (limited to 'src/common') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 0cc35da52..ca5bfff04 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -1358,7 +1358,7 @@ static int32_t ch341_set_baudrate (cdch_interface_t* p_cdc, uint32_t baud_rate, * inverted. */ if ( p_cdc->ch34x.version > 0x27 ) { - val = (val | BIT(7)); + val = (val | TU_BIT(7)); } return ch341_write_reg ( p_cdc, CH341_REG_DIVISOR << 8 | CH341_REG_PRESCALER, val, complete_cb, user_data ); diff --git a/src/class/cdc/serial/ch34x.h b/src/class/cdc/serial/ch34x.h index 94e18b252..4a5e61bbd 100644 --- a/src/class/cdc/serial/ch34x.h +++ b/src/class/cdc/serial/ch34x.h @@ -29,7 +29,7 @@ #include -#define BIT(nr) ( (uint32_t)1 << (nr) ) +//#define BIT(nr) ( (uint32_t)1 << (nr) ) #define CH34X_BUFFER_SIZE 2 @@ -93,20 +93,17 @@ #define CH341_LCR_CS6 0x01 #define CH341_LCR_CS5 0x00 -#define CH341_QUIRK_LIMITED_PRESCALER BIT(0) -#define CH341_QUIRK_SIMULATE_BREAK BIT(1) +#define CH341_QUIRK_LIMITED_PRESCALER TU_BIT(0) +#define CH341_QUIRK_SIMULATE_BREAK TU_BIT(1) #define CH341_CLKRATE 48000000 #define CH341_CLK_DIV(ps, fact) (1 << (12 - 3 * (ps) - (fact))) #define CH341_MIN_RATE(ps) (CH341_CLKRATE / (CH341_CLK_DIV((ps), 1) * 512)) /* Supported range is 46 to 3000000 bps. */ -#define CH341_MIN_BPS DIV_ROUND_UP(CH341_CLKRATE, CH341_CLK_DIV(0, 0) * 256) +#define CH341_MIN_BPS TU_DIV_CEIL(CH341_CLKRATE, CH341_CLK_DIV(0, 0) * 256) #define CH341_MAX_BPS (CH341_CLKRATE / (CH341_CLK_DIV(3, 0) * 2)) -#define DIV_ROUND_UP __KERNEL_DIV_ROUND_UP -#define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) - // error codes #define EINVAL 22 /* Invalid argument */ diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index caeb5f2ef..1f08ce4ed 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -37,6 +37,7 @@ #define TU_ARRAY_SIZE(_arr) ( sizeof(_arr) / sizeof(_arr[0]) ) #define TU_MIN(_x, _y) ( ( (_x) < (_y) ) ? (_x) : (_y) ) #define TU_MAX(_x, _y) ( ( (_x) > (_y) ) ? (_x) : (_y) ) +#define TU_DIV_CEIL(n, d) (((n) + (d) - 1) / (d)) #define TU_U16(_high, _low) ((uint16_t) (((_high) << 8) | (_low))) #define TU_U16_HIGH(_u16) ((uint8_t) (((_u16) >> 8) & 0x00ff)) -- cgit v1.3.1 From 0b8b8af83dfac97caa7c41f9d5c8c1a3af1b9ac1 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 25 Jan 2024 17:25:48 +0700 Subject: minor update to video capture example --- examples/device/video_capture/src/main.c | 15 +- examples/device/video_capture/src/tusb_config.h | 2 +- .../device/video_capture/src/usb_descriptors.h | 69 +++------ src/class/video/video_device.c | 6 +- src/common/tusb_types.h | 154 ++++++++------------- 5 files changed, 92 insertions(+), 154 deletions(-) (limited to 'src/common') diff --git a/examples/device/video_capture/src/main.c b/examples/device/video_capture/src/main.c index 7b180dd6b..e63335e67 100644 --- a/examples/device/video_capture/src/main.c +++ b/examples/device/video_capture/src/main.c @@ -131,8 +131,7 @@ static struct { static uint8_t frame_buffer[FRAME_WIDTH * FRAME_HEIGHT * 16 / 8]; static void fill_color_bar(uint8_t* buffer, unsigned start_position) { - /* EBU color bars - * See also https://stackoverflow.com/questions/6939422 */ + /* EBU color bars: https://stackoverflow.com/questions/6939422 */ static uint8_t const bar_color[8][4] = { /* Y, U, Y, V */ { 235, 128, 235, 128}, /* 100% White */ @@ -184,12 +183,12 @@ void video_task(void) { already_sent = 1; start_ms = board_millis(); #ifdef CFG_EXAMPLE_VIDEO_READONLY -# if defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) + #if defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) tud_video_n_frame_xfer(0, 0, (void*)(uintptr_t)&frame_buffer[(frame_num % (FRAME_WIDTH / 2)) * 4], FRAME_WIDTH * FRAME_HEIGHT * 16/8); -# else + #else tud_video_n_frame_xfer(0, 0, (void*)(uintptr_t)frames[frame_num % 8].buffer, frames[frame_num % 8].size); -# endif + #endif #else fill_color_bar(frame_buffer, frame_num); tud_video_n_frame_xfer(0, 0, (void*) frame_buffer, FRAME_WIDTH * FRAME_HEIGHT * 16 / 8); @@ -202,12 +201,12 @@ void video_task(void) { start_ms += interval_ms; #ifdef CFG_EXAMPLE_VIDEO_READONLY -# if defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) + #if defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) tud_video_n_frame_xfer(0, 0, (void*)(uintptr_t)&frame_buffer[(frame_num % (FRAME_WIDTH / 2)) * 4], FRAME_WIDTH * FRAME_HEIGHT * 16/8); -# else + #else tud_video_n_frame_xfer(0, 0, (void*)(uintptr_t)frames[frame_num % 8].buffer, frames[frame_num % 8].size); -# endif + #endif #else fill_color_bar(frame_buffer, frame_num); tud_video_n_frame_xfer(0, 0, (void*) frame_buffer, FRAME_WIDTH * FRAME_HEIGHT * 16 / 8); diff --git a/examples/device/video_capture/src/tusb_config.h b/examples/device/video_capture/src/tusb_config.h index 8440b47ef..d563c6f5c 100644 --- a/examples/device/video_capture/src/tusb_config.h +++ b/examples/device/video_capture/src/tusb_config.h @@ -97,7 +97,7 @@ // The number of video streaming interfaces #define CFG_TUD_VIDEO_STREAMING 1 -// video streaming endpoint size +// video streaming endpoint buffer size #define CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE 256 // use bulk endpoint for streaming interface diff --git a/examples/device/video_capture/src/usb_descriptors.h b/examples/device/video_capture/src/usb_descriptors.h index b924c8dbe..fa3c1fbd2 100644 --- a/examples/device/video_capture/src/usb_descriptors.h +++ b/examples/device/video_capture/src/usb_descriptors.h @@ -126,23 +126,17 @@ enum { #define TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR(_stridx, _epin, _width, _height, _fps, _epsize) \ TUD_VIDEO_DESC_IAD(ITF_NUM_VIDEO_CONTROL, /* 2 Interfaces */ 0x02, _stridx), \ /* Video control 0 */ \ - TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ - TUD_VIDEO_DESC_CS_VC( /* UVC 1.5*/ 0x0150, \ - /* wTotalLength - bLength */ \ - TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, \ - UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ - TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0,\ - /*wObjectiveFocalLengthMin*/0, /*wObjectiveFocalLengthMax*/0,\ - /*wObjectiveFocalLength*/0, /*bmControls*/0), \ + TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ + /* Header: UVC 1.5, length of followed descs, clock (deprecated), streaming interfaces */ \ + TUD_VIDEO_DESC_CS_VC(0x0150, TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ + /* Camera Terminal: ID, bAssocTerminal, iTerminal, focal min, max, length, bmControl */ \ + TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0, 0, 0, 0, 0), \ TUD_VIDEO_DESC_OUTPUT_TERM(UVC_ENTITY_CAP_OUTPUT_TERMINAL, VIDEO_TT_STREAMING, 0, 1, 0), \ /* Video stream alt. 0 */ \ TUD_VIDEO_DESC_STD_VS(ITF_NUM_VIDEO_STREAMING, 0, 0, _stridx), \ /* Video stream header for without still image capture */ \ TUD_VIDEO_DESC_CS_VS_INPUT( /*bNumFormats*/1, \ - /*wTotalLength - bLength */\ - TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN\ - + TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN\ - + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ + /*wTotalLength - bLength */ TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN + TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ _epin, /*bmInfo*/0, /*bTerminalLink*/UVC_ENTITY_CAP_OUTPUT_TERMINAL, \ /*bStillCaptureMethod*/0, /*bTriggerSupport*/0, /*bTriggerUsage*/0, \ /*bmaControls(1)*/0), \ @@ -163,23 +157,17 @@ enum { #define TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG(_stridx, _epin, _width, _height, _fps, _epsize) \ TUD_VIDEO_DESC_IAD(ITF_NUM_VIDEO_CONTROL, /* 2 Interfaces */ 0x02, _stridx), \ /* Video control 0 */ \ - TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ - TUD_VIDEO_DESC_CS_VC( /* UVC 1.5*/ 0x0150, \ - /* wTotalLength - bLength */ \ - TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, \ - UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ - TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0,\ - /*wObjectiveFocalLengthMin*/0, /*wObjectiveFocalLengthMax*/0,\ - /*wObjectiveFocalLength*/0, /*bmControls*/0), \ + TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ + /* Header: UVC 1.5, length of followed descs, clock (deprecated), streaming interfaces */ \ + TUD_VIDEO_DESC_CS_VC(0x0150, TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ + /* Camera Terminal: ID, bAssocTerminal, iTerminal, focal min, max, length, bmControl */ \ + TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0, 0, 0, 0, 0), \ TUD_VIDEO_DESC_OUTPUT_TERM(UVC_ENTITY_CAP_OUTPUT_TERMINAL, VIDEO_TT_STREAMING, 0, 1, 0), \ /* Video stream alt. 0 */ \ TUD_VIDEO_DESC_STD_VS(ITF_NUM_VIDEO_STREAMING, 0, 0, _stridx), \ /* Video stream header for without still image capture */ \ TUD_VIDEO_DESC_CS_VS_INPUT( /*bNumFormats*/1, \ - /*wTotalLength - bLength */\ - TUD_VIDEO_DESC_CS_VS_FMT_MJPEG_LEN\ - + TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT_LEN\ - + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ + /*wTotalLength - bLength */ TUD_VIDEO_DESC_CS_VS_FMT_MJPEG_LEN + TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT_LEN + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ _epin, /*bmInfo*/0, /*bTerminalLink*/UVC_ENTITY_CAP_OUTPUT_TERMINAL, \ /*bStillCaptureMethod*/0, /*bTriggerSupport*/0, /*bTriggerUsage*/0, \ /*bmaControls(1)*/0), \ @@ -202,22 +190,17 @@ enum { TUD_VIDEO_DESC_IAD(ITF_NUM_VIDEO_CONTROL, /* 2 Interfaces */ 0x02, _stridx), \ /* Video control 0 */ \ TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ - TUD_VIDEO_DESC_CS_VC( /* UVC 1.5*/ 0x0150, \ - /* wTotalLength - bLength */ \ - TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, \ - UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ - TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0,\ - /*wObjectiveFocalLengthMin*/0, /*wObjectiveFocalLengthMax*/0,\ - /*wObjectiveFocalLength*/0, /*bmControls*/0), \ + /* Header: UVC 1.5, length of followed descs, clock (deprecated), streaming interfaces */ \ + TUD_VIDEO_DESC_CS_VC(0x0150, TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ + /* Camera Terminal: ID, bAssocTerminal, iTerminal, focal min, max, length, bmControl */ \ + TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0, 0, 0, 0, 0), \ TUD_VIDEO_DESC_OUTPUT_TERM(UVC_ENTITY_CAP_OUTPUT_TERMINAL, VIDEO_TT_STREAMING, 0, 1, 0), \ /* Video stream alt. 0 */ \ TUD_VIDEO_DESC_STD_VS(ITF_NUM_VIDEO_STREAMING, 0, 1, _stridx), \ /* Video stream header for without still image capture */ \ TUD_VIDEO_DESC_CS_VS_INPUT( /*bNumFormats*/1, \ /*wTotalLength - bLength */\ - TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN\ - + TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN\ - + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ + TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN + TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ _epin, /*bmInfo*/0, /*bTerminalLink*/UVC_ENTITY_CAP_OUTPUT_TERMINAL, \ /*bStillCaptureMethod*/0, /*bTriggerSupport*/0, /*bTriggerUsage*/0, \ /*bmaControls(1)*/0), \ @@ -235,23 +218,17 @@ enum { #define TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG_BULK(_stridx, _epin, _width, _height, _fps, _epsize) \ TUD_VIDEO_DESC_IAD(ITF_NUM_VIDEO_CONTROL, /* 2 Interfaces */ 0x02, _stridx), \ /* Video control 0 */ \ - TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ - TUD_VIDEO_DESC_CS_VC( /* UVC 1.5*/ 0x0150, \ - /* wTotalLength - bLength */ \ - TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, \ - UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ - TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0,\ - /*wObjectiveFocalLengthMin*/0, /*wObjectiveFocalLengthMax*/0,\ - /*wObjectiveFocalLength*/0, /*bmControls*/0), \ + TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ + /* Header: UVC 1.5, length of followed descs, clock (deprecated), streaming interfaces */ \ + TUD_VIDEO_DESC_CS_VC(0x0150, TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ + /* Camera Terminal: ID, bAssocTerminal, iTerminal, focal min, max, length, bmControl */ \ + TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0, 0, 0, 0, 0), \ TUD_VIDEO_DESC_OUTPUT_TERM(UVC_ENTITY_CAP_OUTPUT_TERMINAL, VIDEO_TT_STREAMING, 0, 1, 0), \ /* Video stream alt. 0 */ \ TUD_VIDEO_DESC_STD_VS(ITF_NUM_VIDEO_STREAMING, 0, 1, _stridx), \ /* Video stream header for without still image capture */ \ TUD_VIDEO_DESC_CS_VS_INPUT( /*bNumFormats*/1, \ - /*wTotalLength - bLength */\ - TUD_VIDEO_DESC_CS_VS_FMT_MJPEG_LEN\ - + TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT_LEN\ - + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ + /*wTotalLength - bLength */ TUD_VIDEO_DESC_CS_VS_FMT_MJPEG_LEN + TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT_LEN + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ _epin, /*bmInfo*/0, /*bTerminalLink*/UVC_ENTITY_CAP_OUTPUT_TERMINAL, \ /*bStillCaptureMethod*/0, /*bTriggerSupport*/0, /*bTriggerUsage*/0, \ /*bmaControls(1)*/0), \ diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index 3b29454a3..c16a45fcd 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -434,8 +434,9 @@ static bool _update_streaming_parameters(videod_streaming_interface_t const *stm uint_fast32_t interval_ms = interval / 10000; TU_ASSERT(interval_ms); uint_fast32_t payload_size = (frame_size + interval_ms - 1) / interval_ms + 2; - if (CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE < payload_size) + if (CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE < payload_size) { payload_size = CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE; + } param->dwMaxPayloadTransferSize = payload_size; return true; } @@ -577,8 +578,9 @@ static bool _negotiate_streaming_parameters(videod_streaming_interface_t const * } else { payload_size = (frame_size + interval_ms - 1) / interval_ms + 2; } - if (CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE < payload_size) + if (CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE < payload_size) { payload_size = CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE; + } param->dwMaxPayloadTransferSize = payload_size; } return true; diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index fab680989..d4ef1fd09 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -44,43 +44,38 @@ *------------------------------------------------------------------*/ /// defined base on EHCI specs value for Endpoint Speed -typedef enum -{ +typedef enum { TUSB_SPEED_FULL = 0, TUSB_SPEED_LOW = 1, TUSB_SPEED_HIGH = 2, TUSB_SPEED_INVALID = 0xff, -}tusb_speed_t; +} tusb_speed_t; /// defined base on USB Specs Endpoint's bmAttributes -typedef enum -{ +typedef enum { TUSB_XFER_CONTROL = 0 , TUSB_XFER_ISOCHRONOUS , TUSB_XFER_BULK , TUSB_XFER_INTERRUPT -}tusb_xfer_type_t; +} tusb_xfer_type_t; -typedef enum -{ +typedef enum { TUSB_DIR_OUT = 0, TUSB_DIR_IN = 1, TUSB_DIR_IN_MASK = 0x80 -}tusb_dir_t; +} tusb_dir_t; -enum -{ +enum { TUSB_EPSIZE_BULK_FS = 64, - TUSB_EPSIZE_BULK_HS= 512, + TUSB_EPSIZE_BULK_HS = 512, TUSB_EPSIZE_ISO_FS_MAX = 1023, TUSB_EPSIZE_ISO_HS_MAX = 1024, }; -/// Isochronous End Point Attributes -typedef enum -{ +/// Isochronous Endpoint Attributes +typedef enum { TUSB_ISO_EP_ATT_NO_SYNC = 0x00, TUSB_ISO_EP_ATT_ASYNCHRONOUS = 0x04, TUSB_ISO_EP_ATT_ADAPTIVE = 0x08, @@ -88,11 +83,10 @@ typedef enum TUSB_ISO_EP_ATT_DATA = 0x00, ///< Data End Point TUSB_ISO_EP_ATT_EXPLICIT_FB = 0x10, ///< Feedback End Point TUSB_ISO_EP_ATT_IMPLICIT_FB = 0x20, ///< Data endpoint that also serves as an implicit feedback -}tusb_iso_ep_attribute_t; +} tusb_iso_ep_attribute_t; /// USB Descriptor Types -typedef enum -{ +typedef enum { TUSB_DESC_DEVICE = 0x01, TUSB_DESC_CONFIGURATION = 0x02, TUSB_DESC_STRING = 0x03, @@ -119,10 +113,9 @@ typedef enum TUSB_DESC_SUPERSPEED_ENDPOINT_COMPANION = 0x30, TUSB_DESC_SUPERSPEED_ISO_ENDPOINT_COMPANION = 0x31 -}tusb_desc_type_t; +} tusb_desc_type_t; -typedef enum -{ +typedef enum { TUSB_REQ_GET_STATUS = 0 , TUSB_REQ_CLEAR_FEATURE = 1 , TUSB_REQ_RESERVED = 2 , @@ -136,25 +129,22 @@ typedef enum TUSB_REQ_GET_INTERFACE = 10 , TUSB_REQ_SET_INTERFACE = 11 , TUSB_REQ_SYNCH_FRAME = 12 -}tusb_request_code_t; +} tusb_request_code_t; -typedef enum -{ +typedef enum { TUSB_REQ_FEATURE_EDPT_HALT = 0, TUSB_REQ_FEATURE_REMOTE_WAKEUP = 1, TUSB_REQ_FEATURE_TEST_MODE = 2 -}tusb_request_feature_selector_t; +} tusb_request_feature_selector_t; -typedef enum -{ +typedef enum { TUSB_REQ_TYPE_STANDARD = 0, TUSB_REQ_TYPE_CLASS, TUSB_REQ_TYPE_VENDOR, TUSB_REQ_TYPE_INVALID } tusb_request_type_t; -typedef enum -{ +typedef enum { TUSB_REQ_RCPT_DEVICE =0, TUSB_REQ_RCPT_INTERFACE, TUSB_REQ_RCPT_ENDPOINT, @@ -162,8 +152,7 @@ typedef enum } tusb_request_recipient_t; // https://www.usb.org/defined-class-codes -typedef enum -{ +typedef enum { TUSB_CLASS_UNSPECIFIED = 0 , TUSB_CLASS_AUDIO = 1 , TUSB_CLASS_CDC = 2 , @@ -187,26 +176,23 @@ typedef enum TUSB_CLASS_MISC = 0xEF , TUSB_CLASS_APPLICATION_SPECIFIC = 0xFE , TUSB_CLASS_VENDOR_SPECIFIC = 0xFF -}tusb_class_code_t; +} tusb_class_code_t; typedef enum { MISC_SUBCLASS_COMMON = 2 }misc_subclass_type_t; -typedef enum -{ +typedef enum { MISC_PROTOCOL_IAD = 1 -}misc_protocol_type_t; +} misc_protocol_type_t; -typedef enum -{ +typedef enum { APP_SUBCLASS_USBTMC = 0x03, APP_SUBCLASS_DFU_RUNTIME = 0x01 } app_subclass_type_t; -typedef enum -{ +typedef enum { DEVICE_CAPABILITY_WIRELESS_USB = 0x01, DEVICE_CAPABILITY_USB20_EXTENSION = 0x02, DEVICE_CAPABILITY_SUPERSPEED_USB = 0x03, @@ -223,7 +209,7 @@ typedef enum DEVICE_CAPABILITY_AUTHENTICATION = 0x0E, DEVICE_CAPABILITY_BILLBOARD_EX = 0x0F, DEVICE_CAPABILITY_CONFIGURATION_SUMMARY = 0x10 -}device_capability_type_t; +} device_capability_type_t; enum { TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP = TU_BIT(5), @@ -235,28 +221,25 @@ enum { //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ -typedef enum -{ +typedef enum { XFER_RESULT_SUCCESS = 0, XFER_RESULT_FAILED, XFER_RESULT_STALLED, XFER_RESULT_TIMEOUT, XFER_RESULT_INVALID -}xfer_result_t; +} xfer_result_t; -enum // TODO remove -{ +// TODO remove +enum { DESC_OFFSET_LEN = 0, DESC_OFFSET_TYPE = 1 }; -enum -{ +enum { INTERFACE_INVALID_NUMBER = 0xff }; -typedef enum -{ +typedef enum { MS_OS_20_SET_HEADER_DESCRIPTOR = 0x00, MS_OS_20_SUBSET_HEADER_CONFIGURATION = 0x01, MS_OS_20_SUBSET_HEADER_FUNCTION = 0x02, @@ -268,16 +251,14 @@ typedef enum MS_OS_20_FEATURE_VENDOR_REVISION = 0x08 } microsoft_os_20_type_t; -enum -{ +enum { CONTROL_STAGE_IDLE, CONTROL_STAGE_SETUP, CONTROL_STAGE_DATA, CONTROL_STAGE_ACK }; -enum -{ +enum { TUSB_INDEX_INVALID_8 = 0xFFu }; @@ -290,8 +271,7 @@ TU_ATTR_PACKED_BEGIN TU_ATTR_BIT_FIELD_ORDER_BEGIN /// USB Device Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. uint8_t bDescriptorType ; ///< DEVICE Descriptor Type. uint16_t bcdUSB ; ///< BUSB Specification Release Number in Binary-Coded Decimal (i.e., 2.10 is 210H). This field identifies the release of the USB Specification with which the device and its descriptors are compliant. @@ -314,8 +294,7 @@ typedef struct TU_ATTR_PACKED TU_VERIFY_STATIC( sizeof(tusb_desc_device_t) == 18, "size is not correct"); // USB Binary Device Object Store (BOS) Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes uint8_t bDescriptorType ; ///< CONFIGURATION Descriptor Type uint16_t wTotalLength ; ///< Total length of data returned for this descriptor @@ -325,8 +304,7 @@ typedef struct TU_ATTR_PACKED TU_VERIFY_STATIC( sizeof(tusb_desc_bos_t) == 5, "size is not correct"); /// USB Configuration Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes uint8_t bDescriptorType ; ///< CONFIGURATION Descriptor Type uint16_t wTotalLength ; ///< Total length of data returned for this configuration. Includes the combined length of all descriptors (configuration, interface, endpoint, and class- or vendor-specific) returned for this configuration. @@ -341,8 +319,7 @@ typedef struct TU_ATTR_PACKED TU_VERIFY_STATIC( sizeof(tusb_desc_configuration_t) == 9, "size is not correct"); /// USB Interface Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes uint8_t bDescriptorType ; ///< INTERFACE Descriptor Type @@ -358,8 +335,7 @@ typedef struct TU_ATTR_PACKED TU_VERIFY_STATIC( sizeof(tusb_desc_interface_t) == 9, "size is not correct"); /// USB Endpoint Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; // Size of this descriptor in bytes uint8_t bDescriptorType ; // ENDPOINT Descriptor Type @@ -379,8 +355,7 @@ typedef struct TU_ATTR_PACKED TU_VERIFY_STATIC( sizeof(tusb_desc_endpoint_t) == 7, "size is not correct"); /// USB Other Speed Configuration Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of descriptor uint8_t bDescriptorType ; ///< Other_speed_Configuration Type uint16_t wTotalLength ; ///< Total length of data returned @@ -393,8 +368,7 @@ typedef struct TU_ATTR_PACKED } tusb_desc_other_speed_t; /// USB Device Qualifier Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of descriptor uint8_t bDescriptorType ; ///< Device Qualifier Type uint16_t bcdUSB ; ///< USB specification version number (e.g., 0200H for V2.00) @@ -411,8 +385,7 @@ typedef struct TU_ATTR_PACKED TU_VERIFY_STATIC( sizeof(tusb_desc_device_qualifier_t) == 10, "size is not correct"); /// USB Interface Association Descriptor (IAD ECN) -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of descriptor uint8_t bDescriptorType ; ///< Other_speed_Configuration Type @@ -427,16 +400,14 @@ typedef struct TU_ATTR_PACKED } tusb_desc_interface_assoc_t; // USB String Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes uint8_t bDescriptorType ; ///< Descriptor Type uint16_t unicode_string[]; } tusb_desc_string_t; // USB Binary Device Object Store (BOS) -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType ; uint8_t bDevCapabilityType; @@ -445,9 +416,8 @@ typedef struct TU_ATTR_PACKED uint8_t CapabilityData[]; } tusb_desc_bos_platform_t; -// USB WebuSB URL Descriptor -typedef struct TU_ATTR_PACKED -{ +// USB WebUSB URL Descriptor +typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; uint8_t bScheme; @@ -455,8 +425,7 @@ typedef struct TU_ATTR_PACKED } tusb_desc_webusb_url_t; // DFU Functional Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; @@ -481,7 +450,7 @@ typedef struct TU_ATTR_PACKED // //--------------------------------------------------------------------+ -typedef struct TU_ATTR_PACKED{ +typedef struct TU_ATTR_PACKED { union { struct TU_ATTR_PACKED { uint8_t recipient : 5; ///< Recipient type tusb_request_recipient_t. @@ -509,36 +478,30 @@ TU_ATTR_BIT_FIELD_ORDER_END //--------------------------------------------------------------------+ // Get direction from Endpoint address -TU_ATTR_ALWAYS_INLINE static inline tusb_dir_t tu_edpt_dir(uint8_t addr) -{ +TU_ATTR_ALWAYS_INLINE static inline tusb_dir_t tu_edpt_dir(uint8_t addr) { return (addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT; } // Get Endpoint number from address -TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_number(uint8_t addr) -{ +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_number(uint8_t addr) { return (uint8_t)(addr & (~TUSB_DIR_IN_MASK)); } -TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) -{ +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) { return (uint8_t)(num | (dir ? TUSB_DIR_IN_MASK : 0)); } -TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) -{ +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) { return tu_le16toh(desc_ep->wMaxPacketSize) & TU_GENMASK(10, 0); } #if CFG_TUSB_DEBUG -TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_dir_str(tusb_dir_t dir) -{ +TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_dir_str(tusb_dir_t dir) { tu_static const char *str[] = {"out", "in"}; return str[dir]; } -TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_t t) -{ +TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_t t) { tu_static const char *str[] = {"control", "isochronous", "bulk", "interrupt"}; return str[t]; } @@ -549,21 +512,18 @@ TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_ //--------------------------------------------------------------------+ // return next descriptor -TU_ATTR_ALWAYS_INLINE static inline uint8_t const * tu_desc_next(void const* desc) -{ +TU_ATTR_ALWAYS_INLINE static inline uint8_t const * tu_desc_next(void const* desc) { uint8_t const* desc8 = (uint8_t const*) desc; return desc8 + desc8[DESC_OFFSET_LEN]; } // get descriptor type -TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_type(void const* desc) -{ +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_type(void const* desc) { return ((uint8_t const*) desc)[DESC_OFFSET_TYPE]; } // get descriptor length -TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_len(void const* desc) -{ +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_len(void const* desc) { return ((uint8_t const*) desc)[DESC_OFFSET_LEN]; } -- cgit v1.3.1 From b5cd673330fc87f2981ecf139b24940df5cb3cfe Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 26 Jan 2024 22:55:55 +0700 Subject: rename and add more video descriptors use struct to define uvc descriptor for video_capture since uvc is rather too complicated to use macro templates --- .../device/video_capture/src/usb_descriptors.c | 233 +++++++++++++++++++-- .../device/video_capture/src/usb_descriptors.h | 4 +- src/class/video/video.h | 224 ++++++++++++++------ src/class/video/video_device.c | 20 +- src/common/tusb_types.h | 3 +- 5 files changed, 389 insertions(+), 95 deletions(-) (limited to 'src/common') diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c index d38f158c8..8e54d3afd 100644 --- a/examples/device/video_capture/src/usb_descriptors.c +++ b/examples/device/video_capture/src/usb_descriptors.c @@ -40,6 +40,26 @@ #define USB_VID 0xCafe #define USB_BCD 0x0200 +// String Descriptor Index +enum { + STRID_LANGID = 0, + STRID_MANUFACTURER, + STRID_PRODUCT, + STRID_SERIAL, + STRID_UVC_CONTROL, + STRID_UVC_STREAMING, +}; + +// array of pointer to string descriptors +char const* string_desc_arr[] = { + (const char[]) {0x09, 0x04}, // 0: is supported language is English (0x0409) + "TinyUSB", // 1: Manufacturer + "TinyUSB Device", // 2: Product + NULL, // 3: Serials will use unique ID if possible + "TinyUSB UVC Control", // 4: UVC Interface + "TinyUSB UVC Streaming", // 5: UVC Interface +}; + //--------------------------------------------------------------------+ // Device Descriptors //--------------------------------------------------------------------+ @@ -60,9 +80,9 @@ tusb_desc_device_t const desc_device = { .idProduct = USB_PID, .bcdDevice = 0x0100, - .iManufacturer = 0x01, - .iProduct = 0x02, - .iSerialNumber = 0x03, + .iManufacturer = STRID_MANUFACTURER, + .iProduct = STRID_PRODUCT, + .iSerialNumber = STRID_SERIAL, .bNumConfigurations = 0x01 }; @@ -164,6 +184,193 @@ uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index) { } #endif // highspeed +typedef struct TU_ATTR_PACKED { + tusb_desc_interface_t itf; + tusb_desc_video_control_header_1itf_t header; + tusb_desc_video_control_camera_terminal_t camera_terminal; + tusb_desc_video_control_output_terminal_t output_terminal; +} uvc_control_desc_t; + +/* Windows support YUY2 and NV12 + * https://docs.microsoft.com/en-us/windows-hardware/drivers/stream/usb-video-class-driver-overview */ + +typedef struct TU_ATTR_PACKED { + tusb_desc_interface_t itf; + tusb_desc_video_streaming_input_header_1byte_t header; + tusb_desc_video_format_uncompressed_t format; + tusb_desc_video_frame_uncompressed_continuous_t frame; + tusb_desc_video_streaming_color_matching_t color; + tusb_desc_endpoint_t ep; +} uvc_streaming_desc_t; + +typedef struct TU_ATTR_PACKED { + tusb_desc_configuration_t config; + tusb_desc_interface_assoc_t iad; + uvc_control_desc_t video_control; + uvc_streaming_desc_t video_streaming; +} uvc_cfg_desc_t; + +const uvc_cfg_desc_t config_desc = { + .config = { + .bLength = sizeof(tusb_desc_configuration_t), + .bDescriptorType = TUSB_DESC_CONFIGURATION, + + .wTotalLength = sizeof(uvc_cfg_desc_t), + .bNumInterfaces = ITF_NUM_TOTAL, + .bConfigurationValue = 1, + .iConfiguration = 0, + .bmAttributes = TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, + .bMaxPower = 100 / 2 + }, + .iad = { + .bLength = sizeof(tusb_desc_interface_assoc_t), + .bDescriptorType = TUSB_DESC_INTERFACE_ASSOCIATION, + + .bFirstInterface = ITF_NUM_VIDEO_CONTROL, + .bInterfaceCount = 2, + .bFunctionClass = TUSB_CLASS_VIDEO, + .bFunctionSubClass = VIDEO_SUBCLASS_INTERFACE_COLLECTION, + .bFunctionProtocol = VIDEO_ITF_PROTOCOL_UNDEFINED, + .iFunction = 0 + }, + + .video_control = { + .itf = { + .bLength = sizeof(tusb_desc_interface_t), + .bDescriptorType = TUSB_DESC_INTERFACE, + + .bInterfaceNumber = ITF_NUM_VIDEO_CONTROL, + .bAlternateSetting = 0, + .bNumEndpoints = 0, + .bInterfaceClass = TUSB_CLASS_VIDEO, + .bInterfaceSubClass = VIDEO_SUBCLASS_CONTROL, + .bInterfaceProtocol = VIDEO_ITF_PROTOCOL_15, + .iInterface = STRID_UVC_CONTROL + }, + .header = { + .bLength = sizeof(tusb_desc_video_control_header_1itf_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VC_HEADER, + + .bcdUVC = VIDEO_BCD_1_50, + .wTotalLength = sizeof(uvc_control_desc_t) - sizeof(tusb_desc_interface_t), // CS VC descriptors only + .dwClockFrequency = UVC_CLOCK_FREQUENCY, + .bInCollection = 1, + .baInterfaceNr = { ITF_NUM_VIDEO_STREAMING } + }, + .camera_terminal = { + .bLength = sizeof(tusb_desc_video_control_camera_terminal_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VC_INPUT_TERMINAL, + + .bTerminalID = UVC_ENTITY_CAP_INPUT_TERMINAL, + .wTerminalType = VIDEO_ITT_CAMERA, + .bAssocTerminal = 0, + .iTerminal = 0, + .wObjectiveFocalLengthMin = 0, + .wObjectiveFocalLengthMax = 0, + .wOcularFocalLength = 0, + .bControlSize = 3, + .bmControls = { 0, 0, 0 } + }, + .output_terminal = { + .bLength = sizeof(tusb_desc_video_control_output_terminal_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VC_OUTPUT_TERMINAL, + + .bTerminalID = UVC_ENTITY_CAP_OUTPUT_TERMINAL, + .wTerminalType = VIDEO_TT_STREAMING, + .bAssocTerminal = 0, + .bSourceID = UVC_ENTITY_CAP_INPUT_TERMINAL, + .iTerminal = 0 + } + }, + + .video_streaming = { + .itf = { + .bLength = sizeof(tusb_desc_interface_t), + .bDescriptorType = TUSB_DESC_INTERFACE, + + .bInterfaceNumber = ITF_NUM_VIDEO_STREAMING, + .bAlternateSetting = 0, + .bNumEndpoints = 1, + .bInterfaceClass = TUSB_CLASS_VIDEO, + .bInterfaceSubClass = VIDEO_SUBCLASS_STREAMING, + .bInterfaceProtocol = VIDEO_ITF_PROTOCOL_15, + .iInterface = STRID_UVC_STREAMING + }, + .header = { + .bLength = sizeof(tusb_desc_video_streaming_input_header_1byte_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VS_INPUT_HEADER, + + .bNumFormats = 1, + .wTotalLength = sizeof(uvc_streaming_desc_t) - sizeof(tusb_desc_interface_t) - sizeof(tusb_desc_endpoint_t), // CS VS descriptors only + .bEndpointAddress = EPNUM_VIDEO_IN, + .bmInfo = 0, + .bTerminalLink = UVC_ENTITY_CAP_OUTPUT_TERMINAL, + .bStillCaptureMethod = 0, + .bTriggerSupport = 0, + .bTriggerUsage = 0, + .bControlSize = 1, + .bmaControls = { 0 } + }, + .format = { + .bLength = sizeof(tusb_desc_video_format_uncompressed_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VS_FORMAT_UNCOMPRESSED, + + .bFormatIndex = 1, // 1-based index + .bNumFrameDescriptors = 1, + .guidFormat = { TUD_VIDEO_GUID_YUY2 }, + .bBitsPerPixel = 16, + .bDefaultFrameIndex = 1, + .bAspectRatioX = 0, + .bAspectRatioY = 0, + .bmInterlaceFlags = 0, + .bCopyProtect = 0 + }, + .frame = { + .bLength = sizeof(tusb_desc_video_frame_uncompressed_continuous_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VS_FRAME_UNCOMPRESSED, + + .bFrameIndex = 1, // 1-based index + .bmCapabilities = 0, + .wWidth = FRAME_WIDTH, + .wHeight = FRAME_HEIGHT, + .dwMinBitRate = FRAME_WIDTH * FRAME_HEIGHT * 16 * 1, + .dwMaxBitRate = FRAME_WIDTH * FRAME_HEIGHT * 16 * FRAME_RATE, + .dwMaxVideoFrameBufferSize = FRAME_WIDTH * FRAME_HEIGHT * 16 / 8, + .dwDefaultFrameInterval = 10000000 / FRAME_RATE, + .bFrameIntervalType = 0, // continuous + .dwFrameInterval = { + 10000000 / FRAME_RATE, // min + 10000000, // max + 10000000 / FRAME_RATE // step + } + }, + .color = { + .bLength = sizeof(tusb_desc_video_streaming_color_matching_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VS_COLORFORMAT, + + .bColorPrimaries = VIDEO_COLOR_PRIMARIES_BT709, + .bTransferCharacteristics = VIDEO_COLOR_XFER_CH_BT709, + .bMatrixCoefficients = VIDEO_COLOR_COEF_SMPTE170M + }, + .ep = { + .bLength = sizeof(tusb_desc_endpoint_t), + .bDescriptorType = TUSB_DESC_ENDPOINT, + + .bEndpointAddress = EPNUM_VIDEO_IN, + .bmAttributes = { .xfer = TUSB_XFER_BULK }, + .wMaxPacketSize = CFG_TUD_VIDEO_STREAMING_BULK ? 64 : CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE, + .bInterval = 1 + } + } +}; + // Invoked when received GET CONFIGURATION DESCRIPTOR // Application return pointer to descriptor // Descriptor contents must exist long enough for transfer to complete @@ -174,7 +381,8 @@ uint8_t const* tud_descriptor_configuration_cb(uint8_t index) { // Although we are highspeed, host may be fullspeed. return (tud_speed_get() == TUSB_SPEED_HIGH) ? desc_hs_configuration : desc_fs_configuration; #else - return desc_fs_configuration; +// return desc_fs_configuration; + return (uint8_t const*) &config_desc; #endif } @@ -182,23 +390,6 @@ uint8_t const* tud_descriptor_configuration_cb(uint8_t index) { // String Descriptors //--------------------------------------------------------------------+ -// String Descriptor Index -enum { - STRID_LANGID = 0, - STRID_MANUFACTURER, - STRID_PRODUCT, - STRID_SERIAL, -}; - -// array of pointer to string descriptors -char const* string_desc_arr[] = { - (const char[]) {0x09, 0x04}, // 0: is supported language is English (0x0409) - "TinyUSB", // 1: Manufacturer - "TinyUSB Device", // 2: Product - NULL, // 3: Serials will use unique ID if possible - "TinyUSB UVC", // 4: UVC Interface -}; - static uint16_t _desc_str[32 + 1]; // Invoked when received GET STRING DESCRIPTOR request diff --git a/examples/device/video_capture/src/usb_descriptors.h b/examples/device/video_capture/src/usb_descriptors.h index fa3c1fbd2..fd908c9c2 100644 --- a/examples/device/video_capture/src/usb_descriptors.h +++ b/examples/device/video_capture/src/usb_descriptors.h @@ -210,7 +210,7 @@ enum { /* Video stream frame format */ \ TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT(/*bFrameIndex */1, 0, _width, _height, \ _width * _height * 16, _width * _height * 16 * _fps, \ - _width * _height * 16, \ + _width * _height * 16 / 8, \ (10000000/_fps), (10000000/_fps), (10000000/_fps)*_fps, (10000000/_fps)), \ TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING(VIDEO_COLOR_PRIMARIES_BT709, VIDEO_COLOR_XFER_CH_BT709, VIDEO_COLOR_COEF_SMPTE170M), \ TUD_VIDEO_DESC_EP_BULK(_epin, _epsize, 1) @@ -223,7 +223,7 @@ enum { TUD_VIDEO_DESC_CS_VC(0x0150, TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ /* Camera Terminal: ID, bAssocTerminal, iTerminal, focal min, max, length, bmControl */ \ TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0, 0, 0, 0, 0), \ - TUD_VIDEO_DESC_OUTPUT_TERM(UVC_ENTITY_CAP_OUTPUT_TERMINAL, VIDEO_TT_STREAMING, 0, 1, 0), \ + TUD_VIDEO_DESC_OUTPUT_TERM(UVC_ENTITY_CAP_OUTPUT_TERMINAL, VIDEO_TT_STREAMING, 0, UVC_ENTITY_CAP_INPUT_TERMINAL, 0), \ /* Video stream alt. 0 */ \ TUD_VIDEO_DESC_STD_VS(ITF_NUM_VIDEO_STREAMING, 0, 1, _stridx), \ /* Video stream header for without still image capture */ \ diff --git a/src/class/video/video.h b/src/class/video/video.h index d9880c291..162d4e4c4 100644 --- a/src/class/video/video.h +++ b/src/class/video/video.h @@ -29,6 +29,10 @@ #include "common/tusb_common.h" +enum { + VIDEO_BCD_1_50 = 0x0150, +}; + // Table 3-19 Color Matching Descriptor typedef enum { VIDEO_COLOR_PRIMARIES_UNDEFINED = 0x00, @@ -198,55 +202,98 @@ typedef enum { } video_terminal_type_t; //--------------------------------------------------------------------+ -// Descriptors +// Video Control (VC) Descriptors //--------------------------------------------------------------------+ /* 2.3.4.2 */ +#define tusb_desc_video_control_header_nitf_t(_nitf) \ + struct TU_ATTR_PACKED { \ + uint8_t bLength; \ + uint8_t bDescriptorType; \ + uint8_t bDescriptorSubType; \ + uint16_t bcdUVC; \ + uint16_t wTotalLength; \ + uint32_t dwClockFrequency; /* deprecated */ \ + uint8_t bInCollection; \ + uint8_t baInterfaceNr[_nitf]; \ + } + +typedef tusb_desc_video_control_header_nitf_t() tusb_desc_video_control_header_t; +typedef tusb_desc_video_control_header_nitf_t(1) tusb_desc_video_control_header_1itf_t; +typedef tusb_desc_video_control_header_nitf_t(2) tusb_desc_video_control_header_2itf_t; +typedef tusb_desc_video_control_header_nitf_t(3) tusb_desc_video_control_header_3itf_t; +typedef tusb_desc_video_control_header_nitf_t(4) tusb_desc_video_control_header_4itf_t; + typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; uint8_t bDescriptorSubType; - uint16_t bcdUVC; - uint16_t wTotalLength; - uint32_t dwClockFrequency; - uint8_t bInCollection; - uint8_t baInterfaceNr[]; -} tusb_desc_cs_video_ctl_itf_hdr_t; + uint8_t bTerminalID; + uint16_t wTerminalType; + uint8_t bAssocTerminal; + uint8_t iTerminal; +} tusb_desc_video_control_input_terminal_t; + +TU_VERIFY_STATIC(sizeof(tusb_desc_video_control_input_terminal_t) == 8, "size is not correct"); -/* 2.4.3.3 */ typedef struct TU_ATTR_PACKED { - uint8_t bHeaderLength; - union { - uint8_t bmHeaderInfo; - struct { - uint8_t FrameID: 1; - uint8_t EndOfFrame: 1; - uint8_t PresentationTime: 1; - uint8_t SourceClockReference: 1; - uint8_t PayloadSpecific: 1; - uint8_t StillImage: 1; - uint8_t Error: 1; - uint8_t EndOfHeader: 1; - }; - }; -} tusb_video_payload_header_t; + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bDescriptorSubType; + uint8_t bTerminalID; + uint16_t wTerminalType; + uint8_t bAssocTerminal; + uint8_t bSourceID; + uint8_t iTerminal; +} tusb_desc_video_control_output_terminal_t; + +TU_VERIFY_STATIC(sizeof(tusb_desc_video_control_output_terminal_t) == 9, "size is not correct"); -/* 3.9.2.1 */ typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; uint8_t bDescriptorSubType; - uint8_t bNumFormats; - uint16_t wTotalLength; - uint8_t bEndpointAddress; - uint8_t bmInfo; - uint8_t bTerminalLink; - uint8_t bStillCaptureMethod; - uint8_t bTriggerSupport; - uint8_t bTriggerUsage; + uint8_t bTerminalID; + uint16_t wTerminalType; + uint8_t bAssocTerminal; + uint8_t iTerminal; + + uint16_t wObjectiveFocalLengthMin; + uint16_t wObjectiveFocalLengthMax; + uint16_t wOcularFocalLength; uint8_t bControlSize; - uint8_t bmaControls[]; -} tusb_desc_cs_video_stm_itf_in_hdr_t; + uint8_t bmControls[3]; +} tusb_desc_video_control_camera_terminal_t; + +TU_VERIFY_STATIC(sizeof(tusb_desc_video_control_camera_terminal_t) == 18, "size is not correct"); + +//--------------------------------------------------------------------+ +// Video Streaming (VS) Descriptors +//--------------------------------------------------------------------+ + +/* 3.9.2.1 */ +#define tusb_desc_video_streaming_input_header_nbyte_t(_nb) \ + struct TU_ATTR_PACKED { \ + uint8_t bLength; \ + uint8_t bDescriptorType; \ + uint8_t bDescriptorSubType; \ + uint8_t bNumFormats; /* Number of video payload Format descriptors for this interface */ \ + uint16_t wTotalLength; \ + uint8_t bEndpointAddress; \ + uint8_t bmInfo; /* Bit 0: dynamic format change supported */ \ + uint8_t bTerminalLink; \ + uint8_t bStillCaptureMethod; \ + uint8_t bTriggerSupport; /* Hardware trigger supported */ \ + uint8_t bTriggerUsage; \ + uint8_t bControlSize; /* sizeof of each control item */ \ + uint8_t bmaControls[_nb]; \ + } + +typedef tusb_desc_video_streaming_input_header_nbyte_t() tusb_desc_video_streaming_input_header_t; +typedef tusb_desc_video_streaming_input_header_nbyte_t(1) tusb_desc_video_streaming_input_header_1byte_t; +typedef tusb_desc_video_streaming_input_header_nbyte_t(2) tusb_desc_video_streaming_input_header_2byte_t; +typedef tusb_desc_video_streaming_input_header_nbyte_t(3) tusb_desc_video_streaming_input_header_3byte_t; +typedef tusb_desc_video_streaming_input_header_nbyte_t(4) tusb_desc_video_streaming_input_header_4byte_t; /* 3.9.2.2 */ typedef struct TU_ATTR_PACKED { @@ -259,7 +306,7 @@ typedef struct TU_ATTR_PACKED { uint8_t bTerminalLink; uint8_t bControlSize; uint8_t bmaControls[]; -} tusb_desc_cs_video_stm_itf_out_hdr_t; +} tusb_desc_video_streaming_output_header_t; typedef struct TU_ATTR_PACKED { uint8_t bLength; @@ -285,14 +332,33 @@ typedef struct TU_ATTR_PACKED { uint8_t bmaControls[]; } output; }; -} tusb_desc_cs_video_stm_itf_hdr_t; +} tusb_desc_video_streaming_inout_header_t; +// 3.9.2.6 Color Matching Descriptor +typedef struct TU_ATTR_PACKED { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bDescriptorSubType; + uint8_t bColorPrimaries; + uint8_t bTransferCharacteristics; + uint8_t bMatrixCoefficients; +} tusb_desc_video_streaming_color_matching_t; + +TU_VERIFY_STATIC(sizeof(tusb_desc_video_streaming_color_matching_t) == 6, "size is not correct"); + +//--------------------------------------------------------------------+ +// Format and Frame Descriptor +// Note: bFormatIndex & bFrameIndex are 1-based index +//--------------------------------------------------------------------+ + +//------------- Uncompressed -------------// +// Uncompressed payload specs: 3.1.1 format descriptor typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; uint8_t bDescriptorSubType; uint8_t bFormatIndex; - uint8_t bNumFrameDescriptors; + uint8_t bNumFrameDescriptors; // Number of frame descriptors for this format uint8_t guidFormat[16]; uint8_t bBitsPerPixel; uint8_t bDefaultFrameIndex; @@ -300,8 +366,39 @@ typedef struct TU_ATTR_PACKED { uint8_t bAspectRatioY; uint8_t bmInterlaceFlags; uint8_t bCopyProtect; -} tusb_desc_cs_video_fmt_uncompressed_t; - +} tusb_desc_video_format_uncompressed_t; + +// Uncompressed payload specs: 3.1.2 frame descriptor +#define tusb_desc_video_frame_uncompressed_nint_t(_nint) \ + struct TU_ATTR_PACKED { \ + uint8_t bLength; \ + uint8_t bDescriptorType; \ + uint8_t bDescriptorSubType; \ + uint8_t bFrameIndex; \ + uint8_t bmCapabilities; \ + uint16_t wWidth; \ + uint16_t wHeight; \ + uint32_t dwMinBitRate; \ + uint32_t dwMaxBitRate; \ + uint32_t dwMaxVideoFrameBufferSize; /* deprecated in 1.5 */ \ + uint32_t dwDefaultFrameInterval; \ + uint8_t bFrameIntervalType; \ + uint32_t dwFrameInterval[_nint]; \ + } + +typedef tusb_desc_video_frame_uncompressed_nint_t() tusb_desc_video_frame_uncompressed_t; +typedef tusb_desc_video_frame_uncompressed_nint_t(1) tusb_desc_video_frame_uncompressed_1int_t; +typedef tusb_desc_video_frame_uncompressed_nint_t(2) tusb_desc_video_frame_uncompressed_2int_t; +typedef tusb_desc_video_frame_uncompressed_nint_t(3) tusb_desc_video_frame_uncompressed_3int_t; +typedef tusb_desc_video_frame_uncompressed_nint_t(4) tusb_desc_video_frame_uncompressed_4int_t; + +// continuous = 3 intervals: min, max, step +typedef tusb_desc_video_frame_uncompressed_3int_t tusb_desc_video_frame_uncompressed_continuous_t; + +TU_VERIFY_STATIC(sizeof(tusb_desc_video_frame_uncompressed_continuous_t) == 38, "size is not correct"); + +//------------- MJPEG -------------// +// MJPEG payload specs: 3.1.1 formatt descriptor typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; @@ -314,8 +411,12 @@ typedef struct TU_ATTR_PACKED { uint8_t bAspectRatioY; uint8_t bmInterlaceFlags; uint8_t bCopyProtect; -} tusb_desc_cs_video_fmt_mjpeg_t; +} tusb_desc_video_format_mjpeg_t; +// MJPEG payload specs: 3.1.2 frame descriptor (same as uncompressed) +typedef tusb_desc_video_frame_uncompressed_t tusb_desc_video_frame_mjpeg_t; + +// DV payload specs: 3.1.1 typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; @@ -323,8 +424,9 @@ typedef struct TU_ATTR_PACKED { uint8_t bFormatIndex; uint32_t dwMaxVideoFrameBufferSize; /* deprecated */ uint8_t bFormatType; -} tusb_desc_cs_video_fmt_dv_t; +} tusb_desc_video_format_dv_t; +// Frame Based payload specs: 3.1.1 typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; @@ -339,25 +441,7 @@ typedef struct TU_ATTR_PACKED { uint8_t bmInterlaceFlags; uint8_t bCopyProtect; uint8_t bVaribaleSize; -} tusb_desc_cs_video_fmt_frame_based_t; - -typedef struct TU_ATTR_PACKED { - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubType; - uint8_t bFrameIndex; - uint8_t bmCapabilities; - uint16_t wWidth; - uint16_t wHeight; - uint32_t dwMinBitRate; - uint32_t dwMaxBitRate; - uint32_t dwMaxVideoFrameBufferSize; /* deprecated */ - uint32_t dwDefaultFrameInterval; - uint8_t bFrameIntervalType; - uint32_t dwFrameInterval[]; -} tusb_desc_cs_video_frm_uncompressed_t; - -typedef tusb_desc_cs_video_frm_uncompressed_t tusb_desc_cs_video_frm_mjpeg_t; +} tusb_desc_video_format_framebased_t; typedef struct TU_ATTR_PACKED { uint8_t bLength; @@ -373,12 +457,30 @@ typedef struct TU_ATTR_PACKED { uint8_t bFrameIntervalType; uint32_t dwBytesPerLine; uint32_t dwFrameInterval[]; -} tusb_desc_cs_video_frm_frame_based_t; +} tusb_desc_video_frame_framebased_t; //--------------------------------------------------------------------+ // Requests //--------------------------------------------------------------------+ +/* 2.4.3.3 */ +typedef struct TU_ATTR_PACKED { + uint8_t bHeaderLength; + union { + uint8_t bmHeaderInfo; + struct { + uint8_t FrameID: 1; + uint8_t EndOfFrame: 1; + uint8_t PresentationTime: 1; + uint8_t SourceClockReference: 1; + uint8_t PayloadSpecific: 1; + uint8_t StillImage: 1; + uint8_t Error: 1; + uint8_t EndOfHeader: 1; + }; + }; +} tusb_video_payload_header_t; + /* 4.3.1.1 */ typedef struct TU_ATTR_PACKED { union { diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index c16a45fcd..1affd615e 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -50,17 +50,17 @@ typedef struct { tusb_desc_interface_t std; - tusb_desc_cs_video_ctl_itf_hdr_t ctl; + tusb_desc_video_control_header_t ctl; } tusb_desc_vc_itf_t; typedef struct { tusb_desc_interface_t std; - tusb_desc_cs_video_stm_itf_hdr_t stm; + tusb_desc_video_streaming_inout_header_t stm; } tusb_desc_vs_itf_t; typedef union { - tusb_desc_cs_video_ctl_itf_hdr_t ctl; - tusb_desc_cs_video_stm_itf_hdr_t stm; + tusb_desc_video_control_header_t ctl; + tusb_desc_video_streaming_inout_header_t stm; } tusb_desc_video_itf_hdr_t; typedef struct TU_ATTR_PACKED { @@ -78,9 +78,9 @@ typedef union { uint8_t bFormatIndex; uint8_t bNumFrameDescriptors; }; - tusb_desc_cs_video_fmt_uncompressed_t uncompressed; - tusb_desc_cs_video_fmt_mjpeg_t mjpeg; - tusb_desc_cs_video_fmt_frame_based_t frame_based; + tusb_desc_video_format_uncompressed_t uncompressed; + tusb_desc_video_format_mjpeg_t mjpeg; + tusb_desc_video_format_framebased_t frame_based; } tusb_desc_cs_video_fmt_t; typedef union { @@ -93,9 +93,9 @@ typedef union { uint16_t wWidth; uint16_t wHeight; }; - tusb_desc_cs_video_frm_uncompressed_t uncompressed; - tusb_desc_cs_video_frm_mjpeg_t mjpeg; - tusb_desc_cs_video_frm_frame_based_t frame_based; + tusb_desc_video_frame_uncompressed_t uncompressed; + tusb_desc_video_frame_mjpeg_t mjpeg; + tusb_desc_video_frame_framebased_t frame_based; } tusb_desc_cs_video_frm_t; /* video streaming interface */ diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index d4ef1fd09..2c5dce723 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -399,6 +399,8 @@ typedef struct TU_ATTR_PACKED { uint8_t iFunction ; ///< Index of the string descriptor describing the interface association. } tusb_desc_interface_assoc_t; +TU_VERIFY_STATIC( sizeof(tusb_desc_interface_assoc_t) == 8, "size is not correct"); + // USB String Descriptor typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes @@ -469,7 +471,6 @@ typedef struct TU_ATTR_PACKED { TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct"); - TU_ATTR_PACKED_END // End of all packed definitions TU_ATTR_BIT_FIELD_ORDER_END -- cgit v1.3.1 From 6c4a5292a6a59dec1b7f37be42725ea85205f3c9 Mon Sep 17 00:00:00 2001 From: Jerry Palacios Date: Wed, 7 Feb 2024 17:03:13 -0600 Subject: Back to original --- .github/workflows/build_aarch64.yml | 2 +- .github/workflows/build_arm.yml | 2 +- .github/workflows/build_esp.yml | 6 +- .github/workflows/build_iar.yml | 2 + .github/workflows/build_msp430.yml | 2 +- .github/workflows/build_renesas.yml | 2 +- .github/workflows/build_riscv.yml | 2 +- .github/workflows/build_win_mac.yml | 2 +- .github/workflows/cmake_arm.yml | 4 +- .github/workflows/pre-commit.yml | 2 +- examples/device/video_capture/src/CMakeLists.txt | 4 + examples/device/video_capture/src/images.h | 3 + examples/device/video_capture/src/main.c | 228 +++-- examples/device/video_capture/src/tusb_config.h | 12 +- .../device/video_capture/src/usb_descriptors.c | 450 +++++++--- .../device/video_capture/src/usb_descriptors.h | 87 +- examples/host/cdc_msc_hid/src/cdc_app.c | 76 +- examples/host/cdc_msc_hid/src/tusb_config.h | 1 + .../host/cdc_msc_hid_freertos/src/tusb_config.h | 1 + hw/bsp/board_api.h | 19 +- hw/bsp/espressif/boards/family.c | 30 +- hw/bsp/espressif/components/led_strip/CHANGELOG.md | 38 + .../espressif/components/led_strip/CMakeLists.txt | 27 +- hw/bsp/espressif/components/led_strip/LICENSE | 202 +++++ hw/bsp/espressif/components/led_strip/README.md | 97 +++ hw/bsp/espressif/components/led_strip/api.md | 454 ++++++++++ .../examples/led_strip_rmt_ws2812/CMakeLists.txt | 9 + .../examples/led_strip_rmt_ws2812/README.md | 31 + .../led_strip_rmt_ws2812/dependencies.lock | 15 + .../led_strip_rmt_ws2812/main/CMakeLists.txt | 2 + .../led_strip_rmt_ws2812/main/idf_component.yml | 5 + .../main/led_strip_rmt_ws2812_main.c | 75 ++ .../components/led_strip/idf_component.yml | 5 + .../components/led_strip/include/led_strip.h | 191 ++--- .../components/led_strip/include/led_strip_rmt.h | 53 ++ .../components/led_strip/include/led_strip_spi.h | 46 ++ .../components/led_strip/include/led_strip_types.h | 54 ++ .../led_strip/interface/led_strip_interface.h | 95 +++ .../components/led_strip/src/led_strip_api.c | 94 +++ .../components/led_strip/src/led_strip_rmt_dev.c | 164 ++++ .../led_strip/src/led_strip_rmt_dev_idf4.c | 194 +++++ .../led_strip/src/led_strip_rmt_encoder.c | 146 ++++ .../led_strip/src/led_strip_rmt_encoder.h | 38 + .../led_strip/src/led_strip_rmt_ws2812.c | 171 ---- .../components/led_strip/src/led_strip_spi_dev.c | 209 +++++ hw/bsp/family_support.cmake | 1 - hw/bsp/mcx/boards/bunny-brain/board.cmake | 21 - hw/bsp/mcx/boards/bunny-brain/board.h | 66 -- hw/bsp/mcx/boards/bunny-brain/board.mk | 11 - hw/bsp/mcx/boards/bunny-brain/clock_config.c | 338 -------- hw/bsp/mcx/boards/bunny-brain/clock_config.h | 177 ---- hw/bsp/mcx/boards/bunny-brain/pin_mux.c | 141 ---- hw/bsp/mcx/boards/bunny-brain/pin_mux.h | 51 -- hw/bsp/mcx/boards/frdm-mcxn947/board.cmake | 21 - hw/bsp/mcx/boards/frdm-mcxn947/board.h | 66 -- hw/bsp/mcx/boards/frdm-mcxn947/board.mk | 11 - hw/bsp/mcx/boards/frdm-mcxn947/clock_config.c | 338 -------- hw/bsp/mcx/boards/frdm-mcxn947/clock_config.h | 177 ---- hw/bsp/mcx/boards/frdm-mcxn947/pin_mux.c | 143 ---- hw/bsp/mcx/boards/frdm-mcxn947/pin_mux.h | 51 -- src/class/audio/audio_device.c | 2 +- src/class/cdc/cdc.h | 20 +- src/class/cdc/cdc_host.c | 916 ++++++++++++++++----- src/class/cdc/cdc_host.h | 13 +- src/class/cdc/serial/ch34x.h | 84 ++ src/class/hid/hid_host.c | 6 +- src/class/vendor/vendor_device.c | 8 +- src/class/video/video.h | 236 ++++-- src/class/video/video_device.c | 26 +- src/common/tusb_common.h | 1 + src/common/tusb_types.h | 157 ++-- src/portable/synopsys/dwc2/dcd_dwc2.c | 4 +- src/tusb_option.h | 17 + test/hil/hil_test.py | 11 +- 74 files changed, 3839 insertions(+), 2627 deletions(-) create mode 100644 examples/device/video_capture/src/CMakeLists.txt create mode 100644 hw/bsp/espressif/components/led_strip/CHANGELOG.md create mode 100644 hw/bsp/espressif/components/led_strip/LICENSE create mode 100644 hw/bsp/espressif/components/led_strip/README.md create mode 100644 hw/bsp/espressif/components/led_strip/api.md create mode 100644 hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/CMakeLists.txt create mode 100644 hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/README.md create mode 100644 hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/dependencies.lock create mode 100644 hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/main/CMakeLists.txt create mode 100644 hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/main/idf_component.yml create mode 100644 hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/main/led_strip_rmt_ws2812_main.c create mode 100644 hw/bsp/espressif/components/led_strip/idf_component.yml create mode 100644 hw/bsp/espressif/components/led_strip/include/led_strip_rmt.h create mode 100644 hw/bsp/espressif/components/led_strip/include/led_strip_spi.h create mode 100644 hw/bsp/espressif/components/led_strip/include/led_strip_types.h create mode 100644 hw/bsp/espressif/components/led_strip/interface/led_strip_interface.h create mode 100644 hw/bsp/espressif/components/led_strip/src/led_strip_api.c create mode 100644 hw/bsp/espressif/components/led_strip/src/led_strip_rmt_dev.c create mode 100644 hw/bsp/espressif/components/led_strip/src/led_strip_rmt_dev_idf4.c create mode 100644 hw/bsp/espressif/components/led_strip/src/led_strip_rmt_encoder.c create mode 100644 hw/bsp/espressif/components/led_strip/src/led_strip_rmt_encoder.h delete mode 100644 hw/bsp/espressif/components/led_strip/src/led_strip_rmt_ws2812.c create mode 100644 hw/bsp/espressif/components/led_strip/src/led_strip_spi_dev.c delete mode 100644 hw/bsp/mcx/boards/bunny-brain/board.cmake delete mode 100644 hw/bsp/mcx/boards/bunny-brain/board.h delete mode 100644 hw/bsp/mcx/boards/bunny-brain/board.mk delete mode 100644 hw/bsp/mcx/boards/bunny-brain/clock_config.c delete mode 100644 hw/bsp/mcx/boards/bunny-brain/clock_config.h delete mode 100644 hw/bsp/mcx/boards/bunny-brain/pin_mux.c delete mode 100644 hw/bsp/mcx/boards/bunny-brain/pin_mux.h delete mode 100644 hw/bsp/mcx/boards/frdm-mcxn947/board.cmake delete mode 100644 hw/bsp/mcx/boards/frdm-mcxn947/board.h delete mode 100644 hw/bsp/mcx/boards/frdm-mcxn947/board.mk delete mode 100644 hw/bsp/mcx/boards/frdm-mcxn947/clock_config.c delete mode 100644 hw/bsp/mcx/boards/frdm-mcxn947/clock_config.h delete mode 100644 hw/bsp/mcx/boards/frdm-mcxn947/pin_mux.c delete mode 100644 hw/bsp/mcx/boards/frdm-mcxn947/pin_mux.h create mode 100644 src/class/cdc/serial/ch34x.h (limited to 'src/common') diff --git a/.github/workflows/build_aarch64.yml b/.github/workflows/build_aarch64.yml index 40fc8d63a..e5dbf9494 100644 --- a/.github/workflows/build_aarch64.yml +++ b/.github/workflows/build_aarch64.yml @@ -36,7 +36,7 @@ jobs: - 'broadcom_64bit' steps: - name: Setup Python - uses: actions/setup-python@v4 + uses: actions/setup-python@v5 with: python-version: '3.x' diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index 4127db5bf..9f3270c91 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -46,7 +46,7 @@ jobs: - 'tm4c123 xmc4000' steps: - name: Setup Python - uses: actions/setup-python@v4 + uses: actions/setup-python@v5 with: python-version: '3.x' diff --git a/.github/workflows/build_esp.yml b/.github/workflows/build_esp.yml index 33caa0edb..8fbdb31ff 100644 --- a/.github/workflows/build_esp.yml +++ b/.github/workflows/build_esp.yml @@ -8,6 +8,7 @@ on: - 'examples/**' - 'lib/**' - 'hw/**' + - 'test/hil/**' - '.github/workflows/build_esp.yml' pull_request: branches: [ master ] @@ -16,6 +17,7 @@ on: - 'examples/**' - 'lib/**' - 'hw/**' + - 'test/hil/**' - '.github/workflows/build_esp.yml' concurrency: @@ -35,7 +37,7 @@ jobs: - 'espressif_s3_devkitc' steps: - name: Setup Python - uses: actions/setup-python@v4 + uses: actions/setup-python@v5 with: python-version: '3.x' @@ -46,7 +48,7 @@ jobs: uses: actions/checkout@v4 - name: Build - run: docker run --rm -v $PWD:/project -w /project espressif/idf:latest python3 tools/build_esp32.py ${{ matrix.board }} + run: docker run --rm -v $PWD:/project -w /project espressif/idf:v5.1.1 python3 tools/build_esp32.py ${{ matrix.board }} - name: Upload Artifacts for Hardware Testing if: matrix.board == 'espressif_s3_devkitc' && github.repository_owner == 'hathach' diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index 9f2cc0351..a0a022ecc 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -9,6 +9,7 @@ on: - 'lib/**' - 'hw/**' - 'tools/get_deps.py' + - 'test/hil/**' - '.github/workflows/build_iar.yml' pull_request: branches: [ master ] @@ -18,6 +19,7 @@ on: - 'lib/**' - 'hw/**' - 'tools/get_deps.py' + - 'test/hil/**' - '.github/workflows/build_iar.yml' concurrency: diff --git a/.github/workflows/build_msp430.yml b/.github/workflows/build_msp430.yml index 296dbb766..f913df913 100644 --- a/.github/workflows/build_msp430.yml +++ b/.github/workflows/build_msp430.yml @@ -36,7 +36,7 @@ jobs: steps: - name: Setup Python - uses: actions/setup-python@v4 + uses: actions/setup-python@v5 with: python-version: '3.x' diff --git a/.github/workflows/build_renesas.yml b/.github/workflows/build_renesas.yml index 017a29eee..ec06c9426 100644 --- a/.github/workflows/build_renesas.yml +++ b/.github/workflows/build_renesas.yml @@ -35,7 +35,7 @@ jobs: - 'rx' steps: - name: Setup Python - uses: actions/setup-python@v4 + uses: actions/setup-python@v5 with: python-version: '3.x' diff --git a/.github/workflows/build_riscv.yml b/.github/workflows/build_riscv.yml index e030bb77f..e891a3a51 100644 --- a/.github/workflows/build_riscv.yml +++ b/.github/workflows/build_riscv.yml @@ -37,7 +37,7 @@ jobs: - 'gd32vf103' steps: - name: Setup Python - uses: actions/setup-python@v4 + uses: actions/setup-python@v5 with: python-version: '3.x' diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml index 7fa1a6943..b33b5b593 100644 --- a/.github/workflows/build_win_mac.yml +++ b/.github/workflows/build_win_mac.yml @@ -35,7 +35,7 @@ jobs: steps: - name: Setup Python - uses: actions/setup-python@v4 + uses: actions/setup-python@v5 with: python-version: '3.x' diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml index 8b87fef21..f97645ad1 100644 --- a/.github/workflows/cmake_arm.yml +++ b/.github/workflows/cmake_arm.yml @@ -8,6 +8,7 @@ on: - 'examples/**' - 'lib/**' - 'hw/**' + - 'test/hil/**' - 'tools/get_deps.py' - '.github/workflows/cmake_arm.yml' pull_request: @@ -17,6 +18,7 @@ on: - 'examples/**' - 'lib/**' - 'hw/**' + - 'test/hil/**' - 'tools/get_deps.py' - '.github/workflows/cmake_arm.yml' @@ -57,7 +59,7 @@ jobs: - 'stm32u5' steps: - name: Setup Python - uses: actions/setup-python@v4 + uses: actions/setup-python@v5 with: python-version: '3.x' diff --git a/.github/workflows/pre-commit.yml b/.github/workflows/pre-commit.yml index 2e9ae9264..e36259daa 100644 --- a/.github/workflows/pre-commit.yml +++ b/.github/workflows/pre-commit.yml @@ -15,7 +15,7 @@ jobs: runs-on: ubuntu-latest steps: - name: Setup Python - uses: actions/setup-python@v4 + uses: actions/setup-python@v5 with: python-version: '3.x' diff --git a/examples/device/video_capture/src/CMakeLists.txt b/examples/device/video_capture/src/CMakeLists.txt new file mode 100644 index 000000000..cef2b46ee --- /dev/null +++ b/examples/device/video_capture/src/CMakeLists.txt @@ -0,0 +1,4 @@ +# This file is for ESP-IDF only +idf_component_register(SRCS "main.c" "usb_descriptors.c" + INCLUDE_DIRS "." + REQUIRES boards tinyusb_src) diff --git a/examples/device/video_capture/src/images.h b/examples/device/video_capture/src/images.h index 784e7754c..ac372cb16 100644 --- a/examples/device/video_capture/src/images.h +++ b/examples/device/video_capture/src/images.h @@ -1,4 +1,5 @@ #if defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) +// uncopmressed frame static const unsigned char frame_buffer[128 * (96 + 1) * 2] = { /* 0 */ 0xeb, 0x80, 0xeb, 0x80, 0xeb, 0x80, 0xeb, 0x80, 0xeb, 0x80, 0xeb, 0x80, 0xeb, 0x80, 0xeb, 0x80, @@ -1650,8 +1651,10 @@ static const unsigned char frame_buffer[128 * (96 + 1) * 2] = { 0x10, 0x80, 0x10, 0x80, 0x10, 0x80, 0x10, 0x80, 0x10, 0x80, 0x10, 0x80, 0x10, 0x80, 0x10, 0x80, 0x10, 0x80, 0x10, 0x80, 0x10, 0x80, 0x10, 0x80, 0x10, 0x80, 0x10, 0x80, 0x10, 0x80, 0x10, 0x80, }; + #else +// mpeg compressed data (not CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) #define color_bar_0_jpg_len 511 #define color_bar_1_jpg_len 512 #define color_bar_2_jpg_len 511 diff --git a/examples/device/video_capture/src/main.c b/examples/device/video_capture/src/main.c index 711d4710a..2a2b0961f 100644 --- a/examples/device/video_capture/src/main.c +++ b/examples/device/video_capture/src/main.c @@ -40,7 +40,7 @@ * - 1000 ms : device mounted * - 2500 ms : device is suspended */ -enum { +enum { BLINK_NOT_MOUNTED = 250, BLINK_MOUNTED = 1000, BLINK_SUSPENDED = 2500, @@ -48,14 +48,25 @@ enum { static uint32_t blink_interval_ms = BLINK_NOT_MOUNTED; -void led_blinking_task(void); -void video_task(void); +void led_blinking_task(void* param); +void usb_device_task(void *param); +void video_task(void* param); -/*------------- MAIN -------------*/ -int main(void) -{ +#if CFG_TUSB_OS == OPT_OS_FREERTOS +void freertos_init_task(void); +#endif + + +//--------------------------------------------------------------------+ +// Main +//--------------------------------------------------------------------+ +int main(void) { board_init(); + // If using FreeRTOS: create blinky, tinyusb device, video task +#if CFG_TUSB_OS == OPT_OS_FREERTOS + freertos_init_task(); +#else // init device stack on configured roothub port tud_init(BOARD_TUD_RHPORT); @@ -63,13 +74,12 @@ int main(void) board_init_after_tusb(); } - while (1) - { + while (1) { tud_task(); // tinyusb device task - led_blinking_task(); - - video_task(); + led_blinking_task(NULL); + video_task(NULL); } +#endif } //--------------------------------------------------------------------+ @@ -77,33 +87,28 @@ int main(void) //--------------------------------------------------------------------+ // Invoked when device is mounted -void tud_mount_cb(void) -{ +void tud_mount_cb(void) { blink_interval_ms = BLINK_MOUNTED; } // Invoked when device is unmounted -void tud_umount_cb(void) -{ +void tud_umount_cb(void) { blink_interval_ms = BLINK_NOT_MOUNTED; } // Invoked when usb bus is suspended // remote_wakeup_en : if host allow us to perform remote wakeup // Within 7ms, device must draw an average of current less than 2.5 mA from bus -void tud_suspend_cb(bool remote_wakeup_en) -{ +void tud_suspend_cb(bool remote_wakeup_en) { (void) remote_wakeup_en; blink_interval_ms = BLINK_SUSPENDED; } // Invoked when usb bus is resumed -void tud_resume_cb(void) -{ +void tud_resume_cb(void) { blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED; } - //--------------------------------------------------------------------+ // USB Video //--------------------------------------------------------------------+ @@ -111,11 +116,12 @@ static unsigned frame_num = 0; static unsigned tx_busy = 0; static unsigned interval_ms = 1000 / FRAME_RATE; -/* YUY2 frame buffer */ #ifdef CFG_EXAMPLE_VIDEO_READONLY +// For mcus that does not have enough SRAM for frame buffer, we use fixed frame data. +// To further reduce the size, we use MJPEG format instead of YUY2. #include "images.h" -# if !defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) +#if !defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) static struct { uint32_t size; uint8_t const *buffer; @@ -129,29 +135,30 @@ static struct { {color_bar_6_jpg_len, color_bar_6_jpg}, {color_bar_7_jpg_len, color_bar_7_jpg}, }; -# endif +#endif #else + +// YUY2 frame buffer static uint8_t frame_buffer[FRAME_WIDTH * FRAME_HEIGHT * 16 / 8]; -static void fill_color_bar(uint8_t *buffer, unsigned start_position) -{ - /* EBU color bars - * See also https://stackoverflow.com/questions/6939422 */ + +static void fill_color_bar(uint8_t* buffer, unsigned start_position) { + /* EBU color bars: https://stackoverflow.com/questions/6939422 */ static uint8_t const bar_color[8][4] = { - /* Y, U, Y, V */ - { 235, 128, 235, 128}, /* 100% White */ - { 219, 16, 219, 138}, /* Yellow */ - { 188, 154, 188, 16}, /* Cyan */ - { 173, 42, 173, 26}, /* Green */ - { 78, 214, 78, 230}, /* Magenta */ - { 63, 102, 63, 240}, /* Red */ - { 32, 240, 32, 118}, /* Blue */ - { 16, 128, 16, 128}, /* Black */ + /* Y, U, Y, V */ + { 235, 128, 235, 128}, /* 100% White */ + { 219, 16, 219, 138}, /* Yellow */ + { 188, 154, 188, 16}, /* Cyan */ + { 173, 42, 173, 26}, /* Green */ + { 78, 214, 78, 230}, /* Magenta */ + { 63, 102, 63, 240}, /* Red */ + { 32, 240, 32, 118}, /* Blue */ + { 16, 128, 16, 128}, /* Black */ }; - uint8_t *p; + uint8_t* p; /* Generate the 1st line */ - uint8_t *end = &buffer[FRAME_WIDTH * 2]; + uint8_t* end = &buffer[FRAME_WIDTH * 2]; unsigned idx = (FRAME_WIDTH / 2 - 1) - (start_position % (FRAME_WIDTH / 2)); p = &buffer[idx * 4]; for (unsigned i = 0; i < 8; ++i) { @@ -163,6 +170,7 @@ static void fill_color_bar(uint8_t *buffer, unsigned start_position) } } } + /* Duplicate the 1st line to the others */ p = &buffer[FRAME_WIDTH * 2]; for (unsigned i = 1; i < FRAME_HEIGHT; ++i) { @@ -170,32 +178,33 @@ static void fill_color_bar(uint8_t *buffer, unsigned start_position) p += FRAME_WIDTH * 2; } } + #endif -void video_task(void) -{ +void video_send_frame(void) { static unsigned start_ms = 0; static unsigned already_sent = 0; if (!tud_video_n_streaming(0, 0)) { - already_sent = 0; - frame_num = 0; + already_sent = 0; + frame_num = 0; return; } if (!already_sent) { already_sent = 1; + tx_busy = 1; start_ms = board_millis(); #ifdef CFG_EXAMPLE_VIDEO_READONLY -# if defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) + #if defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) tud_video_n_frame_xfer(0, 0, (void*)(uintptr_t)&frame_buffer[(frame_num % (FRAME_WIDTH / 2)) * 4], FRAME_WIDTH * FRAME_HEIGHT * 16/8); -# else + #else tud_video_n_frame_xfer(0, 0, (void*)(uintptr_t)frames[frame_num % 8].buffer, frames[frame_num % 8].size); -# endif + #endif #else fill_color_bar(frame_buffer, frame_num); - tud_video_n_frame_xfer(0, 0, (void*)frame_buffer, FRAME_WIDTH * FRAME_HEIGHT * 16/8); + tud_video_n_frame_xfer(0, 0, (void*) frame_buffer, FRAME_WIDTH * FRAME_HEIGHT * 16 / 8); #endif } @@ -203,49 +212,140 @@ void video_task(void) if (cur - start_ms < interval_ms) return; // not enough time if (tx_busy) return; start_ms += interval_ms; + tx_busy = 1; #ifdef CFG_EXAMPLE_VIDEO_READONLY -# if defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) + #if defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) tud_video_n_frame_xfer(0, 0, (void*)(uintptr_t)&frame_buffer[(frame_num % (FRAME_WIDTH / 2)) * 4], FRAME_WIDTH * FRAME_HEIGHT * 16/8); -# else + #else tud_video_n_frame_xfer(0, 0, (void*)(uintptr_t)frames[frame_num % 8].buffer, frames[frame_num % 8].size); -# endif + #endif #else fill_color_bar(frame_buffer, frame_num); - tud_video_n_frame_xfer(0, 0, (void*)frame_buffer, FRAME_WIDTH * FRAME_HEIGHT * 16/8); + tud_video_n_frame_xfer(0, 0, (void*) frame_buffer, FRAME_WIDTH * FRAME_HEIGHT * 16 / 8); #endif } -void tud_video_frame_xfer_complete_cb(uint_fast8_t ctl_idx, uint_fast8_t stm_idx) -{ - (void)ctl_idx; (void)stm_idx; + +void video_task(void* param) { + (void) param; + + while(1) { + video_send_frame(); + + #if CFG_TUSB_OS == OPT_OS_FREERTOS + vTaskDelay(interval_ms / portTICK_PERIOD_MS); + #else + return; + #endif + } +} + +void tud_video_frame_xfer_complete_cb(uint_fast8_t ctl_idx, uint_fast8_t stm_idx) { + (void) ctl_idx; + (void) stm_idx; tx_busy = 0; /* flip buffer */ ++frame_num; } int tud_video_commit_cb(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, - video_probe_and_commit_control_t const *parameters) -{ - (void)ctl_idx; (void)stm_idx; + video_probe_and_commit_control_t const* parameters) { + (void) ctl_idx; + (void) stm_idx; /* convert unit to ms from 100 ns */ interval_ms = parameters->dwFrameInterval / 10000; return VIDEO_ERROR_NONE; } //--------------------------------------------------------------------+ -// BLINKING TASK +// Blinking Task //--------------------------------------------------------------------+ -void led_blinking_task(void) -{ +void led_blinking_task(void* param) { + (void) param; static uint32_t start_ms = 0; static bool led_state = false; - // Blink every interval ms - if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time - start_ms += blink_interval_ms; + while (1) { + #if CFG_TUSB_OS == OPT_OS_FREERTOS + vTaskDelay(blink_interval_ms / portTICK_PERIOD_MS); + #else + if (board_millis() - start_ms < blink_interval_ms) return; // not enough time + #endif + + start_ms += blink_interval_ms; + board_led_write(led_state); + led_state = 1 - led_state; // toggle + } +} + +//--------------------------------------------------------------------+ +// FreeRTOS +//--------------------------------------------------------------------+ +#if CFG_TUSB_OS == OPT_OS_FREERTOS + +#define BLINKY_STACK_SIZE configMINIMAL_STACK_SIZE +#define VIDEO_STACK_SIZE (configMINIMAL_STACK_SIZE*4) + +#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) + #define USBD_STACK_SIZE 4096 + int main(void); + void app_main(void) { + main(); + } +#else + // Increase stack size when debug log is enabled + #define USBD_STACK_SIZE (3*configMINIMAL_STACK_SIZE/2) * (CFG_TUSB_DEBUG ? 2 : 1) +#endif + +// static task +#if configSUPPORT_STATIC_ALLOCATION +StackType_t blinky_stack[BLINKY_STACK_SIZE]; +StaticTask_t blinky_taskdef; + +StackType_t usb_device_stack[USBD_STACK_SIZE]; +StaticTask_t usb_device_taskdef; + +StackType_t video_stack[VIDEO_STACK_SIZE]; +StaticTask_t video_taskdef; +#endif + +// USB Device Driver task +// This top level thread process all usb events and invoke callbacks +void usb_device_task(void *param) { + (void) param; + + // init device stack on configured roothub port + // This should be called after scheduler/kernel is started. + // Otherwise, it could cause kernel issue since USB IRQ handler does use RTOS queue API. + tud_init(BOARD_TUD_RHPORT); + + if (board_init_after_tusb) { + board_init_after_tusb(); + } + + // RTOS forever loop + while (1) { + // put this thread to waiting state until there is new events + tud_task(); + } +} - board_led_write(led_state); - led_state = 1 - led_state; // toggle +void freertos_init_task(void) { + #if configSUPPORT_STATIC_ALLOCATION + xTaskCreateStatic(led_blinking_task, "blinky", BLINKY_STACK_SIZE, NULL, 1, blinky_stack, &blinky_taskdef); + xTaskCreateStatic(usb_device_task, "usbd", USBD_STACK_SIZE, NULL, configMAX_PRIORITIES-1, usb_device_stack, &usb_device_taskdef); + xTaskCreateStatic(video_task, "cdc", VIDEO_STACK_SIZE, NULL, configMAX_PRIORITIES - 2, video_stack, &video_taskdef); + #else + xTaskCreate(led_blinking_task, "blinky", BLINKY_STACK_SIZE, NULL, 1, NULL); + xTaskCreate(usb_device_task, "usbd", USBD_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL); + xTaskCreate(video_task, "video", VIDEO_STACK_SZIE, NULL, configMAX_PRIORITIES - 2, NULL); + #endif + + // skip starting scheduler (and return) for ESP32-S2 or ESP32-S3 + #if !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) + vTaskStartScheduler(); + #endif } +#endif diff --git a/examples/device/video_capture/src/tusb_config.h b/examples/device/video_capture/src/tusb_config.h index 274bf2b9c..bdfc37d87 100644 --- a/examples/device/video_capture/src/tusb_config.h +++ b/examples/device/video_capture/src/tusb_config.h @@ -57,6 +57,11 @@ #define CFG_TUSB_OS OPT_OS_NONE #endif +// Espressif IDF requires "freertos/" prefix in include path +#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#define CFG_TUSB_OS_INC_PATH freertos/ +#endif + #ifndef CFG_TUSB_DEBUG #define CFG_TUSB_DEBUG 0 #endif @@ -97,11 +102,14 @@ // The number of video streaming interfaces #define CFG_TUD_VIDEO_STREAMING 1 -// video streaming endpoint size +// video streaming endpoint buffer size #define CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE 256 // use bulk endpoint for streaming interface -#define CFG_TUD_VIDEO_STREAMING_BULK 0 +#define CFG_TUD_VIDEO_STREAMING_BULK 1 + +//#define CFG_EXAMPLE_VIDEO_READONLY +//#define CFG_EXAMPLE_VIDEO_DISABLE_MJPEG #ifdef __cplusplus } diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c index 49919fc58..f308c75a7 100644 --- a/examples/device/video_capture/src/usb_descriptors.c +++ b/examples/device/video_capture/src/usb_descriptors.c @@ -40,11 +40,30 @@ #define USB_VID 0xCafe #define USB_BCD 0x0200 +// String Descriptor Index +enum { + STRID_LANGID = 0, + STRID_MANUFACTURER, + STRID_PRODUCT, + STRID_SERIAL, + STRID_UVC_CONTROL, + STRID_UVC_STREAMING, +}; + +// array of pointer to string descriptors +char const* string_desc_arr[] = { + (const char[]) {0x09, 0x04}, // 0: is supported language is English (0x0409) + "TinyUSB", // 1: Manufacturer + "TinyUSB Device", // 2: Product + NULL, // 3: Serials will use unique ID if possible + "TinyUSB UVC Control", // 4: UVC Interface + "TinyUSB UVC Streaming", // 5: UVC Interface +}; + //--------------------------------------------------------------------+ // Device Descriptors //--------------------------------------------------------------------+ -tusb_desc_device_t const desc_device = -{ +tusb_desc_device_t const desc_device = { .bLength = sizeof(tusb_desc_device_t), .bDescriptorType = TUSB_DESC_DEVICE, .bcdUSB = USB_BCD, @@ -61,201 +80,374 @@ tusb_desc_device_t const desc_device = .idProduct = USB_PID, .bcdDevice = 0x0100, - .iManufacturer = 0x01, - .iProduct = 0x02, - .iSerialNumber = 0x03, + .iManufacturer = STRID_MANUFACTURER, + .iProduct = STRID_PRODUCT, + .iSerialNumber = STRID_SERIAL, .bNumConfigurations = 0x01 }; // Invoked when received GET DEVICE DESCRIPTOR // Application return pointer to descriptor -uint8_t const * tud_descriptor_device_cb(void) -{ - return (uint8_t const *) &desc_device; +uint8_t const* tud_descriptor_device_cb(void) { + return (uint8_t const*) &desc_device; } //--------------------------------------------------------------------+ // Configuration Descriptor //--------------------------------------------------------------------+ -#if defined(CFG_EXAMPLE_VIDEO_READONLY) && !defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) -# if 1 == CFG_TUD_VIDEO_STREAMING_BULK -# define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_MJPEG_BULK_LEN) -# else -# define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_MJPEG_LEN) -# endif -#else -# if 1 == CFG_TUD_VIDEO_STREAMING_BULK -# define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_UNCOMPR_BULK_LEN) -# else -# define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_UNCOMPR_LEN) -# endif -#endif +/* Time stamp base clock. It is a deprecated parameter. */ +#define UVC_CLOCK_FREQUENCY 27000000 + +/* video capture path */ +#define UVC_ENTITY_CAP_INPUT_TERMINAL 0x01 +#define UVC_ENTITY_CAP_OUTPUT_TERMINAL 0x02 + +enum { + ITF_NUM_VIDEO_CONTROL, + ITF_NUM_VIDEO_STREAMING, + ITF_NUM_TOTAL +}; +// Select appropriate endpoint number #if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In, 5 Bulk etc ... -#if 1 == CFG_TUD_VIDEO_STREAMING_BULK - #define EPNUM_VIDEO_IN 0x82 -#else - #define EPNUM_VIDEO_IN 0x83 -#endif - + #define EPNUM_VIDEO_IN (CFG_TUD_VIDEO_STREAMING_BULK ? 0x82 : 0x83) #elif TU_CHECK_MCU(OPT_MCU_NRF5X) // nRF5x ISO can only be endpoint 8 - #define EPNUM_VIDEO_IN 0x88 - + #define EPNUM_VIDEO_IN (CFG_TUD_VIDEO_STREAMING_BULK ? 0x81 : 0x88) #else #define EPNUM_VIDEO_IN 0x81 +#endif +#if defined(CFG_EXAMPLE_VIDEO_READONLY) && !defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) + #define USE_MJPEG 1 +#else + #define USE_MJPEG 0 #endif -uint8_t const desc_fs_configuration[] = -{ - // Config number, interface count, string index, total length, attribute, power in mA - TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0, 500), +#define USE_ISO_STREAMING (!CFG_TUD_VIDEO_STREAMING_BULK) - // IAD for Video Control -#if defined(CFG_EXAMPLE_VIDEO_READONLY) && !defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) -# if 1 == CFG_TUD_VIDEO_STREAMING_BULK - TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG_BULK(4, EPNUM_VIDEO_IN, - FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, - 64) -# else - TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG(4, EPNUM_VIDEO_IN, - FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, - CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE) -# endif +typedef struct TU_ATTR_PACKED { + tusb_desc_interface_t itf; + tusb_desc_video_control_header_1itf_t header; + tusb_desc_video_control_camera_terminal_t camera_terminal; + tusb_desc_video_control_output_terminal_t output_terminal; +} uvc_control_desc_t; + +/* Windows support YUY2 and NV12 + * https://docs.microsoft.com/en-us/windows-hardware/drivers/stream/usb-video-class-driver-overview */ + +typedef struct TU_ATTR_PACKED { + tusb_desc_interface_t itf; + tusb_desc_video_streaming_input_header_1byte_t header; + +#if USE_MJPEG + tusb_desc_video_format_mjpeg_t format; + tusb_desc_video_frame_mjpeg_continuous_t frame; #else -# if 1 == CFG_TUD_VIDEO_STREAMING_BULK - TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR_BULK(4, EPNUM_VIDEO_IN, - FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, - 64) -# else - TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR(4, EPNUM_VIDEO_IN, - FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, - CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE) -# endif + tusb_desc_video_format_uncompressed_t format; + tusb_desc_video_frame_uncompressed_continuous_t frame; #endif -}; -#if TUD_OPT_HIGH_SPEED -// Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration + tusb_desc_video_streaming_color_matching_t color; -uint8_t const desc_hs_configuration[] = -{ - // Config number, interface count, string index, total length, attribute, power in mA - TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0, 500), +#if USE_ISO_STREAMING + // For ISO streaming, USB spec requires to alternate interface + tusb_desc_interface_t itf_alt; +#endif - // IAD for Video Control -#if defined(CFG_EXAMPLE_VIDEO_READONLY) && !defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) -# if 1 == CFG_TUD_VIDEO_STREAMING_BULK - TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG_BULK(4, EPNUM_VIDEO_IN, - FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, - 512) -# else - TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG(4, EPNUM_VIDEO_IN, - FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, - CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE) -# endif + tusb_desc_endpoint_t ep; +} uvc_streaming_desc_t; + +typedef struct TU_ATTR_PACKED { + tusb_desc_configuration_t config; + tusb_desc_interface_assoc_t iad; + uvc_control_desc_t video_control; + uvc_streaming_desc_t video_streaming; +} uvc_cfg_desc_t; + +const uvc_cfg_desc_t desc_fs_configuration = { + .config = { + .bLength = sizeof(tusb_desc_configuration_t), + .bDescriptorType = TUSB_DESC_CONFIGURATION, + + .wTotalLength = sizeof(uvc_cfg_desc_t), + .bNumInterfaces = ITF_NUM_TOTAL, + .bConfigurationValue = 1, + .iConfiguration = 0, + .bmAttributes = TU_BIT(7), + .bMaxPower = 100 / 2 + }, + .iad = { + .bLength = sizeof(tusb_desc_interface_assoc_t), + .bDescriptorType = TUSB_DESC_INTERFACE_ASSOCIATION, + + .bFirstInterface = ITF_NUM_VIDEO_CONTROL, + .bInterfaceCount = 2, + .bFunctionClass = TUSB_CLASS_VIDEO, + .bFunctionSubClass = VIDEO_SUBCLASS_INTERFACE_COLLECTION, + .bFunctionProtocol = VIDEO_ITF_PROTOCOL_UNDEFINED, + .iFunction = 0 + }, + + .video_control = { + .itf = { + .bLength = sizeof(tusb_desc_interface_t), + .bDescriptorType = TUSB_DESC_INTERFACE, + + .bInterfaceNumber = ITF_NUM_VIDEO_CONTROL, + .bAlternateSetting = 0, + .bNumEndpoints = 0, + .bInterfaceClass = TUSB_CLASS_VIDEO, + .bInterfaceSubClass = VIDEO_SUBCLASS_CONTROL, + .bInterfaceProtocol = VIDEO_ITF_PROTOCOL_15, + .iInterface = STRID_UVC_CONTROL + }, + .header = { + .bLength = sizeof(tusb_desc_video_control_header_1itf_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VC_HEADER, + + .bcdUVC = VIDEO_BCD_1_50, + .wTotalLength = sizeof(uvc_control_desc_t) - sizeof(tusb_desc_interface_t), // CS VC descriptors only + .dwClockFrequency = UVC_CLOCK_FREQUENCY, + .bInCollection = 1, + .baInterfaceNr = { ITF_NUM_VIDEO_STREAMING } + }, + .camera_terminal = { + .bLength = sizeof(tusb_desc_video_control_camera_terminal_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VC_INPUT_TERMINAL, + + .bTerminalID = UVC_ENTITY_CAP_INPUT_TERMINAL, + .wTerminalType = VIDEO_ITT_CAMERA, + .bAssocTerminal = 0, + .iTerminal = 0, + .wObjectiveFocalLengthMin = 0, + .wObjectiveFocalLengthMax = 0, + .wOcularFocalLength = 0, + .bControlSize = 3, + .bmControls = { 0, 0, 0 } + }, + .output_terminal = { + .bLength = sizeof(tusb_desc_video_control_output_terminal_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VC_OUTPUT_TERMINAL, + + .bTerminalID = UVC_ENTITY_CAP_OUTPUT_TERMINAL, + .wTerminalType = VIDEO_TT_STREAMING, + .bAssocTerminal = 0, + .bSourceID = UVC_ENTITY_CAP_INPUT_TERMINAL, + .iTerminal = 0 + } + }, + + .video_streaming = { + .itf = { + .bLength = sizeof(tusb_desc_interface_t), + .bDescriptorType = TUSB_DESC_INTERFACE, + + .bInterfaceNumber = ITF_NUM_VIDEO_STREAMING, + .bAlternateSetting = 0, + .bNumEndpoints = CFG_TUD_VIDEO_STREAMING_BULK, // bulk 1, iso 0 + .bInterfaceClass = TUSB_CLASS_VIDEO, + .bInterfaceSubClass = VIDEO_SUBCLASS_STREAMING, + .bInterfaceProtocol = VIDEO_ITF_PROTOCOL_15, + .iInterface = STRID_UVC_STREAMING + }, + .header = { + .bLength = sizeof(tusb_desc_video_streaming_input_header_1byte_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VS_INPUT_HEADER, + + .bNumFormats = 1, + .wTotalLength = sizeof(uvc_streaming_desc_t) - sizeof(tusb_desc_interface_t) + - sizeof(tusb_desc_endpoint_t) - (USE_ISO_STREAMING ? sizeof(tusb_desc_interface_t) : 0) , // CS VS descriptors only + .bEndpointAddress = EPNUM_VIDEO_IN, + .bmInfo = 0, + .bTerminalLink = UVC_ENTITY_CAP_OUTPUT_TERMINAL, + .bStillCaptureMethod = 0, + .bTriggerSupport = 0, + .bTriggerUsage = 0, + .bControlSize = 1, + .bmaControls = { 0 } + }, + .format = { +#if USE_MJPEG + .bLength = sizeof(tusb_desc_video_format_mjpeg_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VS_FORMAT_MJPEG, + .bFormatIndex = 1, // 1-based index + .bNumFrameDescriptors = 1, + .bmFlags = 0, +#else + .bLength = sizeof(tusb_desc_video_format_uncompressed_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VS_FORMAT_UNCOMPRESSED, + .bFormatIndex = 1, // 1-based index + .bNumFrameDescriptors = 1, + .guidFormat = { TUD_VIDEO_GUID_YUY2 }, + .bBitsPerPixel = 16, +#endif + .bDefaultFrameIndex = 1, + .bAspectRatioX = 0, + .bAspectRatioY = 0, + .bmInterlaceFlags = 0, + .bCopyProtect = 0 + }, + .frame = { +#if USE_MJPEG + .bLength = sizeof(tusb_desc_video_frame_mjpeg_continuous_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VS_FRAME_MJPEG, #else -# if 1 == CFG_TUD_VIDEO_STREAMING_BULK - TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR_BULK(4, EPNUM_VIDEO_IN, - FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, - 512) -# else - TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR(4, EPNUM_VIDEO_IN, - FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, - CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE) -# endif + .bLength = sizeof(tusb_desc_video_frame_uncompressed_continuous_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VS_FRAME_UNCOMPRESSED, #endif + .bFrameIndex = 1, // 1-based index + .bmCapabilities = 0, + .wWidth = FRAME_WIDTH, + .wHeight = FRAME_HEIGHT, + .dwMinBitRate = FRAME_WIDTH * FRAME_HEIGHT * 16 * 1, + .dwMaxBitRate = FRAME_WIDTH * FRAME_HEIGHT * 16 * FRAME_RATE, + .dwMaxVideoFrameBufferSize = FRAME_WIDTH * FRAME_HEIGHT * 16 / 8, + .dwDefaultFrameInterval = 10000000 / FRAME_RATE, + .bFrameIntervalType = 0, // continuous + .dwFrameInterval = { + 10000000 / FRAME_RATE, // min + 10000000, // max + 10000000 / FRAME_RATE // step + } + }, + .color = { + .bLength = sizeof(tusb_desc_video_streaming_color_matching_t), + .bDescriptorType = TUSB_DESC_CS_INTERFACE, + .bDescriptorSubType = VIDEO_CS_ITF_VS_COLORFORMAT, + + .bColorPrimaries = VIDEO_COLOR_PRIMARIES_BT709, + .bTransferCharacteristics = VIDEO_COLOR_XFER_CH_BT709, + .bMatrixCoefficients = VIDEO_COLOR_COEF_SMPTE170M + }, + +#if USE_ISO_STREAMING + .itf_alt = { + .bLength = sizeof(tusb_desc_interface_t), + .bDescriptorType = TUSB_DESC_INTERFACE, + + .bInterfaceNumber = ITF_NUM_VIDEO_STREAMING, + .bAlternateSetting = 1, + .bNumEndpoints = 1, + .bInterfaceClass = TUSB_CLASS_VIDEO, + .bInterfaceSubClass = VIDEO_SUBCLASS_STREAMING, + .bInterfaceProtocol = VIDEO_ITF_PROTOCOL_15, + .iInterface = STRID_UVC_STREAMING + }, +#endif + + .ep = { + .bLength = sizeof(tusb_desc_endpoint_t), + .bDescriptorType = TUSB_DESC_ENDPOINT, + + .bEndpointAddress = EPNUM_VIDEO_IN, + .bmAttributes = { + .xfer = CFG_TUD_VIDEO_STREAMING_BULK ? TUSB_XFER_BULK : TUSB_XFER_ISOCHRONOUS, + .sync = CFG_TUD_VIDEO_STREAMING_BULK ? 0 : 1 // asynchronous + }, + .wMaxPacketSize = CFG_TUD_VIDEO_STREAMING_BULK ? 64 : CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE, + .bInterval = 1 + } + } }; +#if TUD_OPT_HIGH_SPEED +uvc_cfg_desc_t desc_hs_configuration; + +static uint8_t * get_hs_configuration_desc(void) { + static bool init = false; + + if (!init) { + desc_hs_configuration = desc_fs_configuration; + // change endpoint bulk size to 512 if bulk streaming + if (CFG_TUD_VIDEO_STREAMING_BULK) { + desc_hs_configuration.video_streaming.ep.wMaxPacketSize = 512; + } + } + init = true; + + return (uint8_t *) &desc_hs_configuration; +} + // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed -tusb_desc_device_qualifier_t const desc_device_qualifier = -{ - .bLength = sizeof(tusb_desc_device_t), - .bDescriptorType = TUSB_DESC_DEVICE, - .bcdUSB = USB_BCD, - - .bDeviceClass = TUSB_CLASS_MISC, - .bDeviceSubClass = MISC_SUBCLASS_COMMON, - .bDeviceProtocol = MISC_PROTOCOL_IAD, - - .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE, - .bNumConfigurations = 0x01, - .bReserved = 0x00 +tusb_desc_device_qualifier_t const desc_device_qualifier = { + .bLength = sizeof(tusb_desc_device_t), + .bDescriptorType = TUSB_DESC_DEVICE, + .bcdUSB = USB_BCD, + + .bDeviceClass = TUSB_CLASS_MISC, + .bDeviceSubClass = MISC_SUBCLASS_COMMON, + .bDeviceProtocol = MISC_PROTOCOL_IAD, + + .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE, + .bNumConfigurations = 0x01, + .bReserved = 0x00 }; // Invoked when received GET DEVICE QUALIFIER DESCRIPTOR request // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete. // device_qualifier descriptor describes information about a high-speed capable device that would // change if the device were operating at the other speed. If not highspeed capable stall this request. -uint8_t const* tud_descriptor_device_qualifier_cb(void) -{ +uint8_t const* tud_descriptor_device_qualifier_cb(void) { return (uint8_t const*) &desc_device_qualifier; } // Invoked when received GET OTHER SEED CONFIGURATION DESCRIPTOR request // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete // Configuration descriptor in the other speed e.g if high speed then this is for full speed and vice versa -uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index) -{ +uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index) { (void) index; // for multiple configurations - // if link speed is high return fullspeed config, and vice versa - return (tud_speed_get() == TUSB_SPEED_HIGH) ? desc_fs_configuration : desc_hs_configuration; + if (tud_speed_get() == TUSB_SPEED_HIGH) { + return (uint8_t const*) &desc_fs_configuration; + } else { + return get_hs_configuration_desc(); + } } - #endif // highspeed // Invoked when received GET CONFIGURATION DESCRIPTOR // Application return pointer to descriptor // Descriptor contents must exist long enough for transfer to complete -uint8_t const * tud_descriptor_configuration_cb(uint8_t index) -{ +uint8_t const* tud_descriptor_configuration_cb(uint8_t index) { (void) index; // for multiple configurations #if TUD_OPT_HIGH_SPEED // Although we are highspeed, host may be fullspeed. - return (tud_speed_get() == TUSB_SPEED_HIGH) ? desc_hs_configuration : desc_fs_configuration; -#else - return desc_fs_configuration; + if (tud_speed_get() == TUSB_SPEED_HIGH) { + return get_hs_configuration_desc(); + } else #endif + { + return (uint8_t const*) &desc_fs_configuration; + } } //--------------------------------------------------------------------+ // String Descriptors //--------------------------------------------------------------------+ -// String Descriptor Index -enum { - STRID_LANGID = 0, - STRID_MANUFACTURER, - STRID_PRODUCT, - STRID_SERIAL, -}; - -// array of pointer to string descriptors -char const *string_desc_arr[] = -{ - (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409) - "TinyUSB", // 1: Manufacturer - "TinyUSB Device", // 2: Product - NULL, // 3: Serials will use unique ID if possible - "TinyUSB UVC", // 4: UVC Interface -}; - static uint16_t _desc_str[32 + 1]; // Invoked when received GET STRING DESCRIPTOR request // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete -uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) { +uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid) { (void) langid; size_t chr_count; - switch ( index ) { + switch (index) { case STRID_LANGID: memcpy(&_desc_str[1], string_desc_arr[0], 2); chr_count = 1; @@ -269,17 +461,17 @@ uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) { // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors. // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors - if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL; + if (index >= sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) return NULL; - const char *str = string_desc_arr[index]; + const char* str = string_desc_arr[index]; // Cap at max char chr_count = strlen(str); size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type - if ( chr_count > max_count ) chr_count = max_count; + if (chr_count > max_count) chr_count = max_count; // Convert ASCII string into UTF-16 - for ( size_t i = 0; i < chr_count; i++ ) { + for (size_t i = 0; i < chr_count; i++) { _desc_str[1 + i] = str[i]; } break; diff --git a/examples/device/video_capture/src/usb_descriptors.h b/examples/device/video_capture/src/usb_descriptors.h index b924c8dbe..12d41b2f3 100644 --- a/examples/device/video_capture/src/usb_descriptors.h +++ b/examples/device/video_capture/src/usb_descriptors.h @@ -27,21 +27,11 @@ #ifndef _USB_DESCRIPTORS_H_ #define _USB_DESCRIPTORS_H_ -/* Time stamp base clock. It is a deprecated parameter. */ -#define UVC_CLOCK_FREQUENCY 27000000 -/* video capture path */ -#define UVC_ENTITY_CAP_INPUT_TERMINAL 0x01 -#define UVC_ENTITY_CAP_OUTPUT_TERMINAL 0x02 - #define FRAME_WIDTH 128 #define FRAME_HEIGHT 96 #define FRAME_RATE 10 -enum { - ITF_NUM_VIDEO_CONTROL, - ITF_NUM_VIDEO_STREAMING, - ITF_NUM_TOTAL -}; +// NOTE: descriptor template is not used but leave here as reference #define TUD_VIDEO_CAPTURE_DESC_UNCOMPR_LEN (\ TUD_VIDEO_DESC_IAD_LEN\ @@ -126,23 +116,17 @@ enum { #define TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR(_stridx, _epin, _width, _height, _fps, _epsize) \ TUD_VIDEO_DESC_IAD(ITF_NUM_VIDEO_CONTROL, /* 2 Interfaces */ 0x02, _stridx), \ /* Video control 0 */ \ - TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ - TUD_VIDEO_DESC_CS_VC( /* UVC 1.5*/ 0x0150, \ - /* wTotalLength - bLength */ \ - TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, \ - UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ - TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0,\ - /*wObjectiveFocalLengthMin*/0, /*wObjectiveFocalLengthMax*/0,\ - /*wObjectiveFocalLength*/0, /*bmControls*/0), \ + TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ + /* Header: UVC 1.5, length of followed descs, clock (deprecated), streaming interfaces */ \ + TUD_VIDEO_DESC_CS_VC(0x0150, TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ + /* Camera Terminal: ID, bAssocTerminal, iTerminal, focal min, max, length, bmControl */ \ + TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0, 0, 0, 0, 0), \ TUD_VIDEO_DESC_OUTPUT_TERM(UVC_ENTITY_CAP_OUTPUT_TERMINAL, VIDEO_TT_STREAMING, 0, 1, 0), \ /* Video stream alt. 0 */ \ TUD_VIDEO_DESC_STD_VS(ITF_NUM_VIDEO_STREAMING, 0, 0, _stridx), \ /* Video stream header for without still image capture */ \ TUD_VIDEO_DESC_CS_VS_INPUT( /*bNumFormats*/1, \ - /*wTotalLength - bLength */\ - TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN\ - + TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN\ - + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ + /*wTotalLength - bLength */ TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN + TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ _epin, /*bmInfo*/0, /*bTerminalLink*/UVC_ENTITY_CAP_OUTPUT_TERMINAL, \ /*bStillCaptureMethod*/0, /*bTriggerSupport*/0, /*bTriggerUsage*/0, \ /*bmaControls(1)*/0), \ @@ -152,7 +136,7 @@ enum { /* Video stream frame format */ \ TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT(/*bFrameIndex */1, 0, _width, _height, \ _width * _height * 16, _width * _height * 16 * _fps, \ - _width * _height * 16, \ + _width * _height * 16 / 8, \ (10000000/_fps), (10000000/_fps), (10000000/_fps)*_fps, (10000000/_fps)), \ TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING(VIDEO_COLOR_PRIMARIES_BT709, VIDEO_COLOR_XFER_CH_BT709, VIDEO_COLOR_COEF_SMPTE170M), \ /* VS alt 1 */\ @@ -163,23 +147,17 @@ enum { #define TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG(_stridx, _epin, _width, _height, _fps, _epsize) \ TUD_VIDEO_DESC_IAD(ITF_NUM_VIDEO_CONTROL, /* 2 Interfaces */ 0x02, _stridx), \ /* Video control 0 */ \ - TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ - TUD_VIDEO_DESC_CS_VC( /* UVC 1.5*/ 0x0150, \ - /* wTotalLength - bLength */ \ - TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, \ - UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ - TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0,\ - /*wObjectiveFocalLengthMin*/0, /*wObjectiveFocalLengthMax*/0,\ - /*wObjectiveFocalLength*/0, /*bmControls*/0), \ + TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ + /* Header: UVC 1.5, length of followed descs, clock (deprecated), streaming interfaces */ \ + TUD_VIDEO_DESC_CS_VC(0x0150, TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ + /* Camera Terminal: ID, bAssocTerminal, iTerminal, focal min, max, length, bmControl */ \ + TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0, 0, 0, 0, 0), \ TUD_VIDEO_DESC_OUTPUT_TERM(UVC_ENTITY_CAP_OUTPUT_TERMINAL, VIDEO_TT_STREAMING, 0, 1, 0), \ /* Video stream alt. 0 */ \ TUD_VIDEO_DESC_STD_VS(ITF_NUM_VIDEO_STREAMING, 0, 0, _stridx), \ /* Video stream header for without still image capture */ \ TUD_VIDEO_DESC_CS_VS_INPUT( /*bNumFormats*/1, \ - /*wTotalLength - bLength */\ - TUD_VIDEO_DESC_CS_VS_FMT_MJPEG_LEN\ - + TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT_LEN\ - + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ + /*wTotalLength - bLength */ TUD_VIDEO_DESC_CS_VS_FMT_MJPEG_LEN + TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT_LEN + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ _epin, /*bmInfo*/0, /*bTerminalLink*/UVC_ENTITY_CAP_OUTPUT_TERMINAL, \ /*bStillCaptureMethod*/0, /*bTriggerSupport*/0, /*bTriggerUsage*/0, \ /*bmaControls(1)*/0), \ @@ -202,22 +180,17 @@ enum { TUD_VIDEO_DESC_IAD(ITF_NUM_VIDEO_CONTROL, /* 2 Interfaces */ 0x02, _stridx), \ /* Video control 0 */ \ TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ - TUD_VIDEO_DESC_CS_VC( /* UVC 1.5*/ 0x0150, \ - /* wTotalLength - bLength */ \ - TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, \ - UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ - TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0,\ - /*wObjectiveFocalLengthMin*/0, /*wObjectiveFocalLengthMax*/0,\ - /*wObjectiveFocalLength*/0, /*bmControls*/0), \ + /* Header: UVC 1.5, length of followed descs, clock (deprecated), streaming interfaces */ \ + TUD_VIDEO_DESC_CS_VC(0x0150, TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ + /* Camera Terminal: ID, bAssocTerminal, iTerminal, focal min, max, length, bmControl */ \ + TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0, 0, 0, 0, 0), \ TUD_VIDEO_DESC_OUTPUT_TERM(UVC_ENTITY_CAP_OUTPUT_TERMINAL, VIDEO_TT_STREAMING, 0, 1, 0), \ /* Video stream alt. 0 */ \ TUD_VIDEO_DESC_STD_VS(ITF_NUM_VIDEO_STREAMING, 0, 1, _stridx), \ /* Video stream header for without still image capture */ \ TUD_VIDEO_DESC_CS_VS_INPUT( /*bNumFormats*/1, \ /*wTotalLength - bLength */\ - TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN\ - + TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN\ - + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ + TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN + TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ _epin, /*bmInfo*/0, /*bTerminalLink*/UVC_ENTITY_CAP_OUTPUT_TERMINAL, \ /*bStillCaptureMethod*/0, /*bTriggerSupport*/0, /*bTriggerUsage*/0, \ /*bmaControls(1)*/0), \ @@ -227,7 +200,7 @@ enum { /* Video stream frame format */ \ TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT(/*bFrameIndex */1, 0, _width, _height, \ _width * _height * 16, _width * _height * 16 * _fps, \ - _width * _height * 16, \ + _width * _height * 16 / 8, \ (10000000/_fps), (10000000/_fps), (10000000/_fps)*_fps, (10000000/_fps)), \ TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING(VIDEO_COLOR_PRIMARIES_BT709, VIDEO_COLOR_XFER_CH_BT709, VIDEO_COLOR_COEF_SMPTE170M), \ TUD_VIDEO_DESC_EP_BULK(_epin, _epsize, 1) @@ -235,23 +208,17 @@ enum { #define TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG_BULK(_stridx, _epin, _width, _height, _fps, _epsize) \ TUD_VIDEO_DESC_IAD(ITF_NUM_VIDEO_CONTROL, /* 2 Interfaces */ 0x02, _stridx), \ /* Video control 0 */ \ - TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ - TUD_VIDEO_DESC_CS_VC( /* UVC 1.5*/ 0x0150, \ - /* wTotalLength - bLength */ \ - TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, \ - UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ - TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0,\ - /*wObjectiveFocalLengthMin*/0, /*wObjectiveFocalLengthMax*/0,\ - /*wObjectiveFocalLength*/0, /*bmControls*/0), \ - TUD_VIDEO_DESC_OUTPUT_TERM(UVC_ENTITY_CAP_OUTPUT_TERMINAL, VIDEO_TT_STREAMING, 0, 1, 0), \ + TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ + /* Header: UVC 1.5, length of followed descs, clock (deprecated), streaming interfaces */ \ + TUD_VIDEO_DESC_CS_VC(0x0150, TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ + /* Camera Terminal: ID, bAssocTerminal, iTerminal, focal min, max, length, bmControl */ \ + TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0, 0, 0, 0, 0), \ + TUD_VIDEO_DESC_OUTPUT_TERM(UVC_ENTITY_CAP_OUTPUT_TERMINAL, VIDEO_TT_STREAMING, 0, UVC_ENTITY_CAP_INPUT_TERMINAL, 0), \ /* Video stream alt. 0 */ \ TUD_VIDEO_DESC_STD_VS(ITF_NUM_VIDEO_STREAMING, 0, 1, _stridx), \ /* Video stream header for without still image capture */ \ TUD_VIDEO_DESC_CS_VS_INPUT( /*bNumFormats*/1, \ - /*wTotalLength - bLength */\ - TUD_VIDEO_DESC_CS_VS_FMT_MJPEG_LEN\ - + TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT_LEN\ - + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ + /*wTotalLength - bLength */ TUD_VIDEO_DESC_CS_VS_FMT_MJPEG_LEN + TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT_LEN + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ _epin, /*bmInfo*/0, /*bTerminalLink*/UVC_ENTITY_CAP_OUTPUT_TERMINAL, \ /*bStillCaptureMethod*/0, /*bTriggerSupport*/0, /*bTriggerUsage*/0, \ /*bmaControls(1)*/0), \ diff --git a/examples/host/cdc_msc_hid/src/cdc_app.c b/examples/host/cdc_msc_hid/src/cdc_app.c index a1b26e49c..e275e7943 100644 --- a/examples/host/cdc_msc_hid/src/cdc_app.c +++ b/examples/host/cdc_msc_hid/src/cdc_app.c @@ -27,20 +27,11 @@ #include "tusb.h" #include "bsp/board_api.h" -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM DECLARATION -//--------------------------------------------------------------------+ - - -//------------- IMPLEMENTATION -------------// - -size_t get_console_inputs(uint8_t* buf, size_t bufsize) -{ +size_t get_console_inputs(uint8_t* buf, size_t bufsize) { size_t count = 0; - while (count < bufsize) - { + while (count < bufsize) { int ch = board_getchar(); - if ( ch <= 0 ) break; + if (ch <= 0) break; buf[count] = (uint8_t) ch; count++; @@ -49,22 +40,18 @@ size_t get_console_inputs(uint8_t* buf, size_t bufsize) return count; } -void cdc_app_task(void) -{ - uint8_t buf[64+1]; // +1 for extra null character - uint32_t const bufsize = sizeof(buf)-1; +void cdc_app_task(void) { + uint8_t buf[64 + 1]; // +1 for extra null character + uint32_t const bufsize = sizeof(buf) - 1; uint32_t count = get_console_inputs(buf, bufsize); buf[count] = 0; // loop over all mounted interfaces - for(uint8_t idx=0; idx cdc interfaces - if (count) - { + if (count) { tuh_cdc_write(idx, buf, count); tuh_cdc_write_flush(idx); } @@ -72,11 +59,14 @@ void cdc_app_task(void) } } +//--------------------------------------------------------------------+ +// TinyUSB callbacks +//--------------------------------------------------------------------+ + // Invoked when received new data -void tuh_cdc_rx_cb(uint8_t idx) -{ - uint8_t buf[64+1]; // +1 for extra null character - uint32_t const bufsize = sizeof(buf)-1; +void tuh_cdc_rx_cb(uint8_t idx) { + uint8_t buf[64 + 1]; // +1 for extra null character + uint32_t const bufsize = sizeof(buf) - 1; // forward cdc interfaces -> console uint32_t count = tuh_cdc_read(idx, buf, bufsize); @@ -85,29 +75,35 @@ void tuh_cdc_rx_cb(uint8_t idx) printf((char*) buf); } -void tuh_cdc_mount_cb(uint8_t idx) -{ - tuh_itf_info_t itf_info = { 0 }; +// Invoked when a device with CDC interface is mounted +// idx is index of cdc interface in the internal pool. +void tuh_cdc_mount_cb(uint8_t idx) { + tuh_itf_info_t itf_info = {0}; tuh_cdc_itf_get_info(idx, &itf_info); - printf("CDC Interface is mounted: address = %u, itf_num = %u\r\n", itf_info.daddr, itf_info.desc.bInterfaceNumber); + printf("CDC Interface is mounted: address = %u, itf_num = %u\r\n", itf_info.daddr, + itf_info.desc.bInterfaceNumber); #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM - // CFG_TUH_CDC_LINE_CODING_ON_ENUM must be defined for line coding is set by tinyusb in enumeration - // otherwise you need to call tuh_cdc_set_line_coding() first - cdc_line_coding_t line_coding = { 0 }; - if ( tuh_cdc_get_local_line_coding(idx, &line_coding) ) - { + // If CFG_TUH_CDC_LINE_CODING_ON_ENUM is defined, line coding will be set by tinyusb stack + // while eneumerating new cdc device + cdc_line_coding_t line_coding = {0}; + if (tuh_cdc_get_local_line_coding(idx, &line_coding)) { printf(" Baudrate: %lu, Stop Bits : %u\r\n", line_coding.bit_rate, line_coding.stop_bits); - printf(" Parity : %u, Data Width: %u\r\n", line_coding.parity , line_coding.data_bits); + printf(" Parity : %u, Data Width: %u\r\n", line_coding.parity, line_coding.data_bits); } +#else + // Set Line Coding upon mounted + cdc_line_coding_t new_line_coding = { 115200, CDC_LINE_CODING_STOP_BITS_1, CDC_LINE_CODING_PARITY_NONE, 8 }; + tuh_cdc_set_line_coding(idx, &new_line_coding, NULL, 0); #endif } -void tuh_cdc_umount_cb(uint8_t idx) -{ - tuh_itf_info_t itf_info = { 0 }; +// Invoked when a device with CDC interface is unmounted +void tuh_cdc_umount_cb(uint8_t idx) { + tuh_itf_info_t itf_info = {0}; tuh_cdc_itf_get_info(idx, &itf_info); - printf("CDC Interface is unmounted: address = %u, itf_num = %u\r\n", itf_info.daddr, itf_info.desc.bInterfaceNumber); + printf("CDC Interface is unmounted: address = %u, itf_num = %u\r\n", itf_info.daddr, + itf_info.desc.bInterfaceNumber); } diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index 61abb85eb..76d59c316 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -105,6 +105,7 @@ #define CFG_TUH_CDC 1 // CDC ACM #define CFG_TUH_CDC_FTDI 1 // FTDI Serial. FTDI is not part of CDC class, only to re-use CDC driver API #define CFG_TUH_CDC_CP210X 1 // CP210x Serial. CP210X is not part of CDC class, only to re-use CDC driver API +#define CFG_TUH_CDC_CH34X 1 // CH340 or CH341 Serial. CH34X is not part of CDC class, only to re-use CDC driver API #define CFG_TUH_HID (3*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces #define CFG_TUH_MSC 1 #define CFG_TUH_VENDOR 0 diff --git a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h index c661f47be..bb7c3388d 100644 --- a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h +++ b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h @@ -110,6 +110,7 @@ #define CFG_TUH_CDC 1 // CDC ACM #define CFG_TUH_CDC_FTDI 1 // FTDI Serial. FTDI is not part of CDC class, only to re-use CDC driver API #define CFG_TUH_CDC_CP210X 1 // CP210x Serial. CP210X is not part of CDC class, only to re-use CDC driver API +#define CFG_TUH_CDC_CH34X 1 // CH340 or CH341 Serial. CH34X is not part of CDC class, only to re-use CDC driver API #define CFG_TUH_HID (3*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces #define CFG_TUH_MSC 1 #define CFG_TUH_VENDOR 0 diff --git a/hw/bsp/board_api.h b/hw/bsp/board_api.h index 404509a28..0c8a35924 100644 --- a/hw/bsp/board_api.h +++ b/hw/bsp/board_api.h @@ -33,9 +33,26 @@ extern "C" { #include #include - #include "tusb.h" +#if CFG_TUSB_OS == OPT_OS_FREERTOS +#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) + // ESP-IDF need "freertos/" prefix in include path. + // CFG_TUSB_OS_INC_PATH should be defined accordingly. + #include "freertos/FreeRTOS.h" + #include "freertos/semphr.h" + #include "freertos/queue.h" + #include "freertos/task.h" + #include "freertos/timers.h" +#else + #include "FreeRTOS.h" + #include "semphr.h" + #include "queue.h" + #include "task.h" + #include "timers.h" +#endif +#endif + // Define the default baudrate #ifndef CFG_BOARD_UART_BAUDRATE #define CFG_BOARD_UART_BAUDRATE 115200 ///< Default baud rate diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c index 325e9ab0f..5599d1504 100644 --- a/hw/bsp/espressif/boards/family.c +++ b/hw/bsp/espressif/boards/family.c @@ -33,7 +33,7 @@ #include "hal/usb_hal.h" #include "soc/usb_periph.h" -#include "driver/rmt.h" +#include "driver/gpio.h" #include "driver/uart.h" #if ESP_IDF_VERSION_MAJOR > 4 @@ -48,7 +48,7 @@ #ifdef NEOPIXEL_PIN #include "led_strip.h" -static led_strip_t* strip; +static led_strip_handle_t led_strip; #endif #if CFG_TUH_ENABLED && CFG_TUH_MAX3421 @@ -85,15 +85,23 @@ void board_init(void) { #endif // WS2812 Neopixel driver with RMT peripheral - rmt_config_t config = RMT_DEFAULT_CONFIG_TX(NEOPIXEL_PIN, RMT_CHANNEL_0); - config.clk_div = 2; // set counter clock to 40MHz + led_strip_rmt_config_t rmt_config = { + .clk_src = RMT_CLK_SRC_DEFAULT, // different clock source can lead to different power consumption + .resolution_hz = 10 * 1000 * 1000, // RMT counter clock frequency, default = 10 Mhz + .flags.with_dma = false, // DMA feature is available on ESP target like ESP32-S3 + }; + + led_strip_config_t strip_config = { + .strip_gpio_num = NEOPIXEL_PIN, // The GPIO that connected to the LED strip's data line + .max_leds = 1, // The number of LEDs in the strip, + .led_pixel_format = LED_PIXEL_FORMAT_GRB, // Pixel format of your LED strip + .led_model = LED_MODEL_WS2812, // LED strip model + .flags.invert_out = false, // whether to invert the output signal + }; - rmt_config(&config); - rmt_driver_install(config.channel, 0, 0); + ESP_ERROR_CHECK(led_strip_new_rmt_device(&strip_config, &rmt_config, &led_strip)); - led_strip_config_t strip_config = LED_STRIP_DEFAULT_CONFIG(1, (led_strip_dev_t) config.channel); - strip = led_strip_new_rmt_ws2812(&strip_config); - strip->clear(strip, 100); // off led + led_strip_clear(led_strip); // off #endif // Button @@ -158,8 +166,8 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) { void board_led_write(bool state) { #ifdef NEOPIXEL_PIN - strip->set_pixel(strip, 0, state ? 0x08 : 0x00, 0x00, 0x00); - strip->refresh(strip, 100); + led_strip_set_pixel(led_strip, 0, state ? 0x08 : 0x00, 0x00, 0x00); + led_strip_refresh(led_strip); #endif } diff --git a/hw/bsp/espressif/components/led_strip/CHANGELOG.md b/hw/bsp/espressif/components/led_strip/CHANGELOG.md new file mode 100644 index 000000000..51c0cd30c --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/CHANGELOG.md @@ -0,0 +1,38 @@ +## 2.5.0 + +- Enabled support for IDF4.4 and above + - with RMT backend only +- Added API `led_strip_set_pixel_hsv` + +## 2.4.0 + +- Support configurable SPI mode to control leds + - recommend enabling DMA when using SPI mode + +## 2.3.0 + +- Support configurable RMT channel size by setting `mem_block_symbols` + +## 2.2.0 + +- Support for 4 components RGBW leds (SK6812): + - in led_strip_config_t new fields + led_pixel_format, controlling byte format (LED_PIXEL_FORMAT_GRB, LED_PIXEL_FORMAT_GRBW) + led_model, used to configure bit timing (LED_MODEL_WS2812, LED_MODEL_SK6812) + - new API led_strip_set_pixel_rgbw + - new interface type set_pixel_rgbw + +## 2.1.0 + +- Support DMA feature, which offloads the CPU by a lot when it comes to drive a bunch of LEDs +- Support various RMT clock sources +- Acquire and release the power management lock before and after each refresh +- New driver flag: `invert_out` which can invert the led control signal by hardware + +## 2.0.0 + +- Reimplemented the driver using the new RMT driver (`driver/rmt_tx.h`) + +## 1.0.0 + +- Initial driver version, based on the legacy RMT driver (`driver/rmt.h`) diff --git a/hw/bsp/espressif/components/led_strip/CMakeLists.txt b/hw/bsp/espressif/components/led_strip/CMakeLists.txt index 8266c5a1c..15de610cc 100644 --- a/hw/bsp/espressif/components/led_strip/CMakeLists.txt +++ b/hw/bsp/espressif/components/led_strip/CMakeLists.txt @@ -1,7 +1,22 @@ -set(component_srcs "src/led_strip_rmt_ws2812.c") +include($ENV{IDF_PATH}/tools/cmake/version.cmake) -idf_component_register(SRCS "${component_srcs}" - INCLUDE_DIRS "include" - PRIV_INCLUDE_DIRS "" - PRIV_REQUIRES "driver" - REQUIRES "") +set(srcs "src/led_strip_api.c") + +if("${IDF_VERSION_MAJOR}.${IDF_VERSION_MINOR}" VERSION_GREATER_EQUAL "5.0") + if(CONFIG_SOC_RMT_SUPPORTED) + list(APPEND srcs "src/led_strip_rmt_dev.c" "src/led_strip_rmt_encoder.c") + endif() +else() + list(APPEND srcs "src/led_strip_rmt_dev_idf4.c") +endif() + +# the SPI backend driver relies on something that was added in IDF 5.1 +if("${IDF_VERSION_MAJOR}.${IDF_VERSION_MINOR}" VERSION_GREATER_EQUAL "5.1") + if(CONFIG_SOC_GPSPI_SUPPORTED) + list(APPEND srcs "src/led_strip_spi_dev.c") + endif() +endif() + +idf_component_register(SRCS ${srcs} + INCLUDE_DIRS "include" "interface" + REQUIRES "driver") diff --git a/hw/bsp/espressif/components/led_strip/LICENSE b/hw/bsp/espressif/components/led_strip/LICENSE new file mode 100644 index 000000000..d64569567 --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/LICENSE @@ -0,0 +1,202 @@ + + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + + Copyright [yyyy] [name of copyright owner] + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. diff --git a/hw/bsp/espressif/components/led_strip/README.md b/hw/bsp/espressif/components/led_strip/README.md new file mode 100644 index 000000000..543d29642 --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/README.md @@ -0,0 +1,97 @@ +# LED Strip Driver + +[![Component Registry](https://components.espressif.com/components/espressif/led_strip/badge.svg)](https://components.espressif.com/components/espressif/led_strip) + +This driver is designed for addressable LEDs like [WS2812](http://www.world-semi.com/Certifications/WS2812B.html), where each LED is controlled by a single data line. + +## Backend Controllers + +### The [RMT](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-reference/peripherals/rmt.html) Peripheral + +This is the most economical way to drive the LEDs because it only consumes one RMT channel, leaving other channels free to use. However, the memory usage increases dramatically with the number of LEDs. If the RMT hardware can't be assist by DMA, the driver will going into interrupt very frequently, thus result in a high CPU usage. What's worse, if the RMT interrupt is delayed or not serviced in time (e.g. if Wi-Fi interrupt happens on the same CPU core), the RMT transaction will be corrupted and the LEDs will display incorrect colors. If you want to use RMT to drive a large number of LEDs, you'd better to enable the DMA feature if possible [^1]. + +#### Allocate LED Strip Object with RMT Backend + +```c +#define BLINK_GPIO 0 + +led_strip_handle_t led_strip; + +/* LED strip initialization with the GPIO and pixels number*/ +led_strip_config_t strip_config = { + .strip_gpio_num = BLINK_GPIO, // The GPIO that connected to the LED strip's data line + .max_leds = 1, // The number of LEDs in the strip, + .led_pixel_format = LED_PIXEL_FORMAT_GRB, // Pixel format of your LED strip + .led_model = LED_MODEL_WS2812, // LED strip model + .flags.invert_out = false, // whether to invert the output signal (useful when your hardware has a level inverter) +}; + +led_strip_rmt_config_t rmt_config = { +#if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(5, 0, 0) + .rmt_channel = 0, +#else + .clk_src = RMT_CLK_SRC_DEFAULT, // different clock source can lead to different power consumption + .resolution_hz = 10 * 1000 * 1000, // 10MHz + .flags.with_dma = false, // whether to enable the DMA feature +#endif +}; +ESP_ERROR_CHECK(led_strip_new_rmt_device(&strip_config, &rmt_config, &led_strip)); +``` + +You can create multiple LED strip objects with different GPIOs and pixel numbers. The backend driver will automatically allocate the RMT channel for you if there is more available. + +### The [SPI](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-reference/peripherals/spi_master.html) Peripheral + +SPI peripheral can also be used to generate the timing required by the LED strip. However this backend is not as economical as the RMT one, because it will take up the whole **bus**, unlike the RMT just takes one **channel**. You **CAN'T** connect other devices to the same SPI bus if it's been used by the led_strip, because the led_strip doesn't have the concept of "Chip Select". + +Please note, the SPI backend has a dependency of **ESP-IDF >= 5.1** + +#### Allocate LED Strip Object with SPI Backend + +```c +#define BLINK_GPIO 0 + +led_strip_handle_t led_strip; + +/* LED strip initialization with the GPIO and pixels number*/ +led_strip_config_t strip_config = { + .strip_gpio_num = BLINK_GPIO, // The GPIO that connected to the LED strip's data line + .max_leds = 1, // The number of LEDs in the strip, + .led_pixel_format = LED_PIXEL_FORMAT_GRB, // Pixel format of your LED strip + .led_model = LED_MODEL_WS2812, // LED strip model + .flags.invert_out = false, // whether to invert the output signal (useful when your hardware has a level inverter) +}; + +led_strip_spi_config_t spi_config = { + .clk_src = SPI_CLK_SRC_DEFAULT, // different clock source can lead to different power consumption + .flags.with_dma = true, // Using DMA can improve performance and help drive more LEDs + .spi_bus = SPI2_HOST, // SPI bus ID +}; +ESP_ERROR_CHECK(led_strip_new_spi_device(&strip_config, &spi_config, &led_strip)); +``` + +The number of LED strip objects can be created depends on how many free SPI buses are free to use in your project. + +## FAQ + +* Which led_strip backend should I choose? + * It depends on your application requirement and target chip's ability. + + ```mermaid + flowchart LR + A{Is RMT supported?} + A --> |No| B[SPI backend] + B --> C{Does the led strip has \n a larger number of LEDs?} + C --> |No| D[Don't have to enable the DMA of the backend] + C --> |Yes| E[Enable the DMA of the backend] + A --> |Yes| F{Does the led strip has \n a larger number of LEDs?} + F --> |Yes| G{Does RMT support DMA?} + G --> |Yes| E + G --> |No| B + F --> |No| H[RMT backend] --> D + ``` + +* How to set the brightness of the LED strip? + * You can tune the brightness by scaling the value of each R-G-B element with a **same** factor. But pay attention to the overflow of the value. + +[^1]: The RMT DMA feature is not available on all ESP chips. Please check the data sheet before using it. diff --git a/hw/bsp/espressif/components/led_strip/api.md b/hw/bsp/espressif/components/led_strip/api.md new file mode 100644 index 000000000..6581d6604 --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/api.md @@ -0,0 +1,454 @@ +# API Reference + +## Header files + +- [include/led_strip.h](#file-includeled_striph) +- [include/led_strip_rmt.h](#file-includeled_strip_rmth) +- [include/led_strip_spi.h](#file-includeled_strip_spih) +- [include/led_strip_types.h](#file-includeled_strip_typesh) +- [interface/led_strip_interface.h](#file-interfaceled_strip_interfaceh) + +## File include/led_strip.h + +## Functions + +| Type | Name | +| ---: | :--- | +| esp\_err\_t | [**led\_strip\_clear**](#function-led_strip_clear) ([**led\_strip\_handle\_t**](#struct-led_strip_t) strip)
_Clear LED strip (turn off all LEDs)_ | +| esp\_err\_t | [**led\_strip\_del**](#function-led_strip_del) ([**led\_strip\_handle\_t**](#struct-led_strip_t) strip)
_Free LED strip resources._ | +| esp\_err\_t | [**led\_strip\_refresh**](#function-led_strip_refresh) ([**led\_strip\_handle\_t**](#struct-led_strip_t) strip)
_Refresh memory colors to LEDs._ | +| esp\_err\_t | [**led\_strip\_set\_pixel**](#function-led_strip_set_pixel) ([**led\_strip\_handle\_t**](#struct-led_strip_t) strip, uint32\_t index, uint32\_t red, uint32\_t green, uint32\_t blue)
_Set RGB for a specific pixel._ | +| esp\_err\_t | [**led\_strip\_set\_pixel\_hsv**](#function-led_strip_set_pixel_hsv) ([**led\_strip\_handle\_t**](#struct-led_strip_t) strip, uint32\_t index, uint16\_t hue, uint8\_t saturation, uint8\_t value)
_Set HSV for a specific pixel._ | +| esp\_err\_t | [**led\_strip\_set\_pixel\_rgbw**](#function-led_strip_set_pixel_rgbw) ([**led\_strip\_handle\_t**](#struct-led_strip_t) strip, uint32\_t index, uint32\_t red, uint32\_t green, uint32\_t blue, uint32\_t white)
_Set RGBW for a specific pixel._ | + +## Functions Documentation + +### function `led_strip_clear` + +_Clear LED strip (turn off all LEDs)_ + +```c +esp_err_t led_strip_clear ( + led_strip_handle_t strip +) +``` + +**Parameters:** + +- `strip` LED strip + +**Returns:** + +- ESP\_OK: Clear LEDs successfully +- ESP\_FAIL: Clear LEDs failed because some other error occurred + +### function `led_strip_del` + +_Free LED strip resources._ + +```c +esp_err_t led_strip_del ( + led_strip_handle_t strip +) +``` + +**Parameters:** + +- `strip` LED strip + +**Returns:** + +- ESP\_OK: Free resources successfully +- ESP\_FAIL: Free resources failed because error occurred + +### function `led_strip_refresh` + +_Refresh memory colors to LEDs._ + +```c +esp_err_t led_strip_refresh ( + led_strip_handle_t strip +) +``` + +**Parameters:** + +- `strip` LED strip + +**Returns:** + +- ESP\_OK: Refresh successfully +- ESP\_FAIL: Refresh failed because some other error occurred + +**Note:** + +: After updating the LED colors in the memory, a following invocation of this API is needed to flush colors to strip. + +### function `led_strip_set_pixel` + +_Set RGB for a specific pixel._ + +```c +esp_err_t led_strip_set_pixel ( + led_strip_handle_t strip, + uint32_t index, + uint32_t red, + uint32_t green, + uint32_t blue +) +``` + +**Parameters:** + +- `strip` LED strip +- `index` index of pixel to set +- `red` red part of color +- `green` green part of color +- `blue` blue part of color + +**Returns:** + +- ESP\_OK: Set RGB for a specific pixel successfully +- ESP\_ERR\_INVALID\_ARG: Set RGB for a specific pixel failed because of invalid parameters +- ESP\_FAIL: Set RGB for a specific pixel failed because other error occurred + +### function `led_strip_set_pixel_hsv` + +_Set HSV for a specific pixel._ + +```c +esp_err_t led_strip_set_pixel_hsv ( + led_strip_handle_t strip, + uint32_t index, + uint16_t hue, + uint8_t saturation, + uint8_t value +) +``` + +**Parameters:** + +- `strip` LED strip +- `index` index of pixel to set +- `hue` hue part of color (0 - 360) +- `saturation` saturation part of color (0 - 255) +- `value` value part of color (0 - 255) + +**Returns:** + +- ESP\_OK: Set HSV color for a specific pixel successfully +- ESP\_ERR\_INVALID\_ARG: Set HSV color for a specific pixel failed because of an invalid argument +- ESP\_FAIL: Set HSV color for a specific pixel failed because other error occurred + +### function `led_strip_set_pixel_rgbw` + +_Set RGBW for a specific pixel._ + +```c +esp_err_t led_strip_set_pixel_rgbw ( + led_strip_handle_t strip, + uint32_t index, + uint32_t red, + uint32_t green, + uint32_t blue, + uint32_t white +) +``` + +**Note:** + +Only call this function if your led strip does have the white component (e.g. SK6812-RGBW) + +**Note:** + +Also see `led_strip_set_pixel` if you only want to specify the RGB part of the color and bypass the white component + +**Parameters:** + +- `strip` LED strip +- `index` index of pixel to set +- `red` red part of color +- `green` green part of color +- `blue` blue part of color +- `white` separate white component + +**Returns:** + +- ESP\_OK: Set RGBW color for a specific pixel successfully +- ESP\_ERR\_INVALID\_ARG: Set RGBW color for a specific pixel failed because of an invalid argument +- ESP\_FAIL: Set RGBW color for a specific pixel failed because other error occurred + +## File include/led_strip_rmt.h + +## Structures and Types + +| Type | Name | +| ---: | :--- | +| struct | [**led\_strip\_rmt\_config\_t**](#struct-led_strip_rmt_config_t)
_LED Strip RMT specific configuration._ | + +## Functions + +| Type | Name | +| ---: | :--- | +| esp\_err\_t | [**led\_strip\_new\_rmt\_device**](#function-led_strip_new_rmt_device) (const [**led\_strip\_config\_t**](#struct-led_strip_config_t) \*led\_config, const [**led\_strip\_rmt\_config\_t**](#struct-led_strip_rmt_config_t) \*rmt\_config, [**led\_strip\_handle\_t**](#struct-led_strip_t) \*ret\_strip)
_Create LED strip based on RMT TX channel._ | + +## Structures and Types Documentation + +### struct `led_strip_rmt_config_t` + +_LED Strip RMT specific configuration._ + +Variables: + +- rmt\_clock\_source\_t clk_src
RMT clock source + +- struct [**led\_strip\_rmt\_config\_t**](#struct-led_strip_rmt_config_t) flags
Extra driver flags + +- size\_t mem_block_symbols
How many RMT symbols can one RMT channel hold at one time. Set to 0 will fallback to use the default size. + +- uint32\_t resolution_hz
RMT tick resolution, if set to zero, a default resolution (10MHz) will be applied + +- uint32\_t with_dma
Use DMA to transmit data + +## Functions Documentation + +### function `led_strip_new_rmt_device` + +_Create LED strip based on RMT TX channel._ + +```c +esp_err_t led_strip_new_rmt_device ( + const led_strip_config_t *led_config, + const led_strip_rmt_config_t *rmt_config, + led_strip_handle_t *ret_strip +) +``` + +**Parameters:** + +- `led_config` LED strip configuration +- `rmt_config` RMT specific configuration +- `ret_strip` Returned LED strip handle + +**Returns:** + +- ESP\_OK: create LED strip handle successfully +- ESP\_ERR\_INVALID\_ARG: create LED strip handle failed because of invalid argument +- ESP\_ERR\_NO\_MEM: create LED strip handle failed because of out of memory +- ESP\_FAIL: create LED strip handle failed because some other error + +## File include/led_strip_spi.h + +## Structures and Types + +| Type | Name | +| ---: | :--- | +| struct | [**led\_strip\_spi\_config\_t**](#struct-led_strip_spi_config_t)
_LED Strip SPI specific configuration._ | + +## Functions + +| Type | Name | +| ---: | :--- | +| esp\_err\_t | [**led\_strip\_new\_spi\_device**](#function-led_strip_new_spi_device) (const [**led\_strip\_config\_t**](#struct-led_strip_config_t) \*led\_config, const [**led\_strip\_spi\_config\_t**](#struct-led_strip_spi_config_t) \*spi\_config, [**led\_strip\_handle\_t**](#struct-led_strip_t) \*ret\_strip)
_Create LED strip based on SPI MOSI channel._ | + +## Structures and Types Documentation + +### struct `led_strip_spi_config_t` + +_LED Strip SPI specific configuration._ + +Variables: + +- spi\_clock\_source\_t clk_src
SPI clock source + +- struct [**led\_strip\_spi\_config\_t**](#struct-led_strip_spi_config_t) flags
Extra driver flags + +- spi\_host\_device\_t spi_bus
SPI bus ID. Which buses are available depends on the specific chip + +- uint32\_t with_dma
Use DMA to transmit data + +## Functions Documentation + +### function `led_strip_new_spi_device` + +_Create LED strip based on SPI MOSI channel._ + +```c +esp_err_t led_strip_new_spi_device ( + const led_strip_config_t *led_config, + const led_strip_spi_config_t *spi_config, + led_strip_handle_t *ret_strip +) +``` + +**Note:** + +Although only the MOSI line is used for generating the signal, the whole SPI bus can't be used for other purposes. + +**Parameters:** + +- `led_config` LED strip configuration +- `spi_config` SPI specific configuration +- `ret_strip` Returned LED strip handle + +**Returns:** + +- ESP\_OK: create LED strip handle successfully +- ESP\_ERR\_INVALID\_ARG: create LED strip handle failed because of invalid argument +- ESP\_ERR\_NOT\_SUPPORTED: create LED strip handle failed because of unsupported configuration +- ESP\_ERR\_NO\_MEM: create LED strip handle failed because of out of memory +- ESP\_FAIL: create LED strip handle failed because some other error + +## File include/led_strip_types.h + +## Structures and Types + +| Type | Name | +| ---: | :--- | +| enum | [**led\_model\_t**](#enum-led_model_t)
_LED strip model._ | +| enum | [**led\_pixel\_format\_t**](#enum-led_pixel_format_t)
_LED strip pixel format._ | +| struct | [**led\_strip\_config\_t**](#struct-led_strip_config_t)
_LED Strip Configuration._ | +| typedef struct [**led\_strip\_t**](#struct-led_strip_t) \* | [**led\_strip\_handle\_t**](#typedef-led_strip_handle_t)
_LED strip handle._ | + +## Structures and Types Documentation + +### enum `led_model_t` + +_LED strip model._ + +```c +enum led_model_t { + LED_MODEL_WS2812, + LED_MODEL_SK6812, + LED_MODEL_INVALID +}; +``` + +**Note:** + +Different led model may have different timing parameters, so we need to distinguish them. + +### enum `led_pixel_format_t` + +_LED strip pixel format._ + +```c +enum led_pixel_format_t { + LED_PIXEL_FORMAT_GRB, + LED_PIXEL_FORMAT_GRBW, + LED_PIXEL_FORMAT_INVALID +}; +``` + +### struct `led_strip_config_t` + +_LED Strip Configuration._ + +Variables: + +- struct [**led\_strip\_config\_t**](#struct-led_strip_config_t) flags
Extra driver flags + +- uint32\_t invert_out
Invert output signal + +- led\_model\_t led_model
LED model + +- led\_pixel\_format\_t led_pixel_format
LED pixel format + +- uint32\_t max_leds
Maximum LEDs in a single strip + +- int strip_gpio_num
GPIO number that used by LED strip + +### typedef `led_strip_handle_t` + +_LED strip handle._ + +```c +typedef struct led_strip_t* led_strip_handle_t; +``` + +## File interface/led_strip_interface.h + +## Structures and Types + +| Type | Name | +| ---: | :--- | +| struct | [**led\_strip\_t**](#struct-led_strip_t)
_LED strip interface definition._ | +| typedef struct [**led\_strip\_t**](#struct-led_strip_t) | [**led\_strip\_t**](#typedef-led_strip_t)
| + +## Structures and Types Documentation + +### struct `led_strip_t` + +_LED strip interface definition._ + +Variables: + +- esp\_err\_t(\* clear
_Clear LED strip (turn off all LEDs)_
**Parameters:** + +- `strip` LED strip +- `timeout_ms` timeout value for clearing task + +**Returns:** + +- ESP\_OK: Clear LEDs successfully +- ESP\_FAIL: Clear LEDs failed because some other error occurred + +- esp\_err\_t(\* del
_Free LED strip resources._
**Parameters:** + +- `strip` LED strip + +**Returns:** + +- ESP\_OK: Free resources successfully +- ESP\_FAIL: Free resources failed because error occurred + +- esp\_err\_t(\* refresh
_Refresh memory colors to LEDs._
**Parameters:** + +- `strip` LED strip +- `timeout_ms` timeout value for refreshing task + +**Returns:** + +- ESP\_OK: Refresh successfully +- ESP\_FAIL: Refresh failed because some other error occurred + +**Note:** + +: After updating the LED colors in the memory, a following invocation of this API is needed to flush colors to strip. + +- esp\_err\_t(\* set_pixel
_Set RGB for a specific pixel._
**Parameters:** + +- `strip` LED strip +- `index` index of pixel to set +- `red` red part of color +- `green` green part of color +- `blue` blue part of color + +**Returns:** + +- ESP\_OK: Set RGB for a specific pixel successfully +- ESP\_ERR\_INVALID\_ARG: Set RGB for a specific pixel failed because of invalid parameters +- ESP\_FAIL: Set RGB for a specific pixel failed because other error occurred + +- esp\_err\_t(\* set_pixel_rgbw
_Set RGBW for a specific pixel. Similar to_ `set_pixel`_but also set the white component._
**Parameters:** + +- `strip` LED strip +- `index` index of pixel to set +- `red` red part of color +- `green` green part of color +- `blue` blue part of color +- `white` separate white component + +**Returns:** + +- ESP\_OK: Set RGBW color for a specific pixel successfully +- ESP\_ERR\_INVALID\_ARG: Set RGBW color for a specific pixel failed because of an invalid argument +- ESP\_FAIL: Set RGBW color for a specific pixel failed because other error occurred + +### typedef `led_strip_t` + +```c +typedef struct led_strip_t led_strip_t; +``` + +Type of LED strip diff --git a/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/CMakeLists.txt b/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/CMakeLists.txt new file mode 100644 index 000000000..923c46310 --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/CMakeLists.txt @@ -0,0 +1,9 @@ +# For more information about build system see +# https://docs.espressif.com/projects/esp-idf/en/latest/api-guides/build-system.html +# The following five lines of boilerplate have to be in your project's +# CMakeLists in this exact order for cmake to work correctly +cmake_minimum_required(VERSION 3.16) + +set(IDF_TARGET "esp32s3") +include($ENV{IDF_PATH}/tools/cmake/project.cmake) +project(led_strip_rmt_ws2812) diff --git a/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/README.md b/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/README.md new file mode 100644 index 000000000..ad52235d5 --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/README.md @@ -0,0 +1,31 @@ +# LED Strip Example (RMT backend + WS2812) + +This example demonstrates how to blink the WS2812 LED using the [led_strip](https://components.espressif.com/component/espressif/led_strip) component. + +## How to Use Example + +### Hardware Required + +* A development board with Espressif SoC +* A USB cable for Power supply and programming +* WS2812 LED strip + +### Configure the Example + +Before project configuration and build, be sure to set the correct chip target using `idf.py set-target `. Then assign the proper GPIO in the [source file](main/led_strip_rmt_ws2812_main.c). If your led strip has multiple LEDs, don't forget update the number. + +### Build and Flash + +Run `idf.py -p PORT build flash monitor` to build, flash and monitor the project. + +(To exit the serial monitor, type ``Ctrl-]``.) + +See the [Getting Started Guide](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/index.html) for full steps to configure and use ESP-IDF to build projects. + +## Example Output + +```text +I (299) gpio: GPIO[8]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0 +I (309) example: Created LED strip object with RMT backend +I (309) example: Start blinking LED strip +``` diff --git a/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/dependencies.lock b/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/dependencies.lock new file mode 100644 index 000000000..97840a153 --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/dependencies.lock @@ -0,0 +1,15 @@ +dependencies: + espressif/led_strip: + component_hash: null + source: + path: /home/hathach/code/idf-extra-components/led_strip + type: local + version: 2.5.2 + idf: + component_hash: null + source: + type: idf + version: 5.1.1 +manifest_hash: 47d47762be26168b388cb0e6cbfee6b22c68d630ebf4b27a49c47c4c54191590 +target: esp32s3 +version: 1.0.0 diff --git a/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/main/CMakeLists.txt b/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/main/CMakeLists.txt new file mode 100644 index 000000000..37b9c1458 --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/main/CMakeLists.txt @@ -0,0 +1,2 @@ +idf_component_register(SRCS "led_strip_rmt_ws2812_main.c" + INCLUDE_DIRS ".") diff --git a/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/main/idf_component.yml b/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/main/idf_component.yml new file mode 100644 index 000000000..916c366c7 --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/main/idf_component.yml @@ -0,0 +1,5 @@ +## IDF Component Manager Manifest File +dependencies: + espressif/led_strip: + version: '^2' + override_path: '../../../' diff --git a/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/main/led_strip_rmt_ws2812_main.c b/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/main/led_strip_rmt_ws2812_main.c new file mode 100644 index 000000000..4b20a5958 --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/examples/led_strip_rmt_ws2812/main/led_strip_rmt_ws2812_main.c @@ -0,0 +1,75 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Unlicense OR CC0-1.0 + */ +#include +#include "freertos/FreeRTOS.h" +#include "freertos/task.h" +#include "led_strip.h" +#include "esp_log.h" +#include "esp_err.h" + +// GPIO assignment +#define LED_STRIP_BLINK_GPIO 48 +// Numbers of the LED in the strip +#define LED_STRIP_LED_NUMBERS 1 +// 10MHz resolution, 1 tick = 0.1us (led strip needs a high resolution) +#define LED_STRIP_RMT_RES_HZ (10 * 1000 * 1000) + +static const char *TAG = "example"; + +led_strip_handle_t configure_led(void) +{ + // LED strip general initialization, according to your led board design + led_strip_config_t strip_config = { + .strip_gpio_num = LED_STRIP_BLINK_GPIO, // The GPIO that connected to the LED strip's data line + .max_leds = LED_STRIP_LED_NUMBERS, // The number of LEDs in the strip, + .led_pixel_format = LED_PIXEL_FORMAT_GRB, // Pixel format of your LED strip + .led_model = LED_MODEL_WS2812, // LED strip model + .flags.invert_out = false, // whether to invert the output signal + }; + + // LED strip backend configuration: RMT + led_strip_rmt_config_t rmt_config = { +#if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(5, 0, 0) + .rmt_channel = 0, +#else + .clk_src = RMT_CLK_SRC_DEFAULT, // different clock source can lead to different power consumption + .resolution_hz = LED_STRIP_RMT_RES_HZ, // RMT counter clock frequency + .flags.with_dma = false, // DMA feature is available on ESP target like ESP32-S3 +#endif + }; + + // LED Strip object handle + led_strip_handle_t led_strip; + ESP_ERROR_CHECK(led_strip_new_rmt_device(&strip_config, &rmt_config, &led_strip)); + ESP_LOGI(TAG, "Created LED strip object with RMT backend"); + return led_strip; +} + +void app_main(void) +{ + led_strip_handle_t led_strip = configure_led(); + bool led_on_off = false; + + ESP_LOGI(TAG, "Start blinking LED strip"); + while (1) { + if (led_on_off) { + /* Set the LED pixel using RGB from 0 (0%) to 255 (100%) for each color */ + for (int i = 0; i < LED_STRIP_LED_NUMBERS; i++) { + ESP_ERROR_CHECK(led_strip_set_pixel(led_strip, i, 5, 5, 5)); + } + /* Refresh the strip to send data */ + ESP_ERROR_CHECK(led_strip_refresh(led_strip)); + ESP_LOGI(TAG, "LED ON!"); + } else { + /* Set all LED off to clear all pixels */ + ESP_ERROR_CHECK(led_strip_clear(led_strip)); + ESP_LOGI(TAG, "LED OFF!"); + } + + led_on_off = !led_on_off; + vTaskDelay(pdMS_TO_TICKS(500)); + } +} diff --git a/hw/bsp/espressif/components/led_strip/idf_component.yml b/hw/bsp/espressif/components/led_strip/idf_component.yml new file mode 100644 index 000000000..1fd9b83ee --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/idf_component.yml @@ -0,0 +1,5 @@ +version: "2.5.2" +description: Driver for Addressable LED Strip (WS2812, etc) +url: https://github.com/espressif/idf-extra-components/tree/master/led_strip +dependencies: + idf: ">=4.4" diff --git a/hw/bsp/espressif/components/led_strip/include/led_strip.h b/hw/bsp/espressif/components/led_strip/include/led_strip.h index a9dffc325..38711744a 100644 --- a/hw/bsp/espressif/components/led_strip/include/led_strip.h +++ b/hw/bsp/espressif/components/led_strip/include/led_strip.h @@ -1,125 +1,110 @@ -// Copyright 2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once +#include +#include "esp_err.h" +#include "led_strip_rmt.h" +#include "esp_idf_version.h" + +#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 1, 0) +#include "led_strip_spi.h" +#endif + #ifdef __cplusplus extern "C" { #endif -#include "esp_err.h" - /** -* @brief LED Strip Type -* -*/ -typedef struct led_strip_s led_strip_t; + * @brief Set RGB for a specific pixel + * + * @param strip: LED strip + * @param index: index of pixel to set + * @param red: red part of color + * @param green: green part of color + * @param blue: blue part of color + * + * @return + * - ESP_OK: Set RGB for a specific pixel successfully + * - ESP_ERR_INVALID_ARG: Set RGB for a specific pixel failed because of invalid parameters + * - ESP_FAIL: Set RGB for a specific pixel failed because other error occurred + */ +esp_err_t led_strip_set_pixel(led_strip_handle_t strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue); /** -* @brief LED Strip Device Type -* -*/ -typedef void *led_strip_dev_t; + * @brief Set RGBW for a specific pixel + * + * @note Only call this function if your led strip does have the white component (e.g. SK6812-RGBW) + * @note Also see `led_strip_set_pixel` if you only want to specify the RGB part of the color and bypass the white component + * + * @param strip: LED strip + * @param index: index of pixel to set + * @param red: red part of color + * @param green: green part of color + * @param blue: blue part of color + * @param white: separate white component + * + * @return + * - ESP_OK: Set RGBW color for a specific pixel successfully + * - ESP_ERR_INVALID_ARG: Set RGBW color for a specific pixel failed because of an invalid argument + * - ESP_FAIL: Set RGBW color for a specific pixel failed because other error occurred + */ +esp_err_t led_strip_set_pixel_rgbw(led_strip_handle_t strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue, uint32_t white); /** -* @brief Declare of LED Strip Type -* -*/ -struct led_strip_s { - /** - * @brief Set RGB for a specific pixel - * - * @param strip: LED strip - * @param index: index of pixel to set - * @param red: red part of color - * @param green: green part of color - * @param blue: blue part of color - * - * @return - * - ESP_OK: Set RGB for a specific pixel successfully - * - ESP_ERR_INVALID_ARG: Set RGB for a specific pixel failed because of invalid parameters - * - ESP_FAIL: Set RGB for a specific pixel failed because other error occurred - */ - esp_err_t (*set_pixel)(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue); - - /** - * @brief Refresh memory colors to LEDs - * - * @param strip: LED strip - * @param timeout_ms: timeout value for refreshing task - * - * @return - * - ESP_OK: Refresh successfully - * - ESP_ERR_TIMEOUT: Refresh failed because of timeout - * - ESP_FAIL: Refresh failed because some other error occurred - * - * @note: - * After updating the LED colors in the memory, a following invocation of this API is needed to flush colors to strip. - */ - esp_err_t (*refresh)(led_strip_t *strip, uint32_t timeout_ms); - - /** - * @brief Clear LED strip (turn off all LEDs) - * - * @param strip: LED strip - * @param timeout_ms: timeout value for clearing task - * - * @return - * - ESP_OK: Clear LEDs successfully - * - ESP_ERR_TIMEOUT: Clear LEDs failed because of timeout - * - ESP_FAIL: Clear LEDs failed because some other error occurred - */ - esp_err_t (*clear)(led_strip_t *strip, uint32_t timeout_ms); - - /** - * @brief Free LED strip resources - * - * @param strip: LED strip - * - * @return - * - ESP_OK: Free resources successfully - * - ESP_FAIL: Free resources failed because error occurred - */ - esp_err_t (*del)(led_strip_t *strip); -}; + * @brief Set HSV for a specific pixel + * + * @param strip: LED strip + * @param index: index of pixel to set + * @param hue: hue part of color (0 - 360) + * @param saturation: saturation part of color (0 - 255) + * @param value: value part of color (0 - 255) + * + * @return + * - ESP_OK: Set HSV color for a specific pixel successfully + * - ESP_ERR_INVALID_ARG: Set HSV color for a specific pixel failed because of an invalid argument + * - ESP_FAIL: Set HSV color for a specific pixel failed because other error occurred + */ +esp_err_t led_strip_set_pixel_hsv(led_strip_handle_t strip, uint32_t index, uint16_t hue, uint8_t saturation, uint8_t value); /** -* @brief LED Strip Configuration Type -* -*/ -typedef struct { - uint32_t max_leds; /*!< Maximum LEDs in a single strip */ - led_strip_dev_t dev; /*!< LED strip device (e.g. RMT channel, PWM channel, etc) */ -} led_strip_config_t; + * @brief Refresh memory colors to LEDs + * + * @param strip: LED strip + * + * @return + * - ESP_OK: Refresh successfully + * - ESP_FAIL: Refresh failed because some other error occurred + * + * @note: + * After updating the LED colors in the memory, a following invocation of this API is needed to flush colors to strip. + */ +esp_err_t led_strip_refresh(led_strip_handle_t strip); /** - * @brief Default configuration for LED strip + * @brief Clear LED strip (turn off all LEDs) + * + * @param strip: LED strip * + * @return + * - ESP_OK: Clear LEDs successfully + * - ESP_FAIL: Clear LEDs failed because some other error occurred */ -#define LED_STRIP_DEFAULT_CONFIG(number, dev_hdl) \ - { \ - .max_leds = number, \ - .dev = dev_hdl, \ - } +esp_err_t led_strip_clear(led_strip_handle_t strip); /** -* @brief Install a new ws2812 driver (based on RMT peripheral) -* -* @param config: LED strip configuration -* @return -* LED strip instance or NULL -*/ -led_strip_t *led_strip_new_rmt_ws2812(const led_strip_config_t *config); + * @brief Free LED strip resources + * + * @param strip: LED strip + * + * @return + * - ESP_OK: Free resources successfully + * - ESP_FAIL: Free resources failed because error occurred + */ +esp_err_t led_strip_del(led_strip_handle_t strip); #ifdef __cplusplus } diff --git a/hw/bsp/espressif/components/led_strip/include/led_strip_rmt.h b/hw/bsp/espressif/components/led_strip/include/led_strip_rmt.h new file mode 100644 index 000000000..b575aeaba --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/include/led_strip_rmt.h @@ -0,0 +1,53 @@ +/* + * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#pragma once + +#include +#include "esp_err.h" +#include "led_strip_types.h" +#include "esp_idf_version.h" + +#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0) +#include "driver/rmt_types.h" +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief LED Strip RMT specific configuration + */ +typedef struct { +#if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(5, 0, 0) + uint8_t rmt_channel; /*!< Specify the channel number, the legacy RMT driver doesn't support channel allocator */ +#else // new driver supports specify the clock source and clock resolution + rmt_clock_source_t clk_src; /*!< RMT clock source */ + uint32_t resolution_hz; /*!< RMT tick resolution, if set to zero, a default resolution (10MHz) will be applied */ +#endif + size_t mem_block_symbols; /*!< How many RMT symbols can one RMT channel hold at one time. Set to 0 will fallback to use the default size. */ + struct { + uint32_t with_dma: 1; /*!< Use DMA to transmit data */ + } flags; /*!< Extra driver flags */ +} led_strip_rmt_config_t; + +/** + * @brief Create LED strip based on RMT TX channel + * + * @param led_config LED strip configuration + * @param rmt_config RMT specific configuration + * @param ret_strip Returned LED strip handle + * @return + * - ESP_OK: create LED strip handle successfully + * - ESP_ERR_INVALID_ARG: create LED strip handle failed because of invalid argument + * - ESP_ERR_NO_MEM: create LED strip handle failed because of out of memory + * - ESP_FAIL: create LED strip handle failed because some other error + */ +esp_err_t led_strip_new_rmt_device(const led_strip_config_t *led_config, const led_strip_rmt_config_t *rmt_config, led_strip_handle_t *ret_strip); + +#ifdef __cplusplus +} +#endif diff --git a/hw/bsp/espressif/components/led_strip/include/led_strip_spi.h b/hw/bsp/espressif/components/led_strip/include/led_strip_spi.h new file mode 100644 index 000000000..eb3524936 --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/include/led_strip_spi.h @@ -0,0 +1,46 @@ +/* + * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#pragma once + +#include +#include "esp_err.h" +#include "driver/spi_master.h" +#include "led_strip_types.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief LED Strip SPI specific configuration + */ +typedef struct { + spi_clock_source_t clk_src; /*!< SPI clock source */ + spi_host_device_t spi_bus; /*!< SPI bus ID. Which buses are available depends on the specific chip */ + struct { + uint32_t with_dma: 1; /*!< Use DMA to transmit data */ + } flags; /*!< Extra driver flags */ +} led_strip_spi_config_t; + +/** + * @brief Create LED strip based on SPI MOSI channel + * @note Although only the MOSI line is used for generating the signal, the whole SPI bus can't be used for other purposes. + * + * @param led_config LED strip configuration + * @param spi_config SPI specific configuration + * @param ret_strip Returned LED strip handle + * @return + * - ESP_OK: create LED strip handle successfully + * - ESP_ERR_INVALID_ARG: create LED strip handle failed because of invalid argument + * - ESP_ERR_NOT_SUPPORTED: create LED strip handle failed because of unsupported configuration + * - ESP_ERR_NO_MEM: create LED strip handle failed because of out of memory + * - ESP_FAIL: create LED strip handle failed because some other error + */ +esp_err_t led_strip_new_spi_device(const led_strip_config_t *led_config, const led_strip_spi_config_t *spi_config, led_strip_handle_t *ret_strip); + +#ifdef __cplusplus +} +#endif diff --git a/hw/bsp/espressif/components/led_strip/include/led_strip_types.h b/hw/bsp/espressif/components/led_strip/include/led_strip_types.h new file mode 100644 index 000000000..691f0bc39 --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/include/led_strip_types.h @@ -0,0 +1,54 @@ +/* + * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#pragma once + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief LED strip pixel format + */ +typedef enum { + LED_PIXEL_FORMAT_GRB, /*!< Pixel format: GRB */ + LED_PIXEL_FORMAT_GRBW, /*!< Pixel format: GRBW */ + LED_PIXEL_FORMAT_INVALID /*!< Invalid pixel format */ +} led_pixel_format_t; + +/** + * @brief LED strip model + * @note Different led model may have different timing parameters, so we need to distinguish them. + */ +typedef enum { + LED_MODEL_WS2812, /*!< LED strip model: WS2812 */ + LED_MODEL_SK6812, /*!< LED strip model: SK6812 */ + LED_MODEL_INVALID /*!< Invalid LED strip model */ +} led_model_t; + +/** + * @brief LED strip handle + */ +typedef struct led_strip_t *led_strip_handle_t; + +/** + * @brief LED Strip Configuration + */ +typedef struct { + int strip_gpio_num; /*!< GPIO number that used by LED strip */ + uint32_t max_leds; /*!< Maximum LEDs in a single strip */ + led_pixel_format_t led_pixel_format; /*!< LED pixel format */ + led_model_t led_model; /*!< LED model */ + + struct { + uint32_t invert_out: 1; /*!< Invert output signal */ + } flags; /*!< Extra driver flags */ +} led_strip_config_t; + +#ifdef __cplusplus +} +#endif diff --git a/hw/bsp/espressif/components/led_strip/interface/led_strip_interface.h b/hw/bsp/espressif/components/led_strip/interface/led_strip_interface.h new file mode 100644 index 000000000..3de4c2715 --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/interface/led_strip_interface.h @@ -0,0 +1,95 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#pragma once + +#include +#include "esp_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct led_strip_t led_strip_t; /*!< Type of LED strip */ + +/** + * @brief LED strip interface definition + */ +struct led_strip_t { + /** + * @brief Set RGB for a specific pixel + * + * @param strip: LED strip + * @param index: index of pixel to set + * @param red: red part of color + * @param green: green part of color + * @param blue: blue part of color + * + * @return + * - ESP_OK: Set RGB for a specific pixel successfully + * - ESP_ERR_INVALID_ARG: Set RGB for a specific pixel failed because of invalid parameters + * - ESP_FAIL: Set RGB for a specific pixel failed because other error occurred + */ + esp_err_t (*set_pixel)(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue); + + /** + * @brief Set RGBW for a specific pixel. Similar to `set_pixel` but also set the white component + * + * @param strip: LED strip + * @param index: index of pixel to set + * @param red: red part of color + * @param green: green part of color + * @param blue: blue part of color + * @param white: separate white component + * + * @return + * - ESP_OK: Set RGBW color for a specific pixel successfully + * - ESP_ERR_INVALID_ARG: Set RGBW color for a specific pixel failed because of an invalid argument + * - ESP_FAIL: Set RGBW color for a specific pixel failed because other error occurred + */ + esp_err_t (*set_pixel_rgbw)(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue, uint32_t white); + + /** + * @brief Refresh memory colors to LEDs + * + * @param strip: LED strip + * @param timeout_ms: timeout value for refreshing task + * + * @return + * - ESP_OK: Refresh successfully + * - ESP_FAIL: Refresh failed because some other error occurred + * + * @note: + * After updating the LED colors in the memory, a following invocation of this API is needed to flush colors to strip. + */ + esp_err_t (*refresh)(led_strip_t *strip); + + /** + * @brief Clear LED strip (turn off all LEDs) + * + * @param strip: LED strip + * @param timeout_ms: timeout value for clearing task + * + * @return + * - ESP_OK: Clear LEDs successfully + * - ESP_FAIL: Clear LEDs failed because some other error occurred + */ + esp_err_t (*clear)(led_strip_t *strip); + + /** + * @brief Free LED strip resources + * + * @param strip: LED strip + * + * @return + * - ESP_OK: Free resources successfully + * - ESP_FAIL: Free resources failed because error occurred + */ + esp_err_t (*del)(led_strip_t *strip); +}; + +#ifdef __cplusplus +} +#endif diff --git a/hw/bsp/espressif/components/led_strip/src/led_strip_api.c b/hw/bsp/espressif/components/led_strip/src/led_strip_api.c new file mode 100644 index 000000000..6eb86b8f1 --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/src/led_strip_api.c @@ -0,0 +1,94 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include "esp_log.h" +#include "esp_check.h" +#include "led_strip.h" +#include "led_strip_interface.h" + +static const char *TAG = "led_strip"; + +esp_err_t led_strip_set_pixel(led_strip_handle_t strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue) +{ + ESP_RETURN_ON_FALSE(strip, ESP_ERR_INVALID_ARG, TAG, "invalid argument"); + return strip->set_pixel(strip, index, red, green, blue); +} + +esp_err_t led_strip_set_pixel_hsv(led_strip_handle_t strip, uint32_t index, uint16_t hue, uint8_t saturation, uint8_t value) +{ + ESP_RETURN_ON_FALSE(strip, ESP_ERR_INVALID_ARG, TAG, "invalid argument"); + + uint32_t red = 0; + uint32_t green = 0; + uint32_t blue = 0; + + uint32_t rgb_max = value; + uint32_t rgb_min = rgb_max * (255 - saturation) / 255.0f; + + uint32_t i = hue / 60; + uint32_t diff = hue % 60; + + // RGB adjustment amount by hue + uint32_t rgb_adj = (rgb_max - rgb_min) * diff / 60; + + switch (i) { + case 0: + red = rgb_max; + green = rgb_min + rgb_adj; + blue = rgb_min; + break; + case 1: + red = rgb_max - rgb_adj; + green = rgb_max; + blue = rgb_min; + break; + case 2: + red = rgb_min; + green = rgb_max; + blue = rgb_min + rgb_adj; + break; + case 3: + red = rgb_min; + green = rgb_max - rgb_adj; + blue = rgb_max; + break; + case 4: + red = rgb_min + rgb_adj; + green = rgb_min; + blue = rgb_max; + break; + default: + red = rgb_max; + green = rgb_min; + blue = rgb_max - rgb_adj; + break; + } + + return strip->set_pixel(strip, index, red, green, blue); +} + +esp_err_t led_strip_set_pixel_rgbw(led_strip_handle_t strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue, uint32_t white) +{ + ESP_RETURN_ON_FALSE(strip, ESP_ERR_INVALID_ARG, TAG, "invalid argument"); + return strip->set_pixel_rgbw(strip, index, red, green, blue, white); +} + +esp_err_t led_strip_refresh(led_strip_handle_t strip) +{ + ESP_RETURN_ON_FALSE(strip, ESP_ERR_INVALID_ARG, TAG, "invalid argument"); + return strip->refresh(strip); +} + +esp_err_t led_strip_clear(led_strip_handle_t strip) +{ + ESP_RETURN_ON_FALSE(strip, ESP_ERR_INVALID_ARG, TAG, "invalid argument"); + return strip->clear(strip); +} + +esp_err_t led_strip_del(led_strip_handle_t strip) +{ + ESP_RETURN_ON_FALSE(strip, ESP_ERR_INVALID_ARG, TAG, "invalid argument"); + return strip->del(strip); +} diff --git a/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_dev.c b/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_dev.c new file mode 100644 index 000000000..1cbf0e45a --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_dev.c @@ -0,0 +1,164 @@ +/* + * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include +#include +#include +#include "esp_log.h" +#include "esp_check.h" +#include "driver/rmt_tx.h" +#include "led_strip.h" +#include "led_strip_interface.h" +#include "led_strip_rmt_encoder.h" + +#define LED_STRIP_RMT_DEFAULT_RESOLUTION 10000000 // 10MHz resolution +#define LED_STRIP_RMT_DEFAULT_TRANS_QUEUE_SIZE 4 +// the memory size of each RMT channel, in words (4 bytes) +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 +#define LED_STRIP_RMT_DEFAULT_MEM_BLOCK_SYMBOLS 64 +#else +#define LED_STRIP_RMT_DEFAULT_MEM_BLOCK_SYMBOLS 48 +#endif + +static const char *TAG = "led_strip_rmt"; + +typedef struct { + led_strip_t base; + rmt_channel_handle_t rmt_chan; + rmt_encoder_handle_t strip_encoder; + uint32_t strip_len; + uint8_t bytes_per_pixel; + uint8_t pixel_buf[]; +} led_strip_rmt_obj; + +static esp_err_t led_strip_rmt_set_pixel(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue) +{ + led_strip_rmt_obj *rmt_strip = __containerof(strip, led_strip_rmt_obj, base); + ESP_RETURN_ON_FALSE(index < rmt_strip->strip_len, ESP_ERR_INVALID_ARG, TAG, "index out of maximum number of LEDs"); + uint32_t start = index * rmt_strip->bytes_per_pixel; + // In thr order of GRB, as LED strip like WS2812 sends out pixels in this order + rmt_strip->pixel_buf[start + 0] = green & 0xFF; + rmt_strip->pixel_buf[start + 1] = red & 0xFF; + rmt_strip->pixel_buf[start + 2] = blue & 0xFF; + if (rmt_strip->bytes_per_pixel > 3) { + rmt_strip->pixel_buf[start + 3] = 0; + } + return ESP_OK; +} + +static esp_err_t led_strip_rmt_set_pixel_rgbw(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue, uint32_t white) +{ + led_strip_rmt_obj *rmt_strip = __containerof(strip, led_strip_rmt_obj, base); + ESP_RETURN_ON_FALSE(index < rmt_strip->strip_len, ESP_ERR_INVALID_ARG, TAG, "index out of maximum number of LEDs"); + ESP_RETURN_ON_FALSE(rmt_strip->bytes_per_pixel == 4, ESP_ERR_INVALID_ARG, TAG, "wrong LED pixel format, expected 4 bytes per pixel"); + uint8_t *buf_start = rmt_strip->pixel_buf + index * 4; + // SK6812 component order is GRBW + *buf_start = green & 0xFF; + *++buf_start = red & 0xFF; + *++buf_start = blue & 0xFF; + *++buf_start = white & 0xFF; + return ESP_OK; +} + +static esp_err_t led_strip_rmt_refresh(led_strip_t *strip) +{ + led_strip_rmt_obj *rmt_strip = __containerof(strip, led_strip_rmt_obj, base); + rmt_transmit_config_t tx_conf = { + .loop_count = 0, + }; + + ESP_RETURN_ON_ERROR(rmt_enable(rmt_strip->rmt_chan), TAG, "enable RMT channel failed"); + ESP_RETURN_ON_ERROR(rmt_transmit(rmt_strip->rmt_chan, rmt_strip->strip_encoder, rmt_strip->pixel_buf, + rmt_strip->strip_len * rmt_strip->bytes_per_pixel, &tx_conf), TAG, "transmit pixels by RMT failed"); + ESP_RETURN_ON_ERROR(rmt_tx_wait_all_done(rmt_strip->rmt_chan, -1), TAG, "flush RMT channel failed"); + ESP_RETURN_ON_ERROR(rmt_disable(rmt_strip->rmt_chan), TAG, "disable RMT channel failed"); + return ESP_OK; +} + +static esp_err_t led_strip_rmt_clear(led_strip_t *strip) +{ + led_strip_rmt_obj *rmt_strip = __containerof(strip, led_strip_rmt_obj, base); + // Write zero to turn off all leds + memset(rmt_strip->pixel_buf, 0, rmt_strip->strip_len * rmt_strip->bytes_per_pixel); + return led_strip_rmt_refresh(strip); +} + +static esp_err_t led_strip_rmt_del(led_strip_t *strip) +{ + led_strip_rmt_obj *rmt_strip = __containerof(strip, led_strip_rmt_obj, base); + ESP_RETURN_ON_ERROR(rmt_del_channel(rmt_strip->rmt_chan), TAG, "delete RMT channel failed"); + ESP_RETURN_ON_ERROR(rmt_del_encoder(rmt_strip->strip_encoder), TAG, "delete strip encoder failed"); + free(rmt_strip); + return ESP_OK; +} + +esp_err_t led_strip_new_rmt_device(const led_strip_config_t *led_config, const led_strip_rmt_config_t *rmt_config, led_strip_handle_t *ret_strip) +{ + led_strip_rmt_obj *rmt_strip = NULL; + esp_err_t ret = ESP_OK; + ESP_GOTO_ON_FALSE(led_config && rmt_config && ret_strip, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument"); + ESP_GOTO_ON_FALSE(led_config->led_pixel_format < LED_PIXEL_FORMAT_INVALID, ESP_ERR_INVALID_ARG, err, TAG, "invalid led_pixel_format"); + uint8_t bytes_per_pixel = 3; + if (led_config->led_pixel_format == LED_PIXEL_FORMAT_GRBW) { + bytes_per_pixel = 4; + } else if (led_config->led_pixel_format == LED_PIXEL_FORMAT_GRB) { + bytes_per_pixel = 3; + } else { + assert(false); + } + rmt_strip = calloc(1, sizeof(led_strip_rmt_obj) + led_config->max_leds * bytes_per_pixel); + ESP_GOTO_ON_FALSE(rmt_strip, ESP_ERR_NO_MEM, err, TAG, "no mem for rmt strip"); + uint32_t resolution = rmt_config->resolution_hz ? rmt_config->resolution_hz : LED_STRIP_RMT_DEFAULT_RESOLUTION; + + // for backward compatibility, if the user does not set the clk_src, use the default value + rmt_clock_source_t clk_src = RMT_CLK_SRC_DEFAULT; + if (rmt_config->clk_src) { + clk_src = rmt_config->clk_src; + } + size_t mem_block_symbols = LED_STRIP_RMT_DEFAULT_MEM_BLOCK_SYMBOLS; + // override the default value if the user sets it + if (rmt_config->mem_block_symbols) { + mem_block_symbols = rmt_config->mem_block_symbols; + } + rmt_tx_channel_config_t rmt_chan_config = { + .clk_src = clk_src, + .gpio_num = led_config->strip_gpio_num, + .mem_block_symbols = mem_block_symbols, + .resolution_hz = resolution, + .trans_queue_depth = LED_STRIP_RMT_DEFAULT_TRANS_QUEUE_SIZE, + .flags.with_dma = rmt_config->flags.with_dma, + .flags.invert_out = led_config->flags.invert_out, + }; + ESP_GOTO_ON_ERROR(rmt_new_tx_channel(&rmt_chan_config, &rmt_strip->rmt_chan), err, TAG, "create RMT TX channel failed"); + + led_strip_encoder_config_t strip_encoder_conf = { + .resolution = resolution, + .led_model = led_config->led_model + }; + ESP_GOTO_ON_ERROR(rmt_new_led_strip_encoder(&strip_encoder_conf, &rmt_strip->strip_encoder), err, TAG, "create LED strip encoder failed"); + + + rmt_strip->bytes_per_pixel = bytes_per_pixel; + rmt_strip->strip_len = led_config->max_leds; + rmt_strip->base.set_pixel = led_strip_rmt_set_pixel; + rmt_strip->base.set_pixel_rgbw = led_strip_rmt_set_pixel_rgbw; + rmt_strip->base.refresh = led_strip_rmt_refresh; + rmt_strip->base.clear = led_strip_rmt_clear; + rmt_strip->base.del = led_strip_rmt_del; + + *ret_strip = &rmt_strip->base; + return ESP_OK; +err: + if (rmt_strip) { + if (rmt_strip->rmt_chan) { + rmt_del_channel(rmt_strip->rmt_chan); + } + if (rmt_strip->strip_encoder) { + rmt_del_encoder(rmt_strip->strip_encoder); + } + free(rmt_strip); + } + return ret; +} diff --git a/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_dev_idf4.c b/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_dev_idf4.c new file mode 100644 index 000000000..a1067cd7c --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_dev_idf4.c @@ -0,0 +1,194 @@ +/* + * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include +#include +#include +#include "esp_log.h" +#include "esp_check.h" +#include "driver/rmt.h" +#include "led_strip.h" +#include "led_strip_interface.h" + +static const char *TAG = "led_strip_rmt"; + +#define WS2812_T0H_NS (300) +#define WS2812_T0L_NS (900) +#define WS2812_T1H_NS (900) +#define WS2812_T1L_NS (300) + +#define SK6812_T0H_NS (300) +#define SK6812_T0L_NS (900) +#define SK6812_T1H_NS (600) +#define SK6812_T1L_NS (600) + +#define LED_STRIP_RESET_MS (10) + +// the memory size of each RMT channel, in words (4 bytes) +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 +#define LED_STRIP_RMT_DEFAULT_MEM_BLOCK_SYMBOLS 64 +#else +#define LED_STRIP_RMT_DEFAULT_MEM_BLOCK_SYMBOLS 48 +#endif + +static uint32_t led_t0h_ticks = 0; +static uint32_t led_t1h_ticks = 0; +static uint32_t led_t0l_ticks = 0; +static uint32_t led_t1l_ticks = 0; + +typedef struct { + led_strip_t base; + rmt_channel_t rmt_channel; + uint32_t strip_len; + uint8_t bytes_per_pixel; + uint8_t buffer[0]; +} led_strip_rmt_obj; + +static void IRAM_ATTR ws2812_rmt_adapter(const void *src, rmt_item32_t *dest, size_t src_size, + size_t wanted_num, size_t *translated_size, size_t *item_num) +{ + if (src == NULL || dest == NULL) { + *translated_size = 0; + *item_num = 0; + return; + } + const rmt_item32_t bit0 = {{{ led_t0h_ticks, 1, led_t0l_ticks, 0 }}}; //Logical 0 + const rmt_item32_t bit1 = {{{ led_t1h_ticks, 1, led_t1l_ticks, 0 }}}; //Logical 1 + size_t size = 0; + size_t num = 0; + uint8_t *psrc = (uint8_t *)src; + rmt_item32_t *pdest = dest; + while (size < src_size && num < wanted_num) { + for (int i = 0; i < 8; i++) { + // MSB first + if (*psrc & (1 << (7 - i))) { + pdest->val = bit1.val; + } else { + pdest->val = bit0.val; + } + num++; + pdest++; + } + size++; + psrc++; + } + *translated_size = size; + *item_num = num; +} + +static esp_err_t led_strip_rmt_set_pixel(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue) +{ + led_strip_rmt_obj *rmt_strip = __containerof(strip, led_strip_rmt_obj, base); + ESP_RETURN_ON_FALSE(index < rmt_strip->strip_len, ESP_ERR_INVALID_ARG, TAG, "index out of the maximum number of leds"); + uint32_t start = index * rmt_strip->bytes_per_pixel; + // In thr order of GRB + rmt_strip->buffer[start + 0] = green & 0xFF; + rmt_strip->buffer[start + 1] = red & 0xFF; + rmt_strip->buffer[start + 2] = blue & 0xFF; + if (rmt_strip->bytes_per_pixel > 3) { + rmt_strip->buffer[start + 3] = 0; + } + return ESP_OK; +} + +static esp_err_t led_strip_rmt_refresh(led_strip_t *strip) +{ + led_strip_rmt_obj *rmt_strip = __containerof(strip, led_strip_rmt_obj, base); + ESP_RETURN_ON_ERROR(rmt_write_sample(rmt_strip->rmt_channel, rmt_strip->buffer, rmt_strip->strip_len * rmt_strip->bytes_per_pixel, true), TAG, + "transmit RMT samples failed"); + vTaskDelay(pdMS_TO_TICKS(LED_STRIP_RESET_MS)); + return ESP_OK; +} + +static esp_err_t led_strip_rmt_clear(led_strip_t *strip) +{ + led_strip_rmt_obj *rmt_strip = __containerof(strip, led_strip_rmt_obj, base); + // Write zero to turn off all LEDs + memset(rmt_strip->buffer, 0, rmt_strip->strip_len * rmt_strip->bytes_per_pixel); + return led_strip_rmt_refresh(strip); +} + +static esp_err_t led_strip_rmt_del(led_strip_t *strip) +{ + led_strip_rmt_obj *rmt_strip = __containerof(strip, led_strip_rmt_obj, base); + ESP_RETURN_ON_ERROR(rmt_driver_uninstall(rmt_strip->rmt_channel), TAG, "uninstall RMT driver failed"); + free(rmt_strip); + return ESP_OK; +} + +esp_err_t led_strip_new_rmt_device(const led_strip_config_t *led_config, const led_strip_rmt_config_t *dev_config, led_strip_handle_t *ret_strip) +{ + led_strip_rmt_obj *rmt_strip = NULL; + esp_err_t ret = ESP_OK; + ESP_RETURN_ON_FALSE(led_config && dev_config && ret_strip, ESP_ERR_INVALID_ARG, TAG, "invalid argument"); + ESP_RETURN_ON_FALSE(led_config->led_pixel_format < LED_PIXEL_FORMAT_INVALID, ESP_ERR_INVALID_ARG, TAG, "invalid led_pixel_format"); + ESP_RETURN_ON_FALSE(dev_config->flags.with_dma == 0, ESP_ERR_NOT_SUPPORTED, TAG, "DMA is not supported"); + + uint8_t bytes_per_pixel = 3; + if (led_config->led_pixel_format == LED_PIXEL_FORMAT_GRBW) { + bytes_per_pixel = 4; + } else if (led_config->led_pixel_format == LED_PIXEL_FORMAT_GRB) { + bytes_per_pixel = 3; + } else { + assert(false); + } + + // allocate memory for led_strip object + rmt_strip = calloc(1, sizeof(led_strip_rmt_obj) + led_config->max_leds * bytes_per_pixel); + ESP_RETURN_ON_FALSE(rmt_strip, ESP_ERR_NO_MEM, TAG, "request memory for les_strip failed"); + + // install RMT channel driver + rmt_config_t config = RMT_DEFAULT_CONFIG_TX(led_config->strip_gpio_num, dev_config->rmt_channel); + // set the minimal clock division because the LED strip needs a high clock resolution + config.clk_div = 2; + + uint8_t mem_block_num = 2; + // override the default value if the user specify the mem block size + if (dev_config->mem_block_symbols) { + mem_block_num = (dev_config->mem_block_symbols + LED_STRIP_RMT_DEFAULT_MEM_BLOCK_SYMBOLS / 2) / LED_STRIP_RMT_DEFAULT_MEM_BLOCK_SYMBOLS; + } + config.mem_block_num = mem_block_num; + + ESP_GOTO_ON_ERROR(rmt_config(&config), err, TAG, "RMT config failed"); + ESP_GOTO_ON_ERROR(rmt_driver_install(config.channel, 0, 0), err, TAG, "RMT install failed"); + + uint32_t counter_clk_hz = 0; + rmt_get_counter_clock((rmt_channel_t)dev_config->rmt_channel, &counter_clk_hz); + // ns -> ticks + float ratio = (float)counter_clk_hz / 1e9; + if (led_config->led_model == LED_MODEL_WS2812) { + led_t0h_ticks = (uint32_t)(ratio * WS2812_T0H_NS); + led_t0l_ticks = (uint32_t)(ratio * WS2812_T0L_NS); + led_t1h_ticks = (uint32_t)(ratio * WS2812_T1H_NS); + led_t1l_ticks = (uint32_t)(ratio * WS2812_T1L_NS); + } else if (led_config->led_model == LED_MODEL_SK6812) { + led_t0h_ticks = (uint32_t)(ratio * SK6812_T0H_NS); + led_t0l_ticks = (uint32_t)(ratio * SK6812_T0L_NS); + led_t1h_ticks = (uint32_t)(ratio * SK6812_T1H_NS); + led_t1l_ticks = (uint32_t)(ratio * SK6812_T1L_NS); + } else { + assert(false); + } + + // adapter to translates the LES strip date frame into RMT symbols + rmt_translator_init((rmt_channel_t)dev_config->rmt_channel, ws2812_rmt_adapter); + + rmt_strip->bytes_per_pixel = bytes_per_pixel; + rmt_strip->rmt_channel = (rmt_channel_t)dev_config->rmt_channel; + rmt_strip->strip_len = led_config->max_leds; + rmt_strip->base.set_pixel = led_strip_rmt_set_pixel; + rmt_strip->base.refresh = led_strip_rmt_refresh; + rmt_strip->base.clear = led_strip_rmt_clear; + rmt_strip->base.del = led_strip_rmt_del; + + *ret_strip = &rmt_strip->base; + return ESP_OK; + +err: + if (rmt_strip) { + free(rmt_strip); + } + return ret; +} diff --git a/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_encoder.c b/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_encoder.c new file mode 100644 index 000000000..d352ac07f --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_encoder.c @@ -0,0 +1,146 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "esp_check.h" +#include "led_strip_rmt_encoder.h" + +static const char *TAG = "led_rmt_encoder"; + +typedef struct { + rmt_encoder_t base; + rmt_encoder_t *bytes_encoder; + rmt_encoder_t *copy_encoder; + int state; + rmt_symbol_word_t reset_code; +} rmt_led_strip_encoder_t; + +static size_t rmt_encode_led_strip(rmt_encoder_t *encoder, rmt_channel_handle_t channel, const void *primary_data, size_t data_size, rmt_encode_state_t *ret_state) +{ + rmt_led_strip_encoder_t *led_encoder = __containerof(encoder, rmt_led_strip_encoder_t, base); + rmt_encoder_handle_t bytes_encoder = led_encoder->bytes_encoder; + rmt_encoder_handle_t copy_encoder = led_encoder->copy_encoder; + rmt_encode_state_t session_state = 0; + rmt_encode_state_t state = 0; + size_t encoded_symbols = 0; + switch (led_encoder->state) { + case 0: // send RGB data + encoded_symbols += bytes_encoder->encode(bytes_encoder, channel, primary_data, data_size, &session_state); + if (session_state & RMT_ENCODING_COMPLETE) { + led_encoder->state = 1; // switch to next state when current encoding session finished + } + if (session_state & RMT_ENCODING_MEM_FULL) { + state |= RMT_ENCODING_MEM_FULL; + goto out; // yield if there's no free space for encoding artifacts + } + // fall-through + case 1: // send reset code + encoded_symbols += copy_encoder->encode(copy_encoder, channel, &led_encoder->reset_code, + sizeof(led_encoder->reset_code), &session_state); + if (session_state & RMT_ENCODING_COMPLETE) { + led_encoder->state = 0; // back to the initial encoding session + state |= RMT_ENCODING_COMPLETE; + } + if (session_state & RMT_ENCODING_MEM_FULL) { + state |= RMT_ENCODING_MEM_FULL; + goto out; // yield if there's no free space for encoding artifacts + } + } +out: + *ret_state = state; + return encoded_symbols; +} + +static esp_err_t rmt_del_led_strip_encoder(rmt_encoder_t *encoder) +{ + rmt_led_strip_encoder_t *led_encoder = __containerof(encoder, rmt_led_strip_encoder_t, base); + rmt_del_encoder(led_encoder->bytes_encoder); + rmt_del_encoder(led_encoder->copy_encoder); + free(led_encoder); + return ESP_OK; +} + +static esp_err_t rmt_led_strip_encoder_reset(rmt_encoder_t *encoder) +{ + rmt_led_strip_encoder_t *led_encoder = __containerof(encoder, rmt_led_strip_encoder_t, base); + rmt_encoder_reset(led_encoder->bytes_encoder); + rmt_encoder_reset(led_encoder->copy_encoder); + led_encoder->state = 0; + return ESP_OK; +} + +esp_err_t rmt_new_led_strip_encoder(const led_strip_encoder_config_t *config, rmt_encoder_handle_t *ret_encoder) +{ + esp_err_t ret = ESP_OK; + rmt_led_strip_encoder_t *led_encoder = NULL; + ESP_GOTO_ON_FALSE(config && ret_encoder, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument"); + ESP_GOTO_ON_FALSE(config->led_model < LED_MODEL_INVALID, ESP_ERR_INVALID_ARG, err, TAG, "invalid led model"); + led_encoder = calloc(1, sizeof(rmt_led_strip_encoder_t)); + ESP_GOTO_ON_FALSE(led_encoder, ESP_ERR_NO_MEM, err, TAG, "no mem for led strip encoder"); + led_encoder->base.encode = rmt_encode_led_strip; + led_encoder->base.del = rmt_del_led_strip_encoder; + led_encoder->base.reset = rmt_led_strip_encoder_reset; + rmt_bytes_encoder_config_t bytes_encoder_config; + if (config->led_model == LED_MODEL_SK6812) { + bytes_encoder_config = (rmt_bytes_encoder_config_t) { + .bit0 = { + .level0 = 1, + .duration0 = 0.3 * config->resolution / 1000000, // T0H=0.3us + .level1 = 0, + .duration1 = 0.9 * config->resolution / 1000000, // T0L=0.9us + }, + .bit1 = { + .level0 = 1, + .duration0 = 0.6 * config->resolution / 1000000, // T1H=0.6us + .level1 = 0, + .duration1 = 0.6 * config->resolution / 1000000, // T1L=0.6us + }, + .flags.msb_first = 1 // SK6812 transfer bit order: G7...G0R7...R0B7...B0(W7...W0) + }; + } else if (config->led_model == LED_MODEL_WS2812) { + // different led strip might have its own timing requirements, following parameter is for WS2812 + bytes_encoder_config = (rmt_bytes_encoder_config_t) { + .bit0 = { + .level0 = 1, + .duration0 = 0.3 * config->resolution / 1000000, // T0H=0.3us + .level1 = 0, + .duration1 = 0.9 * config->resolution / 1000000, // T0L=0.9us + }, + .bit1 = { + .level0 = 1, + .duration0 = 0.9 * config->resolution / 1000000, // T1H=0.9us + .level1 = 0, + .duration1 = 0.3 * config->resolution / 1000000, // T1L=0.3us + }, + .flags.msb_first = 1 // WS2812 transfer bit order: G7...G0R7...R0B7...B0 + }; + } else { + assert(false); + } + ESP_GOTO_ON_ERROR(rmt_new_bytes_encoder(&bytes_encoder_config, &led_encoder->bytes_encoder), err, TAG, "create bytes encoder failed"); + rmt_copy_encoder_config_t copy_encoder_config = {}; + ESP_GOTO_ON_ERROR(rmt_new_copy_encoder(©_encoder_config, &led_encoder->copy_encoder), err, TAG, "create copy encoder failed"); + + uint32_t reset_ticks = config->resolution / 1000000 * 50 / 2; // reset code duration defaults to 50us + led_encoder->reset_code = (rmt_symbol_word_t) { + .level0 = 0, + .duration0 = reset_ticks, + .level1 = 0, + .duration1 = reset_ticks, + }; + *ret_encoder = &led_encoder->base; + return ESP_OK; +err: + if (led_encoder) { + if (led_encoder->bytes_encoder) { + rmt_del_encoder(led_encoder->bytes_encoder); + } + if (led_encoder->copy_encoder) { + rmt_del_encoder(led_encoder->copy_encoder); + } + free(led_encoder); + } + return ret; +} diff --git a/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_encoder.h b/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_encoder.h new file mode 100644 index 000000000..ba71e60ab --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_encoder.h @@ -0,0 +1,38 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#pragma once + +#include +#include "driver/rmt_encoder.h" +#include "led_strip_types.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Type of led strip encoder configuration + */ +typedef struct { + uint32_t resolution; /*!< Encoder resolution, in Hz */ + led_model_t led_model; /*!< LED model */ +} led_strip_encoder_config_t; + +/** + * @brief Create RMT encoder for encoding LED strip pixels into RMT symbols + * + * @param[in] config Encoder configuration + * @param[out] ret_encoder Returned encoder handle + * @return + * - ESP_ERR_INVALID_ARG for any invalid arguments + * - ESP_ERR_NO_MEM out of memory when creating led strip encoder + * - ESP_OK if creating encoder successfully + */ +esp_err_t rmt_new_led_strip_encoder(const led_strip_encoder_config_t *config, rmt_encoder_handle_t *ret_encoder); + +#ifdef __cplusplus +} +#endif diff --git a/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_ws2812.c b/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_ws2812.c deleted file mode 100644 index fd1746cad..000000000 --- a/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_ws2812.c +++ /dev/null @@ -1,171 +0,0 @@ -// Copyright 2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. -#include -#include -#include -#include "esp_log.h" -#include "esp_attr.h" -#include "led_strip.h" -#include "driver/rmt.h" - -static const char *TAG = "ws2812"; -#define STRIP_CHECK(a, str, goto_tag, ret_value, ...) \ - do \ - { \ - if (!(a)) \ - { \ - ESP_LOGE(TAG, "%s(%d): " str, __FUNCTION__, __LINE__, ##__VA_ARGS__); \ - ret = ret_value; \ - goto goto_tag; \ - } \ - } while (0) - -#define WS2812_T0H_NS (350) -#define WS2812_T0L_NS (1000) -#define WS2812_T1H_NS (1000) -#define WS2812_T1L_NS (350) -#define WS2812_RESET_US (280) - -static uint32_t ws2812_t0h_ticks = 0; -static uint32_t ws2812_t1h_ticks = 0; -static uint32_t ws2812_t0l_ticks = 0; -static uint32_t ws2812_t1l_ticks = 0; - -typedef struct { - led_strip_t parent; - rmt_channel_t rmt_channel; - uint32_t strip_len; - uint8_t buffer[0]; -} ws2812_t; - -/** - * @brief Convert RGB data to RMT format. - * - * @note For WS2812, R,G,B each contains 256 different choices (i.e. uint8_t) - * - * @param[in] src: source data, to converted to RMT format - * @param[in] dest: place where to store the convert result - * @param[in] src_size: size of source data - * @param[in] wanted_num: number of RMT items that want to get - * @param[out] translated_size: number of source data that got converted - * @param[out] item_num: number of RMT items which are converted from source data - */ -static void IRAM_ATTR ws2812_rmt_adapter(const void *src, rmt_item32_t *dest, size_t src_size, - size_t wanted_num, size_t *translated_size, size_t *item_num) -{ - if (src == NULL || dest == NULL) { - *translated_size = 0; - *item_num = 0; - return; - } - const rmt_item32_t bit0 = {{{ ws2812_t0h_ticks, 1, ws2812_t0l_ticks, 0 }}}; //Logical 0 - const rmt_item32_t bit1 = {{{ ws2812_t1h_ticks, 1, ws2812_t1l_ticks, 0 }}}; //Logical 1 - size_t size = 0; - size_t num = 0; - uint8_t *psrc = (uint8_t *)src; - rmt_item32_t *pdest = dest; - while (size < src_size && num < wanted_num) { - for (int i = 0; i < 8; i++) { - // MSB first - if (*psrc & (1 << (7 - i))) { - pdest->val = bit1.val; - } else { - pdest->val = bit0.val; - } - num++; - pdest++; - } - size++; - psrc++; - } - *translated_size = size; - *item_num = num; -} - -static esp_err_t ws2812_set_pixel(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue) -{ - esp_err_t ret = ESP_OK; - ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent); - STRIP_CHECK(index < ws2812->strip_len, "index out of the maximum number of leds", err, ESP_ERR_INVALID_ARG); - uint32_t start = index * 3; - // In thr order of GRB - ws2812->buffer[start + 0] = green & 0xFF; - ws2812->buffer[start + 1] = red & 0xFF; - ws2812->buffer[start + 2] = blue & 0xFF; - return ESP_OK; -err: - return ret; -} - -static esp_err_t ws2812_refresh(led_strip_t *strip, uint32_t timeout_ms) -{ - esp_err_t ret = ESP_OK; - ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent); - STRIP_CHECK(rmt_write_sample(ws2812->rmt_channel, ws2812->buffer, ws2812->strip_len * 3, true) == ESP_OK, - "transmit RMT samples failed", err, ESP_FAIL); - return rmt_wait_tx_done(ws2812->rmt_channel, pdMS_TO_TICKS(timeout_ms)); -err: - return ret; -} - -static esp_err_t ws2812_clear(led_strip_t *strip, uint32_t timeout_ms) -{ - ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent); - // Write zero to turn off all leds - memset(ws2812->buffer, 0, ws2812->strip_len * 3); - return ws2812_refresh(strip, timeout_ms); -} - -static esp_err_t ws2812_del(led_strip_t *strip) -{ - ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent); - free(ws2812); - return ESP_OK; -} - -led_strip_t *led_strip_new_rmt_ws2812(const led_strip_config_t *config) -{ - led_strip_t *ret = NULL; - STRIP_CHECK(config, "configuration can't be null", err, NULL); - - // 24 bits per led - uint32_t ws2812_size = sizeof(ws2812_t) + config->max_leds * 3; - ws2812_t *ws2812 = calloc(1, ws2812_size); - STRIP_CHECK(ws2812, "request memory for ws2812 failed", err, NULL); - - uint32_t counter_clk_hz = 0; - STRIP_CHECK(rmt_get_counter_clock((rmt_channel_t)config->dev, &counter_clk_hz) == ESP_OK, - "get rmt counter clock failed", err, NULL); - // ns -> ticks - float ratio = (float)counter_clk_hz / 1e9; - ws2812_t0h_ticks = (uint32_t)(ratio * WS2812_T0H_NS); - ws2812_t0l_ticks = (uint32_t)(ratio * WS2812_T0L_NS); - ws2812_t1h_ticks = (uint32_t)(ratio * WS2812_T1H_NS); - ws2812_t1l_ticks = (uint32_t)(ratio * WS2812_T1L_NS); - - // set ws2812 to rmt adapter - rmt_translator_init((rmt_channel_t)config->dev, ws2812_rmt_adapter); - - ws2812->rmt_channel = (rmt_channel_t)config->dev; - ws2812->strip_len = config->max_leds; - - ws2812->parent.set_pixel = ws2812_set_pixel; - ws2812->parent.refresh = ws2812_refresh; - ws2812->parent.clear = ws2812_clear; - ws2812->parent.del = ws2812_del; - - return &ws2812->parent; -err: - return ret; -} diff --git a/hw/bsp/espressif/components/led_strip/src/led_strip_spi_dev.c b/hw/bsp/espressif/components/led_strip/src/led_strip_spi_dev.c new file mode 100644 index 000000000..12ea8fbf3 --- /dev/null +++ b/hw/bsp/espressif/components/led_strip/src/led_strip_spi_dev.c @@ -0,0 +1,209 @@ +/* + * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include +#include +#include +#include "esp_log.h" +#include "esp_check.h" +#include "esp_rom_gpio.h" +#include "soc/spi_periph.h" +#include "led_strip.h" +#include "led_strip_interface.h" +#include "hal/spi_hal.h" + +#define LED_STRIP_SPI_DEFAULT_RESOLUTION (2.5 * 1000 * 1000) // 2.5MHz resolution +#define LED_STRIP_SPI_DEFAULT_TRANS_QUEUE_SIZE 4 + +#define SPI_BYTES_PER_COLOR_BYTE 3 +#define SPI_BITS_PER_COLOR_BYTE (SPI_BYTES_PER_COLOR_BYTE * 8) + +static const char *TAG = "led_strip_spi"; + +typedef struct { + led_strip_t base; + spi_host_device_t spi_host; + spi_device_handle_t spi_device; + uint32_t strip_len; + uint8_t bytes_per_pixel; + uint8_t pixel_buf[]; +} led_strip_spi_obj; + +// please make sure to zero-initialize the buf before calling this function +static void __led_strip_spi_bit(uint8_t data, uint8_t *buf) +{ + // Each color of 1 bit is represented by 3 bits of SPI, low_level:100 ,high_level:110 + // So a color byte occupies 3 bytes of SPI. + *(buf + 2) |= data & BIT(0) ? BIT(2) | BIT(1) : BIT(2); + *(buf + 2) |= data & BIT(1) ? BIT(5) | BIT(4) : BIT(5); + *(buf + 2) |= data & BIT(2) ? BIT(7) : 0x00; + *(buf + 1) |= BIT(0); + *(buf + 1) |= data & BIT(3) ? BIT(3) | BIT(2) : BIT(3); + *(buf + 1) |= data & BIT(4) ? BIT(6) | BIT(5) : BIT(6); + *(buf + 0) |= data & BIT(5) ? BIT(1) | BIT(0) : BIT(1); + *(buf + 0) |= data & BIT(6) ? BIT(4) | BIT(3) : BIT(4); + *(buf + 0) |= data & BIT(7) ? BIT(7) | BIT(6) : BIT(7); +} + +static esp_err_t led_strip_spi_set_pixel(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue) +{ + led_strip_spi_obj *spi_strip = __containerof(strip, led_strip_spi_obj, base); + ESP_RETURN_ON_FALSE(index < spi_strip->strip_len, ESP_ERR_INVALID_ARG, TAG, "index out of maximum number of LEDs"); + // LED_PIXEL_FORMAT_GRB takes 72bits(9bytes) + uint32_t start = index * spi_strip->bytes_per_pixel * SPI_BYTES_PER_COLOR_BYTE; + memset(spi_strip->pixel_buf + start, 0, spi_strip->bytes_per_pixel * SPI_BYTES_PER_COLOR_BYTE); + __led_strip_spi_bit(green, &spi_strip->pixel_buf[start]); + __led_strip_spi_bit(red, &spi_strip->pixel_buf[start + SPI_BYTES_PER_COLOR_BYTE]); + __led_strip_spi_bit(blue, &spi_strip->pixel_buf[start + SPI_BYTES_PER_COLOR_BYTE * 2]); + if (spi_strip->bytes_per_pixel > 3) { + __led_strip_spi_bit(0, &spi_strip->pixel_buf[start + SPI_BYTES_PER_COLOR_BYTE * 3]); + } + return ESP_OK; +} + +static esp_err_t led_strip_spi_set_pixel_rgbw(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue, uint32_t white) +{ + led_strip_spi_obj *spi_strip = __containerof(strip, led_strip_spi_obj, base); + ESP_RETURN_ON_FALSE(index < spi_strip->strip_len, ESP_ERR_INVALID_ARG, TAG, "index out of maximum number of LEDs"); + ESP_RETURN_ON_FALSE(spi_strip->bytes_per_pixel == 4, ESP_ERR_INVALID_ARG, TAG, "wrong LED pixel format, expected 4 bytes per pixel"); + // LED_PIXEL_FORMAT_GRBW takes 96bits(12bytes) + uint32_t start = index * spi_strip->bytes_per_pixel * SPI_BYTES_PER_COLOR_BYTE; + // SK6812 component order is GRBW + memset(spi_strip->pixel_buf + start, 0, spi_strip->bytes_per_pixel * SPI_BYTES_PER_COLOR_BYTE); + __led_strip_spi_bit(green, &spi_strip->pixel_buf[start]); + __led_strip_spi_bit(red, &spi_strip->pixel_buf[start + SPI_BYTES_PER_COLOR_BYTE]); + __led_strip_spi_bit(blue, &spi_strip->pixel_buf[start + SPI_BYTES_PER_COLOR_BYTE * 2]); + __led_strip_spi_bit(white, &spi_strip->pixel_buf[start + SPI_BYTES_PER_COLOR_BYTE * 3]); + + return ESP_OK; +} + +static esp_err_t led_strip_spi_refresh(led_strip_t *strip) +{ + led_strip_spi_obj *spi_strip = __containerof(strip, led_strip_spi_obj, base); + spi_transaction_t tx_conf; + memset(&tx_conf, 0, sizeof(tx_conf)); + + tx_conf.length = spi_strip->strip_len * spi_strip->bytes_per_pixel * SPI_BITS_PER_COLOR_BYTE; + tx_conf.tx_buffer = spi_strip->pixel_buf; + tx_conf.rx_buffer = NULL; + ESP_RETURN_ON_ERROR(spi_device_transmit(spi_strip->spi_device, &tx_conf), TAG, "transmit pixels by SPI failed"); + + return ESP_OK; +} + +static esp_err_t led_strip_spi_clear(led_strip_t *strip) +{ + led_strip_spi_obj *spi_strip = __containerof(strip, led_strip_spi_obj, base); + //Write zero to turn off all leds + memset(spi_strip->pixel_buf, 0, spi_strip->strip_len * spi_strip->bytes_per_pixel * SPI_BYTES_PER_COLOR_BYTE); + uint8_t *buf = spi_strip->pixel_buf; + for (int index = 0; index < spi_strip->strip_len * spi_strip->bytes_per_pixel; index++) { + __led_strip_spi_bit(0, buf); + buf += SPI_BYTES_PER_COLOR_BYTE; + } + + return led_strip_spi_refresh(strip); +} + +static esp_err_t led_strip_spi_del(led_strip_t *strip) +{ + led_strip_spi_obj *spi_strip = __containerof(strip, led_strip_spi_obj, base); + + ESP_RETURN_ON_ERROR(spi_bus_remove_device(spi_strip->spi_device), TAG, "delete spi device failed"); + ESP_RETURN_ON_ERROR(spi_bus_free(spi_strip->spi_host), TAG, "free spi bus failed"); + + free(spi_strip); + return ESP_OK; +} + +esp_err_t led_strip_new_spi_device(const led_strip_config_t *led_config, const led_strip_spi_config_t *spi_config, led_strip_handle_t *ret_strip) +{ + led_strip_spi_obj *spi_strip = NULL; + esp_err_t ret = ESP_OK; + ESP_GOTO_ON_FALSE(led_config && spi_config && ret_strip, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument"); + ESP_GOTO_ON_FALSE(led_config->led_pixel_format < LED_PIXEL_FORMAT_INVALID, ESP_ERR_INVALID_ARG, err, TAG, "invalid led_pixel_format"); + uint8_t bytes_per_pixel = 3; + if (led_config->led_pixel_format == LED_PIXEL_FORMAT_GRBW) { + bytes_per_pixel = 4; + } else if (led_config->led_pixel_format == LED_PIXEL_FORMAT_GRB) { + bytes_per_pixel = 3; + } else { + assert(false); + } + uint32_t mem_caps = MALLOC_CAP_DEFAULT; + if (spi_config->flags.with_dma) { + // DMA buffer must be placed in internal SRAM + mem_caps |= MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA; + } + spi_strip = heap_caps_calloc(1, sizeof(led_strip_spi_obj) + led_config->max_leds * bytes_per_pixel * SPI_BYTES_PER_COLOR_BYTE, mem_caps); + + ESP_GOTO_ON_FALSE(spi_strip, ESP_ERR_NO_MEM, err, TAG, "no mem for spi strip"); + + spi_strip->spi_host = spi_config->spi_bus; + // for backward compatibility, if the user does not set the clk_src, use the default value + spi_clock_source_t clk_src = SPI_CLK_SRC_DEFAULT; + if (spi_config->clk_src) { + clk_src = spi_config->clk_src; + } + + spi_bus_config_t spi_bus_cfg = { + .mosi_io_num = led_config->strip_gpio_num, + //Only use MOSI to generate the signal, set -1 when other pins are not used. + .miso_io_num = -1, + .sclk_io_num = -1, + .quadwp_io_num = -1, + .quadhd_io_num = -1, + .max_transfer_sz = led_config->max_leds * bytes_per_pixel * SPI_BYTES_PER_COLOR_BYTE, + }; + ESP_GOTO_ON_ERROR(spi_bus_initialize(spi_strip->spi_host, &spi_bus_cfg, spi_config->flags.with_dma ? SPI_DMA_CH_AUTO : SPI_DMA_DISABLED), err, TAG, "create SPI bus failed"); + + if (led_config->flags.invert_out == true) { + esp_rom_gpio_connect_out_signal(led_config->strip_gpio_num, spi_periph_signal[spi_strip->spi_host].spid_out, true, false); + } + + spi_device_interface_config_t spi_dev_cfg = { + .clock_source = clk_src, + .command_bits = 0, + .address_bits = 0, + .dummy_bits = 0, + .clock_speed_hz = LED_STRIP_SPI_DEFAULT_RESOLUTION, + .mode = 0, + //set -1 when CS is not used + .spics_io_num = -1, + .queue_size = LED_STRIP_SPI_DEFAULT_TRANS_QUEUE_SIZE, + }; + + ESP_GOTO_ON_ERROR(spi_bus_add_device(spi_strip->spi_host, &spi_dev_cfg, &spi_strip->spi_device), err, TAG, "Failed to add spi device"); + + int clock_resolution_khz = 0; + spi_device_get_actual_freq(spi_strip->spi_device, &clock_resolution_khz); + // TODO: ideally we should decide the SPI_BYTES_PER_COLOR_BYTE by the real clock resolution + // But now, let's fixed the resolution, the downside is, we don't support a clock source whose frequency is not multiple of LED_STRIP_SPI_DEFAULT_RESOLUTION + ESP_GOTO_ON_FALSE(clock_resolution_khz == LED_STRIP_SPI_DEFAULT_RESOLUTION / 1000, ESP_ERR_NOT_SUPPORTED, err, + TAG, "unsupported clock resolution:%dKHz", clock_resolution_khz); + + spi_strip->bytes_per_pixel = bytes_per_pixel; + spi_strip->strip_len = led_config->max_leds; + spi_strip->base.set_pixel = led_strip_spi_set_pixel; + spi_strip->base.set_pixel_rgbw = led_strip_spi_set_pixel_rgbw; + spi_strip->base.refresh = led_strip_spi_refresh; + spi_strip->base.clear = led_strip_spi_clear; + spi_strip->base.del = led_strip_spi_del; + + *ret_strip = &spi_strip->base; + return ESP_OK; +err: + if (spi_strip) { + if (spi_strip->spi_device) { + spi_bus_remove_device(spi_strip->spi_device); + } + if (spi_strip->spi_host) { + spi_bus_free(spi_strip->spi_host); + } + free(spi_strip); + } + return ret; +} diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index 539a776a6..ff3393cfd 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -211,7 +211,6 @@ function(family_configure_common TARGET RTOS) target_link_options(${TARGET} PUBLIC "LINKER:--map=$.map") endif() - # ETM Trace option if (TRACE_ETM STREQUAL "1") target_compile_definitions(${TARGET} PUBLIC TRACE_ETM) diff --git a/hw/bsp/mcx/boards/bunny-brain/board.cmake b/hw/bsp/mcx/boards/bunny-brain/board.cmake deleted file mode 100644 index 8c3280743..000000000 --- a/hw/bsp/mcx/boards/bunny-brain/board.cmake +++ /dev/null @@ -1,21 +0,0 @@ -set(MCU_VARIANT MCXN947) -set(MCU_CORE MCXN947_cm33_core0) - -set(JLINK_DEVICE MCXN947_M33_0) -set(PYOCD_TARGET MCXN947) -set(NXPLINK_DEVICE MCXN947:MCXN947) - -set(PORT 1) - -function(update_board TARGET) - target_compile_definitions(${TARGET} PUBLIC - CPU_MCXN947VDF_cm33_core0 - BOARD_TUD_RHPORT=${PORT} - # port 0 is fullspeed, port 1 is highspeed - BOARD_TUD_MAX_SPEED=$ - ) - target_sources(${TARGET} PUBLIC - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pin_mux.c - ) -endfunction() diff --git a/hw/bsp/mcx/boards/bunny-brain/board.h b/hw/bsp/mcx/boards/bunny-brain/board.h deleted file mode 100644 index eae98bfa7..000000000 --- a/hw/bsp/mcx/boards/bunny-brain/board.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2021, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef BOARD_H_ -#define BOARD_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -// LED -#define LED_GPIO GPIO3 -#define LED_CLK kCLOCK_Gpio3 -#define LED_PIN 4 // red -#define LED_STATE_ON 0 - -// WAKE button (Dummy, use unused pin -#define BUTTON_GPIO GPIO0 -#define BUTTON_CLK kCLOCK_Gpio0 -#define BUTTON_PIN 6 -#define BUTTON_STATE_ACTIVE 0 - -// UART -#define UART_DEV LPUART4 - -static inline void board_uart_init_clock(void) { - /* attach FRO 12M to FLEXCOMM4 */ - CLOCK_SetClkDiv(kCLOCK_DivFlexcom4Clk, 1u); - CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4); - RESET_ClearPeripheralReset(kFC4_RST_SHIFT_RSTn); -} - -//#define UART_RX_PINMUX 0, 24, IOCON_PIO_DIG_FUNC1_EN -//#define UART_TX_PINMUX 0, 25, IOCON_PIO_DIG_FUNC1_EN - -// XTAL -#define XTAL0_CLK_HZ (24 * 1000 * 1000U) - -#ifdef __cplusplus - } -#endif - -#endif diff --git a/hw/bsp/mcx/boards/bunny-brain/board.mk b/hw/bsp/mcx/boards/bunny-brain/board.mk deleted file mode 100644 index aaad5e73e..000000000 --- a/hw/bsp/mcx/boards/bunny-brain/board.mk +++ /dev/null @@ -1,11 +0,0 @@ -MCU_VARIANT = MCXN947 -MCU_CORE = MCXN947_cm33_core0 -PORT ?= 1 - -CFLAGS += -DCPU_MCXN947VDF_cm33_core0 - -JLINK_DEVICE = MCXN947_M33_0 -PYOCD_TARGET = MCXN947 - -# flash using pyocd -flash: flash-jlink diff --git a/hw/bsp/mcx/boards/bunny-brain/clock_config.c b/hw/bsp/mcx/boards/bunny-brain/clock_config.c deleted file mode 100644 index 37d2b4dfc..000000000 --- a/hw/bsp/mcx/boards/bunny-brain/clock_config.c +++ /dev/null @@ -1,338 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ -/* - * How to setup clock using clock driver functions: - * - * 1. Setup clock sources. - * - * 2. Set up wait states of the flash. - * - * 3. Set up all dividers. - * - * 4. Set up all selectors to provide selected clocks. - * - */ - -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!GlobalInfo -product: Clocks v10.0 -processor: MCXN947 -package_id: MCXN947VDF -mcu_data: ksdk2_0 -processor_version: 0.12.3 -board: MCX-N9XX-EVK - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -#include "clock_config.h" -#include "fsl_clock.h" - -/******************************************************************************* - * Definitions - ******************************************************************************/ - -/******************************************************************************* - * Variables - ******************************************************************************/ -/* System clock frequency. */ -// extern uint32_t SystemCoreClock; - -/******************************************************************************* - ************************ BOARD_InitBootClocks function ************************ - ******************************************************************************/ -void BOARD_InitBootClocks(void) -{ - BOARD_BootClockPLL150M(); -} - -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO12M ********************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFRO12M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: MAIN_clock.outFreq, value: 12 MHz} -- {id: Slow_clock.outFreq, value: 3 MHz} -- {id: System_clock.outFreq, value: 12 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: SCGMode, value: SIRC} -- {id: SCG.SCSSEL.sel, value: SCG.SIRC} -- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -void BOARD_BootClockFRO12M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK; -} - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF48M ********************* - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFROHF48M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_clock.outFreq, value: 48 MHz} -- {id: MAIN_clock.outFreq, value: 48 MHz} -- {id: Slow_clock.outFreq, value: 12 MHz} -- {id: System_clock.outFreq, value: 48 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -void BOARD_BootClockFROHF48M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK; -} - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF144M ******************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFROHF144M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_clock.outFreq, value: 144 MHz} -- {id: MAIN_clock.outFreq, value: 144 MHz} -- {id: Slow_clock.outFreq, value: 18 MHz} -- {id: System_clock.outFreq, value: 72 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: SYSCON.AHBCLKDIV.scale, value: '2', locked: true} -- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} -sources: -- {id: SCG.FIRC.outFreq, value: 144 MHz} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -void BOARD_BootClockFROHF144M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupFROHFClocking(144000000U); /*!< Enable FRO HF(144MHz) output */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 2U); /*!< Set AHBCLKDIV divider to value 2 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK; -} - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL150M ********************* - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockPLL150M -called_from_default_init: true -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_clock.outFreq, value: 48 MHz} -- {id: MAIN_clock.outFreq, value: 150 MHz} -- {id: PLL0_CLK_clock.outFreq, value: 150 MHz} -- {id: Slow_clock.outFreq, value: 37.5 MHz} -- {id: System_clock.outFreq, value: 150 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: PLL0_Mode, value: Normal} -- {id: RunPowerMode, value: OD} -- {id: SCGMode, value: PLL0} -- {id: SCG.PLL0M_MULT.scale, value: '50', locked: true} -- {id: SCG.PLL0SRCSEL.sel, value: SCG.FIRC_48M} -- {id: SCG.PLL0_NDIV.scale, value: '8', locked: true} -- {id: SCG.SCSSEL.sel, value: SCG.PLL0_CLK} -- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -void BOARD_BootClockPLL150M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ - - /*!< Set up PLL0 */ - const pll_setup_t pll0Setup = { - .pllctrl = SCG_APLLCTRL_SOURCE(1U) | SCG_APLLCTRL_SELI(27U) | SCG_APLLCTRL_SELP(13U), - .pllndiv = SCG_APLLNDIV_NDIV(8U), - .pllpdiv = SCG_APLLPDIV_PDIV(1U), - .pllmdiv = SCG_APLLMDIV_MDIV(50U), - .pllRate = 150000000U - }; - CLOCK_SetPLL0Freq(&pll0Setup); /*!< Configure PLL0 to the desired values */ - CLOCK_SetPll0MonitorMode(kSCG_Pll0MonitorDisable); /* Pll0 Monitor is disabled */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kPLL0_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL0 */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK; -} - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL100M ********************* - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockPLL100M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: CLK_IN_clock.outFreq, value: 24 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: MAIN_clock.outFreq, value: 100 MHz} -- {id: PLL1_CLK_clock.outFreq, value: 100 MHz} -- {id: Slow_clock.outFreq, value: 25 MHz} -- {id: System_clock.outFreq, value: 100 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: PLL1_Mode, value: Normal} -- {id: SCGMode, value: PLL1} -- {id: SCG.PLL1M_MULT.scale, value: '100', locked: true} -- {id: SCG.PLL1_NDIV.scale, value: '6', locked: true} -- {id: SCG.PLL1_PDIV.scale, value: '4', locked: true} -- {id: SCG.SCSSEL.sel, value: SCG.PLL1_CLK} -- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled} -- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} -sources: -- {id: SCG.SOSC.outFreq, value: 24 MHz, enabled: true} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -void BOARD_BootClockPLL100M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupExtClocking(24000000U); - CLOCK_SetSysOscMonitorMode(kSCG_SysOscMonitorDisable); /* System OSC Clock Monitor is disabled */ - - /*!< Set up PLL1 */ - const pll_setup_t pll1Setup = { - .pllctrl = SCG_SPLLCTRL_SOURCE(0U) | SCG_SPLLCTRL_SELI(53U) | SCG_SPLLCTRL_SELP(26U), - .pllndiv = SCG_SPLLNDIV_NDIV(6U), - .pllpdiv = SCG_SPLLPDIV_PDIV(2U), - .pllmdiv = SCG_SPLLMDIV_MDIV(100U), - .pllRate = 100000000U - }; - CLOCK_SetPLL1Freq(&pll1Setup); /*!< Configure PLL1 to the desired values */ - CLOCK_SetPll1MonitorMode(kSCG_Pll1MonitorDisable); /* Pll1 Monitor is disabled */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kPLL1_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL1 */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK; -} diff --git a/hw/bsp/mcx/boards/bunny-brain/clock_config.h b/hw/bsp/mcx/boards/bunny-brain/clock_config.h deleted file mode 100644 index c238a0423..000000000 --- a/hw/bsp/mcx/boards/bunny-brain/clock_config.h +++ /dev/null @@ -1,177 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -#ifndef _CLOCK_CONFIG_H_ -#define _CLOCK_CONFIG_H_ - -#include "fsl_common.h" - -/******************************************************************************* - * Definitions - ******************************************************************************/ -#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal frequency in Hz */ -#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32K frequency in Hz */ - -/******************************************************************************* - ************************ BOARD_InitBootClocks function ************************ - ******************************************************************************/ - -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes default configuration of clocks. - * - */ -void BOARD_InitBootClocks(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO12M ********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */ -#define BOARD_BOOTCLOCKFRO12M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFRO12M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF48M ********************* - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ -#define BOARD_BOOTCLOCKFROHF48M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFROHF48M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF144M ******************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK 144000000U /*!< Core clock frequency: 144000000Hz */ -#define BOARD_BOOTCLOCKFROHF144M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFROHF144M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL150M ********************* - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 150000000U /*!< Core clock frequency: 150000000Hz */ -#define BOARD_BOOTCLOCKPLL150M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockPLL150M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL100M ********************* - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK 100000000U /*!< Core clock frequency: 100000000Hz */ -#define BOARD_BOOTCLOCKPLL100M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockPLL100M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -#endif /* _CLOCK_CONFIG_H_ */ diff --git a/hw/bsp/mcx/boards/bunny-brain/pin_mux.c b/hw/bsp/mcx/boards/bunny-brain/pin_mux.c deleted file mode 100644 index acc2f3e45..000000000 --- a/hw/bsp/mcx/boards/bunny-brain/pin_mux.c +++ /dev/null @@ -1,141 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -/* clang-format off */ -/* - * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!GlobalInfo -product: Pins v12.0 -processor: MCXN947 -package_id: MCXN947VDF -mcu_data: ksdk2_0 -processor_version: 0.12.3 - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** - */ -/* clang-format on */ - -#include "fsl_common.h" -#include "fsl_port.h" -#include "pin_mux.h" - -/* FUNCTION ************************************************************************************************************ - * - * Function Name : BOARD_InitBootPins - * Description : Calls initialization functions. - * - * END ****************************************************************************************************************/ -void BOARD_InitBootPins(void) -{ - BOARD_InitPins(); -} - -/* clang-format off */ -/* - * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -BOARD_InitPins: -- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'} -- pin_list: - - {pin_num: A1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P0, pin_signal: PIO1_8/WUU0_IN10/LPTMR1_ALT3/TRACE_DATA0/FC4_P0/FC5_P4/CT_INP8/SCT0_OUT2/FLEXIO0_D16/PLU_OUT0/ENET0_TXD2/I3C1_SDA/TSI0_CH17/ADC1_A8, - slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, pull_value: low, input_buffer: enable, - invert_input: normal} - - {pin_num: B1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P1, pin_signal: PIO1_9/TRACE_DATA1/FC4_P1/FC5_P5/CT_INP9/SCT0_OUT3/FLEXIO0_D17/PLU_OUT1/ENET0_TXD3/I3C1_SCL/TSI0_CH18/ADC1_A9, - slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, input_buffer: enable, invert_input: normal} - - {pin_num: F14, peripheral: GPIO3, signal: 'GPIO, 4', pin_signal: PIO3_4/FC7_P2/CT_INP18/PWM0_X2/FLEXIO0_D12/SIM1_CLK, slew_rate: fast, open_drain: disable, drive_strength: low, - pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** - */ -/* clang-format on */ - -/* FUNCTION ************************************************************************************************************ - * - * Function Name : BOARD_InitPins - * Description : Configures pin routing and optionally pin electrical features. - * - * END ****************************************************************************************************************/ -void BOARD_InitPins(void) -{ - /* Enables the clock for PORT1: Enables clock */ - CLOCK_EnableClock(kCLOCK_Port1); - /* Enables the clock for PORT3: Enables clock */ - CLOCK_EnableClock(kCLOCK_Port3); - - const port_pin_config_t port1_8_pinA1_config = {/* Internal pull-up/down resistor is disabled */ - kPORT_PullDisable, - /* Low internal pull resistor value is selected. */ - kPORT_LowPullResistor, - /* Fast slew rate is configured */ - kPORT_FastSlewRate, - /* Passive input filter is disabled */ - kPORT_PassiveFilterDisable, - /* Open drain output is disabled */ - kPORT_OpenDrainDisable, - /* Low drive strength is configured */ - kPORT_LowDriveStrength, - /* Pin is configured as FC4_P0 */ - kPORT_MuxAlt2, - /* Digital input enabled */ - kPORT_InputBufferEnable, - /* Digital input is not inverted */ - kPORT_InputNormal, - /* Pin Control Register fields [15:0] are not locked */ - kPORT_UnlockRegister}; - /* PORT1_8 (pin A1) is configured as FC4_P0 */ - PORT_SetPinConfig(PORT1, 8U, &port1_8_pinA1_config); - - const port_pin_config_t port1_9_pinB1_config = {/* Internal pull-up/down resistor is disabled */ - kPORT_PullDisable, - /* Low internal pull resistor value is selected. */ - kPORT_LowPullResistor, - /* Fast slew rate is configured */ - kPORT_FastSlewRate, - /* Passive input filter is disabled */ - kPORT_PassiveFilterDisable, - /* Open drain output is disabled */ - kPORT_OpenDrainDisable, - /* Low drive strength is configured */ - kPORT_LowDriveStrength, - /* Pin is configured as FC4_P1 */ - kPORT_MuxAlt2, - /* Digital input enabled */ - kPORT_InputBufferEnable, - /* Digital input is not inverted */ - kPORT_InputNormal, - /* Pin Control Register fields [15:0] are not locked */ - kPORT_UnlockRegister}; - /* PORT1_9 (pin B1) is configured as FC4_P1 */ - PORT_SetPinConfig(PORT1, 9U, &port1_9_pinB1_config); - - const port_pin_config_t port3_4_pinF14_config = {/* Internal pull-up/down resistor is disabled */ - kPORT_PullDisable, - /* Low internal pull resistor value is selected. */ - kPORT_LowPullResistor, - /* Fast slew rate is configured */ - kPORT_FastSlewRate, - /* Passive input filter is disabled */ - kPORT_PassiveFilterDisable, - /* Open drain output is disabled */ - kPORT_OpenDrainDisable, - /* Low drive strength is configured */ - kPORT_LowDriveStrength, - /* Pin is configured as PIO3_4 */ - kPORT_MuxAlt0, - /* Digital input enabled */ - kPORT_InputBufferEnable, - /* Digital input is not inverted */ - kPORT_InputNormal, - /* Pin Control Register fields [15:0] are not locked */ - kPORT_UnlockRegister}; - /* PORT3_4 (pin F14) is configured as PIO3_4 */ - PORT_SetPinConfig(PORT3, 4U, &port3_4_pinF14_config); -} -/*********************************************************************************************************************** - * EOF - **********************************************************************************************************************/ diff --git a/hw/bsp/mcx/boards/bunny-brain/pin_mux.h b/hw/bsp/mcx/boards/bunny-brain/pin_mux.h deleted file mode 100644 index 40968c275..000000000 --- a/hw/bsp/mcx/boards/bunny-brain/pin_mux.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -#ifndef _PIN_MUX_H_ -#define _PIN_MUX_H_ - -/*! - * @addtogroup pin_mux - * @{ - */ - -/*********************************************************************************************************************** - * API - **********************************************************************************************************************/ - -#if defined(__cplusplus) -extern "C" { -#endif - -/*! - * @brief Calls initialization functions. - * - */ -void BOARD_InitBootPins(void); - -/*! - * @brief Configures pin routing and optionally pin electrical features. - * - */ -void BOARD_InitPins(void); - -#if defined(__cplusplus) -} -#endif - -/*! - * @} - */ -#endif /* _PIN_MUX_H_ */ - -/*********************************************************************************************************************** - * EOF - **********************************************************************************************************************/ diff --git a/hw/bsp/mcx/boards/frdm-mcxn947/board.cmake b/hw/bsp/mcx/boards/frdm-mcxn947/board.cmake deleted file mode 100644 index 8c3280743..000000000 --- a/hw/bsp/mcx/boards/frdm-mcxn947/board.cmake +++ /dev/null @@ -1,21 +0,0 @@ -set(MCU_VARIANT MCXN947) -set(MCU_CORE MCXN947_cm33_core0) - -set(JLINK_DEVICE MCXN947_M33_0) -set(PYOCD_TARGET MCXN947) -set(NXPLINK_DEVICE MCXN947:MCXN947) - -set(PORT 1) - -function(update_board TARGET) - target_compile_definitions(${TARGET} PUBLIC - CPU_MCXN947VDF_cm33_core0 - BOARD_TUD_RHPORT=${PORT} - # port 0 is fullspeed, port 1 is highspeed - BOARD_TUD_MAX_SPEED=$ - ) - target_sources(${TARGET} PUBLIC - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pin_mux.c - ) -endfunction() diff --git a/hw/bsp/mcx/boards/frdm-mcxn947/board.h b/hw/bsp/mcx/boards/frdm-mcxn947/board.h deleted file mode 100644 index acb73363f..000000000 --- a/hw/bsp/mcx/boards/frdm-mcxn947/board.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2021, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef BOARD_H_ -#define BOARD_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -// LED -#define LED_GPIO GPIO0 -#define LED_CLK kCLOCK_Gpio0 -#define LED_PIN 10 // red -#define LED_STATE_ON 0 - -// WAKE button (Dummy, use unused pin -#define BUTTON_GPIO GPIO0 -#define BUTTON_CLK kCLOCK_Gpio0 -#define BUTTON_PIN 23 -#define BUTTON_STATE_ACTIVE 0 - -// UART -#define UART_DEV LPUART4 - -static inline void board_uart_init_clock(void) { - /* attach FRO 12M to FLEXCOMM4 */ - CLOCK_SetClkDiv(kCLOCK_DivFlexcom4Clk, 1u); - CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4); - RESET_ClearPeripheralReset(kFC4_RST_SHIFT_RSTn); -} - -//#define UART_RX_PINMUX 0, 24, IOCON_PIO_DIG_FUNC1_EN -//#define UART_TX_PINMUX 0, 25, IOCON_PIO_DIG_FUNC1_EN - -// XTAL -#define XTAL0_CLK_HZ (24 * 1000 * 1000U) - -#ifdef __cplusplus - } -#endif - -#endif diff --git a/hw/bsp/mcx/boards/frdm-mcxn947/board.mk b/hw/bsp/mcx/boards/frdm-mcxn947/board.mk deleted file mode 100644 index aaad5e73e..000000000 --- a/hw/bsp/mcx/boards/frdm-mcxn947/board.mk +++ /dev/null @@ -1,11 +0,0 @@ -MCU_VARIANT = MCXN947 -MCU_CORE = MCXN947_cm33_core0 -PORT ?= 1 - -CFLAGS += -DCPU_MCXN947VDF_cm33_core0 - -JLINK_DEVICE = MCXN947_M33_0 -PYOCD_TARGET = MCXN947 - -# flash using pyocd -flash: flash-jlink diff --git a/hw/bsp/mcx/boards/frdm-mcxn947/clock_config.c b/hw/bsp/mcx/boards/frdm-mcxn947/clock_config.c deleted file mode 100644 index 37d2b4dfc..000000000 --- a/hw/bsp/mcx/boards/frdm-mcxn947/clock_config.c +++ /dev/null @@ -1,338 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ -/* - * How to setup clock using clock driver functions: - * - * 1. Setup clock sources. - * - * 2. Set up wait states of the flash. - * - * 3. Set up all dividers. - * - * 4. Set up all selectors to provide selected clocks. - * - */ - -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!GlobalInfo -product: Clocks v10.0 -processor: MCXN947 -package_id: MCXN947VDF -mcu_data: ksdk2_0 -processor_version: 0.12.3 -board: MCX-N9XX-EVK - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -#include "clock_config.h" -#include "fsl_clock.h" - -/******************************************************************************* - * Definitions - ******************************************************************************/ - -/******************************************************************************* - * Variables - ******************************************************************************/ -/* System clock frequency. */ -// extern uint32_t SystemCoreClock; - -/******************************************************************************* - ************************ BOARD_InitBootClocks function ************************ - ******************************************************************************/ -void BOARD_InitBootClocks(void) -{ - BOARD_BootClockPLL150M(); -} - -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO12M ********************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFRO12M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: MAIN_clock.outFreq, value: 12 MHz} -- {id: Slow_clock.outFreq, value: 3 MHz} -- {id: System_clock.outFreq, value: 12 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: SCGMode, value: SIRC} -- {id: SCG.SCSSEL.sel, value: SCG.SIRC} -- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -void BOARD_BootClockFRO12M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK; -} - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF48M ********************* - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFROHF48M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_clock.outFreq, value: 48 MHz} -- {id: MAIN_clock.outFreq, value: 48 MHz} -- {id: Slow_clock.outFreq, value: 12 MHz} -- {id: System_clock.outFreq, value: 48 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -void BOARD_BootClockFROHF48M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK; -} - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF144M ******************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFROHF144M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_clock.outFreq, value: 144 MHz} -- {id: MAIN_clock.outFreq, value: 144 MHz} -- {id: Slow_clock.outFreq, value: 18 MHz} -- {id: System_clock.outFreq, value: 72 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: SYSCON.AHBCLKDIV.scale, value: '2', locked: true} -- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} -sources: -- {id: SCG.FIRC.outFreq, value: 144 MHz} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -void BOARD_BootClockFROHF144M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupFROHFClocking(144000000U); /*!< Enable FRO HF(144MHz) output */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 2U); /*!< Set AHBCLKDIV divider to value 2 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK; -} - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL150M ********************* - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockPLL150M -called_from_default_init: true -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_clock.outFreq, value: 48 MHz} -- {id: MAIN_clock.outFreq, value: 150 MHz} -- {id: PLL0_CLK_clock.outFreq, value: 150 MHz} -- {id: Slow_clock.outFreq, value: 37.5 MHz} -- {id: System_clock.outFreq, value: 150 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: PLL0_Mode, value: Normal} -- {id: RunPowerMode, value: OD} -- {id: SCGMode, value: PLL0} -- {id: SCG.PLL0M_MULT.scale, value: '50', locked: true} -- {id: SCG.PLL0SRCSEL.sel, value: SCG.FIRC_48M} -- {id: SCG.PLL0_NDIV.scale, value: '8', locked: true} -- {id: SCG.SCSSEL.sel, value: SCG.PLL0_CLK} -- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -void BOARD_BootClockPLL150M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ - - /*!< Set up PLL0 */ - const pll_setup_t pll0Setup = { - .pllctrl = SCG_APLLCTRL_SOURCE(1U) | SCG_APLLCTRL_SELI(27U) | SCG_APLLCTRL_SELP(13U), - .pllndiv = SCG_APLLNDIV_NDIV(8U), - .pllpdiv = SCG_APLLPDIV_PDIV(1U), - .pllmdiv = SCG_APLLMDIV_MDIV(50U), - .pllRate = 150000000U - }; - CLOCK_SetPLL0Freq(&pll0Setup); /*!< Configure PLL0 to the desired values */ - CLOCK_SetPll0MonitorMode(kSCG_Pll0MonitorDisable); /* Pll0 Monitor is disabled */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kPLL0_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL0 */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK; -} - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL100M ********************* - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockPLL100M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: CLK_IN_clock.outFreq, value: 24 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: MAIN_clock.outFreq, value: 100 MHz} -- {id: PLL1_CLK_clock.outFreq, value: 100 MHz} -- {id: Slow_clock.outFreq, value: 25 MHz} -- {id: System_clock.outFreq, value: 100 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: PLL1_Mode, value: Normal} -- {id: SCGMode, value: PLL1} -- {id: SCG.PLL1M_MULT.scale, value: '100', locked: true} -- {id: SCG.PLL1_NDIV.scale, value: '6', locked: true} -- {id: SCG.PLL1_PDIV.scale, value: '4', locked: true} -- {id: SCG.SCSSEL.sel, value: SCG.PLL1_CLK} -- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled} -- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} -sources: -- {id: SCG.SOSC.outFreq, value: 24 MHz, enabled: true} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -void BOARD_BootClockPLL100M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupExtClocking(24000000U); - CLOCK_SetSysOscMonitorMode(kSCG_SysOscMonitorDisable); /* System OSC Clock Monitor is disabled */ - - /*!< Set up PLL1 */ - const pll_setup_t pll1Setup = { - .pllctrl = SCG_SPLLCTRL_SOURCE(0U) | SCG_SPLLCTRL_SELI(53U) | SCG_SPLLCTRL_SELP(26U), - .pllndiv = SCG_SPLLNDIV_NDIV(6U), - .pllpdiv = SCG_SPLLPDIV_PDIV(2U), - .pllmdiv = SCG_SPLLMDIV_MDIV(100U), - .pllRate = 100000000U - }; - CLOCK_SetPLL1Freq(&pll1Setup); /*!< Configure PLL1 to the desired values */ - CLOCK_SetPll1MonitorMode(kSCG_Pll1MonitorDisable); /* Pll1 Monitor is disabled */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kPLL1_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL1 */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK; -} diff --git a/hw/bsp/mcx/boards/frdm-mcxn947/clock_config.h b/hw/bsp/mcx/boards/frdm-mcxn947/clock_config.h deleted file mode 100644 index c238a0423..000000000 --- a/hw/bsp/mcx/boards/frdm-mcxn947/clock_config.h +++ /dev/null @@ -1,177 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -#ifndef _CLOCK_CONFIG_H_ -#define _CLOCK_CONFIG_H_ - -#include "fsl_common.h" - -/******************************************************************************* - * Definitions - ******************************************************************************/ -#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal frequency in Hz */ -#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32K frequency in Hz */ - -/******************************************************************************* - ************************ BOARD_InitBootClocks function ************************ - ******************************************************************************/ - -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes default configuration of clocks. - * - */ -void BOARD_InitBootClocks(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO12M ********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */ -#define BOARD_BOOTCLOCKFRO12M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFRO12M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF48M ********************* - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ -#define BOARD_BOOTCLOCKFROHF48M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFROHF48M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF144M ******************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK 144000000U /*!< Core clock frequency: 144000000Hz */ -#define BOARD_BOOTCLOCKFROHF144M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFROHF144M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL150M ********************* - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 150000000U /*!< Core clock frequency: 150000000Hz */ -#define BOARD_BOOTCLOCKPLL150M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockPLL150M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL100M ********************* - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK 100000000U /*!< Core clock frequency: 100000000Hz */ -#define BOARD_BOOTCLOCKPLL100M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockPLL100M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -#endif /* _CLOCK_CONFIG_H_ */ diff --git a/hw/bsp/mcx/boards/frdm-mcxn947/pin_mux.c b/hw/bsp/mcx/boards/frdm-mcxn947/pin_mux.c deleted file mode 100644 index 30a5ae456..000000000 --- a/hw/bsp/mcx/boards/frdm-mcxn947/pin_mux.c +++ /dev/null @@ -1,143 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -/* clang-format off */ -/* - * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!GlobalInfo -product: Pins v12.0 -processor: MCXN947 -package_id: MCXN947VDF -mcu_data: ksdk2_0 -processor_version: 0.12.3 - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** - */ -/* clang-format on */ - -#include "fsl_common.h" -#include "fsl_port.h" -#include "pin_mux.h" - -/* FUNCTION ************************************************************************************************************ - * - * Function Name : BOARD_InitBootPins - * Description : Calls initialization functions. - * - * END ****************************************************************************************************************/ -void BOARD_InitBootPins(void) -{ - BOARD_InitPins(); -} - -/* clang-format off */ -/* - * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -BOARD_InitPins: -- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'} -- pin_list: - - {pin_num: A1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P0, pin_signal: PIO1_8/WUU0_IN10/LPTMR1_ALT3/TRACE_DATA0/FC4_P0/FC5_P4/CT_INP8/SCT0_OUT2/FLEXIO0_D16/PLU_OUT0/ENET0_TXD2/I3C1_SDA/TSI0_CH17/ADC1_A8, - slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, pull_value: low, input_buffer: enable, - invert_input: normal} - - {pin_num: B1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P1, pin_signal: PIO1_9/TRACE_DATA1/FC4_P1/FC5_P5/CT_INP9/SCT0_OUT3/FLEXIO0_D17/PLU_OUT1/ENET0_TXD3/I3C1_SCL/TSI0_CH18/ADC1_A9, - slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, input_buffer: enable, invert_input: normal} - - {pin_num: B12, peripheral: GPIO0, signal: 'GPIO, 10', pin_signal: PIO0_12/ADC0_B10/FC0_P6/CT0O_MAT0/FLEXIO0_D2, slew_rate: fast, open_drain: disable, drive_strength: low, - pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** - */ -/* clang-format on */ - -/* FUNCTION ************************************************************************************************************ - * - * Function Name : BOARD_InitPins - * Description : Configures pin routing and optionally pin electrical features. - * - * END ****************************************************************************************************************/ -void BOARD_InitPins(void) -{ - /* Enables the clock for PORT0: Enables clock */ - CLOCK_EnableClock(kCLOCK_Port0); - - /* Enables the clock for PORT1: Enables clock */ - CLOCK_EnableClock(kCLOCK_Port1); - - - const port_pin_config_t port1_8_pinA1_config = {/* Internal pull-up/down resistor is disabled */ - kPORT_PullDisable, - /* Low internal pull resistor value is selected. */ - kPORT_LowPullResistor, - /* Fast slew rate is configured */ - kPORT_FastSlewRate, - /* Passive input filter is disabled */ - kPORT_PassiveFilterDisable, - /* Open drain output is disabled */ - kPORT_OpenDrainDisable, - /* Low drive strength is configured */ - kPORT_LowDriveStrength, - /* Pin is configured as FC4_P0 */ - kPORT_MuxAlt2, - /* Digital input enabled */ - kPORT_InputBufferEnable, - /* Digital input is not inverted */ - kPORT_InputNormal, - /* Pin Control Register fields [15:0] are not locked */ - kPORT_UnlockRegister}; - /* PORT1_8 (pin A1) is configured as FC4_P0 */ - PORT_SetPinConfig(PORT1, 8U, &port1_8_pinA1_config); - - const port_pin_config_t port1_9_pinB1_config = {/* Internal pull-up/down resistor is disabled */ - kPORT_PullDisable, - /* Low internal pull resistor value is selected. */ - kPORT_LowPullResistor, - /* Fast slew rate is configured */ - kPORT_FastSlewRate, - /* Passive input filter is disabled */ - kPORT_PassiveFilterDisable, - /* Open drain output is disabled */ - kPORT_OpenDrainDisable, - /* Low drive strength is configured */ - kPORT_LowDriveStrength, - /* Pin is configured as FC4_P1 */ - kPORT_MuxAlt2, - /* Digital input enabled */ - kPORT_InputBufferEnable, - /* Digital input is not inverted */ - kPORT_InputNormal, - /* Pin Control Register fields [15:0] are not locked */ - kPORT_UnlockRegister}; - /* PORT1_9 (pin B1) is configured as FC4_P1 */ - PORT_SetPinConfig(PORT1, 9U, &port1_9_pinB1_config); - - const port_pin_config_t port0_10_pinB12_config = {/* Internal pull-up/down resistor is disabled */ - kPORT_PullDisable, - /* Low internal pull resistor value is selected. */ - kPORT_LowPullResistor, - /* Fast slew rate is configured */ - kPORT_FastSlewRate, - /* Passive input filter is disabled */ - kPORT_PassiveFilterDisable, - /* Open drain output is disabled */ - kPORT_OpenDrainDisable, - /* Low drive strength is configured */ - kPORT_LowDriveStrength, - /* Pin is configured as PIO0_10 */ - kPORT_MuxAlt0, - /* Digital input enabled */ - kPORT_InputBufferEnable, - /* Digital input is not inverted */ - kPORT_InputNormal, - /* Pin Control Register fields [15:0] are not locked */ - kPORT_UnlockRegister}; - /* PORT0_10 (pin B12) is configured as PIO0_10 */ - PORT_SetPinConfig(PORT0, 10U, &port0_10_pinB12_config); -} -/*********************************************************************************************************************** - * EOF - **********************************************************************************************************************/ diff --git a/hw/bsp/mcx/boards/frdm-mcxn947/pin_mux.h b/hw/bsp/mcx/boards/frdm-mcxn947/pin_mux.h deleted file mode 100644 index 40968c275..000000000 --- a/hw/bsp/mcx/boards/frdm-mcxn947/pin_mux.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -#ifndef _PIN_MUX_H_ -#define _PIN_MUX_H_ - -/*! - * @addtogroup pin_mux - * @{ - */ - -/*********************************************************************************************************************** - * API - **********************************************************************************************************************/ - -#if defined(__cplusplus) -extern "C" { -#endif - -/*! - * @brief Calls initialization functions. - * - */ -void BOARD_InitBootPins(void); - -/*! - * @brief Configures pin routing and optionally pin electrical features. - * - */ -void BOARD_InitPins(void); - -#if defined(__cplusplus) -} -#endif - -/*! - * @} - */ -#endif /* _PIN_MUX_H_ */ - -/*********************************************************************************************************************** - * EOF - **********************************************************************************************************************/ diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index d438d0715..4adc558a6 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -1729,7 +1729,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const * // Find correct interface if (tu_desc_type(p_desc) == TUSB_DESC_INTERFACE && ((tusb_desc_interface_t const * )p_desc)->bInterfaceNumber == itf && ((tusb_desc_interface_t const * )p_desc)->bAlternateSetting == alt) { -#if CFG_TUD_AUDIO_ENABLE_ENCODING || CFG_TUD_AUDIO_ENABLE_DECODING || CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL +#if (CFG_TUD_AUDIO_ENABLE_EP_IN && (CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL || CFG_TUD_AUDIO_ENABLE_ENCODING)) || (CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING) uint8_t const * p_desc_parse_for_params = p_desc; #endif // From this point forward follow the EP descriptors associated to the current alternate setting interface - Open EPs if necessary diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h index deec32ae4..5cbd658fe 100644 --- a/src/class/cdc/cdc.h +++ b/src/class/cdc/cdc.h @@ -136,8 +136,7 @@ typedef enum{ //--------------------------------------------------------------------+ /// Communication Interface Management Element Request Codes -typedef enum -{ +typedef enum { CDC_REQUEST_SEND_ENCAPSULATED_COMMAND = 0x00, ///< is used to issue a command in the format of the supported control protocol of the Communications Class interface CDC_REQUEST_GET_ENCAPSULATED_RESPONSE = 0x01, ///< is used to request a response in the format of the supported control protocol of the Communications Class interface. CDC_REQUEST_SET_COMM_FEATURE = 0x02, @@ -180,39 +179,38 @@ typedef enum CDC_REQUEST_GET_ATM_VC_STATISTICS = 0x53, CDC_REQUEST_MDLM_SEMANTIC_MODEL = 0x60, -}cdc_management_request_t; +} cdc_management_request_t; -enum { +typedef enum { CDC_CONTROL_LINE_STATE_DTR = 0x01, CDC_CONTROL_LINE_STATE_RTS = 0x02, -}; +} cdc_control_line_state_t; -enum { +typedef enum { CDC_LINE_CODING_STOP_BITS_1 = 0, // 1 bit CDC_LINE_CODING_STOP_BITS_1_5 = 1, // 1.5 bits CDC_LINE_CODING_STOP_BITS_2 = 2, // 2 bits -}; +} cdc_line_coding_stopbits_t; // TODO Backward compatible for typos. Maybe removed in the future release #define CDC_LINE_CONDING_STOP_BITS_1 CDC_LINE_CODING_STOP_BITS_1 #define CDC_LINE_CONDING_STOP_BITS_1_5 CDC_LINE_CODING_STOP_BITS_1_5 #define CDC_LINE_CONDING_STOP_BITS_2 CDC_LINE_CODING_STOP_BITS_2 -enum { +typedef enum { CDC_LINE_CODING_PARITY_NONE = 0, CDC_LINE_CODING_PARITY_ODD = 1, CDC_LINE_CODING_PARITY_EVEN = 2, CDC_LINE_CODING_PARITY_MARK = 3, CDC_LINE_CODING_PARITY_SPACE = 4, -}; +} cdc_line_coding_parity_t; //--------------------------------------------------------------------+ // Management Element Notification (Notification Endpoint) //--------------------------------------------------------------------+ /// 6.3 Notification Codes -typedef enum -{ +typedef enum { CDC_NOTIF_NETWORK_CONNECTION = 0x00, ///< This notification allows the device to notify the host about network connection status. CDC_NOTIF_RESPONSE_AVAILABLE = 0x01, ///< This notification allows the device to notify the hostthat a response is available. This response can be retrieved with a subsequent \ref CDC_REQUEST_GET_ENCAPSULATED_RESPONSE request. CDC_NOTIF_AUX_JACK_HOOK_STATE = 0x08, diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 2463671c6..2fb37d835 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -22,6 +22,9 @@ * THE SOFTWARE. * * This file is part of the TinyUSB stack. + * + * Contribution + * - Heiko Kuester: CH34x support */ #include "tusb_option.h" @@ -50,12 +53,18 @@ typedef struct { uint8_t bInterfaceSubClass; uint8_t bInterfaceProtocol; + uint8_t ep_notif; uint8_t serial_drid; // Serial Driver ID + bool mounted; // Enumeration is complete cdc_acm_capability_t acm_capability; - uint8_t ep_notif; - uint8_t line_state; // DTR (bit0), RTS (bit1) TU_ATTR_ALIGNED(4) cdc_line_coding_t line_coding; // Baudrate, stop bits, parity, data width + uint8_t line_state; // DTR (bit0), RTS (bit1) + + #if CFG_TUH_CDC_FTDI || CFG_TUH_CDC_CP210X || CFG_TUH_CDC_CH34X + cdc_line_coding_t requested_line_coding; + // 1 byte padding + #endif tuh_xfer_cb_t user_control_cb; @@ -69,7 +78,6 @@ typedef struct { uint8_t rx_ff_buf[CFG_TUH_CDC_TX_BUFSIZE]; CFG_TUH_MEM_ALIGN uint8_t rx_ep_buf[CFG_TUH_CDC_TX_EPSIZE]; } stream; - } cdch_interface_t; CFG_TUH_MEM_SECTION @@ -83,45 +91,57 @@ static cdch_interface_t cdch_data[CFG_TUH_CDC]; static bool acm_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len); static void acm_process_config(tuh_xfer_t* xfer); +static bool acm_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data); +static bool acm_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, tuh_xfer_cb_t complete_cb, uintptr_t user_data); static bool acm_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data); static bool acm_set_control_line_state(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data); -static bool acm_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data); //------------- FTDI prototypes -------------// #if CFG_TUH_CDC_FTDI #include "serial/ftdi_sio.h" -static uint16_t const ftdi_vid_pid_list[][2] = {CFG_TUH_CDC_FTDI_VID_PID_LIST }; -enum { - FTDI_PID_COUNT = sizeof(ftdi_vid_pid_list) / sizeof(ftdi_vid_pid_list[0]) -}; - -// Store last request baudrate since divisor to baudrate is not easy -static uint32_t _ftdi_requested_baud; +static uint16_t const ftdi_vid_pid_list[][2] = {CFG_TUH_CDC_FTDI_VID_PID_LIST}; static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint16_t max_len); static void ftdi_process_config(tuh_xfer_t* xfer); -static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data); static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data); +static bool ftdi_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, tuh_xfer_cb_t complete_cb, uintptr_t user_data); +static bool ftdi_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data); +static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data); #endif //------------- CP210X prototypes -------------// #if CFG_TUH_CDC_CP210X #include "serial/cp210x.h" -static uint16_t const cp210x_vid_pid_list[][2] = {CFG_TUH_CDC_CP210X_VID_PID_LIST }; -enum { - CP210X_PID_COUNT = sizeof(cp210x_vid_pid_list) / sizeof(cp210x_vid_pid_list[0]) -}; +static uint16_t const cp210x_vid_pid_list[][2] = {CFG_TUH_CDC_CP210X_VID_PID_LIST}; static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len); static void cp210x_process_config(tuh_xfer_t* xfer); -static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data); static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data); +static bool cp210x_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, tuh_xfer_cb_t complete_cb, uintptr_t user_data); +static bool cp210x_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data); +static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data); #endif +//------------- CH34x prototypes -------------// +#if CFG_TUH_CDC_CH34X +#include "serial/ch34x.h" + +static uint16_t const ch34x_vid_pid_list[][2] = {CFG_TUH_CDC_CH34X_VID_PID_LIST}; + +static bool ch34x_open(uint8_t daddr, tusb_desc_interface_t const* itf_desc, uint16_t max_len); +static void ch34x_process_config(tuh_xfer_t* xfer); + +static bool ch34x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data); +static bool ch34x_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, tuh_xfer_cb_t complete_cb, uintptr_t user_data); +static bool ch34x_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data); +static bool ch34x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data); +#endif + +//------------- Common -------------// enum { SERIAL_DRIVER_ACM = 0, @@ -132,60 +152,96 @@ enum { #if CFG_TUH_CDC_CP210X SERIAL_DRIVER_CP210X, #endif + +#if CFG_TUH_CDC_CH34X + SERIAL_DRIVER_CH34X, +#endif + + SERIAL_DRIVER_COUNT }; typedef struct { + uint16_t const (*vid_pid_list)[2]; + uint16_t const vid_pid_count; + bool (*const open)(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint16_t max_len); void (*const process_set_config)(tuh_xfer_t* xfer); bool (*const set_control_line_state)(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data); bool (*const set_baudrate)(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data); + bool (*const set_data_format)(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, tuh_xfer_cb_t complete_cb, uintptr_t user_data); + bool (*const set_line_coding)(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data); } cdch_serial_driver_t; // Note driver list must be in the same order as SERIAL_DRIVER enum static const cdch_serial_driver_t serial_drivers[] = { - { .process_set_config = acm_process_config, - .set_control_line_state = acm_set_control_line_state, - .set_baudrate = acm_set_baudrate + { + .vid_pid_list = NULL, + .vid_pid_count = 0, + .open = acm_open, + .process_set_config = acm_process_config, + .set_control_line_state = acm_set_control_line_state, + .set_baudrate = acm_set_baudrate, + .set_data_format = acm_set_data_format, + .set_line_coding = acm_set_line_coding }, #if CFG_TUH_CDC_FTDI - { .process_set_config = ftdi_process_config, - .set_control_line_state = ftdi_sio_set_modem_ctrl, - .set_baudrate = ftdi_sio_set_baudrate + { + .vid_pid_list = ftdi_vid_pid_list, + .vid_pid_count = TU_ARRAY_SIZE(ftdi_vid_pid_list), + .open = ftdi_open, + .process_set_config = ftdi_process_config, + .set_control_line_state = ftdi_sio_set_modem_ctrl, + .set_baudrate = ftdi_sio_set_baudrate, + .set_data_format = ftdi_set_data_format, + .set_line_coding = ftdi_set_line_coding }, #endif #if CFG_TUH_CDC_CP210X - { .process_set_config = cp210x_process_config, - .set_control_line_state = cp210x_set_modem_ctrl, - .set_baudrate = cp210x_set_baudrate + { + .vid_pid_list = cp210x_vid_pid_list, + .vid_pid_count = TU_ARRAY_SIZE(cp210x_vid_pid_list), + .open = cp210x_open, + .process_set_config = cp210x_process_config, + .set_control_line_state = cp210x_set_modem_ctrl, + .set_baudrate = cp210x_set_baudrate, + .set_data_format = cp210x_set_data_format, + .set_line_coding = cp210x_set_line_coding }, #endif -}; -enum { - SERIAL_DRIVER_COUNT = sizeof(serial_drivers) / sizeof(serial_drivers[0]) + #if CFG_TUH_CDC_CH34X + { + .vid_pid_list = ch34x_vid_pid_list, + .vid_pid_count = TU_ARRAY_SIZE(ch34x_vid_pid_list), + .open = ch34x_open, + .process_set_config = ch34x_process_config, + .set_control_line_state = ch34x_set_modem_ctrl, + .set_baudrate = ch34x_set_baudrate, + .set_data_format = ch34x_set_data_format, + .set_line_coding = ch34x_set_line_coding + }, + #endif }; +TU_VERIFY_STATIC(TU_ARRAY_SIZE(serial_drivers) == SERIAL_DRIVER_COUNT, "Serial driver count mismatch"); + //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -static inline cdch_interface_t* get_itf(uint8_t idx) -{ +static inline cdch_interface_t* get_itf(uint8_t idx) { TU_ASSERT(idx < CFG_TUH_CDC, NULL); cdch_interface_t* p_cdc = &cdch_data[idx]; return (p_cdc->daddr != 0) ? p_cdc : NULL; } -static inline uint8_t get_idx_by_ep_addr(uint8_t daddr, uint8_t ep_addr) -{ - for(uint8_t i=0; idaddr == daddr) && - (ep_addr == p_cdc->ep_notif || ep_addr == p_cdc->stream.rx.ep_addr || ep_addr == p_cdc->stream.tx.ep_addr)) - { + (ep_addr == p_cdc->ep_notif || ep_addr == p_cdc->stream.rx.ep_addr || ep_addr == p_cdc->stream.tx.ep_addr)) { return i; } } @@ -193,14 +249,10 @@ static inline uint8_t get_idx_by_ep_addr(uint8_t daddr, uint8_t ep_addr) return TUSB_INDEX_INVALID_8; } - -static cdch_interface_t* make_new_itf(uint8_t daddr, tusb_desc_interface_t const *itf_desc) -{ - for(uint8_t i=0; idaddr = daddr; p_cdc->bInterfaceNumber = itf_desc->bInterfaceNumber; p_cdc->bInterfaceSubClass = itf_desc->bInterfaceSubClass; @@ -221,20 +273,16 @@ static void cdch_internal_control_complete(tuh_xfer_t* xfer); // APPLICATION API //--------------------------------------------------------------------+ -uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num) -{ - for(uint8_t i=0; idaddr == daddr && p_cdc->bInterfaceNumber == itf_num) return i; } return TUSB_INDEX_INVALID_8; } -bool tuh_cdc_itf_get_info(uint8_t idx, tuh_itf_info_t* info) -{ +bool tuh_cdc_itf_get_info(uint8_t idx, tuh_itf_info_t* info) { cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc && info); @@ -256,30 +304,27 @@ bool tuh_cdc_itf_get_info(uint8_t idx, tuh_itf_info_t* info) return true; } -bool tuh_cdc_mounted(uint8_t idx) -{ +bool tuh_cdc_mounted(uint8_t idx) { cdch_interface_t* p_cdc = get_itf(idx); - return p_cdc != NULL; + TU_VERIFY(p_cdc); + return p_cdc->mounted; } -bool tuh_cdc_get_dtr(uint8_t idx) -{ +bool tuh_cdc_get_dtr(uint8_t idx) { cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); return (p_cdc->line_state & CDC_CONTROL_LINE_STATE_DTR) ? true : false; } -bool tuh_cdc_get_rts(uint8_t idx) -{ +bool tuh_cdc_get_rts(uint8_t idx) { cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); return (p_cdc->line_state & CDC_CONTROL_LINE_STATE_RTS) ? true : false; } -bool tuh_cdc_get_local_line_coding(uint8_t idx, cdc_line_coding_t* line_coding) -{ +bool tuh_cdc_get_local_line_coding(uint8_t idx, cdc_line_coding_t* line_coding) { cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); @@ -292,32 +337,28 @@ bool tuh_cdc_get_local_line_coding(uint8_t idx, cdc_line_coding_t* line_coding) // Write //--------------------------------------------------------------------+ -uint32_t tuh_cdc_write(uint8_t idx, void const* buffer, uint32_t bufsize) -{ +uint32_t tuh_cdc_write(uint8_t idx, void const* buffer, uint32_t bufsize) { cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); return tu_edpt_stream_write(&p_cdc->stream.tx, buffer, bufsize); } -uint32_t tuh_cdc_write_flush(uint8_t idx) -{ +uint32_t tuh_cdc_write_flush(uint8_t idx) { cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); return tu_edpt_stream_write_xfer(&p_cdc->stream.tx); } -bool tuh_cdc_write_clear(uint8_t idx) -{ +bool tuh_cdc_write_clear(uint8_t idx) { cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); return tu_edpt_stream_clear(&p_cdc->stream.tx); } -uint32_t tuh_cdc_write_available(uint8_t idx) -{ +uint32_t tuh_cdc_write_available(uint8_t idx) { cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); @@ -328,32 +369,28 @@ uint32_t tuh_cdc_write_available(uint8_t idx) // Read //--------------------------------------------------------------------+ -uint32_t tuh_cdc_read (uint8_t idx, void* buffer, uint32_t bufsize) -{ +uint32_t tuh_cdc_read (uint8_t idx, void* buffer, uint32_t bufsize) { cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); return tu_edpt_stream_read(&p_cdc->stream.rx, buffer, bufsize); } -uint32_t tuh_cdc_read_available(uint8_t idx) -{ +uint32_t tuh_cdc_read_available(uint8_t idx) { cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); return tu_edpt_stream_read_available(&p_cdc->stream.rx); } -bool tuh_cdc_peek(uint8_t idx, uint8_t* ch) -{ +bool tuh_cdc_peek(uint8_t idx, uint8_t* ch) { cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); return tu_edpt_stream_peek(&p_cdc->stream.rx, ch); } -bool tuh_cdc_read_clear (uint8_t idx) -{ +bool tuh_cdc_read_clear (uint8_t idx) { cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc); @@ -366,28 +403,25 @@ bool tuh_cdc_read_clear (uint8_t idx) // Control Endpoint API //--------------------------------------------------------------------+ -// internal control complete to update state such as line state, encoding -static void cdch_internal_control_complete(tuh_xfer_t* xfer) -{ - uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex); +static void process_internal_control_complete(tuh_xfer_t* xfer, uint8_t itf_num) { uint8_t idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num); cdch_interface_t* p_cdc = get_itf(idx); TU_ASSERT(p_cdc, ); + uint16_t const value = tu_le16toh(xfer->setup->wValue); - if (xfer->result == XFER_RESULT_SUCCESS) - { + if (xfer->result == XFER_RESULT_SUCCESS) { switch (p_cdc->serial_drid) { case SERIAL_DRIVER_ACM: switch (xfer->setup->bRequest) { case CDC_REQUEST_SET_CONTROL_LINE_STATE: - p_cdc->line_state = (uint8_t) tu_le16toh(xfer->setup->wValue); + p_cdc->line_state = (uint8_t) value; break; case CDC_REQUEST_SET_LINE_CODING: { uint16_t const len = tu_min16(sizeof(cdc_line_coding_t), tu_le16toh(xfer->setup->wLength)); memcpy(&p_cdc->line_coding, xfer->buffer, len); - } break; + } default: break; } @@ -397,12 +431,11 @@ static void cdch_internal_control_complete(tuh_xfer_t* xfer) case SERIAL_DRIVER_FTDI: switch (xfer->setup->bRequest) { case FTDI_SIO_MODEM_CTRL: - p_cdc->line_state = (uint8_t) (tu_le16toh(xfer->setup->wValue) & 0x00ff); + p_cdc->line_state = (uint8_t) value; break; case FTDI_SIO_SET_BAUD_RATE: - // convert from divisor to baudrate is not supported - p_cdc->line_coding.bit_rate = _ftdi_requested_baud; + p_cdc->line_coding.bit_rate = p_cdc->requested_line_coding.bit_rate; break; default: break; @@ -414,15 +447,61 @@ static void cdch_internal_control_complete(tuh_xfer_t* xfer) case SERIAL_DRIVER_CP210X: switch(xfer->setup->bRequest) { case CP210X_SET_MHS: - p_cdc->line_state = (uint8_t) (tu_le16toh(xfer->setup->wValue) & 0x00ff); + p_cdc->line_state = (uint8_t) value; break; case CP210X_SET_BAUDRATE: { uint32_t baudrate; memcpy(&baudrate, xfer->buffer, sizeof(uint32_t)); p_cdc->line_coding.bit_rate = tu_le32toh(baudrate); + break; } + + default: break; + } + break; + #endif + + #if CFG_TUH_CDC_CH34X + case SERIAL_DRIVER_CH34X: + switch (xfer->setup->bRequest) { + case CH34X_REQ_WRITE_REG: + // register write request + switch (value) { + case CH34X_REG16_DIVISOR_PRESCALER: + // baudrate + p_cdc->line_coding.bit_rate = p_cdc->requested_line_coding.bit_rate; + break; + + case CH32X_REG16_LCR2_LCR: + // data format + p_cdc->line_coding.stop_bits = p_cdc->requested_line_coding.stop_bits; + p_cdc->line_coding.parity = p_cdc->requested_line_coding.parity; + p_cdc->line_coding.data_bits = p_cdc->requested_line_coding.data_bits; + break; + + default: break; + } + break; + + case CH34X_REQ_MODEM_CTRL: { + // set modem controls RTS/DTR request. Note: signals are inverted + uint16_t const modem_signal = ~value; + if (modem_signal & CH34X_BIT_RTS) { + p_cdc->line_state |= CDC_CONTROL_LINE_STATE_RTS; + } else { + p_cdc->line_state &= (uint8_t) ~CDC_CONTROL_LINE_STATE_RTS; + } + + if (modem_signal & CH34X_BIT_DTR) { + p_cdc->line_state |= CDC_CONTROL_LINE_STATE_DTR; + } else { + p_cdc->line_state &= (uint8_t) ~CDC_CONTROL_LINE_STATE_DTR; + } break; + } + + default: break; } break; #endif @@ -437,14 +516,20 @@ static void cdch_internal_control_complete(tuh_xfer_t* xfer) } } +// internal control complete to update state such as line state, encoding +static void cdch_internal_control_complete(tuh_xfer_t* xfer) { + uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex); + process_internal_control_complete(xfer, itf_num); +} + bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { cdch_interface_t* p_cdc = get_itf(idx); TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT); cdch_serial_driver_t const* driver = &serial_drivers[p_cdc->serial_drid]; - if ( complete_cb ) { + if (complete_cb) { return driver->set_control_line_state(p_cdc, line_state, complete_cb, user_data); - }else { + } else { // blocking xfer_result_t result = XFER_RESULT_INVALID; bool ret = driver->set_control_line_state(p_cdc, line_state, complete_cb, (uintptr_t) &result); @@ -455,7 +540,6 @@ bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_c } TU_VERIFY(ret && result == XFER_RESULT_SUCCESS); - p_cdc->line_state = (uint8_t) line_state; return true; } @@ -466,9 +550,9 @@ bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT); cdch_serial_driver_t const* driver = &serial_drivers[p_cdc->serial_drid]; - if ( complete_cb ) { + if (complete_cb) { return driver->set_baudrate(p_cdc, baudrate, complete_cb, user_data); - }else { + } else { // blocking xfer_result_t result = XFER_RESULT_INVALID; bool ret = driver->set_baudrate(p_cdc, baudrate, complete_cb, (uintptr_t) &result); @@ -479,25 +563,23 @@ bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete } TU_VERIFY(ret && result == XFER_RESULT_SUCCESS); - p_cdc->line_coding.bit_rate = baudrate; return true; } } -bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data) -{ +bool tuh_cdc_set_data_format(uint8_t idx, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, + tuh_xfer_cb_t complete_cb, uintptr_t user_data) { cdch_interface_t* p_cdc = get_itf(idx); - // only ACM support this set line coding request - TU_VERIFY(p_cdc && p_cdc->serial_drid == SERIAL_DRIVER_ACM); - TU_VERIFY(p_cdc->acm_capability.support_line_request); + TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT); + cdch_serial_driver_t const* driver = &serial_drivers[p_cdc->serial_drid]; - if ( complete_cb ) { - return acm_set_line_coding(p_cdc, line_coding, complete_cb, user_data); - }else { + if (complete_cb) { + return driver->set_data_format(p_cdc, stop_bits, parity, data_bits, complete_cb, user_data); + } else { // blocking xfer_result_t result = XFER_RESULT_INVALID; - bool ret = acm_set_line_coding(p_cdc, line_coding, complete_cb, (uintptr_t) &result); + bool ret = driver->set_data_format(p_cdc, stop_bits, parity, data_bits, complete_cb, (uintptr_t) &result); if (user_data) { // user_data is not NULL, return result via user_data @@ -505,7 +587,31 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, } TU_VERIFY(ret && result == XFER_RESULT_SUCCESS); + p_cdc->line_coding.stop_bits = stop_bits; + p_cdc->line_coding.parity = parity; + p_cdc->line_coding.data_bits = data_bits; + return true; + } +} + +bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { + cdch_interface_t* p_cdc = get_itf(idx); + TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT); + cdch_serial_driver_t const* driver = &serial_drivers[p_cdc->serial_drid]; + + if ( complete_cb ) { + return driver->set_line_coding(p_cdc, line_coding, complete_cb, user_data); + } else { + // blocking + xfer_result_t result = XFER_RESULT_INVALID; + bool ret = driver->set_line_coding(p_cdc, line_coding, complete_cb, (uintptr_t) &result); + + if (user_data) { + // user_data is not NULL, return result via user_data + *((xfer_result_t*) user_data) = result; + } + TU_VERIFY(ret && result == XFER_RESULT_SUCCESS); p_cdc->line_coding = *line_coding; return true; } @@ -515,39 +621,34 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, // CLASS-USBH API //--------------------------------------------------------------------+ -void cdch_init(void) -{ +void cdch_init(void) { tu_memclr(cdch_data, sizeof(cdch_data)); - for(size_t i=0; istream.tx, true, true, false, - p_cdc->stream.tx_ff_buf, CFG_TUH_CDC_TX_BUFSIZE, - p_cdc->stream.tx_ep_buf, CFG_TUH_CDC_TX_EPSIZE); + p_cdc->stream.tx_ff_buf, CFG_TUH_CDC_TX_BUFSIZE, + p_cdc->stream.tx_ep_buf, CFG_TUH_CDC_TX_EPSIZE); tu_edpt_stream_init(&p_cdc->stream.rx, true, false, false, - p_cdc->stream.rx_ff_buf, CFG_TUH_CDC_RX_BUFSIZE, - p_cdc->stream.rx_ep_buf, CFG_TUH_CDC_RX_EPSIZE); + p_cdc->stream.rx_ff_buf, CFG_TUH_CDC_RX_BUFSIZE, + p_cdc->stream.rx_ep_buf, CFG_TUH_CDC_RX_EPSIZE); } } -void cdch_close(uint8_t daddr) -{ - for(uint8_t idx=0; idxdaddr == daddr) - { + if (p_cdc->daddr == daddr) { TU_LOG_DRV(" CDCh close addr = %u index = %u\r\n", daddr, idx); // Invoke application callback if (tuh_cdc_umount_cb) tuh_cdc_umount_cb(idx); - //tu_memclr(p_cdc, sizeof(cdch_interface_t)); p_cdc->daddr = 0; p_cdc->bInterfaceNumber = 0; + p_cdc->mounted = false; tu_edpt_stream_close(&p_cdc->stream.tx); tu_edpt_stream_close(&p_cdc->stream.rx); } @@ -571,16 +672,11 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t // - xferred_bytes is multiple of EP Packet size and not zero tu_edpt_stream_write_zlp_if_needed(&p_cdc->stream.tx, xferred_bytes); } - } - else if ( ep_addr == p_cdc->stream.rx.ep_addr ) { + } else if ( ep_addr == p_cdc->stream.rx.ep_addr ) { #if CFG_TUH_CDC_FTDI if (p_cdc->serial_drid == SERIAL_DRIVER_FTDI) { // FTDI reserve 2 bytes for status - // FTDI status -// uint8_t status[2] = { -// p_cdc->stream.rx.ep_buf[0], -// p_cdc->stream.rx.ep_buf[1] -// }; + // uint8_t status[2] = {p_cdc->stream.rx.ep_buf[0], p_cdc->stream.rx.ep_buf[1]}; tu_edpt_stream_read_xfer_complete_offset(&p_cdc->stream.rx, xferred_bytes, 2); }else #endif @@ -606,20 +702,15 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t // Enumeration //--------------------------------------------------------------------+ -static bool open_ep_stream_pair(cdch_interface_t* p_cdc, tusb_desc_endpoint_t const *desc_ep) -{ - for(size_t i=0; i<2; i++) - { +static bool open_ep_stream_pair(cdch_interface_t* p_cdc, tusb_desc_endpoint_t const* desc_ep) { + for (size_t i = 0; i < 2; i++) { TU_ASSERT(TUSB_DESC_ENDPOINT == desc_ep->bDescriptorType && - TUSB_XFER_BULK == desc_ep->bmAttributes.xfer); - + TUSB_XFER_BULK == desc_ep->bmAttributes.xfer); TU_ASSERT(tuh_edpt_open(p_cdc->daddr, desc_ep)); - if ( tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN ) - { + if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN) { tu_edpt_stream_open(&p_cdc->stream.rx, p_cdc->daddr, desc_ep); - }else - { + } else { tu_edpt_stream_open(&p_cdc->stream.tx, p_cdc->daddr, desc_ep); } @@ -629,45 +720,36 @@ static bool open_ep_stream_pair(cdch_interface_t* p_cdc, tusb_desc_endpoint_t co return true; } -bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) -{ +bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) { (void) rhport; - // Only support ACM subclass + // For CDC: only support ACM subclass // Note: Protocol 0xFF can be RNDIS device - if ( TUSB_CLASS_CDC == itf_desc->bInterfaceClass && - CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL == itf_desc->bInterfaceSubClass) - { + if (TUSB_CLASS_CDC == itf_desc->bInterfaceClass && + CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL == itf_desc->bInterfaceSubClass) { return acm_open(daddr, itf_desc, max_len); } - #if CFG_TUH_CDC_FTDI || CFG_TUH_CDC_CP210X - else if ( TUSB_CLASS_VENDOR_SPECIFIC == itf_desc->bInterfaceClass ) - { + else if (SERIAL_DRIVER_COUNT > 1 && + TUSB_CLASS_VENDOR_SPECIFIC == itf_desc->bInterfaceClass) { uint16_t vid, pid; TU_VERIFY(tuh_vid_pid_get(daddr, &vid, &pid)); - #if CFG_TUH_CDC_FTDI - for (size_t i = 0; i < FTDI_PID_COUNT; i++) { - if (ftdi_vid_pid_list[i][0] == vid && ftdi_vid_pid_list[i][1] == pid) { - return ftdi_open(daddr, itf_desc, max_len); - } - } - #endif - - #if CFG_TUH_CDC_CP210X - for (size_t i = 0; i < CP210X_PID_COUNT; i++) { - if (cp210x_vid_pid_list[i][0] == vid && cp210x_vid_pid_list[i][1] == pid) { - return cp210x_open(daddr, itf_desc, max_len); + for (size_t dr = 1; dr < SERIAL_DRIVER_COUNT; dr++) { + cdch_serial_driver_t const* driver = &serial_drivers[dr]; + for (size_t i = 0; i < driver->vid_pid_count; i++) { + if (driver->vid_pid_list[i][0] == vid && driver->vid_pid_list[i][1] == pid) { + return driver->open(daddr, itf_desc, max_len); + } } } - #endif } - #endif return false; } static void set_config_complete(cdch_interface_t * p_cdc, uint8_t idx, uint8_t itf_num) { + TU_LOG_DRV("CDCh Set Configure complete\r\n"); + p_cdc->mounted = true; if (tuh_cdc_mount_cb) tuh_cdc_mount_cb(idx); // Prepare for incoming data @@ -677,9 +759,7 @@ static void set_config_complete(cdch_interface_t * p_cdc, uint8_t idx, uint8_t i usbh_driver_set_config_complete(p_cdc->daddr, itf_num); } - -bool cdch_set_config(uint8_t daddr, uint8_t itf_num) -{ +bool cdch_set_config(uint8_t daddr, uint8_t itf_num) { tusb_control_request_t request; request.wIndex = tu_htole16((uint16_t) itf_num); @@ -708,94 +788,84 @@ enum { CONFIG_ACM_COMPLETE, }; -static bool acm_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) -{ - uint8_t const * p_desc_end = ((uint8_t const*) itf_desc) + max_len; +static bool acm_open(uint8_t daddr, tusb_desc_interface_t const* itf_desc, uint16_t max_len) { + uint8_t const* p_desc_end = ((uint8_t const*) itf_desc) + max_len; - cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc); + cdch_interface_t* p_cdc = make_new_itf(daddr, itf_desc); TU_VERIFY(p_cdc); - p_cdc->serial_drid = SERIAL_DRIVER_ACM; //------------- Control Interface -------------// - uint8_t const * p_desc = tu_desc_next(itf_desc); + uint8_t const* p_desc = tu_desc_next(itf_desc); // Communication Functional Descriptors - while( (p_desc < p_desc_end) && (TUSB_DESC_CS_INTERFACE == tu_desc_type(p_desc)) ) - { - if ( CDC_FUNC_DESC_ABSTRACT_CONTROL_MANAGEMENT == cdc_functional_desc_typeof(p_desc) ) - { + while ((p_desc < p_desc_end) && (TUSB_DESC_CS_INTERFACE == tu_desc_type(p_desc))) { + if (CDC_FUNC_DESC_ABSTRACT_CONTROL_MANAGEMENT == cdc_functional_desc_typeof(p_desc)) { // save ACM bmCapabilities - p_cdc->acm_capability = ((cdc_desc_func_acm_t const *) p_desc)->bmCapabilities; + p_cdc->acm_capability = ((cdc_desc_func_acm_t const*) p_desc)->bmCapabilities; } p_desc = tu_desc_next(p_desc); } // Open notification endpoint of control interface if any - if (itf_desc->bNumEndpoints == 1) - { + if (itf_desc->bNumEndpoints == 1) { TU_ASSERT(TUSB_DESC_ENDPOINT == tu_desc_type(p_desc)); - tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) p_desc; + tusb_desc_endpoint_t const* desc_ep = (tusb_desc_endpoint_t const*) p_desc; - TU_ASSERT( tuh_edpt_open(daddr, desc_ep) ); + TU_ASSERT(tuh_edpt_open(daddr, desc_ep)); p_cdc->ep_notif = desc_ep->bEndpointAddress; p_desc = tu_desc_next(p_desc); } //------------- Data Interface (if any) -------------// - if ( (TUSB_DESC_INTERFACE == tu_desc_type(p_desc)) && - (TUSB_CLASS_CDC_DATA == ((tusb_desc_interface_t const *) p_desc)->bInterfaceClass) ) - { + if ((TUSB_DESC_INTERFACE == tu_desc_type(p_desc)) && + (TUSB_CLASS_CDC_DATA == ((tusb_desc_interface_t const*) p_desc)->bInterfaceClass)) { // next to endpoint descriptor p_desc = tu_desc_next(p_desc); // data endpoints expected to be in pairs - TU_ASSERT(open_ep_stream_pair(p_cdc, (tusb_desc_endpoint_t const *) p_desc)); + TU_ASSERT(open_ep_stream_pair(p_cdc, (tusb_desc_endpoint_t const*) p_desc)); } return true; } -static void acm_process_config(tuh_xfer_t* xfer) -{ +static void acm_process_config(tuh_xfer_t* xfer) { uintptr_t const state = xfer->user_data; uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex); uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num); - cdch_interface_t * p_cdc = get_itf(idx); - TU_ASSERT(p_cdc, ); + cdch_interface_t* p_cdc = get_itf(idx); + TU_ASSERT(p_cdc,); - switch(state) - { + switch (state) { case CONFIG_ACM_SET_CONTROL_LINE_STATE: #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM - if (p_cdc->acm_capability.support_line_request) - { - TU_ASSERT(acm_set_control_line_state(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, acm_process_config, - CONFIG_ACM_SET_LINE_CODING), ); + if (p_cdc->acm_capability.support_line_request) { + TU_ASSERT(acm_set_control_line_state(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, acm_process_config, CONFIG_ACM_SET_LINE_CODING),); break; } - #endif + #endif TU_ATTR_FALLTHROUGH; case CONFIG_ACM_SET_LINE_CODING: - #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM - if (p_cdc->acm_capability.support_line_request) - { + #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM + if (p_cdc->acm_capability.support_line_request) { cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM; - TU_ASSERT(acm_set_line_coding(p_cdc, &line_coding, acm_process_config, CONFIG_ACM_COMPLETE), ); + TU_ASSERT(acm_set_line_coding(p_cdc, &line_coding, acm_process_config, CONFIG_ACM_COMPLETE),); break; } - #endif + #endif TU_ATTR_FALLTHROUGH; case CONFIG_ACM_COMPLETE: // itf_num+1 to account for data interface as well - set_config_complete(p_cdc, idx, itf_num+1); + set_config_complete(p_cdc, idx, itf_num + 1); break; - default: break; + default: + break; } } @@ -863,6 +933,19 @@ static bool acm_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const return true; } +static bool acm_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, + tuh_xfer_cb_t complete_cb, uintptr_t user_data) { + TU_LOG_DRV("CDC ACM Set Data Format\r\n"); + + cdc_line_coding_t line_coding; + line_coding.bit_rate = p_cdc->line_coding.bit_rate; + line_coding.stop_bits = stop_bits; + line_coding.parity = parity; + line_coding.data_bits = data_bits; + + return acm_set_line_coding(p_cdc, &line_coding, complete_cb, user_data); +} + static bool acm_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { TU_VERIFY(p_cdc->acm_capability.support_line_request); cdc_line_coding_t line_coding = p_cdc->line_coding; @@ -892,7 +975,6 @@ static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint TU_VERIFY(p_cdc); TU_LOG_DRV("FTDI opened\r\n"); - p_cdc->serial_drid = SERIAL_DRIVER_FTDI; // endpoint pair @@ -928,13 +1010,32 @@ static bool ftdi_sio_set_request(cdch_interface_t* p_cdc, uint8_t command, uint1 return tuh_control_xfer(&xfer); } -static bool ftdi_sio_reset(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) -{ +static bool ftdi_sio_reset(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { return ftdi_sio_set_request(p_cdc, FTDI_SIO_RESET, FTDI_SIO_RESET_SIO, complete_cb, user_data); } -static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) -{ +static bool ftdi_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, + tuh_xfer_cb_t complete_cb, uintptr_t user_data) { + (void) p_cdc; + (void) stop_bits; + (void) parity; + (void) data_bits; + (void) complete_cb; + (void) user_data; + // TODO not implemented yet + return false; +} + +static bool ftdi_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { + (void) p_cdc; + (void) line_coding; + (void) complete_cb; + (void) user_data; + // TODO not implemented yet + return false; +} + +static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { TU_LOG_DRV("CDC FTDI Set Control Line State\r\n"); p_cdc->user_control_cb = complete_cb; TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_MODEM_CTRL, 0x0300 | line_state, @@ -942,8 +1043,7 @@ static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state return true; } -static uint32_t ftdi_232bm_baud_base_to_divisor(uint32_t baud, uint32_t base) -{ +static uint32_t ftdi_232bm_baud_base_to_divisor(uint32_t baud, uint32_t base) { const uint8_t divfrac[8] = { 0, 3, 2, 4, 1, 5, 6, 7 }; uint32_t divisor; @@ -963,18 +1063,16 @@ static uint32_t ftdi_232bm_baud_base_to_divisor(uint32_t baud, uint32_t base) return divisor; } -static uint32_t ftdi_232bm_baud_to_divisor(uint32_t baud) -{ +static uint32_t ftdi_232bm_baud_to_divisor(uint32_t baud) { return ftdi_232bm_baud_base_to_divisor(baud, 48000000u); } -static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) -{ +static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { uint16_t const divisor = (uint16_t) ftdi_232bm_baud_to_divisor(baudrate); TU_LOG_DRV("CDC FTDI Set BaudRate = %lu, divisor = 0x%04x\r\n", baudrate, divisor); p_cdc->user_control_cb = complete_cb; - _ftdi_requested_baud = baudrate; + p_cdc->requested_line_coding.bit_rate = baudrate; TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_SET_BAUD_RATE, divisor, complete_cb ? cdch_internal_control_complete : NULL, user_data)); @@ -996,8 +1094,7 @@ static void ftdi_process_config(tuh_xfer_t* xfer) { case CONFIG_FTDI_MODEM_CTRL: #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM - TU_ASSERT( - ftdi_sio_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, ftdi_process_config, CONFIG_FTDI_SET_BAUDRATE),); + TU_ASSERT(ftdi_sio_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, ftdi_process_config, CONFIG_FTDI_SET_BAUDRATE),); break; #else TU_ATTR_FALLTHROUGH; @@ -1105,6 +1202,15 @@ static bool cp210x_ifc_enable(cdch_interface_t* p_cdc, uint16_t enabled, tuh_xfe return cp210x_set_request(p_cdc, CP210X_IFC_ENABLE, enabled, NULL, 0, complete_cb, user_data); } +static bool cp210x_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { + // TODO implement later + (void) p_cdc; + (void) line_coding; + (void) complete_cb; + (void) user_data; + return false; +} + static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { TU_LOG_DRV("CDC CP210x Set BaudRate = %lu\r\n", baudrate); uint32_t baud_le = tu_htole32(baudrate); @@ -1113,8 +1219,19 @@ static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_ complete_cb ? cdch_internal_control_complete : NULL, user_data); } -static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) -{ +static bool cp210x_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, + tuh_xfer_cb_t complete_cb, uintptr_t user_data) { + (void) p_cdc; + (void) stop_bits; + (void) parity; + (void) data_bits; + (void) complete_cb; + (void) user_data; + // TODO not implemented yet + return false; +} + +static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { TU_LOG_DRV("CDC CP210x Set Control Line State\r\n"); p_cdc->user_control_cb = complete_cb; return cp210x_set_request(p_cdc, CP210X_SET_MHS, 0x0300 | line_state, NULL, 0, @@ -1154,8 +1271,7 @@ static void cp210x_process_config(tuh_xfer_t* xfer) { case CONFIG_CP210X_SET_DTR_RTS: #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM - TU_ASSERT( - cp210x_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, cp210x_process_config, CONFIG_CP210X_COMPLETE),); + TU_ASSERT(cp210x_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, cp210x_process_config, CONFIG_CP210X_COMPLETE),); break; #else TU_ATTR_FALLTHROUGH; @@ -1171,4 +1287,374 @@ static void cp210x_process_config(tuh_xfer_t* xfer) { #endif +//--------------------------------------------------------------------+ +// CH34x (CH340 & CH341) +//--------------------------------------------------------------------+ + +#if CFG_TUH_CDC_CH34X + +static uint8_t ch34x_get_lcr(uint8_t stop_bits, uint8_t parity, uint8_t data_bits); +static uint16_t ch34x_get_divisor_prescaler(uint32_t baval); + +//------------- control request -------------// + +static bool ch34x_set_request(cdch_interface_t* p_cdc, uint8_t direction, uint8_t request, uint16_t value, + uint16_t index, uint8_t* buffer, uint16_t length, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { + tusb_control_request_t const request_setup = { + .bmRequestType_bit = { + .recipient = TUSB_REQ_RCPT_DEVICE, + .type = TUSB_REQ_TYPE_VENDOR, + .direction = direction & 0x01u + }, + .bRequest = request, + .wValue = tu_htole16 (value), + .wIndex = tu_htole16 (index), + .wLength = tu_htole16 (length) + }; + + // use usbh enum buf since application variable does not live long enough + uint8_t* enum_buf = NULL; + + if (buffer && length > 0) { + enum_buf = usbh_get_enum_buf(); + if (direction == TUSB_DIR_OUT) { + tu_memcpy_s(enum_buf, CFG_TUH_ENUMERATION_BUFSIZE, buffer, length); + } + } + + tuh_xfer_t xfer = { + .daddr = p_cdc->daddr, + .ep_addr = 0, + .setup = &request_setup, + .buffer = enum_buf, + .complete_cb = complete_cb, + .user_data = user_data + }; + + return tuh_control_xfer(&xfer); +} + +static inline bool ch34x_control_out(cdch_interface_t* p_cdc, uint8_t request, uint16_t value, uint16_t index, + tuh_xfer_cb_t complete_cb, uintptr_t user_data) { + return ch34x_set_request(p_cdc, TUSB_DIR_OUT, request, value, index, NULL, 0, complete_cb, user_data); +} + +static inline bool ch34x_control_in(cdch_interface_t* p_cdc, uint8_t request, uint16_t value, uint16_t index, + uint8_t* buffer, uint16_t buffersize, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { + return ch34x_set_request(p_cdc, TUSB_DIR_IN, request, value, index, buffer, buffersize, + complete_cb, user_data); +} + +static inline bool ch34x_write_reg(cdch_interface_t* p_cdc, uint16_t reg, uint16_t reg_value, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { + return ch34x_control_out(p_cdc, CH34X_REQ_WRITE_REG, reg, reg_value, complete_cb, user_data); +} + +//static bool ch34x_read_reg_request ( cdch_interface_t* p_cdc, uint16_t reg, +// uint8_t *buffer, uint16_t buffersize, tuh_xfer_cb_t complete_cb, uintptr_t user_data ) +//{ +// return ch34x_control_in ( p_cdc, CH34X_REQ_READ_REG, reg, 0, buffer, buffersize, complete_cb, user_data ); +//} + +static bool ch34x_write_reg_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, + tuh_xfer_cb_t complete_cb, uintptr_t user_data) { + uint16_t const div_ps = ch34x_get_divisor_prescaler(baudrate); + TU_VERIFY(div_ps); + TU_ASSERT(ch34x_write_reg(p_cdc, CH34X_REG16_DIVISOR_PRESCALER, div_ps, + complete_cb, user_data)); + return true; +} + +//------------- Driver API -------------// + +// internal control complete to update state such as line state, encoding +static void ch34x_control_complete(tuh_xfer_t* xfer) { + // CH34x only has 1 interface and use wIndex as payload and not for bInterfaceNumber + process_internal_control_complete(xfer, 0); +} + +static bool ch34x_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, + tuh_xfer_cb_t complete_cb, uintptr_t user_data) { + p_cdc->requested_line_coding.stop_bits = stop_bits; + p_cdc->requested_line_coding.parity = parity; + p_cdc->requested_line_coding.data_bits = data_bits; + + uint8_t const lcr = ch34x_get_lcr(stop_bits, parity, data_bits); + TU_VERIFY(lcr); + TU_ASSERT (ch34x_control_out(p_cdc, CH34X_REQ_WRITE_REG, CH32X_REG16_LCR2_LCR, lcr, + complete_cb ? ch34x_control_complete : NULL, user_data)); + return true; +} + +static bool ch34x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, + tuh_xfer_cb_t complete_cb, uintptr_t user_data) { + p_cdc->requested_line_coding.bit_rate = baudrate; + p_cdc->user_control_cb = complete_cb; + TU_ASSERT(ch34x_write_reg_baudrate(p_cdc, baudrate, + complete_cb ? ch34x_control_complete : NULL, user_data)); + return true; +} + +static void ch34x_set_line_coding_stage1_complete(tuh_xfer_t* xfer) { + // CH34x only has 1 interface and use wIndex as payload and not for bInterfaceNumber + uint8_t const itf_num = 0; + uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num); + cdch_interface_t* p_cdc = get_itf(idx); + TU_ASSERT(p_cdc, ); + + if (xfer->result == XFER_RESULT_SUCCESS) { + // stage 1 success, continue to stage 2 + p_cdc->line_coding.bit_rate = p_cdc->requested_line_coding.bit_rate; + TU_ASSERT(ch34x_set_data_format(p_cdc, p_cdc->requested_line_coding.stop_bits, p_cdc->requested_line_coding.parity, + p_cdc->requested_line_coding.data_bits, ch34x_control_complete, xfer->user_data), ); + } else { + // stage 1 failed, notify user + xfer->complete_cb = p_cdc->user_control_cb; + if (xfer->complete_cb) { + xfer->complete_cb(xfer); + } + } +} + +// 2 stages: set baudrate (stage1) + set data format (stage2) +static bool ch34x_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, + tuh_xfer_cb_t complete_cb, uintptr_t user_data) { + p_cdc->requested_line_coding = *line_coding; + p_cdc->user_control_cb = complete_cb; + + if (complete_cb) { + // stage 1 set baudrate + TU_ASSERT(ch34x_write_reg_baudrate(p_cdc, line_coding->bit_rate, + ch34x_set_line_coding_stage1_complete, user_data)); + } else { + // sync call + xfer_result_t result; + + // stage 1 set baudrate + TU_ASSERT(ch34x_write_reg_baudrate(p_cdc, line_coding->bit_rate, NULL, (uintptr_t) &result)); + TU_VERIFY(result == XFER_RESULT_SUCCESS); + p_cdc->line_coding.bit_rate = line_coding->bit_rate; + + // stage 2 set data format + TU_ASSERT(ch34x_set_data_format(p_cdc, line_coding->stop_bits, line_coding->parity, line_coding->data_bits, + NULL, (uintptr_t) &result)); + TU_VERIFY(result == XFER_RESULT_SUCCESS); + p_cdc->line_coding.stop_bits = line_coding->stop_bits; + p_cdc->line_coding.parity = line_coding->parity; + p_cdc->line_coding.data_bits = line_coding->data_bits; + + // update transfer result, user_data is expected to point to xfer_result_t + if (user_data) { + *((xfer_result_t*) user_data) = result; + } + } + + return true; +} + +static bool ch34x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, + tuh_xfer_cb_t complete_cb, uintptr_t user_data) { + uint8_t control = 0; + if (line_state & CDC_CONTROL_LINE_STATE_RTS) { + control |= CH34X_BIT_RTS; + } + if (line_state & CDC_CONTROL_LINE_STATE_DTR) { + control |= CH34X_BIT_DTR; + } + + // CH34x signals are inverted + control = ~control; + + p_cdc->user_control_cb = complete_cb; + TU_ASSERT (ch34x_control_out(p_cdc, CH34X_REQ_MODEM_CTRL, control, 0, + complete_cb ? ch34x_control_complete : NULL, user_data)); + return true; +} + +//------------- Enumeration -------------// +enum { + CONFIG_CH34X_READ_VERSION = 0, + CONFIG_CH34X_SERIAL_INIT, + CONFIG_CH34X_SPECIAL_REG_WRITE, + CONFIG_CH34X_FLOW_CONTROL, + CONFIG_CH34X_MODEM_CONTROL, + CONFIG_CH34X_COMPLETE +}; + +static bool ch34x_open(uint8_t daddr, tusb_desc_interface_t const* itf_desc, uint16_t max_len) { + // CH34x Interface includes 1 vendor interface + 2 bulk + 1 interrupt endpoints + TU_VERIFY (itf_desc->bNumEndpoints == 3); + TU_VERIFY (sizeof(tusb_desc_interface_t) + 3 * sizeof(tusb_desc_endpoint_t) <= max_len); + + cdch_interface_t* p_cdc = make_new_itf(daddr, itf_desc); + TU_VERIFY (p_cdc); + + TU_LOG_DRV ("CH34x opened\r\n"); + p_cdc->serial_drid = SERIAL_DRIVER_CH34X; + + tusb_desc_endpoint_t const* desc_ep = (tusb_desc_endpoint_t const*) tu_desc_next(itf_desc); + + // data endpoints expected to be in pairs + TU_ASSERT(open_ep_stream_pair(p_cdc, desc_ep)); + desc_ep += 2; + + // Interrupt endpoint: not used for now + TU_ASSERT(TUSB_DESC_ENDPOINT == tu_desc_type(desc_ep) && + TUSB_XFER_INTERRUPT == desc_ep->bmAttributes.xfer); + TU_ASSERT(tuh_edpt_open(daddr, desc_ep)); + p_cdc->ep_notif = desc_ep->bEndpointAddress; + + return true; +} + +static void ch34x_process_config(tuh_xfer_t* xfer) { + // CH34x only has 1 interface and use wIndex as payload and not for bInterfaceNumber + uint8_t const itf_num = 0; + uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num); + cdch_interface_t* p_cdc = get_itf(idx); + uintptr_t const state = xfer->user_data; + uint8_t buffer[2]; // TODO remove + TU_ASSERT (p_cdc,); + TU_ASSERT (xfer->result == XFER_RESULT_SUCCESS,); + + switch (state) { + case CONFIG_CH34X_READ_VERSION: + TU_LOG_DRV("[%u] CDCh CH34x attempt to read Chip Version\r\n", p_cdc->daddr); + TU_ASSERT (ch34x_control_in(p_cdc, CH34X_REQ_READ_VERSION, 0, 0, buffer, 2, ch34x_process_config, CONFIG_CH34X_SERIAL_INIT),); + break; + + case CONFIG_CH34X_SERIAL_INIT: { + // handle version read data, set CH34x line coding (incl. baudrate) + uint8_t const version = xfer->buffer[0]; + TU_LOG_DRV("[%u] CDCh CH34x Chip Version = %02x\r\n", p_cdc->daddr, version); + // only versions >= 0x30 are tested, below 0x30 seems having other programming, see drivers from WCH vendor, Linux kernel and FreeBSD + TU_ASSERT (version >= 0x30,); + // init CH34x with line coding + cdc_line_coding_t const line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X; + uint16_t const div_ps = ch34x_get_divisor_prescaler(line_coding.bit_rate); + TU_ASSERT(div_ps, ); + uint8_t const lcr = ch34x_get_lcr(line_coding.stop_bits, line_coding.parity, line_coding.data_bits); + TU_ASSERT(lcr, ); + TU_ASSERT (ch34x_control_out(p_cdc, CH34X_REQ_SERIAL_INIT, tu_u16(lcr, 0x9c), div_ps, + ch34x_process_config, CONFIG_CH34X_SPECIAL_REG_WRITE),); + break; + } + + case CONFIG_CH34X_SPECIAL_REG_WRITE: + // overtake line coding and do special reg write, purpose unknown, overtaken from WCH driver + p_cdc->line_coding = ((cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X); + TU_ASSERT (ch34x_write_reg(p_cdc, TU_U16(CH341_REG_0x0F, CH341_REG_0x2C), 0x0007, ch34x_process_config, CONFIG_CH34X_FLOW_CONTROL),); + break; + + case CONFIG_CH34X_FLOW_CONTROL: + // no hardware flow control + TU_ASSERT (ch34x_write_reg(p_cdc, TU_U16(CH341_REG_0x27, CH341_REG_0x27), 0x0000, ch34x_process_config, CONFIG_CH34X_MODEM_CONTROL),); + break; + + case CONFIG_CH34X_MODEM_CONTROL: + // !always! set modem controls RTS/DTR (CH34x has no reset state after CH34X_REQ_SERIAL_INIT) + TU_ASSERT (ch34x_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, ch34x_process_config, CONFIG_CH34X_COMPLETE),); + break; + + case CONFIG_CH34X_COMPLETE: + set_config_complete(p_cdc, idx, itf_num); + break; + + default: + TU_ASSERT (false,); + break; + } +} + +//------------- CH34x helper -------------// + +// calculate divisor and prescaler for baudrate, return it as 16-bit combined value +static uint16_t ch34x_get_divisor_prescaler(uint32_t baval) { + uint8_t a; + uint8_t b; + uint32_t c; + + TU_VERIFY(baval != 0 && baval <= 2000000, 0); + switch (baval) { + case 921600: + a = 0xf3; + b = 7; + break; + + case 307200: + a = 0xd9; + b = 7; + break; + + default: + if (baval > 6000000 / 255) { + b = 3; + c = 6000000; + } else if (baval > 750000 / 255) { + b = 2; + c = 750000; + } else if (baval > 93750 / 255) { + b = 1; + c = 93750; + } else { + b = 0; + c = 11719; + } + a = (uint8_t) (c / baval); + if (a == 0 || a == 0xFF) { + return 0; + } + if ((c / a - baval) > (baval - c / (a + 1))) { + a++; + } + a = (uint8_t) (256 - a); + break; + } + + // reg divisor = a, reg prescaler = b + // According to linux code we need to set bit 7 of UCHCOM_REG_BPS_PRE, + // otherwise the chip will buffer data. + return (uint16_t) ((uint16_t)a << 8 | 0x80 | b); +} + +// calculate lcr value from data coding +static uint8_t ch34x_get_lcr(uint8_t stop_bits, uint8_t parity, uint8_t data_bits) { + uint8_t lcr = CH34X_LCR_ENABLE_RX | CH34X_LCR_ENABLE_TX; + TU_VERIFY(data_bits >= 5 && data_bits <= 8, 0); + lcr |= (uint8_t) (data_bits - 5); + + switch(parity) { + case CDC_LINE_CODING_PARITY_NONE: + break; + + case CDC_LINE_CODING_PARITY_ODD: + lcr |= CH34X_LCR_ENABLE_PAR; + break; + + case CDC_LINE_CODING_PARITY_EVEN: + lcr |= CH34X_LCR_ENABLE_PAR | CH34X_LCR_PAR_EVEN; + break; + + case CDC_LINE_CODING_PARITY_MARK: + lcr |= CH34X_LCR_ENABLE_PAR | CH34X_LCR_MARK_SPACE; + break; + + case CDC_LINE_CODING_PARITY_SPACE: + lcr |= CH34X_LCR_ENABLE_PAR | CH34X_LCR_MARK_SPACE | CH34X_LCR_PAR_EVEN; + break; + + default: break; + } + + // 1.5 stop bits not supported + TU_VERIFY(stop_bits != CDC_LINE_CODING_STOP_BITS_1_5, 0); + if (stop_bits == CDC_LINE_CODING_STOP_BITS_2) { + lcr |= CH34X_LCR_STOP_BITS_2; + } + + return lcr; +} + + +#endif // CFG_TUH_CDC_CH34X + #endif diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index 9e5edd94e..d512a23a5 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -148,8 +148,11 @@ bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_c // Request to set baudrate bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data); -// Request to Set Line Coding (ACM only) -// Should only use if you don't work with serial devices such as FTDI/CP210x +// Request to set data format +bool tuh_cdc_set_data_format(uint8_t idx, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, tuh_xfer_cb_t complete_cb, uintptr_t user_data); + +// Request to Set Line Coding = baudrate + data format +// Note: only implemented by ACM and CH34x, not supported by FTDI and CP210x yet bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data); // Request to Get Line Coding (ACM only) @@ -159,15 +162,13 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, // Connect by set both DTR, RTS TU_ATTR_ALWAYS_INLINE static inline -bool tuh_cdc_connect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data) -{ +bool tuh_cdc_connect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { return tuh_cdc_set_control_line_state(idx, CDC_CONTROL_LINE_STATE_DTR | CDC_CONTROL_LINE_STATE_RTS, complete_cb, user_data); } // Disconnect by clear both DTR, RTS TU_ATTR_ALWAYS_INLINE static inline -bool tuh_cdc_disconnect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data) -{ +bool tuh_cdc_disconnect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data) { return tuh_cdc_set_control_line_state(idx, 0x00, complete_cb, user_data); } diff --git a/src/class/cdc/serial/ch34x.h b/src/class/cdc/serial/ch34x.h new file mode 100644 index 000000000..c18066f57 --- /dev/null +++ b/src/class/cdc/serial/ch34x.h @@ -0,0 +1,84 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Heiko Kuester + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _CH34X_H_ +#define _CH34X_H_ + +// There is no official documentation for the CH34x (CH340, CH341) chips. Reference can be found +// - https://github.com/WCHSoftGroup/ch341ser_linux +// - https://github.com/torvalds/linux/blob/master/drivers/usb/serial/ch341.c +// - https://github.com/freebsd/freebsd-src/blob/main/sys/dev/usb/serial/uchcom.c + +// set line_coding @ enumeration +#ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM +#define CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X CFG_TUH_CDC_LINE_CODING_ON_ENUM +#else // this default is necessary to work properly +#define CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X { 9600, CDC_LINE_CONDING_STOP_BITS_1, CDC_LINE_CODING_PARITY_NONE, 8 } +#endif + +// USB requests +#define CH34X_REQ_READ_VERSION 0x5F // dec 95 +#define CH34X_REQ_WRITE_REG 0x9A // dec 154 +#define CH34X_REQ_READ_REG 0x95 // dec 149 +#define CH34X_REQ_SERIAL_INIT 0xA1 // dec 161 +#define CH34X_REQ_MODEM_CTRL 0xA4 // dev 164 + +// registers +#define CH34X_REG_BREAK 0x05 +#define CH34X_REG_PRESCALER 0x12 +#define CH34X_REG_DIVISOR 0x13 +#define CH34X_REG_LCR 0x18 +#define CH34X_REG_LCR2 0x25 +#define CH34X_REG_MCR_MSR 0x06 +#define CH34X_REG_MCR_MSR2 0x07 +#define CH34X_NBREAK_BITS 0x01 + +#define CH341_REG_0x0F 0x0F // undocumented register +#define CH341_REG_0x2C 0x2C // undocumented register +#define CH341_REG_0x27 0x27 // hardware flow control (cts/rts) + +#define CH34X_REG16_DIVISOR_PRESCALER TU_U16(CH34X_REG_DIVISOR, CH34X_REG_PRESCALER) +#define CH32X_REG16_LCR2_LCR TU_U16(CH34X_REG_LCR2, CH34X_REG_LCR) + +// modem control bits +#define CH34X_BIT_RTS ( 1 << 6 ) +#define CH34X_BIT_DTR ( 1 << 5 ) + +// line control bits +#define CH34X_LCR_ENABLE_RX 0x80 +#define CH34X_LCR_ENABLE_TX 0x40 +#define CH34X_LCR_MARK_SPACE 0x20 +#define CH34X_LCR_PAR_EVEN 0x10 +#define CH34X_LCR_ENABLE_PAR 0x08 +#define CH34X_LCR_PAR_MASK 0x38 // all parity bits +#define CH34X_LCR_STOP_BITS_2 0x04 +#define CH34X_LCR_CS8 0x03 +#define CH34X_LCR_CS7 0x02 +#define CH34X_LCR_CS6 0x01 +#define CH34X_LCR_CS5 0x00 +#define CH34X_LCR_CS_MASK 0x03 // all CSx bits + +#endif /* _CH34X_H_ */ diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index db52b503f..709fa3dd8 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -50,6 +50,7 @@ typedef struct uint8_t itf_num; uint8_t ep_in; uint8_t ep_out; + bool mounted; // Enumeration is complete uint8_t itf_protocol; // None, Keyboard, Mouse uint8_t protocol_mode; // Boot (0) or Report protocol (1) @@ -139,7 +140,8 @@ uint8_t tuh_hid_itf_get_total_count(void) bool tuh_hid_mounted(uint8_t daddr, uint8_t idx) { hidh_interface_t* p_hid = get_hid_itf(daddr, idx); - return p_hid != NULL; + TU_VERIFY(p_hid); + return p_hid->mounted; } bool tuh_hid_itf_get_info(uint8_t daddr, uint8_t idx, tuh_itf_info_t* info) @@ -463,6 +465,7 @@ void hidh_close(uint8_t daddr) TU_LOG_DRV(" HIDh close addr = %u index = %u\r\n", daddr, i); if(tuh_hid_umount_cb) tuh_hid_umount_cb(daddr, i); p_hid->daddr = 0; + p_hid->mounted = false; } } } @@ -632,6 +635,7 @@ static void config_driver_mount_complete(uint8_t daddr, uint8_t idx, uint8_t con { hidh_interface_t* p_hid = get_hid_itf(daddr, idx); TU_VERIFY(p_hid, ); + p_hid->mounted = true; // enumeration is complete if (tuh_hid_mount_cb) tuh_hid_mount_cb(daddr, idx, desc_report, desc_len); diff --git a/src/class/vendor/vendor_device.c b/src/class/vendor/vendor_device.c index 389a29696..a68cb2156 100644 --- a/src/class/vendor/vendor_device.c +++ b/src/class/vendor/vendor_device.c @@ -49,10 +49,8 @@ typedef struct uint8_t rx_ff_buf[CFG_TUD_VENDOR_RX_BUFSIZE]; uint8_t tx_ff_buf[CFG_TUD_VENDOR_TX_BUFSIZE]; -#if CFG_FIFO_MUTEX - osal_mutex_def_t rx_ff_mutex; - osal_mutex_def_t tx_ff_mutex; -#endif + OSAL_MUTEX_DEF(rx_ff_mutex); + OSAL_MUTEX_DEF(tx_ff_mutex); // Endpoint Transfer buffer CFG_TUSB_MEM_ALIGN uint8_t epout_buf[CFG_TUD_VENDOR_EPSIZE]; @@ -183,10 +181,8 @@ void vendord_init(void) tu_fifo_config(&p_itf->rx_ff, p_itf->rx_ff_buf, CFG_TUD_VENDOR_RX_BUFSIZE, 1, false); tu_fifo_config(&p_itf->tx_ff, p_itf->tx_ff_buf, CFG_TUD_VENDOR_TX_BUFSIZE, 1, false); -#if CFG_FIFO_MUTEX tu_fifo_config_mutex(&p_itf->rx_ff, NULL, osal_mutex_create(&p_itf->rx_ff_mutex)); tu_fifo_config_mutex(&p_itf->tx_ff, osal_mutex_create(&p_itf->tx_ff_mutex), NULL); -#endif } } diff --git a/src/class/video/video.h b/src/class/video/video.h index d9880c291..6319c6536 100644 --- a/src/class/video/video.h +++ b/src/class/video/video.h @@ -29,6 +29,10 @@ #include "common/tusb_common.h" +enum { + VIDEO_BCD_1_50 = 0x0150, +}; + // Table 3-19 Color Matching Descriptor typedef enum { VIDEO_COLOR_PRIMARIES_UNDEFINED = 0x00, @@ -198,55 +202,98 @@ typedef enum { } video_terminal_type_t; //--------------------------------------------------------------------+ -// Descriptors +// Video Control (VC) Descriptors //--------------------------------------------------------------------+ /* 2.3.4.2 */ +#define tusb_desc_video_control_header_nitf_t(_nitf) \ + struct TU_ATTR_PACKED { \ + uint8_t bLength; \ + uint8_t bDescriptorType; \ + uint8_t bDescriptorSubType; \ + uint16_t bcdUVC; \ + uint16_t wTotalLength; \ + uint32_t dwClockFrequency; /* deprecated */ \ + uint8_t bInCollection; \ + uint8_t baInterfaceNr[_nitf]; \ + } + +typedef tusb_desc_video_control_header_nitf_t() tusb_desc_video_control_header_t; +typedef tusb_desc_video_control_header_nitf_t(1) tusb_desc_video_control_header_1itf_t; +typedef tusb_desc_video_control_header_nitf_t(2) tusb_desc_video_control_header_2itf_t; +typedef tusb_desc_video_control_header_nitf_t(3) tusb_desc_video_control_header_3itf_t; +typedef tusb_desc_video_control_header_nitf_t(4) tusb_desc_video_control_header_4itf_t; + typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; uint8_t bDescriptorSubType; - uint16_t bcdUVC; - uint16_t wTotalLength; - uint32_t dwClockFrequency; - uint8_t bInCollection; - uint8_t baInterfaceNr[]; -} tusb_desc_cs_video_ctl_itf_hdr_t; + uint8_t bTerminalID; + uint16_t wTerminalType; + uint8_t bAssocTerminal; + uint8_t iTerminal; +} tusb_desc_video_control_input_terminal_t; + +TU_VERIFY_STATIC(sizeof(tusb_desc_video_control_input_terminal_t) == 8, "size is not correct"); -/* 2.4.3.3 */ typedef struct TU_ATTR_PACKED { - uint8_t bHeaderLength; - union { - uint8_t bmHeaderInfo; - struct { - uint8_t FrameID: 1; - uint8_t EndOfFrame: 1; - uint8_t PresentationTime: 1; - uint8_t SourceClockReference: 1; - uint8_t PayloadSpecific: 1; - uint8_t StillImage: 1; - uint8_t Error: 1; - uint8_t EndOfHeader: 1; - }; - }; -} tusb_video_payload_header_t; + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bDescriptorSubType; + uint8_t bTerminalID; + uint16_t wTerminalType; + uint8_t bAssocTerminal; + uint8_t bSourceID; + uint8_t iTerminal; +} tusb_desc_video_control_output_terminal_t; + +TU_VERIFY_STATIC(sizeof(tusb_desc_video_control_output_terminal_t) == 9, "size is not correct"); -/* 3.9.2.1 */ typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; uint8_t bDescriptorSubType; - uint8_t bNumFormats; - uint16_t wTotalLength; - uint8_t bEndpointAddress; - uint8_t bmInfo; - uint8_t bTerminalLink; - uint8_t bStillCaptureMethod; - uint8_t bTriggerSupport; - uint8_t bTriggerUsage; + uint8_t bTerminalID; + uint16_t wTerminalType; + uint8_t bAssocTerminal; + uint8_t iTerminal; + + uint16_t wObjectiveFocalLengthMin; + uint16_t wObjectiveFocalLengthMax; + uint16_t wOcularFocalLength; uint8_t bControlSize; - uint8_t bmaControls[]; -} tusb_desc_cs_video_stm_itf_in_hdr_t; + uint8_t bmControls[3]; +} tusb_desc_video_control_camera_terminal_t; + +TU_VERIFY_STATIC(sizeof(tusb_desc_video_control_camera_terminal_t) == 18, "size is not correct"); + +//--------------------------------------------------------------------+ +// Video Streaming (VS) Descriptors +//--------------------------------------------------------------------+ + +/* 3.9.2.1 */ +#define tusb_desc_video_streaming_input_header_nbyte_t(_nb) \ + struct TU_ATTR_PACKED { \ + uint8_t bLength; \ + uint8_t bDescriptorType; \ + uint8_t bDescriptorSubType; \ + uint8_t bNumFormats; /* Number of video payload Format descriptors for this interface */ \ + uint16_t wTotalLength; \ + uint8_t bEndpointAddress; \ + uint8_t bmInfo; /* Bit 0: dynamic format change supported */ \ + uint8_t bTerminalLink; \ + uint8_t bStillCaptureMethod; \ + uint8_t bTriggerSupport; /* Hardware trigger supported */ \ + uint8_t bTriggerUsage; \ + uint8_t bControlSize; /* sizeof of each control item */ \ + uint8_t bmaControls[_nb]; \ + } + +typedef tusb_desc_video_streaming_input_header_nbyte_t() tusb_desc_video_streaming_input_header_t; +typedef tusb_desc_video_streaming_input_header_nbyte_t(1) tusb_desc_video_streaming_input_header_1byte_t; +typedef tusb_desc_video_streaming_input_header_nbyte_t(2) tusb_desc_video_streaming_input_header_2byte_t; +typedef tusb_desc_video_streaming_input_header_nbyte_t(3) tusb_desc_video_streaming_input_header_3byte_t; +typedef tusb_desc_video_streaming_input_header_nbyte_t(4) tusb_desc_video_streaming_input_header_4byte_t; /* 3.9.2.2 */ typedef struct TU_ATTR_PACKED { @@ -259,7 +306,7 @@ typedef struct TU_ATTR_PACKED { uint8_t bTerminalLink; uint8_t bControlSize; uint8_t bmaControls[]; -} tusb_desc_cs_video_stm_itf_out_hdr_t; +} tusb_desc_video_streaming_output_header_t; typedef struct TU_ATTR_PACKED { uint8_t bLength; @@ -285,14 +332,33 @@ typedef struct TU_ATTR_PACKED { uint8_t bmaControls[]; } output; }; -} tusb_desc_cs_video_stm_itf_hdr_t; +} tusb_desc_video_streaming_inout_header_t; + +// 3.9.2.6 Color Matching Descriptor +typedef struct TU_ATTR_PACKED { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bDescriptorSubType; + uint8_t bColorPrimaries; + uint8_t bTransferCharacteristics; + uint8_t bMatrixCoefficients; +} tusb_desc_video_streaming_color_matching_t; +TU_VERIFY_STATIC(sizeof(tusb_desc_video_streaming_color_matching_t) == 6, "size is not correct"); + +//--------------------------------------------------------------------+ +// Format and Frame Descriptor +// Note: bFormatIndex & bFrameIndex are 1-based index +//--------------------------------------------------------------------+ + +//------------- Uncompressed -------------// +// Uncompressed payload specs: 3.1.1 format descriptor typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; uint8_t bDescriptorSubType; uint8_t bFormatIndex; - uint8_t bNumFrameDescriptors; + uint8_t bNumFrameDescriptors; // Number of frame descriptors for this format uint8_t guidFormat[16]; uint8_t bBitsPerPixel; uint8_t bDefaultFrameIndex; @@ -300,22 +366,65 @@ typedef struct TU_ATTR_PACKED { uint8_t bAspectRatioY; uint8_t bmInterlaceFlags; uint8_t bCopyProtect; -} tusb_desc_cs_video_fmt_uncompressed_t; - +} tusb_desc_video_format_uncompressed_t; + +// Uncompressed payload specs: 3.1.2 frame descriptor +#define tusb_desc_video_frame_uncompressed_nint_t(_nint) \ + struct TU_ATTR_PACKED { \ + uint8_t bLength; \ + uint8_t bDescriptorType; \ + uint8_t bDescriptorSubType; \ + uint8_t bFrameIndex; \ + uint8_t bmCapabilities; \ + uint16_t wWidth; \ + uint16_t wHeight; \ + uint32_t dwMinBitRate; \ + uint32_t dwMaxBitRate; \ + uint32_t dwMaxVideoFrameBufferSize; /* deprecated in 1.5 */ \ + uint32_t dwDefaultFrameInterval; \ + uint8_t bFrameIntervalType; \ + uint32_t dwFrameInterval[_nint]; \ + } + +typedef tusb_desc_video_frame_uncompressed_nint_t() tusb_desc_video_frame_uncompressed_t; +typedef tusb_desc_video_frame_uncompressed_nint_t(1) tusb_desc_video_frame_uncompressed_1int_t; +typedef tusb_desc_video_frame_uncompressed_nint_t(2) tusb_desc_video_frame_uncompressed_2int_t; +typedef tusb_desc_video_frame_uncompressed_nint_t(3) tusb_desc_video_frame_uncompressed_3int_t; +typedef tusb_desc_video_frame_uncompressed_nint_t(4) tusb_desc_video_frame_uncompressed_4int_t; + +// continuous = 3 intervals: min, max, step +typedef tusb_desc_video_frame_uncompressed_3int_t tusb_desc_video_frame_uncompressed_continuous_t; + +TU_VERIFY_STATIC(sizeof(tusb_desc_video_frame_uncompressed_continuous_t) == 38, "size is not correct"); + +//------------- MJPEG -------------// +// MJPEG payload specs: 3.1.1 format descriptor typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; uint8_t bDescriptorSubType; uint8_t bFormatIndex; uint8_t bNumFrameDescriptors; - uint8_t bmFlags; + uint8_t bmFlags; // Bit 0: fixed size samples (1 = yes) uint8_t bDefaultFrameIndex; uint8_t bAspectRatioX; uint8_t bAspectRatioY; uint8_t bmInterlaceFlags; uint8_t bCopyProtect; -} tusb_desc_cs_video_fmt_mjpeg_t; +} tusb_desc_video_format_mjpeg_t; +// MJPEG payload specs: 3.1.2 frame descriptor (same as uncompressed) +typedef tusb_desc_video_frame_uncompressed_t tusb_desc_video_frame_mjpeg_t; +typedef tusb_desc_video_frame_uncompressed_1int_t tusb_desc_video_frame_mjpeg_1int_t; +typedef tusb_desc_video_frame_uncompressed_2int_t tusb_desc_video_frame_mjpeg_2int_t; +typedef tusb_desc_video_frame_uncompressed_3int_t tusb_desc_video_frame_mjpeg_3int_t; +typedef tusb_desc_video_frame_uncompressed_4int_t tusb_desc_video_frame_mjpeg_4int_t; + +// continuous = 3 intervals: min, max, step +typedef tusb_desc_video_frame_mjpeg_3int_t tusb_desc_video_frame_mjpeg_continuous_t; + +//------------- DV -------------// +// DV payload specs: 3.1.1 typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; @@ -323,8 +432,9 @@ typedef struct TU_ATTR_PACKED { uint8_t bFormatIndex; uint32_t dwMaxVideoFrameBufferSize; /* deprecated */ uint8_t bFormatType; -} tusb_desc_cs_video_fmt_dv_t; +} tusb_desc_video_format_dv_t; +// Frame Based payload specs: 3.1.1 typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; @@ -339,25 +449,7 @@ typedef struct TU_ATTR_PACKED { uint8_t bmInterlaceFlags; uint8_t bCopyProtect; uint8_t bVaribaleSize; -} tusb_desc_cs_video_fmt_frame_based_t; - -typedef struct TU_ATTR_PACKED { - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDescriptorSubType; - uint8_t bFrameIndex; - uint8_t bmCapabilities; - uint16_t wWidth; - uint16_t wHeight; - uint32_t dwMinBitRate; - uint32_t dwMaxBitRate; - uint32_t dwMaxVideoFrameBufferSize; /* deprecated */ - uint32_t dwDefaultFrameInterval; - uint8_t bFrameIntervalType; - uint32_t dwFrameInterval[]; -} tusb_desc_cs_video_frm_uncompressed_t; - -typedef tusb_desc_cs_video_frm_uncompressed_t tusb_desc_cs_video_frm_mjpeg_t; +} tusb_desc_video_format_framebased_t; typedef struct TU_ATTR_PACKED { uint8_t bLength; @@ -373,12 +465,30 @@ typedef struct TU_ATTR_PACKED { uint8_t bFrameIntervalType; uint32_t dwBytesPerLine; uint32_t dwFrameInterval[]; -} tusb_desc_cs_video_frm_frame_based_t; +} tusb_desc_video_frame_framebased_t; //--------------------------------------------------------------------+ // Requests //--------------------------------------------------------------------+ +/* 2.4.3.3 */ +typedef struct TU_ATTR_PACKED { + uint8_t bHeaderLength; + union { + uint8_t bmHeaderInfo; + struct { + uint8_t FrameID: 1; + uint8_t EndOfFrame: 1; + uint8_t PresentationTime: 1; + uint8_t SourceClockReference: 1; + uint8_t PayloadSpecific: 1; + uint8_t StillImage: 1; + uint8_t Error: 1; + uint8_t EndOfHeader: 1; + }; + }; +} tusb_video_payload_header_t; + /* 4.3.1.1 */ typedef struct TU_ATTR_PACKED { union { @@ -537,7 +647,7 @@ TU_VERIFY_STATIC( sizeof(video_probe_and_commit_control_t) == 48, "size is not c /* Motion-JPEG 3.1.1 Table 3-2 and 3-4 */ #define TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_DISC(_frmidx, _cap, _width, _height, _minbr, _maxbr, _maxfrmbufsz, _frminterval, ...) \ TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_DISC_LEN + (TU_ARGS_NUM(__VA_ARGS__)) * 4, \ - TUSB_DESC_CS_INTERFACE, VIDEO_CS_VS_INTERFACE_FRAME_MJPEG, \ + TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FRAME_MJPEG, \ _frmidx, _cap, U16_TO_U8S_LE(_width), U16_TO_U8S_LE(_height), U32_TO_U8S_LE(_minbr), U32_TO_U8S_LE(_maxbr), \ U32_TO_U8S_LE(_maxfrmbufsz), U32_TO_U8S_LE(_frminterval), (TU_ARGS_NUM(__VA_ARGS__)), __VA_ARGS__ diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index 3b29454a3..1affd615e 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -50,17 +50,17 @@ typedef struct { tusb_desc_interface_t std; - tusb_desc_cs_video_ctl_itf_hdr_t ctl; + tusb_desc_video_control_header_t ctl; } tusb_desc_vc_itf_t; typedef struct { tusb_desc_interface_t std; - tusb_desc_cs_video_stm_itf_hdr_t stm; + tusb_desc_video_streaming_inout_header_t stm; } tusb_desc_vs_itf_t; typedef union { - tusb_desc_cs_video_ctl_itf_hdr_t ctl; - tusb_desc_cs_video_stm_itf_hdr_t stm; + tusb_desc_video_control_header_t ctl; + tusb_desc_video_streaming_inout_header_t stm; } tusb_desc_video_itf_hdr_t; typedef struct TU_ATTR_PACKED { @@ -78,9 +78,9 @@ typedef union { uint8_t bFormatIndex; uint8_t bNumFrameDescriptors; }; - tusb_desc_cs_video_fmt_uncompressed_t uncompressed; - tusb_desc_cs_video_fmt_mjpeg_t mjpeg; - tusb_desc_cs_video_fmt_frame_based_t frame_based; + tusb_desc_video_format_uncompressed_t uncompressed; + tusb_desc_video_format_mjpeg_t mjpeg; + tusb_desc_video_format_framebased_t frame_based; } tusb_desc_cs_video_fmt_t; typedef union { @@ -93,9 +93,9 @@ typedef union { uint16_t wWidth; uint16_t wHeight; }; - tusb_desc_cs_video_frm_uncompressed_t uncompressed; - tusb_desc_cs_video_frm_mjpeg_t mjpeg; - tusb_desc_cs_video_frm_frame_based_t frame_based; + tusb_desc_video_frame_uncompressed_t uncompressed; + tusb_desc_video_frame_mjpeg_t mjpeg; + tusb_desc_video_frame_framebased_t frame_based; } tusb_desc_cs_video_frm_t; /* video streaming interface */ @@ -434,8 +434,9 @@ static bool _update_streaming_parameters(videod_streaming_interface_t const *stm uint_fast32_t interval_ms = interval / 10000; TU_ASSERT(interval_ms); uint_fast32_t payload_size = (frame_size + interval_ms - 1) / interval_ms + 2; - if (CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE < payload_size) + if (CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE < payload_size) { payload_size = CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE; + } param->dwMaxPayloadTransferSize = payload_size; return true; } @@ -577,8 +578,9 @@ static bool _negotiate_streaming_parameters(videod_streaming_interface_t const * } else { payload_size = (frame_size + interval_ms - 1) / interval_ms + 2; } - if (CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE < payload_size) + if (CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE < payload_size) { payload_size = CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE; + } param->dwMaxPayloadTransferSize = payload_size; } return true; diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index caeb5f2ef..1f08ce4ed 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -37,6 +37,7 @@ #define TU_ARRAY_SIZE(_arr) ( sizeof(_arr) / sizeof(_arr[0]) ) #define TU_MIN(_x, _y) ( ( (_x) < (_y) ) ? (_x) : (_y) ) #define TU_MAX(_x, _y) ( ( (_x) > (_y) ) ? (_x) : (_y) ) +#define TU_DIV_CEIL(n, d) (((n) + (d) - 1) / (d)) #define TU_U16(_high, _low) ((uint16_t) (((_high) << 8) | (_low))) #define TU_U16_HIGH(_u16) ((uint8_t) (((_u16) >> 8) & 0x00ff)) diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index fab680989..2c5dce723 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -44,43 +44,38 @@ *------------------------------------------------------------------*/ /// defined base on EHCI specs value for Endpoint Speed -typedef enum -{ +typedef enum { TUSB_SPEED_FULL = 0, TUSB_SPEED_LOW = 1, TUSB_SPEED_HIGH = 2, TUSB_SPEED_INVALID = 0xff, -}tusb_speed_t; +} tusb_speed_t; /// defined base on USB Specs Endpoint's bmAttributes -typedef enum -{ +typedef enum { TUSB_XFER_CONTROL = 0 , TUSB_XFER_ISOCHRONOUS , TUSB_XFER_BULK , TUSB_XFER_INTERRUPT -}tusb_xfer_type_t; +} tusb_xfer_type_t; -typedef enum -{ +typedef enum { TUSB_DIR_OUT = 0, TUSB_DIR_IN = 1, TUSB_DIR_IN_MASK = 0x80 -}tusb_dir_t; +} tusb_dir_t; -enum -{ +enum { TUSB_EPSIZE_BULK_FS = 64, - TUSB_EPSIZE_BULK_HS= 512, + TUSB_EPSIZE_BULK_HS = 512, TUSB_EPSIZE_ISO_FS_MAX = 1023, TUSB_EPSIZE_ISO_HS_MAX = 1024, }; -/// Isochronous End Point Attributes -typedef enum -{ +/// Isochronous Endpoint Attributes +typedef enum { TUSB_ISO_EP_ATT_NO_SYNC = 0x00, TUSB_ISO_EP_ATT_ASYNCHRONOUS = 0x04, TUSB_ISO_EP_ATT_ADAPTIVE = 0x08, @@ -88,11 +83,10 @@ typedef enum TUSB_ISO_EP_ATT_DATA = 0x00, ///< Data End Point TUSB_ISO_EP_ATT_EXPLICIT_FB = 0x10, ///< Feedback End Point TUSB_ISO_EP_ATT_IMPLICIT_FB = 0x20, ///< Data endpoint that also serves as an implicit feedback -}tusb_iso_ep_attribute_t; +} tusb_iso_ep_attribute_t; /// USB Descriptor Types -typedef enum -{ +typedef enum { TUSB_DESC_DEVICE = 0x01, TUSB_DESC_CONFIGURATION = 0x02, TUSB_DESC_STRING = 0x03, @@ -119,10 +113,9 @@ typedef enum TUSB_DESC_SUPERSPEED_ENDPOINT_COMPANION = 0x30, TUSB_DESC_SUPERSPEED_ISO_ENDPOINT_COMPANION = 0x31 -}tusb_desc_type_t; +} tusb_desc_type_t; -typedef enum -{ +typedef enum { TUSB_REQ_GET_STATUS = 0 , TUSB_REQ_CLEAR_FEATURE = 1 , TUSB_REQ_RESERVED = 2 , @@ -136,25 +129,22 @@ typedef enum TUSB_REQ_GET_INTERFACE = 10 , TUSB_REQ_SET_INTERFACE = 11 , TUSB_REQ_SYNCH_FRAME = 12 -}tusb_request_code_t; +} tusb_request_code_t; -typedef enum -{ +typedef enum { TUSB_REQ_FEATURE_EDPT_HALT = 0, TUSB_REQ_FEATURE_REMOTE_WAKEUP = 1, TUSB_REQ_FEATURE_TEST_MODE = 2 -}tusb_request_feature_selector_t; +} tusb_request_feature_selector_t; -typedef enum -{ +typedef enum { TUSB_REQ_TYPE_STANDARD = 0, TUSB_REQ_TYPE_CLASS, TUSB_REQ_TYPE_VENDOR, TUSB_REQ_TYPE_INVALID } tusb_request_type_t; -typedef enum -{ +typedef enum { TUSB_REQ_RCPT_DEVICE =0, TUSB_REQ_RCPT_INTERFACE, TUSB_REQ_RCPT_ENDPOINT, @@ -162,8 +152,7 @@ typedef enum } tusb_request_recipient_t; // https://www.usb.org/defined-class-codes -typedef enum -{ +typedef enum { TUSB_CLASS_UNSPECIFIED = 0 , TUSB_CLASS_AUDIO = 1 , TUSB_CLASS_CDC = 2 , @@ -187,26 +176,23 @@ typedef enum TUSB_CLASS_MISC = 0xEF , TUSB_CLASS_APPLICATION_SPECIFIC = 0xFE , TUSB_CLASS_VENDOR_SPECIFIC = 0xFF -}tusb_class_code_t; +} tusb_class_code_t; typedef enum { MISC_SUBCLASS_COMMON = 2 }misc_subclass_type_t; -typedef enum -{ +typedef enum { MISC_PROTOCOL_IAD = 1 -}misc_protocol_type_t; +} misc_protocol_type_t; -typedef enum -{ +typedef enum { APP_SUBCLASS_USBTMC = 0x03, APP_SUBCLASS_DFU_RUNTIME = 0x01 } app_subclass_type_t; -typedef enum -{ +typedef enum { DEVICE_CAPABILITY_WIRELESS_USB = 0x01, DEVICE_CAPABILITY_USB20_EXTENSION = 0x02, DEVICE_CAPABILITY_SUPERSPEED_USB = 0x03, @@ -223,7 +209,7 @@ typedef enum DEVICE_CAPABILITY_AUTHENTICATION = 0x0E, DEVICE_CAPABILITY_BILLBOARD_EX = 0x0F, DEVICE_CAPABILITY_CONFIGURATION_SUMMARY = 0x10 -}device_capability_type_t; +} device_capability_type_t; enum { TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP = TU_BIT(5), @@ -235,28 +221,25 @@ enum { //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ -typedef enum -{ +typedef enum { XFER_RESULT_SUCCESS = 0, XFER_RESULT_FAILED, XFER_RESULT_STALLED, XFER_RESULT_TIMEOUT, XFER_RESULT_INVALID -}xfer_result_t; +} xfer_result_t; -enum // TODO remove -{ +// TODO remove +enum { DESC_OFFSET_LEN = 0, DESC_OFFSET_TYPE = 1 }; -enum -{ +enum { INTERFACE_INVALID_NUMBER = 0xff }; -typedef enum -{ +typedef enum { MS_OS_20_SET_HEADER_DESCRIPTOR = 0x00, MS_OS_20_SUBSET_HEADER_CONFIGURATION = 0x01, MS_OS_20_SUBSET_HEADER_FUNCTION = 0x02, @@ -268,16 +251,14 @@ typedef enum MS_OS_20_FEATURE_VENDOR_REVISION = 0x08 } microsoft_os_20_type_t; -enum -{ +enum { CONTROL_STAGE_IDLE, CONTROL_STAGE_SETUP, CONTROL_STAGE_DATA, CONTROL_STAGE_ACK }; -enum -{ +enum { TUSB_INDEX_INVALID_8 = 0xFFu }; @@ -290,8 +271,7 @@ TU_ATTR_PACKED_BEGIN TU_ATTR_BIT_FIELD_ORDER_BEGIN /// USB Device Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. uint8_t bDescriptorType ; ///< DEVICE Descriptor Type. uint16_t bcdUSB ; ///< BUSB Specification Release Number in Binary-Coded Decimal (i.e., 2.10 is 210H). This field identifies the release of the USB Specification with which the device and its descriptors are compliant. @@ -314,8 +294,7 @@ typedef struct TU_ATTR_PACKED TU_VERIFY_STATIC( sizeof(tusb_desc_device_t) == 18, "size is not correct"); // USB Binary Device Object Store (BOS) Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes uint8_t bDescriptorType ; ///< CONFIGURATION Descriptor Type uint16_t wTotalLength ; ///< Total length of data returned for this descriptor @@ -325,8 +304,7 @@ typedef struct TU_ATTR_PACKED TU_VERIFY_STATIC( sizeof(tusb_desc_bos_t) == 5, "size is not correct"); /// USB Configuration Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes uint8_t bDescriptorType ; ///< CONFIGURATION Descriptor Type uint16_t wTotalLength ; ///< Total length of data returned for this configuration. Includes the combined length of all descriptors (configuration, interface, endpoint, and class- or vendor-specific) returned for this configuration. @@ -341,8 +319,7 @@ typedef struct TU_ATTR_PACKED TU_VERIFY_STATIC( sizeof(tusb_desc_configuration_t) == 9, "size is not correct"); /// USB Interface Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes uint8_t bDescriptorType ; ///< INTERFACE Descriptor Type @@ -358,8 +335,7 @@ typedef struct TU_ATTR_PACKED TU_VERIFY_STATIC( sizeof(tusb_desc_interface_t) == 9, "size is not correct"); /// USB Endpoint Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; // Size of this descriptor in bytes uint8_t bDescriptorType ; // ENDPOINT Descriptor Type @@ -379,8 +355,7 @@ typedef struct TU_ATTR_PACKED TU_VERIFY_STATIC( sizeof(tusb_desc_endpoint_t) == 7, "size is not correct"); /// USB Other Speed Configuration Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of descriptor uint8_t bDescriptorType ; ///< Other_speed_Configuration Type uint16_t wTotalLength ; ///< Total length of data returned @@ -393,8 +368,7 @@ typedef struct TU_ATTR_PACKED } tusb_desc_other_speed_t; /// USB Device Qualifier Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of descriptor uint8_t bDescriptorType ; ///< Device Qualifier Type uint16_t bcdUSB ; ///< USB specification version number (e.g., 0200H for V2.00) @@ -411,8 +385,7 @@ typedef struct TU_ATTR_PACKED TU_VERIFY_STATIC( sizeof(tusb_desc_device_qualifier_t) == 10, "size is not correct"); /// USB Interface Association Descriptor (IAD ECN) -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of descriptor uint8_t bDescriptorType ; ///< Other_speed_Configuration Type @@ -426,17 +399,17 @@ typedef struct TU_ATTR_PACKED uint8_t iFunction ; ///< Index of the string descriptor describing the interface association. } tusb_desc_interface_assoc_t; +TU_VERIFY_STATIC( sizeof(tusb_desc_interface_assoc_t) == 8, "size is not correct"); + // USB String Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes uint8_t bDescriptorType ; ///< Descriptor Type uint16_t unicode_string[]; } tusb_desc_string_t; // USB Binary Device Object Store (BOS) -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType ; uint8_t bDevCapabilityType; @@ -445,9 +418,8 @@ typedef struct TU_ATTR_PACKED uint8_t CapabilityData[]; } tusb_desc_bos_platform_t; -// USB WebuSB URL Descriptor -typedef struct TU_ATTR_PACKED -{ +// USB WebUSB URL Descriptor +typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; uint8_t bScheme; @@ -455,8 +427,7 @@ typedef struct TU_ATTR_PACKED } tusb_desc_webusb_url_t; // DFU Functional Descriptor -typedef struct TU_ATTR_PACKED -{ +typedef struct TU_ATTR_PACKED { uint8_t bLength; uint8_t bDescriptorType; @@ -481,7 +452,7 @@ typedef struct TU_ATTR_PACKED // //--------------------------------------------------------------------+ -typedef struct TU_ATTR_PACKED{ +typedef struct TU_ATTR_PACKED { union { struct TU_ATTR_PACKED { uint8_t recipient : 5; ///< Recipient type tusb_request_recipient_t. @@ -500,7 +471,6 @@ typedef struct TU_ATTR_PACKED{ TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct"); - TU_ATTR_PACKED_END // End of all packed definitions TU_ATTR_BIT_FIELD_ORDER_END @@ -509,36 +479,30 @@ TU_ATTR_BIT_FIELD_ORDER_END //--------------------------------------------------------------------+ // Get direction from Endpoint address -TU_ATTR_ALWAYS_INLINE static inline tusb_dir_t tu_edpt_dir(uint8_t addr) -{ +TU_ATTR_ALWAYS_INLINE static inline tusb_dir_t tu_edpt_dir(uint8_t addr) { return (addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT; } // Get Endpoint number from address -TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_number(uint8_t addr) -{ +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_number(uint8_t addr) { return (uint8_t)(addr & (~TUSB_DIR_IN_MASK)); } -TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) -{ +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) { return (uint8_t)(num | (dir ? TUSB_DIR_IN_MASK : 0)); } -TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) -{ +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) { return tu_le16toh(desc_ep->wMaxPacketSize) & TU_GENMASK(10, 0); } #if CFG_TUSB_DEBUG -TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_dir_str(tusb_dir_t dir) -{ +TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_dir_str(tusb_dir_t dir) { tu_static const char *str[] = {"out", "in"}; return str[dir]; } -TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_t t) -{ +TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_t t) { tu_static const char *str[] = {"control", "isochronous", "bulk", "interrupt"}; return str[t]; } @@ -549,21 +513,18 @@ TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_ //--------------------------------------------------------------------+ // return next descriptor -TU_ATTR_ALWAYS_INLINE static inline uint8_t const * tu_desc_next(void const* desc) -{ +TU_ATTR_ALWAYS_INLINE static inline uint8_t const * tu_desc_next(void const* desc) { uint8_t const* desc8 = (uint8_t const*) desc; return desc8 + desc8[DESC_OFFSET_LEN]; } // get descriptor type -TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_type(void const* desc) -{ +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_type(void const* desc) { return ((uint8_t const*) desc)[DESC_OFFSET_TYPE]; } // get descriptor length -TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_len(void const* desc) -{ +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_len(void const* desc) { return ((uint8_t const*) desc)[DESC_OFFSET_LEN]; } diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index ac93632be..3e15d51c6 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -1130,8 +1130,8 @@ void dcd_int_handler(uint8_t rhport) { dwc2->gotgint = otg_int; } - if (int_status & GINTSTS_SOF) { - dwc2->gotgint = GINTSTS_SOF; + if(int_status & GINTSTS_SOF) { + dwc2->gintsts = GINTSTS_SOF; if (_sof_en) { uint32_t frame = (dwc2->dsts & (DSTS_FNSOF)) >> 8; diff --git a/src/tusb_option.h b/src/tusb_option.h index 57f026312..767323bdd 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -472,6 +472,23 @@ {0x10C4, 0xEA60}, {0x10C4, 0xEA70} #endif +#ifndef CFG_TUH_CDC_CH34X + // CH34X is not part of CDC class, only to re-use CDC driver API + #define CFG_TUH_CDC_CH34X 0 +#endif + +#ifndef CFG_TUH_CDC_CH34X_VID_PID_LIST + // List of product IDs that can use the CH34X CDC driver + #define CFG_TUH_CDC_CH34X_VID_PID_LIST \ + { 0x1a86, 0x5523 }, /* ch341 chip */ \ + { 0x1a86, 0x7522 }, /* ch340k chip */ \ + { 0x1a86, 0x7523 }, /* ch340 chip */ \ + { 0x1a86, 0xe523 }, /* ch330 chip */ \ + { 0x4348, 0x5523 }, /* ch340 custom chip */ \ + { 0x2184, 0x0057 }, /* overtaken from Linux Kernel driver /drivers/usb/serial/ch341.c */ \ + { 0x9986, 0x7523 } /* overtaken from Linux Kernel driver /drivers/usb/serial/ch341.c */ +#endif + #ifndef CFG_TUH_HID #define CFG_TUH_HID 0 #endif diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py index 7c662aeea..7f03ce43f 100644 --- a/test/hil/hil_test.py +++ b/test/hil/hil_test.py @@ -364,8 +364,15 @@ def main(config_file, board): print(f' {test} ...', end='') - # flash firmware - ret = globals()[f'flash_{flasher}'](item, fw) + # flash firmware. It may fail randomly, retry a few times + for i in range(3): + ret = globals()[f'flash_{flasher}'](item, fw) + if ret.returncode == 0: + break + else: + print(f'Flashing failed, retry {i+1}') + time.sleep(1) + assert ret.returncode == 0, 'Flash failed\n' + ret.stdout.decode() # run test -- cgit v1.3.1 From 45454c53f1d429a314115701ba2360591b811f50 Mon Sep 17 00:00:00 2001 From: Jerry Palacios Date: Wed, 7 Feb 2024 18:33:19 -0600 Subject: frdmmcxa153 files added --- hw/bsp/mcxa/FreeRTOSConfig/FreeRTOSConfig.h | 149 ++++++++ hw/bsp/mcxa/boards/frdmmcxa153/board.cmake | 18 + hw/bsp/mcxa/boards/frdmmcxa153/board.h | 66 ++++ hw/bsp/mcxa/boards/frdmmcxa153/board.mk | 26 ++ hw/bsp/mcxa/boards/frdmmcxa153/clock_config.c | 468 ++++++++++++++++++++++++++ hw/bsp/mcxa/boards/frdmmcxa153/clock_config.h | 170 ++++++++++ hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.c | 159 +++++++++ hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.h | 47 +++ hw/bsp/mcxa/debug.jlinkscript | 5 + hw/bsp/mcxa/family.c | 163 +++++++++ hw/bsp/mcxa/family.cmake | 110 ++++++ hw/bsp/mcxa/family.mk | 42 +++ src/common/tusb_mcu.h | 7 + src/portable/chipidea/ci_fs/ci_fs_mcxa.h | 47 +++ src/portable/chipidea/ci_fs/dcd_ci_fs.c | 2 + src/tusb_option.h | 1 + 16 files changed, 1480 insertions(+) create mode 100644 hw/bsp/mcxa/FreeRTOSConfig/FreeRTOSConfig.h create mode 100644 hw/bsp/mcxa/boards/frdmmcxa153/board.cmake create mode 100644 hw/bsp/mcxa/boards/frdmmcxa153/board.h create mode 100644 hw/bsp/mcxa/boards/frdmmcxa153/board.mk create mode 100644 hw/bsp/mcxa/boards/frdmmcxa153/clock_config.c create mode 100644 hw/bsp/mcxa/boards/frdmmcxa153/clock_config.h create mode 100644 hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.c create mode 100644 hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.h create mode 100644 hw/bsp/mcxa/debug.jlinkscript create mode 100644 hw/bsp/mcxa/family.c create mode 100644 hw/bsp/mcxa/family.cmake create mode 100644 hw/bsp/mcxa/family.mk create mode 100644 src/portable/chipidea/ci_fs/ci_fs_mcxa.h (limited to 'src/common') diff --git a/hw/bsp/mcxa/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/mcxa/FreeRTOSConfig/FreeRTOSConfig.h new file mode 100644 index 000000000..6f10a7ab0 --- /dev/null +++ b/hw/bsp/mcxa/FreeRTOSConfig/FreeRTOSConfig.h @@ -0,0 +1,149 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +// skip if included from IAR assembler +#ifndef __IASMARM__ + #include "fsl_device_registers.h" +#endif + +/* Cortex M23/M33 port configuration. */ +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) + +#define configUSE_PREEMPTION 1 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +#define configCPU_CLOCK_HZ SystemCoreClock +#define configTICK_RATE_HZ ( 1000 ) +#define configMAX_PRIORITIES ( 5 ) +#define configMINIMAL_STACK_SIZE ( 128 ) +#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 ) +#define configMAX_TASK_NAME_LEN 16 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configQUEUE_REGISTRY_SIZE 4 +#define configUSE_QUEUE_SETS 0 +#define configUSE_TIME_SLICING 0 +#define configUSE_NEWLIB_REENTRANT 0 +#define configENABLE_BACKWARD_COMPATIBILITY 1 +#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 + +#define configSUPPORT_STATIC_ALLOCATION 1 +#define configSUPPORT_DYNAMIC_ALLOCATION 0 + +/* Hook function related definitions. */ +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning +#define configCHECK_FOR_STACK_OVERFLOW 2 +#define configCHECK_HANDLER_INSTALLATION 0 + +/* Run time and task stats gathering related definitions. */ +#define configGENERATE_RUN_TIME_STATS 0 +#define configRECORD_STACK_HIGH_ADDRESS 1 +#define configUSE_TRACE_FACILITY 1 // legacy trace +#define configUSE_STATS_FORMATTING_FUNCTIONS 0 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES 2 + +/* Software timer related definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2) +#define configTIMER_QUEUE_LENGTH 32 +#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE + +/* Optional functions - most linkers will remove unused functions anyway. */ +#define INCLUDE_vTaskPrioritySet 0 +#define INCLUDE_uxTaskPriorityGet 0 +#define INCLUDE_vTaskDelete 0 +#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY +#define INCLUDE_xResumeFromISR 0 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_xTaskGetSchedulerState 0 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 0 +#define INCLUDE_xTaskGetIdleTaskHandle 0 +#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 +#define INCLUDE_pcTaskGetTaskName 0 +#define INCLUDE_eTaskGetState 0 +#define INCLUDE_xEventGroupSetBitFromISR 0 +#define INCLUDE_xTimerPendFunctionCall 0 + +/* FreeRTOS hooks to NVIC vectors */ +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler +#define vPortSVCHandler SVC_Handler + +//--------------------------------------------------------------------+ +// Interrupt nesting behavior configuration. +//--------------------------------------------------------------------+ + +// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header +#define configPRIO_BITS 3 + +/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P0V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + } + + CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ + + CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO12M */ + + /* The flow of decreasing voltage and frequency */ + if (coreFreq > BOARD_BOOTCLOCKFRO12M_CORE_CLOCK) { + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P0V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + } + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + + /*!< Set up dividers */ + CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK; +} +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO24M ********************** + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockFRO24M +outputs: +- {id: CLK_1M_clock.outFreq, value: 1 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: CPU_clock.outFreq, value: 24 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz} +- {id: FRO_HF_clock.outFreq, value: 48 MHz} +- {id: MAIN_clock.outFreq, value: 48 MHz} +- {id: Slow_clock.outFreq, value: 6 MHz} +- {id: System_clock.outFreq, value: 24 MHz} +settings: +- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1} +- {id: SYSCON.AHBCLKDIV.scale, value: '2', locked: true} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockFRO24M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockFRO24M configuration + ******************************************************************************/ +void BOARD_BootClockFRO24M(void) +{ + uint32_t coreFreq; + spc_active_mode_core_ldo_option_t ldoOption; + spc_sram_voltage_config_t sramOption; + + /* Get the CPU Core frequency */ + coreFreq = CLOCK_GetCoreSysClkFreq(); + + /* The flow of increasing voltage and frequency */ + if (coreFreq <= BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) { + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P0V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + } + + CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ + + CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ + + CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */ + + /* The flow of decreasing voltage and frequency */ + if (coreFreq > BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) { + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P0V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + } + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + + /*!< Set up dividers */ + CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 2U); /* !< Set AHBCLKDIV divider to value 2 */ + CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFRO24M_CORE_CLOCK; +} +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO48M ********************** + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockFRO48M +outputs: +- {id: CLK_1M_clock.outFreq, value: 1 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: CPU_clock.outFreq, value: 48 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz} +- {id: FRO_HF_clock.outFreq, value: 48 MHz} +- {id: MAIN_clock.outFreq, value: 48 MHz} +- {id: Slow_clock.outFreq, value: 12 MHz} +- {id: System_clock.outFreq, value: 48 MHz} +settings: +- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockFRO48M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockFRO48M configuration + ******************************************************************************/ +void BOARD_BootClockFRO48M(void) +{ + uint32_t coreFreq; + spc_active_mode_core_ldo_option_t ldoOption; + spc_sram_voltage_config_t sramOption; + + /* Get the CPU Core frequency */ + coreFreq = CLOCK_GetCoreSysClkFreq(); + + /* The flow of increasing voltage and frequency */ + if (coreFreq <= BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) { + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P0V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + } + + CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ + + CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ + + CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */ + + /* The flow of decreasing voltage and frequency */ + if (coreFreq > BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) { + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P0V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + } + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + + /*!< Set up dividers */ + CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */ + CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFRO48M_CORE_CLOCK; +} +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO64M ********************** + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockFRO64M +outputs: +- {id: CLK_1M_clock.outFreq, value: 1 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: CPU_clock.outFreq, value: 64 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: FRO_HF_DIV_clock.outFreq, value: 64 MHz} +- {id: FRO_HF_clock.outFreq, value: 64 MHz} +- {id: MAIN_clock.outFreq, value: 64 MHz} +- {id: Slow_clock.outFreq, value: 16 MHz} +- {id: System_clock.outFreq, value: 64 MHz} +settings: +- {id: VDD_CORE, value: voltage_1v1} +- {id: MRCC.FROHFDIV.scale, value: '1', locked: true} +- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1} +- {id: SYSCON.AHBCLKDIV.scale, value: '1', locked: true} +sources: +- {id: SCG.FIRC.outFreq, value: 64 MHz} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockFRO64M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockFRO64M configuration + ******************************************************************************/ +void BOARD_BootClockFRO64M(void) +{ + uint32_t coreFreq; + spc_active_mode_core_ldo_option_t ldoOption; + spc_sram_voltage_config_t sramOption; + + /* Get the CPU Core frequency */ + coreFreq = CLOCK_GetCoreSysClkFreq(); + + /* The flow of increasing voltage and frequency */ + if (coreFreq <= BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) { + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P1V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + } + + CLOCK_SetupFROHFClocking(64000000U); /*!< Enable FRO HF(64MHz) output */ + + CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ + + CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */ + + /* The flow of decreasing voltage and frequency */ + if (coreFreq > BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) { + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P1V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + } + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + + /*!< Set up dividers */ + CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */ + CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFRO64M_CORE_CLOCK; +} +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO96M ********************** + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockFRO96M +called_from_default_init: true +outputs: +- {id: CLK_1M_clock.outFreq, value: 1 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: CPU_clock.outFreq, value: 96 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: FRO_HF_DIV_clock.outFreq, value: 96 MHz} +- {id: FRO_HF_clock.outFreq, value: 96 MHz} +- {id: MAIN_clock.outFreq, value: 96 MHz} +- {id: Slow_clock.outFreq, value: 24 MHz} +- {id: System_clock.outFreq, value: 96 MHz} +settings: +- {id: VDD_CORE, value: voltage_1v1} +- {id: CLKOUTDIV_HALT, value: Enable} +- {id: MRCC.FROHFDIV.scale, value: '1', locked: true} +- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1} +- {id: SYSCON.AHBCLKDIV.scale, value: '1', locked: true} +sources: +- {id: SCG.FIRC.outFreq, value: 96 MHz} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockFRO96M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockFRO96M configuration + ******************************************************************************/ +void BOARD_BootClockFRO96M(void) +{ + uint32_t coreFreq; + spc_active_mode_core_ldo_option_t ldoOption; + spc_sram_voltage_config_t sramOption; + + /* Get the CPU Core frequency */ + coreFreq = CLOCK_GetCoreSysClkFreq(); + + /* The flow of increasing voltage and frequency */ + if (coreFreq <= BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) { + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P1V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + } + + CLOCK_SetupFROHFClocking(96000000U); /*!< Enable FRO HF(96MHz) output */ + + CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ + + CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */ + + /* The flow of decreasing voltage and frequency */ + if (coreFreq > BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) { + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P1V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + } + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + + /*!< Set up dividers */ + CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */ + CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFRO96M_CORE_CLOCK; +} diff --git a/hw/bsp/mcxa/boards/frdmmcxa153/clock_config.h b/hw/bsp/mcxa/boards/frdmmcxa153/clock_config.h new file mode 100644 index 000000000..079d0d312 --- /dev/null +++ b/hw/bsp/mcxa/boards/frdmmcxa153/clock_config.h @@ -0,0 +1,170 @@ +/* + * Copyright 2023 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*********************************************************************************************************************** + * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file + * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. + **********************************************************************************************************************/ + +#ifndef _CLOCK_CONFIG_H_ +#define _CLOCK_CONFIG_H_ + +#include "fsl_common.h" + +/******************************************************************************* + * Definitions + ******************************************************************************/ + +/******************************************************************************* + ************************ BOARD_InitBootClocks function ************************ + ******************************************************************************/ + +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes default configuration of clocks. + * + */ +void BOARD_InitBootClocks(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO12M ********************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFRO12M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFRO12M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFRO12M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO24M ********************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFRO24M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFRO24M_CORE_CLOCK 24000000U /*!< Core clock frequency: 24000000Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFRO24M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFRO24M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO48M ********************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFRO48M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFRO48M_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFRO48M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFRO48M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO64M ********************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFRO64M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFRO64M_CORE_CLOCK 64000000U /*!< Core clock frequency: 64000000Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFRO64M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFRO64M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO96M ********************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFRO96M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFRO96M_CORE_CLOCK 96000000U /*!< Core clock frequency: 96000000Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFRO96M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFRO96M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +#endif /* _CLOCK_CONFIG_H_ */ diff --git a/hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.c b/hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.c new file mode 100644 index 000000000..b0e6de560 --- /dev/null +++ b/hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.c @@ -0,0 +1,159 @@ +/* + * Copyright 2023 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*********************************************************************************************************************** + * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file + * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. + **********************************************************************************************************************/ + +/* clang-format off */ +/* + * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!GlobalInfo +product: Pins v14.0 +processor: MCXA153 +package_id: MCXA153VLH +mcu_data: ksdk2_0 +processor_version: 0.14.3 +pin_labels: +- {pin_num: '38', pin_signal: P3_12/LPUART2_RTS_B/CT1_MAT2/PWM0_X0, label: LED_RED, identifier: LED_RED} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** + */ +/* clang-format on */ + +#include "fsl_common.h" +#include "fsl_port.h" +#include "fsl_gpio.h" +#include "pin_mux.h" + +/* FUNCTION ************************************************************************************************************ + * + * Function Name : BOARD_InitBootPins + * Description : Calls initialization functions. + * + * END ****************************************************************************************************************/ +void BOARD_InitBootPins(void) +{ + BOARD_InitPins(); +} + +/* clang-format off */ +/* + * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +BOARD_InitPins: +- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'} +- pin_list: + - {pin_num: '38', peripheral: GPIO3, signal: 'GPIO, 12', pin_signal: P3_12/LPUART2_RTS_B/CT1_MAT2/PWM0_X0, direction: OUTPUT, gpio_init_state: 'false', slew_rate: fast, + open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** + */ +/* clang-format on */ + +/* FUNCTION ************************************************************************************************************ + * + * Function Name : BOARD_InitPins + * Description : Configures pin routing and optionally pin electrical features. + * + * END ****************************************************************************************************************/ +void BOARD_InitPins(void) +{ + RESET_PeripheralReset(kLPUART0_RST_SHIFT_RSTn); + RESET_PeripheralReset(kPORT0_RST_SHIFT_RSTn); + CLOCK_SetClockDiv(kCLOCK_DivLPUART0, 1u); + CLOCK_AttachClk(kFRO12M_to_LPUART0); + + /* write to PORT0: Peripheral clock is enabled */ + CLOCK_EnableClock(kCLOCK_GatePORT0); + + /* Write to GPIO3: Peripheral clock is enabled */ + CLOCK_EnableClock(kCLOCK_GateGPIO3); + /* Write to PORT3: Peripheral clock is enabled */ + CLOCK_EnableClock(kCLOCK_GatePORT3); + /* GPIO3 peripheral is released from reset */ + RESET_ReleasePeripheralReset(kGPIO3_RST_SHIFT_RSTn); + /* PORT3 peripheral is released from reset */ + RESET_ReleasePeripheralReset(kPORT3_RST_SHIFT_RSTn); + + const port_pin_config_t port3_12_pin38_config = {/* Internal pull-up/down resistor is disabled */ + kPORT_PullDisable, + /* Low internal pull resistor value is selected. */ + kPORT_LowPullResistor, + /* Fast slew rate is configured */ + kPORT_FastSlewRate, + /* Passive input filter is disabled */ + kPORT_PassiveFilterDisable, + /* Open drain output is disabled */ + kPORT_OpenDrainDisable, + /* Low drive strength is configured */ + kPORT_LowDriveStrength, + /* Normal drive strength is configured */ + kPORT_NormalDriveStrength, + /* Pin is configured as P3_12 */ + kPORT_MuxAlt0, + /* Digital input enabled */ + kPORT_InputBufferEnable, + /* Digital input is not inverted */ + kPORT_InputNormal, + /* Pin Control Register fields [15:0] are not locked */ + kPORT_UnlockRegister}; + /* PORT3_12 (pin 38) is configured as P3_12 */ + PORT_SetPinConfig(PORT3, 12U, &port3_12_pin38_config); + + const port_pin_config_t port0_2_pin51_config = {/* Internal pull-up resistor is enabled */ + kPORT_PullUp, + /* Low internal pull resistor value is selected. */ + kPORT_LowPullResistor, + /* Fast slew rate is configured */ + kPORT_FastSlewRate, + /* Passive input filter is disabled */ + kPORT_PassiveFilterDisable, + /* Open drain output is disabled */ + kPORT_OpenDrainDisable, + /* Low drive strength is configured */ + kPORT_LowDriveStrength, + /* Normal drive strength is configured */ + kPORT_NormalDriveStrength, + /* Pin is configured as LPUART0_RXD */ + kPORT_MuxAlt2, + /* Digital input enabled */ + kPORT_InputBufferEnable, + /* Digital input is not inverted */ + kPORT_InputNormal, + /* Pin Control Register fields [15:0] are not locked */ + kPORT_UnlockRegister}; + /* PORT0_2 (pin 51) is configured as LPUART0_RXD */ + PORT_SetPinConfig(PORT0, 2U, &port0_2_pin51_config); + + const port_pin_config_t port0_3_pin52_config = {/* Internal pull-up resistor is enabled */ + kPORT_PullUp, + /* Low internal pull resistor value is selected. */ + kPORT_LowPullResistor, + /* Fast slew rate is configured */ + kPORT_FastSlewRate, + /* Passive input filter is disabled */ + kPORT_PassiveFilterDisable, + /* Open drain output is disabled */ + kPORT_OpenDrainDisable, + /* Low drive strength is configured */ + kPORT_LowDriveStrength, + /* Normal drive strength is configured */ + kPORT_NormalDriveStrength, + /* Pin is configured as LPUART0_TXD */ + kPORT_MuxAlt2, + /* Digital input enabled */ + kPORT_InputBufferEnable, + /* Digital input is not inverted */ + kPORT_InputNormal, + /* Pin Control Register fields [15:0] are not locked */ + kPORT_UnlockRegister}; + /* PORT0_3 (pin 52) is configured as LPUART0_TXD */ + PORT_SetPinConfig(PORT0, 3U, &port0_3_pin52_config); + +} +/*********************************************************************************************************************** + * EOF + **********************************************************************************************************************/ diff --git a/hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.h b/hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.h new file mode 100644 index 000000000..06b6fdee9 --- /dev/null +++ b/hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.h @@ -0,0 +1,47 @@ +/* + * Copyright 2022 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef _PIN_MUX_H_ +#define _PIN_MUX_H_ + +/*! + * @addtogroup pin_mux + * @{ + */ + +/*********************************************************************************************************************** + * API + **********************************************************************************************************************/ + +#if defined(__cplusplus) +extern "C" { +#endif + +/*! + * @brief Calls initialization functions. + * + */ +void BOARD_InitBootPins(void); + +/*! + * @brief Configures pin routing and optionally pin electrical features. + * + */ +void BOARD_InitPins(void); + +#if defined(__cplusplus) +} +#endif + +/*! + * @} + */ +#endif /* _PIN_MUX_H_ */ + +/*********************************************************************************************************************** + * EOF + **********************************************************************************************************************/ diff --git a/hw/bsp/mcxa/debug.jlinkscript b/hw/bsp/mcxa/debug.jlinkscript new file mode 100644 index 000000000..fd8bcffef --- /dev/null +++ b/hw/bsp/mcxa/debug.jlinkscript @@ -0,0 +1,5 @@ +int SetupTarget(void) { + JLINK_ExecCommand("SetRTTSearchRanges 0x20000000 0x40000"); + + return 0; +} diff --git a/hw/bsp/mcxa/family.c b/hw/bsp/mcxa/family.c new file mode 100644 index 000000000..97abc1bc3 --- /dev/null +++ b/hw/bsp/mcxa/family.c @@ -0,0 +1,163 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "bsp/board_api.h" +#include "fsl_device_registers.h" +#include "fsl_gpio.h" +#include "fsl_lpuart.h" +#include "board.h" + +#include "pin_mux.h" +#include "clock_config.h" +#include "fsl_common.h" + + +#ifdef BOARD_TUD_RHPORT + #define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n) +#else + #define PORT_SUPPORT_DEVICE(_n) 0 +#endif + +#ifdef BOARD_TUH_RHPORT + #define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n) +#else + #define PORT_SUPPORT_HOST(_n) 0 +#endif + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM +//--------------------------------------------------------------------+ + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB0_FS_IRQHandler(void) +{ + tud_int_handler(0); +} + +void board_init(void) +{ + BOARD_InitPins(); + BOARD_InitBootClocks(); + CLOCK_SetupExtClocking(XTAL0_CLK_HZ); + + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); + + // LED + CLOCK_EnableClock(LED_CLK); + gpio_pin_config_t LED_RED_config = { + .pinDirection = kGPIO_DigitalOutput, + .outputLogic = 0U + }; + + /* Initialize GPIO functionality on pin PIO3_12 (pin 38) */ + GPIO_PinInit(LED_GPIO, LED_PIN, &LED_RED_config); + board_led_write(1); + + // Button +#ifdef BUTTON_GPIO + CLOCK_EnableClock(BUTTON_CLK); + gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0}; + GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); +#endif + +#ifdef UART_DEV + + CLOCK_SetClockDiv(kCLOCK_DivLPUART0, 1u); + CLOCK_AttachClk(kFRO12M_to_LPUART0); + RESET_PeripheralReset(kLPUART0_RST_SHIFT_RSTn); + + lpuart_config_t uart_config; + LPUART_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = 115200; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPUART_Init(UART_DEV, &uart_config, 12000000u); + + +#endif + + // USB VBUS + /* PORT0 PIN22 configured as USB0_VBUS */ + +#if PORT_SUPPORT_DEVICE(0) + // Port0 is Full Speed + + RESET_PeripheralReset(kUSB0_RST_SHIFT_RSTn); + CLOCK_EnableUsbfsClock(); +#endif + +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ +#ifdef BUTTON_GPIO + return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); +#else + return 1; +#endif +} + +int board_uart_read(uint8_t* buf, int len) +{ + (void) buf; (void) len; + return 0; +} + +int board_uart_write(void const * buf, int len) +{ +#ifdef UART_DEV + LPUART_WriteBlocking(UART_DEV, (uint8_t const *) buf, len); + return len; +#else + (void) buf; (void) len; + return 0; +#endif +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/mcxa/family.cmake b/hw/bsp/mcxa/family.cmake new file mode 100644 index 000000000..0aa690afc --- /dev/null +++ b/hw/bsp/mcxa/family.cmake @@ -0,0 +1,110 @@ +include_guard() + +if (NOT BOARD) + message(FATAL_ERROR "BOARD not specified") +endif () + +set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk) +set(CMSIS_DIR ${TOP}/lib/CMSIS_5) + +# include board specific +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) + +# toolchain set up +set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor") +set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake) + +set(FAMILY_MCUS MCXA CACHE INTERNAL "") + + +#------------------------------------ +# BOARD_TARGET +#------------------------------------ +# only need to be built ONCE for all examples +function(add_board_target BOARD_TARGET) + if (NOT TARGET ${BOARD_TARGET}) + add_library(${BOARD_TARGET} STATIC + # external driver + #lib/sct_neopixel/sct_neopixel.c + + # driver + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_gpio.c + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_common_arm.c + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpuart.c + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpflexcomm.c + # mcu + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c + ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c + ) + # target_compile_definitions(${BOARD_TARGET} PUBLIC + # ) + target_include_directories(${BOARD_TARGET} PUBLIC + # driver + # mcu + ${CMSIS_DIR}/CMSIS/Core/Include + ${SDK_DIR}/devices/${MCU_VARIANT} + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers + ) + + update_board(${BOARD_TARGET}) + + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + target_sources(${BOARD_TARGET} PUBLIC + ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S + ) + target_link_options(${BOARD_TARGET} PUBLIC + # linker file + "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld" + # nanolib + --specs=nosys.specs + --specs=nano.specs + ) + elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--config=${LD_FILE_IAR}" + ) + endif () + endif () +endfunction() + + +#------------------------------------ +# Functions +#------------------------------------ +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) + + # Board target + add_board_target(board_${BOARD}) + + #---------- Port Specific ---------- + # These files are built for each example since it depends on example's tusb_config.h + target_sources(${TARGET} PUBLIC + # BSP + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c + ) + target_include_directories(${TARGET} PUBLIC + # family, hw, board + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} + ) + + # Add TinyUSB target and port source + family_add_tinyusb(${TARGET} OPT_MCU_MCXA ${RTOS}) + target_sources(${TARGET}-tinyusb PUBLIC + # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS + ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) + + # Link dependencies + target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) + + # Flashing + family_flash_jlink(${TARGET}) + #family_flash_nxplink(${TARGET}) + #family_flash_pyocd(${TARGET}) +endfunction() diff --git a/hw/bsp/mcxa/family.mk b/hw/bsp/mcxa/family.mk new file mode 100644 index 000000000..b32282d04 --- /dev/null +++ b/hw/bsp/mcxa/family.mk @@ -0,0 +1,42 @@ +UF2_FAMILY_ID = 0x2abc77ec +SDK_DIR = hw/mcu/nxp/mcux-sdk + +DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 #not found + +include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m33 + +CFLAGS += \ + -flto \ + -DCFG_TUSB_MCU=OPT_MCU_MCXA \ + -DBOARD_TUD_RHPORT=0 + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration + +LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs + +# All source paths should be relative to the top level. +LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld + +# TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS +$(info "PORT0 Full Speed") +CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED +SRC_C += src/portable/chipidea/ci_fs/dcd_ci_fs.c + +SRC_C += \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/system_$(MCU_CORE).c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_gpio.c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpuart.c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_common_arm.c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_spc.c +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ + $(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT) \ + $(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers + + +SRC_S += $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/startup_$(MCU_CORE).S diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index e589c4c86..21ae3a71e 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -100,6 +100,13 @@ #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_RHPORT_HIGHSPEED 1 +#elif TU_CHECK_MCU(OPT_MCU_MCXA) + // USB0 is chipidea FS + #define TUP_USBIP_CHIPIDEA_FS + #define TUP_USBIP_CHIPIDEA_FS_MCXA + + #define TUP_DCD_ENDPOINT_MAX 16 + #elif TU_CHECK_MCU(OPT_MCU_MIMXRT1XXX) #define TUP_USBIP_CHIPIDEA_HS #define TUP_USBIP_EHCI diff --git a/src/portable/chipidea/ci_fs/ci_fs_mcxa.h b/src/portable/chipidea/ci_fs/ci_fs_mcxa.h new file mode 100644 index 000000000..81786efdf --- /dev/null +++ b/src/portable/chipidea/ci_fs/ci_fs_mcxa.h @@ -0,0 +1,47 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _CI_FS_MCXA_H +#define _CI_FS_MCXA_H + +#include "fsl_device_registers.h" + +#define CI_FS_REG(_port) ((ci_fs_regs_t*) USB0_BASE) +#define CI_REG CI_FS_REG(0) + +void dcd_int_enable(uint8_t rhport) +{ + (void) rhport; + NVIC_EnableIRQ(USB0_IRQn); +} + +void dcd_int_disable(uint8_t rhport) +{ + (void) rhport; + NVIC_DisableIRQ(USB0_IRQn); +} + +#endif diff --git a/src/portable/chipidea/ci_fs/dcd_ci_fs.c b/src/portable/chipidea/ci_fs/dcd_ci_fs.c index 9327e09d8..08e73711f 100644 --- a/src/portable/chipidea/ci_fs/dcd_ci_fs.c +++ b/src/portable/chipidea/ci_fs/dcd_ci_fs.c @@ -35,6 +35,8 @@ #include "ci_fs_kinetis.h" #elif defined(TUP_USBIP_CHIPIDEA_FS_MCX) #include "ci_fs_mcx.h" +#elif defined(TUP_USBIP_CHIPIDEA_FS_MCXA) + #include "ci_fs_mcxa.h" #else #error "MCU is not supported" #endif diff --git a/src/tusb_option.h b/src/tusb_option.h index 767323bdd..fe9c44e96 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -175,6 +175,7 @@ // NXP LPC MCX #define OPT_MCU_MCXN9 2300 ///< NXP MCX N9 Series +#define OPT_MCU_MCXA 2301 ///< NXP MCX A Series // Check if configured MCU is one of listed // Apply _TU_CHECK_MCU with || as separator to list of input -- cgit v1.3.1 From 4d4e20b71efe8d9e1b5a141d84e058ff54801c67 Mon Sep 17 00:00:00 2001 From: IngHK Date: Thu, 8 Feb 2024 12:00:44 +0100 Subject: missing \r\n after TU_LOG_BUF => moved \r\n to tu_print_buf() --- src/common/tusb_debug.h | 1 + src/device/usbd.c | 1 - src/host/usbh.c | 2 -- 3 files changed, 1 insertion(+), 3 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index 8db1606ae..2e9f1d9cd 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -60,6 +60,7 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent); static inline void tu_print_buf(uint8_t const* buf, uint32_t bufsize) { for(uint32_t i=0; isetup->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD && xfer->setup->bRequest <= TUSB_REQ_SYNCH_FRAME) ? tu_str_std_request[xfer->setup->bRequest] : "Class Request"); TU_LOG_BUF_USBH(xfer->setup, 8); - TU_LOG_USBH("\r\n"); if (xfer->complete_cb) { TU_ASSERT( hcd_setup_send(rhport, daddr, (uint8_t const*) &_ctrl_xfer.request) ); @@ -662,7 +661,6 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result if (XFER_RESULT_SUCCESS != result) { TU_LOG_USBH("[%u:%u] Control %s, xferred_bytes = %lu\r\n", rhport, dev_addr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED", xferred_bytes); TU_LOG_BUF_USBH(request, 8); - TU_LOG_USBH("\r\n"); // terminate transfer if any stage failed _xfer_complete(dev_addr, result); -- cgit v1.3.1 From 79aecf3fb7d6a384eb745253d11a95d657469eed Mon Sep 17 00:00:00 2001 From: IngHK Date: Wed, 14 Feb 2024 09:16:18 +0100 Subject: fixed #2469 --- src/common/tusb_fifo.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index d6c3db4ce..76696396b 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -224,6 +224,7 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t if (wrap_bytes > 0) _ff_push_const_addr(ff_buf, app_buf, wrap_bytes); } break; + default: break; } } -- cgit v1.3.1 From 5c14bd13da211ff2679115b0dba96ac80c1a516c Mon Sep 17 00:00:00 2001 From: Jerry Palacios Date: Tue, 20 Feb 2024 18:02:42 -0600 Subject: MCX A and MCX N merged to MCX family --- README.rst | 4 +- hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h | 149 ++++++++ hw/bsp/mcx/boards/frdmmcxa153/board.cmake | 23 ++ hw/bsp/mcx/boards/frdmmcxa153/board.h | 66 ++++ hw/bsp/mcx/boards/frdmmcxa153/board.mk | 14 + hw/bsp/mcx/boards/frdmmcxa153/clock_config.c | 468 ++++++++++++++++++++++++++ hw/bsp/mcx/boards/frdmmcxa153/clock_config.h | 170 ++++++++++ hw/bsp/mcx/boards/frdmmcxa153/pin_mux.c | 159 +++++++++ hw/bsp/mcx/boards/frdmmcxa153/pin_mux.h | 47 +++ hw/bsp/mcx/boards/frdmmcxn947/board.cmake | 24 ++ hw/bsp/mcx/boards/frdmmcxn947/board.h | 66 ++++ hw/bsp/mcx/boards/frdmmcxn947/board.mk | 14 + hw/bsp/mcx/boards/frdmmcxn947/clock_config.c | 338 +++++++++++++++++++ hw/bsp/mcx/boards/frdmmcxn947/clock_config.h | 177 ++++++++++ hw/bsp/mcx/boards/frdmmcxn947/pin_mux.c | 143 ++++++++ hw/bsp/mcx/boards/frdmmcxn947/pin_mux.h | 51 +++ hw/bsp/mcx/boards/mcxn947brk/board.cmake | 24 ++ hw/bsp/mcx/boards/mcxn947brk/board.h | 66 ++++ hw/bsp/mcx/boards/mcxn947brk/board.mk | 14 + hw/bsp/mcx/boards/mcxn947brk/clock_config.c | 338 +++++++++++++++++++ hw/bsp/mcx/boards/mcxn947brk/clock_config.h | 177 ++++++++++ hw/bsp/mcx/boards/mcxn947brk/pin_mux.c | 141 ++++++++ hw/bsp/mcx/boards/mcxn947brk/pin_mux.h | 51 +++ hw/bsp/mcx/debug.jlinkscript | 5 + hw/bsp/mcx/family.c | 267 +++++++++++++++ hw/bsp/mcx/family.cmake | 122 +++++++ hw/bsp/mcx/family.mk | 65 ++++ hw/bsp/mcxa/FreeRTOSConfig/FreeRTOSConfig.h | 149 -------- hw/bsp/mcxa/boards/frdmmcxa153/board.cmake | 18 - hw/bsp/mcxa/boards/frdmmcxa153/board.h | 66 ---- hw/bsp/mcxa/boards/frdmmcxa153/board.mk | 13 - hw/bsp/mcxa/boards/frdmmcxa153/clock_config.c | 468 -------------------------- hw/bsp/mcxa/boards/frdmmcxa153/clock_config.h | 170 ---------- hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.c | 159 --------- hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.h | 47 --- hw/bsp/mcxa/debug.jlinkscript | 5 - hw/bsp/mcxa/family.c | 161 --------- hw/bsp/mcxa/family.cmake | 110 ------ hw/bsp/mcxa/family.mk | 42 --- hw/bsp/mcxn/FreeRTOSConfig/FreeRTOSConfig.h | 149 -------- hw/bsp/mcxn/boards/frdmmcxn947/board.cmake | 21 -- hw/bsp/mcxn/boards/frdmmcxn947/board.h | 66 ---- hw/bsp/mcxn/boards/frdmmcxn947/board.mk | 11 - hw/bsp/mcxn/boards/frdmmcxn947/clock_config.c | 338 ------------------- hw/bsp/mcxn/boards/frdmmcxn947/clock_config.h | 177 ---------- hw/bsp/mcxn/boards/frdmmcxn947/pin_mux.c | 143 -------- hw/bsp/mcxn/boards/frdmmcxn947/pin_mux.h | 51 --- hw/bsp/mcxn/boards/mcxn947brk/board.cmake | 21 -- hw/bsp/mcxn/boards/mcxn947brk/board.h | 66 ---- hw/bsp/mcxn/boards/mcxn947brk/board.mk | 11 - hw/bsp/mcxn/boards/mcxn947brk/clock_config.c | 338 ------------------- hw/bsp/mcxn/boards/mcxn947brk/clock_config.h | 177 ---------- hw/bsp/mcxn/boards/mcxn947brk/pin_mux.c | 141 -------- hw/bsp/mcxn/boards/mcxn947brk/pin_mux.h | 51 --- hw/bsp/mcxn/debug.jlinkscript | 5 - hw/bsp/mcxn/family.c | 245 -------------- hw/bsp/mcxn/family.cmake | 110 ------ hw/bsp/mcxn/family.mk | 51 --- src/common/tusb_mcu.h | 4 +- src/portable/chipidea/ci_fs/ci_fs_mcx.h | 17 +- src/portable/chipidea/ci_fs/ci_fs_mcxa.h | 47 --- src/portable/chipidea/ci_fs/dcd_ci_fs.c | 2 - src/tusb_option.h | 2 +- 63 files changed, 3197 insertions(+), 3638 deletions(-) create mode 100644 hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h create mode 100644 hw/bsp/mcx/boards/frdmmcxa153/board.cmake create mode 100644 hw/bsp/mcx/boards/frdmmcxa153/board.h create mode 100644 hw/bsp/mcx/boards/frdmmcxa153/board.mk create mode 100644 hw/bsp/mcx/boards/frdmmcxa153/clock_config.c create mode 100644 hw/bsp/mcx/boards/frdmmcxa153/clock_config.h create mode 100644 hw/bsp/mcx/boards/frdmmcxa153/pin_mux.c create mode 100644 hw/bsp/mcx/boards/frdmmcxa153/pin_mux.h create mode 100644 hw/bsp/mcx/boards/frdmmcxn947/board.cmake create mode 100644 hw/bsp/mcx/boards/frdmmcxn947/board.h create mode 100644 hw/bsp/mcx/boards/frdmmcxn947/board.mk create mode 100644 hw/bsp/mcx/boards/frdmmcxn947/clock_config.c create mode 100644 hw/bsp/mcx/boards/frdmmcxn947/clock_config.h create mode 100644 hw/bsp/mcx/boards/frdmmcxn947/pin_mux.c create mode 100644 hw/bsp/mcx/boards/frdmmcxn947/pin_mux.h create mode 100644 hw/bsp/mcx/boards/mcxn947brk/board.cmake create mode 100644 hw/bsp/mcx/boards/mcxn947brk/board.h create mode 100644 hw/bsp/mcx/boards/mcxn947brk/board.mk create mode 100644 hw/bsp/mcx/boards/mcxn947brk/clock_config.c create mode 100644 hw/bsp/mcx/boards/mcxn947brk/clock_config.h create mode 100644 hw/bsp/mcx/boards/mcxn947brk/pin_mux.c create mode 100644 hw/bsp/mcx/boards/mcxn947brk/pin_mux.h create mode 100644 hw/bsp/mcx/debug.jlinkscript create mode 100644 hw/bsp/mcx/family.c create mode 100644 hw/bsp/mcx/family.cmake create mode 100644 hw/bsp/mcx/family.mk delete mode 100644 hw/bsp/mcxa/FreeRTOSConfig/FreeRTOSConfig.h delete mode 100644 hw/bsp/mcxa/boards/frdmmcxa153/board.cmake delete mode 100644 hw/bsp/mcxa/boards/frdmmcxa153/board.h delete mode 100644 hw/bsp/mcxa/boards/frdmmcxa153/board.mk delete mode 100644 hw/bsp/mcxa/boards/frdmmcxa153/clock_config.c delete mode 100644 hw/bsp/mcxa/boards/frdmmcxa153/clock_config.h delete mode 100644 hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.c delete mode 100644 hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.h delete mode 100644 hw/bsp/mcxa/debug.jlinkscript delete mode 100644 hw/bsp/mcxa/family.c delete mode 100644 hw/bsp/mcxa/family.cmake delete mode 100644 hw/bsp/mcxa/family.mk delete mode 100644 hw/bsp/mcxn/FreeRTOSConfig/FreeRTOSConfig.h delete mode 100644 hw/bsp/mcxn/boards/frdmmcxn947/board.cmake delete mode 100644 hw/bsp/mcxn/boards/frdmmcxn947/board.h delete mode 100644 hw/bsp/mcxn/boards/frdmmcxn947/board.mk delete mode 100644 hw/bsp/mcxn/boards/frdmmcxn947/clock_config.c delete mode 100644 hw/bsp/mcxn/boards/frdmmcxn947/clock_config.h delete mode 100644 hw/bsp/mcxn/boards/frdmmcxn947/pin_mux.c delete mode 100644 hw/bsp/mcxn/boards/frdmmcxn947/pin_mux.h delete mode 100644 hw/bsp/mcxn/boards/mcxn947brk/board.cmake delete mode 100644 hw/bsp/mcxn/boards/mcxn947brk/board.h delete mode 100644 hw/bsp/mcxn/boards/mcxn947brk/board.mk delete mode 100644 hw/bsp/mcxn/boards/mcxn947brk/clock_config.c delete mode 100644 hw/bsp/mcxn/boards/mcxn947brk/clock_config.h delete mode 100644 hw/bsp/mcxn/boards/mcxn947brk/pin_mux.c delete mode 100644 hw/bsp/mcxn/boards/mcxn947brk/pin_mux.h delete mode 100644 hw/bsp/mcxn/debug.jlinkscript delete mode 100644 hw/bsp/mcxn/family.c delete mode 100644 hw/bsp/mcxn/family.cmake delete mode 100644 hw/bsp/mcxn/family.mk delete mode 100644 src/portable/chipidea/ci_fs/ci_fs_mcxa.h (limited to 'src/common') diff --git a/README.rst b/README.rst index c48007c23..8c3145d33 100644 --- a/README.rst +++ b/README.rst @@ -139,9 +139,7 @@ Following CPUs are supported, check out `Supported Devices`_ for comprehensive l | +---------+--------------------------------------------------+ | | LPC | 11u, 13, 15, 17, 18, 40, 43, 51u, 54, 55 | | +---------+--------------------------------------------------+ -| | MCXA | A153 | -| +---------+--------------------------------------------------+ -| | MCXN | N9 | +| | MCX | A15, N9 | +--------------+---------+--------------------------------------------------+ | Raspberry Pi | RP2040 | +--------------+-----+------------------------------------------------------+ diff --git a/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h new file mode 100644 index 000000000..6f10a7ab0 --- /dev/null +++ b/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h @@ -0,0 +1,149 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +// skip if included from IAR assembler +#ifndef __IASMARM__ + #include "fsl_device_registers.h" +#endif + +/* Cortex M23/M33 port configuration. */ +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) + +#define configUSE_PREEMPTION 1 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +#define configCPU_CLOCK_HZ SystemCoreClock +#define configTICK_RATE_HZ ( 1000 ) +#define configMAX_PRIORITIES ( 5 ) +#define configMINIMAL_STACK_SIZE ( 128 ) +#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 ) +#define configMAX_TASK_NAME_LEN 16 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configQUEUE_REGISTRY_SIZE 4 +#define configUSE_QUEUE_SETS 0 +#define configUSE_TIME_SLICING 0 +#define configUSE_NEWLIB_REENTRANT 0 +#define configENABLE_BACKWARD_COMPATIBILITY 1 +#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 + +#define configSUPPORT_STATIC_ALLOCATION 1 +#define configSUPPORT_DYNAMIC_ALLOCATION 0 + +/* Hook function related definitions. */ +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning +#define configCHECK_FOR_STACK_OVERFLOW 2 +#define configCHECK_HANDLER_INSTALLATION 0 + +/* Run time and task stats gathering related definitions. */ +#define configGENERATE_RUN_TIME_STATS 0 +#define configRECORD_STACK_HIGH_ADDRESS 1 +#define configUSE_TRACE_FACILITY 1 // legacy trace +#define configUSE_STATS_FORMATTING_FUNCTIONS 0 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES 2 + +/* Software timer related definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2) +#define configTIMER_QUEUE_LENGTH 32 +#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE + +/* Optional functions - most linkers will remove unused functions anyway. */ +#define INCLUDE_vTaskPrioritySet 0 +#define INCLUDE_uxTaskPriorityGet 0 +#define INCLUDE_vTaskDelete 0 +#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY +#define INCLUDE_xResumeFromISR 0 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_xTaskGetSchedulerState 0 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 0 +#define INCLUDE_xTaskGetIdleTaskHandle 0 +#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 +#define INCLUDE_pcTaskGetTaskName 0 +#define INCLUDE_eTaskGetState 0 +#define INCLUDE_xEventGroupSetBitFromISR 0 +#define INCLUDE_xTimerPendFunctionCall 0 + +/* FreeRTOS hooks to NVIC vectors */ +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler +#define vPortSVCHandler SVC_Handler + +//--------------------------------------------------------------------+ +// Interrupt nesting behavior configuration. +//--------------------------------------------------------------------+ + +// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header +#define configPRIO_BITS 3 + +/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P0V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + } + + CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ + + CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO12M */ + + /* The flow of decreasing voltage and frequency */ + if (coreFreq > BOARD_BOOTCLOCKFRO12M_CORE_CLOCK) { + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P0V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + } + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + + /*!< Set up dividers */ + CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK; +} +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO24M ********************** + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockFRO24M +outputs: +- {id: CLK_1M_clock.outFreq, value: 1 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: CPU_clock.outFreq, value: 24 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz} +- {id: FRO_HF_clock.outFreq, value: 48 MHz} +- {id: MAIN_clock.outFreq, value: 48 MHz} +- {id: Slow_clock.outFreq, value: 6 MHz} +- {id: System_clock.outFreq, value: 24 MHz} +settings: +- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1} +- {id: SYSCON.AHBCLKDIV.scale, value: '2', locked: true} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockFRO24M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockFRO24M configuration + ******************************************************************************/ +void BOARD_BootClockFRO24M(void) +{ + uint32_t coreFreq; + spc_active_mode_core_ldo_option_t ldoOption; + spc_sram_voltage_config_t sramOption; + + /* Get the CPU Core frequency */ + coreFreq = CLOCK_GetCoreSysClkFreq(); + + /* The flow of increasing voltage and frequency */ + if (coreFreq <= BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) { + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P0V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + } + + CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ + + CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ + + CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */ + + /* The flow of decreasing voltage and frequency */ + if (coreFreq > BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) { + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P0V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + } + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + + /*!< Set up dividers */ + CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 2U); /* !< Set AHBCLKDIV divider to value 2 */ + CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFRO24M_CORE_CLOCK; +} +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO48M ********************** + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockFRO48M +outputs: +- {id: CLK_1M_clock.outFreq, value: 1 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: CPU_clock.outFreq, value: 48 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz} +- {id: FRO_HF_clock.outFreq, value: 48 MHz} +- {id: MAIN_clock.outFreq, value: 48 MHz} +- {id: Slow_clock.outFreq, value: 12 MHz} +- {id: System_clock.outFreq, value: 48 MHz} +settings: +- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockFRO48M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockFRO48M configuration + ******************************************************************************/ +void BOARD_BootClockFRO48M(void) +{ + uint32_t coreFreq; + spc_active_mode_core_ldo_option_t ldoOption; + spc_sram_voltage_config_t sramOption; + + /* Get the CPU Core frequency */ + coreFreq = CLOCK_GetCoreSysClkFreq(); + + /* The flow of increasing voltage and frequency */ + if (coreFreq <= BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) { + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P0V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + } + + CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ + + CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ + + CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */ + + /* The flow of decreasing voltage and frequency */ + if (coreFreq > BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) { + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P0V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + } + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + + /*!< Set up dividers */ + CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */ + CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFRO48M_CORE_CLOCK; +} +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO64M ********************** + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockFRO64M +outputs: +- {id: CLK_1M_clock.outFreq, value: 1 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: CPU_clock.outFreq, value: 64 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: FRO_HF_DIV_clock.outFreq, value: 64 MHz} +- {id: FRO_HF_clock.outFreq, value: 64 MHz} +- {id: MAIN_clock.outFreq, value: 64 MHz} +- {id: Slow_clock.outFreq, value: 16 MHz} +- {id: System_clock.outFreq, value: 64 MHz} +settings: +- {id: VDD_CORE, value: voltage_1v1} +- {id: MRCC.FROHFDIV.scale, value: '1', locked: true} +- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1} +- {id: SYSCON.AHBCLKDIV.scale, value: '1', locked: true} +sources: +- {id: SCG.FIRC.outFreq, value: 64 MHz} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockFRO64M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockFRO64M configuration + ******************************************************************************/ +void BOARD_BootClockFRO64M(void) +{ + uint32_t coreFreq; + spc_active_mode_core_ldo_option_t ldoOption; + spc_sram_voltage_config_t sramOption; + + /* Get the CPU Core frequency */ + coreFreq = CLOCK_GetCoreSysClkFreq(); + + /* The flow of increasing voltage and frequency */ + if (coreFreq <= BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) { + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P1V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + } + + CLOCK_SetupFROHFClocking(64000000U); /*!< Enable FRO HF(64MHz) output */ + + CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ + + CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */ + + /* The flow of decreasing voltage and frequency */ + if (coreFreq > BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) { + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P1V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + } + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + + /*!< Set up dividers */ + CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */ + CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFRO64M_CORE_CLOCK; +} +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO96M ********************** + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockFRO96M +called_from_default_init: true +outputs: +- {id: CLK_1M_clock.outFreq, value: 1 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: CPU_clock.outFreq, value: 96 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: FRO_HF_DIV_clock.outFreq, value: 96 MHz} +- {id: FRO_HF_clock.outFreq, value: 96 MHz} +- {id: MAIN_clock.outFreq, value: 96 MHz} +- {id: Slow_clock.outFreq, value: 24 MHz} +- {id: System_clock.outFreq, value: 96 MHz} +settings: +- {id: VDD_CORE, value: voltage_1v1} +- {id: CLKOUTDIV_HALT, value: Enable} +- {id: MRCC.FROHFDIV.scale, value: '1', locked: true} +- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1} +- {id: SYSCON.AHBCLKDIV.scale, value: '1', locked: true} +sources: +- {id: SCG.FIRC.outFreq, value: 96 MHz} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockFRO96M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockFRO96M configuration + ******************************************************************************/ +void BOARD_BootClockFRO96M(void) +{ + uint32_t coreFreq; + spc_active_mode_core_ldo_option_t ldoOption; + spc_sram_voltage_config_t sramOption; + + /* Get the CPU Core frequency */ + coreFreq = CLOCK_GetCoreSysClkFreq(); + + /* The flow of increasing voltage and frequency */ + if (coreFreq <= BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) { + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P1V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + } + + CLOCK_SetupFROHFClocking(96000000U); /*!< Enable FRO HF(96MHz) output */ + + CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ + + CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */ + + /* The flow of decreasing voltage and frequency */ + if (coreFreq > BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) { + /* Configure Flash to support different voltage level and frequency */ + FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U)); + /* Specifies the operating voltage for the SRAM's read/write timing margin */ + sramOption.operateVoltage = kSPC_sramOperateAt1P1V; + sramOption.requestVoltageUpdate = true; + (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); + /* Set the LDO_CORE VDD regulator level */ + ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; + ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; + (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); + } + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + + /*!< Set up dividers */ + CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */ + CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFRO96M_CORE_CLOCK; +} diff --git a/hw/bsp/mcx/boards/frdmmcxa153/clock_config.h b/hw/bsp/mcx/boards/frdmmcxa153/clock_config.h new file mode 100644 index 000000000..079d0d312 --- /dev/null +++ b/hw/bsp/mcx/boards/frdmmcxa153/clock_config.h @@ -0,0 +1,170 @@ +/* + * Copyright 2023 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*********************************************************************************************************************** + * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file + * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. + **********************************************************************************************************************/ + +#ifndef _CLOCK_CONFIG_H_ +#define _CLOCK_CONFIG_H_ + +#include "fsl_common.h" + +/******************************************************************************* + * Definitions + ******************************************************************************/ + +/******************************************************************************* + ************************ BOARD_InitBootClocks function ************************ + ******************************************************************************/ + +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes default configuration of clocks. + * + */ +void BOARD_InitBootClocks(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO12M ********************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFRO12M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFRO12M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFRO12M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO24M ********************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFRO24M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFRO24M_CORE_CLOCK 24000000U /*!< Core clock frequency: 24000000Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFRO24M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFRO24M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO48M ********************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFRO48M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFRO48M_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFRO48M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFRO48M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO64M ********************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFRO64M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFRO64M_CORE_CLOCK 64000000U /*!< Core clock frequency: 64000000Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFRO64M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFRO64M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO96M ********************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFRO96M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFRO96M_CORE_CLOCK 96000000U /*!< Core clock frequency: 96000000Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFRO96M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFRO96M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +#endif /* _CLOCK_CONFIG_H_ */ diff --git a/hw/bsp/mcx/boards/frdmmcxa153/pin_mux.c b/hw/bsp/mcx/boards/frdmmcxa153/pin_mux.c new file mode 100644 index 000000000..b0e6de560 --- /dev/null +++ b/hw/bsp/mcx/boards/frdmmcxa153/pin_mux.c @@ -0,0 +1,159 @@ +/* + * Copyright 2023 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*********************************************************************************************************************** + * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file + * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. + **********************************************************************************************************************/ + +/* clang-format off */ +/* + * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!GlobalInfo +product: Pins v14.0 +processor: MCXA153 +package_id: MCXA153VLH +mcu_data: ksdk2_0 +processor_version: 0.14.3 +pin_labels: +- {pin_num: '38', pin_signal: P3_12/LPUART2_RTS_B/CT1_MAT2/PWM0_X0, label: LED_RED, identifier: LED_RED} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** + */ +/* clang-format on */ + +#include "fsl_common.h" +#include "fsl_port.h" +#include "fsl_gpio.h" +#include "pin_mux.h" + +/* FUNCTION ************************************************************************************************************ + * + * Function Name : BOARD_InitBootPins + * Description : Calls initialization functions. + * + * END ****************************************************************************************************************/ +void BOARD_InitBootPins(void) +{ + BOARD_InitPins(); +} + +/* clang-format off */ +/* + * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +BOARD_InitPins: +- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'} +- pin_list: + - {pin_num: '38', peripheral: GPIO3, signal: 'GPIO, 12', pin_signal: P3_12/LPUART2_RTS_B/CT1_MAT2/PWM0_X0, direction: OUTPUT, gpio_init_state: 'false', slew_rate: fast, + open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** + */ +/* clang-format on */ + +/* FUNCTION ************************************************************************************************************ + * + * Function Name : BOARD_InitPins + * Description : Configures pin routing and optionally pin electrical features. + * + * END ****************************************************************************************************************/ +void BOARD_InitPins(void) +{ + RESET_PeripheralReset(kLPUART0_RST_SHIFT_RSTn); + RESET_PeripheralReset(kPORT0_RST_SHIFT_RSTn); + CLOCK_SetClockDiv(kCLOCK_DivLPUART0, 1u); + CLOCK_AttachClk(kFRO12M_to_LPUART0); + + /* write to PORT0: Peripheral clock is enabled */ + CLOCK_EnableClock(kCLOCK_GatePORT0); + + /* Write to GPIO3: Peripheral clock is enabled */ + CLOCK_EnableClock(kCLOCK_GateGPIO3); + /* Write to PORT3: Peripheral clock is enabled */ + CLOCK_EnableClock(kCLOCK_GatePORT3); + /* GPIO3 peripheral is released from reset */ + RESET_ReleasePeripheralReset(kGPIO3_RST_SHIFT_RSTn); + /* PORT3 peripheral is released from reset */ + RESET_ReleasePeripheralReset(kPORT3_RST_SHIFT_RSTn); + + const port_pin_config_t port3_12_pin38_config = {/* Internal pull-up/down resistor is disabled */ + kPORT_PullDisable, + /* Low internal pull resistor value is selected. */ + kPORT_LowPullResistor, + /* Fast slew rate is configured */ + kPORT_FastSlewRate, + /* Passive input filter is disabled */ + kPORT_PassiveFilterDisable, + /* Open drain output is disabled */ + kPORT_OpenDrainDisable, + /* Low drive strength is configured */ + kPORT_LowDriveStrength, + /* Normal drive strength is configured */ + kPORT_NormalDriveStrength, + /* Pin is configured as P3_12 */ + kPORT_MuxAlt0, + /* Digital input enabled */ + kPORT_InputBufferEnable, + /* Digital input is not inverted */ + kPORT_InputNormal, + /* Pin Control Register fields [15:0] are not locked */ + kPORT_UnlockRegister}; + /* PORT3_12 (pin 38) is configured as P3_12 */ + PORT_SetPinConfig(PORT3, 12U, &port3_12_pin38_config); + + const port_pin_config_t port0_2_pin51_config = {/* Internal pull-up resistor is enabled */ + kPORT_PullUp, + /* Low internal pull resistor value is selected. */ + kPORT_LowPullResistor, + /* Fast slew rate is configured */ + kPORT_FastSlewRate, + /* Passive input filter is disabled */ + kPORT_PassiveFilterDisable, + /* Open drain output is disabled */ + kPORT_OpenDrainDisable, + /* Low drive strength is configured */ + kPORT_LowDriveStrength, + /* Normal drive strength is configured */ + kPORT_NormalDriveStrength, + /* Pin is configured as LPUART0_RXD */ + kPORT_MuxAlt2, + /* Digital input enabled */ + kPORT_InputBufferEnable, + /* Digital input is not inverted */ + kPORT_InputNormal, + /* Pin Control Register fields [15:0] are not locked */ + kPORT_UnlockRegister}; + /* PORT0_2 (pin 51) is configured as LPUART0_RXD */ + PORT_SetPinConfig(PORT0, 2U, &port0_2_pin51_config); + + const port_pin_config_t port0_3_pin52_config = {/* Internal pull-up resistor is enabled */ + kPORT_PullUp, + /* Low internal pull resistor value is selected. */ + kPORT_LowPullResistor, + /* Fast slew rate is configured */ + kPORT_FastSlewRate, + /* Passive input filter is disabled */ + kPORT_PassiveFilterDisable, + /* Open drain output is disabled */ + kPORT_OpenDrainDisable, + /* Low drive strength is configured */ + kPORT_LowDriveStrength, + /* Normal drive strength is configured */ + kPORT_NormalDriveStrength, + /* Pin is configured as LPUART0_TXD */ + kPORT_MuxAlt2, + /* Digital input enabled */ + kPORT_InputBufferEnable, + /* Digital input is not inverted */ + kPORT_InputNormal, + /* Pin Control Register fields [15:0] are not locked */ + kPORT_UnlockRegister}; + /* PORT0_3 (pin 52) is configured as LPUART0_TXD */ + PORT_SetPinConfig(PORT0, 3U, &port0_3_pin52_config); + +} +/*********************************************************************************************************************** + * EOF + **********************************************************************************************************************/ diff --git a/hw/bsp/mcx/boards/frdmmcxa153/pin_mux.h b/hw/bsp/mcx/boards/frdmmcxa153/pin_mux.h new file mode 100644 index 000000000..06b6fdee9 --- /dev/null +++ b/hw/bsp/mcx/boards/frdmmcxa153/pin_mux.h @@ -0,0 +1,47 @@ +/* + * Copyright 2022 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef _PIN_MUX_H_ +#define _PIN_MUX_H_ + +/*! + * @addtogroup pin_mux + * @{ + */ + +/*********************************************************************************************************************** + * API + **********************************************************************************************************************/ + +#if defined(__cplusplus) +extern "C" { +#endif + +/*! + * @brief Calls initialization functions. + * + */ +void BOARD_InitBootPins(void); + +/*! + * @brief Configures pin routing and optionally pin electrical features. + * + */ +void BOARD_InitPins(void); + +#if defined(__cplusplus) +} +#endif + +/*! + * @} + */ +#endif /* _PIN_MUX_H_ */ + +/*********************************************************************************************************************** + * EOF + **********************************************************************************************************************/ diff --git a/hw/bsp/mcx/boards/frdmmcxn947/board.cmake b/hw/bsp/mcx/boards/frdmmcxn947/board.cmake new file mode 100644 index 000000000..a08d248f5 --- /dev/null +++ b/hw/bsp/mcx/boards/frdmmcxn947/board.cmake @@ -0,0 +1,24 @@ +set(MCU_VARIANT MCXN947) +set(MCU_CORE MCXN947_cm33_core0) + +set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor") +set(FAMILY_MCUS MCXN9 CACHE INTERNAL "") + +set(JLINK_DEVICE MCXN947_M33_0) +set(PYOCD_TARGET MCXN947) +set(NXPLINK_DEVICE MCXN947:MCXN947) + +set(PORT 1) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + CPU_MCXN947VDF_cm33_core0 + BOARD_TUD_RHPORT=${PORT} + # port 0 is fullspeed, port 1 is highspeed + BOARD_TUD_MAX_SPEED=$ + ) + target_sources(${TARGET} PUBLIC + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pin_mux.c + ) +endfunction() diff --git a/hw/bsp/mcx/boards/frdmmcxn947/board.h b/hw/bsp/mcx/boards/frdmmcxn947/board.h new file mode 100644 index 000000000..acb73363f --- /dev/null +++ b/hw/bsp/mcx/boards/frdmmcxn947/board.h @@ -0,0 +1,66 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +// LED +#define LED_GPIO GPIO0 +#define LED_CLK kCLOCK_Gpio0 +#define LED_PIN 10 // red +#define LED_STATE_ON 0 + +// WAKE button (Dummy, use unused pin +#define BUTTON_GPIO GPIO0 +#define BUTTON_CLK kCLOCK_Gpio0 +#define BUTTON_PIN 23 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_DEV LPUART4 + +static inline void board_uart_init_clock(void) { + /* attach FRO 12M to FLEXCOMM4 */ + CLOCK_SetClkDiv(kCLOCK_DivFlexcom4Clk, 1u); + CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4); + RESET_ClearPeripheralReset(kFC4_RST_SHIFT_RSTn); +} + +//#define UART_RX_PINMUX 0, 24, IOCON_PIO_DIG_FUNC1_EN +//#define UART_TX_PINMUX 0, 25, IOCON_PIO_DIG_FUNC1_EN + +// XTAL +#define XTAL0_CLK_HZ (24 * 1000 * 1000U) + +#ifdef __cplusplus + } +#endif + +#endif diff --git a/hw/bsp/mcx/boards/frdmmcxn947/board.mk b/hw/bsp/mcx/boards/frdmmcxn947/board.mk new file mode 100644 index 000000000..d90780996 --- /dev/null +++ b/hw/bsp/mcx/boards/frdmmcxn947/board.mk @@ -0,0 +1,14 @@ +MCU_VARIANT = MCXN947 +MCU_CORE = MCXN947_cm33_core0 +PORT ?= 1 + +CPU_CORE ?= cortex-m33 +CFLAGS += \ + -DCPU_MCXN947VDF_cm33_core0 \ + -DCFG_TUSB_MCU=OPT_MCU_MCXN9 \ + +JLINK_DEVICE = MCXN947_M33_0 +PYOCD_TARGET = MCXN947 + +# flash using pyocd +flash: flash-jlink diff --git a/hw/bsp/mcx/boards/frdmmcxn947/clock_config.c b/hw/bsp/mcx/boards/frdmmcxn947/clock_config.c new file mode 100644 index 000000000..37d2b4dfc --- /dev/null +++ b/hw/bsp/mcx/boards/frdmmcxn947/clock_config.c @@ -0,0 +1,338 @@ +/* + * Copyright 2022 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*********************************************************************************************************************** + * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file + * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. + **********************************************************************************************************************/ +/* + * How to setup clock using clock driver functions: + * + * 1. Setup clock sources. + * + * 2. Set up wait states of the flash. + * + * 3. Set up all dividers. + * + * 4. Set up all selectors to provide selected clocks. + * + */ + +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!GlobalInfo +product: Clocks v10.0 +processor: MCXN947 +package_id: MCXN947VDF +mcu_data: ksdk2_0 +processor_version: 0.12.3 +board: MCX-N9XX-EVK + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +#include "clock_config.h" +#include "fsl_clock.h" + +/******************************************************************************* + * Definitions + ******************************************************************************/ + +/******************************************************************************* + * Variables + ******************************************************************************/ +/* System clock frequency. */ +// extern uint32_t SystemCoreClock; + +/******************************************************************************* + ************************ BOARD_InitBootClocks function ************************ + ******************************************************************************/ +void BOARD_InitBootClocks(void) +{ + BOARD_BootClockPLL150M(); +} + +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO12M ********************** + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockFRO12M +outputs: +- {id: CLK_144M_clock.outFreq, value: 144 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: MAIN_clock.outFreq, value: 12 MHz} +- {id: Slow_clock.outFreq, value: 3 MHz} +- {id: System_clock.outFreq, value: 12 MHz} +- {id: gdet_clock.outFreq, value: 48 MHz} +- {id: trng_clock.outFreq, value: 48 MHz} +settings: +- {id: SCGMode, value: SIRC} +- {id: SCG.SCSSEL.sel, value: SCG.SIRC} +- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled} +- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} +- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockFRO12M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockFRO12M configuration + ******************************************************************************/ +void BOARD_BootClockFRO12M(void) +{ + /*!< Enable SCG clock */ + CLOCK_EnableClock(kCLOCK_Scg); + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */ + + /*!< Set up dividers */ + CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK; +} + +/******************************************************************************* + ******************* Configuration BOARD_BootClockFROHF48M ********************* + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockFROHF48M +outputs: +- {id: CLK_144M_clock.outFreq, value: 144 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: FRO_HF_clock.outFreq, value: 48 MHz} +- {id: MAIN_clock.outFreq, value: 48 MHz} +- {id: Slow_clock.outFreq, value: 12 MHz} +- {id: System_clock.outFreq, value: 48 MHz} +- {id: gdet_clock.outFreq, value: 48 MHz} +- {id: trng_clock.outFreq, value: 48 MHz} +settings: +- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} +- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} +- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} +- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockFROHF48M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockFROHF48M configuration + ******************************************************************************/ +void BOARD_BootClockFROHF48M(void) +{ + /*!< Enable SCG clock */ + CLOCK_EnableClock(kCLOCK_Scg); + + CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ + + /*!< Set up dividers */ + CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK; +} + +/******************************************************************************* + ******************* Configuration BOARD_BootClockFROHF144M ******************** + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockFROHF144M +outputs: +- {id: CLK_144M_clock.outFreq, value: 144 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: FRO_HF_clock.outFreq, value: 144 MHz} +- {id: MAIN_clock.outFreq, value: 144 MHz} +- {id: Slow_clock.outFreq, value: 18 MHz} +- {id: System_clock.outFreq, value: 72 MHz} +- {id: gdet_clock.outFreq, value: 48 MHz} +- {id: trng_clock.outFreq, value: 48 MHz} +settings: +- {id: SYSCON.AHBCLKDIV.scale, value: '2', locked: true} +- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} +- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} +- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} +- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} +sources: +- {id: SCG.FIRC.outFreq, value: 144 MHz} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockFROHF144M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockFROHF144M configuration + ******************************************************************************/ +void BOARD_BootClockFROHF144M(void) +{ + /*!< Enable SCG clock */ + CLOCK_EnableClock(kCLOCK_Scg); + + CLOCK_SetupFROHFClocking(144000000U); /*!< Enable FRO HF(144MHz) output */ + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ + + /*!< Set up dividers */ + CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 2U); /*!< Set AHBCLKDIV divider to value 2 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK; +} + +/******************************************************************************* + ******************** Configuration BOARD_BootClockPLL150M ********************* + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockPLL150M +called_from_default_init: true +outputs: +- {id: CLK_144M_clock.outFreq, value: 144 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: FRO_HF_clock.outFreq, value: 48 MHz} +- {id: MAIN_clock.outFreq, value: 150 MHz} +- {id: PLL0_CLK_clock.outFreq, value: 150 MHz} +- {id: Slow_clock.outFreq, value: 37.5 MHz} +- {id: System_clock.outFreq, value: 150 MHz} +- {id: gdet_clock.outFreq, value: 48 MHz} +- {id: trng_clock.outFreq, value: 48 MHz} +settings: +- {id: PLL0_Mode, value: Normal} +- {id: RunPowerMode, value: OD} +- {id: SCGMode, value: PLL0} +- {id: SCG.PLL0M_MULT.scale, value: '50', locked: true} +- {id: SCG.PLL0SRCSEL.sel, value: SCG.FIRC_48M} +- {id: SCG.PLL0_NDIV.scale, value: '8', locked: true} +- {id: SCG.SCSSEL.sel, value: SCG.PLL0_CLK} +- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} +- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} +- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} +- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockPLL150M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockPLL150M configuration + ******************************************************************************/ +void BOARD_BootClockPLL150M(void) +{ + /*!< Enable SCG clock */ + CLOCK_EnableClock(kCLOCK_Scg); + + CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ + + /*!< Set up PLL0 */ + const pll_setup_t pll0Setup = { + .pllctrl = SCG_APLLCTRL_SOURCE(1U) | SCG_APLLCTRL_SELI(27U) | SCG_APLLCTRL_SELP(13U), + .pllndiv = SCG_APLLNDIV_NDIV(8U), + .pllpdiv = SCG_APLLPDIV_PDIV(1U), + .pllmdiv = SCG_APLLMDIV_MDIV(50U), + .pllRate = 150000000U + }; + CLOCK_SetPLL0Freq(&pll0Setup); /*!< Configure PLL0 to the desired values */ + CLOCK_SetPll0MonitorMode(kSCG_Pll0MonitorDisable); /* Pll0 Monitor is disabled */ + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + CLOCK_AttachClk(kPLL0_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL0 */ + + /*!< Set up dividers */ + CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK; +} + +/******************************************************************************* + ******************** Configuration BOARD_BootClockPLL100M ********************* + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockPLL100M +outputs: +- {id: CLK_144M_clock.outFreq, value: 144 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: CLK_IN_clock.outFreq, value: 24 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: MAIN_clock.outFreq, value: 100 MHz} +- {id: PLL1_CLK_clock.outFreq, value: 100 MHz} +- {id: Slow_clock.outFreq, value: 25 MHz} +- {id: System_clock.outFreq, value: 100 MHz} +- {id: gdet_clock.outFreq, value: 48 MHz} +- {id: trng_clock.outFreq, value: 48 MHz} +settings: +- {id: PLL1_Mode, value: Normal} +- {id: SCGMode, value: PLL1} +- {id: SCG.PLL1M_MULT.scale, value: '100', locked: true} +- {id: SCG.PLL1_NDIV.scale, value: '6', locked: true} +- {id: SCG.PLL1_PDIV.scale, value: '4', locked: true} +- {id: SCG.SCSSEL.sel, value: SCG.PLL1_CLK} +- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled} +- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled} +- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} +- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} +sources: +- {id: SCG.SOSC.outFreq, value: 24 MHz, enabled: true} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockPLL100M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockPLL100M configuration + ******************************************************************************/ +void BOARD_BootClockPLL100M(void) +{ + /*!< Enable SCG clock */ + CLOCK_EnableClock(kCLOCK_Scg); + + CLOCK_SetupExtClocking(24000000U); + CLOCK_SetSysOscMonitorMode(kSCG_SysOscMonitorDisable); /* System OSC Clock Monitor is disabled */ + + /*!< Set up PLL1 */ + const pll_setup_t pll1Setup = { + .pllctrl = SCG_SPLLCTRL_SOURCE(0U) | SCG_SPLLCTRL_SELI(53U) | SCG_SPLLCTRL_SELP(26U), + .pllndiv = SCG_SPLLNDIV_NDIV(6U), + .pllpdiv = SCG_SPLLPDIV_PDIV(2U), + .pllmdiv = SCG_SPLLMDIV_MDIV(100U), + .pllRate = 100000000U + }; + CLOCK_SetPLL1Freq(&pll1Setup); /*!< Configure PLL1 to the desired values */ + CLOCK_SetPll1MonitorMode(kSCG_Pll1MonitorDisable); /* Pll1 Monitor is disabled */ + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + CLOCK_AttachClk(kPLL1_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL1 */ + + /*!< Set up dividers */ + CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK; +} diff --git a/hw/bsp/mcx/boards/frdmmcxn947/clock_config.h b/hw/bsp/mcx/boards/frdmmcxn947/clock_config.h new file mode 100644 index 000000000..c238a0423 --- /dev/null +++ b/hw/bsp/mcx/boards/frdmmcxn947/clock_config.h @@ -0,0 +1,177 @@ +/* + * Copyright 2022 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*********************************************************************************************************************** + * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file + * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. + **********************************************************************************************************************/ + +#ifndef _CLOCK_CONFIG_H_ +#define _CLOCK_CONFIG_H_ + +#include "fsl_common.h" + +/******************************************************************************* + * Definitions + ******************************************************************************/ +#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal frequency in Hz */ +#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32K frequency in Hz */ + +/******************************************************************************* + ************************ BOARD_InitBootClocks function ************************ + ******************************************************************************/ + +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes default configuration of clocks. + * + */ +void BOARD_InitBootClocks(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO12M ********************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFRO12M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */ +#define BOARD_BOOTCLOCKFRO12M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFRO12M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFRO12M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************* Configuration BOARD_BootClockFROHF48M ********************* + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFROHF48M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ +#define BOARD_BOOTCLOCKFROHF48M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFROHF48M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFROHF48M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************* Configuration BOARD_BootClockFROHF144M ******************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFROHF144M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK 144000000U /*!< Core clock frequency: 144000000Hz */ +#define BOARD_BOOTCLOCKFROHF144M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFROHF144M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFROHF144M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockPLL150M ********************* + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockPLL150M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 150000000U /*!< Core clock frequency: 150000000Hz */ +#define BOARD_BOOTCLOCKPLL150M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockPLL150M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockPLL150M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockPLL100M ********************* + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockPLL100M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK 100000000U /*!< Core clock frequency: 100000000Hz */ +#define BOARD_BOOTCLOCKPLL100M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockPLL100M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockPLL100M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +#endif /* _CLOCK_CONFIG_H_ */ diff --git a/hw/bsp/mcx/boards/frdmmcxn947/pin_mux.c b/hw/bsp/mcx/boards/frdmmcxn947/pin_mux.c new file mode 100644 index 000000000..c33790ac5 --- /dev/null +++ b/hw/bsp/mcx/boards/frdmmcxn947/pin_mux.c @@ -0,0 +1,143 @@ +/* + * Copyright 2022 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +/*********************************************************************************************************************** + * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file + * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. + **********************************************************************************************************************/ + +/* clang-format off */ +/* + * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!GlobalInfo +product: Pins v12.0 +processor: MCXN947 +package_id: MCXN947VDF +mcu_data: ksdk2_0 +processor_version: 0.12.3 + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** + */ +/* clang-format on */ + +#include "fsl_common.h" +#include "fsl_port.h" +#include "pin_mux.h" + +/* FUNCTION ************************************************************************************************************ + * + * Function Name : BOARD_InitBootPins + * Description : Calls initialization functions. + * + * END ****************************************************************************************************************/ +void BOARD_InitBootPins(void) +{ + BOARD_InitPins(); +} + +/* clang-format off */ +/* + * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +BOARD_InitPins: +- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'} +- pin_list: + - {pin_num: A1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P0, pin_signal: PIO1_8/WUU0_IN10/LPTMR1_ALT3/TRACE_DATA0/FC4_P0/FC5_P4/CT_INP8/SCT0_OUT2/FLEXIO0_D16/PLU_OUT0/ENET0_TXD2/I3C1_SDA/TSI0_CH17/ADC1_A8, + slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, pull_value: low, input_buffer: enable, + invert_input: normal} + - {pin_num: B1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P1, pin_signal: PIO1_9/TRACE_DATA1/FC4_P1/FC5_P5/CT_INP9/SCT0_OUT3/FLEXIO0_D17/PLU_OUT1/ENET0_TXD3/I3C1_SCL/TSI0_CH18/ADC1_A9, + slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, input_buffer: enable, invert_input: normal} + - {pin_num: B7, peripheral: GPIO0, signal: 'GPIO, 23', pin_signal: PIO0_23/WUU0_IN5/EWM0_OUT_b/FC1_P3/CT_INP3/FLEXIO0_D7/ADC0_A15/CMP2_IN2, direction: INPUT, slew_rate: fast, + open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** + */ +/* clang-format on */ + +/* FUNCTION ************************************************************************************************************ + * + * Function Name : BOARD_InitPins + * Description : Configures pin routing and optionally pin electrical features. + * + * END ****************************************************************************************************************/ +void BOARD_InitPins(void) +{ + /* Enables the clock for PORT0: Enables clock */ + CLOCK_EnableClock(kCLOCK_Port0); + + /* Enables the clock for PORT1: Enables clock */ + CLOCK_EnableClock(kCLOCK_Port1); + + + const port_pin_config_t port1_8_pinA1_config = {/* Internal pull-up/down resistor is disabled */ + kPORT_PullDisable, + /* Low internal pull resistor value is selected. */ + kPORT_LowPullResistor, + /* Fast slew rate is configured */ + kPORT_FastSlewRate, + /* Passive input filter is disabled */ + kPORT_PassiveFilterDisable, + /* Open drain output is disabled */ + kPORT_OpenDrainDisable, + /* Low drive strength is configured */ + kPORT_LowDriveStrength, + /* Pin is configured as FC4_P0 */ + kPORT_MuxAlt2, + /* Digital input enabled */ + kPORT_InputBufferEnable, + /* Digital input is not inverted */ + kPORT_InputNormal, + /* Pin Control Register fields [15:0] are not locked */ + kPORT_UnlockRegister}; + /* PORT1_8 (pin A1) is configured as FC4_P0 */ + PORT_SetPinConfig(PORT1, 8U, &port1_8_pinA1_config); + + const port_pin_config_t port1_9_pinB1_config = {/* Internal pull-up/down resistor is disabled */ + kPORT_PullDisable, + /* Low internal pull resistor value is selected. */ + kPORT_LowPullResistor, + /* Fast slew rate is configured */ + kPORT_FastSlewRate, + /* Passive input filter is disabled */ + kPORT_PassiveFilterDisable, + /* Open drain output is disabled */ + kPORT_OpenDrainDisable, + /* Low drive strength is configured */ + kPORT_LowDriveStrength, + /* Pin is configured as FC4_P1 */ + kPORT_MuxAlt2, + /* Digital input enabled */ + kPORT_InputBufferEnable, + /* Digital input is not inverted */ + kPORT_InputNormal, + /* Pin Control Register fields [15:0] are not locked */ + kPORT_UnlockRegister}; + /* PORT1_9 (pin B1) is configured as FC4_P1 */ + PORT_SetPinConfig(PORT1, 9U, &port1_9_pinB1_config); + + const port_pin_config_t SW2 = {/* Internal pull-up/down resistor is disabled */ + kPORT_PullDisable, + /* Low internal pull resistor value is selected. */ + kPORT_LowPullResistor, + /* Fast slew rate is configured */ + kPORT_FastSlewRate, + /* Passive input filter is disabled */ + kPORT_PassiveFilterDisable, + /* Open drain output is disabled */ + kPORT_OpenDrainDisable, + /* Low drive strength is configured */ + kPORT_LowDriveStrength, + /* Pin is configured as PIO0_23 */ + kPORT_MuxAlt0, + /* Digital input enabled */ + kPORT_InputBufferEnable, + /* Digital input is not inverted */ + kPORT_InputNormal, + /* Pin Control Register fields [15:0] are not locked */ + kPORT_UnlockRegister}; + /* PORT0_23 (pin B7) is configured as PIO0_23 */ + PORT_SetPinConfig(PORT0, 23U, &SW2); +} +/*********************************************************************************************************************** + * EOF + **********************************************************************************************************************/ diff --git a/hw/bsp/mcx/boards/frdmmcxn947/pin_mux.h b/hw/bsp/mcx/boards/frdmmcxn947/pin_mux.h new file mode 100644 index 000000000..40968c275 --- /dev/null +++ b/hw/bsp/mcx/boards/frdmmcxn947/pin_mux.h @@ -0,0 +1,51 @@ +/* + * Copyright 2022 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +/*********************************************************************************************************************** + * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file + * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. + **********************************************************************************************************************/ + +#ifndef _PIN_MUX_H_ +#define _PIN_MUX_H_ + +/*! + * @addtogroup pin_mux + * @{ + */ + +/*********************************************************************************************************************** + * API + **********************************************************************************************************************/ + +#if defined(__cplusplus) +extern "C" { +#endif + +/*! + * @brief Calls initialization functions. + * + */ +void BOARD_InitBootPins(void); + +/*! + * @brief Configures pin routing and optionally pin electrical features. + * + */ +void BOARD_InitPins(void); + +#if defined(__cplusplus) +} +#endif + +/*! + * @} + */ +#endif /* _PIN_MUX_H_ */ + +/*********************************************************************************************************************** + * EOF + **********************************************************************************************************************/ diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.cmake b/hw/bsp/mcx/boards/mcxn947brk/board.cmake new file mode 100644 index 000000000..a08d248f5 --- /dev/null +++ b/hw/bsp/mcx/boards/mcxn947brk/board.cmake @@ -0,0 +1,24 @@ +set(MCU_VARIANT MCXN947) +set(MCU_CORE MCXN947_cm33_core0) + +set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor") +set(FAMILY_MCUS MCXN9 CACHE INTERNAL "") + +set(JLINK_DEVICE MCXN947_M33_0) +set(PYOCD_TARGET MCXN947) +set(NXPLINK_DEVICE MCXN947:MCXN947) + +set(PORT 1) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + CPU_MCXN947VDF_cm33_core0 + BOARD_TUD_RHPORT=${PORT} + # port 0 is fullspeed, port 1 is highspeed + BOARD_TUD_MAX_SPEED=$ + ) + target_sources(${TARGET} PUBLIC + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pin_mux.c + ) +endfunction() diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.h b/hw/bsp/mcx/boards/mcxn947brk/board.h new file mode 100644 index 000000000..eae98bfa7 --- /dev/null +++ b/hw/bsp/mcx/boards/mcxn947brk/board.h @@ -0,0 +1,66 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +// LED +#define LED_GPIO GPIO3 +#define LED_CLK kCLOCK_Gpio3 +#define LED_PIN 4 // red +#define LED_STATE_ON 0 + +// WAKE button (Dummy, use unused pin +#define BUTTON_GPIO GPIO0 +#define BUTTON_CLK kCLOCK_Gpio0 +#define BUTTON_PIN 6 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_DEV LPUART4 + +static inline void board_uart_init_clock(void) { + /* attach FRO 12M to FLEXCOMM4 */ + CLOCK_SetClkDiv(kCLOCK_DivFlexcom4Clk, 1u); + CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4); + RESET_ClearPeripheralReset(kFC4_RST_SHIFT_RSTn); +} + +//#define UART_RX_PINMUX 0, 24, IOCON_PIO_DIG_FUNC1_EN +//#define UART_TX_PINMUX 0, 25, IOCON_PIO_DIG_FUNC1_EN + +// XTAL +#define XTAL0_CLK_HZ (24 * 1000 * 1000U) + +#ifdef __cplusplus + } +#endif + +#endif diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.mk b/hw/bsp/mcx/boards/mcxn947brk/board.mk new file mode 100644 index 000000000..d90780996 --- /dev/null +++ b/hw/bsp/mcx/boards/mcxn947brk/board.mk @@ -0,0 +1,14 @@ +MCU_VARIANT = MCXN947 +MCU_CORE = MCXN947_cm33_core0 +PORT ?= 1 + +CPU_CORE ?= cortex-m33 +CFLAGS += \ + -DCPU_MCXN947VDF_cm33_core0 \ + -DCFG_TUSB_MCU=OPT_MCU_MCXN9 \ + +JLINK_DEVICE = MCXN947_M33_0 +PYOCD_TARGET = MCXN947 + +# flash using pyocd +flash: flash-jlink diff --git a/hw/bsp/mcx/boards/mcxn947brk/clock_config.c b/hw/bsp/mcx/boards/mcxn947brk/clock_config.c new file mode 100644 index 000000000..37d2b4dfc --- /dev/null +++ b/hw/bsp/mcx/boards/mcxn947brk/clock_config.c @@ -0,0 +1,338 @@ +/* + * Copyright 2022 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*********************************************************************************************************************** + * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file + * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. + **********************************************************************************************************************/ +/* + * How to setup clock using clock driver functions: + * + * 1. Setup clock sources. + * + * 2. Set up wait states of the flash. + * + * 3. Set up all dividers. + * + * 4. Set up all selectors to provide selected clocks. + * + */ + +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!GlobalInfo +product: Clocks v10.0 +processor: MCXN947 +package_id: MCXN947VDF +mcu_data: ksdk2_0 +processor_version: 0.12.3 +board: MCX-N9XX-EVK + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +#include "clock_config.h" +#include "fsl_clock.h" + +/******************************************************************************* + * Definitions + ******************************************************************************/ + +/******************************************************************************* + * Variables + ******************************************************************************/ +/* System clock frequency. */ +// extern uint32_t SystemCoreClock; + +/******************************************************************************* + ************************ BOARD_InitBootClocks function ************************ + ******************************************************************************/ +void BOARD_InitBootClocks(void) +{ + BOARD_BootClockPLL150M(); +} + +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO12M ********************** + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockFRO12M +outputs: +- {id: CLK_144M_clock.outFreq, value: 144 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: MAIN_clock.outFreq, value: 12 MHz} +- {id: Slow_clock.outFreq, value: 3 MHz} +- {id: System_clock.outFreq, value: 12 MHz} +- {id: gdet_clock.outFreq, value: 48 MHz} +- {id: trng_clock.outFreq, value: 48 MHz} +settings: +- {id: SCGMode, value: SIRC} +- {id: SCG.SCSSEL.sel, value: SCG.SIRC} +- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled} +- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} +- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockFRO12M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockFRO12M configuration + ******************************************************************************/ +void BOARD_BootClockFRO12M(void) +{ + /*!< Enable SCG clock */ + CLOCK_EnableClock(kCLOCK_Scg); + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */ + + /*!< Set up dividers */ + CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK; +} + +/******************************************************************************* + ******************* Configuration BOARD_BootClockFROHF48M ********************* + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockFROHF48M +outputs: +- {id: CLK_144M_clock.outFreq, value: 144 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: FRO_HF_clock.outFreq, value: 48 MHz} +- {id: MAIN_clock.outFreq, value: 48 MHz} +- {id: Slow_clock.outFreq, value: 12 MHz} +- {id: System_clock.outFreq, value: 48 MHz} +- {id: gdet_clock.outFreq, value: 48 MHz} +- {id: trng_clock.outFreq, value: 48 MHz} +settings: +- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} +- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} +- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} +- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockFROHF48M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockFROHF48M configuration + ******************************************************************************/ +void BOARD_BootClockFROHF48M(void) +{ + /*!< Enable SCG clock */ + CLOCK_EnableClock(kCLOCK_Scg); + + CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ + + /*!< Set up dividers */ + CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK; +} + +/******************************************************************************* + ******************* Configuration BOARD_BootClockFROHF144M ******************** + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockFROHF144M +outputs: +- {id: CLK_144M_clock.outFreq, value: 144 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: FRO_HF_clock.outFreq, value: 144 MHz} +- {id: MAIN_clock.outFreq, value: 144 MHz} +- {id: Slow_clock.outFreq, value: 18 MHz} +- {id: System_clock.outFreq, value: 72 MHz} +- {id: gdet_clock.outFreq, value: 48 MHz} +- {id: trng_clock.outFreq, value: 48 MHz} +settings: +- {id: SYSCON.AHBCLKDIV.scale, value: '2', locked: true} +- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} +- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} +- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} +- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} +sources: +- {id: SCG.FIRC.outFreq, value: 144 MHz} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockFROHF144M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockFROHF144M configuration + ******************************************************************************/ +void BOARD_BootClockFROHF144M(void) +{ + /*!< Enable SCG clock */ + CLOCK_EnableClock(kCLOCK_Scg); + + CLOCK_SetupFROHFClocking(144000000U); /*!< Enable FRO HF(144MHz) output */ + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ + + /*!< Set up dividers */ + CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 2U); /*!< Set AHBCLKDIV divider to value 2 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK; +} + +/******************************************************************************* + ******************** Configuration BOARD_BootClockPLL150M ********************* + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockPLL150M +called_from_default_init: true +outputs: +- {id: CLK_144M_clock.outFreq, value: 144 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: FRO_HF_clock.outFreq, value: 48 MHz} +- {id: MAIN_clock.outFreq, value: 150 MHz} +- {id: PLL0_CLK_clock.outFreq, value: 150 MHz} +- {id: Slow_clock.outFreq, value: 37.5 MHz} +- {id: System_clock.outFreq, value: 150 MHz} +- {id: gdet_clock.outFreq, value: 48 MHz} +- {id: trng_clock.outFreq, value: 48 MHz} +settings: +- {id: PLL0_Mode, value: Normal} +- {id: RunPowerMode, value: OD} +- {id: SCGMode, value: PLL0} +- {id: SCG.PLL0M_MULT.scale, value: '50', locked: true} +- {id: SCG.PLL0SRCSEL.sel, value: SCG.FIRC_48M} +- {id: SCG.PLL0_NDIV.scale, value: '8', locked: true} +- {id: SCG.SCSSEL.sel, value: SCG.PLL0_CLK} +- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} +- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} +- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} +- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockPLL150M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockPLL150M configuration + ******************************************************************************/ +void BOARD_BootClockPLL150M(void) +{ + /*!< Enable SCG clock */ + CLOCK_EnableClock(kCLOCK_Scg); + + CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ + + /*!< Set up PLL0 */ + const pll_setup_t pll0Setup = { + .pllctrl = SCG_APLLCTRL_SOURCE(1U) | SCG_APLLCTRL_SELI(27U) | SCG_APLLCTRL_SELP(13U), + .pllndiv = SCG_APLLNDIV_NDIV(8U), + .pllpdiv = SCG_APLLPDIV_PDIV(1U), + .pllmdiv = SCG_APLLMDIV_MDIV(50U), + .pllRate = 150000000U + }; + CLOCK_SetPLL0Freq(&pll0Setup); /*!< Configure PLL0 to the desired values */ + CLOCK_SetPll0MonitorMode(kSCG_Pll0MonitorDisable); /* Pll0 Monitor is disabled */ + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + CLOCK_AttachClk(kPLL0_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL0 */ + + /*!< Set up dividers */ + CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK; +} + +/******************************************************************************* + ******************** Configuration BOARD_BootClockPLL100M ********************* + ******************************************************************************/ +/* clang-format off */ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockPLL100M +outputs: +- {id: CLK_144M_clock.outFreq, value: 144 MHz} +- {id: CLK_48M_clock.outFreq, value: 48 MHz} +- {id: CLK_IN_clock.outFreq, value: 24 MHz} +- {id: FRO_12M_clock.outFreq, value: 12 MHz} +- {id: MAIN_clock.outFreq, value: 100 MHz} +- {id: PLL1_CLK_clock.outFreq, value: 100 MHz} +- {id: Slow_clock.outFreq, value: 25 MHz} +- {id: System_clock.outFreq, value: 100 MHz} +- {id: gdet_clock.outFreq, value: 48 MHz} +- {id: trng_clock.outFreq, value: 48 MHz} +settings: +- {id: PLL1_Mode, value: Normal} +- {id: SCGMode, value: PLL1} +- {id: SCG.PLL1M_MULT.scale, value: '100', locked: true} +- {id: SCG.PLL1_NDIV.scale, value: '6', locked: true} +- {id: SCG.PLL1_PDIV.scale, value: '4', locked: true} +- {id: SCG.SCSSEL.sel, value: SCG.PLL1_CLK} +- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled} +- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled} +- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} +- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} +sources: +- {id: SCG.SOSC.outFreq, value: 24 MHz, enabled: true} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +/* clang-format on */ + +/******************************************************************************* + * Variables for BOARD_BootClockPLL100M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockPLL100M configuration + ******************************************************************************/ +void BOARD_BootClockPLL100M(void) +{ + /*!< Enable SCG clock */ + CLOCK_EnableClock(kCLOCK_Scg); + + CLOCK_SetupExtClocking(24000000U); + CLOCK_SetSysOscMonitorMode(kSCG_SysOscMonitorDisable); /* System OSC Clock Monitor is disabled */ + + /*!< Set up PLL1 */ + const pll_setup_t pll1Setup = { + .pllctrl = SCG_SPLLCTRL_SOURCE(0U) | SCG_SPLLCTRL_SELI(53U) | SCG_SPLLCTRL_SELP(26U), + .pllndiv = SCG_SPLLNDIV_NDIV(6U), + .pllpdiv = SCG_SPLLPDIV_PDIV(2U), + .pllmdiv = SCG_SPLLMDIV_MDIV(100U), + .pllRate = 100000000U + }; + CLOCK_SetPLL1Freq(&pll1Setup); /*!< Configure PLL1 to the desired values */ + CLOCK_SetPll1MonitorMode(kSCG_Pll1MonitorDisable); /* Pll1 Monitor is disabled */ + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + CLOCK_AttachClk(kPLL1_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL1 */ + + /*!< Set up dividers */ + CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ + + /* Set SystemCoreClock variable */ + SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK; +} diff --git a/hw/bsp/mcx/boards/mcxn947brk/clock_config.h b/hw/bsp/mcx/boards/mcxn947brk/clock_config.h new file mode 100644 index 000000000..c238a0423 --- /dev/null +++ b/hw/bsp/mcx/boards/mcxn947brk/clock_config.h @@ -0,0 +1,177 @@ +/* + * Copyright 2022 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/*********************************************************************************************************************** + * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file + * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. + **********************************************************************************************************************/ + +#ifndef _CLOCK_CONFIG_H_ +#define _CLOCK_CONFIG_H_ + +#include "fsl_common.h" + +/******************************************************************************* + * Definitions + ******************************************************************************/ +#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal frequency in Hz */ +#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32K frequency in Hz */ + +/******************************************************************************* + ************************ BOARD_InitBootClocks function ************************ + ******************************************************************************/ + +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes default configuration of clocks. + * + */ +void BOARD_InitBootClocks(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockFRO12M ********************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFRO12M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */ +#define BOARD_BOOTCLOCKFRO12M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFRO12M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFRO12M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************* Configuration BOARD_BootClockFROHF48M ********************* + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFROHF48M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ +#define BOARD_BOOTCLOCKFROHF48M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFROHF48M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFROHF48M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************* Configuration BOARD_BootClockFROHF144M ******************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockFROHF144M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK 144000000U /*!< Core clock frequency: 144000000Hz */ +#define BOARD_BOOTCLOCKFROHF144M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockFROHF144M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockFROHF144M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockPLL150M ********************* + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockPLL150M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 150000000U /*!< Core clock frequency: 150000000Hz */ +#define BOARD_BOOTCLOCKPLL150M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockPLL150M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockPLL150M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ******************** Configuration BOARD_BootClockPLL100M ********************* + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockPLL100M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK 100000000U /*!< Core clock frequency: 100000000Hz */ +#define BOARD_BOOTCLOCKPLL100M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ + + +/******************************************************************************* + * API for BOARD_BootClockPLL100M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockPLL100M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +#endif /* _CLOCK_CONFIG_H_ */ diff --git a/hw/bsp/mcx/boards/mcxn947brk/pin_mux.c b/hw/bsp/mcx/boards/mcxn947brk/pin_mux.c new file mode 100644 index 000000000..acc2f3e45 --- /dev/null +++ b/hw/bsp/mcx/boards/mcxn947brk/pin_mux.c @@ -0,0 +1,141 @@ +/* + * Copyright 2022 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +/*********************************************************************************************************************** + * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file + * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. + **********************************************************************************************************************/ + +/* clang-format off */ +/* + * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!GlobalInfo +product: Pins v12.0 +processor: MCXN947 +package_id: MCXN947VDF +mcu_data: ksdk2_0 +processor_version: 0.12.3 + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** + */ +/* clang-format on */ + +#include "fsl_common.h" +#include "fsl_port.h" +#include "pin_mux.h" + +/* FUNCTION ************************************************************************************************************ + * + * Function Name : BOARD_InitBootPins + * Description : Calls initialization functions. + * + * END ****************************************************************************************************************/ +void BOARD_InitBootPins(void) +{ + BOARD_InitPins(); +} + +/* clang-format off */ +/* + * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +BOARD_InitPins: +- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'} +- pin_list: + - {pin_num: A1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P0, pin_signal: PIO1_8/WUU0_IN10/LPTMR1_ALT3/TRACE_DATA0/FC4_P0/FC5_P4/CT_INP8/SCT0_OUT2/FLEXIO0_D16/PLU_OUT0/ENET0_TXD2/I3C1_SDA/TSI0_CH17/ADC1_A8, + slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, pull_value: low, input_buffer: enable, + invert_input: normal} + - {pin_num: B1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P1, pin_signal: PIO1_9/TRACE_DATA1/FC4_P1/FC5_P5/CT_INP9/SCT0_OUT3/FLEXIO0_D17/PLU_OUT1/ENET0_TXD3/I3C1_SCL/TSI0_CH18/ADC1_A9, + slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, input_buffer: enable, invert_input: normal} + - {pin_num: F14, peripheral: GPIO3, signal: 'GPIO, 4', pin_signal: PIO3_4/FC7_P2/CT_INP18/PWM0_X2/FLEXIO0_D12/SIM1_CLK, slew_rate: fast, open_drain: disable, drive_strength: low, + pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** + */ +/* clang-format on */ + +/* FUNCTION ************************************************************************************************************ + * + * Function Name : BOARD_InitPins + * Description : Configures pin routing and optionally pin electrical features. + * + * END ****************************************************************************************************************/ +void BOARD_InitPins(void) +{ + /* Enables the clock for PORT1: Enables clock */ + CLOCK_EnableClock(kCLOCK_Port1); + /* Enables the clock for PORT3: Enables clock */ + CLOCK_EnableClock(kCLOCK_Port3); + + const port_pin_config_t port1_8_pinA1_config = {/* Internal pull-up/down resistor is disabled */ + kPORT_PullDisable, + /* Low internal pull resistor value is selected. */ + kPORT_LowPullResistor, + /* Fast slew rate is configured */ + kPORT_FastSlewRate, + /* Passive input filter is disabled */ + kPORT_PassiveFilterDisable, + /* Open drain output is disabled */ + kPORT_OpenDrainDisable, + /* Low drive strength is configured */ + kPORT_LowDriveStrength, + /* Pin is configured as FC4_P0 */ + kPORT_MuxAlt2, + /* Digital input enabled */ + kPORT_InputBufferEnable, + /* Digital input is not inverted */ + kPORT_InputNormal, + /* Pin Control Register fields [15:0] are not locked */ + kPORT_UnlockRegister}; + /* PORT1_8 (pin A1) is configured as FC4_P0 */ + PORT_SetPinConfig(PORT1, 8U, &port1_8_pinA1_config); + + const port_pin_config_t port1_9_pinB1_config = {/* Internal pull-up/down resistor is disabled */ + kPORT_PullDisable, + /* Low internal pull resistor value is selected. */ + kPORT_LowPullResistor, + /* Fast slew rate is configured */ + kPORT_FastSlewRate, + /* Passive input filter is disabled */ + kPORT_PassiveFilterDisable, + /* Open drain output is disabled */ + kPORT_OpenDrainDisable, + /* Low drive strength is configured */ + kPORT_LowDriveStrength, + /* Pin is configured as FC4_P1 */ + kPORT_MuxAlt2, + /* Digital input enabled */ + kPORT_InputBufferEnable, + /* Digital input is not inverted */ + kPORT_InputNormal, + /* Pin Control Register fields [15:0] are not locked */ + kPORT_UnlockRegister}; + /* PORT1_9 (pin B1) is configured as FC4_P1 */ + PORT_SetPinConfig(PORT1, 9U, &port1_9_pinB1_config); + + const port_pin_config_t port3_4_pinF14_config = {/* Internal pull-up/down resistor is disabled */ + kPORT_PullDisable, + /* Low internal pull resistor value is selected. */ + kPORT_LowPullResistor, + /* Fast slew rate is configured */ + kPORT_FastSlewRate, + /* Passive input filter is disabled */ + kPORT_PassiveFilterDisable, + /* Open drain output is disabled */ + kPORT_OpenDrainDisable, + /* Low drive strength is configured */ + kPORT_LowDriveStrength, + /* Pin is configured as PIO3_4 */ + kPORT_MuxAlt0, + /* Digital input enabled */ + kPORT_InputBufferEnable, + /* Digital input is not inverted */ + kPORT_InputNormal, + /* Pin Control Register fields [15:0] are not locked */ + kPORT_UnlockRegister}; + /* PORT3_4 (pin F14) is configured as PIO3_4 */ + PORT_SetPinConfig(PORT3, 4U, &port3_4_pinF14_config); +} +/*********************************************************************************************************************** + * EOF + **********************************************************************************************************************/ diff --git a/hw/bsp/mcx/boards/mcxn947brk/pin_mux.h b/hw/bsp/mcx/boards/mcxn947brk/pin_mux.h new file mode 100644 index 000000000..40968c275 --- /dev/null +++ b/hw/bsp/mcx/boards/mcxn947brk/pin_mux.h @@ -0,0 +1,51 @@ +/* + * Copyright 2022 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +/*********************************************************************************************************************** + * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file + * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. + **********************************************************************************************************************/ + +#ifndef _PIN_MUX_H_ +#define _PIN_MUX_H_ + +/*! + * @addtogroup pin_mux + * @{ + */ + +/*********************************************************************************************************************** + * API + **********************************************************************************************************************/ + +#if defined(__cplusplus) +extern "C" { +#endif + +/*! + * @brief Calls initialization functions. + * + */ +void BOARD_InitBootPins(void); + +/*! + * @brief Configures pin routing and optionally pin electrical features. + * + */ +void BOARD_InitPins(void); + +#if defined(__cplusplus) +} +#endif + +/*! + * @} + */ +#endif /* _PIN_MUX_H_ */ + +/*********************************************************************************************************************** + * EOF + **********************************************************************************************************************/ diff --git a/hw/bsp/mcx/debug.jlinkscript b/hw/bsp/mcx/debug.jlinkscript new file mode 100644 index 000000000..fd8bcffef --- /dev/null +++ b/hw/bsp/mcx/debug.jlinkscript @@ -0,0 +1,5 @@ +int SetupTarget(void) { + JLINK_ExecCommand("SetRTTSearchRanges 0x20000000 0x40000"); + + return 0; +} diff --git a/hw/bsp/mcx/family.c b/hw/bsp/mcx/family.c new file mode 100644 index 000000000..74b84773d --- /dev/null +++ b/hw/bsp/mcx/family.c @@ -0,0 +1,267 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "bsp/board_api.h" +#include "fsl_device_registers.h" +#include "fsl_gpio.h" +#include "fsl_lpuart.h" +#include "board.h" + +#include "pin_mux.h" +#include "clock_config.h" + +#ifdef BOARD_TUD_RHPORT + #define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n) +#else + #define PORT_SUPPORT_DEVICE(_n) 0 +#endif + +#ifdef BOARD_TUH_RHPORT + #define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n) +#else + #define PORT_SUPPORT_HOST(_n) 0 +#endif + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM +//--------------------------------------------------------------------+ + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ + +#if CFG_TUSB_MCU == OPT_MCU_MCXN9 +void USB0_FS_IRQHandler(void) +{ + tud_int_handler(0); +} + +void USB1_HS_IRQHandler(void) +{ + tud_int_handler(1); +} + +#elif CFG_TUSB_MCU == OPT_MCU_MCXA15 +void USB0_IRQHandler(void) +{ + tud_int_handler(0); +} +#endif + + +void board_init(void) +{ + BOARD_InitPins(); + BOARD_InitBootClocks(); + CLOCK_SetupExtClocking(XTAL0_CLK_HZ); + + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); + +#if CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB1_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + // LED + CLOCK_EnableClock(LED_CLK); + gpio_pin_config_t led_config = { + kGPIO_DigitalOutput, + 0, + }; + GPIO_PinInit(LED_GPIO,LED_PIN, &led_config); + board_led_write(0); + +#ifdef NEOPIXEL_PIN + // Neopixel + static uint32_t pixelData[NEOPIXEL_NUMBER]; + IOCON_PinMuxSet(IOCON, NEOPIXEL_PORT, NEOPIXEL_PIN, IOCON_PIO_DIG_FUNC4_EN); + + sctpix_init(NEOPIXEL_TYPE); + sctpix_addCh(NEOPIXEL_CH, pixelData, NEOPIXEL_NUMBER); + sctpix_setPixel(NEOPIXEL_CH, 0, 0x100010); + sctpix_setPixel(NEOPIXEL_CH, 1, 0x100010); + sctpix_show(); +#endif + + // Button +#ifdef BUTTON_GPIO + CLOCK_EnableClock(BUTTON_CLK); + gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0}; + GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); +#endif + +#ifdef UART_DEV + // UART +// IOCON_PinMuxSet(IOCON, UART_RX_PINMUX); +// IOCON_PinMuxSet(IOCON, UART_TX_PINMUX); + + // Enable UART when debug log is on + board_uart_init_clock(); + + lpuart_config_t uart_config; + LPUART_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPUART_Init(UART_DEV, &uart_config, 12000000u); +#endif + + // USB VBUS + /* PORT0 PIN22 configured as USB0_VBUS */ + + + /* MCXA15 USB configurations */ +#if PORT_SUPPORT_DEVICE(0) && (CFG_TUSB_MCU == OPT_MCU_MCXA15) + + RESET_PeripheralReset(kUSB0_RST_SHIFT_RSTn); + CLOCK_EnableUsbfsClock(); + +#endif + + + /* MCXN9 USB configurations */ +#if PORT_SUPPORT_DEVICE(0) && (CFG_TUSB_MCU == OPT_MCU_MCXN9) + // Port0 is Full Speed + + CLOCK_AttachClk(kCLK_48M_to_USB0); + CLOCK_EnableClock(kCLOCK_Usb0Ram); + CLOCK_EnableClock(kCLOCK_Usb0Fs); + CLOCK_EnableUsbfsClock(); + +#endif + +#if PORT_SUPPORT_DEVICE(1) && (CFG_TUSB_MCU == OPT_MCU_MCXN9) + // Port1 is High Speed + + // Power + SPC0->ACTIVE_VDELAY = 0x0500; + /* Change the power DCDC to 1.8v (By default, DCDC is 1.8V), CORELDO to 1.1v (By default, CORELDO is 1.0V) */ + SPC0->ACTIVE_CFG &= ~SPC_ACTIVE_CFG_CORELDO_VDD_DS_MASK; + SPC0->ACTIVE_CFG |= SPC_ACTIVE_CFG_DCDC_VDD_LVL(0x3) | SPC_ACTIVE_CFG_CORELDO_VDD_LVL(0x3) | + SPC_ACTIVE_CFG_SYSLDO_VDD_DS_MASK | SPC_ACTIVE_CFG_DCDC_VDD_DS(0x2u); + /* Wait until it is done */ + while (SPC0->SC & SPC_SC_BUSY_MASK) {} + if (0u == (SCG0->LDOCSR & SCG_LDOCSR_LDOEN_MASK)) { + SCG0->TRIM_LOCK = 0x5a5a0001U; + SCG0->LDOCSR |= SCG_LDOCSR_LDOEN_MASK; + /* wait LDO ready */ + while (0U == (SCG0->LDOCSR & SCG_LDOCSR_VOUT_OK_MASK)); + } + SYSCON->AHBCLKCTRLSET[2] |= SYSCON_AHBCLKCTRL2_USB_HS_MASK | SYSCON_AHBCLKCTRL2_USB_HS_PHY_MASK; + SCG0->SOSCCFG &= ~(SCG_SOSCCFG_RANGE_MASK | SCG_SOSCCFG_EREFS_MASK); + /* xtal = 20 ~ 30MHz */ + SCG0->SOSCCFG = (1U << SCG_SOSCCFG_RANGE_SHIFT) | (1U << SCG_SOSCCFG_EREFS_SHIFT); + SCG0->SOSCCSR |= SCG_SOSCCSR_SOSCEN_MASK; + while (1) { + if (SCG0->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK) { + break; + } + } + + // Clock + SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK | SYSCON_CLOCK_CTRL_CLKIN_ENA_FM_USBH_LPT_MASK; + CLOCK_EnableClock(kCLOCK_UsbHs); + CLOCK_EnableClock(kCLOCK_UsbHsPhy); + CLOCK_EnableUsbhsPhyPllClock(kCLOCK_Usbphy480M, 24000000U); + CLOCK_EnableUsbhsClock(); + + // USB PHY +#if ((!(defined FSL_FEATURE_SOC_CCM_ANALOG_COUNT)) && (!(defined FSL_FEATURE_SOC_ANATOP_COUNT))) + USBPHY->TRIM_OVERRIDE_EN = 0x001fU; /* override IFR value */ +#endif + + // Enable PHY support for Low speed device + LS via FS Hub + USBPHY->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK; + + // Enable all power for normal operation + USBPHY->PWD = 0; + + // TX Timing + uint32_t phytx = USBPHY->TX; + phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK); + phytx |= USBPHY_TX_D_CAL(0x04) | USBPHY_TX_TXCAL45DP(0x07) | USBPHY_TX_TXCAL45DM(0x07); + //phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06); + USBPHY->TX = phytx; +#endif +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); + +#ifdef NEOPIXEL_PIN + if (state) { + sctpix_setPixel(NEOPIXEL_CH, 0, 0x100000); + sctpix_setPixel(NEOPIXEL_CH, 1, 0x101010); + } else { + sctpix_setPixel(NEOPIXEL_CH, 0, 0x001000); + sctpix_setPixel(NEOPIXEL_CH, 1, 0x000010); + } + sctpix_show(); +#endif +} + +uint32_t board_button_read(void) +{ +#ifdef BUTTON_GPIO + return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); +#endif +} + +int board_uart_read(uint8_t* buf, int len) +{ + (void) buf; (void) len; + return 0; +} + +int board_uart_write(void const * buf, int len) +{ +#ifdef UART_DEV + LPUART_WriteBlocking(UART_DEV, (uint8_t const *) buf, len); + return len; +#else + (void) buf; (void) len; + return 0; +#endif +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake new file mode 100644 index 000000000..078d13b9f --- /dev/null +++ b/hw/bsp/mcx/family.cmake @@ -0,0 +1,122 @@ +include_guard() + +if (NOT BOARD) + message(FATAL_ERROR "BOARD not specified") +endif () + +set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk) +set(CMSIS_DIR ${TOP}/lib/CMSIS_5) + +# include board specific +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) + +# toolchain set up +set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake) + +#------------------------------------ +# BOARD_TARGET +#------------------------------------ +# only need to be built ONCE for all examples +function(add_board_target BOARD_TARGET) + if (NOT TARGET ${BOARD_TARGET}) + add_library(${BOARD_TARGET} STATIC + # external driver + #lib/sct_neopixel/sct_neopixel.c + + # driver + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_gpio.c + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_common_arm.c + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpuart.c + + # mcu + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c + ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c + ) + + if (${FAMILY_MCUS} STREQUAL "MCXN9") + target_sources(${BOARD_TARGET} PRIVATE + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpflexcomm.c + ) + elseif(${FAMILY_MCUS} STREQUAL "MCXA15") + target_sources(${BOARD_TARGET} PRIVATE + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_spc.c + ) + endif() + + # target_compile_definitions(${BOARD_TARGET} PUBLIC + # ) + target_include_directories(${BOARD_TARGET} PUBLIC + # driver + # mcu + ${CMSIS_DIR}/CMSIS/Core/Include + ${SDK_DIR}/devices/${MCU_VARIANT} + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers + ) + + update_board(${BOARD_TARGET}) + + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + target_sources(${BOARD_TARGET} PUBLIC + ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S + ) + target_link_options(${BOARD_TARGET} PUBLIC + # linker file + "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld" + # nanolib + --specs=nosys.specs + --specs=nano.specs + ) + elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--config=${LD_FILE_IAR}" + ) + endif () + endif () +endfunction() + + +#------------------------------------ +# Functions +#------------------------------------ +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) + + # Board target + add_board_target(board_${BOARD}) + + #---------- Port Specific ---------- + # These files are built for each example since it depends on example's tusb_config.h + target_sources(${TARGET} PUBLIC + # BSP + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c + ) + target_include_directories(${TARGET} PUBLIC + # family, hw, board + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} + ) + + # Add TinyUSB target and port source + if (${FAMILY_MCUS} STREQUAL "MCXN9") + family_add_tinyusb(${TARGET} OPT_MCU_MCXN9 ${RTOS}) + elseif(${FAMILY_MCUS} STREQUAL "MCXA15") + family_add_tinyusb(${TARGET} OPT_MCU_MCXA15 ${RTOS}) + endif() + + target_sources(${TARGET}-tinyusb PUBLIC + # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS + ${TOP}/src/portable/chipidea/$ + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) + + # Link dependencies + target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) + + # Flashing + family_flash_jlink(${TARGET}) + #family_flash_nxplink(${TARGET}) + #family_flash_pyocd(${TARGET}) +endfunction() diff --git a/hw/bsp/mcx/family.mk b/hw/bsp/mcx/family.mk new file mode 100644 index 000000000..59170271c --- /dev/null +++ b/hw/bsp/mcx/family.mk @@ -0,0 +1,65 @@ +UF2_FAMILY_ID = 0x2abc77ec +SDK_DIR = hw/mcu/nxp/mcux-sdk + +DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 + +include $(TOP)/$(BOARD_PATH)/board.mk + +# Default to Highspeed PORT1 +PORT ?= 1 + +CFLAGS += \ + -flto \ + -DBOARD_TUD_RHPORT=$(PORT) \ + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration + +LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs + +# All source paths should be relative to the top level. +LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld + +# TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS +ifeq ($(PORT), 1) + $(info "PORT1 High Speed") + CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED + SRC_C += src/portable/chipidea/ci_hs/dcd_ci_hs.c +else + $(info "PORT0 Full Speed") + CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED + SRC_C += src/portable/chipidea/ci_fs/dcd_ci_fs.c +endif + +SRC_C += \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/system_$(MCU_CORE).c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_gpio.c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpuart.c \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_common_arm.c \ + + +# fsl_lpflexcomm just needed for MCXN9 +ifeq ($(MCU_VARIANT), MCXN947) + SRC_C += \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpflexcomm.c \ + +endif + +# fsl_spc just needed for MCXNA15 +ifeq ($(MCU_VARIANT), MCXA153) + SRC_C += \ + $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_spc.c \ + +endif + + + +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ + $(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT) \ + $(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers \ + +SRC_S += $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/startup_$(MCU_CORE).S diff --git a/hw/bsp/mcxa/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/mcxa/FreeRTOSConfig/FreeRTOSConfig.h deleted file mode 100644 index 6f10a7ab0..000000000 --- a/hw/bsp/mcxa/FreeRTOSConfig/FreeRTOSConfig.h +++ /dev/null @@ -1,149 +0,0 @@ -/* - * FreeRTOS Kernel V10.0.0 - * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. If you wish to use our Amazon - * FreeRTOS name, please do so in a fair use way that does not cause confusion. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos - * - * 1 tab == 4 spaces! - */ - - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. - * - * See http://www.freertos.org/a00110.html. - *----------------------------------------------------------*/ - -// skip if included from IAR assembler -#ifndef __IASMARM__ - #include "fsl_device_registers.h" -#endif - -/* Cortex M23/M33 port configuration. */ -#define configENABLE_MPU 0 -#define configENABLE_FPU 1 -#define configENABLE_TRUSTZONE 0 -#define configMINIMAL_SECURE_STACK_SIZE (1024) - -#define configUSE_PREEMPTION 1 -#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 -#define configCPU_CLOCK_HZ SystemCoreClock -#define configTICK_RATE_HZ ( 1000 ) -#define configMAX_PRIORITIES ( 5 ) -#define configMINIMAL_STACK_SIZE ( 128 ) -#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 ) -#define configMAX_TASK_NAME_LEN 16 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 1 -#define configUSE_MUTEXES 1 -#define configUSE_RECURSIVE_MUTEXES 1 -#define configUSE_COUNTING_SEMAPHORES 1 -#define configQUEUE_REGISTRY_SIZE 4 -#define configUSE_QUEUE_SETS 0 -#define configUSE_TIME_SLICING 0 -#define configUSE_NEWLIB_REENTRANT 0 -#define configENABLE_BACKWARD_COMPATIBILITY 1 -#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 - -#define configSUPPORT_STATIC_ALLOCATION 1 -#define configSUPPORT_DYNAMIC_ALLOCATION 0 - -/* Hook function related definitions. */ -#define configUSE_IDLE_HOOK 0 -#define configUSE_TICK_HOOK 0 -#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning -#define configCHECK_FOR_STACK_OVERFLOW 2 -#define configCHECK_HANDLER_INSTALLATION 0 - -/* Run time and task stats gathering related definitions. */ -#define configGENERATE_RUN_TIME_STATS 0 -#define configRECORD_STACK_HIGH_ADDRESS 1 -#define configUSE_TRACE_FACILITY 1 // legacy trace -#define configUSE_STATS_FORMATTING_FUNCTIONS 0 - -/* Co-routine definitions. */ -#define configUSE_CO_ROUTINES 0 -#define configMAX_CO_ROUTINE_PRIORITIES 2 - -/* Software timer related definitions. */ -#define configUSE_TIMERS 1 -#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2) -#define configTIMER_QUEUE_LENGTH 32 -#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE - -/* Optional functions - most linkers will remove unused functions anyway. */ -#define INCLUDE_vTaskPrioritySet 0 -#define INCLUDE_uxTaskPriorityGet 0 -#define INCLUDE_vTaskDelete 0 -#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY -#define INCLUDE_xResumeFromISR 0 -#define INCLUDE_vTaskDelayUntil 1 -#define INCLUDE_vTaskDelay 1 -#define INCLUDE_xTaskGetSchedulerState 0 -#define INCLUDE_xTaskGetCurrentTaskHandle 1 -#define INCLUDE_uxTaskGetStackHighWaterMark 0 -#define INCLUDE_xTaskGetIdleTaskHandle 0 -#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 -#define INCLUDE_pcTaskGetTaskName 0 -#define INCLUDE_eTaskGetState 0 -#define INCLUDE_xEventGroupSetBitFromISR 0 -#define INCLUDE_xTimerPendFunctionCall 0 - -/* FreeRTOS hooks to NVIC vectors */ -#define xPortPendSVHandler PendSV_Handler -#define xPortSysTickHandler SysTick_Handler -#define vPortSVCHandler SVC_Handler - -//--------------------------------------------------------------------+ -// Interrupt nesting behavior configuration. -//--------------------------------------------------------------------+ - -// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header -#define configPRIO_BITS 3 - -/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ -#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U)); - /* Specifies the operating voltage for the SRAM's read/write timing margin */ - sramOption.operateVoltage = kSPC_sramOperateAt1P0V; - sramOption.requestVoltageUpdate = true; - (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); - } - - CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ - - CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO12M */ - - /* The flow of decreasing voltage and frequency */ - if (coreFreq > BOARD_BOOTCLOCKFRO12M_CORE_CLOCK) { - /* Configure Flash to support different voltage level and frequency */ - FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U)); - /* Specifies the operating voltage for the SRAM's read/write timing margin */ - sramOption.operateVoltage = kSPC_sramOperateAt1P0V; - sramOption.requestVoltageUpdate = true; - (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); - /* Set the LDO_CORE VDD regulator level */ - ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; - ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; - (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); - } - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - - /*!< Set up dividers */ - CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK; -} -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO24M ********************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFRO24M -outputs: -- {id: CLK_1M_clock.outFreq, value: 1 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: CPU_clock.outFreq, value: 24 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz} -- {id: FRO_HF_clock.outFreq, value: 48 MHz} -- {id: MAIN_clock.outFreq, value: 48 MHz} -- {id: Slow_clock.outFreq, value: 6 MHz} -- {id: System_clock.outFreq, value: 24 MHz} -settings: -- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1} -- {id: SYSCON.AHBCLKDIV.scale, value: '2', locked: true} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFRO24M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFRO24M configuration - ******************************************************************************/ -void BOARD_BootClockFRO24M(void) -{ - uint32_t coreFreq; - spc_active_mode_core_ldo_option_t ldoOption; - spc_sram_voltage_config_t sramOption; - - /* Get the CPU Core frequency */ - coreFreq = CLOCK_GetCoreSysClkFreq(); - - /* The flow of increasing voltage and frequency */ - if (coreFreq <= BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) { - /* Set the LDO_CORE VDD regulator level */ - ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; - ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; - (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); - /* Configure Flash to support different voltage level and frequency */ - FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U)); - /* Specifies the operating voltage for the SRAM's read/write timing margin */ - sramOption.operateVoltage = kSPC_sramOperateAt1P0V; - sramOption.requestVoltageUpdate = true; - (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); - } - - CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ - - CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ - - CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */ - - /* The flow of decreasing voltage and frequency */ - if (coreFreq > BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) { - /* Configure Flash to support different voltage level and frequency */ - FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U)); - /* Specifies the operating voltage for the SRAM's read/write timing margin */ - sramOption.operateVoltage = kSPC_sramOperateAt1P0V; - sramOption.requestVoltageUpdate = true; - (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); - /* Set the LDO_CORE VDD regulator level */ - ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; - ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; - (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); - } - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - - /*!< Set up dividers */ - CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 2U); /* !< Set AHBCLKDIV divider to value 2 */ - CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFRO24M_CORE_CLOCK; -} -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO48M ********************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFRO48M -outputs: -- {id: CLK_1M_clock.outFreq, value: 1 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: CPU_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz} -- {id: FRO_HF_clock.outFreq, value: 48 MHz} -- {id: MAIN_clock.outFreq, value: 48 MHz} -- {id: Slow_clock.outFreq, value: 12 MHz} -- {id: System_clock.outFreq, value: 48 MHz} -settings: -- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFRO48M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFRO48M configuration - ******************************************************************************/ -void BOARD_BootClockFRO48M(void) -{ - uint32_t coreFreq; - spc_active_mode_core_ldo_option_t ldoOption; - spc_sram_voltage_config_t sramOption; - - /* Get the CPU Core frequency */ - coreFreq = CLOCK_GetCoreSysClkFreq(); - - /* The flow of increasing voltage and frequency */ - if (coreFreq <= BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) { - /* Set the LDO_CORE VDD regulator level */ - ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; - ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; - (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); - /* Configure Flash to support different voltage level and frequency */ - FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U)); - /* Specifies the operating voltage for the SRAM's read/write timing margin */ - sramOption.operateVoltage = kSPC_sramOperateAt1P0V; - sramOption.requestVoltageUpdate = true; - (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); - } - - CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ - - CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ - - CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */ - - /* The flow of decreasing voltage and frequency */ - if (coreFreq > BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) { - /* Configure Flash to support different voltage level and frequency */ - FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U)); - /* Specifies the operating voltage for the SRAM's read/write timing margin */ - sramOption.operateVoltage = kSPC_sramOperateAt1P0V; - sramOption.requestVoltageUpdate = true; - (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); - /* Set the LDO_CORE VDD regulator level */ - ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; - ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; - (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); - } - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - - /*!< Set up dividers */ - CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */ - CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFRO48M_CORE_CLOCK; -} -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO64M ********************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFRO64M -outputs: -- {id: CLK_1M_clock.outFreq, value: 1 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: CPU_clock.outFreq, value: 64 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_DIV_clock.outFreq, value: 64 MHz} -- {id: FRO_HF_clock.outFreq, value: 64 MHz} -- {id: MAIN_clock.outFreq, value: 64 MHz} -- {id: Slow_clock.outFreq, value: 16 MHz} -- {id: System_clock.outFreq, value: 64 MHz} -settings: -- {id: VDD_CORE, value: voltage_1v1} -- {id: MRCC.FROHFDIV.scale, value: '1', locked: true} -- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1} -- {id: SYSCON.AHBCLKDIV.scale, value: '1', locked: true} -sources: -- {id: SCG.FIRC.outFreq, value: 64 MHz} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFRO64M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFRO64M configuration - ******************************************************************************/ -void BOARD_BootClockFRO64M(void) -{ - uint32_t coreFreq; - spc_active_mode_core_ldo_option_t ldoOption; - spc_sram_voltage_config_t sramOption; - - /* Get the CPU Core frequency */ - coreFreq = CLOCK_GetCoreSysClkFreq(); - - /* The flow of increasing voltage and frequency */ - if (coreFreq <= BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) { - /* Set the LDO_CORE VDD regulator level */ - ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; - ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; - (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); - /* Configure Flash to support different voltage level and frequency */ - FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U)); - /* Specifies the operating voltage for the SRAM's read/write timing margin */ - sramOption.operateVoltage = kSPC_sramOperateAt1P1V; - sramOption.requestVoltageUpdate = true; - (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); - } - - CLOCK_SetupFROHFClocking(64000000U); /*!< Enable FRO HF(64MHz) output */ - - CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ - - CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */ - - /* The flow of decreasing voltage and frequency */ - if (coreFreq > BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) { - /* Configure Flash to support different voltage level and frequency */ - FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U)); - /* Specifies the operating voltage for the SRAM's read/write timing margin */ - sramOption.operateVoltage = kSPC_sramOperateAt1P1V; - sramOption.requestVoltageUpdate = true; - (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); - /* Set the LDO_CORE VDD regulator level */ - ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; - ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; - (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); - } - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - - /*!< Set up dividers */ - CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */ - CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFRO64M_CORE_CLOCK; -} -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO96M ********************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFRO96M -called_from_default_init: true -outputs: -- {id: CLK_1M_clock.outFreq, value: 1 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: CPU_clock.outFreq, value: 96 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_DIV_clock.outFreq, value: 96 MHz} -- {id: FRO_HF_clock.outFreq, value: 96 MHz} -- {id: MAIN_clock.outFreq, value: 96 MHz} -- {id: Slow_clock.outFreq, value: 24 MHz} -- {id: System_clock.outFreq, value: 96 MHz} -settings: -- {id: VDD_CORE, value: voltage_1v1} -- {id: CLKOUTDIV_HALT, value: Enable} -- {id: MRCC.FROHFDIV.scale, value: '1', locked: true} -- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1} -- {id: SYSCON.AHBCLKDIV.scale, value: '1', locked: true} -sources: -- {id: SCG.FIRC.outFreq, value: 96 MHz} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFRO96M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFRO96M configuration - ******************************************************************************/ -void BOARD_BootClockFRO96M(void) -{ - uint32_t coreFreq; - spc_active_mode_core_ldo_option_t ldoOption; - spc_sram_voltage_config_t sramOption; - - /* Get the CPU Core frequency */ - coreFreq = CLOCK_GetCoreSysClkFreq(); - - /* The flow of increasing voltage and frequency */ - if (coreFreq <= BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) { - /* Set the LDO_CORE VDD regulator level */ - ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; - ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; - (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); - /* Configure Flash to support different voltage level and frequency */ - FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U)); - /* Specifies the operating voltage for the SRAM's read/write timing margin */ - sramOption.operateVoltage = kSPC_sramOperateAt1P1V; - sramOption.requestVoltageUpdate = true; - (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); - } - - CLOCK_SetupFROHFClocking(96000000U); /*!< Enable FRO HF(96MHz) output */ - - CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ - - CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */ - - /* The flow of decreasing voltage and frequency */ - if (coreFreq > BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) { - /* Configure Flash to support different voltage level and frequency */ - FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U)); - /* Specifies the operating voltage for the SRAM's read/write timing margin */ - sramOption.operateVoltage = kSPC_sramOperateAt1P1V; - sramOption.requestVoltageUpdate = true; - (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); - /* Set the LDO_CORE VDD regulator level */ - ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage; - ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; - (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); - } - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - - /*!< Set up dividers */ - CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */ - CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFRO96M_CORE_CLOCK; -} diff --git a/hw/bsp/mcxa/boards/frdmmcxa153/clock_config.h b/hw/bsp/mcxa/boards/frdmmcxa153/clock_config.h deleted file mode 100644 index 079d0d312..000000000 --- a/hw/bsp/mcxa/boards/frdmmcxa153/clock_config.h +++ /dev/null @@ -1,170 +0,0 @@ -/* - * Copyright 2023 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -#ifndef _CLOCK_CONFIG_H_ -#define _CLOCK_CONFIG_H_ - -#include "fsl_common.h" - -/******************************************************************************* - * Definitions - ******************************************************************************/ - -/******************************************************************************* - ************************ BOARD_InitBootClocks function ************************ - ******************************************************************************/ - -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes default configuration of clocks. - * - */ -void BOARD_InitBootClocks(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO12M ********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFRO12M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO24M ********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFRO24M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFRO24M_CORE_CLOCK 24000000U /*!< Core clock frequency: 24000000Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFRO24M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFRO24M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO48M ********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFRO48M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFRO48M_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFRO48M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFRO48M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO64M ********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFRO64M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFRO64M_CORE_CLOCK 64000000U /*!< Core clock frequency: 64000000Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFRO64M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFRO64M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO96M ********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFRO96M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFRO96M_CORE_CLOCK 96000000U /*!< Core clock frequency: 96000000Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFRO96M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFRO96M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -#endif /* _CLOCK_CONFIG_H_ */ diff --git a/hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.c b/hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.c deleted file mode 100644 index b0e6de560..000000000 --- a/hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * Copyright 2023 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -/* clang-format off */ -/* - * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!GlobalInfo -product: Pins v14.0 -processor: MCXA153 -package_id: MCXA153VLH -mcu_data: ksdk2_0 -processor_version: 0.14.3 -pin_labels: -- {pin_num: '38', pin_signal: P3_12/LPUART2_RTS_B/CT1_MAT2/PWM0_X0, label: LED_RED, identifier: LED_RED} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** - */ -/* clang-format on */ - -#include "fsl_common.h" -#include "fsl_port.h" -#include "fsl_gpio.h" -#include "pin_mux.h" - -/* FUNCTION ************************************************************************************************************ - * - * Function Name : BOARD_InitBootPins - * Description : Calls initialization functions. - * - * END ****************************************************************************************************************/ -void BOARD_InitBootPins(void) -{ - BOARD_InitPins(); -} - -/* clang-format off */ -/* - * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -BOARD_InitPins: -- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'} -- pin_list: - - {pin_num: '38', peripheral: GPIO3, signal: 'GPIO, 12', pin_signal: P3_12/LPUART2_RTS_B/CT1_MAT2/PWM0_X0, direction: OUTPUT, gpio_init_state: 'false', slew_rate: fast, - open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** - */ -/* clang-format on */ - -/* FUNCTION ************************************************************************************************************ - * - * Function Name : BOARD_InitPins - * Description : Configures pin routing and optionally pin electrical features. - * - * END ****************************************************************************************************************/ -void BOARD_InitPins(void) -{ - RESET_PeripheralReset(kLPUART0_RST_SHIFT_RSTn); - RESET_PeripheralReset(kPORT0_RST_SHIFT_RSTn); - CLOCK_SetClockDiv(kCLOCK_DivLPUART0, 1u); - CLOCK_AttachClk(kFRO12M_to_LPUART0); - - /* write to PORT0: Peripheral clock is enabled */ - CLOCK_EnableClock(kCLOCK_GatePORT0); - - /* Write to GPIO3: Peripheral clock is enabled */ - CLOCK_EnableClock(kCLOCK_GateGPIO3); - /* Write to PORT3: Peripheral clock is enabled */ - CLOCK_EnableClock(kCLOCK_GatePORT3); - /* GPIO3 peripheral is released from reset */ - RESET_ReleasePeripheralReset(kGPIO3_RST_SHIFT_RSTn); - /* PORT3 peripheral is released from reset */ - RESET_ReleasePeripheralReset(kPORT3_RST_SHIFT_RSTn); - - const port_pin_config_t port3_12_pin38_config = {/* Internal pull-up/down resistor is disabled */ - kPORT_PullDisable, - /* Low internal pull resistor value is selected. */ - kPORT_LowPullResistor, - /* Fast slew rate is configured */ - kPORT_FastSlewRate, - /* Passive input filter is disabled */ - kPORT_PassiveFilterDisable, - /* Open drain output is disabled */ - kPORT_OpenDrainDisable, - /* Low drive strength is configured */ - kPORT_LowDriveStrength, - /* Normal drive strength is configured */ - kPORT_NormalDriveStrength, - /* Pin is configured as P3_12 */ - kPORT_MuxAlt0, - /* Digital input enabled */ - kPORT_InputBufferEnable, - /* Digital input is not inverted */ - kPORT_InputNormal, - /* Pin Control Register fields [15:0] are not locked */ - kPORT_UnlockRegister}; - /* PORT3_12 (pin 38) is configured as P3_12 */ - PORT_SetPinConfig(PORT3, 12U, &port3_12_pin38_config); - - const port_pin_config_t port0_2_pin51_config = {/* Internal pull-up resistor is enabled */ - kPORT_PullUp, - /* Low internal pull resistor value is selected. */ - kPORT_LowPullResistor, - /* Fast slew rate is configured */ - kPORT_FastSlewRate, - /* Passive input filter is disabled */ - kPORT_PassiveFilterDisable, - /* Open drain output is disabled */ - kPORT_OpenDrainDisable, - /* Low drive strength is configured */ - kPORT_LowDriveStrength, - /* Normal drive strength is configured */ - kPORT_NormalDriveStrength, - /* Pin is configured as LPUART0_RXD */ - kPORT_MuxAlt2, - /* Digital input enabled */ - kPORT_InputBufferEnable, - /* Digital input is not inverted */ - kPORT_InputNormal, - /* Pin Control Register fields [15:0] are not locked */ - kPORT_UnlockRegister}; - /* PORT0_2 (pin 51) is configured as LPUART0_RXD */ - PORT_SetPinConfig(PORT0, 2U, &port0_2_pin51_config); - - const port_pin_config_t port0_3_pin52_config = {/* Internal pull-up resistor is enabled */ - kPORT_PullUp, - /* Low internal pull resistor value is selected. */ - kPORT_LowPullResistor, - /* Fast slew rate is configured */ - kPORT_FastSlewRate, - /* Passive input filter is disabled */ - kPORT_PassiveFilterDisable, - /* Open drain output is disabled */ - kPORT_OpenDrainDisable, - /* Low drive strength is configured */ - kPORT_LowDriveStrength, - /* Normal drive strength is configured */ - kPORT_NormalDriveStrength, - /* Pin is configured as LPUART0_TXD */ - kPORT_MuxAlt2, - /* Digital input enabled */ - kPORT_InputBufferEnable, - /* Digital input is not inverted */ - kPORT_InputNormal, - /* Pin Control Register fields [15:0] are not locked */ - kPORT_UnlockRegister}; - /* PORT0_3 (pin 52) is configured as LPUART0_TXD */ - PORT_SetPinConfig(PORT0, 3U, &port0_3_pin52_config); - -} -/*********************************************************************************************************************** - * EOF - **********************************************************************************************************************/ diff --git a/hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.h b/hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.h deleted file mode 100644 index 06b6fdee9..000000000 --- a/hw/bsp/mcxa/boards/frdmmcxa153/pin_mux.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef _PIN_MUX_H_ -#define _PIN_MUX_H_ - -/*! - * @addtogroup pin_mux - * @{ - */ - -/*********************************************************************************************************************** - * API - **********************************************************************************************************************/ - -#if defined(__cplusplus) -extern "C" { -#endif - -/*! - * @brief Calls initialization functions. - * - */ -void BOARD_InitBootPins(void); - -/*! - * @brief Configures pin routing and optionally pin electrical features. - * - */ -void BOARD_InitPins(void); - -#if defined(__cplusplus) -} -#endif - -/*! - * @} - */ -#endif /* _PIN_MUX_H_ */ - -/*********************************************************************************************************************** - * EOF - **********************************************************************************************************************/ diff --git a/hw/bsp/mcxa/debug.jlinkscript b/hw/bsp/mcxa/debug.jlinkscript deleted file mode 100644 index fd8bcffef..000000000 --- a/hw/bsp/mcxa/debug.jlinkscript +++ /dev/null @@ -1,5 +0,0 @@ -int SetupTarget(void) { - JLINK_ExecCommand("SetRTTSearchRanges 0x20000000 0x40000"); - - return 0; -} diff --git a/hw/bsp/mcxa/family.c b/hw/bsp/mcxa/family.c deleted file mode 100644 index d2bc35f8c..000000000 --- a/hw/bsp/mcxa/family.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "bsp/board_api.h" -#include "fsl_device_registers.h" -#include "fsl_gpio.h" -#include "fsl_lpuart.h" -#include "board.h" - -#include "pin_mux.h" -#include "clock_config.h" - - -#ifdef BOARD_TUD_RHPORT - #define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n) -#else - #define PORT_SUPPORT_DEVICE(_n) 0 -#endif - -#ifdef BOARD_TUH_RHPORT - #define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n) -#else - #define PORT_SUPPORT_HOST(_n) 0 -#endif - -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM -//--------------------------------------------------------------------+ - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB0_IRQHandler(void) -{ - tud_int_handler(0); -} - -void board_init(void) -{ - BOARD_InitPins(); - BOARD_InitBootClocks(); - CLOCK_SetupExtClocking(XTAL0_CLK_HZ); - - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); - - // LED - CLOCK_EnableClock(LED_CLK); - gpio_pin_config_t LED_RED_config = { - .pinDirection = kGPIO_DigitalOutput, - .outputLogic = 0U - }; - - /* Initialize GPIO functionality on pin PIO3_12 (pin 38) */ - GPIO_PinInit(LED_GPIO, LED_PIN, &LED_RED_config); - board_led_write(1); - - // Button -#ifdef BUTTON_GPIO - CLOCK_EnableClock(BUTTON_CLK); - gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0}; - GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); -#endif - -#ifdef UART_DEV - - CLOCK_SetClockDiv(kCLOCK_DivLPUART0, 1u); - CLOCK_AttachClk(kFRO12M_to_LPUART0); - RESET_PeripheralReset(kLPUART0_RST_SHIFT_RSTn); - - lpuart_config_t uart_config; - LPUART_GetDefaultConfig(&uart_config); - uart_config.baudRate_Bps = 115200; - uart_config.enableTx = true; - uart_config.enableRx = false; - LPUART_Init(UART_DEV, &uart_config, 12000000u); - - -#endif - - // USB VBUS - /* PORT0 PIN22 configured as USB0_VBUS */ - -#if PORT_SUPPORT_DEVICE(0) - RESET_PeripheralReset(kUSB0_RST_SHIFT_RSTn); - CLOCK_EnableUsbfsClock(); -#endif - -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); -} - -uint32_t board_button_read(void) -{ -#ifdef BUTTON_GPIO - return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); -#else - return 1; -#endif -} - -int board_uart_read(uint8_t* buf, int len) -{ - (void) buf; (void) len; - return 0; -} - -int board_uart_write(void const * buf, int len) -{ -#ifdef UART_DEV - LPUART_WriteBlocking(UART_DEV, (uint8_t const *) buf, len); - return len; -#else - (void) buf; (void) len; - return 0; -#endif -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif - \ No newline at end of file diff --git a/hw/bsp/mcxa/family.cmake b/hw/bsp/mcxa/family.cmake deleted file mode 100644 index d2b2321d6..000000000 --- a/hw/bsp/mcxa/family.cmake +++ /dev/null @@ -1,110 +0,0 @@ -include_guard() - -if (NOT BOARD) - message(FATAL_ERROR "BOARD not specified") -endif () - -set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk) -set(CMSIS_DIR ${TOP}/lib/CMSIS_5) - -# include board specific -include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) - -# toolchain set up -set(CMAKE_SYSTEM_PROCESSOR cortex-m33-nodsp-nofp CACHE INTERNAL "System Processor") -set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake) - -set(FAMILY_MCUS MCXA CACHE INTERNAL "") - - -#------------------------------------ -# BOARD_TARGET -#------------------------------------ -# only need to be built ONCE for all examples -function(add_board_target BOARD_TARGET) - if (NOT TARGET ${BOARD_TARGET}) - add_library(${BOARD_TARGET} STATIC - # external driver - #lib/sct_neopixel/sct_neopixel.c - - # driver - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_gpio.c - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_common_arm.c - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpuart.c - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_spc.c - # mcu - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c - ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c - ) - # target_compile_definitions(${BOARD_TARGET} PUBLIC - # ) - target_include_directories(${BOARD_TARGET} PUBLIC - # driver - # mcu - ${CMSIS_DIR}/CMSIS/Core/Include - ${SDK_DIR}/devices/${MCU_VARIANT} - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers - ) - - update_board(${BOARD_TARGET}) - - if (CMAKE_C_COMPILER_ID STREQUAL "GNU") - target_sources(${BOARD_TARGET} PUBLIC - ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S - ) - target_link_options(${BOARD_TARGET} PUBLIC - # linker file - "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld" - # nanolib - --specs=nosys.specs - --specs=nano.specs - ) - elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") - target_link_options(${BOARD_TARGET} PUBLIC - "LINKER:--config=${LD_FILE_IAR}" - ) - endif () - endif () -endfunction() - - -#------------------------------------ -# Functions -#------------------------------------ -function(family_configure_example TARGET RTOS) - family_configure_common(${TARGET} ${RTOS}) - - # Board target - add_board_target(board_${BOARD}) - - #---------- Port Specific ---------- - # These files are built for each example since it depends on example's tusb_config.h - target_sources(${TARGET} PUBLIC - # BSP - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c - ) - target_include_directories(${TARGET} PUBLIC - # family, hw, board - ${CMAKE_CURRENT_FUNCTION_LIST_DIR} - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} - ) - - # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_MCXA ${RTOS}) - target_sources(${TARGET}-tinyusb PUBLIC - # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS - ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c - ) - target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) - - # Link dependencies - target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) - - # Flashing - family_flash_jlink(${TARGET}) - #family_flash_nxplink(${TARGET}) - #family_flash_pyocd(${TARGET}) -endfunction() diff --git a/hw/bsp/mcxa/family.mk b/hw/bsp/mcxa/family.mk deleted file mode 100644 index 87ae92fab..000000000 --- a/hw/bsp/mcxa/family.mk +++ /dev/null @@ -1,42 +0,0 @@ -UF2_FAMILY_ID = 0x2abc77ec -SDK_DIR = hw/mcu/nxp/mcux-sdk - -DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 #not found - -include $(TOP)/$(BOARD_PATH)/board.mk -CPU_CORE ?= cortex-m33-nodsp-nofp - -CFLAGS += \ - -flto \ - -DCFG_TUSB_MCU=OPT_MCU_MCXA \ - -DBOARD_TUD_RHPORT=0 - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration - -LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs - -# All source paths should be relative to the top level. -LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld - -# TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS -$(info "PORT0 Full Speed") -CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED -SRC_C += src/portable/chipidea/ci_fs/dcd_ci_fs.c - -SRC_C += \ - $(SDK_DIR)/devices/$(MCU_VARIANT)/system_$(MCU_CORE).c \ - $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \ - $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \ - $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_gpio.c \ - $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpuart.c \ - $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_common_arm.c \ - $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_spc.c -INC += \ - $(TOP)/$(BOARD_PATH) \ - $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ - $(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT) \ - $(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers - - -SRC_S += $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/startup_$(MCU_CORE).S diff --git a/hw/bsp/mcxn/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/mcxn/FreeRTOSConfig/FreeRTOSConfig.h deleted file mode 100644 index 6f10a7ab0..000000000 --- a/hw/bsp/mcxn/FreeRTOSConfig/FreeRTOSConfig.h +++ /dev/null @@ -1,149 +0,0 @@ -/* - * FreeRTOS Kernel V10.0.0 - * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. If you wish to use our Amazon - * FreeRTOS name, please do so in a fair use way that does not cause confusion. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos - * - * 1 tab == 4 spaces! - */ - - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. - * - * See http://www.freertos.org/a00110.html. - *----------------------------------------------------------*/ - -// skip if included from IAR assembler -#ifndef __IASMARM__ - #include "fsl_device_registers.h" -#endif - -/* Cortex M23/M33 port configuration. */ -#define configENABLE_MPU 0 -#define configENABLE_FPU 1 -#define configENABLE_TRUSTZONE 0 -#define configMINIMAL_SECURE_STACK_SIZE (1024) - -#define configUSE_PREEMPTION 1 -#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 -#define configCPU_CLOCK_HZ SystemCoreClock -#define configTICK_RATE_HZ ( 1000 ) -#define configMAX_PRIORITIES ( 5 ) -#define configMINIMAL_STACK_SIZE ( 128 ) -#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 ) -#define configMAX_TASK_NAME_LEN 16 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 1 -#define configUSE_MUTEXES 1 -#define configUSE_RECURSIVE_MUTEXES 1 -#define configUSE_COUNTING_SEMAPHORES 1 -#define configQUEUE_REGISTRY_SIZE 4 -#define configUSE_QUEUE_SETS 0 -#define configUSE_TIME_SLICING 0 -#define configUSE_NEWLIB_REENTRANT 0 -#define configENABLE_BACKWARD_COMPATIBILITY 1 -#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 - -#define configSUPPORT_STATIC_ALLOCATION 1 -#define configSUPPORT_DYNAMIC_ALLOCATION 0 - -/* Hook function related definitions. */ -#define configUSE_IDLE_HOOK 0 -#define configUSE_TICK_HOOK 0 -#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning -#define configCHECK_FOR_STACK_OVERFLOW 2 -#define configCHECK_HANDLER_INSTALLATION 0 - -/* Run time and task stats gathering related definitions. */ -#define configGENERATE_RUN_TIME_STATS 0 -#define configRECORD_STACK_HIGH_ADDRESS 1 -#define configUSE_TRACE_FACILITY 1 // legacy trace -#define configUSE_STATS_FORMATTING_FUNCTIONS 0 - -/* Co-routine definitions. */ -#define configUSE_CO_ROUTINES 0 -#define configMAX_CO_ROUTINE_PRIORITIES 2 - -/* Software timer related definitions. */ -#define configUSE_TIMERS 1 -#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2) -#define configTIMER_QUEUE_LENGTH 32 -#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE - -/* Optional functions - most linkers will remove unused functions anyway. */ -#define INCLUDE_vTaskPrioritySet 0 -#define INCLUDE_uxTaskPriorityGet 0 -#define INCLUDE_vTaskDelete 0 -#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY -#define INCLUDE_xResumeFromISR 0 -#define INCLUDE_vTaskDelayUntil 1 -#define INCLUDE_vTaskDelay 1 -#define INCLUDE_xTaskGetSchedulerState 0 -#define INCLUDE_xTaskGetCurrentTaskHandle 1 -#define INCLUDE_uxTaskGetStackHighWaterMark 0 -#define INCLUDE_xTaskGetIdleTaskHandle 0 -#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 -#define INCLUDE_pcTaskGetTaskName 0 -#define INCLUDE_eTaskGetState 0 -#define INCLUDE_xEventGroupSetBitFromISR 0 -#define INCLUDE_xTimerPendFunctionCall 0 - -/* FreeRTOS hooks to NVIC vectors */ -#define xPortPendSVHandler PendSV_Handler -#define xPortSysTickHandler SysTick_Handler -#define vPortSVCHandler SVC_Handler - -//--------------------------------------------------------------------+ -// Interrupt nesting behavior configuration. -//--------------------------------------------------------------------+ - -// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header -#define configPRIO_BITS 3 - -/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ -#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1< - ) - target_sources(${TARGET} PUBLIC - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pin_mux.c - ) -endfunction() diff --git a/hw/bsp/mcxn/boards/frdmmcxn947/board.h b/hw/bsp/mcxn/boards/frdmmcxn947/board.h deleted file mode 100644 index acb73363f..000000000 --- a/hw/bsp/mcxn/boards/frdmmcxn947/board.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2021, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef BOARD_H_ -#define BOARD_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -// LED -#define LED_GPIO GPIO0 -#define LED_CLK kCLOCK_Gpio0 -#define LED_PIN 10 // red -#define LED_STATE_ON 0 - -// WAKE button (Dummy, use unused pin -#define BUTTON_GPIO GPIO0 -#define BUTTON_CLK kCLOCK_Gpio0 -#define BUTTON_PIN 23 -#define BUTTON_STATE_ACTIVE 0 - -// UART -#define UART_DEV LPUART4 - -static inline void board_uart_init_clock(void) { - /* attach FRO 12M to FLEXCOMM4 */ - CLOCK_SetClkDiv(kCLOCK_DivFlexcom4Clk, 1u); - CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4); - RESET_ClearPeripheralReset(kFC4_RST_SHIFT_RSTn); -} - -//#define UART_RX_PINMUX 0, 24, IOCON_PIO_DIG_FUNC1_EN -//#define UART_TX_PINMUX 0, 25, IOCON_PIO_DIG_FUNC1_EN - -// XTAL -#define XTAL0_CLK_HZ (24 * 1000 * 1000U) - -#ifdef __cplusplus - } -#endif - -#endif diff --git a/hw/bsp/mcxn/boards/frdmmcxn947/board.mk b/hw/bsp/mcxn/boards/frdmmcxn947/board.mk deleted file mode 100644 index aaad5e73e..000000000 --- a/hw/bsp/mcxn/boards/frdmmcxn947/board.mk +++ /dev/null @@ -1,11 +0,0 @@ -MCU_VARIANT = MCXN947 -MCU_CORE = MCXN947_cm33_core0 -PORT ?= 1 - -CFLAGS += -DCPU_MCXN947VDF_cm33_core0 - -JLINK_DEVICE = MCXN947_M33_0 -PYOCD_TARGET = MCXN947 - -# flash using pyocd -flash: flash-jlink diff --git a/hw/bsp/mcxn/boards/frdmmcxn947/clock_config.c b/hw/bsp/mcxn/boards/frdmmcxn947/clock_config.c deleted file mode 100644 index 37d2b4dfc..000000000 --- a/hw/bsp/mcxn/boards/frdmmcxn947/clock_config.c +++ /dev/null @@ -1,338 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ -/* - * How to setup clock using clock driver functions: - * - * 1. Setup clock sources. - * - * 2. Set up wait states of the flash. - * - * 3. Set up all dividers. - * - * 4. Set up all selectors to provide selected clocks. - * - */ - -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!GlobalInfo -product: Clocks v10.0 -processor: MCXN947 -package_id: MCXN947VDF -mcu_data: ksdk2_0 -processor_version: 0.12.3 -board: MCX-N9XX-EVK - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -#include "clock_config.h" -#include "fsl_clock.h" - -/******************************************************************************* - * Definitions - ******************************************************************************/ - -/******************************************************************************* - * Variables - ******************************************************************************/ -/* System clock frequency. */ -// extern uint32_t SystemCoreClock; - -/******************************************************************************* - ************************ BOARD_InitBootClocks function ************************ - ******************************************************************************/ -void BOARD_InitBootClocks(void) -{ - BOARD_BootClockPLL150M(); -} - -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO12M ********************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFRO12M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: MAIN_clock.outFreq, value: 12 MHz} -- {id: Slow_clock.outFreq, value: 3 MHz} -- {id: System_clock.outFreq, value: 12 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: SCGMode, value: SIRC} -- {id: SCG.SCSSEL.sel, value: SCG.SIRC} -- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -void BOARD_BootClockFRO12M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK; -} - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF48M ********************* - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFROHF48M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_clock.outFreq, value: 48 MHz} -- {id: MAIN_clock.outFreq, value: 48 MHz} -- {id: Slow_clock.outFreq, value: 12 MHz} -- {id: System_clock.outFreq, value: 48 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -void BOARD_BootClockFROHF48M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK; -} - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF144M ******************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFROHF144M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_clock.outFreq, value: 144 MHz} -- {id: MAIN_clock.outFreq, value: 144 MHz} -- {id: Slow_clock.outFreq, value: 18 MHz} -- {id: System_clock.outFreq, value: 72 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: SYSCON.AHBCLKDIV.scale, value: '2', locked: true} -- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} -sources: -- {id: SCG.FIRC.outFreq, value: 144 MHz} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -void BOARD_BootClockFROHF144M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupFROHFClocking(144000000U); /*!< Enable FRO HF(144MHz) output */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 2U); /*!< Set AHBCLKDIV divider to value 2 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK; -} - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL150M ********************* - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockPLL150M -called_from_default_init: true -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_clock.outFreq, value: 48 MHz} -- {id: MAIN_clock.outFreq, value: 150 MHz} -- {id: PLL0_CLK_clock.outFreq, value: 150 MHz} -- {id: Slow_clock.outFreq, value: 37.5 MHz} -- {id: System_clock.outFreq, value: 150 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: PLL0_Mode, value: Normal} -- {id: RunPowerMode, value: OD} -- {id: SCGMode, value: PLL0} -- {id: SCG.PLL0M_MULT.scale, value: '50', locked: true} -- {id: SCG.PLL0SRCSEL.sel, value: SCG.FIRC_48M} -- {id: SCG.PLL0_NDIV.scale, value: '8', locked: true} -- {id: SCG.SCSSEL.sel, value: SCG.PLL0_CLK} -- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -void BOARD_BootClockPLL150M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ - - /*!< Set up PLL0 */ - const pll_setup_t pll0Setup = { - .pllctrl = SCG_APLLCTRL_SOURCE(1U) | SCG_APLLCTRL_SELI(27U) | SCG_APLLCTRL_SELP(13U), - .pllndiv = SCG_APLLNDIV_NDIV(8U), - .pllpdiv = SCG_APLLPDIV_PDIV(1U), - .pllmdiv = SCG_APLLMDIV_MDIV(50U), - .pllRate = 150000000U - }; - CLOCK_SetPLL0Freq(&pll0Setup); /*!< Configure PLL0 to the desired values */ - CLOCK_SetPll0MonitorMode(kSCG_Pll0MonitorDisable); /* Pll0 Monitor is disabled */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kPLL0_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL0 */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK; -} - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL100M ********************* - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockPLL100M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: CLK_IN_clock.outFreq, value: 24 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: MAIN_clock.outFreq, value: 100 MHz} -- {id: PLL1_CLK_clock.outFreq, value: 100 MHz} -- {id: Slow_clock.outFreq, value: 25 MHz} -- {id: System_clock.outFreq, value: 100 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: PLL1_Mode, value: Normal} -- {id: SCGMode, value: PLL1} -- {id: SCG.PLL1M_MULT.scale, value: '100', locked: true} -- {id: SCG.PLL1_NDIV.scale, value: '6', locked: true} -- {id: SCG.PLL1_PDIV.scale, value: '4', locked: true} -- {id: SCG.SCSSEL.sel, value: SCG.PLL1_CLK} -- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled} -- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} -sources: -- {id: SCG.SOSC.outFreq, value: 24 MHz, enabled: true} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -void BOARD_BootClockPLL100M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupExtClocking(24000000U); - CLOCK_SetSysOscMonitorMode(kSCG_SysOscMonitorDisable); /* System OSC Clock Monitor is disabled */ - - /*!< Set up PLL1 */ - const pll_setup_t pll1Setup = { - .pllctrl = SCG_SPLLCTRL_SOURCE(0U) | SCG_SPLLCTRL_SELI(53U) | SCG_SPLLCTRL_SELP(26U), - .pllndiv = SCG_SPLLNDIV_NDIV(6U), - .pllpdiv = SCG_SPLLPDIV_PDIV(2U), - .pllmdiv = SCG_SPLLMDIV_MDIV(100U), - .pllRate = 100000000U - }; - CLOCK_SetPLL1Freq(&pll1Setup); /*!< Configure PLL1 to the desired values */ - CLOCK_SetPll1MonitorMode(kSCG_Pll1MonitorDisable); /* Pll1 Monitor is disabled */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kPLL1_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL1 */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK; -} diff --git a/hw/bsp/mcxn/boards/frdmmcxn947/clock_config.h b/hw/bsp/mcxn/boards/frdmmcxn947/clock_config.h deleted file mode 100644 index c238a0423..000000000 --- a/hw/bsp/mcxn/boards/frdmmcxn947/clock_config.h +++ /dev/null @@ -1,177 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -#ifndef _CLOCK_CONFIG_H_ -#define _CLOCK_CONFIG_H_ - -#include "fsl_common.h" - -/******************************************************************************* - * Definitions - ******************************************************************************/ -#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal frequency in Hz */ -#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32K frequency in Hz */ - -/******************************************************************************* - ************************ BOARD_InitBootClocks function ************************ - ******************************************************************************/ - -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes default configuration of clocks. - * - */ -void BOARD_InitBootClocks(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO12M ********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */ -#define BOARD_BOOTCLOCKFRO12M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFRO12M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF48M ********************* - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ -#define BOARD_BOOTCLOCKFROHF48M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFROHF48M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF144M ******************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK 144000000U /*!< Core clock frequency: 144000000Hz */ -#define BOARD_BOOTCLOCKFROHF144M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFROHF144M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL150M ********************* - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 150000000U /*!< Core clock frequency: 150000000Hz */ -#define BOARD_BOOTCLOCKPLL150M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockPLL150M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL100M ********************* - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK 100000000U /*!< Core clock frequency: 100000000Hz */ -#define BOARD_BOOTCLOCKPLL100M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockPLL100M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -#endif /* _CLOCK_CONFIG_H_ */ diff --git a/hw/bsp/mcxn/boards/frdmmcxn947/pin_mux.c b/hw/bsp/mcxn/boards/frdmmcxn947/pin_mux.c deleted file mode 100644 index c33790ac5..000000000 --- a/hw/bsp/mcxn/boards/frdmmcxn947/pin_mux.c +++ /dev/null @@ -1,143 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -/* clang-format off */ -/* - * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!GlobalInfo -product: Pins v12.0 -processor: MCXN947 -package_id: MCXN947VDF -mcu_data: ksdk2_0 -processor_version: 0.12.3 - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** - */ -/* clang-format on */ - -#include "fsl_common.h" -#include "fsl_port.h" -#include "pin_mux.h" - -/* FUNCTION ************************************************************************************************************ - * - * Function Name : BOARD_InitBootPins - * Description : Calls initialization functions. - * - * END ****************************************************************************************************************/ -void BOARD_InitBootPins(void) -{ - BOARD_InitPins(); -} - -/* clang-format off */ -/* - * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -BOARD_InitPins: -- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'} -- pin_list: - - {pin_num: A1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P0, pin_signal: PIO1_8/WUU0_IN10/LPTMR1_ALT3/TRACE_DATA0/FC4_P0/FC5_P4/CT_INP8/SCT0_OUT2/FLEXIO0_D16/PLU_OUT0/ENET0_TXD2/I3C1_SDA/TSI0_CH17/ADC1_A8, - slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, pull_value: low, input_buffer: enable, - invert_input: normal} - - {pin_num: B1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P1, pin_signal: PIO1_9/TRACE_DATA1/FC4_P1/FC5_P5/CT_INP9/SCT0_OUT3/FLEXIO0_D17/PLU_OUT1/ENET0_TXD3/I3C1_SCL/TSI0_CH18/ADC1_A9, - slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, input_buffer: enable, invert_input: normal} - - {pin_num: B7, peripheral: GPIO0, signal: 'GPIO, 23', pin_signal: PIO0_23/WUU0_IN5/EWM0_OUT_b/FC1_P3/CT_INP3/FLEXIO0_D7/ADC0_A15/CMP2_IN2, direction: INPUT, slew_rate: fast, - open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** - */ -/* clang-format on */ - -/* FUNCTION ************************************************************************************************************ - * - * Function Name : BOARD_InitPins - * Description : Configures pin routing and optionally pin electrical features. - * - * END ****************************************************************************************************************/ -void BOARD_InitPins(void) -{ - /* Enables the clock for PORT0: Enables clock */ - CLOCK_EnableClock(kCLOCK_Port0); - - /* Enables the clock for PORT1: Enables clock */ - CLOCK_EnableClock(kCLOCK_Port1); - - - const port_pin_config_t port1_8_pinA1_config = {/* Internal pull-up/down resistor is disabled */ - kPORT_PullDisable, - /* Low internal pull resistor value is selected. */ - kPORT_LowPullResistor, - /* Fast slew rate is configured */ - kPORT_FastSlewRate, - /* Passive input filter is disabled */ - kPORT_PassiveFilterDisable, - /* Open drain output is disabled */ - kPORT_OpenDrainDisable, - /* Low drive strength is configured */ - kPORT_LowDriveStrength, - /* Pin is configured as FC4_P0 */ - kPORT_MuxAlt2, - /* Digital input enabled */ - kPORT_InputBufferEnable, - /* Digital input is not inverted */ - kPORT_InputNormal, - /* Pin Control Register fields [15:0] are not locked */ - kPORT_UnlockRegister}; - /* PORT1_8 (pin A1) is configured as FC4_P0 */ - PORT_SetPinConfig(PORT1, 8U, &port1_8_pinA1_config); - - const port_pin_config_t port1_9_pinB1_config = {/* Internal pull-up/down resistor is disabled */ - kPORT_PullDisable, - /* Low internal pull resistor value is selected. */ - kPORT_LowPullResistor, - /* Fast slew rate is configured */ - kPORT_FastSlewRate, - /* Passive input filter is disabled */ - kPORT_PassiveFilterDisable, - /* Open drain output is disabled */ - kPORT_OpenDrainDisable, - /* Low drive strength is configured */ - kPORT_LowDriveStrength, - /* Pin is configured as FC4_P1 */ - kPORT_MuxAlt2, - /* Digital input enabled */ - kPORT_InputBufferEnable, - /* Digital input is not inverted */ - kPORT_InputNormal, - /* Pin Control Register fields [15:0] are not locked */ - kPORT_UnlockRegister}; - /* PORT1_9 (pin B1) is configured as FC4_P1 */ - PORT_SetPinConfig(PORT1, 9U, &port1_9_pinB1_config); - - const port_pin_config_t SW2 = {/* Internal pull-up/down resistor is disabled */ - kPORT_PullDisable, - /* Low internal pull resistor value is selected. */ - kPORT_LowPullResistor, - /* Fast slew rate is configured */ - kPORT_FastSlewRate, - /* Passive input filter is disabled */ - kPORT_PassiveFilterDisable, - /* Open drain output is disabled */ - kPORT_OpenDrainDisable, - /* Low drive strength is configured */ - kPORT_LowDriveStrength, - /* Pin is configured as PIO0_23 */ - kPORT_MuxAlt0, - /* Digital input enabled */ - kPORT_InputBufferEnable, - /* Digital input is not inverted */ - kPORT_InputNormal, - /* Pin Control Register fields [15:0] are not locked */ - kPORT_UnlockRegister}; - /* PORT0_23 (pin B7) is configured as PIO0_23 */ - PORT_SetPinConfig(PORT0, 23U, &SW2); -} -/*********************************************************************************************************************** - * EOF - **********************************************************************************************************************/ diff --git a/hw/bsp/mcxn/boards/frdmmcxn947/pin_mux.h b/hw/bsp/mcxn/boards/frdmmcxn947/pin_mux.h deleted file mode 100644 index 40968c275..000000000 --- a/hw/bsp/mcxn/boards/frdmmcxn947/pin_mux.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -#ifndef _PIN_MUX_H_ -#define _PIN_MUX_H_ - -/*! - * @addtogroup pin_mux - * @{ - */ - -/*********************************************************************************************************************** - * API - **********************************************************************************************************************/ - -#if defined(__cplusplus) -extern "C" { -#endif - -/*! - * @brief Calls initialization functions. - * - */ -void BOARD_InitBootPins(void); - -/*! - * @brief Configures pin routing and optionally pin electrical features. - * - */ -void BOARD_InitPins(void); - -#if defined(__cplusplus) -} -#endif - -/*! - * @} - */ -#endif /* _PIN_MUX_H_ */ - -/*********************************************************************************************************************** - * EOF - **********************************************************************************************************************/ diff --git a/hw/bsp/mcxn/boards/mcxn947brk/board.cmake b/hw/bsp/mcxn/boards/mcxn947brk/board.cmake deleted file mode 100644 index 8c3280743..000000000 --- a/hw/bsp/mcxn/boards/mcxn947brk/board.cmake +++ /dev/null @@ -1,21 +0,0 @@ -set(MCU_VARIANT MCXN947) -set(MCU_CORE MCXN947_cm33_core0) - -set(JLINK_DEVICE MCXN947_M33_0) -set(PYOCD_TARGET MCXN947) -set(NXPLINK_DEVICE MCXN947:MCXN947) - -set(PORT 1) - -function(update_board TARGET) - target_compile_definitions(${TARGET} PUBLIC - CPU_MCXN947VDF_cm33_core0 - BOARD_TUD_RHPORT=${PORT} - # port 0 is fullspeed, port 1 is highspeed - BOARD_TUD_MAX_SPEED=$ - ) - target_sources(${TARGET} PUBLIC - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pin_mux.c - ) -endfunction() diff --git a/hw/bsp/mcxn/boards/mcxn947brk/board.h b/hw/bsp/mcxn/boards/mcxn947brk/board.h deleted file mode 100644 index eae98bfa7..000000000 --- a/hw/bsp/mcxn/boards/mcxn947brk/board.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2021, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef BOARD_H_ -#define BOARD_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -// LED -#define LED_GPIO GPIO3 -#define LED_CLK kCLOCK_Gpio3 -#define LED_PIN 4 // red -#define LED_STATE_ON 0 - -// WAKE button (Dummy, use unused pin -#define BUTTON_GPIO GPIO0 -#define BUTTON_CLK kCLOCK_Gpio0 -#define BUTTON_PIN 6 -#define BUTTON_STATE_ACTIVE 0 - -// UART -#define UART_DEV LPUART4 - -static inline void board_uart_init_clock(void) { - /* attach FRO 12M to FLEXCOMM4 */ - CLOCK_SetClkDiv(kCLOCK_DivFlexcom4Clk, 1u); - CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4); - RESET_ClearPeripheralReset(kFC4_RST_SHIFT_RSTn); -} - -//#define UART_RX_PINMUX 0, 24, IOCON_PIO_DIG_FUNC1_EN -//#define UART_TX_PINMUX 0, 25, IOCON_PIO_DIG_FUNC1_EN - -// XTAL -#define XTAL0_CLK_HZ (24 * 1000 * 1000U) - -#ifdef __cplusplus - } -#endif - -#endif diff --git a/hw/bsp/mcxn/boards/mcxn947brk/board.mk b/hw/bsp/mcxn/boards/mcxn947brk/board.mk deleted file mode 100644 index aaad5e73e..000000000 --- a/hw/bsp/mcxn/boards/mcxn947brk/board.mk +++ /dev/null @@ -1,11 +0,0 @@ -MCU_VARIANT = MCXN947 -MCU_CORE = MCXN947_cm33_core0 -PORT ?= 1 - -CFLAGS += -DCPU_MCXN947VDF_cm33_core0 - -JLINK_DEVICE = MCXN947_M33_0 -PYOCD_TARGET = MCXN947 - -# flash using pyocd -flash: flash-jlink diff --git a/hw/bsp/mcxn/boards/mcxn947brk/clock_config.c b/hw/bsp/mcxn/boards/mcxn947brk/clock_config.c deleted file mode 100644 index 37d2b4dfc..000000000 --- a/hw/bsp/mcxn/boards/mcxn947brk/clock_config.c +++ /dev/null @@ -1,338 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ -/* - * How to setup clock using clock driver functions: - * - * 1. Setup clock sources. - * - * 2. Set up wait states of the flash. - * - * 3. Set up all dividers. - * - * 4. Set up all selectors to provide selected clocks. - * - */ - -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!GlobalInfo -product: Clocks v10.0 -processor: MCXN947 -package_id: MCXN947VDF -mcu_data: ksdk2_0 -processor_version: 0.12.3 -board: MCX-N9XX-EVK - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -#include "clock_config.h" -#include "fsl_clock.h" - -/******************************************************************************* - * Definitions - ******************************************************************************/ - -/******************************************************************************* - * Variables - ******************************************************************************/ -/* System clock frequency. */ -// extern uint32_t SystemCoreClock; - -/******************************************************************************* - ************************ BOARD_InitBootClocks function ************************ - ******************************************************************************/ -void BOARD_InitBootClocks(void) -{ - BOARD_BootClockPLL150M(); -} - -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO12M ********************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFRO12M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: MAIN_clock.outFreq, value: 12 MHz} -- {id: Slow_clock.outFreq, value: 3 MHz} -- {id: System_clock.outFreq, value: 12 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: SCGMode, value: SIRC} -- {id: SCG.SCSSEL.sel, value: SCG.SIRC} -- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -void BOARD_BootClockFRO12M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK; -} - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF48M ********************* - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFROHF48M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_clock.outFreq, value: 48 MHz} -- {id: MAIN_clock.outFreq, value: 48 MHz} -- {id: Slow_clock.outFreq, value: 12 MHz} -- {id: System_clock.outFreq, value: 48 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -void BOARD_BootClockFROHF48M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK; -} - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF144M ******************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockFROHF144M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_clock.outFreq, value: 144 MHz} -- {id: MAIN_clock.outFreq, value: 144 MHz} -- {id: Slow_clock.outFreq, value: 18 MHz} -- {id: System_clock.outFreq, value: 72 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: SYSCON.AHBCLKDIV.scale, value: '2', locked: true} -- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} -sources: -- {id: SCG.FIRC.outFreq, value: 144 MHz} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -void BOARD_BootClockFROHF144M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupFROHFClocking(144000000U); /*!< Enable FRO HF(144MHz) output */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 2U); /*!< Set AHBCLKDIV divider to value 2 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK; -} - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL150M ********************* - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockPLL150M -called_from_default_init: true -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: FRO_HF_clock.outFreq, value: 48 MHz} -- {id: MAIN_clock.outFreq, value: 150 MHz} -- {id: PLL0_CLK_clock.outFreq, value: 150 MHz} -- {id: Slow_clock.outFreq, value: 37.5 MHz} -- {id: System_clock.outFreq, value: 150 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: PLL0_Mode, value: Normal} -- {id: RunPowerMode, value: OD} -- {id: SCGMode, value: PLL0} -- {id: SCG.PLL0M_MULT.scale, value: '50', locked: true} -- {id: SCG.PLL0SRCSEL.sel, value: SCG.FIRC_48M} -- {id: SCG.PLL0_NDIV.scale, value: '8', locked: true} -- {id: SCG.SCSSEL.sel, value: SCG.PLL0_CLK} -- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -void BOARD_BootClockPLL150M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ - - /*!< Set up PLL0 */ - const pll_setup_t pll0Setup = { - .pllctrl = SCG_APLLCTRL_SOURCE(1U) | SCG_APLLCTRL_SELI(27U) | SCG_APLLCTRL_SELP(13U), - .pllndiv = SCG_APLLNDIV_NDIV(8U), - .pllpdiv = SCG_APLLPDIV_PDIV(1U), - .pllmdiv = SCG_APLLMDIV_MDIV(50U), - .pllRate = 150000000U - }; - CLOCK_SetPLL0Freq(&pll0Setup); /*!< Configure PLL0 to the desired values */ - CLOCK_SetPll0MonitorMode(kSCG_Pll0MonitorDisable); /* Pll0 Monitor is disabled */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kPLL0_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL0 */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK; -} - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL100M ********************* - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockPLL100M -outputs: -- {id: CLK_144M_clock.outFreq, value: 144 MHz} -- {id: CLK_48M_clock.outFreq, value: 48 MHz} -- {id: CLK_IN_clock.outFreq, value: 24 MHz} -- {id: FRO_12M_clock.outFreq, value: 12 MHz} -- {id: MAIN_clock.outFreq, value: 100 MHz} -- {id: PLL1_CLK_clock.outFreq, value: 100 MHz} -- {id: Slow_clock.outFreq, value: 25 MHz} -- {id: System_clock.outFreq, value: 100 MHz} -- {id: gdet_clock.outFreq, value: 48 MHz} -- {id: trng_clock.outFreq, value: 48 MHz} -settings: -- {id: PLL1_Mode, value: Normal} -- {id: SCGMode, value: PLL1} -- {id: SCG.PLL1M_MULT.scale, value: '100', locked: true} -- {id: SCG.PLL1_NDIV.scale, value: '6', locked: true} -- {id: SCG.PLL1_PDIV.scale, value: '4', locked: true} -- {id: SCG.SCSSEL.sel, value: SCG.PLL1_CLK} -- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled} -- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled} -- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a} -- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a} -sources: -- {id: SCG.SOSC.outFreq, value: 24 MHz, enabled: true} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -/******************************************************************************* - * Code for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -void BOARD_BootClockPLL100M(void) -{ - /*!< Enable SCG clock */ - CLOCK_EnableClock(kCLOCK_Scg); - - CLOCK_SetupExtClocking(24000000U); - CLOCK_SetSysOscMonitorMode(kSCG_SysOscMonitorDisable); /* System OSC Clock Monitor is disabled */ - - /*!< Set up PLL1 */ - const pll_setup_t pll1Setup = { - .pllctrl = SCG_SPLLCTRL_SOURCE(0U) | SCG_SPLLCTRL_SELI(53U) | SCG_SPLLCTRL_SELP(26U), - .pllndiv = SCG_SPLLNDIV_NDIV(6U), - .pllpdiv = SCG_SPLLPDIV_PDIV(2U), - .pllmdiv = SCG_SPLLMDIV_MDIV(100U), - .pllRate = 100000000U - }; - CLOCK_SetPLL1Freq(&pll1Setup); /*!< Configure PLL1 to the desired values */ - CLOCK_SetPll1MonitorMode(kSCG_Pll1MonitorDisable); /* Pll1 Monitor is disabled */ - - /*!< Set up clock selectors - Attach clocks to the peripheries */ - CLOCK_AttachClk(kPLL1_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL1 */ - - /*!< Set up dividers */ - CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */ - - /* Set SystemCoreClock variable */ - SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK; -} diff --git a/hw/bsp/mcxn/boards/mcxn947brk/clock_config.h b/hw/bsp/mcxn/boards/mcxn947brk/clock_config.h deleted file mode 100644 index c238a0423..000000000 --- a/hw/bsp/mcxn/boards/mcxn947brk/clock_config.h +++ /dev/null @@ -1,177 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -#ifndef _CLOCK_CONFIG_H_ -#define _CLOCK_CONFIG_H_ - -#include "fsl_common.h" - -/******************************************************************************* - * Definitions - ******************************************************************************/ -#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal frequency in Hz */ -#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32K frequency in Hz */ - -/******************************************************************************* - ************************ BOARD_InitBootClocks function ************************ - ******************************************************************************/ - -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes default configuration of clocks. - * - */ -void BOARD_InitBootClocks(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockFRO12M ********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */ -#define BOARD_BOOTCLOCKFRO12M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFRO12M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFRO12M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF48M ********************* - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ -#define BOARD_BOOTCLOCKFROHF48M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFROHF48M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFROHF48M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************* Configuration BOARD_BootClockFROHF144M ******************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK 144000000U /*!< Core clock frequency: 144000000Hz */ -#define BOARD_BOOTCLOCKFROHF144M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockFROHF144M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockFROHF144M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL150M ********************* - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 150000000U /*!< Core clock frequency: 150000000Hz */ -#define BOARD_BOOTCLOCKPLL150M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockPLL150M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockPLL150M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ******************** Configuration BOARD_BootClockPLL100M ********************* - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK 100000000U /*!< Core clock frequency: 100000000Hz */ -#define BOARD_BOOTCLOCKPLL100M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */ - - -/******************************************************************************* - * API for BOARD_BootClockPLL100M configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockPLL100M(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -#endif /* _CLOCK_CONFIG_H_ */ diff --git a/hw/bsp/mcxn/boards/mcxn947brk/pin_mux.c b/hw/bsp/mcxn/boards/mcxn947brk/pin_mux.c deleted file mode 100644 index acc2f3e45..000000000 --- a/hw/bsp/mcxn/boards/mcxn947brk/pin_mux.c +++ /dev/null @@ -1,141 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -/* clang-format off */ -/* - * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!GlobalInfo -product: Pins v12.0 -processor: MCXN947 -package_id: MCXN947VDF -mcu_data: ksdk2_0 -processor_version: 0.12.3 - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** - */ -/* clang-format on */ - -#include "fsl_common.h" -#include "fsl_port.h" -#include "pin_mux.h" - -/* FUNCTION ************************************************************************************************************ - * - * Function Name : BOARD_InitBootPins - * Description : Calls initialization functions. - * - * END ****************************************************************************************************************/ -void BOARD_InitBootPins(void) -{ - BOARD_InitPins(); -} - -/* clang-format off */ -/* - * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -BOARD_InitPins: -- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'} -- pin_list: - - {pin_num: A1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P0, pin_signal: PIO1_8/WUU0_IN10/LPTMR1_ALT3/TRACE_DATA0/FC4_P0/FC5_P4/CT_INP8/SCT0_OUT2/FLEXIO0_D16/PLU_OUT0/ENET0_TXD2/I3C1_SDA/TSI0_CH17/ADC1_A8, - slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, pull_value: low, input_buffer: enable, - invert_input: normal} - - {pin_num: B1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P1, pin_signal: PIO1_9/TRACE_DATA1/FC4_P1/FC5_P5/CT_INP9/SCT0_OUT3/FLEXIO0_D17/PLU_OUT1/ENET0_TXD3/I3C1_SCL/TSI0_CH18/ADC1_A9, - slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, input_buffer: enable, invert_input: normal} - - {pin_num: F14, peripheral: GPIO3, signal: 'GPIO, 4', pin_signal: PIO3_4/FC7_P2/CT_INP18/PWM0_X2/FLEXIO0_D12/SIM1_CLK, slew_rate: fast, open_drain: disable, drive_strength: low, - pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** - */ -/* clang-format on */ - -/* FUNCTION ************************************************************************************************************ - * - * Function Name : BOARD_InitPins - * Description : Configures pin routing and optionally pin electrical features. - * - * END ****************************************************************************************************************/ -void BOARD_InitPins(void) -{ - /* Enables the clock for PORT1: Enables clock */ - CLOCK_EnableClock(kCLOCK_Port1); - /* Enables the clock for PORT3: Enables clock */ - CLOCK_EnableClock(kCLOCK_Port3); - - const port_pin_config_t port1_8_pinA1_config = {/* Internal pull-up/down resistor is disabled */ - kPORT_PullDisable, - /* Low internal pull resistor value is selected. */ - kPORT_LowPullResistor, - /* Fast slew rate is configured */ - kPORT_FastSlewRate, - /* Passive input filter is disabled */ - kPORT_PassiveFilterDisable, - /* Open drain output is disabled */ - kPORT_OpenDrainDisable, - /* Low drive strength is configured */ - kPORT_LowDriveStrength, - /* Pin is configured as FC4_P0 */ - kPORT_MuxAlt2, - /* Digital input enabled */ - kPORT_InputBufferEnable, - /* Digital input is not inverted */ - kPORT_InputNormal, - /* Pin Control Register fields [15:0] are not locked */ - kPORT_UnlockRegister}; - /* PORT1_8 (pin A1) is configured as FC4_P0 */ - PORT_SetPinConfig(PORT1, 8U, &port1_8_pinA1_config); - - const port_pin_config_t port1_9_pinB1_config = {/* Internal pull-up/down resistor is disabled */ - kPORT_PullDisable, - /* Low internal pull resistor value is selected. */ - kPORT_LowPullResistor, - /* Fast slew rate is configured */ - kPORT_FastSlewRate, - /* Passive input filter is disabled */ - kPORT_PassiveFilterDisable, - /* Open drain output is disabled */ - kPORT_OpenDrainDisable, - /* Low drive strength is configured */ - kPORT_LowDriveStrength, - /* Pin is configured as FC4_P1 */ - kPORT_MuxAlt2, - /* Digital input enabled */ - kPORT_InputBufferEnable, - /* Digital input is not inverted */ - kPORT_InputNormal, - /* Pin Control Register fields [15:0] are not locked */ - kPORT_UnlockRegister}; - /* PORT1_9 (pin B1) is configured as FC4_P1 */ - PORT_SetPinConfig(PORT1, 9U, &port1_9_pinB1_config); - - const port_pin_config_t port3_4_pinF14_config = {/* Internal pull-up/down resistor is disabled */ - kPORT_PullDisable, - /* Low internal pull resistor value is selected. */ - kPORT_LowPullResistor, - /* Fast slew rate is configured */ - kPORT_FastSlewRate, - /* Passive input filter is disabled */ - kPORT_PassiveFilterDisable, - /* Open drain output is disabled */ - kPORT_OpenDrainDisable, - /* Low drive strength is configured */ - kPORT_LowDriveStrength, - /* Pin is configured as PIO3_4 */ - kPORT_MuxAlt0, - /* Digital input enabled */ - kPORT_InputBufferEnable, - /* Digital input is not inverted */ - kPORT_InputNormal, - /* Pin Control Register fields [15:0] are not locked */ - kPORT_UnlockRegister}; - /* PORT3_4 (pin F14) is configured as PIO3_4 */ - PORT_SetPinConfig(PORT3, 4U, &port3_4_pinF14_config); -} -/*********************************************************************************************************************** - * EOF - **********************************************************************************************************************/ diff --git a/hw/bsp/mcxn/boards/mcxn947brk/pin_mux.h b/hw/bsp/mcxn/boards/mcxn947brk/pin_mux.h deleted file mode 100644 index 40968c275..000000000 --- a/hw/bsp/mcxn/boards/mcxn947brk/pin_mux.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright 2022 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -#ifndef _PIN_MUX_H_ -#define _PIN_MUX_H_ - -/*! - * @addtogroup pin_mux - * @{ - */ - -/*********************************************************************************************************************** - * API - **********************************************************************************************************************/ - -#if defined(__cplusplus) -extern "C" { -#endif - -/*! - * @brief Calls initialization functions. - * - */ -void BOARD_InitBootPins(void); - -/*! - * @brief Configures pin routing and optionally pin electrical features. - * - */ -void BOARD_InitPins(void); - -#if defined(__cplusplus) -} -#endif - -/*! - * @} - */ -#endif /* _PIN_MUX_H_ */ - -/*********************************************************************************************************************** - * EOF - **********************************************************************************************************************/ diff --git a/hw/bsp/mcxn/debug.jlinkscript b/hw/bsp/mcxn/debug.jlinkscript deleted file mode 100644 index fd8bcffef..000000000 --- a/hw/bsp/mcxn/debug.jlinkscript +++ /dev/null @@ -1,5 +0,0 @@ -int SetupTarget(void) { - JLINK_ExecCommand("SetRTTSearchRanges 0x20000000 0x40000"); - - return 0; -} diff --git a/hw/bsp/mcxn/family.c b/hw/bsp/mcxn/family.c deleted file mode 100644 index 8672ca63f..000000000 --- a/hw/bsp/mcxn/family.c +++ /dev/null @@ -1,245 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "bsp/board_api.h" -#include "fsl_device_registers.h" -#include "fsl_gpio.h" -#include "fsl_lpuart.h" -#include "board.h" - -#include "pin_mux.h" -#include "clock_config.h" - -#ifdef BOARD_TUD_RHPORT - #define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n) -#else - #define PORT_SUPPORT_DEVICE(_n) 0 -#endif - -#ifdef BOARD_TUH_RHPORT - #define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n) -#else - #define PORT_SUPPORT_HOST(_n) 0 -#endif - -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM -//--------------------------------------------------------------------+ - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB0_FS_IRQHandler(void) -{ - tud_int_handler(0); -} - -void USB1_HS_IRQHandler(void) -{ - tud_int_handler(1); -} - -void board_init(void) -{ - BOARD_InitPins(); - BOARD_InitBootClocks(); - CLOCK_SetupExtClocking(XTAL0_CLK_HZ); - - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); - -#if CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB1_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); -#endif - - // LED - CLOCK_EnableClock(LED_CLK); - gpio_pin_config_t led_config = { - kGPIO_DigitalOutput, - 0, - }; - GPIO_PinInit(LED_GPIO,LED_PIN, &led_config); - board_led_write(0); - -#ifdef NEOPIXEL_PIN - // Neopixel - static uint32_t pixelData[NEOPIXEL_NUMBER]; - IOCON_PinMuxSet(IOCON, NEOPIXEL_PORT, NEOPIXEL_PIN, IOCON_PIO_DIG_FUNC4_EN); - - sctpix_init(NEOPIXEL_TYPE); - sctpix_addCh(NEOPIXEL_CH, pixelData, NEOPIXEL_NUMBER); - sctpix_setPixel(NEOPIXEL_CH, 0, 0x100010); - sctpix_setPixel(NEOPIXEL_CH, 1, 0x100010); - sctpix_show(); -#endif - - // Button -#ifdef BUTTON_GPIO - CLOCK_EnableClock(BUTTON_CLK); - gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0}; - GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); -#endif - -#ifdef UART_DEV - // UART -// IOCON_PinMuxSet(IOCON, UART_RX_PINMUX); -// IOCON_PinMuxSet(IOCON, UART_TX_PINMUX); - - // Enable UART when debug log is on - board_uart_init_clock(); - - lpuart_config_t uart_config; - LPUART_GetDefaultConfig(&uart_config); - uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; - uart_config.enableTx = true; - uart_config.enableRx = true; - LPUART_Init(UART_DEV, &uart_config, 12000000u); -#endif - - // USB VBUS - /* PORT0 PIN22 configured as USB0_VBUS */ - -#if PORT_SUPPORT_DEVICE(0) - // Port0 is Full Speed - - CLOCK_AttachClk(kCLK_48M_to_USB0); - CLOCK_EnableClock(kCLOCK_Usb0Ram); - CLOCK_EnableClock(kCLOCK_Usb0Fs); - CLOCK_EnableUsbfsClock(); -#endif - -#if PORT_SUPPORT_DEVICE(1) - // Port1 is High Speed - - // Power - SPC0->ACTIVE_VDELAY = 0x0500; - /* Change the power DCDC to 1.8v (By default, DCDC is 1.8V), CORELDO to 1.1v (By default, CORELDO is 1.0V) */ - SPC0->ACTIVE_CFG &= ~SPC_ACTIVE_CFG_CORELDO_VDD_DS_MASK; - SPC0->ACTIVE_CFG |= SPC_ACTIVE_CFG_DCDC_VDD_LVL(0x3) | SPC_ACTIVE_CFG_CORELDO_VDD_LVL(0x3) | - SPC_ACTIVE_CFG_SYSLDO_VDD_DS_MASK | SPC_ACTIVE_CFG_DCDC_VDD_DS(0x2u); - /* Wait until it is done */ - while (SPC0->SC & SPC_SC_BUSY_MASK) {} - if (0u == (SCG0->LDOCSR & SCG_LDOCSR_LDOEN_MASK)) { - SCG0->TRIM_LOCK = 0x5a5a0001U; - SCG0->LDOCSR |= SCG_LDOCSR_LDOEN_MASK; - /* wait LDO ready */ - while (0U == (SCG0->LDOCSR & SCG_LDOCSR_VOUT_OK_MASK)); - } - SYSCON->AHBCLKCTRLSET[2] |= SYSCON_AHBCLKCTRL2_USB_HS_MASK | SYSCON_AHBCLKCTRL2_USB_HS_PHY_MASK; - SCG0->SOSCCFG &= ~(SCG_SOSCCFG_RANGE_MASK | SCG_SOSCCFG_EREFS_MASK); - /* xtal = 20 ~ 30MHz */ - SCG0->SOSCCFG = (1U << SCG_SOSCCFG_RANGE_SHIFT) | (1U << SCG_SOSCCFG_EREFS_SHIFT); - SCG0->SOSCCSR |= SCG_SOSCCSR_SOSCEN_MASK; - while (1) { - if (SCG0->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK) { - break; - } - } - - // Clock - SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK | SYSCON_CLOCK_CTRL_CLKIN_ENA_FM_USBH_LPT_MASK; - CLOCK_EnableClock(kCLOCK_UsbHs); - CLOCK_EnableClock(kCLOCK_UsbHsPhy); - CLOCK_EnableUsbhsPhyPllClock(kCLOCK_Usbphy480M, 24000000U); - CLOCK_EnableUsbhsClock(); - - // USB PHY -#if ((!(defined FSL_FEATURE_SOC_CCM_ANALOG_COUNT)) && (!(defined FSL_FEATURE_SOC_ANATOP_COUNT))) - USBPHY->TRIM_OVERRIDE_EN = 0x001fU; /* override IFR value */ -#endif - - // Enable PHY support for Low speed device + LS via FS Hub - USBPHY->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK; - - // Enable all power for normal operation - USBPHY->PWD = 0; - - // TX Timing - uint32_t phytx = USBPHY->TX; - phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK); - phytx |= USBPHY_TX_D_CAL(0x04) | USBPHY_TX_TXCAL45DP(0x07) | USBPHY_TX_TXCAL45DM(0x07); - //phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06); - USBPHY->TX = phytx; -#endif -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); - -#ifdef NEOPIXEL_PIN - if (state) { - sctpix_setPixel(NEOPIXEL_CH, 0, 0x100000); - sctpix_setPixel(NEOPIXEL_CH, 1, 0x101010); - } else { - sctpix_setPixel(NEOPIXEL_CH, 0, 0x001000); - sctpix_setPixel(NEOPIXEL_CH, 1, 0x000010); - } - sctpix_show(); -#endif -} - -uint32_t board_button_read(void) -{ -#ifdef BUTTON_GPIO - return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN); -#endif -} - -int board_uart_read(uint8_t* buf, int len) -{ - (void) buf; (void) len; - return 0; -} - -int board_uart_write(void const * buf, int len) -{ -#ifdef UART_DEV - LPUART_WriteBlocking(UART_DEV, (uint8_t const *) buf, len); - return len; -#else - (void) buf; (void) len; - return 0; -#endif -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif diff --git a/hw/bsp/mcxn/family.cmake b/hw/bsp/mcxn/family.cmake deleted file mode 100644 index 13d1d44ef..000000000 --- a/hw/bsp/mcxn/family.cmake +++ /dev/null @@ -1,110 +0,0 @@ -include_guard() - -if (NOT BOARD) - message(FATAL_ERROR "BOARD not specified") -endif () - -set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk) -set(CMSIS_DIR ${TOP}/lib/CMSIS_5) - -# include board specific -include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) - -# toolchain set up -set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor") -set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake) - -set(FAMILY_MCUS MCXN9 CACHE INTERNAL "") - - -#------------------------------------ -# BOARD_TARGET -#------------------------------------ -# only need to be built ONCE for all examples -function(add_board_target BOARD_TARGET) - if (NOT TARGET ${BOARD_TARGET}) - add_library(${BOARD_TARGET} STATIC - # external driver - #lib/sct_neopixel/sct_neopixel.c - - # driver - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_gpio.c - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_common_arm.c - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpuart.c - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpflexcomm.c - # mcu - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c - ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c - ) - # target_compile_definitions(${BOARD_TARGET} PUBLIC - # ) - target_include_directories(${BOARD_TARGET} PUBLIC - # driver - # mcu - ${CMSIS_DIR}/CMSIS/Core/Include - ${SDK_DIR}/devices/${MCU_VARIANT} - ${SDK_DIR}/devices/${MCU_VARIANT}/drivers - ) - - update_board(${BOARD_TARGET}) - - if (CMAKE_C_COMPILER_ID STREQUAL "GNU") - target_sources(${BOARD_TARGET} PUBLIC - ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S - ) - target_link_options(${BOARD_TARGET} PUBLIC - # linker file - "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld" - # nanolib - --specs=nosys.specs - --specs=nano.specs - ) - elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") - target_link_options(${BOARD_TARGET} PUBLIC - "LINKER:--config=${LD_FILE_IAR}" - ) - endif () - endif () -endfunction() - - -#------------------------------------ -# Functions -#------------------------------------ -function(family_configure_example TARGET RTOS) - family_configure_common(${TARGET} ${RTOS}) - - # Board target - add_board_target(board_${BOARD}) - - #---------- Port Specific ---------- - # These files are built for each example since it depends on example's tusb_config.h - target_sources(${TARGET} PUBLIC - # BSP - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c - ) - target_include_directories(${TARGET} PUBLIC - # family, hw, board - ${CMAKE_CURRENT_FUNCTION_LIST_DIR} - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} - ) - - # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_MCXN9 ${RTOS}) - target_sources(${TARGET}-tinyusb PUBLIC - # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS - ${TOP}/src/portable/chipidea/$ - ) - target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) - - # Link dependencies - target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) - - # Flashing - family_flash_jlink(${TARGET}) - #family_flash_nxplink(${TARGET}) - #family_flash_pyocd(${TARGET}) -endfunction() diff --git a/hw/bsp/mcxn/family.mk b/hw/bsp/mcxn/family.mk deleted file mode 100644 index 526effdfb..000000000 --- a/hw/bsp/mcxn/family.mk +++ /dev/null @@ -1,51 +0,0 @@ -UF2_FAMILY_ID = 0x2abc77ec -SDK_DIR = hw/mcu/nxp/mcux-sdk - -DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 - -include $(TOP)/$(BOARD_PATH)/board.mk -CPU_CORE ?= cortex-m33 - -# Default to Highspeed PORT1 -PORT ?= 1 - -CFLAGS += \ - -flto \ - -DCFG_TUSB_MCU=OPT_MCU_MCXN9 \ - -DBOARD_TUD_RHPORT=$(PORT) \ - -# mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration - -LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs - -# All source paths should be relative to the top level. -LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld - -# TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS -ifeq ($(PORT), 1) - $(info "PORT1 High Speed") - CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED - SRC_C += src/portable/chipidea/ci_hs/dcd_ci_hs.c -else - $(info "PORT0 Full Speed") - CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED - SRC_C += src/portable/chipidea/ci_fs/dcd_ci_fs.c -endif - -SRC_C += \ - $(SDK_DIR)/devices/$(MCU_VARIANT)/system_$(MCU_CORE).c \ - $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \ - $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \ - $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_gpio.c \ - $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_common_arm.c \ - $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpflexcomm.c \ - $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpuart.c \ - -INC += \ - $(TOP)/$(BOARD_PATH) \ - $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ - $(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT) \ - $(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers \ - -SRC_S += $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/startup_$(MCU_CORE).S diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 21ae3a71e..7b6da5f59 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -100,10 +100,10 @@ #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_RHPORT_HIGHSPEED 1 -#elif TU_CHECK_MCU(OPT_MCU_MCXA) +#elif TU_CHECK_MCU(OPT_MCU_MCXA15) // USB0 is chipidea FS #define TUP_USBIP_CHIPIDEA_FS - #define TUP_USBIP_CHIPIDEA_FS_MCXA + #define TUP_USBIP_CHIPIDEA_FS_MCX #define TUP_DCD_ENDPOINT_MAX 16 diff --git a/src/portable/chipidea/ci_fs/ci_fs_mcx.h b/src/portable/chipidea/ci_fs/ci_fs_mcx.h index 3bfcd398e..bf88df0f4 100644 --- a/src/portable/chipidea/ci_fs/ci_fs_mcx.h +++ b/src/portable/chipidea/ci_fs/ci_fs_mcx.h @@ -29,19 +29,30 @@ #include "fsl_device_registers.h" -#define CI_FS_REG(_port) ((ci_fs_regs_t*) USBFS0_BASE) +#if CFG_TUSB_MCU == OPT_MCU_MCXN9 + #define CI_FS_REG(_port) ((ci_fs_regs_t*) USBFS0_BASE) + #define USB0_IRQN USB0_FS_IRQn + +#elif CFG_TUSB_MCU == OPT_MCU_MCXA15 + #define CI_FS_REG(_port) ((ci_fs_regs_t*) USB0_BASE) + #define USB0_IRQN USB0_IRQn + +#else + #error "MCU is not supported" +#endif + #define CI_REG CI_FS_REG(0) void dcd_int_enable(uint8_t rhport) { (void) rhport; - NVIC_EnableIRQ(USB0_FS_IRQn); + NVIC_EnableIRQ(USB0_IRQN); } void dcd_int_disable(uint8_t rhport) { (void) rhport; - NVIC_DisableIRQ(USB0_FS_IRQn); + NVIC_DisableIRQ(USB0_IRQN); } #endif diff --git a/src/portable/chipidea/ci_fs/ci_fs_mcxa.h b/src/portable/chipidea/ci_fs/ci_fs_mcxa.h deleted file mode 100644 index 81786efdf..000000000 --- a/src/portable/chipidea/ci_fs/ci_fs_mcxa.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2023 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef _CI_FS_MCXA_H -#define _CI_FS_MCXA_H - -#include "fsl_device_registers.h" - -#define CI_FS_REG(_port) ((ci_fs_regs_t*) USB0_BASE) -#define CI_REG CI_FS_REG(0) - -void dcd_int_enable(uint8_t rhport) -{ - (void) rhport; - NVIC_EnableIRQ(USB0_IRQn); -} - -void dcd_int_disable(uint8_t rhport) -{ - (void) rhport; - NVIC_DisableIRQ(USB0_IRQn); -} - -#endif diff --git a/src/portable/chipidea/ci_fs/dcd_ci_fs.c b/src/portable/chipidea/ci_fs/dcd_ci_fs.c index 08e73711f..9327e09d8 100644 --- a/src/portable/chipidea/ci_fs/dcd_ci_fs.c +++ b/src/portable/chipidea/ci_fs/dcd_ci_fs.c @@ -35,8 +35,6 @@ #include "ci_fs_kinetis.h" #elif defined(TUP_USBIP_CHIPIDEA_FS_MCX) #include "ci_fs_mcx.h" -#elif defined(TUP_USBIP_CHIPIDEA_FS_MCXA) - #include "ci_fs_mcxa.h" #else #error "MCU is not supported" #endif diff --git a/src/tusb_option.h b/src/tusb_option.h index fe9c44e96..e46e641f3 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -175,7 +175,7 @@ // NXP LPC MCX #define OPT_MCU_MCXN9 2300 ///< NXP MCX N9 Series -#define OPT_MCU_MCXA 2301 ///< NXP MCX A Series +#define OPT_MCU_MCXA15 2301 ///< NXP MCX A15 Series // Check if configured MCU is one of listed // Apply _TU_CHECK_MCU with || as separator to list of input -- cgit v1.3.1 From ec91660119c6ce4ccc6aa011f2c6cc9869ab9410 Mon Sep 17 00:00:00 2001 From: Jerry Palacios Date: Thu, 22 Feb 2024 16:11:23 -0600 Subject: Revert "Merge branch 'hathach:master' into MCX" This reverts commit 6afd4a57896f9c9e794de3ab6eabc73d18be4bd0, reversing changes made to 5c14bd13da211ff2679115b0dba96ac80c1a516c. --- examples/device/cdc_msc_freertos/src/main.c | 51 +-- hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk | 3 + .../boards/frdm_k32l2a4s/clock_config.c | 491 --------------------- .../boards/frdm_k32l2a4s/clock_config.h | 164 ------- hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk | 3 + .../boards/frdm_k32l2b/clock_config.c | 220 --------- .../boards/frdm_k32l2b/clock_config.h | 110 ----- hw/bsp/nrf/boards/pca10095/board.cmake | 3 - hw/bsp/nrf/boards/pca10095/board.h | 4 +- hw/bsp/nrf/boards/pca10095/board.mk | 3 - hw/bsp/nrf/family.c | 1 - src/class/msc/msc_device.c | 2 +- src/class/video/video.h | 6 +- src/class/video/video_device.c | 1 - src/common/tusb_debug.h | 3 +- src/common/tusb_fifo.c | 1 - src/device/usbd.c | 1 + src/host/usbh.c | 22 +- src/host/usbh_pvt.h | 6 +- src/portable/nordic/nrf5x/dcd_nrf5x.c | 8 +- src/portable/ohci/ohci.h | 2 +- 21 files changed, 52 insertions(+), 1053 deletions(-) delete mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.c delete mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.h delete mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.c delete mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.h (limited to 'src/common') diff --git a/examples/device/cdc_msc_freertos/src/main.c b/examples/device/cdc_msc_freertos/src/main.c index e94e8eaec..1dadc4513 100644 --- a/examples/device/cdc_msc_freertos/src/main.c +++ b/examples/device/cdc_msc_freertos/src/main.c @@ -52,8 +52,7 @@ #define USBD_STACK_SIZE (3*configMINIMAL_STACK_SIZE/2) * (CFG_TUSB_DEBUG ? 2 : 1) #endif -#define CDC_STACK_SIZE configMINIMAL_STACK_SIZE -#define BLINKY_STACK_SIZE configMINIMAL_STACK_SIZE +#define CDC_STACK_SZIE configMINIMAL_STACK_SIZE //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF PROTOTYPES @@ -70,22 +69,21 @@ enum { BLINK_SUSPENDED = 2500, }; -// static task +// static timer & task #if configSUPPORT_STATIC_ALLOCATION -StackType_t blinky_stack[BLINKY_STACK_SIZE]; -StaticTask_t blinky_taskdef; +StaticTimer_t blinky_tmdef; StackType_t usb_device_stack[USBD_STACK_SIZE]; StaticTask_t usb_device_taskdef; -StackType_t cdc_stack[CDC_STACK_SIZE]; +StackType_t cdc_stack[CDC_STACK_SZIE]; StaticTask_t cdc_taskdef; #endif -static uint32_t blink_interval_ms = BLINK_NOT_MOUNTED; +TimerHandle_t blinky_tm; +static void led_blinky_cb(TimerHandle_t xTimer); static void usb_device_task(void *param); -void led_blinking_task(void* param); void cdc_task(void *params); //--------------------------------------------------------------------+ @@ -96,20 +94,22 @@ int main(void) { board_init(); #if configSUPPORT_STATIC_ALLOCATION - // blinky task - xTaskCreateStatic(led_blinking_task, "blinky", BLINKY_STACK_SIZE, NULL, 1, blinky_stack, &blinky_taskdef); + // soft timer for blinky + blinky_tm = xTimerCreateStatic(NULL, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), true, NULL, led_blinky_cb, &blinky_tmdef); // Create a task for tinyusb device stack xTaskCreateStatic(usb_device_task, "usbd", USBD_STACK_SIZE, NULL, configMAX_PRIORITIES-1, usb_device_stack, &usb_device_taskdef); // Create CDC task - xTaskCreateStatic(cdc_task, "cdc", CDC_STACK_SIZE, NULL, configMAX_PRIORITIES - 2, cdc_stack, &cdc_taskdef); + xTaskCreateStatic(cdc_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, cdc_stack, &cdc_taskdef); #else - xTaskCreate(led_blinking_task, "blinky", BLINKY_STACK_SIZE, NULL, 1, NULL); + blinky_tm = xTimerCreate(NULL, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), true, NULL, led_blinky_cb); xTaskCreate(usb_device_task, "usbd", USBD_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL); xTaskCreate(cdc_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES - 2, NULL); #endif + xTimerStart(blinky_tm, 0); + // skip starting scheduler (and return) for ESP32-S2 or ESP32-S3 #if !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) vTaskStartScheduler(); @@ -154,12 +154,12 @@ static void usb_device_task(void *param) { // Invoked when device is mounted void tud_mount_cb(void) { - blink_interval_ms = BLINK_MOUNTED; + xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_MOUNTED), 0); } // Invoked when device is unmounted void tud_umount_cb(void) { - blink_interval_ms = BLINK_NOT_MOUNTED; + xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), 0); } // Invoked when usb bus is suspended @@ -167,12 +167,16 @@ void tud_umount_cb(void) { // Within 7ms, device must draw an average of current less than 2.5 mA from bus void tud_suspend_cb(bool remote_wakeup_en) { (void) remote_wakeup_en; - blink_interval_ms = BLINK_SUSPENDED; + xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_SUSPENDED), 0); } // Invoked when usb bus is resumed void tud_resume_cb(void) { - blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED; + if (tud_mounted()) { + xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_MOUNTED), 0); + } else { + xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), 0); + } } //--------------------------------------------------------------------+ @@ -231,17 +235,10 @@ void tud_cdc_rx_cb(uint8_t itf) { //--------------------------------------------------------------------+ // BLINKING TASK //--------------------------------------------------------------------+ -void led_blinking_task(void* param) { - (void) param; - static uint32_t start_ms = 0; +static void led_blinky_cb(TimerHandle_t xTimer) { + (void) xTimer; static bool led_state = false; - while (1) { - // Blink every interval ms - vTaskDelay(blink_interval_ms / portTICK_PERIOD_MS); - start_ms += blink_interval_ms; - - board_led_write(led_state); - led_state = 1 - led_state; // toggle - } + board_led_write(led_state); + led_state = 1 - led_state; // toggle } diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk index c4dc65b63..f69700139 100644 --- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk +++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk @@ -8,6 +8,9 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast # All source paths should be relative to the top level. LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld +SRC_C += \ + $(MCU_DIR)/project_template/clock_config.c \ + # For flash-jlink target JLINK_DEVICE = K32L2A41xxxxA diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.c b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.c deleted file mode 100644 index 2814efc86..000000000 --- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.c +++ /dev/null @@ -1,491 +0,0 @@ -/* - * Copyright 2019 ,2021 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ -/* - * How to setup clock using clock driver functions: - * - * 1. Call CLOCK_InitXXX() to configure corresponding SCG clock source. - * Note: The clock could not be set when it is being used as system clock. - * In default out of reset, the CPU is clocked from FIRC(IRC48M), - * so before setting FIRC, change to use another available clock source. - * - * 2. Call CLOCK_SetXtal0Freq() to set XTAL0 frequency based on board settings. - * - * 3. Call CLOCK_SetXxxModeSysClkConfig() to set SCG mode for Xxx run mode. - * Wait until the system clock source is changed to target source. - * - * 4. If power mode change is needed, call SMC_SetPowerModeProtection() to allow - * corresponding power mode and SMC_SetPowerModeXxx() to change to Xxx mode. - * Supported run mode and clock restrictions could be found in Reference Manual. - */ - -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!GlobalInfo -product: Clocks v7.0 -processor: K32L2A41xxxxA -package_id: K32L2A41VLL1A -mcu_data: ksdk2_0 -processor_version: 9.0.0 - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -#include "fsl_smc.h" -#include "clock_config.h" - -/******************************************************************************* - * Definitions - ******************************************************************************/ -#define SCG_CLKOUTCNFG_SIRC 2U /*!< SCG CLKOUT clock select: Slow IRC */ -#define SCG_SOSC_DISABLE 0U /*!< System OSC disabled */ -#define SCG_SPLL_DISABLE 0U /*!< System PLL disabled */ -#define SCG_SYS_OSC_CAP_0P 0U /*!< Oscillator 0pF capacitor load */ - -/******************************************************************************* - * Variables - ******************************************************************************/ -/* System clock frequency. */ -extern uint32_t SystemCoreClock; - -/******************************************************************************* - * Code - ******************************************************************************/ -/*FUNCTION********************************************************************** - * - * Function Name : CLOCK_CONFIG_SetScgOutSel - * Description : Set the SCG clock out select (CLKOUTSEL). - * Param setting : The selected clock source. - * - *END**************************************************************************/ -static void CLOCK_CONFIG_SetScgOutSel(uint8_t setting) -{ - SCG->CLKOUTCNFG = SCG_CLKOUTCNFG_CLKOUTSEL(setting); -} - -/*FUNCTION********************************************************************** - * - * Function Name : CLOCK_CONFIG_FircSafeConfig - * Description : This function is used to safely configure FIRC clock. - * In default out of reset, the CPU is clocked from FIRC(IRC48M). - * Before setting FIRC, change to use SIRC as system clock, - * then configure FIRC. After FIRC is set, change back to use FIRC - * in case SIRC need to be configured. - * Param fircConfig : FIRC configuration. - * - *END**************************************************************************/ -static void CLOCK_CONFIG_FircSafeConfig(const scg_firc_config_t *fircConfig) -{ - scg_sys_clk_config_t curConfig; - const scg_sirc_config_t scgSircConfig = {.enableMode = kSCG_SircEnable, - .div1 = kSCG_AsyncClkDisable, - .div3 = kSCG_AsyncClkDivBy2, - .range = kSCG_SircRangeHigh}; - scg_sys_clk_config_t sysClkSafeConfigSource = { - .divSlow = kSCG_SysClkDivBy4, /* Slow clock divider */ -#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1) - .reserved1 = 0, - .reserved2 = 0, - .reserved3 = 0, -#endif - .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ -#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1) - .reserved4 = 0, -#endif - .src = kSCG_SysClkSrcSirc, /* System clock source */ -#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1) - .reserved5 = 0, -#endif - }; - /* Init Sirc. */ - CLOCK_InitSirc(&scgSircConfig); - /* Change to use SIRC as system clock source to prepare to change FIRCCFG register. */ - CLOCK_SetRunModeSysClkConfig(&sysClkSafeConfigSource); - /* Wait for clock source switch finished. */ - do - { - CLOCK_GetCurSysClkConfig(&curConfig); - } while (curConfig.src != sysClkSafeConfigSource.src); - - /* Init Firc. */ - CLOCK_InitFirc(fircConfig); - /* Change back to use FIRC as system clock source in order to configure SIRC if needed. */ - sysClkSafeConfigSource.src = kSCG_SysClkSrcFirc; - CLOCK_SetRunModeSysClkConfig(&sysClkSafeConfigSource); - /* Wait for clock source switch finished. */ - do - { - CLOCK_GetCurSysClkConfig(&curConfig); - } while (curConfig.src != sysClkSafeConfigSource.src); -} - -/******************************************************************************* - ************************ BOARD_InitBootClocks function ************************ - ******************************************************************************/ -void BOARD_InitBootClocks(void) -{ - BOARD_BootClockRUN(); -} - -/******************************************************************************* - ********************** Configuration BOARD_BootClockRUN *********************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockRUN -called_from_default_init: true -outputs: -- {id: Core_clock.outFreq, value: 48 MHz} -- {id: FIRCDIV1_CLK.outFreq, value: 48 MHz} -- {id: FIRCDIV3_CLK.outFreq, value: 48 MHz} -- {id: LPO_clock.outFreq, value: 1 kHz} -- {id: OSC32KCLK.outFreq, value: 32.768 kHz} -- {id: SIRCDIV3_CLK.outFreq, value: 4 MHz} -- {id: SIRC_CLK.outFreq, value: 8 MHz} -- {id: SOSCDIV3_CLK.outFreq, value: 32.768 kHz} -- {id: SOSCER_CLK.outFreq, value: 32.768 kHz} -- {id: SOSC_CLK.outFreq, value: 32.768 kHz} -- {id: Slow_clock.outFreq, value: 24 MHz} -- {id: System_clock.outFreq, value: 48 MHz} -settings: -- {id: SCG.FIRCDIV1.scale, value: '1', locked: true} -- {id: SCG.FIRCDIV3.scale, value: '1', locked: true} -- {id: SCG.SIRCDIV3.scale, value: '2', locked: true} -- {id: SCG.SOSCDIV3.scale, value: '1', locked: true} -- {id: SCG_SOSCCFG_OSC_MODE_CFG, value: ModeOscLowPower} -- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled} -- {id: SCG_SOSCCSR_SOSCERCLKEN_CFG, value: Enabled} -sources: -- {id: SCG.SOSC.outFreq, value: 32.768 kHz, enabled: true} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockRUN configuration - ******************************************************************************/ -const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockRUN = - { - .divSlow = kSCG_SysClkDivBy2, /* Slow Clock Divider: divided by 2 */ -#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1) - .reserved1 = 0, - .reserved2 = 0, - .reserved3 = 0, -#endif - .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */ -#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1) - .reserved4 = 0, -#endif - .src = kSCG_SysClkSrcFirc, /* Fast IRC is selected as System Clock Source */ -#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1) - .reserved5 = 0, -#endif - }; -const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockRUN = - { - .freq = 32768U, /* System Oscillator frequency: 32768Hz */ - .enableMode = kSCG_SysOscEnable | kSCG_SysOscEnableErClk,/* Enable System OSC clock, Enable OSCERCLK */ - .monitorMode = kSCG_SysOscMonitorDisable, /* Monitor disabled */ - .div1 = kSCG_AsyncClkDisable, /* System OSC Clock Divider 1: Clock output is disabled */ - .div3 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 3: divided by 1 */ - .capLoad = SCG_SYS_OSC_CAP_0P, /* Oscillator capacity load: 0pF */ - .workMode = kSCG_SysOscModeOscLowPower, /* Oscillator low power */ - }; -const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockRUN = - { - .enableMode = kSCG_SircEnable | kSCG_SircEnableInLowPower,/* Enable SIRC clock, Enable SIRC in low power mode */ - .div1 = kSCG_AsyncClkDisable, /* Slow IRC Clock Divider 1: Clock output is disabled */ - .div3 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 3: divided by 2 */ - .range = kSCG_SircRangeHigh, /* Slow IRC high range clock (8 MHz) */ - }; -const scg_firc_config_t g_scgFircConfig_BOARD_BootClockRUN = - { - .enableMode = kSCG_FircEnable, /* Enable FIRC clock */ - .div1 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 1: divided by 1 */ - .div3 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 3: divided by 1 */ - .range = kSCG_FircRange48M, /* Fast IRC is trimmed to 48MHz */ - .trimConfig = NULL, /* Fast IRC Trim disabled */ - }; -const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockRUN = - { - .enableMode = SCG_SPLL_DISABLE, /* System PLL disabled */ - .monitorMode = kSCG_SysPllMonitorDisable, /* Monitor disabled */ - .div1 = kSCG_AsyncClkDisable, /* System PLL Clock Divider 1: Clock output is disabled */ - .div3 = kSCG_AsyncClkDisable, /* System PLL Clock Divider 3: Clock output is disabled */ - .src = kSCG_SysPllSrcSysOsc, /* System PLL clock source is System OSC */ - .prediv = 0, /* Divided by 1 */ - .mult = 0, /* Multiply Factor is 16 */ - }; -/******************************************************************************* - * Code for BOARD_BootClockRUN configuration - ******************************************************************************/ -void BOARD_BootClockRUN(void) -{ - scg_sys_clk_config_t curConfig; - - /* Init SOSC according to board configuration. */ - CLOCK_InitSysOsc(&g_scgSysOscConfig_BOARD_BootClockRUN); - /* Set the XTAL0 frequency based on board settings. */ - CLOCK_SetXtal0Freq(g_scgSysOscConfig_BOARD_BootClockRUN.freq); - /* Init FIRC. */ - CLOCK_CONFIG_FircSafeConfig(&g_scgFircConfig_BOARD_BootClockRUN); - /* Init SIRC. */ - CLOCK_InitSirc(&g_scgSircConfig_BOARD_BootClockRUN); - /* Set SCG to FIRC mode. */ - CLOCK_SetRunModeSysClkConfig(&g_sysClkConfig_BOARD_BootClockRUN); - /* Wait for clock source switch finished. */ - do - { - CLOCK_GetCurSysClkConfig(&curConfig); - } while (curConfig.src != g_sysClkConfig_BOARD_BootClockRUN.src); - /* Set SystemCoreClock variable. */ - SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; -} - -/******************************************************************************* - ********************* Configuration BOARD_BootClockHSRUN ********************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockHSRUN -outputs: -- {id: CLKOUT.outFreq, value: 8 MHz} -- {id: Core_clock.outFreq, value: 96 MHz, locked: true, accuracy: '0.001'} -- {id: FIRCDIV1_CLK.outFreq, value: 48 MHz} -- {id: FIRCDIV3_CLK.outFreq, value: 48 MHz} -- {id: LPO_clock.outFreq, value: 1 kHz} -- {id: OSC32KCLK.outFreq, value: 32.768 kHz} -- {id: PLLDIV1_CLK.outFreq, value: 96 MHz} -- {id: PLLDIV3_CLK.outFreq, value: 96 MHz} -- {id: SIRCDIV1_CLK.outFreq, value: 8 MHz} -- {id: SIRCDIV3_CLK.outFreq, value: 8 MHz} -- {id: SIRC_CLK.outFreq, value: 8 MHz} -- {id: SOSCDIV1_CLK.outFreq, value: 32.768 kHz} -- {id: SOSCDIV3_CLK.outFreq, value: 32.768 kHz} -- {id: SOSCER_CLK.outFreq, value: 32.768 kHz} -- {id: SOSC_CLK.outFreq, value: 32.768 kHz} -- {id: Slow_clock.outFreq, value: 24 MHz, locked: true, accuracy: '0.001'} -- {id: System_clock.outFreq, value: 96 MHz} -settings: -- {id: SCGMode, value: SPLL} -- {id: powerMode, value: HSRUN} -- {id: CLKOUTConfig, value: 'yes'} -- {id: SCG.DIVSLOW.scale, value: '4'} -- {id: SCG.FIRCDIV1.scale, value: '1', locked: true} -- {id: SCG.FIRCDIV3.scale, value: '1', locked: true} -- {id: SCG.PREDIV.scale, value: '4'} -- {id: SCG.SCSSEL.sel, value: SCG.SPLL_DIV2_CLK} -- {id: SCG.SIRCDIV1.scale, value: '1', locked: true} -- {id: SCG.SIRCDIV3.scale, value: '1', locked: true} -- {id: SCG.SOSCDIV1.scale, value: '1', locked: true} -- {id: SCG.SOSCDIV3.scale, value: '1', locked: true} -- {id: SCG.SPLLDIV1.scale, value: '1', locked: true} -- {id: SCG.SPLLDIV3.scale, value: '1', locked: true} -- {id: SCG.SPLLSRCSEL.sel, value: SCG.FIRC} -- {id: SCG_SOSCCFG_OSC_MODE_CFG, value: ModeOscLowPower} -- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled} -- {id: SCG_SOSCCSR_SOSCERCLKEN_CFG, value: Enabled} -- {id: SCG_SPLLCSR_SPLLEN_CFG, value: Enabled} -sources: -- {id: SCG.SOSC.outFreq, value: 32.768 kHz, enabled: true} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockHSRUN configuration - ******************************************************************************/ -const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockHSRUN = - { - .divSlow = kSCG_SysClkDivBy4, /* Slow Clock Divider: divided by 4 */ -#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1) - .reserved1 = 0, - .reserved2 = 0, - .reserved3 = 0, -#endif - .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */ -#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1) - .reserved4 = 0, -#endif - .src = kSCG_SysClkSrcSysPll, /* System PLL is selected as System Clock Source */ -#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1) - .reserved5 = 0, -#endif - }; -const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockHSRUN = - { - .freq = 32768U, /* System Oscillator frequency: 32768Hz */ - .enableMode = kSCG_SysOscEnable | kSCG_SysOscEnableErClk,/* Enable System OSC clock, Enable OSCERCLK */ - .monitorMode = kSCG_SysOscMonitorDisable, /* Monitor disabled */ - .div1 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 1: divided by 1 */ - .div3 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 3: divided by 1 */ - .capLoad = SCG_SYS_OSC_CAP_0P, /* Oscillator capacity load: 0pF */ - .workMode = kSCG_SysOscModeOscLowPower, /* Oscillator low power */ - }; -const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockHSRUN = - { - .enableMode = kSCG_SircEnable | kSCG_SircEnableInLowPower,/* Enable SIRC clock, Enable SIRC in low power mode */ - .div1 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 1: divided by 1 */ - .div3 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 3: divided by 1 */ - .range = kSCG_SircRangeHigh, /* Slow IRC high range clock (8 MHz) */ - }; -const scg_firc_config_t g_scgFircConfig_BOARD_BootClockHSRUN = - { - .enableMode = kSCG_FircEnable, /* Enable FIRC clock */ - .div1 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 1: divided by 1 */ - .div3 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 3: divided by 1 */ - .range = kSCG_FircRange48M, /* Fast IRC is trimmed to 48MHz */ - .trimConfig = NULL, /* Fast IRC Trim disabled */ - }; -const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockHSRUN = - { - .enableMode = kSCG_SysPllEnable, /* Enable SPLL clock */ - .monitorMode = kSCG_SysPllMonitorDisable, /* Monitor disabled */ - .div1 = kSCG_AsyncClkDivBy1, /* System PLL Clock Divider 1: divided by 1 */ - .div3 = kSCG_AsyncClkDivBy1, /* System PLL Clock Divider 3: divided by 1 */ - .src = kSCG_SysPllSrcFirc, /* System PLL clock source is Fast IRC */ - .prediv = 3, /* Divided by 4 */ - .mult = 0, /* Multiply Factor is 16 */ - }; -/******************************************************************************* - * Code for BOARD_BootClockHSRUN configuration - ******************************************************************************/ -void BOARD_BootClockHSRUN(void) -{ - scg_sys_clk_config_t curConfig; - - /* Init SOSC according to board configuration. */ - CLOCK_InitSysOsc(&g_scgSysOscConfig_BOARD_BootClockHSRUN); - /* Set the XTAL0 frequency based on board settings. */ - CLOCK_SetXtal0Freq(g_scgSysOscConfig_BOARD_BootClockHSRUN.freq); - /* Init FIRC. */ - CLOCK_CONFIG_FircSafeConfig(&g_scgFircConfig_BOARD_BootClockHSRUN); - /* Init SIRC. */ - CLOCK_InitSirc(&g_scgSircConfig_BOARD_BootClockHSRUN); - /* Init SysPll. */ - CLOCK_InitSysPll(&g_scgSysPllConfig_BOARD_BootClockHSRUN); - /* Set HSRUN power mode. */ - SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll); - SMC_SetPowerModeHsrun(SMC); - while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateHsrun) - { - } - - /* Set SCG to SPLL mode. */ - CLOCK_SetHsrunModeSysClkConfig(&g_sysClkConfig_BOARD_BootClockHSRUN); - /* Wait for clock source switch finished. */ - do - { - CLOCK_GetCurSysClkConfig(&curConfig); - } while (curConfig.src != g_sysClkConfig_BOARD_BootClockHSRUN.src); - /* Set SystemCoreClock variable. */ - SystemCoreClock = BOARD_BOOTCLOCKHSRUN_CORE_CLOCK; - /* Set SCG CLKOUT selection. */ - CLOCK_CONFIG_SetScgOutSel(SCG_CLKOUTCNFG_SIRC); -} - -/******************************************************************************* - ********************* Configuration BOARD_BootClockVLPR *********************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockVLPR -outputs: -- {id: Core_clock.outFreq, value: 8 MHz, locked: true, accuracy: '0.001'} -- {id: LPO_clock.outFreq, value: 1 kHz} -- {id: SIRC_CLK.outFreq, value: 8 MHz} -- {id: Slow_clock.outFreq, value: 1 MHz, locked: true, accuracy: '0.001'} -- {id: System_clock.outFreq, value: 8 MHz} -settings: -- {id: SCGMode, value: SIRC} -- {id: powerMode, value: VLPR} -- {id: SCG.DIVSLOW.scale, value: '8'} -- {id: SCG.SCSSEL.sel, value: SCG.SIRC} -- {id: SCG_FIRCCSR_FIRCLPEN_CFG, value: Enabled} -sources: -- {id: SCG.SOSC.outFreq, value: 32.768 kHz, enabled: true} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockVLPR configuration - ******************************************************************************/ -const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockVLPR = - { - .divSlow = kSCG_SysClkDivBy8, /* Slow Clock Divider: divided by 8 */ -#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1) - .reserved1 = 0, - .reserved2 = 0, - .reserved3 = 0, -#endif - .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */ -#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1) - .reserved4 = 0, -#endif - .src = kSCG_SysClkSrcSirc, /* Slow IRC is selected as System Clock Source */ -#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1) - .reserved5 = 0, -#endif - }; -const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockVLPR = - { - .freq = 0U, /* System Oscillator frequency: 0Hz */ - .enableMode = SCG_SOSC_DISABLE, /* System OSC disabled */ - .monitorMode = kSCG_SysOscMonitorDisable, /* Monitor disabled */ - .div1 = kSCG_AsyncClkDisable, /* System OSC Clock Divider 1: Clock output is disabled */ - .div3 = kSCG_AsyncClkDisable, /* System OSC Clock Divider 3: Clock output is disabled */ - .capLoad = SCG_SYS_OSC_CAP_0P, /* Oscillator capacity load: 0pF */ - .workMode = kSCG_SysOscModeExt, /* Use external clock */ - }; -const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockVLPR = - { - .enableMode = kSCG_SircEnable | kSCG_SircEnableInLowPower,/* Enable SIRC clock, Enable SIRC in low power mode */ - .div1 = kSCG_AsyncClkDisable, /* Slow IRC Clock Divider 1: Clock output is disabled */ - .div3 = kSCG_AsyncClkDisable, /* Slow IRC Clock Divider 3: Clock output is disabled */ - .range = kSCG_SircRangeHigh, /* Slow IRC high range clock (8 MHz) */ - }; -const scg_firc_config_t g_scgFircConfig_BOARD_BootClockVLPR = - { - .enableMode = kSCG_FircEnable | kSCG_FircEnableInLowPower,/* Enable FIRC clock, Enable FIRC in low power mode */ - .div1 = kSCG_AsyncClkDisable, /* Fast IRC Clock Divider 1: Clock output is disabled */ - .div3 = kSCG_AsyncClkDisable, /* Fast IRC Clock Divider 3: Clock output is disabled */ - .range = kSCG_FircRange48M, /* Fast IRC is trimmed to 48MHz */ - .trimConfig = NULL, /* Fast IRC Trim disabled */ - }; -const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockVLPR = - { - .enableMode = SCG_SPLL_DISABLE, /* System PLL disabled */ - .monitorMode = kSCG_SysPllMonitorDisable, /* Monitor disabled */ - .div1 = kSCG_AsyncClkDisable, /* System PLL Clock Divider 1: Clock output is disabled */ - .div3 = kSCG_AsyncClkDisable, /* System PLL Clock Divider 3: Clock output is disabled */ - .src = kSCG_SysPllSrcSysOsc, /* System PLL clock source is System OSC */ - .prediv = 0, /* Divided by 1 */ - .mult = 0, /* Multiply Factor is 16 */ - }; -/******************************************************************************* - * Code for BOARD_BootClockVLPR configuration - ******************************************************************************/ -void BOARD_BootClockVLPR(void) -{ - /* Init FIRC. */ - CLOCK_CONFIG_FircSafeConfig(&g_scgFircConfig_BOARD_BootClockVLPR); - /* Init SIRC. */ - CLOCK_InitSirc(&g_scgSircConfig_BOARD_BootClockVLPR); - /* Allow SMC all power modes. */ - SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll); - /* Set VLPR power mode. */ - SMC_SetPowerModeVlpr(SMC); - while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr) - { - } - /* Set SystemCoreClock variable. */ - SystemCoreClock = BOARD_BOOTCLOCKVLPR_CORE_CLOCK; -} diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.h b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.h deleted file mode 100644 index c01d5e03c..000000000 --- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.h +++ /dev/null @@ -1,164 +0,0 @@ -/* - * Copyright 2019 ,2021 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -#ifndef _CLOCK_CONFIG_H_ -#define _CLOCK_CONFIG_H_ - -#include "fsl_common.h" - -/******************************************************************************* - * Definitions - ******************************************************************************/ -#define BOARD_XTAL0_CLK_HZ 32768U /*!< Board xtal0 frequency in Hz */ - -/******************************************************************************* - ************************ BOARD_InitBootClocks function ************************ - ******************************************************************************/ - -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes default configuration of clocks. - * - */ -void BOARD_InitBootClocks(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ********************** Configuration BOARD_BootClockRUN *********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockRUN configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ - -/*! @brief SCG set for BOARD_BootClockRUN configuration. - */ -extern const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockRUN; -/*! @brief System OSC set for BOARD_BootClockRUN configuration. - */ -extern const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockRUN; -/*! @brief SIRC set for BOARD_BootClockRUN configuration. - */ -extern const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockRUN; -/*! @brief FIRC set for BOARD_BootClockRUN configuration. - */ -extern const scg_firc_config_t g_scgFircConfigBOARD_BootClockRUN; -extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockRUN; -/*! @brief Low Power FLL set for BOARD_BootClockRUN configuration. - */ - -/******************************************************************************* - * API for BOARD_BootClockRUN configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockRUN(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ********************* Configuration BOARD_BootClockHSRUN ********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockHSRUN configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKHSRUN_CORE_CLOCK 96000000U /*!< Core clock frequency: 96000000Hz */ - -/*! @brief SCG set for BOARD_BootClockHSRUN configuration. - */ -extern const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockHSRUN; -/*! @brief System OSC set for BOARD_BootClockHSRUN configuration. - */ -extern const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockHSRUN; -/*! @brief SIRC set for BOARD_BootClockHSRUN configuration. - */ -extern const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockHSRUN; -/*! @brief FIRC set for BOARD_BootClockHSRUN configuration. - */ -extern const scg_firc_config_t g_scgFircConfigBOARD_BootClockHSRUN; -extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockHSRUN; -/*! @brief Low Power FLL set for BOARD_BootClockHSRUN configuration. - */ - -/******************************************************************************* - * API for BOARD_BootClockHSRUN configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockHSRUN(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ********************* Configuration BOARD_BootClockVLPR *********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockVLPR configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKVLPR_CORE_CLOCK 8000000U /*!< Core clock frequency: 8000000Hz */ - -/*! @brief SCG set for BOARD_BootClockVLPR configuration. - */ -extern const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockVLPR; -/*! @brief System OSC set for BOARD_BootClockVLPR configuration. - */ -extern const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockVLPR; -/*! @brief SIRC set for BOARD_BootClockVLPR configuration. - */ -extern const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockVLPR; -/*! @brief FIRC set for BOARD_BootClockVLPR configuration. - */ -extern const scg_firc_config_t g_scgFircConfigBOARD_BootClockVLPR; -extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockVLPR; -/*! @brief Low Power FLL set for BOARD_BootClockVLPR configuration. - */ - -/******************************************************************************* - * API for BOARD_BootClockVLPR configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockVLPR(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -#endif /* _CLOCK_CONFIG_H_ */ diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk index 9cf36c500..82456b721 100644 --- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk +++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk @@ -8,6 +8,9 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls # All source paths should be relative to the top level. LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld +SRC_C += \ + $(MCU_DIR)/project_template/clock_config.c \ + # For flash-jlink target JLINK_DEVICE = K32L2B31xxxxA diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.c b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.c deleted file mode 100644 index e74000827..000000000 --- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.c +++ /dev/null @@ -1,220 +0,0 @@ -/* - * Copyright 2019 ,2021 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ -/* - * How to setup clock using clock driver functions: - * - * 1. CLOCK_SetSimSafeDivs, to make sure core clock, bus clock, flexbus clock - * and flash clock are in allowed range during clock mode switch. - * - * 2. Call CLOCK_Osc0Init to setup OSC clock, if it is used in target mode. - * - * 3. Call CLOCK_SetMcgliteConfig to set MCG_Lite configuration. - * - * 4. Call CLOCK_SetSimConfig to set the clock configuration in SIM. - */ - -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!GlobalInfo -product: Clocks v7.0 -processor: K32L2B31xxxxA -package_id: K32L2B31VLH0A -mcu_data: ksdk2_0 -processor_version: 9.0.0 -board: FRDM-K32L2B - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -#include "fsl_smc.h" -#include "clock_config.h" - -/******************************************************************************* - * Definitions - ******************************************************************************/ -#define OSC_CAP0P 0U /*!< Oscillator 0pF capacitor load */ -#define OSC_ER_CLK_DISABLE 0U /*!< Disable external reference clock */ -#define SIM_OSC32KSEL_OSC32KCLK_CLK 0U /*!< OSC32KSEL select: OSC32KCLK clock */ - -/******************************************************************************* - * Variables - ******************************************************************************/ -/* System clock frequency. */ -extern uint32_t SystemCoreClock; - -/******************************************************************************* - ************************ BOARD_InitBootClocks function ************************ - ******************************************************************************/ -void BOARD_InitBootClocks(void) -{ - BOARD_BootClockRUN(); -} - -/******************************************************************************* - ********************** Configuration BOARD_BootClockRUN *********************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockRUN -called_from_default_init: true -outputs: -- {id: Bus_clock.outFreq, value: 24 MHz} -- {id: Core_clock.outFreq, value: 48 MHz} -- {id: Flash_clock.outFreq, value: 24 MHz} -- {id: LPO_clock.outFreq, value: 1 kHz} -- {id: MCGIRCLK.outFreq, value: 8 MHz} -- {id: MCGPCLK.outFreq, value: 48 MHz} -- {id: System_clock.outFreq, value: 48 MHz} -settings: -- {id: MCGMode, value: HIRC} -- {id: MCG.CLKS.sel, value: MCG.HIRC} -- {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower} -- {id: MCG_C2_RANGE0_CFG, value: Very_high} -- {id: MCG_MC_HIRCEN_CFG, value: Enabled} -- {id: OSC0_CR_ERCLKEN_CFG, value: Enabled} -- {id: OSC_CR_ERCLKEN_CFG, value: Enabled} -- {id: SIM.CLKOUTSEL.sel, value: MCG.MCGPCLK} -- {id: SIM.COPCLKSEL.sel, value: OSC.OSCERCLK} -- {id: SIM.FLEXIOSRCSEL.sel, value: MCG.MCGPCLK} -- {id: SIM.LPUART0SRCSEL.sel, value: MCG.MCGPCLK} -- {id: SIM.LPUART1SRCSEL.sel, value: MCG.MCGPCLK} -- {id: SIM.RTCCLKOUTSEL.sel, value: OSC.OSCERCLK} -- {id: SIM.TPMSRCSEL.sel, value: MCG.MCGPCLK} -- {id: SIM.USBSRCSEL.sel, value: MCG.MCGPCLK} -sources: -- {id: MCG.HIRC.outFreq, value: 48 MHz} -- {id: OSC.OSC.outFreq, value: 32 MHz} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockRUN configuration - ******************************************************************************/ -const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN = - { - .outSrc = kMCGLITE_ClkSrcHirc, /* MCGOUTCLK source is HIRC */ - .irclkEnableMode = kMCGLITE_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */ - .ircs = kMCGLITE_Lirc8M, /* Slow internal reference (LIRC) 8 MHz clock selected */ - .fcrdiv = kMCGLITE_LircDivBy1, /* Low-frequency Internal Reference Clock Divider: divided by 1 */ - .lircDiv2 = kMCGLITE_LircDivBy1, /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */ - .hircEnableInNotHircMode = true, /* HIRC source is enabled */ - }; -const sim_clock_config_t simConfig_BOARD_BootClockRUN = - { - .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK, /* OSC32KSEL select: OSC32KCLK clock */ - .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */ - }; -const osc_config_t oscConfig_BOARD_BootClockRUN = - { - .freq = 0U, /* Oscillator frequency: 0Hz */ - .capLoad = (OSC_CAP0P), /* Oscillator capacity load: 0pF */ - .workMode = kOSC_ModeOscLowPower, /* Oscillator low power */ - .oscerConfig = - { - .enableMode = kOSC_ErClkEnable, /* Enable external reference clock, disable external reference clock in STOP mode */ - } - }; - -/******************************************************************************* - * Code for BOARD_BootClockRUN configuration - ******************************************************************************/ -void BOARD_BootClockRUN(void) -{ - /* Set the system clock dividers in SIM to safe value. */ - CLOCK_SetSimSafeDivs(); - /* Set MCG to HIRC mode. */ - CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockRUN); - /* Set the clock configuration in SIM module. */ - CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN); - /* Set SystemCoreClock variable. */ - SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; -} - -/******************************************************************************* - ********************* Configuration BOARD_BootClockVLPR *********************** - ******************************************************************************/ -/* clang-format off */ -/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* -!!Configuration -name: BOARD_BootClockVLPR -outputs: -- {id: Bus_clock.outFreq, value: 1 MHz} -- {id: Core_clock.outFreq, value: 2 MHz} -- {id: Flash_clock.outFreq, value: 1 MHz} -- {id: LPO_clock.outFreq, value: 1 kHz} -- {id: MCGIRCLK.outFreq, value: 2 MHz} -- {id: System_clock.outFreq, value: 2 MHz} -settings: -- {id: MCGMode, value: LIRC2M} -- {id: powerMode, value: VLPR} -- {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower} -- {id: RTCCLKOUTConfig, value: 'yes'} -- {id: SIM.OUTDIV4.scale, value: '2', locked: true} -- {id: SIM.RTCCLKOUTSEL.sel, value: OSC.OSCERCLK} -sources: -- {id: MCG.LIRC.outFreq, value: 2 MHz} -- {id: OSC.OSC.outFreq, value: 32.768 kHz} - * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ -/* clang-format on */ - -/******************************************************************************* - * Variables for BOARD_BootClockVLPR configuration - ******************************************************************************/ -const mcglite_config_t mcgliteConfig_BOARD_BootClockVLPR = - { - .outSrc = kMCGLITE_ClkSrcLirc, /* MCGOUTCLK source is LIRC */ - .irclkEnableMode = kMCGLITE_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */ - .ircs = kMCGLITE_Lirc2M, /* Slow internal reference (LIRC) 2 MHz clock selected */ - .fcrdiv = kMCGLITE_LircDivBy1, /* Low-frequency Internal Reference Clock Divider: divided by 1 */ - .lircDiv2 = kMCGLITE_LircDivBy1, /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */ - .hircEnableInNotHircMode = false, /* HIRC source is not enabled */ - }; -const sim_clock_config_t simConfig_BOARD_BootClockVLPR = - { - .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK, /* OSC32KSEL select: OSC32KCLK clock */ - .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */ - }; -const osc_config_t oscConfig_BOARD_BootClockVLPR = - { - .freq = 0U, /* Oscillator frequency: 0Hz */ - .capLoad = (OSC_CAP0P), /* Oscillator capacity load: 0pF */ - .workMode = kOSC_ModeOscLowPower, /* Oscillator low power */ - .oscerConfig = - { - .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */ - } - }; - -/******************************************************************************* - * Code for BOARD_BootClockVLPR configuration - ******************************************************************************/ -void BOARD_BootClockVLPR(void) -{ - /* Set the system clock dividers in SIM to safe value. */ - CLOCK_SetSimSafeDivs(); - /* Set MCG to LIRC2M mode. */ - CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockVLPR); - /* Set the clock configuration in SIM module. */ - CLOCK_SetSimConfig(&simConfig_BOARD_BootClockVLPR); - /* Set VLPR power mode. */ - SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll); -#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) - SMC_SetPowerModeVlpr(SMC, false); -#else - SMC_SetPowerModeVlpr(SMC); -#endif - while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr) - { - } - /* Set SystemCoreClock variable. */ - SystemCoreClock = BOARD_BOOTCLOCKVLPR_CORE_CLOCK; -} diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.h b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.h deleted file mode 100644 index 37328e7d8..000000000 --- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.h +++ /dev/null @@ -1,110 +0,0 @@ -/* - * Copyright 2019 ,2021 NXP - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/*********************************************************************************************************************** - * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file - * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. - **********************************************************************************************************************/ - -#ifndef _CLOCK_CONFIG_H_ -#define _CLOCK_CONFIG_H_ - -#include "fsl_common.h" - -/******************************************************************************* - * Definitions - ******************************************************************************/ - -/******************************************************************************* - ************************ BOARD_InitBootClocks function ************************ - ******************************************************************************/ - -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes default configuration of clocks. - * - */ -void BOARD_InitBootClocks(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ********************** Configuration BOARD_BootClockRUN *********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockRUN configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ - -/*! @brief MCG lite set for BOARD_BootClockRUN configuration. - */ -extern const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN; -/*! @brief SIM module set for BOARD_BootClockRUN configuration. - */ -extern const sim_clock_config_t simConfig_BOARD_BootClockRUN; -/*! @brief OSC set for BOARD_BootClockRUN configuration. - */ -extern const osc_config_t oscConfig_BOARD_BootClockRUN; - -/******************************************************************************* - * API for BOARD_BootClockRUN configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockRUN(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -/******************************************************************************* - ********************* Configuration BOARD_BootClockVLPR *********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockVLPR configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKVLPR_CORE_CLOCK 2000000U /*!< Core clock frequency: 2000000Hz */ - -/*! @brief MCG lite set for BOARD_BootClockVLPR configuration. - */ -extern const mcglite_config_t mcgliteConfig_BOARD_BootClockVLPR; -/*! @brief SIM module set for BOARD_BootClockVLPR configuration. - */ -extern const sim_clock_config_t simConfig_BOARD_BootClockVLPR; -/*! @brief OSC set for BOARD_BootClockVLPR configuration. - */ -extern const osc_config_t oscConfig_BOARD_BootClockVLPR; - -/******************************************************************************* - * API for BOARD_BootClockVLPR configuration - ******************************************************************************/ -#if defined(__cplusplus) -extern "C" { -#endif /* __cplusplus*/ - -/*! - * @brief This function executes configuration of clocks. - * - */ -void BOARD_BootClockVLPR(void); - -#if defined(__cplusplus) -} -#endif /* __cplusplus*/ - -#endif /* _CLOCK_CONFIG_H_ */ diff --git a/hw/bsp/nrf/boards/pca10095/board.cmake b/hw/bsp/nrf/boards/pca10095/board.cmake index 0fbc1d31f..ca5399a3a 100644 --- a/hw/bsp/nrf/boards/pca10095/board.cmake +++ b/hw/bsp/nrf/boards/pca10095/board.cmake @@ -1,9 +1,6 @@ set(MCU_VARIANT nrf5340_application) set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf5340_xxaa_application.ld) -# enable max3421 host driver for this board -set(MAX3421_HOST 1) - function(update_board TARGET) target_sources(${TARGET} PRIVATE ${NRFX_DIR}/drivers/src/nrfx_usbreg.c diff --git a/hw/bsp/nrf/boards/pca10095/board.h b/hw/bsp/nrf/boards/pca10095/board.h index 7437dad48..ad3379bf6 100644 --- a/hw/bsp/nrf/boards/pca10095/board.h +++ b/hw/bsp/nrf/boards/pca10095/board.h @@ -42,8 +42,8 @@ #define BUTTON_STATE_ACTIVE 0 // UART -#define UART_RX_PIN 22 -#define UART_TX_PIN 20 +#define UART_RX_PIN 32 +#define UART_TX_PIN 33 // SPI for USB host shield #define MAX3421_SCK_PIN _PINNUM(1, 15) diff --git a/hw/bsp/nrf/boards/pca10095/board.mk b/hw/bsp/nrf/boards/pca10095/board.mk index 20580d619..9c4edbafc 100644 --- a/hw/bsp/nrf/boards/pca10095/board.mk +++ b/hw/bsp/nrf/boards/pca10095/board.mk @@ -2,9 +2,6 @@ CPU_CORE = cortex-m33 MCU_VARIANT = nrf5340_application CFLAGS += -DNRF5340_XXAA -DNRF5340_XXAA_APPLICATION -# enable max3421 host driver for this board -MAX3421_HOST = 1 - LD_FILE = hw/mcu/nordic/nrfx/mdk/nrf5340_xxaa_application.ld SRC_C += hw/mcu/nordic/nrfx/drivers/src/nrfx_usbreg.c diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c index 55119ef02..7a970f52e 100644 --- a/hw/bsp/nrf/family.c +++ b/hw/bsp/nrf/family.c @@ -76,7 +76,6 @@ enum { #define LFCLK_SRC_RC CLOCK_LFCLKSRC_SRC_LFRC #define VBUSDETECT_Msk USBREG_USBREGSTATUS_VBUSDETECT_Msk #define OUTPUTRDY_Msk USBREG_USBREGSTATUS_OUTPUTRDY_Msk - #define GPIOTE_IRQn GPIOTE1_IRQn #else #define LFCLK_SRC_RC CLOCK_LFCLKSRC_SRC_RC #define VBUSDETECT_Msk POWER_USBREGSTATUS_VBUSDETECT_Msk diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index c145d86a6..2589dcd2c 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -203,7 +203,7 @@ uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw) //--------------------------------------------------------------------+ // Debug //--------------------------------------------------------------------+ -#if CFG_TUSB_DEBUG >= CFG_TUD_MSC_LOG_LEVEL +#if CFG_TUSB_DEBUG >= 2 TU_ATTR_UNUSED tu_static tu_lookup_entry_t const _msc_scsi_cmd_lookup[] = { diff --git a/src/class/video/video.h b/src/class/video/video.h index abf1e34b9..6319c6536 100644 --- a/src/class/video/video.h +++ b/src/class/video/video.h @@ -368,8 +368,6 @@ typedef struct TU_ATTR_PACKED { uint8_t bCopyProtect; } tusb_desc_video_format_uncompressed_t; -TU_VERIFY_STATIC(sizeof(tusb_desc_video_format_uncompressed_t) == 27, "size is not correct"); - // Uncompressed payload specs: 3.1.2 frame descriptor #define tusb_desc_video_frame_uncompressed_nint_t(_nint) \ struct TU_ATTR_PACKED { \ @@ -383,7 +381,7 @@ TU_VERIFY_STATIC(sizeof(tusb_desc_video_format_uncompressed_t) == 27, "size is n uint32_t dwMinBitRate; \ uint32_t dwMaxBitRate; \ uint32_t dwMaxVideoFrameBufferSize; /* deprecated in 1.5 */ \ - uint32_t dwDefaultFrameInterval; /* 100ns unit */\ + uint32_t dwDefaultFrameInterval; \ uint8_t bFrameIntervalType; \ uint32_t dwFrameInterval[_nint]; \ } @@ -415,8 +413,6 @@ typedef struct TU_ATTR_PACKED { uint8_t bCopyProtect; } tusb_desc_video_format_mjpeg_t; -TU_VERIFY_STATIC(sizeof(tusb_desc_video_format_mjpeg_t) == 11, "size is not correct"); - // MJPEG payload specs: 3.1.2 frame descriptor (same as uncompressed) typedef tusb_desc_video_frame_uncompressed_t tusb_desc_video_frame_mjpeg_t; typedef tusb_desc_video_frame_uncompressed_1int_t tusb_desc_video_frame_mjpeg_1int_t; diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index c33dfa0b0..1affd615e 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -559,7 +559,6 @@ static bool _negotiate_streaming_parameters(videod_streaming_interface_t const * uint_fast8_t num_intervals = frm->uncompressed.bFrameIntervalType; if (num_intervals) { interval = 0; - interval_ms = 0; } else { interval = frm->uncompressed.dwFrameInterval[2]; interval_ms = interval / 10000; diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index 2e9f1d9cd..0f4dc93f3 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -60,7 +60,6 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent); static inline void tu_print_buf(uint8_t const* buf, uint32_t bufsize) { for(uint32_t i=0; i= 2 diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 76696396b..d6c3db4ce 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -224,7 +224,6 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t if (wrap_bytes > 0) _ff_push_const_addr(ff_buf, app_buf, wrap_bytes); } break; - default: break; } } diff --git a/src/device/usbd.c b/src/device/usbd.c index be85d7769..5c94ebcc5 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -500,6 +500,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) case DCD_EVENT_SETUP_RECEIVED: TU_LOG_BUF(CFG_TUD_LOG_LEVEL, &event.setup_received, 8); + TU_LOG_USBD("\r\n"); // Mark as connected after receiving 1st setup packet. // But it is easier to set it every time instead of wasting time to check then set diff --git a/src/host/usbh.c b/src/host/usbh.c index f56290a0c..dfe6ddb42 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -343,12 +343,12 @@ bool tuh_init(uint8_t controller_id) { if ( tuh_inited() ) return true; TU_LOG_USBH("USBH init on controller %u\r\n", controller_id); - TU_LOG_INT_USBH(sizeof(usbh_device_t)); - TU_LOG_INT_USBH(sizeof(hcd_event_t)); - TU_LOG_INT_USBH(sizeof(_ctrl_xfer)); - TU_LOG_INT_USBH(sizeof(tuh_xfer_t)); - TU_LOG_INT_USBH(sizeof(tu_fifo_t)); - TU_LOG_INT_USBH(sizeof(tu_edpt_stream_t)); + TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(usbh_device_t)); + TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(hcd_event_t)); + TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(_ctrl_xfer)); + TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(tuh_xfer_t)); + TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(tu_fifo_t)); + TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(tu_edpt_stream_t)); // Event queue _usbh_q = osal_queue_create( &_usbh_qdef ); @@ -588,7 +588,8 @@ bool tuh_control_xfer (tuh_xfer_t* xfer) { TU_LOG_USBH("[%u:%u] %s: ", rhport, daddr, (xfer->setup->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD && xfer->setup->bRequest <= TUSB_REQ_SYNCH_FRAME) ? tu_str_std_request[xfer->setup->bRequest] : "Class Request"); - TU_LOG_BUF_USBH(xfer->setup, 8); + TU_LOG_BUF(CFG_TUH_LOG_LEVEL, xfer->setup, 8); + TU_LOG_USBH("\r\n"); if (xfer->complete_cb) { TU_ASSERT( hcd_setup_send(rhport, daddr, (uint8_t const*) &_ctrl_xfer.request) ); @@ -659,8 +660,9 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result tusb_control_request_t const * request = &_ctrl_xfer.request; if (XFER_RESULT_SUCCESS != result) { - TU_LOG_USBH("[%u:%u] Control %s, xferred_bytes = %lu\r\n", rhport, dev_addr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED", xferred_bytes); - TU_LOG_BUF_USBH(request, 8); + TU_LOG1("[%u:%u] Control %s, xferred_bytes = %lu\r\n", rhport, dev_addr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED", xferred_bytes); + TU_LOG1_BUF(request, 8); + TU_LOG1("\r\n"); // terminate transfer if any stage failed _xfer_complete(dev_addr, result); @@ -678,7 +680,7 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result case CONTROL_STAGE_DATA: if (request->wLength) { TU_LOG_USBH("[%u:%u] Control data:\r\n", rhport, dev_addr); - TU_LOG_MEM_USBH(_ctrl_xfer.buffer, xferred_bytes, 2); + TU_LOG_MEM(CFG_TUH_LOG_LEVEL, _ctrl_xfer.buffer, xferred_bytes, 2); } _ctrl_xfer.actual_len = (uint16_t) xferred_bytes; diff --git a/src/host/usbh_pvt.h b/src/host/usbh_pvt.h index 4ed2a72b5..4a97a1c18 100644 --- a/src/host/usbh_pvt.h +++ b/src/host/usbh_pvt.h @@ -35,11 +35,7 @@ extern "C" { #endif -#define TU_LOG_USBH(...) TU_LOG(CFG_TUH_LOG_LEVEL, __VA_ARGS__) -#define TU_LOG_MEM_USBH(...) TU_LOG_MEM(CFG_TUH_LOG_LEVEL, __VA_ARGS__) -#define TU_LOG_BUF_USBH(...) TU_LOG_BUF(CFG_TUH_LOG_LEVEL, __VA_ARGS__) -#define TU_LOG_INT_USBH(...) TU_LOG_INT(CFG_TUH_LOG_LEVEL, __VA_ARGS__) -#define TU_LOG_HEX_USBH(...) TU_LOG_HEX(CFG_TUH_LOG_LEVEL, __VA_ARGS__) +#define TU_LOG_USBH(...) TU_LOG(CFG_TUH_LOG_LEVEL, __VA_ARGS__) enum { USBH_EPSIZE_BULK_MAX = (TUH_OPT_HIGH_SPEED ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS) diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index 841cda752..4e702aed4 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -653,11 +653,7 @@ void dcd_int_handler(uint8_t rhport) if (NRF_USBD->EPOUTEN & USBD_EPOUTEN_ISOOUT_Msk) { iso_enabled = true; - // Transfer from endpoint to RAM only if data is not corrupted - if ((int_status & USBD_INTEN_USBEVENT_Msk) == 0 || - (NRF_USBD->EVENTCAUSE & USBD_EVENTCAUSE_ISOOUTCRC_Msk) == 0) { - xact_out_dma(EP_ISO_NUM); - } + xact_out_dma(EP_ISO_NUM); } // ISOIN: Notify client that data was transferred @@ -687,7 +683,7 @@ void dcd_int_handler(uint8_t rhport) { TU_LOG(2, "EVENTCAUSE = 0x%04lX\r\n", NRF_USBD->EVENTCAUSE); - enum { EVT_CAUSE_MASK = USBD_EVENTCAUSE_SUSPEND_Msk | USBD_EVENTCAUSE_RESUME_Msk | USBD_EVENTCAUSE_USBWUALLOWED_Msk | USBD_EVENTCAUSE_ISOOUTCRC_Msk }; + enum { EVT_CAUSE_MASK = USBD_EVENTCAUSE_SUSPEND_Msk | USBD_EVENTCAUSE_RESUME_Msk | USBD_EVENTCAUSE_USBWUALLOWED_Msk }; uint32_t const evt_cause = NRF_USBD->EVENTCAUSE & EVT_CAUSE_MASK; NRF_USBD->EVENTCAUSE = evt_cause; // clear interrupt diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h index 94bad5df7..4feefd771 100644 --- a/src/portable/ohci/ohci.h +++ b/src/portable/ohci/ohci.h @@ -83,7 +83,7 @@ typedef struct TU_ATTR_ALIGNED(16) volatile uint32_t condition_code : 4; // Word 1 - uint8_t* volatile current_buffer_pointer; + volatile uint8_t* current_buffer_pointer; // Word 2 : next TD volatile uint32_t next; -- cgit v1.3.1 From 2cf171095e02d8562ff138520cbe686e013f4522 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 22 Mar 2024 12:30:14 +0700 Subject: code format --- src/common/tusb_fifo.h | 31 ++---- src/tusb.c | 277 ++++++++++++++++++------------------------------- 2 files changed, 113 insertions(+), 195 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h index 2f60ec2f4..2d9f5e667 100644 --- a/src/common/tusb_fifo.h +++ b/src/common/tusb_fifo.h @@ -102,10 +102,8 @@ extern "C" { * | * ------------------------- * | R | 1 | 2 | W | 4 | 5 | - */ -typedef struct -{ +typedef struct { uint8_t* buffer ; // buffer pointer uint16_t depth ; // max items @@ -124,16 +122,14 @@ typedef struct } tu_fifo_t; -typedef struct -{ +typedef struct { uint16_t len_lin ; ///< linear length in item size uint16_t len_wrap ; ///< wrapped length in item size void * ptr_lin ; ///< linear part start pointer void * ptr_wrap ; ///< wrapped part start pointer } tu_fifo_buffer_info_t; -#define TU_FIFO_INIT(_buffer, _depth, _type, _overwritable) \ -{ \ +#define TU_FIFO_INIT(_buffer, _depth, _type, _overwritable){\ .buffer = _buffer, \ .depth = _depth, \ .item_size = sizeof(_type), \ @@ -144,23 +140,18 @@ typedef struct uint8_t _name##_buf[_depth*sizeof(_type)]; \ tu_fifo_t _name = TU_FIFO_INIT(_name##_buf, _depth, _type, _overwritable) - bool tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable); bool tu_fifo_clear(tu_fifo_t *f); bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_size, bool overwritable); #if OSAL_MUTEX_REQUIRED -TU_ATTR_ALWAYS_INLINE static inline -void tu_fifo_config_mutex(tu_fifo_t *f, osal_mutex_t wr_mutex, osal_mutex_t rd_mutex) -{ - f->mutex_wr = wr_mutex; - f->mutex_rd = rd_mutex; -} - + TU_ATTR_ALWAYS_INLINE static inline + void tu_fifo_config_mutex(tu_fifo_t *f, osal_mutex_t wr_mutex, osal_mutex_t rd_mutex) { + f->mutex_wr = wr_mutex; + f->mutex_rd = rd_mutex; + } #else - -#define tu_fifo_config_mutex(_f, _wr_mutex, _rd_mutex) - + #define tu_fifo_config_mutex(_f, _wr_mutex, _rd_mutex) #endif bool tu_fifo_write (tu_fifo_t* f, void const * p_data); @@ -182,8 +173,7 @@ bool tu_fifo_overflowed (tu_fifo_t* f); void tu_fifo_correct_read_pointer (tu_fifo_t* f); TU_ATTR_ALWAYS_INLINE static inline -uint16_t tu_fifo_depth(tu_fifo_t* f) -{ +uint16_t tu_fifo_depth(tu_fifo_t* f) { return f->depth; } @@ -198,7 +188,6 @@ void tu_fifo_advance_read_pointer (tu_fifo_t *f, uint16_t n); void tu_fifo_get_read_info (tu_fifo_t *f, tu_fifo_buffer_info_t *info); void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info); - #ifdef __cplusplus } #endif diff --git a/src/tusb.c b/src/tusb.c index 7c86f1ca5..2256dc3b9 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -43,32 +43,30 @@ // Public API //--------------------------------------------------------------------+ -bool tusb_init(void) -{ -#if CFG_TUD_ENABLED && defined(TUD_OPT_RHPORT) +bool tusb_init(void) { + #if CFG_TUD_ENABLED && defined(TUD_OPT_RHPORT) // init device stack CFG_TUSB_RHPORTx_MODE must be defined TU_ASSERT ( tud_init(TUD_OPT_RHPORT) ); -#endif + #endif -#if CFG_TUH_ENABLED && defined(TUH_OPT_RHPORT) + #if CFG_TUH_ENABLED && defined(TUH_OPT_RHPORT) // init host stack CFG_TUSB_RHPORTx_MODE must be defined TU_ASSERT( tuh_init(TUH_OPT_RHPORT) ); -#endif + #endif return true; } -bool tusb_inited(void) -{ +bool tusb_inited(void) { bool ret = false; -#if CFG_TUD_ENABLED + #if CFG_TUD_ENABLED ret = ret || tud_inited(); -#endif + #endif -#if CFG_TUH_ENABLED + #if CFG_TUH_ENABLED ret = ret || tuh_inited(); -#endif + #endif return ret; } @@ -77,30 +75,24 @@ bool tusb_inited(void) // Descriptor helper //--------------------------------------------------------------------+ -uint8_t const * tu_desc_find(uint8_t const* desc, uint8_t const* end, uint8_t byte1) -{ - while(desc+1 < end) - { - if ( desc[1] == byte1 ) return desc; +uint8_t const* tu_desc_find(uint8_t const* desc, uint8_t const* end, uint8_t byte1) { + while (desc + 1 < end) { + if (desc[1] == byte1) return desc; desc += desc[DESC_OFFSET_LEN]; } return NULL; } -uint8_t const * tu_desc_find2(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2) -{ - while(desc+2 < end) - { - if ( desc[1] == byte1 && desc[2] == byte2) return desc; +uint8_t const* tu_desc_find2(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2) { + while (desc + 2 < end) { + if (desc[1] == byte1 && desc[2] == byte2) return desc; desc += desc[DESC_OFFSET_LEN]; } return NULL; } -uint8_t const * tu_desc_find3(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2, uint8_t byte3) -{ - while(desc+3 < end) - { +uint8_t const* tu_desc_find3(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2, uint8_t byte3) { + while (desc + 3 < end) { if (desc[1] == byte1 && desc[2] == byte2 && desc[3] == byte3) return desc; desc += desc[DESC_OFFSET_LEN]; } @@ -146,83 +138,71 @@ bool tu_edpt_release(tu_edpt_state_t* ep_state, osal_mutex_t mutex) { return ret; } -bool tu_edpt_validate(tusb_desc_endpoint_t const * desc_ep, tusb_speed_t speed) -{ +bool tu_edpt_validate(tusb_desc_endpoint_t const* desc_ep, tusb_speed_t speed) { uint16_t const max_packet_size = tu_edpt_packet_size(desc_ep); TU_LOG2(" Open EP %02X with Size = %u\r\n", desc_ep->bEndpointAddress, max_packet_size); - switch (desc_ep->bmAttributes.xfer) - { - case TUSB_XFER_ISOCHRONOUS: - { + switch (desc_ep->bmAttributes.xfer) { + case TUSB_XFER_ISOCHRONOUS: { uint16_t const spec_size = (speed == TUSB_SPEED_HIGH ? 1024 : 1023); TU_ASSERT(max_packet_size <= spec_size); + break; } - break; case TUSB_XFER_BULK: - if (speed == TUSB_SPEED_HIGH) - { + if (speed == TUSB_SPEED_HIGH) { // Bulk highspeed must be EXACTLY 512 TU_ASSERT(max_packet_size == 512); - }else - { + } else { // TODO Bulk fullspeed can only be 8, 16, 32, 64 TU_ASSERT(max_packet_size <= 64); } - break; + break; - case TUSB_XFER_INTERRUPT: - { + case TUSB_XFER_INTERRUPT: { uint16_t const spec_size = (speed == TUSB_SPEED_HIGH ? 1024 : 64); TU_ASSERT(max_packet_size <= spec_size); + break; } - break; - default: return false; + default: + return false; } return true; } -void tu_edpt_bind_driver(uint8_t ep2drv[][2], tusb_desc_interface_t const* desc_itf, uint16_t desc_len, uint8_t driver_id) -{ +void tu_edpt_bind_driver(uint8_t ep2drv[][2], tusb_desc_interface_t const* desc_itf, uint16_t desc_len, + uint8_t driver_id) { uint8_t const* p_desc = (uint8_t const*) desc_itf; uint8_t const* desc_end = p_desc + desc_len; - while( p_desc < desc_end ) - { - if ( TUSB_DESC_ENDPOINT == tu_desc_type(p_desc) ) - { + while (p_desc < desc_end) { + if (TUSB_DESC_ENDPOINT == tu_desc_type(p_desc)) { uint8_t const ep_addr = ((tusb_desc_endpoint_t const*) p_desc)->bEndpointAddress; - TU_LOG(2, " Bind EP %02x to driver id %u\r\n", ep_addr, driver_id); ep2drv[tu_edpt_number(ep_addr)][tu_edpt_dir(ep_addr)] = driver_id; } - p_desc = tu_desc_next(p_desc); } } -uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, uint8_t itf_count, uint16_t max_len) -{ +uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, uint8_t itf_count, uint16_t max_len) { uint8_t const* p_desc = (uint8_t const*) desc_itf; uint16_t len = 0; - while (itf_count--) - { + while (itf_count--) { // Next on interface desc len += tu_desc_len(desc_itf); p_desc = tu_desc_next(p_desc); - while (len < max_len) - { + while (len < max_len) { // return on IAD regardless of itf count - if ( tu_desc_type(p_desc) == TUSB_DESC_INTERFACE_ASSOCIATION ) return len; - - if ( (tu_desc_type(p_desc) == TUSB_DESC_INTERFACE) && - ((tusb_desc_interface_t const*) p_desc)->bAlternateSetting == 0 ) - { + if (tu_desc_type(p_desc) == TUSB_DESC_INTERFACE_ASSOCIATION) { + return len; + } + if ((tu_desc_type(p_desc) == TUSB_DESC_INTERFACE) && + ((tusb_desc_interface_t const*) p_desc)->bAlternateSetting == 0) { break; } @@ -239,8 +219,7 @@ uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, //--------------------------------------------------------------------+ bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool overwritable, - void* ff_buf, uint16_t ff_bufsize, uint8_t* ep_buf, uint16_t ep_bufsize) -{ + void* ff_buf, uint16_t ff_bufsize, uint8_t* ep_buf, uint16_t ep_bufsize) { osal_mutex_t new_mutex = osal_mutex_create(&s->ff_mutex); (void) new_mutex; (void) is_tx; @@ -256,91 +235,72 @@ bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool ove } TU_ATTR_ALWAYS_INLINE static inline -bool stream_claim(tu_edpt_stream_t* s) -{ - if (s->is_host) - { +bool stream_claim(tu_edpt_stream_t* s) { + if (s->is_host) { #if CFG_TUH_ENABLED return usbh_edpt_claim(s->daddr, s->ep_addr); #endif - }else - { + } else { #if CFG_TUD_ENABLED return usbd_edpt_claim(s->rhport, s->ep_addr); #endif } - return false; } TU_ATTR_ALWAYS_INLINE static inline -bool stream_xfer(tu_edpt_stream_t* s, uint16_t count) -{ - if (s->is_host) - { +bool stream_xfer(tu_edpt_stream_t* s, uint16_t count) { + if (s->is_host) { #if CFG_TUH_ENABLED return usbh_edpt_xfer(s->daddr, s->ep_addr, count ? s->ep_buf : NULL, count); #endif - }else - { + } else { #if CFG_TUD_ENABLED return usbd_edpt_xfer(s->rhport, s->ep_addr, count ? s->ep_buf : NULL, count); #endif } - return false; } TU_ATTR_ALWAYS_INLINE static inline -bool stream_release(tu_edpt_stream_t* s) -{ - if (s->is_host) - { +bool stream_release(tu_edpt_stream_t* s) { + if (s->is_host) { #if CFG_TUH_ENABLED return usbh_edpt_release(s->daddr, s->ep_addr); #endif - }else - { + } else { #if CFG_TUD_ENABLED return usbd_edpt_release(s->rhport, s->ep_addr); #endif } - return false; } //--------------------------------------------------------------------+ // Stream Write //--------------------------------------------------------------------+ - -bool tu_edpt_stream_write_zlp_if_needed(tu_edpt_stream_t* s, uint32_t last_xferred_bytes) -{ +bool tu_edpt_stream_write_zlp_if_needed(tu_edpt_stream_t* s, uint32_t last_xferred_bytes) { // ZLP condition: no pending data, last transferred bytes is multiple of packet size - TU_VERIFY( !tu_fifo_count(&s->ff) && last_xferred_bytes && (0 == (last_xferred_bytes & (s->ep_packetsize-1))) ); - - TU_VERIFY( stream_claim(s) ); - TU_ASSERT( stream_xfer(s, 0) ); - + TU_VERIFY(!tu_fifo_count(&s->ff) && last_xferred_bytes && (0 == (last_xferred_bytes & (s->ep_packetsize - 1)))); + TU_VERIFY(stream_claim(s)); + TU_ASSERT(stream_xfer(s, 0)); return true; } -uint32_t tu_edpt_stream_write_xfer(tu_edpt_stream_t* s) -{ +uint32_t tu_edpt_stream_write_xfer(tu_edpt_stream_t* s) { // skip if no data - TU_VERIFY( tu_fifo_count(&s->ff), 0 ); + TU_VERIFY(tu_fifo_count(&s->ff), 0); // Claim the endpoint - TU_VERIFY( stream_claim(s), 0 ); + TU_VERIFY(stream_claim(s), 0); // Pull data from FIFO -> EP buf uint16_t const count = tu_fifo_read_n(&s->ff, s->ep_buf, s->ep_bufsize); - if ( count ) - { - TU_ASSERT( stream_xfer(s, count), 0 ); + if (count) { + TU_ASSERT(stream_xfer(s, count), 0); return count; - }else - { + } else { // Release endpoint since we don't make any transfer // Note: data is dropped if terminal is not connected stream_release(s); @@ -348,16 +308,13 @@ uint32_t tu_edpt_stream_write_xfer(tu_edpt_stream_t* s) } } -uint32_t tu_edpt_stream_write(tu_edpt_stream_t* s, void const *buffer, uint32_t bufsize) -{ +uint32_t tu_edpt_stream_write(tu_edpt_stream_t* s, void const* buffer, uint32_t bufsize) { TU_VERIFY(bufsize); // TODO support ZLP - uint16_t ret = tu_fifo_write_n(&s->ff, buffer, (uint16_t) bufsize); // flush if fifo has more than packet size or // in rare case: fifo depth is configured too small (which never reach packet size) - if ( (tu_fifo_count(&s->ff) >= s->ep_packetsize) || (tu_fifo_depth(&s->ff) < s->ep_packetsize) ) - { + if ((tu_fifo_count(&s->ff) >= s->ep_packetsize) || (tu_fifo_depth(&s->ff) < s->ep_packetsize)) { tu_edpt_stream_write_xfer(s); } @@ -367,9 +324,7 @@ uint32_t tu_edpt_stream_write(tu_edpt_stream_t* s, void const *buffer, uint32_t //--------------------------------------------------------------------+ // Stream Read //--------------------------------------------------------------------+ - -uint32_t tu_edpt_stream_read_xfer(tu_edpt_stream_t* s) -{ +uint32_t tu_edpt_stream_read_xfer(tu_edpt_stream_t* s) { uint16_t available = tu_fifo_remaining(&s->ff); // Prepare for incoming data but only allow what we can store in the ring buffer. @@ -384,25 +339,21 @@ uint32_t tu_edpt_stream_read_xfer(tu_edpt_stream_t* s) // get available again since fifo can be changed before endpoint is claimed available = tu_fifo_remaining(&s->ff); - if ( available >= s->ep_packetsize ) - { + if (available >= s->ep_packetsize) { // multiple of packet size limit by ep bufsize - uint16_t count = (uint16_t) (available & ~(s->ep_packetsize -1)); + uint16_t count = (uint16_t) (available & ~(s->ep_packetsize - 1)); count = tu_min16(count, s->ep_bufsize); - TU_ASSERT( stream_xfer(s, count), 0 ); - + TU_ASSERT(stream_xfer(s, count), 0); return count; - }else - { + } else { // Release endpoint since we don't make any transfer stream_release(s); return 0; } } -uint32_t tu_edpt_stream_read(tu_edpt_stream_t* s, void* buffer, uint32_t bufsize) -{ +uint32_t tu_edpt_stream_read(tu_edpt_stream_t* s, void* buffer, uint32_t bufsize) { uint32_t num_read = tu_fifo_read_n(&s->ff, buffer, (uint16_t) bufsize); tu_edpt_stream_read_xfer(s); return num_read; @@ -416,42 +367,35 @@ uint32_t tu_edpt_stream_read(tu_edpt_stream_t* s, void* buffer, uint32_t bufsize #include #if CFG_TUSB_DEBUG >= CFG_TUH_LOG_LEVEL || CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL - -char const* const tu_str_speed[] = { "Full", "Low", "High" }; -char const* const tu_str_std_request[] = -{ - "Get Status" , - "Clear Feature" , - "Reserved" , - "Set Feature" , - "Reserved" , - "Set Address" , - "Get Descriptor" , - "Set Descriptor" , - "Get Configuration" , - "Set Configuration" , - "Get Interface" , - "Set Interface" , - "Synch Frame" +char const* const tu_str_speed[] = {"Full", "Low", "High"}; +char const* const tu_str_std_request[] = { + "Get Status", + "Clear Feature", + "Reserved", + "Set Feature", + "Reserved", + "Set Address", + "Get Descriptor", + "Set Descriptor", + "Get Configuration", + "Set Configuration", + "Get Interface", + "Set Interface", + "Synch Frame" }; char const* const tu_str_xfer_result[] = { "OK", "FAILED", "STALLED", "TIMEOUT" }; - #endif -static void dump_str_line(uint8_t const* buf, uint16_t count) -{ +static void dump_str_line(uint8_t const* buf, uint16_t count) { tu_printf(" |"); - // each line is 16 bytes - for(uint16_t i=0; i Date: Fri, 22 Mar 2024 12:53:31 +0700 Subject: add tu_edpt_stream_deinit() --- src/common/tusb_private.h | 19 +++++++++---------- src/tusb.c | 11 ++++++++++- 2 files changed, 19 insertions(+), 11 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_private.h b/src/common/tusb_private.h index db1ba974d..373a50256 100644 --- a/src/common/tusb_private.h +++ b/src/common/tusb_private.h @@ -60,7 +60,7 @@ typedef struct { tu_fifo_t ff; // mutex: read if ep rx, write if e tx - OSAL_MUTEX_DEF(ff_mutex); + OSAL_MUTEX_DEF(ff_mutexdef); }tu_edpt_stream_t; @@ -87,15 +87,17 @@ bool tu_edpt_release(tu_edpt_state_t* ep_state, osal_mutex_t mutex); // Endpoint Stream //--------------------------------------------------------------------+ -// Init an stream, should only be called once +// Init an endpoint stream bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool overwritable, void* ff_buf, uint16_t ff_bufsize, uint8_t* ep_buf, uint16_t ep_bufsize); +// Deinit an endpoint stream +bool tu_edpt_stream_deinit(tu_edpt_stream_t* s); + // Open an stream for an endpoint // hwid is either device address (host mode) or rhport (device mode) TU_ATTR_ALWAYS_INLINE static inline -void tu_edpt_stream_open(tu_edpt_stream_t* s, uint8_t hwid, tusb_desc_endpoint_t const *desc_ep) -{ +void tu_edpt_stream_open(tu_edpt_stream_t* s, uint8_t hwid, tusb_desc_endpoint_t const *desc_ep) { tu_fifo_clear(&s->ff); s->hwid = hwid; s->ep_addr = desc_ep->bEndpointAddress; @@ -103,16 +105,14 @@ void tu_edpt_stream_open(tu_edpt_stream_t* s, uint8_t hwid, tusb_desc_endpoint_t } TU_ATTR_ALWAYS_INLINE static inline -void tu_edpt_stream_close(tu_edpt_stream_t* s) -{ +void tu_edpt_stream_close(tu_edpt_stream_t* s) { s->hwid = 0; s->ep_addr = 0; } // Clear fifo TU_ATTR_ALWAYS_INLINE static inline -bool tu_edpt_stream_clear(tu_edpt_stream_t* s) -{ +bool tu_edpt_stream_clear(tu_edpt_stream_t* s) { return tu_fifo_clear(&s->ff); } @@ -131,8 +131,7 @@ bool tu_edpt_stream_write_zlp_if_needed(tu_edpt_stream_t* s, uint32_t last_xferr // Get the number of bytes available for writing TU_ATTR_ALWAYS_INLINE static inline -uint32_t tu_edpt_stream_write_available(tu_edpt_stream_t* s) -{ +uint32_t tu_edpt_stream_write_available(tu_edpt_stream_t* s) { return (uint32_t) tu_fifo_remaining(&s->ff); } diff --git a/src/tusb.c b/src/tusb.c index 2256dc3b9..074dcce96 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -220,7 +220,7 @@ uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf, bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool overwritable, void* ff_buf, uint16_t ff_bufsize, uint8_t* ep_buf, uint16_t ep_bufsize) { - osal_mutex_t new_mutex = osal_mutex_create(&s->ff_mutex); + osal_mutex_t new_mutex = osal_mutex_create(&s->ff_mutexdef); (void) new_mutex; (void) is_tx; @@ -234,6 +234,15 @@ bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool ove return true; } +bool tu_edpt_stream_deinit(tu_edpt_stream_t* s) { + (void) s; + #if OSAL_MUTEX_REQUIRED + if (s->ff->mutex_wr) osal_mutex_delete(s->ff->mutex_wr); + if (s->ff->mutex_rd) osal_mutex_delete(s->ff->mutex_rd); + #endif + return true; +} + TU_ATTR_ALWAYS_INLINE static inline bool stream_claim(tu_edpt_stream_t* s) { if (s->is_host) { -- cgit v1.3.1 From db28437218244ae9a1e16d87964edd51f78f54bd Mon Sep 17 00:00:00 2001 From: HiFiPhile Date: Tue, 2 Apr 2024 14:17:24 +0200 Subject: Move endpoint alloc define to tusb_mcu.h --- src/class/audio/audio_device.c | 19 ++++++------------- src/common/tusb_mcu.h | 4 ++++ 2 files changed, 10 insertions(+), 13 deletions(-) (limited to 'src/common') diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index 9a361419b..2af3da324 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -96,13 +96,6 @@ #define USE_LINEAR_BUFFER 1 #endif -// Temporarily put the check here -#if defined(TUP_USBIP_FSDEV) || defined(TUP_USBIP_DWC2) - #define USE_ISO_EP_ALLOCATION 1 -#else - #define USE_ISO_EP_ALLOCATION 0 -#endif - // Declaration of buffers // Check for maximum supported numbers @@ -1476,7 +1469,7 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin #endif } -#if USE_ISO_EP_ALLOCATION +#ifdef TUP_DCD_EDPT_ISO_ALLOC { #if CFG_TUD_AUDIO_ENABLE_EP_IN uint8_t ep_in = 0; @@ -1552,7 +1545,7 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin } #endif } -#endif // USE_ISO_EP_ALLOCATION +#endif // TUP_DCD_EDPT_ISO_ALLOC #if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL { @@ -1674,7 +1667,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const * if (audio->ep_in_as_intf_num == itf) { audio->ep_in_as_intf_num = 0; - #if !USE_ISO_EP_ALLOCATION + #ifndef TUP_DCD_EDPT_ISO_ALLOC usbd_edpt_close(rhport, audio->ep_in); #endif @@ -1705,7 +1698,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const * if (audio->ep_out_as_intf_num == itf) { audio->ep_out_as_intf_num = 0; - #if !USE_ISO_EP_ALLOCATION + #ifndef TUP_DCD_EDPT_ISO_ALLOC usbd_edpt_close(rhport, audio->ep_out); #endif @@ -1726,7 +1719,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const * // Close corresponding feedback EP #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP - #if !USE_ISO_EP_ALLOCATION + #ifndef TUP_DCD_EDPT_ISO_ALLOC usbd_edpt_close(rhport, audio->ep_fb); #endif audio->ep_fb = 0; @@ -1758,7 +1751,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const * if (tu_desc_type(p_desc) == TUSB_DESC_ENDPOINT) { tusb_desc_endpoint_t const* desc_ep = (tusb_desc_endpoint_t const *) p_desc; -#if USE_ISO_EP_ALLOCATION +#ifdef TUP_DCD_EDPT_ISO_ALLOC TU_ASSERT(usbd_edpt_iso_activate(rhport, desc_ep)); #else TU_ASSERT(usbd_edpt_open(rhport, desc_ep)); diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 308ee713c..1ee20ba07 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -434,4 +434,8 @@ #define TU_ATTR_FAST_FUNC #endif +#if defined(TUP_USBIP_DWC2) || defined(TUP_USBIP_FSDEV) + #define TUP_DCD_EDPT_ISO_ALLOC +#endif + #endif -- cgit v1.3.1 From caf2c5e0b75b72c0b0357ca364a76d70b5846bde Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 5 Apr 2024 17:04:33 +0700 Subject: reverted un-related file changes --- examples/device/cdc_msc_freertos/src/main.c | 51 ++++++++++++---------- hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk | 3 -- hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk | 3 -- hw/bsp/nrf/boards/pca10095/board.h | 4 +- hw/bsp/nrf/boards/pca10095/board.mk | 3 ++ hw/bsp/nrf/family.c | 1 + src/class/msc/msc_device.c | 2 +- src/class/video/video.h | 6 ++- src/common/tusb_debug.h | 3 +- src/common/tusb_fifo.c | 1 + src/host/usbh_pvt.h | 6 ++- src/portable/nordic/nrf5x/dcd_nrf5x.c | 8 +++- src/portable/ohci/ohci.h | 2 +- 13 files changed, 54 insertions(+), 39 deletions(-) (limited to 'src/common') diff --git a/examples/device/cdc_msc_freertos/src/main.c b/examples/device/cdc_msc_freertos/src/main.c index 1dadc4513..e94e8eaec 100644 --- a/examples/device/cdc_msc_freertos/src/main.c +++ b/examples/device/cdc_msc_freertos/src/main.c @@ -52,7 +52,8 @@ #define USBD_STACK_SIZE (3*configMINIMAL_STACK_SIZE/2) * (CFG_TUSB_DEBUG ? 2 : 1) #endif -#define CDC_STACK_SZIE configMINIMAL_STACK_SIZE +#define CDC_STACK_SIZE configMINIMAL_STACK_SIZE +#define BLINKY_STACK_SIZE configMINIMAL_STACK_SIZE //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF PROTOTYPES @@ -69,21 +70,22 @@ enum { BLINK_SUSPENDED = 2500, }; -// static timer & task +// static task #if configSUPPORT_STATIC_ALLOCATION -StaticTimer_t blinky_tmdef; +StackType_t blinky_stack[BLINKY_STACK_SIZE]; +StaticTask_t blinky_taskdef; StackType_t usb_device_stack[USBD_STACK_SIZE]; StaticTask_t usb_device_taskdef; -StackType_t cdc_stack[CDC_STACK_SZIE]; +StackType_t cdc_stack[CDC_STACK_SIZE]; StaticTask_t cdc_taskdef; #endif -TimerHandle_t blinky_tm; +static uint32_t blink_interval_ms = BLINK_NOT_MOUNTED; -static void led_blinky_cb(TimerHandle_t xTimer); static void usb_device_task(void *param); +void led_blinking_task(void* param); void cdc_task(void *params); //--------------------------------------------------------------------+ @@ -94,22 +96,20 @@ int main(void) { board_init(); #if configSUPPORT_STATIC_ALLOCATION - // soft timer for blinky - blinky_tm = xTimerCreateStatic(NULL, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), true, NULL, led_blinky_cb, &blinky_tmdef); + // blinky task + xTaskCreateStatic(led_blinking_task, "blinky", BLINKY_STACK_SIZE, NULL, 1, blinky_stack, &blinky_taskdef); // Create a task for tinyusb device stack xTaskCreateStatic(usb_device_task, "usbd", USBD_STACK_SIZE, NULL, configMAX_PRIORITIES-1, usb_device_stack, &usb_device_taskdef); // Create CDC task - xTaskCreateStatic(cdc_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, cdc_stack, &cdc_taskdef); + xTaskCreateStatic(cdc_task, "cdc", CDC_STACK_SIZE, NULL, configMAX_PRIORITIES - 2, cdc_stack, &cdc_taskdef); #else - blinky_tm = xTimerCreate(NULL, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), true, NULL, led_blinky_cb); + xTaskCreate(led_blinking_task, "blinky", BLINKY_STACK_SIZE, NULL, 1, NULL); xTaskCreate(usb_device_task, "usbd", USBD_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL); xTaskCreate(cdc_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES - 2, NULL); #endif - xTimerStart(blinky_tm, 0); - // skip starting scheduler (and return) for ESP32-S2 or ESP32-S3 #if !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) vTaskStartScheduler(); @@ -154,12 +154,12 @@ static void usb_device_task(void *param) { // Invoked when device is mounted void tud_mount_cb(void) { - xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_MOUNTED), 0); + blink_interval_ms = BLINK_MOUNTED; } // Invoked when device is unmounted void tud_umount_cb(void) { - xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), 0); + blink_interval_ms = BLINK_NOT_MOUNTED; } // Invoked when usb bus is suspended @@ -167,16 +167,12 @@ void tud_umount_cb(void) { // Within 7ms, device must draw an average of current less than 2.5 mA from bus void tud_suspend_cb(bool remote_wakeup_en) { (void) remote_wakeup_en; - xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_SUSPENDED), 0); + blink_interval_ms = BLINK_SUSPENDED; } // Invoked when usb bus is resumed void tud_resume_cb(void) { - if (tud_mounted()) { - xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_MOUNTED), 0); - } else { - xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), 0); - } + blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED; } //--------------------------------------------------------------------+ @@ -235,10 +231,17 @@ void tud_cdc_rx_cb(uint8_t itf) { //--------------------------------------------------------------------+ // BLINKING TASK //--------------------------------------------------------------------+ -static void led_blinky_cb(TimerHandle_t xTimer) { - (void) xTimer; +void led_blinking_task(void* param) { + (void) param; + static uint32_t start_ms = 0; static bool led_state = false; - board_led_write(led_state); - led_state = 1 - led_state; // toggle + while (1) { + // Blink every interval ms + vTaskDelay(blink_interval_ms / portTICK_PERIOD_MS); + start_ms += blink_interval_ms; + + board_led_write(led_state); + led_state = 1 - led_state; // toggle + } } diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk index f69700139..c4dc65b63 100644 --- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk +++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk @@ -8,9 +8,6 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast # All source paths should be relative to the top level. LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld -SRC_C += \ - $(MCU_DIR)/project_template/clock_config.c \ - # For flash-jlink target JLINK_DEVICE = K32L2A41xxxxA diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk index 82456b721..9cf36c500 100644 --- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk +++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk @@ -8,9 +8,6 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls # All source paths should be relative to the top level. LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld -SRC_C += \ - $(MCU_DIR)/project_template/clock_config.c \ - # For flash-jlink target JLINK_DEVICE = K32L2B31xxxxA diff --git a/hw/bsp/nrf/boards/pca10095/board.h b/hw/bsp/nrf/boards/pca10095/board.h index 2a46e5422..846c2ee5b 100644 --- a/hw/bsp/nrf/boards/pca10095/board.h +++ b/hw/bsp/nrf/boards/pca10095/board.h @@ -42,8 +42,8 @@ #define BUTTON_STATE_ACTIVE 0 // UART -#define UART_RX_PIN 32 -#define UART_TX_PIN 33 +#define UART_RX_PIN 22 +#define UART_TX_PIN 20 // SPI for USB host shield // Pin is correct but not working probably due to signal incompatible (1.8V 3v3) with MAC3421E !? diff --git a/hw/bsp/nrf/boards/pca10095/board.mk b/hw/bsp/nrf/boards/pca10095/board.mk index 9c4edbafc..20580d619 100644 --- a/hw/bsp/nrf/boards/pca10095/board.mk +++ b/hw/bsp/nrf/boards/pca10095/board.mk @@ -2,6 +2,9 @@ CPU_CORE = cortex-m33 MCU_VARIANT = nrf5340_application CFLAGS += -DNRF5340_XXAA -DNRF5340_XXAA_APPLICATION +# enable max3421 host driver for this board +MAX3421_HOST = 1 + LD_FILE = hw/mcu/nordic/nrfx/mdk/nrf5340_xxaa_application.ld SRC_C += hw/mcu/nordic/nrfx/drivers/src/nrfx_usbreg.c diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c index d6bb2d868..71c651f5f 100644 --- a/hw/bsp/nrf/family.c +++ b/hw/bsp/nrf/family.c @@ -76,6 +76,7 @@ enum { #define LFCLK_SRC_RC CLOCK_LFCLKSRC_SRC_LFRC #define VBUSDETECT_Msk USBREG_USBREGSTATUS_VBUSDETECT_Msk #define OUTPUTRDY_Msk USBREG_USBREGSTATUS_OUTPUTRDY_Msk + #define GPIOTE_IRQn GPIOTE1_IRQn #else #define LFCLK_SRC_RC CLOCK_LFCLKSRC_SRC_RC #define VBUSDETECT_Msk POWER_USBREGSTATUS_VBUSDETECT_Msk diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index 2589dcd2c..c145d86a6 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -203,7 +203,7 @@ uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw) //--------------------------------------------------------------------+ // Debug //--------------------------------------------------------------------+ -#if CFG_TUSB_DEBUG >= 2 +#if CFG_TUSB_DEBUG >= CFG_TUD_MSC_LOG_LEVEL TU_ATTR_UNUSED tu_static tu_lookup_entry_t const _msc_scsi_cmd_lookup[] = { diff --git a/src/class/video/video.h b/src/class/video/video.h index 3b511af96..b8a9b6369 100644 --- a/src/class/video/video.h +++ b/src/class/video/video.h @@ -369,6 +369,8 @@ typedef struct TU_ATTR_PACKED { uint8_t bCopyProtect; } tusb_desc_video_format_uncompressed_t; +TU_VERIFY_STATIC(sizeof(tusb_desc_video_format_uncompressed_t) == 27, "size is not correct"); + // Uncompressed payload specs: 3.1.2 frame descriptor #define tusb_desc_video_frame_uncompressed_nint_t(_nint) \ struct TU_ATTR_PACKED { \ @@ -382,7 +384,7 @@ typedef struct TU_ATTR_PACKED { uint32_t dwMinBitRate; \ uint32_t dwMaxBitRate; \ uint32_t dwMaxVideoFrameBufferSize; /* deprecated in 1.5 */ \ - uint32_t dwDefaultFrameInterval; \ + uint32_t dwDefaultFrameInterval; /* 100ns unit */\ uint8_t bFrameIntervalType; \ uint32_t dwFrameInterval[_nint]; \ } @@ -414,6 +416,8 @@ typedef struct TU_ATTR_PACKED { uint8_t bCopyProtect; } tusb_desc_video_format_mjpeg_t; +TU_VERIFY_STATIC(sizeof(tusb_desc_video_format_mjpeg_t) == 11, "size is not correct"); + // MJPEG payload specs: 3.1.2 frame descriptor (same as uncompressed) typedef tusb_desc_video_frame_uncompressed_t tusb_desc_video_frame_mjpeg_t; typedef tusb_desc_video_frame_uncompressed_1int_t tusb_desc_video_frame_mjpeg_1int_t; diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index 0f4dc93f3..2e9f1d9cd 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -60,6 +60,7 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent); static inline void tu_print_buf(uint8_t const* buf, uint32_t bufsize) { for(uint32_t i=0; i= 2 diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index d6c3db4ce..76696396b 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -224,6 +224,7 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t if (wrap_bytes > 0) _ff_push_const_addr(ff_buf, app_buf, wrap_bytes); } break; + default: break; } } diff --git a/src/host/usbh_pvt.h b/src/host/usbh_pvt.h index 46d13a907..95de915e9 100644 --- a/src/host/usbh_pvt.h +++ b/src/host/usbh_pvt.h @@ -35,7 +35,11 @@ extern "C" { #endif -#define TU_LOG_USBH(...) TU_LOG(CFG_TUH_LOG_LEVEL, __VA_ARGS__) +#define TU_LOG_USBH(...) TU_LOG(CFG_TUH_LOG_LEVEL, __VA_ARGS__) +#define TU_LOG_MEM_USBH(...) TU_LOG_MEM(CFG_TUH_LOG_LEVEL, __VA_ARGS__) +#define TU_LOG_BUF_USBH(...) TU_LOG_BUF(CFG_TUH_LOG_LEVEL, __VA_ARGS__) +#define TU_LOG_INT_USBH(...) TU_LOG_INT(CFG_TUH_LOG_LEVEL, __VA_ARGS__) +#define TU_LOG_HEX_USBH(...) TU_LOG_HEX(CFG_TUH_LOG_LEVEL, __VA_ARGS__) enum { USBH_EPSIZE_BULK_MAX = (TUH_OPT_HIGH_SPEED ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS) diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index cf9e5923b..80a285ef0 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -653,7 +653,11 @@ void dcd_int_handler(uint8_t rhport) if (NRF_USBD->EPOUTEN & USBD_EPOUTEN_ISOOUT_Msk) { iso_enabled = true; - xact_out_dma(EP_ISO_NUM); + // Transfer from endpoint to RAM only if data is not corrupted + if ((int_status & USBD_INTEN_USBEVENT_Msk) == 0 || + (NRF_USBD->EVENTCAUSE & USBD_EVENTCAUSE_ISOOUTCRC_Msk) == 0) { + xact_out_dma(EP_ISO_NUM); + } } // ISOIN: Notify client that data was transferred @@ -683,7 +687,7 @@ void dcd_int_handler(uint8_t rhport) { TU_LOG(3, "EVENTCAUSE = 0x%04lX\r\n", NRF_USBD->EVENTCAUSE); - enum { EVT_CAUSE_MASK = USBD_EVENTCAUSE_SUSPEND_Msk | USBD_EVENTCAUSE_RESUME_Msk | USBD_EVENTCAUSE_USBWUALLOWED_Msk }; + enum { EVT_CAUSE_MASK = USBD_EVENTCAUSE_SUSPEND_Msk | USBD_EVENTCAUSE_RESUME_Msk | USBD_EVENTCAUSE_USBWUALLOWED_Msk | USBD_EVENTCAUSE_ISOOUTCRC_Msk }; uint32_t const evt_cause = NRF_USBD->EVENTCAUSE & EVT_CAUSE_MASK; NRF_USBD->EVENTCAUSE = evt_cause; // clear interrupt diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h index 4feefd771..94bad5df7 100644 --- a/src/portable/ohci/ohci.h +++ b/src/portable/ohci/ohci.h @@ -83,7 +83,7 @@ typedef struct TU_ATTR_ALIGNED(16) volatile uint32_t condition_code : 4; // Word 1 - volatile uint8_t* current_buffer_pointer; + uint8_t* volatile current_buffer_pointer; // Word 2 : next TD volatile uint32_t next; -- cgit v1.3.1 From 5c7876d4444de25942778728d377ec77f74a75dd Mon Sep 17 00:00:00 2001 From: Matthias Schär Date: Thu, 28 Jul 2022 13:01:36 +0200 Subject: Fixed behavior of the PRCR register. Previous write protection will be recovered. --- .idea/cmake.xml | 2 +- examples/device/cdc_msc_freertos/src/freertos_hook.c | 3 ++- examples/device/hid_composite_freertos/src/freertos_hook.c | 3 ++- src/common/tusb_compiler.h | 2 +- 4 files changed, 6 insertions(+), 4 deletions(-) (limited to 'src/common') diff --git a/.idea/cmake.xml b/.idea/cmake.xml index ebc6a0570..e4a08eaa6 100644 --- a/.idea/cmake.xml +++ b/.idea/cmake.xml @@ -75,7 +75,7 @@ - + diff --git a/examples/device/cdc_msc_freertos/src/freertos_hook.c b/examples/device/cdc_msc_freertos/src/freertos_hook.c index ab885947c..3cd27e08c 100644 --- a/examples/device/cdc_msc_freertos/src/freertos_hook.c +++ b/examples/device/cdc_msc_freertos/src/freertos_hook.c @@ -99,9 +99,10 @@ void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, Stack void vApplicationSetupTimerInterrupt(void) { /* Enable CMT0 */ + unsigned short oldPRCR = SYSTEM.PRCR.WORD; SYSTEM.PRCR.WORD = (0xA5u<<8) | TU_BIT(1); MSTP(CMT0) = 0; - SYSTEM.PRCR.WORD = (0xA5u<<8); + SYSTEM.PRCR.WORD = oldPRCR; CMT0.CMCNT = 0; CMT0.CMCOR = (unsigned short)(((configPERIPHERAL_CLOCK_HZ/configTICK_RATE_HZ)-1)/128); diff --git a/examples/device/hid_composite_freertos/src/freertos_hook.c b/examples/device/hid_composite_freertos/src/freertos_hook.c index ab885947c..3cd27e08c 100644 --- a/examples/device/hid_composite_freertos/src/freertos_hook.c +++ b/examples/device/hid_composite_freertos/src/freertos_hook.c @@ -99,9 +99,10 @@ void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, Stack void vApplicationSetupTimerInterrupt(void) { /* Enable CMT0 */ + unsigned short oldPRCR = SYSTEM.PRCR.WORD; SYSTEM.PRCR.WORD = (0xA5u<<8) | TU_BIT(1); MSTP(CMT0) = 0; - SYSTEM.PRCR.WORD = (0xA5u<<8); + SYSTEM.PRCR.WORD = oldPRCR; CMT0.CMCNT = 0; CMT0.CMCOR = (unsigned short)(((configPERIPHERAL_CLOCK_HZ/configTICK_RATE_HZ)-1)/128); diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 6f07bdd53..86d150c68 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -56,7 +56,7 @@ #elif defined (__STDC_VERSION__) && __STDC_VERSION__ >= 201112L #define TU_VERIFY_STATIC _Static_assert #elif defined(__CCRX__) - #define TU_VERIFY_STATIC(const_expr, _mess) typedef char TU_XSTRCAT(Line, __LINE__)[(const_expr) ? 1 : 0]; + #define TU_VERIFY_STATIC(const_expr, _mess) typedef char TU_XSTRCAT3(Line, __LINE__, _TU_COUNTER_)[(const_expr) ? 1 : 0]; #else #define TU_VERIFY_STATIC(const_expr, _mess) enum { TU_XSTRCAT(_verify_static_, _TU_COUNTER_) = 1/(!!(const_expr)) } #endif -- cgit v1.3.1 From 6c2f71ad19bbe9e3d346b5631ede9557b4252088 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 9 Apr 2024 17:12:15 +0700 Subject: make veryfi static in ccrx consistent with the rest --- src/common/tusb_compiler.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/common') diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 86d150c68..0d5570b1c 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -56,7 +56,7 @@ #elif defined (__STDC_VERSION__) && __STDC_VERSION__ >= 201112L #define TU_VERIFY_STATIC _Static_assert #elif defined(__CCRX__) - #define TU_VERIFY_STATIC(const_expr, _mess) typedef char TU_XSTRCAT3(Line, __LINE__, _TU_COUNTER_)[(const_expr) ? 1 : 0]; + #define TU_VERIFY_STATIC(const_expr, _mess) typedef char TU_XSTRCAT(_verify_static_, _TU_COUNTER_)[(const_expr) ? 1 : 0]; #else #define TU_VERIFY_STATIC(const_expr, _mess) enum { TU_XSTRCAT(_verify_static_, _TU_COUNTER_) = 1/(!!(const_expr)) } #endif -- cgit v1.3.1 From 1e41b9725a946eb6bbbd5cc96b804dbca0bcf7fa Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 10 Apr 2024 10:13:36 +0700 Subject: remove the usage of TU_BIT() and TU_GENMASK() from tusb_types.h --- src/common/tusb_types.h | 31 ++++++++++--------------------- 1 file changed, 10 insertions(+), 21 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 2c5dce723..b571f9b72 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -24,12 +24,8 @@ * This file is part of the TinyUSB stack. */ -/** \ingroup group_usb_definitions - * \defgroup USBDef_Type USB Types - * @{ */ - -#ifndef _TUSB_TYPES_H_ -#define _TUSB_TYPES_H_ +#ifndef TUSB_TYPES_H_ +#define TUSB_TYPES_H_ #include #include @@ -212,8 +208,8 @@ typedef enum { } device_capability_type_t; enum { - TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP = TU_BIT(5), - TUSB_DESC_CONFIG_ATT_SELF_POWERED = TU_BIT(6), + TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP = 1u << 5, + TUSB_DESC_CONFIG_ATT_SELF_POWERED = 1u << 6, }; #define TUSB_DESC_CONFIG_POWER_MA(x) ((x)/2) @@ -274,11 +270,11 @@ TU_ATTR_BIT_FIELD_ORDER_BEGIN typedef struct TU_ATTR_PACKED { uint8_t bLength ; ///< Size of this descriptor in bytes. uint8_t bDescriptorType ; ///< DEVICE Descriptor Type. - uint16_t bcdUSB ; ///< BUSB Specification Release Number in Binary-Coded Decimal (i.e., 2.10 is 210H). This field identifies the release of the USB Specification with which the device and its descriptors are compliant. + uint16_t bcdUSB ; ///< BUSB Specification Release Number in Binary-Coded Decimal (i.e., 2.10 is 210H). - uint8_t bDeviceClass ; ///< Class code (assigned by the USB-IF). \li If this field is reset to zero, each interface within a configuration specifies its own class information and the various interfaces operate independently. \li If this field is set to a value between 1 and FEH, the device supports different class specifications on different interfaces and the interfaces may not operate independently. This value identifies the class definition used for the aggregate interfaces. \li If this field is set to FFH, the device class is vendor-specific. - uint8_t bDeviceSubClass ; ///< Subclass code (assigned by the USB-IF). These codes are qualified by the value of the bDeviceClass field. \li If the bDeviceClass field is reset to zero, this field must also be reset to zero. \li If the bDeviceClass field is not set to FFH, all values are reserved for assignment by the USB-IF. - uint8_t bDeviceProtocol ; ///< Protocol code (assigned by the USB-IF). These codes are qualified by the value of the bDeviceClass and the bDeviceSubClass fields. If a device supports class-specific protocols on a device basis as opposed to an interface basis, this code identifies the protocols that the device uses as defined by the specification of the device class. \li If this field is reset to zero, the device does not use class-specific protocols on a device basis. However, it may use classspecific protocols on an interface basis. \li If this field is set to FFH, the device uses a vendor-specific protocol on a device basis. + uint8_t bDeviceClass ; ///< Class code (assigned by the USB-IF). + uint8_t bDeviceSubClass ; ///< Subclass code (assigned by the USB-IF). + uint8_t bDeviceProtocol ; ///< Protocol code (assigned by the USB-IF). uint8_t bMaxPacketSize0 ; ///< Maximum packet size for endpoint zero (only 8, 16, 32, or 64 are valid). For HS devices is fixed to 64. uint16_t idVendor ; ///< Vendor ID (assigned by the USB-IF). @@ -493,15 +489,10 @@ TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t di } TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) { - return tu_le16toh(desc_ep->wMaxPacketSize) & TU_GENMASK(10, 0); + return tu_le16toh(desc_ep->wMaxPacketSize) & 0x7FF; } #if CFG_TUSB_DEBUG -TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_dir_str(tusb_dir_t dir) { - tu_static const char *str[] = {"out", "in"}; - return str[dir]; -} - TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_t t) { tu_static const char *str[] = {"control", "isochronous", "bulk", "interrupt"}; return str[t]; @@ -541,6 +532,4 @@ uint8_t const * tu_desc_find3(uint8_t const* desc, uint8_t const* end, uint8_t b } #endif -#endif /* _TUSB_TYPES_H_ */ - -/** @} */ +#endif // TUSB_TYPES_H_ -- cgit v1.3.1 From 3442a87d5b52112a8bc4672322d488703e4ee23e Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 17 Apr 2024 20:06:13 +0700 Subject: - clang h743 build and run cdc_msc ok - switch unit test back to gcc, since path to clang conflict on local setup (x86 and arm) --- examples/build_system/cmake/cpu/cortex-m7.cmake | 1 - examples/build_system/cmake/toolchain/common.cmake | 2 +- hw/bsp/board.c | 19 +++++++++++++++++++ hw/bsp/stm32h7/family.cmake | 7 +++---- src/common/tusb_common.h | 1 + src/portable/synopsys/dwc2/dcd_dwc2.c | 6 +++--- test/unit-test/project.yml | 12 ++++++------ 7 files changed, 33 insertions(+), 15 deletions(-) (limited to 'src/common') diff --git a/examples/build_system/cmake/cpu/cortex-m7.cmake b/examples/build_system/cmake/cpu/cortex-m7.cmake index f7684af84..b0f84b76b 100644 --- a/examples/build_system/cmake/cpu/cortex-m7.cmake +++ b/examples/build_system/cmake/cpu/cortex-m7.cmake @@ -18,7 +18,6 @@ elseif (TOOLCHAIN STREQUAL "clang") set(TOOLCHAIN_COMMON_FLAGS --target=arm-none-eabi -mcpu=cortex-m7 - -mfloat-abi=hard -mfpu=fpv5-d16 ) set(FREERTOS_PORT GCC_ARM_CM7 CACHE INTERNAL "") diff --git a/examples/build_system/cmake/toolchain/common.cmake b/examples/build_system/cmake/toolchain/common.cmake index 6c6d54c74..bbd670b65 100644 --- a/examples/build_system/cmake/toolchain/common.cmake +++ b/examples/build_system/cmake/toolchain/common.cmake @@ -45,7 +45,7 @@ elseif (TOOLCHAIN STREQUAL "clang") list(APPEND TOOLCHAIN_EXE_LINKER_FLAGS -Wl,--print-memory-usage -Wl,--gc-sections - -Wl,--cref + #-Wl,--cref ) endif () diff --git a/hw/bsp/board.c b/hw/bsp/board.c index 23b4b6628..996ac9263 100644 --- a/hw/bsp/board.c +++ b/hw/bsp/board.c @@ -108,6 +108,25 @@ TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count) { // st->st_mode = S_IFCHR; //} +// Clang use picolibc +#if defined(__clang__) +static int cl_putc(char c, FILE *f) { + (void) f; + return sys_write(0, &c, 1); +} + +static int cl_getc(FILE* f) { + (void) f; + char c; + return sys_read(0, &c, 1) > 0 ? c : -1; +} + +static FILE __stdio = FDEV_SETUP_STREAM(cl_putc, cl_getc, NULL, _FDEV_SETUP_RW); +FILE *const stdin = &__stdio; +__strong_reference(stdin, stdout); +__strong_reference(stdin, stderr); +#endif + int board_getchar(void) { char c; return (sys_read(0, &c, 1) > 0) ? (int) c : (-1); diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake index d852ce21c..ab9ba3fbb 100644 --- a/hw/bsp/stm32h7/family.cmake +++ b/hw/bsp/stm32h7/family.cmake @@ -56,10 +56,8 @@ function(add_board_target BOARD_TARGET) ${ST_CMSIS}/Include ${ST_HAL_DRIVER}/Inc ) - target_compile_options(${BOARD_TARGET} PUBLIC - ) - target_compile_definitions(${BOARD_TARGET} PUBLIC - ) + #target_compile_options(${BOARD_TARGET} PUBLIC) + #target_compile_definitions(${BOARD_TARGET} PUBLIC) update_board(${BOARD_TARGET}) @@ -75,6 +73,7 @@ function(add_board_target BOARD_TARGET) ) elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang") target_link_options(${BOARD_TARGET} PUBLIC + #-ldummyhost "LINKER:--script=${LD_FILE_GNU}" ) endif () diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 1f08ce4ed..0d4082c03 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -65,6 +65,7 @@ // Standard Headers #include #include +#include #include #include #include diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index a824226c7..f17d30f06 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -174,7 +174,7 @@ static bool fifo_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t packet_size) { // Check if free space is available TU_ASSERT(_allocated_fifo_words_tx + fifo_size + dwc2->grxfsiz <= _dwc2_controller[rhport].ep_fifo_size / 4); _allocated_fifo_words_tx += fifo_size; - TU_LOG(DWC2_DEBUG, " Allocated %u bytes at offset %lu", fifo_size * 4, + TU_LOG(DWC2_DEBUG, " Allocated %u bytes at offset %" PRIu32, fifo_size * 4, _dwc2_controller[rhport].ep_fifo_size - _allocated_fifo_words_tx * 4); // DIEPTXF starts at FIFO #1. @@ -419,9 +419,9 @@ void print_dwc2_info(dwc2_regs_t* dwc2) { volatile uint32_t const* p = (volatile uint32_t const*) &dwc2->guid; TU_LOG(DWC2_DEBUG, "guid, gsnpsid, ghwcfg1, ghwcfg2, ghwcfg3, ghwcfg4\r\n"); for (size_t i = 0; i < 5; i++) { - TU_LOG(DWC2_DEBUG, "0x%08lX, ", p[i]); + TU_LOG(DWC2_DEBUG, "0x%08" PRIX32 ", ", p[i]); } - TU_LOG(DWC2_DEBUG, "0x%08lX\r\n", p[5]); + TU_LOG(DWC2_DEBUG, "0x%08" PRIX32 "\r\n", p[5]); } #endif diff --git a/test/unit-test/project.yml b/test/unit-test/project.yml index 82528f68c..7fbbabfe6 100644 --- a/test/unit-test/project.yml +++ b/test/unit-test/project.yml @@ -81,20 +81,20 @@ :tools: :test_compiler: - :executable: clang - :name: 'clang compiler' + :executable: gcc + :name: 'gcc compiler' :arguments: - -I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE #expands to -I search paths - -I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR #expands to -I search paths - -D$: COLLECTION_DEFINES_TEST_AND_VENDOR #expands to all -D defined symbols - - -fsanitize=address + #- -fsanitize=address - -c ${1} #source code input file (Ruby method call param list sub) - -o ${2} #object file output (Ruby method call param list sub) :test_linker: - :executable: clang - :name: 'clang linker' + :executable: gcc + :name: 'gcc linker' :arguments: - - -fsanitize=address + #- -fsanitize=address - ${1} #list of object files to link (Ruby method call param list sub) - -o ${2} #executable file output (Ruby method call param list sub) -- cgit v1.3.1 From 5f473d51cf04a7bfeca71bce09a9b3a4c2b2a7d1 Mon Sep 17 00:00:00 2001 From: HiFiPhile Date: Thu, 18 Apr 2024 20:00:45 +0200 Subject: Fix IAR breakpoint test. --- src/common/tusb_verify.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/common') diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index 8aa66b4df..71406dacf 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -76,7 +76,8 @@ #endif // Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33. M55 -#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) +#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) || \ + defined(__ARM7M__) || defined (__ARM7EM__) || defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__) #define TU_BREAKPOINT() do \ { \ volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ -- cgit v1.3.1 From 2e995d7cf4b2971e3ca7167a097b99832c8d61ce Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 25 Apr 2024 20:23:40 +0700 Subject: adding support for esp32 for use with max3421e host --- examples/device/board_test/src/tusb_config.h | 2 +- examples/device/cdc_msc_freertos/src/main.c | 6 +-- examples/device/cdc_msc_freertos/src/tusb_config.h | 2 +- examples/device/hid_composite_freertos/src/main.c | 6 +-- .../hid_composite_freertos/src/tusb_config.h | 2 +- examples/device/video_capture/src/main.c | 4 +- examples/device/video_capture/src/tusb_config.h | 2 +- examples/device/video_capture_2ch/src/main.c | 4 +- .../device/video_capture_2ch/src/tusb_config.h | 2 +- examples/host/cdc_msc_hid_freertos/src/cdc_app.c | 2 +- examples/host/cdc_msc_hid_freertos/src/main.c | 6 +-- .../host/cdc_msc_hid_freertos/src/tusb_config.h | 2 +- hw/bsp/board_api.h | 2 +- .../boards/adafruit_feather_esp32_v2/board.cmake | 2 + .../boards/adafruit_feather_esp32_v2/board.h | 53 ++++++++++++++++++++++ hw/bsp/espressif/boards/family.c | 19 ++++---- .../components/tinyusb_src/CMakeLists.txt | 12 +---- hw/bsp/espressif/family.cmake | 6 +-- src/common/tusb_mcu.h | 5 +- src/portable/analog/max3421/hcd_max3421.c | 2 +- src/tusb_option.h | 2 + 21 files changed, 94 insertions(+), 49 deletions(-) create mode 100644 hw/bsp/espressif/boards/adafruit_feather_esp32_v2/board.cmake create mode 100644 hw/bsp/espressif/boards/adafruit_feather_esp32_v2/board.h (limited to 'src/common') diff --git a/examples/device/board_test/src/tusb_config.h b/examples/device/board_test/src/tusb_config.h index 1a27cc87f..36eafe807 100644 --- a/examples/device/board_test/src/tusb_config.h +++ b/examples/device/board_test/src/tusb_config.h @@ -49,7 +49,7 @@ #endif // Espressif IDF requires "freertos/" prefix in include path -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF #define CFG_TUSB_OS_INC_PATH freertos/ #endif diff --git a/examples/device/cdc_msc_freertos/src/main.c b/examples/device/cdc_msc_freertos/src/main.c index e94e8eaec..607d40270 100644 --- a/examples/device/cdc_msc_freertos/src/main.c +++ b/examples/device/cdc_msc_freertos/src/main.c @@ -30,7 +30,7 @@ #include "bsp/board_api.h" #include "tusb.h" -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF // ESP-IDF need "freertos/" prefix in include path. // CFG_TUSB_OS_INC_PATH should be defined accordingly. #include "freertos/FreeRTOS.h" @@ -111,14 +111,14 @@ int main(void) { #endif // skip starting scheduler (and return) for ESP32-S2 or ESP32-S3 -#if !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if !TUP_MCU_ESPRESSIF vTaskStartScheduler(); #endif return 0; } -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF void app_main(void) { main(); } diff --git a/examples/device/cdc_msc_freertos/src/tusb_config.h b/examples/device/cdc_msc_freertos/src/tusb_config.h index 91efe7d40..e743c9148 100644 --- a/examples/device/cdc_msc_freertos/src/tusb_config.h +++ b/examples/device/cdc_msc_freertos/src/tusb_config.h @@ -59,7 +59,7 @@ #endif // Espressif IDF requires "freertos/" prefix in include path -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF #define CFG_TUSB_OS_INC_PATH freertos/ #endif diff --git a/examples/device/hid_composite_freertos/src/main.c b/examples/device/hid_composite_freertos/src/main.c index ff2cb635e..2bd545bc2 100644 --- a/examples/device/hid_composite_freertos/src/main.c +++ b/examples/device/hid_composite_freertos/src/main.c @@ -31,7 +31,7 @@ #include "tusb.h" #include "usb_descriptors.h" -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF // ESP-IDF need "freertos/" prefix in include path. // CFG_TUSB_OS_INC_PATH should be defined accordingly. #include "freertos/FreeRTOS.h" @@ -113,14 +113,14 @@ int main(void) xTimerStart(blinky_tm, 0); // skip starting scheduler (and return) for ESP32-S2 or ESP32-S3 -#if !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if !TUP_MCU_ESPRESSIF vTaskStartScheduler(); #endif return 0; } -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF void app_main(void) { main(); diff --git a/examples/device/hid_composite_freertos/src/tusb_config.h b/examples/device/hid_composite_freertos/src/tusb_config.h index 3ba9bf311..0689e0f23 100644 --- a/examples/device/hid_composite_freertos/src/tusb_config.h +++ b/examples/device/hid_composite_freertos/src/tusb_config.h @@ -59,7 +59,7 @@ #endif // Espressif IDF requires "freertos/" prefix in include path -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF #define CFG_TUSB_OS_INC_PATH freertos/ #endif diff --git a/examples/device/video_capture/src/main.c b/examples/device/video_capture/src/main.c index 2a2b0961f..ddb51e03a 100644 --- a/examples/device/video_capture/src/main.c +++ b/examples/device/video_capture/src/main.c @@ -288,7 +288,7 @@ void led_blinking_task(void* param) { #define BLINKY_STACK_SIZE configMINIMAL_STACK_SIZE #define VIDEO_STACK_SIZE (configMINIMAL_STACK_SIZE*4) -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF #define USBD_STACK_SIZE 4096 int main(void); void app_main(void) { @@ -344,7 +344,7 @@ void freertos_init_task(void) { #endif // skip starting scheduler (and return) for ESP32-S2 or ESP32-S3 - #if !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) + #if !TUP_MCU_ESPRESSIF vTaskStartScheduler(); #endif } diff --git a/examples/device/video_capture/src/tusb_config.h b/examples/device/video_capture/src/tusb_config.h index bdfc37d87..21483a2da 100644 --- a/examples/device/video_capture/src/tusb_config.h +++ b/examples/device/video_capture/src/tusb_config.h @@ -58,7 +58,7 @@ #endif // Espressif IDF requires "freertos/" prefix in include path -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF #define CFG_TUSB_OS_INC_PATH freertos/ #endif diff --git a/examples/device/video_capture_2ch/src/main.c b/examples/device/video_capture_2ch/src/main.c index eb1cf2580..e8c2ec6b0 100644 --- a/examples/device/video_capture_2ch/src/main.c +++ b/examples/device/video_capture_2ch/src/main.c @@ -296,7 +296,7 @@ void led_blinking_task(void* param) { #define BLINKY_STACK_SIZE configMINIMAL_STACK_SIZE #define VIDEO_STACK_SIZE (configMINIMAL_STACK_SIZE*4) -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF #define USBD_STACK_SIZE 4096 int main(void); void app_main(void) { @@ -352,7 +352,7 @@ void freertos_init_task(void) { #endif // skip starting scheduler (and return) for ESP32-S2 or ESP32-S3 - #if !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) + #if !TUP_MCU_ESPRESSIF vTaskStartScheduler(); #endif } diff --git a/examples/device/video_capture_2ch/src/tusb_config.h b/examples/device/video_capture_2ch/src/tusb_config.h index fe66d63b5..43c7dfc90 100644 --- a/examples/device/video_capture_2ch/src/tusb_config.h +++ b/examples/device/video_capture_2ch/src/tusb_config.h @@ -58,7 +58,7 @@ #endif // Espressif IDF requires "freertos/" prefix in include path -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF #define CFG_TUSB_OS_INC_PATH freertos/ #endif diff --git a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c index 7d246af67..f3495ab28 100644 --- a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c +++ b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c @@ -27,7 +27,7 @@ #include "tusb.h" #include "bsp/board_api.h" -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF // ESP-IDF need "freertos/" prefix in include path. // CFG_TUSB_OS_INC_PATH should be defined accordingly. #include "freertos/FreeRTOS.h" diff --git a/examples/host/cdc_msc_hid_freertos/src/main.c b/examples/host/cdc_msc_hid_freertos/src/main.c index 069cbdc90..a6cb4d460 100644 --- a/examples/host/cdc_msc_hid_freertos/src/main.c +++ b/examples/host/cdc_msc_hid_freertos/src/main.c @@ -30,7 +30,7 @@ #include "bsp/board_api.h" #include "tusb.h" -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF // ESP-IDF need "freertos/" prefix in include path. // CFG_TUSB_OS_INC_PATH should be defined accordingly. #include "freertos/FreeRTOS.h" @@ -107,14 +107,14 @@ int main(void) { xTimerStart(blinky_tm, 0); // skip starting scheduler (and return) for ESP32-S2 or ESP32-S3 -#if !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if !TUP_MCU_ESPRESSIF vTaskStartScheduler(); #endif return 0; } -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF void app_main(void) { main(); } diff --git a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h index 35de5ee50..0aab2cd2f 100644 --- a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h +++ b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h @@ -44,7 +44,7 @@ #endif // Espressif IDF requires "freertos/" prefix in include path -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF #define CFG_TUSB_OS_INC_PATH freertos/ #endif diff --git a/hw/bsp/board_api.h b/hw/bsp/board_api.h index f21a32371..eee9ed9c5 100644 --- a/hw/bsp/board_api.h +++ b/hw/bsp/board_api.h @@ -39,7 +39,7 @@ extern "C" { #include "tusb.h" #if CFG_TUSB_OS == OPT_OS_FREERTOS -#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) +#if TUP_MCU_ESPRESSIF // ESP-IDF need "freertos/" prefix in include path. // CFG_TUSB_OS_INC_PATH should be defined accordingly. #include "freertos/FreeRTOS.h" diff --git a/hw/bsp/espressif/boards/adafruit_feather_esp32_v2/board.cmake b/hw/bsp/espressif/boards/adafruit_feather_esp32_v2/board.cmake new file mode 100644 index 000000000..18c956714 --- /dev/null +++ b/hw/bsp/espressif/boards/adafruit_feather_esp32_v2/board.cmake @@ -0,0 +1,2 @@ +# Apply board specific content here +set(IDF_TARGET "esp32") diff --git a/hw/bsp/espressif/boards/adafruit_feather_esp32_v2/board.h b/hw/bsp/espressif/boards/adafruit_feather_esp32_v2/board.h new file mode 100644 index 000000000..0c53df06b --- /dev/null +++ b/hw/bsp/espressif/boards/adafruit_feather_esp32_v2/board.h @@ -0,0 +1,53 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +#define NEOPIXEL_PIN 0 +#define NEOPIXEL_POWER_PIN 2 +#define NEOPIXEL_POWER_STATE 1 + +#define BUTTON_PIN 38 +#define BUTTON_STATE_ACTIVE 0 + +// SPI for USB host shield +#define MAX3421_SPI_HOST SPI3_HOST +#define MAX3421_SCK_PIN 5 +#define MAX3421_MOSI_PIN 19 +#define MAX3421_MISO_PIN 21 +#define MAX3421_CS_PIN 33 +#define MAX3421_INTR_PIN 15 + +#ifdef __cplusplus + } +#endif + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c index 5599d1504..02e478a0c 100644 --- a/hw/bsp/espressif/boards/family.c +++ b/hw/bsp/espressif/boards/family.c @@ -30,8 +30,12 @@ #include "esp_rom_gpio.h" #include "esp_mac.h" #include "hal/gpio_ll.h" + +#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) #include "hal/usb_hal.h" #include "soc/usb_periph.h" +static void configure_pins(usb_hal_context_t* usb); +#endif #include "driver/gpio.h" #include "driver/uart.h" @@ -56,7 +60,6 @@ static led_strip_handle_t led_strip; static void max3421_init(void); #endif -static void configure_pins(usb_hal_context_t* usb); //--------------------------------------------------------------------+ // Implementation @@ -100,7 +103,6 @@ void board_init(void) { }; ESP_ERROR_CHECK(led_strip_new_rmt_device(&strip_config, &rmt_config, &led_strip)); - led_strip_clear(led_strip); // off #endif @@ -109,6 +111,7 @@ void board_init(void) { gpio_set_direction(BUTTON_PIN, GPIO_MODE_INPUT); gpio_set_pull_mode(BUTTON_PIN, BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN_ONLY : GPIO_PULLUP_ONLY); +#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) // USB Controller Hal init periph_module_reset(PERIPH_USB_MODULE); periph_module_enable(PERIPH_USB_MODULE); @@ -118,12 +121,14 @@ void board_init(void) { }; usb_hal_init(&hal); configure_pins(&hal); +#endif #if CFG_TUH_ENABLED && CFG_TUH_MAX3421 max3421_init(); #endif } +#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) static void configure_pins(usb_hal_context_t* usb) { /* usb_periph_iopins currently configures USB_OTG as USB Device. * Introduce additional parameters in usb_hal_context_t when adding support @@ -153,6 +158,7 @@ static void configure_pins(usb_hal_context_t* usb) { gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3); } } +#endif //--------------------------------------------------------------------+ // Board porting API @@ -208,15 +214,12 @@ SemaphoreHandle_t max3421_intr_sem; static void IRAM_ATTR max3421_isr_handler(void* arg) { (void) arg; // arg is gpio num - gpio_set_level(13, 1); BaseType_t xHigherPriorityTaskWoken = pdFALSE; xSemaphoreGiveFromISR(max3421_intr_sem, &xHigherPriorityTaskWoken); if (xHigherPriorityTaskWoken) { portYIELD_FROM_ISR(); } - - gpio_set_level(13, 0); } static void max3421_intr_task(void* param) { @@ -250,16 +253,12 @@ static void max3421_init(void) { spi_device_interface_config_t max3421_cfg = { .mode = 0, - .clock_speed_hz = 26000000, + .clock_speed_hz = 20000000, // S2/S3 can work with 26 Mhz, but esp32 seems only work up to 20 Mhz .spics_io_num = -1, // manual control CS .queue_size = 1 }; ESP_ERROR_CHECK(spi_bus_add_device(MAX3421_SPI_HOST, &max3421_cfg, &max3421_spi)); - // debug - gpio_set_direction(13, GPIO_MODE_OUTPUT); - gpio_set_level(13, 0); - // Interrupt pin max3421_intr_sem = xSemaphoreCreateBinary(); xTaskCreate(max3421_intr_task, "max3421 intr", 2048, NULL, configMAX_PRIORITIES - 2, NULL); diff --git a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt index abe276910..8bdb3802e 100644 --- a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt +++ b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt @@ -5,17 +5,7 @@ set(includes_public) set(compile_options) set(tusb_src "${CMAKE_CURRENT_SOURCE_DIR}/../../../../../src") -if(target STREQUAL "esp32s3") - set(tusb_mcu "OPT_MCU_ESP32S3") -elseif(target STREQUAL "esp32s2") - set(tusb_mcu "OPT_MCU_ESP32S2") -else() - # CONFIG_TINYUSB dependency has been guaranteed by Kconfig logic, - # So it's not possible that cmake goes here - message(FATAL_ERROR "TinyUSB is not support on ${target}.") - return() -endif() - +string(TOUPPER OPT_MCU_${target} tusb_mcu) list(APPEND compile_definitions CFG_TUSB_MCU=${tusb_mcu} CFG_TUSB_OS=OPT_OS_FREERTOS diff --git a/hw/bsp/espressif/family.cmake b/hw/bsp/espressif/family.cmake index 92a9bcb04..eb97401c3 100644 --- a/hw/bsp/espressif/family.cmake +++ b/hw/bsp/espressif/family.cmake @@ -3,11 +3,7 @@ cmake_minimum_required(VERSION 3.5) # Apply board specific content i.e IDF_TARGET must be set before project.cmake is included include("${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake") -if(IDF_TARGET STREQUAL "esp32s2") - set(FAMILY_MCUS ESP32S2) -elseif(IDF_TARGET STREQUAL "esp32s3") - set(FAMILY_MCUS ESP32S3) -endif() +string(TOUPPER ${IDF_TARGET} FAMILY_MCUS) # Add example src and bsp directories set(EXTRA_COMPONENT_DIRS "src" "${CMAKE_CURRENT_LIST_DIR}/boards" "${CMAKE_CURRENT_LIST_DIR}/components") diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 0ae2573cd..2c4d7461d 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -329,6 +329,9 @@ #define TUP_USBIP_DWC2 #define TUP_DCD_ENDPOINT_MAX 6 +#elif TU_CHECK_MCU(OPT_MCU_ESP32) && (CFG_TUD_ENABLED || !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421)) + #error "MCUs are only supported with CFG_TUH_MAX3421 enabled" + //--------------------------------------------------------------------+ // Dialog //--------------------------------------------------------------------+ @@ -426,7 +429,7 @@ #define TUP_MCU_MULTIPLE_CORE 0 #endif -#ifndef TUP_DCD_ENDPOINT_MAX +#if CFG_TUD_ENABLED && !defined(TUP_DCD_ENDPOINT_MAX) #warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8" #define TUP_DCD_ENDPOINT_MAX 8 #endif diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c index 39afb7505..053169bf2 100644 --- a/src/portable/analog/max3421/hcd_max3421.c +++ b/src/portable/analog/max3421/hcd_max3421.c @@ -484,8 +484,8 @@ bool hcd_init(uint8_t rhport) { // v1 is 0x01, v2 is 0x12, v3 is 0x13 uint8_t const revision = reg_read(rhport, REVISION_ADDR, false); - TU_ASSERT(revision == 0x01 || revision == 0x12 || revision == 0x13, false); TU_LOG2_HEX(revision); + TU_ASSERT(revision == 0x01 || revision == 0x12 || revision == 0x13, false); // reset reg_write(rhport, USBCTL_ADDR, USBCTL_CHIPRES, false); diff --git a/src/tusb_option.h b/src/tusb_option.h index cbcb69edd..25412d432 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -119,6 +119,8 @@ // Espressif #define OPT_MCU_ESP32S2 900 ///< Espressif ESP32-S2 #define OPT_MCU_ESP32S3 901 ///< Espressif ESP32-S3 +#define OPT_MCU_ESP32 902 ///< Espressif ESP32 (for host max3421e) +#define TUP_MCU_ESPRESSIF (CFG_TUSB_MCU >= 900 && CFG_TUSB_MCU < 1000) // check if Espressif MCU // Dialog #define OPT_MCU_DA1469X 1000 ///< Dialog Semiconductor DA1469x -- cgit v1.3.1 From 03ccc8d8dfe21fc158fc5eb8a4f3f90f425f8a3b Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 25 Apr 2024 20:41:44 +0700 Subject: revert a change in tusb_mcu --- src/common/tusb_mcu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/common') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 2c4d7461d..00526bdba 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -429,7 +429,7 @@ #define TUP_MCU_MULTIPLE_CORE 0 #endif -#if CFG_TUD_ENABLED && !defined(TUP_DCD_ENDPOINT_MAX) +#if !defined(TUP_DCD_ENDPOINT_MAX) #warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8" #define TUP_DCD_ENDPOINT_MAX 8 #endif -- cgit v1.3.1 From 223ce56625474764dc00229c44731858abcf4f29 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 26 Apr 2024 00:10:57 +0700 Subject: - add esp32 c3, c6 mcu option - skip breakpoint for espressif riscv --- examples/host/cdc_msc_hid_freertos/src/main.c | 5 ++++- src/common/tusb_mcu.h | 4 ++-- src/common/tusb_verify.h | 2 +- src/portable/analog/max3421/hcd_max3421.c | 2 ++ src/tusb_option.h | 2 ++ 5 files changed, 11 insertions(+), 4 deletions(-) (limited to 'src/common') diff --git a/examples/host/cdc_msc_hid_freertos/src/main.c b/examples/host/cdc_msc_hid_freertos/src/main.c index a6cb4d460..fa799aede 100644 --- a/examples/host/cdc_msc_hid_freertos/src/main.c +++ b/examples/host/cdc_msc_hid_freertos/src/main.c @@ -126,7 +126,10 @@ static void usb_host_task(void *param) { (void) param; // init host stack on configured roothub port - tuh_init(BOARD_TUH_RHPORT); + if (!tuh_init(BOARD_TUH_RHPORT)) { + printf("Failed to init USB Host Stack\r\n"); + vTaskSuspend(NULL); + } if (board_init_after_tusb) { board_init_after_tusb(); diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 00526bdba..5a567f2d5 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -429,8 +429,8 @@ #define TUP_MCU_MULTIPLE_CORE 0 #endif -#if !defined(TUP_DCD_ENDPOINT_MAX) - #warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8" +#if !defined(TUP_DCD_ENDPOINT_MAX) && defined(CFG_TUD_ENABLED) && CFG_TUD_ENABLED +#warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8" #define TUP_DCD_ENDPOINT_MAX 8 #endif diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index 71406dacf..0a9549c99 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -84,7 +84,7 @@ if ( (*ARM_CM_DHCSR) & 1UL ) __asm("BKPT #0\n"); /* Only halt mcu if debugger is attached */ \ } while(0) -#elif defined(__riscv) +#elif defined(__riscv) && !TUP_MCU_ESPRESSIF #define TU_BREAKPOINT() do { __asm("ebreak\n"); } while(0) #elif defined(_mips) diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c index 053169bf2..4dc93d2d8 100644 --- a/src/portable/analog/max3421/hcd_max3421.c +++ b/src/portable/analog/max3421/hcd_max3421.c @@ -479,6 +479,8 @@ bool hcd_init(uint8_t rhport) { _hcd_data.spi_mutex = osal_mutex_create(&_hcd_data.spi_mutexdef); #endif + // NOTE: driver does not seem to work without nRST pin signal + // full duplex, interrupt negative edge reg_write(rhport, PINCTL_ADDR, _tuh_cfg.pinctl | PINCTL_FDUPSPI, false); diff --git a/src/tusb_option.h b/src/tusb_option.h index 25412d432..3ead20ee7 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -120,6 +120,8 @@ #define OPT_MCU_ESP32S2 900 ///< Espressif ESP32-S2 #define OPT_MCU_ESP32S3 901 ///< Espressif ESP32-S3 #define OPT_MCU_ESP32 902 ///< Espressif ESP32 (for host max3421e) +#define OPT_MCU_ESP32C3 903 ///< Espressif ESP32-C3 +#define OPT_MCU_ESP32C6 904 ///< Espressif ESP32-C6 #define TUP_MCU_ESPRESSIF (CFG_TUSB_MCU >= 900 && CFG_TUSB_MCU < 1000) // check if Espressif MCU // Dialog -- cgit v1.3.1 From c303b5d81d3dd9d5dc9f831af704e6d40366d7cf Mon Sep 17 00:00:00 2001 From: HiFiPhile Date: Mon, 29 Apr 2024 22:35:55 +0200 Subject: Guard const addr fifo functions with TUP_MEM_CONST_ADDR. --- src/common/tusb_fifo.c | 31 +++++++++++++++++++++++++++++-- src/common/tusb_fifo.h | 4 ++++ src/common/tusb_mcu.h | 4 ++++ 3 files changed, 37 insertions(+), 2 deletions(-) (limited to 'src/common') diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 76696396b..8a0fd4417 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -62,7 +62,9 @@ TU_ATTR_ALWAYS_INLINE static inline void _ff_unlock(osal_mutex_t mutex) typedef enum { TU_FIFO_COPY_INC, ///< Copy from/to an increasing source/destination address - default mode +#ifdef TUP_MEM_CONST_ADDR TU_FIFO_COPY_CST_FULL_WORDS, ///< Copy from/to a constant source/destination address - required for e.g. STM32 to write into USB hardware FIFO +#endif } tu_fifo_copy_mode_t; bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_size, bool overwritable) @@ -92,6 +94,7 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si // Pull & Push //--------------------------------------------------------------------+ +#ifdef TUP_MEM_CONST_ADDR // Intended to be used to read from hardware USB FIFO in e.g. STM32 where all data is read from a constant address // Code adapted from dcd_synopsys.c // TODO generalize with configurable 1 byte or 4 byte each read @@ -140,6 +143,7 @@ static void _ff_pull_const_addr(void * app_buf, const uint8_t * ff_buf, uint16_t *reg_tx = tmp32; } } +#endif // send one item to fifo WITHOUT updating write pointer static inline void _ff_push(tu_fifo_t* f, void const * app_buf, uint16_t rel) @@ -179,7 +183,7 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t memcpy(f->buffer, ((uint8_t const*) app_buf) + lin_bytes, wrap_bytes); } break; - +#ifdef TUP_MEM_CONST_ADDR case TU_FIFO_COPY_CST_FULL_WORDS: // Intended for hardware buffers from which it can be read word by word only if(n <= lin_count) @@ -224,6 +228,7 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t if (wrap_bytes > 0) _ff_push_const_addr(ff_buf, app_buf, wrap_bytes); } break; +#endif default: break; } } @@ -265,7 +270,7 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rd_ptr, memcpy((uint8_t*) app_buf + lin_bytes, f->buffer, wrap_bytes); } break; - +#ifdef TUP_MEM_CONST_ADDR case TU_FIFO_COPY_CST_FULL_WORDS: if ( n <= lin_count ) { @@ -310,6 +315,7 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rd_ptr, // Read data wrapped part if (wrap_bytes > 0) _ff_pull_const_addr(app_buf, ff_buf, wrap_bytes); } +#endif break; default: break; @@ -727,10 +733,29 @@ uint16_t tu_fifo_read_n(tu_fifo_t* f, void * buffer, uint16_t n) return _tu_fifo_read_n(f, buffer, n, TU_FIFO_COPY_INC); } +#ifdef TUP_MEM_CONST_ADDR +/******************************************************************************/ +/*! + @brief This function will read n elements from the array index specified by + the read pointer and increment the read index. + This function checks for an overflow and corrects read pointer if required. + The dest address will not be incremented which is useful for writing to registers. + + @param[in] f + Pointer to the FIFO buffer to manipulate + @param[in] buffer + The pointer to data location + @param[in] n + Number of element that buffer can afford + + @returns number of items read from the FIFO + */ +/******************************************************************************/ uint16_t tu_fifo_read_n_const_addr_full_words(tu_fifo_t* f, void * buffer, uint16_t n) { return _tu_fifo_read_n(f, buffer, n, TU_FIFO_COPY_CST_FULL_WORDS); } +#endif /******************************************************************************/ /*! @@ -839,6 +864,7 @@ uint16_t tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n) return _tu_fifo_write_n(f, data, n, TU_FIFO_COPY_INC); } +#ifdef TUP_MEM_CONST_ADDR /******************************************************************************/ /*! @brief This function will write n elements into the array index specified by @@ -858,6 +884,7 @@ uint16_t tu_fifo_write_n_const_addr_full_words(tu_fifo_t* f, const void * data, { return _tu_fifo_write_n(f, data, n, TU_FIFO_COPY_CST_FULL_WORDS); } +#endif /******************************************************************************/ /*! diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h index 2d9f5e667..e50d9afd4 100644 --- a/src/common/tusb_fifo.h +++ b/src/common/tusb_fifo.h @@ -156,11 +156,15 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si bool tu_fifo_write (tu_fifo_t* f, void const * p_data); uint16_t tu_fifo_write_n (tu_fifo_t* f, void const * p_data, uint16_t n); +#ifdef TUP_MEM_CONST_ADDR uint16_t tu_fifo_write_n_const_addr_full_words (tu_fifo_t* f, const void * data, uint16_t n); +#endif bool tu_fifo_read (tu_fifo_t* f, void * p_buffer); uint16_t tu_fifo_read_n (tu_fifo_t* f, void * p_buffer, uint16_t n); +#ifdef TUP_MEM_CONST_ADDR uint16_t tu_fifo_read_n_const_addr_full_words (tu_fifo_t* f, void * buffer, uint16_t n); +#endif bool tu_fifo_peek (tu_fifo_t* f, void * p_buffer); uint16_t tu_fifo_peek_n (tu_fifo_t* f, void * p_buffer, uint16_t n); diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 5a567f2d5..c69bc9995 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -448,4 +448,8 @@ #define TUP_DCD_EDPT_ISO_ALLOC #endif +#if defined(TUP_USBIP_DWC2) + #define TUP_MEM_CONST_ADDR +#endif + #endif -- cgit v1.3.1 From ea3f1d39e8bfc82facc7b3e503d7c71f9119de2b Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 2 May 2024 13:29:29 +0700 Subject: add cmake for pi zero (renamed from pi zero_w), build but the flash size seem wrong (only 24 bytes for text) --- .clang-format | 6 -- examples/build_system/cmake/cpu/arm1176jzf-s.cmake | 19 ++++ examples/build_system/make/cpu/arm1176.mk | 9 -- examples/build_system/make/cpu/arm1176jzf-s.mk | 9 ++ .../boards/raspberrypi_zero/board.cmake | 8 ++ .../broadcom_32bit/boards/raspberrypi_zero/board.h | 38 ++++++++ .../boards/raspberrypi_zero/board.mk | 5 + .../boards/raspberrypi_zero_w/board.h | 38 -------- .../boards/raspberrypi_zero_w/board.mk | 5 - hw/bsp/broadcom_32bit/family.c | 11 +++ hw/bsp/broadcom_32bit/family.cmake | 107 +++++++++++++++++++++ hw/bsp/broadcom_32bit/family.mk | 5 +- src/common/tusb_fifo.h | 12 +-- src/common/tusb_mcu.h | 2 +- src/common/tusb_verify.h | 3 +- 15 files changed, 206 insertions(+), 71 deletions(-) delete mode 100644 .clang-format create mode 100644 examples/build_system/cmake/cpu/arm1176jzf-s.cmake delete mode 100644 examples/build_system/make/cpu/arm1176.mk create mode 100644 examples/build_system/make/cpu/arm1176jzf-s.mk create mode 100644 hw/bsp/broadcom_32bit/boards/raspberrypi_zero/board.cmake create mode 100644 hw/bsp/broadcom_32bit/boards/raspberrypi_zero/board.h create mode 100644 hw/bsp/broadcom_32bit/boards/raspberrypi_zero/board.mk delete mode 100644 hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h delete mode 100644 hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk create mode 100644 hw/bsp/broadcom_32bit/family.cmake (limited to 'src/common') diff --git a/.clang-format b/.clang-format deleted file mode 100644 index 4369c29fe..000000000 --- a/.clang-format +++ /dev/null @@ -1,6 +0,0 @@ ---- -BreakBeforeBraces: Linux -ColumnLimit: '200' -ReflowComments: 'true' - -... diff --git a/examples/build_system/cmake/cpu/arm1176jzf-s.cmake b/examples/build_system/cmake/cpu/arm1176jzf-s.cmake new file mode 100644 index 000000000..11bb52f30 --- /dev/null +++ b/examples/build_system/cmake/cpu/arm1176jzf-s.cmake @@ -0,0 +1,19 @@ +if (TOOLCHAIN STREQUAL "gcc") + set(TOOLCHAIN_COMMON_FLAGS + -mcpu=arm1176jzf-s + ) + # set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "") + +elseif (TOOLCHAIN STREQUAL "clang") + set(TOOLCHAIN_COMMON_FLAGS + --target=arm-none-eabi + -mcpu=arm1176jzf-s + -mfpu=none + -mfloat-abi=soft + ) + #set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "") + +elseif (TOOLCHAIN STREQUAL "iar") + message(FATAL_ERROR "IAR not supported") + +endif () diff --git a/examples/build_system/make/cpu/arm1176.mk b/examples/build_system/make/cpu/arm1176.mk deleted file mode 100644 index 022ccf7ad..000000000 --- a/examples/build_system/make/cpu/arm1176.mk +++ /dev/null @@ -1,9 +0,0 @@ -ifeq ($(TOOLCHAIN),gcc) - CFLAGS += \ - -mcpu=arm1176jzf-s \ - -else ifeq ($(TOOLCHAIN),iar) - #CFLAGS += --cpu cortex-a53 - #ASFLAGS += --cpu cortex-a53 - -endif diff --git a/examples/build_system/make/cpu/arm1176jzf-s.mk b/examples/build_system/make/cpu/arm1176jzf-s.mk new file mode 100644 index 000000000..022ccf7ad --- /dev/null +++ b/examples/build_system/make/cpu/arm1176jzf-s.mk @@ -0,0 +1,9 @@ +ifeq ($(TOOLCHAIN),gcc) + CFLAGS += \ + -mcpu=arm1176jzf-s \ + +else ifeq ($(TOOLCHAIN),iar) + #CFLAGS += --cpu cortex-a53 + #ASFLAGS += --cpu cortex-a53 + +endif diff --git a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero/board.cmake b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero/board.cmake new file mode 100644 index 000000000..2b8cc19e0 --- /dev/null +++ b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero/board.cmake @@ -0,0 +1,8 @@ +set(CMAKE_SYSTEM_PROCESSOR arm1176jzf-s CACHE INTERNAL "System Processor") +#set(SUFFIX "") + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + BCM_VERSION=2835 + ) +endfunction() diff --git a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero/board.h b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero/board.h new file mode 100644 index 000000000..84a106346 --- /dev/null +++ b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero/board.h @@ -0,0 +1,38 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +#ifdef __cplusplus + } +#endif + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero/board.mk b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero/board.mk new file mode 100644 index 000000000..7a248ed24 --- /dev/null +++ b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero/board.mk @@ -0,0 +1,5 @@ +CPU_CORE = arm1176jzf-s +CFLAGS += -DBCM_VERSION=2835 \ + -DCFG_TUSB_MCU=OPT_MCU_BCM2835 + +SUFFIX = diff --git a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h deleted file mode 100644 index 84a106346..000000000 --- a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2020, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef BOARD_H_ -#define BOARD_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -#ifdef __cplusplus - } -#endif - -#endif /* BOARD_H_ */ diff --git a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk deleted file mode 100644 index 052033230..000000000 --- a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -CPU_CORE = arm1176 -CFLAGS += -DBCM_VERSION=2835 \ - -DCFG_TUSB_MCU=OPT_MCU_BCM2835 - -SUFFIX = diff --git a/hw/bsp/broadcom_32bit/family.c b/hw/bsp/broadcom_32bit/family.c index 664b4dcaf..626565e34 100644 --- a/hw/bsp/broadcom_32bit/family.c +++ b/hw/bsp/broadcom_32bit/family.c @@ -27,6 +27,13 @@ #include "bsp/board_api.h" #include "board.h" +// Suppress warning caused by mcu driver +#ifdef __GNUC__ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wcast-qual" +#pragma GCC diagnostic ignored "-Wredundant-decls" +#endif + #include "broadcom/cpu.h" #include "broadcom/gpio.h" #include "broadcom/interrupts.h" @@ -34,6 +41,10 @@ #include "broadcom/caches.h" #include "broadcom/vcmailbox.h" +#ifdef __GNUC__ +#pragma GCC diagnostic pop +#endif + // LED #define LED_PIN 18 #define LED_STATE_ON 1 diff --git a/hw/bsp/broadcom_32bit/family.cmake b/hw/bsp/broadcom_32bit/family.cmake new file mode 100644 index 000000000..223c85e48 --- /dev/null +++ b/hw/bsp/broadcom_32bit/family.cmake @@ -0,0 +1,107 @@ +include_guard() + +set(MCU_DIR ${TOP}/hw/mcu/broadcom) + +# include board specific +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) + +# toolchain set up +set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake) + +set(FAMILY_MCUS BCM2835 CACHE INTERNAL "") + + +#------------------------------------ +# BOARD_TARGET +#------------------------------------ +# only need to be built ONCE for all examples +function(add_board_target BOARD_TARGET) + if (TARGET ${BOARD_TARGET}) + return() + endif () + + if (NOT DEFINED LD_FILE_GNU) + set(LD_FILE_GNU ${MCU_DIR}/broadcom/link.ld) + endif () + set(LD_FILE_Clang ${LD_FILE_GNU}) + + if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID}) + set(STARTUP_FILE_GNU ${MCU_DIR}/broadcom/boot.s) + endif () + set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU}) + + add_library(${BOARD_TARGET} STATIC + ${MCU_DIR}/broadcom/gen/interrupt_handlers.c + ${MCU_DIR}/broadcom/gpio.c + ${MCU_DIR}/broadcom/interrupts.c + ${MCU_DIR}/broadcom/mmu.c + ${MCU_DIR}/broadcom/caches.c + ${MCU_DIR}/broadcom/vcmailbox.c + ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} + ) + target_compile_options(${BOARD_TARGET} PUBLIC + -O0 + -ffreestanding + -mgeneral-regs-only + -fno-exceptions + -std=c17 + ) + target_include_directories(${BOARD_TARGET} PUBLIC + ${MCU_DIR} + ) + + update_board(${BOARD_TARGET}) + + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--script=${LD_FILE_GNU}" + -nostdlib -nostartfiles + ) + elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--script=${LD_FILE_Clang}" + ) + elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--config=${LD_FILE_IAR}" + ) + endif () +endfunction() + + +#------------------------------------ +# Functions +#------------------------------------ +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) + + # Board target + add_board_target(board_${BOARD}) + + #---------- Port Specific ---------- + # These files are built for each example since it depends on example's tusb_config.h + target_sources(${TARGET} PUBLIC + # BSP + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c + ) + target_include_directories(${TARGET} PUBLIC + # family, hw, board + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} + ) + + # Add TinyUSB target and port source + family_add_tinyusb(${TARGET} OPT_MCU_BCM2835 ${RTOS}) + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) + + # Link dependencies + target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) + + # Flashing + family_flash_jlink(${TARGET}) +endfunction() diff --git a/hw/bsp/broadcom_32bit/family.mk b/hw/bsp/broadcom_32bit/family.mk index cf68e21ee..e15bd93f7 100644 --- a/hw/bsp/broadcom_32bit/family.mk +++ b/hw/bsp/broadcom_32bit/family.mk @@ -1,5 +1,4 @@ MCU_DIR = hw/mcu/broadcom -DEPS_SUBMODULES += $(MCU_DIR) include $(TOP)/$(BOARD_PATH)/board.mk @@ -27,15 +26,13 @@ SRC_C += \ $(MCU_DIR)/broadcom/caches.c \ $(MCU_DIR)/broadcom/vcmailbox.c -SKIP_NANOLIB = 1 - LD_FILE = $(MCU_DIR)/broadcom/link$(SUFFIX).ld INC += \ $(TOP)/$(BOARD_PATH) \ $(TOP)/$(MCU_DIR) -SRC_S += $(MCU_DIR)/broadcom/boot$(SUFFIX).S +SRC_S += $(MCU_DIR)/broadcom/boot$(SUFFIX).s $(BUILD)/kernel$(SUFFIX).img: $(BUILD)/$(PROJECT).elf $(OBJCOPY) -O binary $^ $@ diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h index 2d9f5e667..0de576601 100644 --- a/src/common/tusb_fifo.h +++ b/src/common/tusb_fifo.h @@ -145,13 +145,13 @@ bool tu_fifo_clear(tu_fifo_t *f); bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_size, bool overwritable); #if OSAL_MUTEX_REQUIRED - TU_ATTR_ALWAYS_INLINE static inline - void tu_fifo_config_mutex(tu_fifo_t *f, osal_mutex_t wr_mutex, osal_mutex_t rd_mutex) { - f->mutex_wr = wr_mutex; - f->mutex_rd = rd_mutex; - } +TU_ATTR_ALWAYS_INLINE static inline +void tu_fifo_config_mutex(tu_fifo_t *f, osal_mutex_t wr_mutex, osal_mutex_t rd_mutex) { + f->mutex_wr = wr_mutex; + f->mutex_rd = rd_mutex; +} #else - #define tu_fifo_config_mutex(_f, _wr_mutex, _rd_mutex) +#define tu_fifo_config_mutex(_f, _wr_mutex, _rd_mutex) #endif bool tu_fifo_write (tu_fifo_t* f, void const * p_data); diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 5a567f2d5..8d58be2a1 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -430,7 +430,7 @@ #endif #if !defined(TUP_DCD_ENDPOINT_MAX) && defined(CFG_TUD_ENABLED) && CFG_TUD_ENABLED -#warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8" + #warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8" #define TUP_DCD_ENDPOINT_MAX 8 #endif diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index 0a9549c99..dde0550d3 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -78,8 +78,7 @@ // Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33. M55 #if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) || \ defined(__ARM7M__) || defined (__ARM7EM__) || defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__) - #define TU_BREAKPOINT() do \ - { \ + #define TU_BREAKPOINT() do { \ volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ if ( (*ARM_CM_DHCSR) & 1UL ) __asm("BKPT #0\n"); /* Only halt mcu if debugger is attached */ \ } while(0) -- cgit v1.3.1