From 34aded88edd5b1403bb35b531985953502a0faab Mon Sep 17 00:00:00 2001
From: Fan DANG <i@dang.fan>
Date: Mon, 13 Apr 2026 08:56:36 +0800
Subject: fix(device): big-endian host support for SETUP packet handling

1. Add TU_LITTLE_ENDIAN_BITFIELD / TU_BIG_ENDIAN_BITFIELD macros in
tusb_compiler.h (GCC and IAR), following Linux kernel style.

2. Update bmAttributes (tusb_desc_endpoint_t) and bmRequestType_bit
(tusb_control_request_t) in tusb_types.h to use these macros with explicit
#error fallback if undefined.

3. Add tu_le16toh() conversion in dcd_event_setup_received() for
wValue/wIndex/wLength.

Tested on CIU98320B (big-endian ARM Cortex-M, full-speed HID keyboard).
---
 src/common/tusb_compiler.h |  4 ++++
 src/common/tusb_types.h    | 17 +++++++++++++++++
 2 files changed, 21 insertions(+)

(limited to 'src/common')

diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index f20834cea..e66bcc5ea 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -167,8 +167,10 @@
 // For TI ARM compiler, __BYTE_ORDER__ is not defined for MSP430 but still LE
   #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ || defined(__MSP430__)
     #define TU_BYTE_ORDER TU_LITTLE_ENDIAN
+    #define TU_LITTLE_ENDIAN_BITFIELD
   #else
     #define TU_BYTE_ORDER TU_BIG_ENDIAN
+    #define TU_BIG_ENDIAN_BITFIELD
   #endif
 
   // Unfortunately XC16 doesn't provide builtins for 32bit endian conversion
@@ -212,8 +214,10 @@
   // Endian conversion use well-known host to network (big endian) naming
   #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
     #define TU_BYTE_ORDER TU_LITTLE_ENDIAN
+    #define TU_LITTLE_ENDIAN_BITFIELD
   #else
     #define TU_BYTE_ORDER TU_BIG_ENDIAN
+    #define TU_BIG_ENDIAN_BITFIELD
   #endif
 
   #define TU_BSWAP16(u16) (__iar_builtin_REV16(u16))
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index a18f9feb7..b02e90eae 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -409,10 +409,19 @@ typedef struct TU_ATTR_PACKED {
   uint8_t  bEndpointAddress ; // The address of the endpoint
 
   struct TU_ATTR_PACKED {
+#if defined(TU_LITTLE_ENDIAN_BITFIELD)
     uint8_t xfer  : 2;        // Control, ISO, Bulk, Interrupt
     uint8_t sync  : 2;        // None, Asynchronous, Adaptive, Synchronous
     uint8_t usage : 2;        // Data, Feedback, Implicit feedback
     uint8_t       : 2;
+#elif defined(TU_BIG_ENDIAN_BITFIELD)
+    uint8_t       : 2;
+    uint8_t usage : 2;
+    uint8_t sync  : 2;
+    uint8_t xfer  : 2;
+#else
+  #error "Please define TU_LITTLE_ENDIAN_BITFIELD or TU_BIG_ENDIAN_BITFIELD"
+#endif
   } bmAttributes;
 
   uint16_t wMaxPacketSize   ; // Bit 10..0 : max packet size, bit 12..11 additional transaction per highspeed micro-frame
@@ -522,9 +531,17 @@ typedef struct TU_ATTR_PACKED {
 typedef struct TU_ATTR_PACKED {
   union {
     struct TU_ATTR_PACKED {
+#if defined(TU_LITTLE_ENDIAN_BITFIELD)
       uint8_t recipient :  5; ///< Recipient type tusb_request_recipient_t.
       uint8_t type      :  2; ///< Request type tusb_request_type_t.
       uint8_t direction :  1; ///< Direction type. tusb_dir_t
+#elif defined(TU_BIG_ENDIAN_BITFIELD)
+      uint8_t direction :  1; ///< Direction type. tusb_dir_t
+      uint8_t type      :  2; ///< Request type tusb_request_type_t.
+      uint8_t recipient :  5; ///< Recipient type tusb_request_recipient_t.
+#else
+  #error "Please define TU_LITTLE_ENDIAN_BITFIELD or TU_BIG_ENDIAN_BITFIELD"
+#endif
     } bmRequestType_bit;
 
     uint8_t bmRequestType;
-- 
cgit v1.3.1


From ce9864a0bcad0b22b1494466b7ef379e1b688319 Mon Sep 17 00:00:00 2001
From: Fan DANG <i@dang.fan>
Date: Mon, 13 Apr 2026 10:14:20 +0800
Subject: introduce two more macros to follow tinyusb's style

---
 src/common/tusb_compiler.h | 11 +++++++----
 src/common/tusb_types.h    | 12 ++++++------
 2 files changed, 13 insertions(+), 10 deletions(-)

(limited to 'src/common')

diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index e66bcc5ea..4ed14dcfb 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -66,6 +66,9 @@
 #define TU_LITTLE_ENDIAN (0x12u)
 #define TU_BIG_ENDIAN (0x21u)
 
+#define TU_BITFIELD_LE (0x34u)
+#define TU_BITFIELD_BE (0x43u)
+
 /*------------------------------------------------------------------*/
 /* Count number of arguments of __VA_ARGS__
  * - reference www.stackoverflow.com/questions/2124339/c-preprocessor-va-args-number-of-arguments
@@ -167,10 +170,10 @@
 // For TI ARM compiler, __BYTE_ORDER__ is not defined for MSP430 but still LE
   #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ || defined(__MSP430__)
     #define TU_BYTE_ORDER TU_LITTLE_ENDIAN
-    #define TU_LITTLE_ENDIAN_BITFIELD
+    #define TU_BITFIELD_ORDER TU_BITFIELD_LE
   #else
     #define TU_BYTE_ORDER TU_BIG_ENDIAN
-    #define TU_BIG_ENDIAN_BITFIELD
+    #define TU_BITFIELD_ORDER TU_BITFIELD_BE
   #endif
 
   // Unfortunately XC16 doesn't provide builtins for 32bit endian conversion
@@ -214,10 +217,10 @@
   // Endian conversion use well-known host to network (big endian) naming
   #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
     #define TU_BYTE_ORDER TU_LITTLE_ENDIAN
-    #define TU_LITTLE_ENDIAN_BITFIELD
+    #define TU_BITFIELD_ORDER TU_BITFIELD_LE
   #else
     #define TU_BYTE_ORDER TU_BIG_ENDIAN
-    #define TU_BIG_ENDIAN_BITFIELD
+    #define TU_BITFIELD_ORDER TU_BITFIELD_BE
   #endif
 
   #define TU_BSWAP16(u16) (__iar_builtin_REV16(u16))
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index b02e90eae..70c73b27d 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -409,18 +409,18 @@ typedef struct TU_ATTR_PACKED {
   uint8_t  bEndpointAddress ; // The address of the endpoint
 
   struct TU_ATTR_PACKED {
-#if defined(TU_LITTLE_ENDIAN_BITFIELD)
+#if (TU_BITFIELD_ORDER == TU_BITFIELD_LE)
     uint8_t xfer  : 2;        // Control, ISO, Bulk, Interrupt
     uint8_t sync  : 2;        // None, Asynchronous, Adaptive, Synchronous
     uint8_t usage : 2;        // Data, Feedback, Implicit feedback
     uint8_t       : 2;
-#elif defined(TU_BIG_ENDIAN_BITFIELD)
+#elif (TU_BITFIELD_ORDER == TU_BITFIELD_BE)
     uint8_t       : 2;
     uint8_t usage : 2;
     uint8_t sync  : 2;
     uint8_t xfer  : 2;
 #else
-  #error "Please define TU_LITTLE_ENDIAN_BITFIELD or TU_BIG_ENDIAN_BITFIELD"
+  #error "Please define TU_BITFIELD_ORDER as TU_BITFIELD_LE or TU_BITFIELD_BE"
 #endif
   } bmAttributes;
 
@@ -531,16 +531,16 @@ typedef struct TU_ATTR_PACKED {
 typedef struct TU_ATTR_PACKED {
   union {
     struct TU_ATTR_PACKED {
-#if defined(TU_LITTLE_ENDIAN_BITFIELD)
+#if (TU_BITFIELD_ORDER == TU_BITFIELD_LE)
       uint8_t recipient :  5; ///< Recipient type tusb_request_recipient_t.
       uint8_t type      :  2; ///< Request type tusb_request_type_t.
       uint8_t direction :  1; ///< Direction type. tusb_dir_t
-#elif defined(TU_BIG_ENDIAN_BITFIELD)
+#elif (TU_BITFIELD_ORDER == TU_BITFIELD_BE)
       uint8_t direction :  1; ///< Direction type. tusb_dir_t
       uint8_t type      :  2; ///< Request type tusb_request_type_t.
       uint8_t recipient :  5; ///< Recipient type tusb_request_recipient_t.
 #else
-  #error "Please define TU_LITTLE_ENDIAN_BITFIELD or TU_BIG_ENDIAN_BITFIELD"
+  #error "Please define TU_BITFIELD_ORDER as TU_BITFIELD_LE or TU_BITFIELD_BE"
 #endif
     } bmRequestType_bit;
 
-- 
cgit v1.3.1


From 5939831f17272571911d089508b458f496a4cc62 Mon Sep 17 00:00:00 2001
From: Fan DANG <i@dang.fan>
Date: Fri, 17 Apr 2026 18:39:56 +0800
Subject: remove duplicated tu_le16toh since we have converted the endian when
 setup.

---
 examples/device/audio_test_multi_rate/src/main.c | 2 +-
 examples/device/cdc_uac2/src/uac2_app.c          | 8 ++++----
 examples/device/uac2_headset/src/main.c          | 8 ++++----
 examples/device/uac2_speaker_fb/src/main.c       | 8 ++++----
 src/class/mtp/mtp_device.c                       | 2 +-
 src/common/tusb_compiler.h                       | 2 ++
 src/device/usbd.c                                | 2 +-
 7 files changed, 17 insertions(+), 15 deletions(-)

(limited to 'src/common')

diff --git a/examples/device/audio_test_multi_rate/src/main.c b/examples/device/audio_test_multi_rate/src/main.c
index 952176997..a86beb415 100644
--- a/examples/device/audio_test_multi_rate/src/main.c
+++ b/examples/device/audio_test_multi_rate/src/main.c
@@ -532,7 +532,7 @@ static bool audio20_get_req_entity(uint8_t rhport, tusb_control_request_t const
 bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const *p_request) {
   (void) rhport;
   //uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex));
-  uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue));
+  uint8_t const alt = tu_u16_low(p_request->wValue);
 
   // Clear buffer when streaming format is changed
   if (alt != 0) {
diff --git a/examples/device/cdc_uac2/src/uac2_app.c b/examples/device/cdc_uac2/src/uac2_app.c
index 7760c402b..6e9d1d9e3 100644
--- a/examples/device/cdc_uac2/src/uac2_app.c
+++ b/examples/device/cdc_uac2/src/uac2_app.c
@@ -263,8 +263,8 @@ bool tud_audio_set_itf_close_ep_cb(uint8_t rhport, tusb_control_request_t const
 {
   (void)rhport;
 
-  uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex));
-  uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue));
+  uint8_t const itf = tu_u16_low(p_request->wIndex);
+  uint8_t const alt = tu_u16_low(p_request->wValue);
 
   if (ITF_NUM_AUDIO_STREAMING_SPK == itf && alt == 0) {
     // Audio streaming stop
@@ -277,8 +277,8 @@ bool tud_audio_set_itf_close_ep_cb(uint8_t rhport, tusb_control_request_t const
 bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request)
 {
   (void)rhport;
-  uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex));
-  uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue));
+  uint8_t const itf = tu_u16_low(p_request->wIndex);
+  uint8_t const alt = tu_u16_low(p_request->wValue);
 
   TU_LOG2("Set interface %d alt %d\r\n", itf, alt);
   if (ITF_NUM_AUDIO_STREAMING_SPK == itf && alt != 0) {
diff --git a/examples/device/uac2_headset/src/main.c b/examples/device/uac2_headset/src/main.c
index 0ea63d8f7..779e927bc 100644
--- a/examples/device/uac2_headset/src/main.c
+++ b/examples/device/uac2_headset/src/main.c
@@ -522,8 +522,8 @@ bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const *p
 bool tud_audio_set_itf_close_ep_cb(uint8_t rhport, tusb_control_request_t const *p_request) {
   (void) rhport;
 
-  uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex));
-  uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue));
+  uint8_t const itf = tu_u16_low(p_request->wIndex);
+  uint8_t const alt = tu_u16_low(p_request->wValue);
 
   if (ITF_NUM_AUDIO_STREAMING_SPK == itf && alt == 0) {
     blink_interval_ms = BLINK_MOUNTED;
@@ -534,8 +534,8 @@ bool tud_audio_set_itf_close_ep_cb(uint8_t rhport, tusb_control_request_t const
 
 bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const *p_request) {
   (void) rhport;
-  uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex));
-  uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue));
+  uint8_t const itf = tu_u16_low(p_request->wIndex);
+  uint8_t const alt = tu_u16_low(p_request->wValue);
 
   TU_LOG2("Set interface %d alt %d\r\n", itf, alt);
   if (ITF_NUM_AUDIO_STREAMING_SPK == itf && alt != 0) {
diff --git a/examples/device/uac2_speaker_fb/src/main.c b/examples/device/uac2_speaker_fb/src/main.c
index c3e97bb28..402642162 100644
--- a/examples/device/uac2_speaker_fb/src/main.c
+++ b/examples/device/uac2_speaker_fb/src/main.c
@@ -457,8 +457,8 @@ static bool audio20_set_req_entity(tusb_control_request_t const *p_request, uint
 
 bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const *p_request) {
   (void) rhport;
-  uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex));
-  uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue));
+  uint8_t const itf = tu_u16_low(p_request->wIndex);
+  uint8_t const alt = tu_u16_low(p_request->wValue);
 
   TU_LOG2("Set interface %d alt %d\r\n", itf, alt);
   if (ITF_NUM_AUDIO_STREAMING == itf && alt != 0)
@@ -531,8 +531,8 @@ bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const *p
 bool tud_audio_set_itf_close_ep_cb(uint8_t rhport, tusb_control_request_t const *p_request) {
   (void) rhport;
 
-  uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex));
-  uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue));
+  uint8_t const itf = tu_u16_low(p_request->wIndex);
+  uint8_t const alt = tu_u16_low(p_request->wValue);
 
   if (ITF_NUM_AUDIO_STREAMING == itf && alt == 0) {
     blink_interval_ms = BLINK_MOUNTED;
diff --git a/src/class/mtp/mtp_device.c b/src/class/mtp/mtp_device.c
index 59096e476..0da984f4a 100644
--- a/src/class/mtp/mtp_device.c
+++ b/src/class/mtp/mtp_device.c
@@ -321,7 +321,7 @@ bool mtpd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
     .session_id = p_mtp->session_id,
     .request = request,
     .buf = p_mtp->control_buf,
-    .bufsize = tu_le16toh(request->wLength),
+    .bufsize = request->wLength,
   };
 
   switch (request->bRequest) {
diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index 4ed14dcfb..a8971c3df 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -246,8 +246,10 @@
   // Endian conversion use well-known host to network (big endian) naming
   #if defined(__LIT)
     #define TU_BYTE_ORDER TU_LITTLE_ENDIAN
+    #define TU_BITFIELD_ORDER TU_BITFIELD_LE
   #else
     #define TU_BYTE_ORDER TU_BIG_ENDIAN
+    #define TU_BITFIELD_ORDER TU_BITFIELD_BE
   #endif
 
   #define TU_BSWAP16(u16) ((unsigned short)_builtin_revw((unsigned long)u16))
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 3c14175f6..da0ffb4c6 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -1212,7 +1212,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
       TU_LOG_USBD(" String[%u]\r\n", desc_index);
 
       // String Descriptor always uses the desc set from user
-      uint8_t const* desc_str = (uint8_t const*) tud_descriptor_string_cb(desc_index, tu_le16toh(p_request->wIndex));
+      uint8_t const* desc_str = (uint8_t const*) tud_descriptor_string_cb(desc_index, p_request->wIndex);
       TU_VERIFY(desc_str);
 
       // first byte of descriptor is its size
-- 
cgit v1.3.1


From f9e79844edd9757243c786c9e901cfba3f281b6b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 21 Apr 2026 11:26:51 +0700
Subject: replace `TUD_ENDPOINT_ONE_DIRECTION_ONLY` with
 `CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY` for improved configuration consistency
 across examples and core sources

---
 .../device/cdc_dual_ports/src/usb_descriptors.c    |  2 +-
 examples/device/cdc_msc/src/usb_descriptors.c      |  2 +-
 examples/device/cdc_msc_freertos/src/main.c        |  4 ++--
 .../device/cdc_msc_freertos/src/usb_descriptors.c  |  2 +-
 examples/device/cdc_uac2/src/usb_descriptors.c     |  2 +-
 .../dynamic_configuration/src/usb_descriptors.c    |  2 +-
 .../device/hid_generic_inout/src/usb_descriptors.c |  2 +-
 examples/device/midi_test/src/usb_descriptors.c    |  2 +-
 .../midi_test_freertos/src/usb_descriptors.c       |  2 +-
 examples/device/msc_dual_lun/src/usb_descriptors.c |  2 +-
 examples/device/mtp/src/usb_descriptors.c          |  2 +-
 .../net_lwip_webserver/src/usb_descriptors.c       |  2 +-
 .../device/printer_to_cdc/src/usb_descriptors.c    |  2 +-
 examples/device/uac2_headset/src/usb_descriptors.c |  2 +-
 .../device/uac2_speaker_fb/src/usb_descriptors.c   |  2 +-
 .../device/webusb_serial/src/usb_descriptors.c     |  2 +-
 examples/dual/dynamic_switch/src/usb_descriptors.c |  2 +-
 src/common/tusb_mcu.h                              | 27 +++++++++++++++-------
 18 files changed, 37 insertions(+), 26 deletions(-)

(limited to 'src/common')

diff --git a/examples/device/cdc_dual_ports/src/usb_descriptors.c b/examples/device/cdc_dual_ports/src/usb_descriptors.c
index e6011c35a..2d899a7c6 100644
--- a/examples/device/cdc_dual_ports/src/usb_descriptors.c
+++ b/examples/device/cdc_dual_ports/src/usb_descriptors.c
@@ -106,7 +106,7 @@ enum {
   #define EPNUM_CDC_1_OUT     0x05
   #define EPNUM_CDC_1_IN      0x84
 
-#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#elif CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_0_NOTIF   0x81
diff --git a/examples/device/cdc_msc/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c
index c668ea3a7..b738e7d12 100644
--- a/examples/device/cdc_msc/src/usb_descriptors.c
+++ b/examples/device/cdc_msc/src/usb_descriptors.c
@@ -102,7 +102,7 @@ enum {
   #define EPNUM_MSC_OUT     0x05
   #define EPNUM_MSC_IN      0x84
 
-#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#elif CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_NOTIF   0x81
diff --git a/examples/device/cdc_msc_freertos/src/main.c b/examples/device/cdc_msc_freertos/src/main.c
index 4fb209fd0..f2f71d089 100644
--- a/examples/device/cdc_msc_freertos/src/main.c
+++ b/examples/device/cdc_msc_freertos/src/main.c
@@ -34,10 +34,10 @@
   #define USBD_STACK_SIZE     4096
 #else
   // Increase stack size when debug log is enabled
-  #define USBD_STACK_SIZE    (3*configMINIMAL_STACK_SIZE/2) * (CFG_TUSB_DEBUG ? 2 : 1)
+  #define USBD_STACK_SIZE    (configMINIMAL_STACK_SIZE * (CFG_TUSB_DEBUG ? 4 : 2))
 #endif
 
-#define CDC_STACK_SIZE      (configMINIMAL_STACK_SIZE * (CFG_TUSB_DEBUG ? 2 : 1))
+#define CDC_STACK_SIZE      (configMINIMAL_STACK_SIZE * (CFG_TUSB_DEBUG ? 3 : 2))
 #define BLINKY_STACK_SIZE   configMINIMAL_STACK_SIZE
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/cdc_msc_freertos/src/usb_descriptors.c b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
index 4950f02e0..26bc0de00 100644
--- a/examples/device/cdc_msc_freertos/src/usb_descriptors.c
+++ b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
@@ -102,7 +102,7 @@ enum {
   #define EPNUM_MSC_OUT     0x05
   #define EPNUM_MSC_IN      0x84
 
-#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#elif CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_NOTIF   0x81
diff --git a/examples/device/cdc_uac2/src/usb_descriptors.c b/examples/device/cdc_uac2/src/usb_descriptors.c
index e6caaa971..7ef738de9 100644
--- a/examples/device/cdc_uac2/src/usb_descriptors.c
+++ b/examples/device/cdc_uac2/src/usb_descriptors.c
@@ -97,7 +97,7 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_CDC_OUT     0x02
   #define EPNUM_CDC_IN      0x82
 
-#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#elif CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_AUDIO_IN    0x01
diff --git a/examples/device/dynamic_configuration/src/usb_descriptors.c b/examples/device/dynamic_configuration/src/usb_descriptors.c
index 458b7c2a5..c4049414f 100644
--- a/examples/device/dynamic_configuration/src/usb_descriptors.c
+++ b/examples/device/dynamic_configuration/src/usb_descriptors.c
@@ -132,7 +132,7 @@ enum
   #define EPNUM_1_MSC_OUT     0x02
   #define EPNUM_1_MSC_IN      0x82
 
-#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#elif CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_0_CDC_NOTIF   0x81
diff --git a/examples/device/hid_generic_inout/src/usb_descriptors.c b/examples/device/hid_generic_inout/src/usb_descriptors.c
index 929b2fd3a..93e718461 100644
--- a/examples/device/hid_generic_inout/src/usb_descriptors.c
+++ b/examples/device/hid_generic_inout/src/usb_descriptors.c
@@ -97,7 +97,7 @@ enum
 
 #define  CONFIG_TOTAL_LEN  (TUD_CONFIG_DESC_LEN + TUD_HID_INOUT_DESC_LEN)
 
-#if defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#if CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_HID_OUT   0x01
diff --git a/examples/device/midi_test/src/usb_descriptors.c b/examples/device/midi_test/src/usb_descriptors.c
index e969f33a3..99c798ce1 100644
--- a/examples/device/midi_test/src/usb_descriptors.c
+++ b/examples/device/midi_test/src/usb_descriptors.c
@@ -87,7 +87,7 @@ enum {
   #define EPNUM_MIDI_OUT  0x02
   #define EPNUM_MIDI_IN   0x81
 
-#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#elif CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_MIDI_OUT  0x01
diff --git a/examples/device/midi_test_freertos/src/usb_descriptors.c b/examples/device/midi_test_freertos/src/usb_descriptors.c
index e969f33a3..99c798ce1 100644
--- a/examples/device/midi_test_freertos/src/usb_descriptors.c
+++ b/examples/device/midi_test_freertos/src/usb_descriptors.c
@@ -87,7 +87,7 @@ enum {
   #define EPNUM_MIDI_OUT  0x02
   #define EPNUM_MIDI_IN   0x81
 
-#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#elif CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_MIDI_OUT  0x01
diff --git a/examples/device/msc_dual_lun/src/usb_descriptors.c b/examples/device/msc_dual_lun/src/usb_descriptors.c
index f73935ee0..c2eb22a4c 100644
--- a/examples/device/msc_dual_lun/src/usb_descriptors.c
+++ b/examples/device/msc_dual_lun/src/usb_descriptors.c
@@ -91,7 +91,7 @@ enum
   #define EPNUM_MSC_OUT  0x02
   #define EPNUM_MSC_IN   0x81
 
-#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#elif CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_MSC_OUT  0x01
diff --git a/examples/device/mtp/src/usb_descriptors.c b/examples/device/mtp/src/usb_descriptors.c
index f0aa3de6b..4c840560e 100644
--- a/examples/device/mtp/src/usb_descriptors.c
+++ b/examples/device/mtp/src/usb_descriptors.c
@@ -94,7 +94,7 @@ enum
   #define EPNUM_MTP_OUT     0x02
   #define EPNUM_MTP_IN      0x81
 
-#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#elif CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_MTP_EVT     0x81
diff --git a/examples/device/net_lwip_webserver/src/usb_descriptors.c b/examples/device/net_lwip_webserver/src/usb_descriptors.c
index c976cb62b..8cfef41a6 100644
--- a/examples/device/net_lwip_webserver/src/usb_descriptors.c
+++ b/examples/device/net_lwip_webserver/src/usb_descriptors.c
@@ -121,7 +121,7 @@ const uint8_t *tud_descriptor_device_cb(void) {
 #define EPNUM_NET_OUT   0x02
 #define EPNUM_NET_IN    0x81
 
-#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#elif CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
 // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
 //    e.g EP1 OUT & EP1 IN cannot exist together
 #define EPNUM_NET_NOTIF 0x81
diff --git a/examples/device/printer_to_cdc/src/usb_descriptors.c b/examples/device/printer_to_cdc/src/usb_descriptors.c
index 30d309ed4..2e6b3f6c3 100644
--- a/examples/device/printer_to_cdc/src/usb_descriptors.c
+++ b/examples/device/printer_to_cdc/src/usb_descriptors.c
@@ -67,7 +67,7 @@ uint8_t const *tud_descriptor_device_cb(void) {
 //--------------------------------------------------------------------+
 
 // Endpoint numbers
-#if defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#if CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   #define EPNUM_CDC_NOTIF   0x81
   #define EPNUM_CDC_OUT     0x02
   #define EPNUM_CDC_IN      0x83
diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c
index e4fbbf8a5..e9ac8b817 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.c
+++ b/examples/device/uac2_headset/src/usb_descriptors.c
@@ -97,7 +97,7 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_AUDIO_OUT   0x08
   #define EPNUM_AUDIO_INT   0x01
 
-#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#elif CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_AUDIO_IN    0x01
diff --git a/examples/device/uac2_speaker_fb/src/usb_descriptors.c b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
index c5a161a1e..2e21e54e3 100644
--- a/examples/device/uac2_speaker_fb/src/usb_descriptors.c
+++ b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
@@ -115,7 +115,7 @@ uint8_t const * tud_hid_descriptor_report_cb(uint8_t itf) {
   #define EPNUM_AUDIO_FB    0x08
   #define EPNUM_DEBUG       0x01
 
-#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#elif CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_AUDIO       0x02
diff --git a/examples/device/webusb_serial/src/usb_descriptors.c b/examples/device/webusb_serial/src/usb_descriptors.c
index 0ef41a68e..415d2b66a 100644
--- a/examples/device/webusb_serial/src/usb_descriptors.c
+++ b/examples/device/webusb_serial/src/usb_descriptors.c
@@ -104,7 +104,7 @@ enum
   #define EPNUM_VENDOR_OUT  0x05
   #define EPNUM_VENDOR_IN   0x84
 
-#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#elif CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_NOTIF   0x81
diff --git a/examples/dual/dynamic_switch/src/usb_descriptors.c b/examples/dual/dynamic_switch/src/usb_descriptors.c
index 54ffc2c18..ef6d795b7 100644
--- a/examples/dual/dynamic_switch/src/usb_descriptors.c
+++ b/examples/dual/dynamic_switch/src/usb_descriptors.c
@@ -86,7 +86,7 @@ enum {
   #define EPNUM_CDC_OUT     0x02
   #define EPNUM_CDC_IN      0x82
 
-#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#elif CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_NOTIF   0x81
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 77a0bbf1d..651bb149d 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -177,12 +177,12 @@
 
 #elif TU_CHECK_MCU(OPT_MCU_SAMG)
   #define TUP_DCD_ENDPOINT_MAX 6
-  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+  #define CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY 1
 
 #elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
   #define TUP_DCD_ENDPOINT_MAX 10
   #define TUP_RHPORT_HIGHSPEED 1
-  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+  #define CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY 1
 
   // Enable dcache if DMA is enabled
   #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUD_SAMX7X_DMA_ENABLE
@@ -190,11 +190,11 @@
 
 #elif TU_CHECK_MCU(OPT_MCU_PIC32MZ)
   #define TUP_DCD_ENDPOINT_MAX 8
-  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+  #define CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY 1
 
 #elif TU_CHECK_MCU(OPT_MCU_PIC32MX, OPT_MCU_PIC32MM, OPT_MCU_PIC32MK) || TU_CHECK_MCU(OPT_MCU_PIC24, OPT_MCU_DSPIC33)
   #define TUP_DCD_ENDPOINT_MAX 16
-  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+  #define CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY 1
   #define TUP_DCD_EDPT_CLOSE_API
 
 //--------------------------------------------------------------------+
@@ -411,7 +411,7 @@
 #elif TU_CHECK_MCU(OPT_MCU_CXD56)
   #define TUP_DCD_ENDPOINT_MAX 7
   #define TUP_RHPORT_HIGHSPEED 1
-  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+  #define CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY 1
 
 //--------------------------------------------------------------------+
 // TI
@@ -547,12 +547,12 @@
 #elif TU_CHECK_MCU(OPT_MCU_FT90X)
   #define TUP_DCD_ENDPOINT_MAX 8
   #define TUP_RHPORT_HIGHSPEED 1
-  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+  #define CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY 1
 
 #elif TU_CHECK_MCU(OPT_MCU_FT93X)
   #define TUP_DCD_ENDPOINT_MAX 16
   #define TUP_RHPORT_HIGHSPEED 1
-  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+  #define CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY 1
 
 //--------------------------------------------------------------------+
 // Allwinner
@@ -643,7 +643,7 @@
   #define TUP_USBIP_MUSB_ADI
   #define TUP_DCD_ENDPOINT_MAX 12
   #define TUP_RHPORT_HIGHSPEED 1
-  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+  #define CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY 1
 
 //--------------------------------------------------------------------+
 // ArteryTek
@@ -727,3 +727,14 @@
 #ifndef TUP_DCD_EDPT_CLOSE_API
   #define TUP_DCD_EDPT_ISO_ALLOC
 #endif
+
+// Some USBIPs (SAMG, SAMX7X, PIC32, MAX3266x/MAX78002) cannot assign the same endpoint
+// number to both IN and OUT. Default to 0 (same endpoint number may be used for IN and OUT).
+#ifndef CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
+  #define CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY 0
+#endif
+
+// Backward-compatible alias: legacy code only tests defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+#if CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY && !defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+#endif
-- 
cgit v1.3.1


From c13864dbe49b2009f9ad3be2f912ddd80a9ecd40 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 21 Apr 2026 15:28:44 +0700
Subject: optimize pipe_state_t sram for port with
 CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY. separate process_edpt_n() to
 process_epin() and process_epout()

---
 src/common/tusb_types.h             |  10 +-
 src/portable/mentor/musb/dcd_musb.c | 209 ++++++++++++++++++------------------
 2 files changed, 111 insertions(+), 108 deletions(-)

(limited to 'src/common')

diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index a18f9feb7..806997866 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -100,12 +100,14 @@ typedef enum {
 } tusb_xfer_type_t;
 
 typedef enum {
-  TUSB_DIR_OUT = 0,
-  TUSB_DIR_IN  = 1,
+  TUSB_DIR_OUT = 0u,
+  TUSB_DIR_IN  = 1u,
+} tusb_dir_t;
 
-  TUSB_EPNUM_MASK = 0x0F,
+enum {
+  TUSB_EPNUM_MASK  = 0x0F,
   TUSB_DIR_IN_MASK = 0x80
-} tusb_dir_t;
+};
 
 enum {
   TUSB_EPSIZE_BULK_FS = 64,
diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index acd86b9e7..bf60adbe7 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -69,6 +69,19 @@ typedef struct {
   bool      use_fifo;  /* true: buf is tu_fifo_t*; false: buf is plain byte pointer. */
 } pipe_state_t;
 
+// Pipe array layout (N = TUP_DCD_ENDPOINT_MAX):
+//   [0] : EP0 (shared between IN/OUT control stages)
+// One-direction-only IPs (CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY=1):
+//   [1 .. n-1] : EP1..n-1 (single slot per endpoint)
+// Bidirectional-capable IPs:
+//   [1 .. N-1  ] : EP OUT
+//   [N .. 2*N-2] : EP IN
+#if CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
+  #define MUSB_PIPE_COUNT TUP_DCD_ENDPOINT_MAX
+#else
+  #define MUSB_PIPE_COUNT (2u * TUP_DCD_ENDPOINT_MAX - 1u)
+#endif
+
 typedef struct {
   union {
     tusb_control_request_t setup_packet;
@@ -76,12 +89,27 @@ typedef struct {
   };
   uint16_t     remaining_ctrl; /* The number of bytes remaining in data stage of control transfer. */
   int8_t       status_out;
-  pipe_state_t pipe0;
-  pipe_state_t pipe[2][TUP_DCD_ENDPOINT_MAX-1];   /* pipe[direction][endpoint number - 1] */
+  pipe_state_t pipe[MUSB_PIPE_COUNT];
 } dcd_data_t;
 
 static dcd_data_t _dcd;
 
+TU_ATTR_ALWAYS_INLINE static inline pipe_state_t* pipe_get(uint8_t epnum, tusb_dir_t epdir) {
+#if CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
+  (void) epdir;
+  return &_dcd.pipe[epnum];
+#else
+  if (epnum == 0) {
+    return &_dcd.pipe[0];
+  }
+  size_t idx = epnum;
+  if (epdir == TUSB_DIR_IN) {
+    idx += TUP_DCD_ENDPOINT_MAX - 1u;
+  }
+  return &_dcd.pipe[idx];
+#endif
+}
+
 //--------------------------------------------------------------------
 // HW FIFO Helper
 // Note: Index register is already set by caller
@@ -176,9 +204,10 @@ static void process_setup_packet(uint8_t rhport) {
   _dcd.setup_buffer[0] = musb_regs->fifo[0];
   _dcd.setup_buffer[1] = musb_regs->fifo[0];
 
-  _dcd.pipe0.buf       = NULL;
-  _dcd.pipe0.length    = 0;
-  _dcd.pipe0.remaining = 0;
+  pipe_state_t* pipe0 = pipe_get(0, TUSB_DIR_OUT);
+  pipe0->buf       = NULL;
+  pipe0->length    = 0;
+  pipe0->remaining = 0;
   dcd_event_setup_received(rhport, (const uint8_t*)(uintptr_t)&_dcd.setup_packet, true);
 
   const unsigned len    = _dcd.setup_packet.wLength;
@@ -193,7 +222,7 @@ static void process_setup_packet(uint8_t rhport) {
 
 // write to txfifo using pipe_state_t info
 static void pipe_write(musb_regs_t* musb_regs, uint8_t epnum) {
-  pipe_state_t* pipe = &_dcd.pipe[TUSB_DIR_IN][epnum - 1];
+  pipe_state_t* pipe = pipe_get(epnum, TUSB_DIR_IN);
   musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epnum);
   const unsigned mps = ep_csr->tx_maxp;
   const unsigned rem = pipe->remaining;
@@ -213,32 +242,38 @@ static void pipe_write(musb_regs_t* musb_regs, uint8_t epnum) {
 
 // Called from the TX interrupt. If the last queued packet finished the transfer,
 // signal completion; otherwise queue the next packet.
-static bool handle_xfer_in(musb_regs_t* musb_regs, uint8_t epnum) {
-  pipe_state_t* pipe = &_dcd.pipe[TUSB_DIR_IN][epnum - 1];
+static void process_epin(uint8_t rhport, musb_regs_t *musb_regs, uint8_t epnum) {
+  musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epnum);
+  if (ep_csr->tx_csrl & MUSB_TXCSRL1_STALLED) {
+    ep_csr->tx_csrl &= ~(MUSB_TXCSRL1_STALLED | MUSB_TXCSRL1_UNDRN);
+    return; // sent STALL, do nothing
+  }
 
+  pipe_state_t* pipe = pipe_get(epnum, TUSB_DIR_IN);
   if (pipe->remaining == 0) {
+    const uint16_t xferred_len = pipe->length;
     pipe->buf = NULL;
     pipe->armed = false;
-    return true;
+    dcd_event_xfer_complete(rhport, tu_edpt_addr(epnum, TUSB_DIR_IN), xferred_len, XFER_RESULT_SUCCESS, true);
+    return;
   }
   pipe_write(musb_regs, epnum);
-  return false;
 }
 
-static bool handle_xfer_out(uint8_t rhport, uint_fast8_t ep_addr)
-{
-  unsigned epnum = tu_edpt_number(ep_addr);
-  unsigned epnum_minus1 = epnum - 1;
-  pipe_state_t  *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
-  musb_regs_t* musb_regs = MUSB_REGS(rhport);
+static void process_epout(uint8_t rhport, musb_regs_t *musb_regs, uint8_t epnum) {
   musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epnum);
-  // TU_LOG1(" RXCSRL%d = %x\r\n", epnum_minus1 + 1, ep_csr->rx_csrl);
+  if (ep_csr->rx_csrl & MUSB_RXCSRL1_STALLED) {
+    ep_csr->rx_csrl &= ~(MUSB_RXCSRL1_STALLED | MUSB_RXCSRL1_OVER);
+    return; // sent STALL, do nothing
+  }
 
   //Fail gracefully. Spurious interrupt.
   if (!(ep_csr->rx_csrl & MUSB_RXCSRL1_RXRDY)) {
-    return false;
+    return;
   }
 
+  pipe_state_t *pipe = pipe_get(epnum, TUSB_DIR_OUT);
+
   if (!pipe->armed) {
     // Packet is already ACK'd by hardware and sitting in the Rx FIFO, but no transfer is
     // posted. Do NOT flush (per MUSB spec §3.3.11 FlushFIFO) - that would silently drop
@@ -246,7 +281,7 @@ static bool handle_xfer_out(uint8_t rhport, uint_fast8_t ep_addr)
     // the FIFO stays occupied so hardware NAKs further OUT tokens (natural backpressure).
     // The next dcd_edpt_xfer() on this endpoint will drain the staged packet.
     musb_regs->intr_rxen &= (uint16_t) ~TU_BIT(epnum);
-    return false;
+    return;
   }
 
   const unsigned mps = ep_csr->rx_maxp;
@@ -266,20 +301,20 @@ static bool handle_xfer_out(uint8_t rhport, uint_fast8_t ep_addr)
 
   ep_csr->rx_csrl = 0; /* Always Clear RXRDY bit */
   if ((len < mps) || (rem == len)) {
+    const uint16_t xferred_len = pipe->length - pipe->remaining;
     pipe->buf = NULL;
     pipe->armed = false;
-    return true;
+
+    dcd_event_xfer_complete(rhport, tu_edpt_addr(epnum, TUSB_DIR_OUT), xferred_len, XFER_RESULT_SUCCESS, true);
   }
-  return false;
 }
 
 static bool edpt_n_xfer(uint8_t rhport, uint8_t ep_addr, void *buffer, uint16_t total_bytes, bool use_fifo)
 {
   unsigned epnum = tu_edpt_number(ep_addr);
-  unsigned epnum_minus1 = epnum - 1;
   unsigned dir_in       = tu_edpt_dir(ep_addr);
 
-  pipe_state_t *pipe = &_dcd.pipe[dir_in][epnum_minus1];
+  pipe_state_t *pipe = pipe_get(epnum, dir_in);
   if (use_fifo) {
     pipe->fifo = (tu_fifo_t *) buffer;
   } else {
@@ -296,16 +331,13 @@ static bool edpt_n_xfer(uint8_t rhport, uint8_t ep_addr, void *buffer, uint16_t
     musb_regs_t* musb_regs = MUSB_REGS(rhport);
     musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epnum);
 
-    // Re-enable Rx interrupt (may have been masked by the no-buffer path in handle_xfer_out)
+    // Re-enable Rx interrupt (may have been masked by the no-buffer path in process_epout)
     musb_regs->intr_rxen |= (uint16_t) TU_BIT(epnum);
 
-    // Drain any packet staged in the Rx FIFO from a prior no-buffer interrupt
+    // Drain any packet staged in the Rx FIFO from a prior no-buffer interrupt.
+    // process_epout() fires dcd_event_xfer_complete() itself if the drain completes.
     if (ep_csr->rx_csrl & MUSB_RXCSRL1_RXRDY) {
-      if (handle_xfer_out(rhport, ep_addr)) {
-        dcd_event_xfer_complete(rhport, ep_addr,
-                                pipe->length - pipe->remaining,
-                                XFER_RESULT_SUCCESS, false);
-      }
+      process_epout(rhport, musb_regs, (uint8_t) epnum);
     }
   }
   return true;
@@ -317,6 +349,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
   TU_ASSERT(total_bytes <= 64); /* Current implementation supports for only up to 64 bytes. */
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
   musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, 0);
+  pipe_state_t* pipe0 = pipe_get(0, TUSB_DIR_OUT);
   const unsigned req = _dcd.setup_packet.bmRequestType;
   TU_ASSERT(req != REQUEST_TYPE_INVALID || total_bytes == 0);
 
@@ -347,9 +380,9 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
     if (dir_in) {
       tu_hwfifo_write(fifo_ptr, buffer, len, NULL);
 
-      _dcd.pipe0.buf       = buffer + len;
-      _dcd.pipe0.length    = len;
-      _dcd.pipe0.remaining = 0;
+      pipe0->buf       = buffer + len;
+      pipe0->length    = len;
+      pipe0->remaining = 0;
 
       _dcd.remaining_ctrl  = rem - len;
       if ((len < 64) || (rem == len)) {
@@ -360,19 +393,16 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
       } else {
         ep_csr->csr0l = MUSB_CSRL0_TXRDY; /* Flush TX FIFO to return ACK. */
       }
-      // TU_LOG1(" IN ep_csr->csr0l = %x\r\n", ep_csr->csr0l);
     } else {
-      // TU_LOG1(" OUT ep_csr->csr0l = %x\r\n", ep_csr->csr0l);
-      _dcd.pipe0.buf       = buffer;
-      _dcd.pipe0.length    = len;
-      _dcd.pipe0.remaining = len;
+      pipe0->buf       = buffer;
+      pipe0->length    = len;
+      pipe0->remaining = len;
       ep_csr->csr0l = MUSB_CSRL0_RXRDYC; /* Clear RX FIFO to return ACK. */
     }
   } else if (dir_in) {
-    // TU_LOG1(" STATUS IN ep_csr->csr0l  = %x\r\n", ep_csr->csr0l);
-    _dcd.pipe0.buf = NULL;
-    _dcd.pipe0.length    = 0;
-    _dcd.pipe0.remaining = 0;
+    pipe0->buf       = NULL;
+    pipe0->length    = 0;
+    pipe0->remaining = 0;
     /* Clear RX FIFO and reverse the transaction direction */
     ep_csr->csr0l = MUSB_CSRL0_RXRDYC | MUSB_CSRL0_DATAEND;
   }
@@ -383,9 +413,9 @@ static void process_ep0(uint8_t rhport)
 {
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
   musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, 0);
+  pipe_state_t* pipe0 = pipe_get(0, TUSB_DIR_OUT);
   uint_fast8_t csrl = ep_csr->csr0l;
 
-  // TU_LOG1(" EP0 ep_csr->csr0l = %x\r\n", csrl);
   // 21.1.5: endpoint 0 service routine as peripheral
 
   if (csrl & MUSB_CSRL0_STALLED) {
@@ -398,13 +428,13 @@ static void process_ep0(uint8_t rhport)
   if (csrl & MUSB_CSRL0_SETEND) {
     TU_LOG1("   ABORT by the next packets\r\n");
     ep_csr->csr0l = MUSB_CSRL0_SETENDC;
-    if (req != REQUEST_TYPE_INVALID && _dcd.pipe0.buf) {
+    if (req != REQUEST_TYPE_INVALID && pipe0->buf) {
       /* DATA stage was aborted by receiving STATUS or SETUP packet. */
-      _dcd.pipe0.buf = NULL;
+      pipe0->buf = NULL;
       _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
       dcd_event_xfer_complete(rhport,
                               req & TUSB_DIR_IN_MASK,
-                              _dcd.pipe0.length - _dcd.pipe0.remaining,
+                              pipe0->length - pipe0->remaining,
                               XFER_RESULT_SUCCESS, true);
     }
     req = REQUEST_TYPE_INVALID;
@@ -419,21 +449,21 @@ static void process_ep0(uint8_t rhport)
       process_setup_packet(rhport);
       return;
     }
-    if (_dcd.pipe0.buf) {
+    if (pipe0->buf) {
       /* DATA OUT */
       const unsigned vld = ep_csr->count0;
-      const unsigned rem = _dcd.pipe0.remaining;
+      const unsigned rem = pipe0->remaining;
       const unsigned len = TU_MIN(TU_MIN(rem, 64), vld);
       volatile void *fifo_ptr = &musb_regs->fifo[0];
-      tu_hwfifo_read(fifo_ptr, _dcd.pipe0.buf, len, NULL);
+      tu_hwfifo_read(fifo_ptr, pipe0->buf, len, NULL);
 
-      _dcd.pipe0.remaining = rem - len;
+      pipe0->remaining = rem - len;
       _dcd.remaining_ctrl -= len;
 
-      _dcd.pipe0.buf = NULL;
+      pipe0->buf = NULL;
       dcd_event_xfer_complete(rhport,
                               tu_edpt_addr(0, TUSB_DIR_OUT),
-                              _dcd.pipe0.length - _dcd.pipe0.remaining,
+                              pipe0->length - pipe0->remaining,
                               XFER_RESULT_SUCCESS, true);
     }
     return;
@@ -450,49 +480,16 @@ static void process_ep0(uint8_t rhport)
     _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
     dcd_event_xfer_complete(rhport,
                             tu_edpt_addr(0, TUSB_DIR_IN),
-                            _dcd.pipe0.length - _dcd.pipe0.remaining,
+                            pipe0->length - pipe0->remaining,
                             XFER_RESULT_SUCCESS, true);
     return;
   }
-  if (_dcd.pipe0.buf) {
+  if (pipe0->buf) {
     /* DATA IN */
-    _dcd.pipe0.buf = NULL;
+    pipe0->buf = NULL;
     dcd_event_xfer_complete(rhport,
                             tu_edpt_addr(0, TUSB_DIR_IN),
-                            _dcd.pipe0.length - _dcd.pipe0.remaining,
-                            XFER_RESULT_SUCCESS, true);
-  }
-}
-
-static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
-{
-  bool completed;
-  const unsigned dir_in = tu_edpt_dir(ep_addr);
-  const unsigned epn = tu_edpt_number(ep_addr);
-  const unsigned epn_minus1 = epn - 1;
-
-  musb_regs_t* musb_regs = MUSB_REGS(rhport);
-  musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epn);
-  if (dir_in) {
-    // TU_LOG1(" TX CSRL%d = %x\r\n", epn, ep_csr->tx_csrl);
-    if (ep_csr->tx_csrl & MUSB_TXCSRL1_STALLED) {
-      ep_csr->tx_csrl &= ~(MUSB_TXCSRL1_STALLED | MUSB_TXCSRL1_UNDRN);
-      return;
-    }
-    completed = handle_xfer_in(musb_regs, (uint8_t) epn);
-  } else {
-    // TU_LOG1(" RX CSRL%d = %x\r\n", epn, ep_csr->rx_csrl);
-    if (ep_csr->rx_csrl & MUSB_RXCSRL1_STALLED) {
-      ep_csr->rx_csrl &= ~(MUSB_RXCSRL1_STALLED | MUSB_RXCSRL1_OVER);
-      return;
-    }
-    completed = handle_xfer_out(rhport, ep_addr);
-  }
-
-  if (completed) {
-    pipe_state_t *pipe = &_dcd.pipe[dir_in][epn_minus1];
-    dcd_event_xfer_complete(rhport, ep_addr,
-                            pipe->length - pipe->remaining,
+                            pipe0->length - pipe0->remaining,
                             XFER_RESULT_SUCCESS, true);
   }
 }
@@ -509,8 +506,9 @@ static void process_bus_reset(uint8_t rhport) {
   /* When bmRequestType is REQUEST_TYPE_INVALID(0xFF), a control transfer state is SETUP or STATUS stage. */
   _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
   _dcd.status_out = 0;
-  /* When pipe0.buf has not NULL, DATA stage works in progress. */
-  _dcd.pipe0.buf = NULL;
+  /* When EP0 pipe buf has not NULL, DATA stage works in progress. */
+  pipe_state_t* pipe0 = pipe_get(0, TUSB_DIR_OUT);
+  pipe0->buf = NULL;
 
   musb->intr_txen = 1; /* Enable only EP0 */
   musb->intr_rxen = 0;
@@ -578,10 +576,11 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
   (void)dev_addr;
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
   musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, 0);
+  pipe_state_t* pipe0 = pipe_get(0, TUSB_DIR_OUT);
 
-  _dcd.pipe0.buf       = NULL;
-  _dcd.pipe0.length    = 0;
-  _dcd.pipe0.remaining = 0;
+  pipe0->buf       = NULL;
+  pipe0->length    = 0;
+  pipe0->remaining = 0;
   /* Clear RX FIFO to return ACK. */
   ep_csr->csr0l = MUSB_CSRL0_RXRDYC | MUSB_CSRL0_DATAEND;
 }
@@ -635,7 +634,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) {
   const unsigned dir_in  = tu_edpt_dir(ep_addr);
   const unsigned mps     = tu_edpt_packet_size(ep_desc);
 
-  pipe_state_t *pipe = &_dcd.pipe[dir_in][epn - 1];
+  pipe_state_t *pipe = pipe_get(epn, dir_in);
   pipe->buf       = NULL;
   pipe->length    = 0;
   pipe->remaining = 0;
@@ -681,7 +680,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc )
   unsigned const ie = musb_dcd_get_int_enable(rhport);
   musb_dcd_int_disable(rhport);
 
-  pipe_state_t *pipe = &_dcd.pipe[dir_in][epn - 1];
+  pipe_state_t *pipe = pipe_get(epn, dir_in);
   pipe->buf       = NULL;
   pipe->length    = 0;
   pipe->remaining = 0;
@@ -792,13 +791,15 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
   if (0 == epn) {
     if (!ep_addr) { /* Ignore EP80 */
       _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
-      _dcd.pipe0.buf = NULL;
+      pipe_state_t* pipe0 = pipe_get(0, TUSB_DIR_OUT);
+      pipe0->buf = NULL;
       ep_csr->csr0l = MUSB_CSRL0_STALL;
     }
   } else {
     const uint8_t is_rx = 1 - tu_edpt_dir(ep_addr);
     ep_csr->maxp_csr[is_rx].csrl = MUSB_CSRL_SEND_STALL(is_rx);
-    _dcd.pipe[tu_edpt_dir(ep_addr)][epn - 1].armed = false;
+    pipe_state_t* pipe = pipe_get(epn, tu_edpt_dir(ep_addr));
+    pipe->armed = false;
   }
 
   if (ie) musb_dcd_int_enable(rhport);
@@ -858,16 +859,16 @@ void dcd_int_handler(uint8_t rhport) {
     intr_tx &= ~TU_BIT(0);
   }
   while (intr_tx) {
-    unsigned const num = __builtin_ctz(intr_tx);
-    process_edpt_n(rhport, tu_edpt_addr(num, TUSB_DIR_IN));
-    intr_tx &= ~TU_BIT(num);
+    const unsigned epnum = __builtin_ctz(intr_tx);
+    process_epin(rhport, musb_regs, epnum);
+    intr_tx &= ~TU_BIT(epnum);
   }
 
   intr_rx &= musb_regs->intr_rxen; /* Clear disabled interrupts */
   while (intr_rx) {
-    unsigned const num = __builtin_ctz(intr_rx);
-    process_edpt_n(rhport, tu_edpt_addr(num, TUSB_DIR_OUT));
-    intr_rx &= ~TU_BIT(num);
+    unsigned const epnum = __builtin_ctz(intr_rx);
+    process_epout(rhport, musb_regs, epnum);
+    intr_rx &= ~TU_BIT(epnum);
   }
 
   musb_regs->index = saved_index; // restore endpoint index
-- 
cgit v1.3.1


From 0e4869a729ce32b157a60ae5730abf6f5802381b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 25 Apr 2026 14:41:08 +0700
Subject: clean up

---
 src/common/tusb_types.h             |  6 +++
 src/device/usbd_control.c           | 14 ++----
 src/portable/mentor/musb/dcd_musb.c | 95 +++++++++++++++----------------------
 3 files changed, 50 insertions(+), 65 deletions(-)

(limited to 'src/common')

diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index 806997866..36e72967c 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -321,6 +321,12 @@ enum {
   TUSB_INDEX_INVALID_8 = 0xFF
 };
 
+enum {
+ TU_EP0_OUT = 0x00,
+ TU_EP0_IN = 0x80
+};
+
+
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index 87593d4a7..49ecd0f16 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -44,10 +44,6 @@ TU_ATTR_WEAK void dcd_edpt0_status_complete(uint8_t rhport, const tusb_control_r
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
 
-enum {
-  EDPT_CTRL_OUT = 0x00,
-  EDPT_CTRL_IN = 0x80
-};
 
 typedef struct {
   tusb_control_request_t request;
@@ -74,7 +70,7 @@ uint8_t* usbd_get_ctrl_buf(void) {
 // Queue ZLP status transaction
 static inline bool status_stage_xact(uint8_t rhport, const tusb_control_request_t* request) {
   // Opposite to endpoint in Data Phase
-  const uint8_t ep_addr = request->bmRequestType_bit.direction ? EDPT_CTRL_OUT : EDPT_CTRL_IN;
+  const uint8_t ep_addr = request->bmRequestType_bit.direction ? TU_EP0_OUT : TU_EP0_IN;
   return usbd_edpt_xfer(rhport, ep_addr, NULL, 0, false);
 }
 
@@ -93,10 +89,10 @@ bool tud_control_status(uint8_t rhport, const tusb_control_request_t* request) {
 // This function can also transfer an zero-length packet
 static bool data_stage_xact(uint8_t rhport) {
   const uint16_t xact_len = tu_min16(_ctrl_xfer.data_len - _ctrl_xfer.total_xferred, CFG_TUD_ENDPOINT0_BUFSIZE);
-  uint8_t ep_addr = EDPT_CTRL_OUT;
+  uint8_t ep_addr = TU_EP0_OUT;
 
   if (_ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_IN) {
-    ep_addr = EDPT_CTRL_IN;
+    ep_addr = TU_EP0_IN;
     if (0u != xact_len && _ctrl_xfer.buffer != _ctrl_epbuf.buf) {
       TU_VERIFY(0 == tu_memcpy_s(_ctrl_epbuf.buf, CFG_TUD_ENDPOINT0_BUFSIZE, _ctrl_xfer.buffer, xact_len));
     }
@@ -203,8 +199,8 @@ bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result,
       TU_ASSERT(status_stage_xact(rhport, &_ctrl_xfer.request));
     } else {
       // Stall both IN and OUT control endpoint
-      dcd_edpt_stall(rhport, EDPT_CTRL_OUT);
-      dcd_edpt_stall(rhport, EDPT_CTRL_IN);
+      dcd_edpt_stall(rhport, TU_EP0_OUT);
+      dcd_edpt_stall(rhport, TU_EP0_IN);
     }
   } else {
     // More data to transfer
diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index 4ef10168f..66fa86c77 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -70,40 +70,32 @@ typedef struct {
 // Pipe array layout (N = TUP_DCD_ENDPOINT_MAX):
 //   [0] : EP0 (shared between IN/OUT control stages)
 // One-direction-only IPs (CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY=1):
-//   [1 .. n-1] : EP1..n-1 (single slot per endpoint)
+//   [1..N-1] : EP1..N-1 (single slot per endpoint)
 // Bidirectional-capable IPs:
-//   [1 .. N-1  ] : EP OUT
-//   [N .. 2*N-2] : EP IN
+//   [1..N-1  ] : EP OUT
+//   [N..2*N-2] : EP IN
 #if CFG_TUD_ENDPOINT_ONE_DIRECTION_ONLY
   #define MUSB_PIPE_COUNT TUP_DCD_ENDPOINT_MAX
 #else
   #define MUSB_PIPE_COUNT (2u * TUP_DCD_ENDPOINT_MAX - 1u)
 #endif
 
-// EP0 control-transfer phase (§21.1.4). The phase is set from the SETUP
-// packet's direction/wLength when the SETUP IRQ fires, and drives what each
-// subsequent IRQ or edpt0_xfer call is allowed to do.
 enum {
-  EP0_STATE_IDLE = 0,    // no active control transfer
-  EP0_STATE_TX,          // DATA IN stage  (Read req data; STATUS-OUT-ZLP absorbed here too)
-  EP0_STATE_RX,          // DATA OUT stage (Write req data)
-  EP0_STATE_STATUS_IN,   // STATUS IN — device sends IN-ZLP to host; awaits send-ACK IRQ
-  EP0_STATE_STATUS_OUT,
-  EP0_STATE_STATUS_OUT_REQUESTED,
-  EP0_STATE_STATUS_OUT_SENT
+  EP0_STATE_IDLE = 0,             // no active control transfer
+  EP0_STATE_DATA,                 // DATA stage (IN or OUT — direction implied by CSR/dir)
+  EP0_STATE_STATUS_IN,            // STATUS IN — device sends IN-ZLP; awaits send-ACK IRQ
+  EP0_STATE_STATUS_OUT,           // post-DATAEND, neither edpt0_xfer(STATUS OUT) nor confirmation IRQ has happened yet
+  EP0_STATE_STATUS_OUT_REQUESTED, // edpt0_xfer(STATUS OUT) was called first; awaiting confirmation IRQ to fire complete
+  EP0_STATE_STATUS_OUT_SENT,      // confirmation IRQ arrived first; awaiting edpt0_xfer(STATUS OUT) to fire complete
 };
 
 typedef struct {
-  uint16_t remaining_ctrl; /* The number of bytes remaining in data stage of control transfer. */
+  uint16_t ep0_remain_datalen; /* The number of bytes remaining in data stage of control transfer. */
   uint8_t ep0_state;
   uint8_t pending_addr;  // new USB address latched by dcd_set_address, applied when STATUS IN completes
   pipe_state_t pipe[MUSB_PIPE_COUNT];
 } dcd_data_t;
 
-// EP0 control-transfer state is held by usbd_control.c (request, total_xferred,
-// data_len). dcd tracks phase in _dcd.ep0_state. The SETUP packet is drained
-// into a local in process_ep0 and dispatched upstream — never cached here.
-
 static dcd_data_t _dcd;
 
 TU_ATTR_ALWAYS_INLINE static inline pipe_state_t* pipe_get(uint8_t epnum, tusb_dir_t epdir) {
@@ -377,21 +369,18 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
   const unsigned dir_in = tu_edpt_dir(ep_addr);
 
   switch (_dcd.ep0_state) {
-    case EP0_STATE_TX:
-    case EP0_STATE_RX: {
-      TU_ASSERT(dir_in ? _dcd.ep0_state == EP0_STATE_TX : _dcd.ep0_state == EP0_STATE_RX);
-      volatile void *fifo_ptr = &musb_regs->fifo[0];
+    case EP0_STATE_DATA: {
       if (dir_in) {
-        // DATA IN: load FIFO, set TXRDY. Add DATAEND for a short packet (ends
-        // the data stage per USB short-packet rule).
-        tu_hwfifo_write(fifo_ptr, buffer, total_bytes, NULL);
+        // DATA IN: load FIFO, set TXRDY. Add DATAEND on the last chunk
+        // (ep0_remain_datalen == 0 after this load) to end the data stage.
+        tu_hwfifo_write(&musb_regs->fifo[0], buffer, total_bytes, NULL);
         pipe0->buf = buffer + total_bytes;
         pipe0->length = total_bytes;
         pipe0->remaining = 0;
 
-        _dcd.remaining_ctrl -= total_bytes;
-        if (_dcd.remaining_ctrl == 0) {
-          ep_csr->csr0l = MUSB_CSRL0_TXRDY | MUSB_CSRL0_DATAEND; // last packet, also set DATAEND to end the data stage
+        _dcd.ep0_remain_datalen -= total_bytes;
+        if (_dcd.ep0_remain_datalen == 0) {
+          ep_csr->csr0l = MUSB_CSRL0_TXRDY | MUSB_CSRL0_DATAEND;
         } else {
           ep_csr->csr0l = MUSB_CSRL0_TXRDY;
         }
@@ -427,9 +416,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
   return true;
 }
 
-// 21.1.5: endpoint 0 service routine as peripheral. Drives the IDLE /
-// IDLE / TX / RX / STATUS machine; direction on each IRQ is
-// implied by the state.
+// 21.1.5: endpoint 0 service routine as peripheral
 static void process_ep0(uint8_t rhport) {
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
   musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, 0);
@@ -465,41 +452,35 @@ static void process_ep0(uint8_t rhport) {
         setup_packet.u32[0] = musb_regs->fifo[0];
         setup_packet.u32[1] = musb_regs->fifo[0];
 
-        _dcd.remaining_ctrl = setup_packet.req.wLength;
+        _dcd.ep0_remain_datalen = setup_packet.req.wLength;
 
-        // Pick the next phase directly from the SETUP packet: Read → TX,
-        // Write → RX, zero-data → STATUS_IN. For Read, also ack SETUP's RXRDY
-        // now so the host can start IN tokens immediately; Write/zero-data
-        // leave it set so HW NAKs OUT tokens until edpt0_xfer clears it.
         if (setup_packet.req.wLength == 0) {
           _dcd.ep0_state = EP0_STATE_STATUS_IN;
-        } else if (tu_edpt_dir(setup_packet.req.bmRequestType)) {
-          _dcd.ep0_state = EP0_STATE_TX;
-          ep_csr->csr0l  = MUSB_CSRL0_RXRDYC;
         } else {
-          _dcd.ep0_state = EP0_STATE_RX;
+          _dcd.ep0_state = EP0_STATE_DATA;
+          // If OUT (rx) direction, let edpt0_xfer() clear RXRDY when it's ready to receive data.
+          if (setup_packet.req.bmRequestType & TUSB_DIR_IN_MASK) {
+            ep_csr->csr0l = MUSB_CSRL0_RXRDYC;
+          }
         }
         dcd_event_setup_received(rhport, (const uint8_t *)&setup_packet.req, true);
         break;
 
-      case EP0_STATE_RX: {
-        /* DATA OUT: drain armed buffer, complete. Stay in RX — usbd posts
-         * edpt0_xfer(STATUS IN) next which transitions us to STATUS_IN. */
-        const uint16_t len = tu_min16(tu_min16(pipe0->remaining, 64), count0);
+      case EP0_STATE_DATA: {
+        const uint16_t len = tu_min16(pipe0->remaining, count0);
         if (len) {
           tu_hwfifo_read(&musb_regs->fifo[0], pipe0->buf, len, NULL);
           pipe0->remaining -= len;
-          _dcd.remaining_ctrl -= len;
+          _dcd.ep0_remain_datalen -= len;
         }
 
-        if (_dcd.remaining_ctrl == 0) {
-          // last packet, leave it RXRDYC to edpt0_xfer()
+        if (_dcd.ep0_remain_datalen == 0) {
+          // last packet: change state and leave RXRDY for edpt0_xfer(STATUS IN) to ack
           _dcd.ep0_state = EP0_STATE_STATUS_IN;
         } else {
           ep_csr->csr0l = MUSB_CSRL0_RXRDYC;
         }
-        dcd_event_xfer_complete(rhport, tu_edpt_addr(0, TUSB_DIR_OUT), pipe0->length - pipe0->remaining,
-                                XFER_RESULT_SUCCESS, true);
+        dcd_event_xfer_complete(rhport, TU_EP0_OUT, len, XFER_RESULT_SUCCESS, true);
         break;
       }
 
@@ -513,12 +494,14 @@ static void process_ep0(uint8_t rhport) {
  * - completion of sending any length packet TxPktRdy clear
  * - or status stage is complete (ZLP) after DataEnd is set */
   switch (_dcd.ep0_state) {
-    case EP0_STATE_TX:
-      if (_dcd.remaining_ctrl == 0) {
-        // last packet
+    case EP0_STATE_DATA:
+      // csrl == 0 in DATA state = TXRDY just cleared, i.e. a DATA IN packet was successfully sent. If the just-sent
+      // packet was the last (DATAEND was set when ep0_remain_datalen hit zero), transition
+      // to STATUS_OUT to await the host's STATUS-OUT ZLP confirmation IRQ.
+      if (_dcd.ep0_remain_datalen == 0) {
         _dcd.ep0_state = EP0_STATE_STATUS_OUT;
       }
-      dcd_event_xfer_complete(rhport, 0x80, pipe0->length, XFER_RESULT_SUCCESS, true);
+      dcd_event_xfer_complete(rhport, TU_EP0_IN, pipe0->length, XFER_RESULT_SUCCESS, true);
       break;
 
     case EP0_STATE_STATUS_OUT:
@@ -528,7 +511,7 @@ static void process_ep0(uint8_t rhport) {
 
     case EP0_STATE_STATUS_OUT_REQUESTED:
       _dcd.ep0_state = EP0_STATE_IDLE;
-      dcd_event_xfer_complete(rhport, 0, 0, XFER_RESULT_SUCCESS, true);
+      dcd_event_xfer_complete(rhport, TU_EP0_OUT, 0, XFER_RESULT_SUCCESS, true);
       break;
 
     case EP0_STATE_STATUS_IN:
@@ -537,7 +520,7 @@ static void process_ep0(uint8_t rhport) {
         _dcd.pending_addr = 0;
       }
       _dcd.ep0_state = EP0_STATE_IDLE;
-      dcd_event_xfer_complete(rhport, 0x80, 0, XFER_RESULT_SUCCESS, true);
+      dcd_event_xfer_complete(rhport, TU_EP0_IN, 0, XFER_RESULT_SUCCESS, true);
       break;
 
     default: break;
@@ -833,7 +816,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
   musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epn);
 
   if (0 == epn) {
-    if (!ep_addr) { /* Ignore EP80 */
+    if (ep_addr == TU_EP0_OUT) { /* Ignore EP0 OUT */
       _dcd.ep0_state = EP0_STATE_IDLE;
       pipe_state_t* pipe0 = pipe_get(0, TUSB_DIR_OUT);
       pipe0->buf = NULL;
-- 
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