From d887829b4c088e14d8e528b3afb6f5fc894c49d9 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 5 Dec 2018 17:30:04 +0700 Subject: change usbd_init() return to bool for simplicity --- src/host/usbh.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/host') diff --git a/src/host/usbh.h b/src/host/usbh.h index 22fdef162..56efb6ff7 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -97,14 +97,11 @@ ATTR_WEAK void tuh_device_mount_failed_cb(tusb_error_t error, tusb_desc_devic //--------------------------------------------------------------------+ #ifdef _TINY_USB_SOURCE_FILE_ - void usbh_enumeration_task(void* param); tusb_error_t usbh_init(void); tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, uint8_t bRequest, uint16_t wValue, uint16_t wIndex, uint16_t wLength, uint8_t* data); - - #endif #ifdef __cplusplus -- cgit v1.3.1 From 4537ba66e536eb1d40c73f80ab150d92c2393397 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 5 Dec 2018 18:58:30 +0700 Subject: fixing build error with host stack --- examples/host/cdc_msc_hid/src/tusb_config.h | 33 ++------ src/device/usbd.c | 2 +- src/host/ehci/ehci.c | 1 - src/host/usbh.c | 117 +++++++++++++++------------- src/host/usbh.h | 2 +- src/host/usbh_hcd.h | 3 + src/osal/osal_freertos.h | 4 +- src/tusb.c | 9 ++- 8 files changed, 82 insertions(+), 89 deletions(-) (limited to 'src/host') diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index 22e67cbda..9fef03af8 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -56,7 +56,7 @@ #endif #if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX -#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_NONE | OPT_MODE_HIGH_SPEED) +#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST | OPT_MODE_HIGH_SPEED) #else #define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE #endif @@ -82,32 +82,15 @@ //-------------------------------------------------------------------- // DEVICE CONFIGURATION //-------------------------------------------------------------------- -#define CFG_TUD_ENDOINT0_SIZE 64 -/*------------- Descriptors -------------*/ +#define CFG_TUSB_HOST_HUB 0 +#define CFG_TUSB_HOST_HID_KEYBOARD 0 +#define CFG_TUSB_HOST_HID_MOUSE 0 +#define CFG_TUSB_HOST_HID_GENERIC 0 // (not yet supported) +#define CFG_TUSB_HOST_MSC 0 +#define CFG_TUSB_HOST_CDC 0 -/* Enable auto generated descriptor, tinyusb will try its best to create - * descriptor ( device, configuration, hid ) that matches enabled CFG_* in this file - * - * Note: All CFG_TUD_DESC_* are relevant only if CFG_TUD_DESC_AUTO is enabled - */ -#define CFG_TUD_DESC_AUTO 1 - -/* If USB VID/PID is not defined, tinyusb will use default value - * Note: different class combination e.g CDC and (CDC + MSC) should have different - * PID since Host OS will "remembered" device driver after the first plug */ -// #define CFG_TUD_DESC_VID 0xCAFE -// #define CFG_TUD_DESC_PID 0x0001 - -// LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number -// Therefor we need to force endpoint number to correct type on lpc17xx -#if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX -#define CFG_TUD_DESC_CDC_EPNUM_NOTIF 1 -#define CFG_TUD_DESC_CDC_EPNUM 2 -#define CFG_TUD_DESC_MSC_EPNUM 5 -#define CFG_TUD_DESC_HID_KEYBOARD_EPNUM 4 -#define CFG_TUD_DESC_HID_MOUSE_EPNUM 7 -#endif +#define CFG_TUSB_HOST_DEVICE_MAX (CFG_TUSB_HOST_HUB ? 5 : 1) // normal hub has 4 ports //------------- CLASS -------------// #define CFG_TUD_CDC 0 diff --git a/src/device/usbd.c b/src/device/usbd.c index 78eebf76b..121ee3da9 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -298,7 +298,7 @@ static void usbd_task_body(void) /* USB device task * Thread that handles all device events. With an real RTOS, the task must be a forever loop and never return. - * For codign convenience with no RTOS, we use wrapped sub-function for processing to easily return at any time. + * For coding convenience with no RTOS, we use wrapped sub-function for processing to easily return at any time. */ void usbd_task( void* param) { diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 27808d59b..491651f5c 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -42,7 +42,6 @@ //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ -#include "hal/hal.h" #include "osal/osal.h" #include "../hcd.h" diff --git a/src/host/usbh.c b/src/host/usbh.c index a0aab3b96..3bb90e71d 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -42,10 +42,19 @@ #define _TINY_USB_SOURCE_FILE_ -#ifndef CFG_TUD_TASK_PRIO -#define CFG_TUD_TASK_PRIO 0 +#ifndef CFG_TUH_TASK_QUEUE_SZ +#define CFG_TUH_TASK_QUEUE_SZ 16 #endif +#ifndef CFG_TUH_TASK_STACK_SZ +#define CFG_TUH_TASK_STACK_SZ 200 +#endif + +#ifndef CFG_TUH_TASK_PRIO +#define CFG_TUH_TASK_PRIO 0 +#endif + + //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ @@ -111,10 +120,13 @@ enum { USBH_CLASS_DRIVER_COUNT = sizeof(usbh_class_drivers) / sizeof(host_class_ //--------------------------------------------------------------------+ CFG_TUSB_MEM_SECTION usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; // including zero-address -//------------- Enumeration Task Data -------------/ -enum { ENUM_QUEUE_DEPTH = 16 }; +OSAL_TASK_DEF(_usbh_task_def, "usbh", usbh_task, CFG_TUH_TASK_PRIO, CFG_TUH_TASK_STACK_SZ); + +// Event queue +// role device/host is used by OS NONE for mutex (disable usb isr) only +OSAL_QUEUE_DEF(OPT_MODE_HOST, _usbh_qdef, CFG_TUH_TASK_QUEUE_SZ, uint32_t); +static osal_queue_t _usbh_q; -STATIC_VAR osal_queue_t enum_queue_hdl; CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4) STATIC_VAR uint8_t enum_data_buffer[CFG_TUSB_HOST_ENUM_BUFFER_SIZE]; //------------- Reporter Task Data -------------// @@ -144,23 +156,21 @@ tusb_error_t usbh_init(void) { tu_memclr(usbh_devices, sizeof(usbh_device_info_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); - TU_ASSERT_ERR( hcd_init() ); - //------------- Enumeration & Reporter Task init -------------// - enum_queue_hdl = osal_queue_create( ENUM_QUEUE_DEPTH, sizeof(uint32_t) ); - TU_ASSERT(enum_queue_hdl, TUSB_ERROR_OSAL_QUEUE_FAILED); + _usbh_q = osal_queue_create( &_usbh_qdef ); + TU_ASSERT(_usbh_q, TUSB_ERROR_OSAL_QUEUE_FAILED); - osal_task_create(usbh_enumeration_task, "usbh", 200, NULL, CFG_TUD_TASK_PRIO); + osal_task_create(&_usbh_task_def); //------------- Semaphore, Mutex for Control Pipe -------------// for(uint8_t i=0; icontrol.sem_hdl = osal_semaphore_create(1, 0); + p_device->control.sem_hdl = osal_semaphore_create(&p_device->control.sem_def); TU_ASSERT(p_device->control.sem_hdl, TUSB_ERROR_OSAL_SEMAPHORE_FAILED); - p_device->control.mutex_hdl = osal_mutex_create(); + p_device->control.mutex_hdl = osal_mutex_create(&p_device->control.mutex_def); TU_ASSERT(p_device->control.mutex_hdl, TUSB_ERROR_OSAL_MUTEX_FAILED); } @@ -173,6 +183,8 @@ tusb_error_t usbh_init(void) } } + TU_ASSERT_ERR( hcd_init() ); + return TUSB_ERROR_NONE; } @@ -181,12 +193,13 @@ tusb_error_t usbh_init(void) tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, uint8_t bRequest, uint16_t wValue, uint16_t wIndex, uint16_t wLength, uint8_t* data) { - static tusb_error_t error; // FIXME [CMSIS-RTX] use svc for OS API, error value changed after mutex release at the end of function + // FIXME [CMSIS-RTX] use svc for OS API, error value changed after mutex release at the end of function + static tusb_error_t error; - OSAL_SUBTASK_BEGIN +// OSAL_SUBTASK_BEGIN - osal_mutex_wait(usbh_devices[dev_addr].control.mutex_hdl, OSAL_TIMEOUT_NORMAL, &error); - STASK_ASSERT_ERR_HDLR(error, osal_mutex_release(usbh_devices[dev_addr].control.mutex_hdl)); + error = osal_mutex_lock(usbh_devices[dev_addr].control.mutex_hdl, OSAL_TIMEOUT_NORMAL); + STASK_ASSERT_ERR_HDLR(error, osal_mutex_unlock(usbh_devices[dev_addr].control.mutex_hdl)); usbh_devices[dev_addr].control.request = (tusb_control_request_t) { {.bmRequestType = bmRequestType}, @@ -195,16 +208,11 @@ tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, .wIndex = wIndex, .wLength = wLength }; - -#ifndef _TEST_ usbh_devices[dev_addr].control.pipe_status = 0; -#else - usbh_devices[dev_addr].control.pipe_status = XFER_RESULT_SUCCESS; // in Test project, mark as complete immediately -#endif error = hcd_pipe_control_xfer(dev_addr, &usbh_devices[dev_addr].control.request, data); - if ( TUSB_ERROR_NONE == error ) osal_semaphore_wait(usbh_devices[dev_addr].control.sem_hdl, OSAL_TIMEOUT_NORMAL, &error); - osal_mutex_release(usbh_devices[dev_addr].control.mutex_hdl); + if ( TUSB_ERROR_NONE == error ) error = osal_semaphore_wait(usbh_devices[dev_addr].control.sem_hdl, OSAL_TIMEOUT_NORMAL); + osal_mutex_unlock(usbh_devices[dev_addr].control.mutex_hdl); STASK_ASSERT_ERR(error); if (XFER_RESULT_STALLED == usbh_devices[dev_addr].control.pipe_status) STASK_RETURN(TUSB_ERROR_USBH_XFER_STALLED); @@ -214,10 +222,9 @@ tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, // XFER_RESULT_SUCCESS == usbh_devices[dev_addr].control.pipe_status, // tuh_device_mount_failed_cb(TUSB_ERROR_USBH_MOUNT_DEVICE_NOT_RESPOND, NULL) ); - OSAL_SUBTASK_END +// OSAL_SUBTASK_END } -tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) ATTR_ALWAYS_INLINE; tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) { osal_semaphore_reset( usbh_devices[dev_addr].control.sem_hdl ); @@ -228,7 +235,6 @@ tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) return TUSB_ERROR_NONE; } -static inline tusb_error_t usbh_pipe_control_close(uint8_t dev_addr) ATTR_ALWAYS_INLINE; static inline tusb_error_t usbh_pipe_control_close(uint8_t dev_addr) { TU_ASSERT_ERR( hcd_pipe_control_close(dev_addr) ); @@ -263,13 +269,13 @@ void usbh_xfer_isr(pipe_handle_t pipe_hdl, uint8_t class_code, xfer_result_t eve { usbh_devices[ pipe_hdl.dev_addr ].control.pipe_status = event; // usbh_devices[ pipe_hdl.dev_addr ].control.xferred_bytes = xferred_bytes; not yet neccessary - osal_semaphore_post( usbh_devices[ pipe_hdl.dev_addr ].control.sem_hdl ); + osal_semaphore_post( usbh_devices[ pipe_hdl.dev_addr ].control.sem_hdl, true ); }else if (usbh_class_drivers[class_index].isr) { usbh_class_drivers[class_index].isr(pipe_hdl, event, xferred_bytes); }else { - TU_ASSERT(false); // something wrong, no one claims the isr's source + TU_ASSERT(false, ); // something wrong, no one claims the isr's source } } @@ -282,7 +288,7 @@ void usbh_hub_port_plugged_isr(uint8_t hub_addr, uint8_t hub_port) .hub_port = hub_port }; - osal_queue_send(enum_queue_hdl, &enum_entry); + osal_queue_send(_usbh_q, &enum_entry, true); } void usbh_hcd_rhport_plugged_isr(uint8_t hostid) @@ -294,7 +300,7 @@ void usbh_hcd_rhport_plugged_isr(uint8_t hostid) .hub_port = 0 }; - osal_queue_send(enum_queue_hdl, &enum_entry); + osal_queue_send(_usbh_q, &enum_entry, true); } // a device unplugged on hostid, hub_addr, hub_port @@ -346,33 +352,13 @@ void usbh_hcd_rhport_unplugged_isr(uint8_t hostid) .hub_port = 0 }; - osal_queue_send(enum_queue_hdl, &enum_entry); + osal_queue_send(_usbh_q, &enum_entry, true); } //--------------------------------------------------------------------+ // ENUMERATION TASK //--------------------------------------------------------------------+ -static tusb_error_t enumeration_body_subtask(void); - -// To enable the TASK_ASSERT style (quick return on false condition) in a real RTOS, a task must act as a wrapper -// and is used mainly to call subtasks. Within a subtask return statement can be called freely, the task with -// forever loop cannot have any return at all. -void usbh_enumeration_task(void* param) -{ - (void) param; - -#if CFG_TUSB_OS != OPT_OS_NONE - while (1) { -#endif - - enumeration_body_subtask(); - -#if CFG_TUSB_OS != OPT_OS_NONE - } -#endif -} - -tusb_error_t enumeration_body_subtask(void) +tusb_error_t usbh_task_body(void) { enum { POWER_STABLE_DELAY = 500, @@ -387,10 +373,9 @@ tusb_error_t enumeration_body_subtask(void) static uint8_t configure_selected = 1; // TODO move static uint8_t *p_desc = NULL; // TODO move - OSAL_SUBTASK_BEGIN +// OSAL_SUBTASK_BEGIN - osal_queue_receive(enum_queue_hdl, &enum_entry, OSAL_TIMEOUT_WAIT_FOREVER, &error); - STASK_ASSERT_ERR(error); + if ( !osal_queue_receive(_usbh_q, &enum_entry) ) return; usbh_devices[0].core_id = enum_entry.core_id; // TODO refractor integrate to device_pool usbh_devices[0].hub_addr = enum_entry.hub_addr; @@ -617,7 +602,27 @@ tusb_error_t enumeration_body_subtask(void) tuh_device_mount_succeed_cb(new_addr); - OSAL_SUBTASK_END +// OSAL_SUBTASK_END +} + + +/* USB Host task + * Thread that handles all device events. With an real RTOS, the task must be a forever loop and never return. + * For coding convenience with no RTOS, we use wrapped sub-function for processing to easily return at any time. + */ +void usbh_task(void* param) +{ + (void) param; + +#if CFG_TUSB_OS != OPT_OS_NONE + while (1) { +#endif + + usbh_task_body(); + +#if CFG_TUSB_OS != OPT_OS_NONE + } +#endif } //--------------------------------------------------------------------+ diff --git a/src/host/usbh.h b/src/host/usbh.h index 56efb6ff7..22c85a5d0 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -97,7 +97,7 @@ ATTR_WEAK void tuh_device_mount_failed_cb(tusb_error_t error, tusb_desc_devic //--------------------------------------------------------------------+ #ifdef _TINY_USB_SOURCE_FILE_ -void usbh_enumeration_task(void* param); +void usbh_task(void* param); tusb_error_t usbh_init(void); tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, uint8_t bRequest, diff --git a/src/host/usbh_hcd.h b/src/host/usbh_hcd.h index f6b72273a..cd2a712e4 100644 --- a/src/host/usbh_hcd.h +++ b/src/host/usbh_hcd.h @@ -91,7 +91,10 @@ typedef struct { // uint8_t xferred_bytes; TODO not yet necessary tusb_control_request_t request; + osal_semaphore_def_t sem_def; osal_semaphore_t sem_hdl; // used to synchronize with HCD when control xfer complete + + osal_mutex_def_t mutex_def; osal_mutex_t mutex_hdl; // used to exclusively occupy control pipe } control; } usbh_device_info_t; diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h index 704aafd64..458e54b5c 100644 --- a/src/osal/osal_freertos.h +++ b/src/osal/osal_freertos.h @@ -107,10 +107,10 @@ static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) return in_isr ? xSemaphoreGiveFromISR(sem_hdl, NULL) : xSemaphoreGive(sem_hdl); } -static inline void osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec, uint32_t *err) +static inline tusb_error_t osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) { uint32_t const ticks = (msec == OSAL_TIMEOUT_WAIT_FOREVER) ? portMAX_DELAY : pdMS_TO_TICKS(msec); - (*err) = (xSemaphoreTake(sem_hdl, ticks) ? TUSB_ERROR_NONE : TUSB_ERROR_OSAL_TIMEOUT); + return (xSemaphoreTake(sem_hdl, ticks) ? TUSB_ERROR_NONE : TUSB_ERROR_OSAL_TIMEOUT); } static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) diff --git a/src/tusb.c b/src/tusb.c index fe4dbb2c1..6d2b92dc8 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -39,14 +39,17 @@ #include "tusb_option.h" #if TUSB_OPT_HOST_ENABLED || TUSB_OPT_DEVICE_ENABLED - #define _TINY_USB_SOURCE_FILE_ #include "tusb.h" -#include "device/usbd_pvt.h" static bool _initialized = false; +// TODO clean up +#if TUSB_OPT_DEVICE_ENABLED +#include "device/usbd_pvt.h" +#endif + bool tusb_init(void) { // skip if already initialized @@ -69,7 +72,7 @@ bool tusb_init(void) void tusb_task(void) { #if MODE_HOST_SUPPORTED - usbh_enumeration_task(NULL); + usbh_task(NULL); #endif #if TUSB_OPT_DEVICE_ENABLED -- cgit v1.3.1 From 2fa32bd949cab0991a55f1e06f842c1d9edb3c93 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 5 Dec 2018 20:39:52 +0700 Subject: able to build host lpc18xx --- src/host/ehci/ehci.c | 4 +- src/host/hcd.h | 3 + src/host/usbh.c | 104 ++++++++++++------------------- src/portable/nxp/lpc18_43/hcd_lpc18_43.c | 58 +++++++++++++++++ 4 files changed, 104 insertions(+), 65 deletions(-) create mode 100644 src/portable/nxp/lpc18_43/hcd_lpc18_43.c (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 491651f5c..1dbf03682 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -956,7 +956,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_si { if (TUSB_SPEED_HIGH == p_qhd->endpoint_speed) { - TU_ASSERT( interval <= 16, VOID_RETURN); + TU_ASSERT( interval <= 16, ); if ( interval < 4) // sub milisecond interval { p_qhd->interval_ms = 0; @@ -969,7 +969,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_si } }else { - TU_ASSERT( 0 != interval, VOID_RETURN); + TU_ASSERT( 0 != interval, ); // Full/Low: 4.12.2.1 (EHCI) case 1 schedule start split at 1 us & complete split at 2,3,4 uframes p_qhd->interrupt_smask = 0x01; p_qhd->non_hs_interrupt_cmask = BIN8(11100); diff --git a/src/host/hcd.h b/src/host/hcd.h index b9f6a1ff7..420b8a001 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -87,6 +87,9 @@ static inline bool pipehandle_is_equal(pipe_handle_t x, pipe_handle_t y) tusb_error_t hcd_init(void) ATTR_WARN_UNUSED_RESULT; void hal_hcd_isr(uint8_t hostid); +void hcd_int_enable (uint8_t rhport); +void hcd_int_disable(uint8_t rhport); + //--------------------------------------------------------------------+ // PIPE API //--------------------------------------------------------------------+ diff --git a/src/host/usbh.c b/src/host/usbh.c index 3bb90e71d..a0df57657 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -373,8 +373,6 @@ tusb_error_t usbh_task_body(void) static uint8_t configure_selected = 1; // TODO move static uint8_t *p_desc = NULL; // TODO move -// OSAL_SUBTASK_BEGIN - if ( !osal_queue_receive(_usbh_q, &enum_entry) ) return; usbh_devices[0].core_id = enum_entry.core_id; // TODO refractor integrate to device_pool @@ -386,10 +384,12 @@ tusb_error_t usbh_task_body(void) if ( usbh_devices[0].hub_addr == 0) { if( hcd_port_connect_status(usbh_devices[0].core_id) ) - { // connection event + { + // connection event osal_task_delay(POWER_STABLE_DELAY); // wait until device is stable. Increase this if the first 8 bytes is failed to get - if ( !hcd_port_connect_status(usbh_devices[0].core_id) ) STASK_RETURN(TUSB_ERROR_NONE); // exit if device unplugged while delaying + // exit if device unplugged while delaying + if ( !hcd_port_connect_status(usbh_devices[0].core_id) ) return TUSB_ERROR_NONE; hcd_port_reset( usbh_devices[0].core_id ); // port must be reset to have correct speed operation osal_task_delay(RESET_DELAY); @@ -399,7 +399,7 @@ tusb_error_t usbh_task_body(void) else { // disconnection event usbh_device_unplugged(usbh_devices[0].core_id, 0, 0); - STASK_RETURN(TUSB_ERROR_NONE); // restart task + return TUSB_ERROR_NONE; // restart task } } #if CFG_TUSB_HOST_HUB @@ -445,21 +445,19 @@ tusb_error_t usbh_task_body(void) } #endif - STASK_ASSERT_ERR( usbh_pipe_control_open(0, 8) ); + TU_ASSERT_ERR( usbh_pipe_control_open(0, 8) ); usbh_devices[0].state = TUSB_DEVICE_STATE_ADDRESSED; //------------- Get first 8 bytes of device descriptor to get Control Endpoint Size -------------// - STASK_INVOKE( - usbh_control_xfer_subtask( 0, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_DEVICE << 8), 0, - 8, enum_data_buffer ), - error - ); + error = usbh_control_xfer_subtask( 0, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), + TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_DEVICE << 8), 0, + 8, enum_data_buffer ); //------------- Reset device again before Set Address -------------// if (usbh_devices[0].hub_addr == 0) - { // connected directly to roothub - STASK_ASSERT_ERR(error); // TODO some slow device is observed to fail the very fist controller xfer, can try more times + { + // connected directly to roothub + TU_ASSERT_ERR(error); // TODO some slow device is observed to fail the very fist controller xfer, can try more times hcd_port_reset( usbh_devices[0].core_id ); // reset port after 8 byte descriptor osal_task_delay(RESET_DELAY); } @@ -480,15 +478,12 @@ tusb_error_t usbh_task_body(void) //------------- Set new address -------------// new_addr = get_new_address(); - STASK_ASSERT(new_addr <= CFG_TUSB_HOST_DEVICE_MAX); // TODO notify application we reach max devices - - STASK_INVOKE( - usbh_control_xfer_subtask( 0, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_SET_ADDRESS, new_addr, 0, - 0, NULL ), - error - ); - STASK_ASSERT_ERR(error); + TU_ASSERT(new_addr <= CFG_TUSB_HOST_DEVICE_MAX); // TODO notify application we reach max devices + + error = usbh_control_xfer_subtask( 0, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), + TUSB_REQ_SET_ADDRESS, new_addr, 0, + 0, NULL ); + TU_ASSERT_ERR(error); //------------- update port info & close control pipe of addr0 -------------// usbh_devices[new_addr].core_id = usbh_devices[0].core_id; @@ -501,16 +496,13 @@ tusb_error_t usbh_task_body(void) usbh_devices[0].state = TUSB_DEVICE_STATE_UNPLUG; // open control pipe for new address - STASK_ASSERT_ERR ( usbh_pipe_control_open(new_addr, ((tusb_desc_device_t*) enum_data_buffer)->bMaxPacketSize0 ) ); + TU_ASSERT_ERR ( usbh_pipe_control_open(new_addr, ((tusb_desc_device_t*) enum_data_buffer)->bMaxPacketSize0 ) ); //------------- Get full device descriptor -------------// - STASK_INVOKE( - usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_DEVICE << 8), 0, - 18, enum_data_buffer ), - error - ); - STASK_ASSERT_ERR(error); + error = usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), + TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_DEVICE << 8), 0, + 18, enum_data_buffer ); + TU_ASSERT_ERR(error); // update device info TODO alignment issue usbh_devices[new_addr].vendor_id = ((tusb_desc_device_t*) enum_data_buffer)->idVendor; @@ -518,39 +510,30 @@ tusb_error_t usbh_task_body(void) usbh_devices[new_addr].configure_count = ((tusb_desc_device_t*) enum_data_buffer)->bNumConfigurations; configure_selected = get_configure_number_for_device((tusb_desc_device_t*) enum_data_buffer); - STASK_ASSERT(configure_selected <= usbh_devices[new_addr].configure_count); // TODO notify application when invalid configuration + TU_ASSERT(configure_selected <= usbh_devices[new_addr].configure_count); // TODO notify application when invalid configuration //------------- Get 9 bytes of configuration descriptor -------------// - STASK_INVOKE( - usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_CONFIGURATION << 8) | (configure_selected - 1), 0, - 9, enum_data_buffer ), - error - ); - STASK_ASSERT_ERR(error); - STASK_ASSERT_HDLR( CFG_TUSB_HOST_ENUM_BUFFER_SIZE >= ((tusb_desc_configuration_t*)enum_data_buffer)->wTotalLength, - tuh_device_mount_failed_cb(TUSB_ERROR_USBH_MOUNT_CONFIG_DESC_TOO_LONG, NULL) ); + error = usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), + TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_CONFIGURATION << 8) | (configure_selected - 1), 0, + 9, enum_data_buffer ); + TU_ASSERT_ERR(error); + TU_VERIFY_HDLR( CFG_TUSB_HOST_ENUM_BUFFER_SIZE >= ((tusb_desc_configuration_t*)enum_data_buffer)->wTotalLength, + tuh_device_mount_failed_cb(TUSB_ERROR_USBH_MOUNT_CONFIG_DESC_TOO_LONG, NULL) ); //------------- Get full configuration descriptor -------------// - STASK_INVOKE( - usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_CONFIGURATION << 8) | (configure_selected - 1), 0, - CFG_TUSB_HOST_ENUM_BUFFER_SIZE, enum_data_buffer ), - error - ); - STASK_ASSERT_ERR(error); + error = usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), + TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_CONFIGURATION << 8) | (configure_selected - 1), 0, + CFG_TUSB_HOST_ENUM_BUFFER_SIZE, enum_data_buffer ); + TU_ASSERT_ERR(error); // update configuration info usbh_devices[new_addr].interface_count = ((tusb_desc_configuration_t*) enum_data_buffer)->bNumInterfaces; //------------- Set Configure -------------// - STASK_INVOKE( - usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_SET_CONFIGURATION, configure_selected, 0, - 0, NULL ), - error - ); - STASK_ASSERT_ERR(error); + error = usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), + TUSB_REQ_SET_CONFIGURATION, configure_selected, 0, + 0, NULL ); + TU_ASSERT_ERR(error); usbh_devices[new_addr].state = TUSB_DEVICE_STATE_CONFIGURED; @@ -571,7 +554,7 @@ tusb_error_t usbh_task_body(void) static uint8_t class_index; // has to be static as it is used to call class's open_subtask class_index = std_class_code_to_index( ((tusb_desc_interface_t*) p_desc)->bInterfaceClass ); - STASK_ASSERT( class_index != 0 ); // class_index == 0 means corrupted data, abort enumeration + TU_ASSERT( class_index != 0 ); // class_index == 0 means corrupted data, abort enumeration if (usbh_class_drivers[class_index].open_subtask && !(class_index == TUSB_CLASS_HUB && usbh_devices[new_addr].hub_addr != 0)) @@ -579,14 +562,11 @@ tusb_error_t usbh_task_body(void) static uint16_t length; length = 0; - STASK_INVOKE ( // parameters in task/sub_task must be static storage (static or global) - usbh_class_drivers[class_index].open_subtask( new_addr, (tusb_desc_interface_t*) p_desc, &length ), - error - ); + error = usbh_class_drivers[class_index].open_subtask( new_addr, (tusb_desc_interface_t*) p_desc, &length ); if (error == TUSB_ERROR_NONE) { - STASK_ASSERT( length >= sizeof(tusb_desc_interface_t) ); + TU_ASSERT( length >= sizeof(tusb_desc_interface_t) ); usbh_devices[new_addr].flag_supported_class |= BIT_(class_index); p_desc += length; }else // Interface open failed, for example a subclass is not supported @@ -601,8 +581,6 @@ tusb_error_t usbh_task_body(void) } tuh_device_mount_succeed_cb(new_addr); - -// OSAL_SUBTASK_END } diff --git a/src/portable/nxp/lpc18_43/hcd_lpc18_43.c b/src/portable/nxp/lpc18_43/hcd_lpc18_43.c new file mode 100644 index 000000000..6a5820b1a --- /dev/null +++ b/src/portable/nxp/lpc18_43/hcd_lpc18_43.c @@ -0,0 +1,58 @@ +/**************************************************************************/ +/*! + @file hcd_lpc18_43.c + @author hathach (tinyusb.org) + + @section LICENSE + + Software License Agreement (BSD License) + + Copyright (c) 2018, hathach (tinyusb.org) + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + 1. Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + 3. Neither the name of the copyright holders nor the + names of its contributors may be used to endorse or promote products + derived from this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY + EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY + DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + This file is part of the tinyusb stack. +*/ +/**************************************************************************/ + +#include "tusb_option.h" + +#if TUSB_OPT_HOST_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX) + + + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM DECLARATION +//--------------------------------------------------------------------+ + +void hcd_int_enable(uint8_t rhport) +{ + NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn); +} + +void hcd_int_disable(uint8_t rhport) +{ + NVIC_DisableIRQ(rhport ? USB1_IRQn : USB0_IRQn); +} +#endif -- cgit v1.3.1 From 5a7493ed42d4aa2519e7e3377ed7168a2ceca373 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 5 Dec 2018 21:12:10 +0700 Subject: fix more host build error --- examples/host/cdc_msc_hid/src/main.c | 4 ++-- src/host/ehci/ehci.c | 3 +-- src/host/usbh.c | 25 +++++++++++++------------ src/host/usbh.h | 2 +- src/osal/osal_none.h | 6 ++++++ src/tusb.c | 2 +- 6 files changed, 24 insertions(+), 18 deletions(-) (limited to 'src/host') diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c index a8a34ef8f..2459ec329 100644 --- a/examples/host/cdc_msc_hid/src/main.c +++ b/examples/host/cdc_msc_hid/src/main.c @@ -58,11 +58,11 @@ int main(void) board_init(); print_greeting(); - //tusb_init(); + tusb_init(); while (1) { - //tusb_task(); + tusb_task(); led_blinking_task(); diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 1dbf03682..abf5e5613 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -180,9 +180,8 @@ static tusb_error_t hcd_controller_init(uint8_t hostid) //------------- CTRLDSSEGMENT Register (skip) -------------// //------------- USB INT Register -------------// regs->usb_int_enable = 0; // 1. disable all the interrupt -#ifndef _TEST_ // the fake controller does not have write-to-clear behavior regs->usb_sts = EHCI_INT_MASK_ALL; // 2. clear all status -#endif + regs->usb_int_enable = EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | #if EHCI_PERIODIC_LIST EHCI_INT_MASK_NXP_PERIODIC | diff --git a/src/host/usbh.c b/src/host/usbh.c index a0df57657..80e59037f 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -152,13 +152,13 @@ uint32_t tuh_device_get_mounted_class_flag(uint8_t dev_addr) //--------------------------------------------------------------------+ // CLASS-USBD API (don't require to verify parameters) //--------------------------------------------------------------------+ -tusb_error_t usbh_init(void) +bool usbh_init(void) { tu_memclr(usbh_devices, sizeof(usbh_device_info_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); //------------- Enumeration & Reporter Task init -------------// _usbh_q = osal_queue_create( &_usbh_qdef ); - TU_ASSERT(_usbh_q, TUSB_ERROR_OSAL_QUEUE_FAILED); + TU_ASSERT(_usbh_q != NULL); osal_task_create(&_usbh_task_def); @@ -168,10 +168,10 @@ tusb_error_t usbh_init(void) usbh_device_info_t * const p_device = &usbh_devices[i]; p_device->control.sem_hdl = osal_semaphore_create(&p_device->control.sem_def); - TU_ASSERT(p_device->control.sem_hdl, TUSB_ERROR_OSAL_SEMAPHORE_FAILED); + TU_ASSERT(p_device->control.sem_hdl != NULL); p_device->control.mutex_hdl = osal_mutex_create(&p_device->control.mutex_def); - TU_ASSERT(p_device->control.mutex_hdl, TUSB_ERROR_OSAL_MUTEX_FAILED); + TU_ASSERT(p_device->control.mutex_hdl != NULL); } //------------- class init -------------// @@ -183,9 +183,10 @@ tusb_error_t usbh_init(void) } } - TU_ASSERT_ERR( hcd_init() ); + TU_ASSERT( hcd_init() == TUSB_ERROR_NONE ); + hcd_int_enable(TUH_OPT_RHPORT); - return TUSB_ERROR_NONE; + return true; } //------------- USBH control transfer -------------// @@ -199,7 +200,7 @@ tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, // OSAL_SUBTASK_BEGIN error = osal_mutex_lock(usbh_devices[dev_addr].control.mutex_hdl, OSAL_TIMEOUT_NORMAL); - STASK_ASSERT_ERR_HDLR(error, osal_mutex_unlock(usbh_devices[dev_addr].control.mutex_hdl)); + TU_VERIFY_ERR_HDLR(error, osal_mutex_unlock(usbh_devices[dev_addr].control.mutex_hdl)); usbh_devices[dev_addr].control.request = (tusb_control_request_t) { {.bmRequestType = bmRequestType}, @@ -214,9 +215,9 @@ tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, if ( TUSB_ERROR_NONE == error ) error = osal_semaphore_wait(usbh_devices[dev_addr].control.sem_hdl, OSAL_TIMEOUT_NORMAL); osal_mutex_unlock(usbh_devices[dev_addr].control.mutex_hdl); - STASK_ASSERT_ERR(error); - if (XFER_RESULT_STALLED == usbh_devices[dev_addr].control.pipe_status) STASK_RETURN(TUSB_ERROR_USBH_XFER_STALLED); - if (XFER_RESULT_FAILED == usbh_devices[dev_addr].control.pipe_status) STASK_RETURN(TUSB_ERROR_USBH_XFER_FAILED); + TU_ASSERT_ERR(error); + if (XFER_RESULT_STALLED == usbh_devices[dev_addr].control.pipe_status) return (TUSB_ERROR_USBH_XFER_STALLED); + if (XFER_RESULT_FAILED == usbh_devices[dev_addr].control.pipe_status) return (TUSB_ERROR_USBH_XFER_FAILED); // STASK_ASSERT_HDLR(TUSB_ERROR_NONE == error && // XFER_RESULT_SUCCESS == usbh_devices[dev_addr].control.pipe_status, @@ -228,7 +229,7 @@ tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) { osal_semaphore_reset( usbh_devices[dev_addr].control.sem_hdl ); - osal_mutex_reset( usbh_devices[dev_addr].control.mutex_hdl ); + //osal_mutex_reset( usbh_devices[dev_addr].control.mutex_hdl ); TU_ASSERT_ERR( hcd_pipe_control_open(dev_addr, max_packet_size) ); @@ -373,7 +374,7 @@ tusb_error_t usbh_task_body(void) static uint8_t configure_selected = 1; // TODO move static uint8_t *p_desc = NULL; // TODO move - if ( !osal_queue_receive(_usbh_q, &enum_entry) ) return; + if ( !osal_queue_receive(_usbh_q, &enum_entry) ) return TUSB_ERROR_NONE; usbh_devices[0].core_id = enum_entry.core_id; // TODO refractor integrate to device_pool usbh_devices[0].hub_addr = enum_entry.hub_addr; diff --git a/src/host/usbh.h b/src/host/usbh.h index 22c85a5d0..f4433ae31 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -97,8 +97,8 @@ ATTR_WEAK void tuh_device_mount_failed_cb(tusb_error_t error, tusb_desc_devic //--------------------------------------------------------------------+ #ifdef _TINY_USB_SOURCE_FILE_ +bool usbh_init(void); void usbh_task(void* param); -tusb_error_t usbh_init(void); tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, uint8_t bRequest, uint16_t wValue, uint16_t wIndex, uint16_t wLength, uint8_t* data); diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h index 4d5a4dd57..042c7a6e8 100644 --- a/src/osal/osal_none.h +++ b/src/osal/osal_none.h @@ -62,6 +62,12 @@ static inline bool osal_task_create(osal_task_def_t* taskdef) return true; } +static inline void osal_task_delay(uint32_t msec) +{ + uint32_t start = tusb_hal_millis(); + while ( ( tusb_hal_millis() - start ) < msec ) {} +} + //--------------------------------------------------------------------+ // Binary Semaphore API //--------------------------------------------------------------------+ diff --git a/src/tusb.c b/src/tusb.c index 6d2b92dc8..931cc0ebe 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -56,7 +56,7 @@ bool tusb_init(void) if (_initialized) return true; #if MODE_HOST_SUPPORTED - TU_VERIFY( usbh_init() == TUSB_ERROR_NONE ); // init host stack + TU_VERIFY( usbh_init() ); // init host stack #endif #if TUSB_OPT_DEVICE_ENABLED -- cgit v1.3.1 From 5b09774ae05d15cb18ff9920864535b8444a1c3c Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 6 Dec 2018 21:46:34 +0700 Subject: clean up usbh, rename doxygen folder to docs --- docs/changelog.md | 5 + docs/coding_standard.md | 80 +++++++++++++ docs/configuration.txt | 77 +++++++++++++ docs/getting_started.md | 63 +++++++++++ docs/group_def.txt | 22 ++++ docs/header.html | 58 ++++++++++ docs/porting.md | 167 ++++++++++++++++++++++++++++ docs/started_demo.md | 48 ++++++++ doxygen/changelog.md | 5 - doxygen/coding_standard.md | 80 ------------- doxygen/configuration.txt | 77 ------------- doxygen/getting_started.md | 63 ----------- doxygen/group_def.txt | 22 ---- doxygen/header.html | 58 ---------- doxygen/porting.md | 167 ---------------------------- doxygen/started_demo.md | 48 -------- examples/host/cdc_msc_hid/src/tusb_config.h | 4 +- examples/obsolete/host/src/main.c | 2 +- examples/obsolete/host/src/tusb_config.h | 4 +- src/host/hcd.c | 44 -------- src/host/hcd.h | 35 +++++- src/host/hub.c | 2 +- src/host/usbh.c | 93 ++++++++-------- src/host/usbh.h | 2 +- src/tusb_option.h | 2 +- tests/support/tusb_config.h | 2 +- 26 files changed, 606 insertions(+), 624 deletions(-) create mode 100644 docs/changelog.md create mode 100644 docs/coding_standard.md create mode 100644 docs/configuration.txt create mode 100644 docs/getting_started.md create mode 100644 docs/group_def.txt create mode 100644 docs/header.html create mode 100644 docs/porting.md create mode 100644 docs/started_demo.md delete mode 100644 doxygen/changelog.md delete mode 100644 doxygen/coding_standard.md delete mode 100644 doxygen/configuration.txt delete mode 100644 doxygen/getting_started.md delete mode 100644 doxygen/group_def.txt delete mode 100644 doxygen/header.html delete mode 100644 doxygen/porting.md delete mode 100644 doxygen/started_demo.md delete mode 100644 src/host/hcd.c (limited to 'src/host') diff --git a/docs/changelog.md b/docs/changelog.md new file mode 100644 index 000000000..a98db8a17 --- /dev/null +++ b/docs/changelog.md @@ -0,0 +1,5 @@ +# Change Log # + +## 0.4 ## + +Initial release. \ No newline at end of file diff --git a/docs/coding_standard.md b/docs/coding_standard.md new file mode 100644 index 000000000..3eb3c0d7d --- /dev/null +++ b/docs/coding_standard.md @@ -0,0 +1,80 @@ +# Coding Standards # + +C is a dangerous language by itself, plus tinyusb make use of goodies features of C99, which saves a tons of code lines (also means save a tons of bugs). However, those features can be misused and pave the way for bugs sneaking into. Therefore, to minimize bugs, the author try to comply with published Coding Standards like: + +- [MISRA-C](http://www.misra-c.com/Activities/MISRAC/tabid/160/Default.aspx) +- [Power of 10](http://spinroot.com/p10/) +- [Jet Propulsion Laboratory (JPL) for C](http://lars-lab.jpl.nasa.gov) + +Where is possible, standards are followed but it is almost impossible to follow all of these without making some exceptions. I am pretty sure this code base violates more than what are described below, if you can find any, please report it to me or file an issue on github. + +## MISRA-C 2004 Exceptions ## + +MISRA-C is well respected & a bar for industrial coding standard. + +- **Rule 2.2: use only** + + It has long passed the day that C99 comment style // will cause any issues, especially compiler's C99 mode is required to build tinyusb. + +- **Rule 8.5: No definitions of objects or function in a header file** + + function definitions in header files are used to allow 'inlining' + +- **Rule 14.7: A function shall have a single point of exit at the end of the function** + + Unfortunately, following this rule will have a lot of nesting if-else, I prefer to exit as soon as possible with assert style and flatten if-else. + +- **Rule 18.4: Unions shall not be used** + + sorry MISRA, union is required to effectively mapped to MCU's registers + +- expect to have more & more exceptions. + +## Power of 10 ## + +is a small & easy to remember but yet powerful coding guideline. Most (if not all) of the rules here are included in JPL. Because it is very small, all the rules will be listed here, those with *italic* are compliant, **bold** are violated. + +1. *Restrict to simple control flow constructs* + + yes, I hate goto statement, therefore there is none of those here + +2. *Give all loops a fixed upper-bound* + + one of my favorite rule + +3. *Do not use dynamic memory allocation after initialization* + + the tinyusb uses the static memory for all of its data. + +4. **Limit functions to no more than 60 lines of text** + + 60 is a little bit too strict, I will update the relaxing number later + +5. *Use minimally two assertions per function on average* + + not sure the exact number, but I use a tons of those assert + +6. *Declare data objects at the smallest possible level of scope* + + one of the best & easiest rule to follow + +7. *Check the return value of non-void functions, and check the validity of function parameters* + + I did check all of the public application API's parameters. For internal API, calling function needs to trust their caller to reduce duplicated check. + +8. **Limit the use of the preprocessor to file inclusion and simple macros** + + Although I prefer inline function, however C macros are far powerful than that. I simply cannot hold myself to use, for example X-Macro technique to simplify code. + +9. *Limit the use of pointers. Use no more than two levels of dereferencing per expression* + + never intend to get in trouble with complex pointer dereferencing. + +10. *Compile with all warnings enabled, and use one or more source code analyzers* + + I try to use all the defensive options of gnu, let me know if I miss some. + >-Wextra -Wswitch-default -Wunsafe-loop-optimizations -Wcast-align -Wlogical-op -Wpacked-bitfield-compat -Wnested-externs -Wredundant-decls -Winline + +## JPL ## + +coming soon ... diff --git a/docs/configuration.txt b/docs/configuration.txt new file mode 100644 index 000000000..896c9da6c --- /dev/null +++ b/docs/configuration.txt @@ -0,0 +1,77 @@ +/** \addtogroup group_configuration + * @{ */ + +//--------------------------------------------------------------------+ +// COMMON CONFIGURATION +//--------------------------------------------------------------------+ + +/// \brief tell the stack which mode (host/device/otg) the usb controller0 will be operated on. Possible value is +/// from \ref group_mode. Note the hardware usb controller must support the selected mode. +#define CFG_TUSB_RHPORT0_MODE + +/** USB controller in MCU often has limited access to specific RAM section. The Stack will use this macro to place internal variables + into the USB RAM section as follows. if your mcu's usb controller has no such limit, define CFG_TUSB_MEM_SECTION as empty macro. + + @code + CFG_TUSB_MEM_SECTION uint8_t usb_xfer_buffer[10]; + @endcode + */ +#define CFG_TUSB_MEM_SECTION + +#define CFG_TUSB_MCU ///< Select one of the supported MCU, the value must be from \ref group_mcu +#define CFG_TUSB_OS ///< Select one of the supported RTOS, the value must be from \ref group_supported_os. +#define CFG_TUD_TASK_PRIO ///< If \ref CFG_TUSB_OS is configured to use a real RTOS (other than OPT_OS_NONE). This determines the priority of the usb stack task. + +//--------------------------------------------------------------------+ +// HOST CONFIGURATION +//--------------------------------------------------------------------+ +/** \defgroup CFG_TUSB_HOST Host Options + * @{ */ + +/** \brief Maximum number of device host stack can manage + * \n If hub class is not enabled, set this equal to number of controllers in host mode + * \n If hub class is enabled, make sure hub is also counted */ +#define CFG_TUSB_HOST_DEVICE_MAX + +/// \brief Buffer size used for getting device configuration descriptor. You may want to increase this from default (256) +/// to support lengthy composite device especially with Audio or Video class +#define CFG_TUSB_HOST_ENUM_BUFFER_SIZE + +/** \defgroup config_host_class Class Driver + * \brief For each Class Driver a value of 1 means enable, value of 0 mean disable + * @{ */ +#define CFG_TUH_HUB ///< Enable Hub Class +#define CFG_TUSB_HOST_HID_KEYBOARD ///< Enable HID Class for Keyboard +#define CFG_TUSB_HOST_HID_MOUSE ///< Enable HID Class for Mouse +#define CFG_TUSB_HOST_HID_GENERIC ///< Enable HID Class for Generic (not supported yet) +#define CFG_TUSB_HOST_MSC ///< Enable Mass Storage Class (SCSI subclass only) +#define CFG_TUSB_HOST_CDC ///< Enable Virtual Serial (Communication Device Class) +/** @} */ + +/** @} */ // group Host + +//--------------------------------------------------------------------+ +// DEVICE CONFIGURATION +//--------------------------------------------------------------------+ +/** \defgroup CFG_TUSB_DEVICE Device Options + * @{ */ + +#define CFG_TUD_ENDOINT0_SIZE ///< Max packet size of Cotnrol Endpoint, default is 64 + +/// Application MUST define this variable and initialize its pointers's member to all required USB descriptors including +/// Device Descriptor, Configuration Descriptor, String Descriptors, HID Report Descriptors etc ... +tud_desc_init_t tusbd_descriptor_pointers; + +/** \defgroup config_device_class Class Driver + * \brief For each Class Driver a value of 1 means enable, value of 0 mean disable + * @{ */ +#define CFG_TUD_HID_KEYBOARD ///< Enable HID Class for Keyboard +#define CFG_TUD_HID_MOUSE ///< Enable HID Class for Mouse +#define CFG_TUD_HID_GENERIC ///< Enable HID Class for Generic (not supported yet) +#define CFG_TUD_MSC ///< Enable Mass Storage Class (SCSI subclass only) +#define CFG_TUD_CDC ///< Enable Virtual Serial (Communication Device Class) +/** @} */ + +/** @} */ // group Device + +/** @} */ diff --git a/docs/getting_started.md b/docs/getting_started.md new file mode 100644 index 000000000..6d6091c03 --- /dev/null +++ b/docs/getting_started.md @@ -0,0 +1,63 @@ +# Getting Started # + + + +**Table of Contents** + +- [Download](#download) +- [Add tinyusb to your project](#add-tinyusb-to-your-project) + + + +## Download + +tinyusb uses github as online repository https://github.com/hathach/tinyusb since it is the best place for open source project. + +If you are using Linux, you already know how to what to do. But If Windows is your OS, I would suggest to install [git](http://git-scm.com/) and front-end gui such as [tortoisegit](http://code.google.com/p/tortoisegit) to begin with. + +After downloading/cloning, the code base is composed of + +Folder | Description +----- | ------------- +doxygen | Documentation +examples| Folder where test examples are kept with Makefile and Segger Embedded build support +hw/bsp | Source files of supported boards +hw/mcu | Low level mcu core & peripheral drivers (e.g CMSIS ) +lib | Source files from 3rd party such as freeRTOS, fatfs etc ... +src | All sources files for tinyusb stack itself. +tests | Unit tests for the stack +tools | Files used internally + +*examples* is the folder where all the application & project files are located. There are demos for both device and hosts. For each, there are different projects for each of supported RTOS. Click to have more information on how to [build](../examples/readme.md) and run [device](../examples/device/readme.md) demos. + +## Add tinyusb to your project + +It is relatively simple to incorporate tinyusb to your (existing) project + +1. Copy or `git submodule` this repo into your project in a subfolder. Let's say it is *your_project/tinyusb* +2. Add all the .c in the src folder to your project settings (uvproj, ewp, makefile) +3. Add *your_project/tinysb* to your include path. Also make sure your current include path also contains the configuration file tusb_config.h. Or you could simply put the tusb_config.h into the tinyusb folder as well. +4. Make sure all required macros are all defined properly in tusb_config.h (configure file in demo application is sufficient, but you need to add a few more such as CFG_TUSB_MCU, CFG_TUSB_OS, CFG_TUD_TASK_PRIO since they are passed by IDE/compiler to maintain a unique configure for all demo projects). +5. If you use the device stack, make sure you have created/modified usb descriptors for your own need. Ultimately you need to fill out required pointers in tusbd_descriptor_pointers for that stack to work. +6. Add tusb_init() call to your reset initialization code. +7. Implement all enabled classes's callbacks. +8. If you don't use any RTOSes at all, you need to continuously and/or periodically call tusb_task() function. Most of the callbacks and functionality are handled and invoke within the call of that task runner. + +~~~{.c} +int main(void) +{ + your_init_code(); + tusb_init(); // initialize tinyusb stack + + while(1) // the mainloop + { + your_application_code(); + + tusb_task(); // handle tinyusb event, task etc ... + } +} +~~~ + +[//]: # (\subpage md_boards_readme) +[//]: # (\subpage md_doxygen_started_demo) +[//]: # (\subpage md_tools_readme) diff --git a/docs/group_def.txt b/docs/group_def.txt new file mode 100644 index 000000000..0f5419810 --- /dev/null +++ b/docs/group_def.txt @@ -0,0 +1,22 @@ +// define all the modules group to have the desired ordering since doxygen order module group by +// the order of files it is feed + +/// \defgroup group_demo Demos + +/// \defgroup group_class Application - Class Driver API + +/// \defgroup group_application_api Application - Stack API +/// \brief Non-Class driver API + +/// \defgroup group_configuration Configuration tusb_config.h + +/// \defgroup group_usbd USB Device Core (USBD) + +/// \defgroup group_usbh USB Host Core (USBH) + +/// \defgroup group_osal OS Abstraction Layer (OSAL) + +/// \defgroup group_usb_definitions USB Definitions + +/// \defgroup Group_Common Common Files + diff --git a/docs/header.html b/docs/header.html new file mode 100644 index 000000000..e75be44de --- /dev/null +++ b/docs/header.html @@ -0,0 +1,58 @@ + + + + + + + +$projectname: $title +$title + + + +$treeview +$search +$mathjax + +$extrastylesheet + + +
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+ + diff --git a/docs/porting.md b/docs/porting.md new file mode 100644 index 000000000..5a464fa6b --- /dev/null +++ b/docs/porting.md @@ -0,0 +1,167 @@ +# Porting + +TinyUSB is designed to be a universal USB protocol stack for low-cost 32 bit microcontrollers. It +handles most of the high level USB protocol and relies on the microcontroller's USB peripheral for +data transactions on different endpoints. Porting is the process of adding low-level support for +the rest of the common stack. Once the low-level is implemented, it is very easy to add USB support +for the microcontroller to other projects, especially those already using TinyUSB such as CircuitPython. + +Below are instructions on how to get the cdc_msc_hid device example running on a new microcontroller. Doing so includes adding the common code necessary for other uses while minimizing other extra code. Whenever you see a phrase or word in <> it should be replaced. + +## Register defs + +The first step to adding support is including the register definitions and startup code for the +microcontroller in TinyUSB. We write the TinyUSB implementation against these structs instead of higher level functions to keep the code small and to prevent function name collisions in linking of larger projects. For ARM microcontrollers this is the CMSIS definitions. They should be +placed in the `hw/mcu//` directory. + +Once this is done, create a directory in `hw/bsp/` for the specific board you are using to test the code. (Duplicating an existing board's directory is the best way to get started.) The board should be a readily available development board so that others can also test. + +## Build +Now that those directories are in place, we can start our iteration process to get the example building successfully. To build, run from the root of TinyUSB: + +`make -C examples/device/cdc_msc_hid BOARD=` + +Unless, you've read ahead, this will fail miserably. Now, lets get it to fail less by updating the files in the board directory. The code in the board's directory is responsible for setting up the microcontroller's clocks and pins so that USB works. TinyUSB itself only operates on the USB peripheral. The board directory also includes information what files are needed to build the example. + +One of the first things to change is the `-DCFG_TUSB_MCU` cflag in the `board.mk` file. This is used to tell TinyUSB what platform is being built. So, add an entry to `src/tusb_option.h` and update the CFLAG to match. + +Also, add an entry for the board in `hw/bsp/board.h`. The CFLAG is auto-added. + +Update `board.mk`'s VENDOR and CHIP_FAMILY values when creating the directory for the struct files. Duplicate one of the other sources from `src/portable` into `src/portable//` and delete all of the implementation internals. We'll cover what everything there does later. For now, get it compiling. + +## Implementation +At this point you should get an error due to an implementation issue and hopefully the build is setup for the new MCU. You will still need to modify the `board.mk` to include specific CFLAGS, the linker script, linker flags, source files, include directories. All file paths are relative to the top of the TinyUSB repo. + +### Board Support (BSP) +The board support code is only used for self-contained examples and testing. It is not used when TinyUSB is part of a larger project. Its responsible for getting the MCU started and the USB peripheral clocked. It also optionally provides LED definitions that are used to blink an LED to show that the code is running. + +It is located in `hw/bsp//board_.c`. + +#### board_init +`board_init` is responsible for starting the MCU, setting up the USB clock and USB pins. It is also responsible for initializing LED pins. + +One useful clock debugging technique is to set up a PWM output at a known value such as 500hz based on the USB clock so that you can verify it is correct with a logic probe or oscilloscope. + +Setup your USB in a crystal-less mode when available. That makes the code easier to port across boards. + +#### board_led_control +Feel free to skip this until you want to verify your demo code is running. To implement, set the pin corresponding to the led to output a value that lights the LED when `state` is true. + +### OS Abstraction Layer (OSAL) + +The OS Abstraction Layer is responsible for providing basic data structures for TinyUSB that may allow for concurrency when used with an RTOS. Without an RTOS it simply handles concurrency issues between the main code and interrupts. + +The code is almost entirely agnostic of MCU and lives in `src/osal`. + +#### tusb_hal_millis + +The OPT_OS_NONE option is the only option which requires an MCU specific function. It needs `tusb_hal_millis` to measure the passage of time. On ARM this is commonly done with SysTick. The function returns the elapsed number of milliseconds since startup. + +`tusb_hal_millis` is also provided in `hw/bsp//board_.c` because it may vary with MCU use. + +### Device API + +After the USB device is setup, the USB device code works by processing events on the main thread (by calling `tusb_task`). These events are queued by the USB interrupt handler. So, there are three parts to the device low-level API: device setup, endpoint setup and interrupt processing. + +All of the code for the low-level device API is in `src/portable///dcd_.c`. + +#### Device Setup + +##### dcd_init +Initializes the USB peripheral for device mode and enables it. + +#### dcd_int_enable / dcd_int_disable + +Enables or disables the USB device interrupt(s). May be used to prevent concurrency issues when mutating data structures shared between main code and the interrupt handler. + +##### dcd_set_address +Called when the device is given a new bus address. + +If your peripheral automatically changes address during enumeration (like the nrf52) you may leave this empty and also no queue an event for the corresponding SETUP packet. + +##### dcd_set_config +Called when the device received SET_CONFIG request, you can leave this empty if your peripheral does not require any specific action. + +#### Special events +You must let TinyUSB know when certain events occur so that it can continue its work. There are a few methods you can call to queue events for TinyUSB to process. + +##### dcd_event_bus_signal + +There are a number of events that your peripheral may communicate about the state of the bus. Here is an overview of what they are. Events in **BOLD** must be provided for TinyUSB to work. + +* **DCD_EVENT_RESET** - Triggered when the host resets the bus causing the peripheral to reset. Do any other internal reset you need from the interrupt handler such as resetting the control endpoint. +* DCD_EVENT_SOF - Signals the start of a new USB frame. + +Calls to this look like: + + dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true); + +The first `0` is the USB peripheral number. Statically saying 0 is common for single USB device MCUs. + +The `true` indicates the call is from an interrupt handler and will always be the case when porting in this way. + +##### dcd_setup_received +SETUP packets are a special type of transaction that can occur at any time on the control endpoint, numbered `0`. Since they are unique, most peripherals have special handling for them. Their data is always 8 bytes in length as well. + +Calls to this look like: + + dcd_event_setup_received(0, setup, true); + +As before with `dcd_event_bus_signal` the first argument is the USB peripheral number and the third is true to signal its being called from an interrup handler. The middle argument is byte array of length 8 with the contents of the SETUP packet. It can be stack allocated because it is copied into the queue. + +#### Endpoints + +Endpoints are the core of the USB data transfer process. They come in a few forms such as control, isochronous, bulk, and interrupt. We won't cover the details here except with some caveats in open below. In general, data is transferred by setting up a buffer of a given length to be transferred on a given endpoint address and then waiting for an interrupt to signal that the transfer is finished. Further details below. + +Endpoints within USB have an address which encodes both the number and direction of an endpoint. TinyUSB provides `edpt_number` and `edpt_dir` to unpack this data from the address. Here is a snippet that does it. + + uint8_t epnum = edpt_number(ep_addr); + uint8_t dir = edpt_dir(ep_addr); + +##### dcd_edpt_open + +Opening an endpoint is done for all non-control endpoints once the host picks a configuration that the device should use. At this point, the endpoint should be enabled in the peripheral and configured to match the endpoint descriptor. Pay special attention to the direction of the endpoint you can get from the helper methods above. It will likely change what registers you are setting. + +Also make sure to enable endpoint specific interrupts. + +##### dcd_edpt_xfer + +`dcd_edpt_xfer` is responsible for configuring the peripheral to send or receive data from the host. "xfer" is short for "transfer". **This is one of the core methods you must implement for TinyUSB to work (one other is the interrupt handler).** Data from the host is the OUT direction and data to the host is IN. In other words, direction is relative to the host. + +`dcd_edpt_xfer` is used for all endpoints including the control endpoint 0. Make sure to handle the zero-length packet STATUS packet on endpoint 0 correctly. It may be a special transaction to the peripheral. + +Besides that, all other transactions are relatively straight-forward. The endpoint address provides the endpoint number and direction which usually determines where to write the buffer info. The buffer and its length are usually written to a specific location in memory and the peripheral is told the data is valid. (Maybe by writing a 1 to a register or setting a counter register to 0 for OUT or length for IN.) + +TODO: can we promise the buffer is word aligned? + +One potential pitfall is that the buffer may be longer than the maximum endpoint size of one USB packet. Some peripherals can handle transmitting multiple USB packets for a provided buffer (like the SAMD21). Others (like the nRF52) may need each USB packet queued individually. To make this work you'll need to track some state for yourself and queue up an intermediate USB packet from the interrupt handler. + +Once the transaction is going, the interrupt handler will notify TinyUSB of transfer completion. + +TODO: who handles zero-length data packets? + +##### dcd_xfer_complete + +Once a transfer completes you must call dcd_xfer_complete from the USB interrupt handler to let TinyUSB know that a transaction has completed. Here is a sample call: + + dcd_event_xfer_complete(0, ep_addr, xfer->actual_len, XFER_RESULT_SUCCESS, true); + +The arguments are: +* the USB peripheral number +* the endpoint address +* the actual length of the transfer. (OUT transfers may be smaller than the buffer given in `dcd_edpt_xfer`) +* the result of the transfer. Failure isn't handled yet. +* `true` to note the call is from an interrupt handler. + +##### dcd_edpt_stall / dcd_edpt_stalled / dcd_edpt_clear_stall + +Stalling is one way an endpoint can indicate failure such as when an unsupported command is transmitted. The trio of `dcd_edpt_stall`, `dcd_edpt_stalled`, `dcd_edpt_clear_stall` help manage the stall state of all endpoints. + +## Woohoo! + +At this point you should have everything working! ;-) Of course, you may not write perfect code. Here are some tips and tricks for debugging. + +Use [WireShark](https://www.wireshark.org/) or [a Beagle](https://www.totalphase.com/protocols/usb/) to sniff the USB traffic. When things aren't working its likely very early in the USB enumeration process. Figuring out where can help clue in where the issue is. For example: +* If the host sends a SETUP packet and its not ACKed then your USB peripheral probably isn't started correctly. +* If the peripheral is started correctly but it still didn't work, then verify your usb clock is correct. (You did output a PWM based on it right? ;-) ) +* If the SETUP packet is ACKed but nothing is sent back then you interrupt handler isn't queueing the setup packet correctly. (Also, if you are using your own code instead of an example `tusb_task` may not be called.) If thats OK, the `dcd_xfer_complete` may not be setting up the next transaction correctly. diff --git a/docs/started_demo.md b/docs/started_demo.md new file mode 100644 index 000000000..7e82596f5 --- /dev/null +++ b/docs/started_demo.md @@ -0,0 +1,48 @@ +# Demos # + +For simplicity and user's convenience, there are only 2 basic application demos which are *Device* and *Host* respectively. Each application demo, however, has a few projects, each for its supported RTOS. For instance, in addition to the *src* folder, you will also find in the /demo/device + +- device\_os\_none for no RTOS +- device\_freertos for freeRTOS +- device\_cmsis_rtx for ARM CMSIS with RTX implemenation + +To be able to have the same application code running across RTOSes, the application make use of the "internal" **OSAL layer**. Thus this makes the application code a bit weird and over-complicated than it should be in some (many) cases. This is absolutely not necessary in product development. User can just use the native API function of supported RTOS or a state machine or blocking wait in case of none OS. For example, instead of the blinking task in application + +~~~{.c} +OSAL_TASK_FUNCTION( led_blinking_task , p_task_para) +{ + OSAL_TASK_LOOP_BEGIN + + static uint32_t led_on_mask = 0; + + osal_task_delay(led_blink_interval_ms); + + board_leds(led_on_mask, 1 - led_on_mask); + led_on_mask = 1 - led_on_mask; // toggle + + OSAL_TASK_LOOP_END +} +~~~ + +can be written in FreeRTOS's native API + +~~~{.c} +void led_blinking_task( void * p_task_para ) +{ + while(1) + { + static uint32_t led_on_mask = 0; + + // FreeRTOS API's vTaskDelay is used in place of osal_task_delay. Note it takes input parameter in tick + vTaskDelay( (led_blink_interval_ms * CFG_TUSB_TICKS_HZ) / 1000); + + board_leds(led_on_mask, 1 - led_on_mask); + led_on_mask = 1 - led_on_mask; // toggle + } +} +~~~ + + +[//]: # (\subpage md_demos_readme) +[//]: # (\subpage md_demos_device_readme) +[//]: # (\subpage md_demos_host_readme) \ No newline at end of file diff --git a/doxygen/changelog.md b/doxygen/changelog.md deleted file mode 100644 index a98db8a17..000000000 --- a/doxygen/changelog.md +++ /dev/null @@ -1,5 +0,0 @@ -# Change Log # - -## 0.4 ## - -Initial release. \ No newline at end of file diff --git a/doxygen/coding_standard.md b/doxygen/coding_standard.md deleted file mode 100644 index 3eb3c0d7d..000000000 --- a/doxygen/coding_standard.md +++ /dev/null @@ -1,80 +0,0 @@ -# Coding Standards # - -C is a dangerous language by itself, plus tinyusb make use of goodies features of C99, which saves a tons of code lines (also means save a tons of bugs). However, those features can be misused and pave the way for bugs sneaking into. Therefore, to minimize bugs, the author try to comply with published Coding Standards like: - -- [MISRA-C](http://www.misra-c.com/Activities/MISRAC/tabid/160/Default.aspx) -- [Power of 10](http://spinroot.com/p10/) -- [Jet Propulsion Laboratory (JPL) for C](http://lars-lab.jpl.nasa.gov) - -Where is possible, standards are followed but it is almost impossible to follow all of these without making some exceptions. I am pretty sure this code base violates more than what are described below, if you can find any, please report it to me or file an issue on github. - -## MISRA-C 2004 Exceptions ## - -MISRA-C is well respected & a bar for industrial coding standard. - -- **Rule 2.2: use only** - - It has long passed the day that C99 comment style // will cause any issues, especially compiler's C99 mode is required to build tinyusb. - -- **Rule 8.5: No definitions of objects or function in a header file** - - function definitions in header files are used to allow 'inlining' - -- **Rule 14.7: A function shall have a single point of exit at the end of the function** - - Unfortunately, following this rule will have a lot of nesting if-else, I prefer to exit as soon as possible with assert style and flatten if-else. - -- **Rule 18.4: Unions shall not be used** - - sorry MISRA, union is required to effectively mapped to MCU's registers - -- expect to have more & more exceptions. - -## Power of 10 ## - -is a small & easy to remember but yet powerful coding guideline. Most (if not all) of the rules here are included in JPL. Because it is very small, all the rules will be listed here, those with *italic* are compliant, **bold** are violated. - -1. *Restrict to simple control flow constructs* - - yes, I hate goto statement, therefore there is none of those here - -2. *Give all loops a fixed upper-bound* - - one of my favorite rule - -3. *Do not use dynamic memory allocation after initialization* - - the tinyusb uses the static memory for all of its data. - -4. **Limit functions to no more than 60 lines of text** - - 60 is a little bit too strict, I will update the relaxing number later - -5. *Use minimally two assertions per function on average* - - not sure the exact number, but I use a tons of those assert - -6. *Declare data objects at the smallest possible level of scope* - - one of the best & easiest rule to follow - -7. *Check the return value of non-void functions, and check the validity of function parameters* - - I did check all of the public application API's parameters. For internal API, calling function needs to trust their caller to reduce duplicated check. - -8. **Limit the use of the preprocessor to file inclusion and simple macros** - - Although I prefer inline function, however C macros are far powerful than that. I simply cannot hold myself to use, for example X-Macro technique to simplify code. - -9. *Limit the use of pointers. Use no more than two levels of dereferencing per expression* - - never intend to get in trouble with complex pointer dereferencing. - -10. *Compile with all warnings enabled, and use one or more source code analyzers* - - I try to use all the defensive options of gnu, let me know if I miss some. - >-Wextra -Wswitch-default -Wunsafe-loop-optimizations -Wcast-align -Wlogical-op -Wpacked-bitfield-compat -Wnested-externs -Wredundant-decls -Winline - -## JPL ## - -coming soon ... diff --git a/doxygen/configuration.txt b/doxygen/configuration.txt deleted file mode 100644 index da30786ed..000000000 --- a/doxygen/configuration.txt +++ /dev/null @@ -1,77 +0,0 @@ -/** \addtogroup group_configuration - * @{ */ - -//--------------------------------------------------------------------+ -// COMMON CONFIGURATION -//--------------------------------------------------------------------+ - -/// \brief tell the stack which mode (host/device/otg) the usb controller0 will be operated on. Possible value is -/// from \ref group_mode. Note the hardware usb controller must support the selected mode. -#define CFG_TUSB_RHPORT0_MODE - -/** USB controller in MCU often has limited access to specific RAM section. The Stack will use this macro to place internal variables - into the USB RAM section as follows. if your mcu's usb controller has no such limit, define CFG_TUSB_MEM_SECTION as empty macro. - - @code - CFG_TUSB_MEM_SECTION uint8_t usb_xfer_buffer[10]; - @endcode - */ -#define CFG_TUSB_MEM_SECTION - -#define CFG_TUSB_MCU ///< Select one of the supported MCU, the value must be from \ref group_mcu -#define CFG_TUSB_OS ///< Select one of the supported RTOS, the value must be from \ref group_supported_os. -#define CFG_TUD_TASK_PRIO ///< If \ref CFG_TUSB_OS is configured to use a real RTOS (other than OPT_OS_NONE). This determines the priority of the usb stack task. - -//--------------------------------------------------------------------+ -// HOST CONFIGURATION -//--------------------------------------------------------------------+ -/** \defgroup CFG_TUSB_HOST Host Options - * @{ */ - -/** \brief Maximum number of device host stack can manage - * \n If hub class is not enabled, set this equal to number of controllers in host mode - * \n If hub class is enabled, make sure hub is also counted */ -#define CFG_TUSB_HOST_DEVICE_MAX - -/// \brief Buffer size used for getting device configuration descriptor. You may want to increase this from default (256) -/// to support lengthy composite device especially with Audio or Video class -#define CFG_TUSB_HOST_ENUM_BUFFER_SIZE - -/** \defgroup config_host_class Class Driver - * \brief For each Class Driver a value of 1 means enable, value of 0 mean disable - * @{ */ -#define CFG_TUSB_HOST_HUB ///< Enable Hub Class -#define CFG_TUSB_HOST_HID_KEYBOARD ///< Enable HID Class for Keyboard -#define CFG_TUSB_HOST_HID_MOUSE ///< Enable HID Class for Mouse -#define CFG_TUSB_HOST_HID_GENERIC ///< Enable HID Class for Generic (not supported yet) -#define CFG_TUSB_HOST_MSC ///< Enable Mass Storage Class (SCSI subclass only) -#define CFG_TUSB_HOST_CDC ///< Enable Virtual Serial (Communication Device Class) -/** @} */ - -/** @} */ // group Host - -//--------------------------------------------------------------------+ -// DEVICE CONFIGURATION -//--------------------------------------------------------------------+ -/** \defgroup CFG_TUSB_DEVICE Device Options - * @{ */ - -#define CFG_TUD_ENDOINT0_SIZE ///< Max packet size of Cotnrol Endpoint, default is 64 - -/// Application MUST define this variable and initialize its pointers's member to all required USB descriptors including -/// Device Descriptor, Configuration Descriptor, String Descriptors, HID Report Descriptors etc ... -tud_desc_init_t tusbd_descriptor_pointers; - -/** \defgroup config_device_class Class Driver - * \brief For each Class Driver a value of 1 means enable, value of 0 mean disable - * @{ */ -#define CFG_TUD_HID_KEYBOARD ///< Enable HID Class for Keyboard -#define CFG_TUD_HID_MOUSE ///< Enable HID Class for Mouse -#define CFG_TUD_HID_GENERIC ///< Enable HID Class for Generic (not supported yet) -#define CFG_TUD_MSC ///< Enable Mass Storage Class (SCSI subclass only) -#define CFG_TUD_CDC ///< Enable Virtual Serial (Communication Device Class) -/** @} */ - -/** @} */ // group Device - -/** @} */ diff --git a/doxygen/getting_started.md b/doxygen/getting_started.md deleted file mode 100644 index 6d6091c03..000000000 --- a/doxygen/getting_started.md +++ /dev/null @@ -1,63 +0,0 @@ -# Getting Started # - - - -**Table of Contents** - -- [Download](#download) -- [Add tinyusb to your project](#add-tinyusb-to-your-project) - - - -## Download - -tinyusb uses github as online repository https://github.com/hathach/tinyusb since it is the best place for open source project. - -If you are using Linux, you already know how to what to do. But If Windows is your OS, I would suggest to install [git](http://git-scm.com/) and front-end gui such as [tortoisegit](http://code.google.com/p/tortoisegit) to begin with. - -After downloading/cloning, the code base is composed of - -Folder | Description ------ | ------------- -doxygen | Documentation -examples| Folder where test examples are kept with Makefile and Segger Embedded build support -hw/bsp | Source files of supported boards -hw/mcu | Low level mcu core & peripheral drivers (e.g CMSIS ) -lib | Source files from 3rd party such as freeRTOS, fatfs etc ... -src | All sources files for tinyusb stack itself. -tests | Unit tests for the stack -tools | Files used internally - -*examples* is the folder where all the application & project files are located. There are demos for both device and hosts. For each, there are different projects for each of supported RTOS. Click to have more information on how to [build](../examples/readme.md) and run [device](../examples/device/readme.md) demos. - -## Add tinyusb to your project - -It is relatively simple to incorporate tinyusb to your (existing) project - -1. Copy or `git submodule` this repo into your project in a subfolder. Let's say it is *your_project/tinyusb* -2. Add all the .c in the src folder to your project settings (uvproj, ewp, makefile) -3. Add *your_project/tinysb* to your include path. Also make sure your current include path also contains the configuration file tusb_config.h. Or you could simply put the tusb_config.h into the tinyusb folder as well. -4. Make sure all required macros are all defined properly in tusb_config.h (configure file in demo application is sufficient, but you need to add a few more such as CFG_TUSB_MCU, CFG_TUSB_OS, CFG_TUD_TASK_PRIO since they are passed by IDE/compiler to maintain a unique configure for all demo projects). -5. If you use the device stack, make sure you have created/modified usb descriptors for your own need. Ultimately you need to fill out required pointers in tusbd_descriptor_pointers for that stack to work. -6. Add tusb_init() call to your reset initialization code. -7. Implement all enabled classes's callbacks. -8. If you don't use any RTOSes at all, you need to continuously and/or periodically call tusb_task() function. Most of the callbacks and functionality are handled and invoke within the call of that task runner. - -~~~{.c} -int main(void) -{ - your_init_code(); - tusb_init(); // initialize tinyusb stack - - while(1) // the mainloop - { - your_application_code(); - - tusb_task(); // handle tinyusb event, task etc ... - } -} -~~~ - -[//]: # (\subpage md_boards_readme) -[//]: # (\subpage md_doxygen_started_demo) -[//]: # (\subpage md_tools_readme) diff --git a/doxygen/group_def.txt b/doxygen/group_def.txt deleted file mode 100644 index 0f5419810..000000000 --- a/doxygen/group_def.txt +++ /dev/null @@ -1,22 +0,0 @@ -// define all the modules group to have the desired ordering since doxygen order module group by -// the order of files it is feed - -/// \defgroup group_demo Demos - -/// \defgroup group_class Application - Class Driver API - -/// \defgroup group_application_api Application - Stack API -/// \brief Non-Class driver API - -/// \defgroup group_configuration Configuration tusb_config.h - -/// \defgroup group_usbd USB Device Core (USBD) - -/// \defgroup group_usbh USB Host Core (USBH) - -/// \defgroup group_osal OS Abstraction Layer (OSAL) - -/// \defgroup group_usb_definitions USB Definitions - -/// \defgroup Group_Common Common Files - diff --git a/doxygen/header.html b/doxygen/header.html deleted file mode 100644 index e75be44de..000000000 --- a/doxygen/header.html +++ /dev/null @@ -1,58 +0,0 @@ - - - - - - - -$projectname: $title -$title - - - -$treeview -$search -$mathjax - -$extrastylesheet - - -
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- - diff --git a/doxygen/porting.md b/doxygen/porting.md deleted file mode 100644 index 5a464fa6b..000000000 --- a/doxygen/porting.md +++ /dev/null @@ -1,167 +0,0 @@ -# Porting - -TinyUSB is designed to be a universal USB protocol stack for low-cost 32 bit microcontrollers. It -handles most of the high level USB protocol and relies on the microcontroller's USB peripheral for -data transactions on different endpoints. Porting is the process of adding low-level support for -the rest of the common stack. Once the low-level is implemented, it is very easy to add USB support -for the microcontroller to other projects, especially those already using TinyUSB such as CircuitPython. - -Below are instructions on how to get the cdc_msc_hid device example running on a new microcontroller. Doing so includes adding the common code necessary for other uses while minimizing other extra code. Whenever you see a phrase or word in <> it should be replaced. - -## Register defs - -The first step to adding support is including the register definitions and startup code for the -microcontroller in TinyUSB. We write the TinyUSB implementation against these structs instead of higher level functions to keep the code small and to prevent function name collisions in linking of larger projects. For ARM microcontrollers this is the CMSIS definitions. They should be -placed in the `hw/mcu//` directory. - -Once this is done, create a directory in `hw/bsp/` for the specific board you are using to test the code. (Duplicating an existing board's directory is the best way to get started.) The board should be a readily available development board so that others can also test. - -## Build -Now that those directories are in place, we can start our iteration process to get the example building successfully. To build, run from the root of TinyUSB: - -`make -C examples/device/cdc_msc_hid BOARD=` - -Unless, you've read ahead, this will fail miserably. Now, lets get it to fail less by updating the files in the board directory. The code in the board's directory is responsible for setting up the microcontroller's clocks and pins so that USB works. TinyUSB itself only operates on the USB peripheral. The board directory also includes information what files are needed to build the example. - -One of the first things to change is the `-DCFG_TUSB_MCU` cflag in the `board.mk` file. This is used to tell TinyUSB what platform is being built. So, add an entry to `src/tusb_option.h` and update the CFLAG to match. - -Also, add an entry for the board in `hw/bsp/board.h`. The CFLAG is auto-added. - -Update `board.mk`'s VENDOR and CHIP_FAMILY values when creating the directory for the struct files. Duplicate one of the other sources from `src/portable` into `src/portable//` and delete all of the implementation internals. We'll cover what everything there does later. For now, get it compiling. - -## Implementation -At this point you should get an error due to an implementation issue and hopefully the build is setup for the new MCU. You will still need to modify the `board.mk` to include specific CFLAGS, the linker script, linker flags, source files, include directories. All file paths are relative to the top of the TinyUSB repo. - -### Board Support (BSP) -The board support code is only used for self-contained examples and testing. It is not used when TinyUSB is part of a larger project. Its responsible for getting the MCU started and the USB peripheral clocked. It also optionally provides LED definitions that are used to blink an LED to show that the code is running. - -It is located in `hw/bsp//board_.c`. - -#### board_init -`board_init` is responsible for starting the MCU, setting up the USB clock and USB pins. It is also responsible for initializing LED pins. - -One useful clock debugging technique is to set up a PWM output at a known value such as 500hz based on the USB clock so that you can verify it is correct with a logic probe or oscilloscope. - -Setup your USB in a crystal-less mode when available. That makes the code easier to port across boards. - -#### board_led_control -Feel free to skip this until you want to verify your demo code is running. To implement, set the pin corresponding to the led to output a value that lights the LED when `state` is true. - -### OS Abstraction Layer (OSAL) - -The OS Abstraction Layer is responsible for providing basic data structures for TinyUSB that may allow for concurrency when used with an RTOS. Without an RTOS it simply handles concurrency issues between the main code and interrupts. - -The code is almost entirely agnostic of MCU and lives in `src/osal`. - -#### tusb_hal_millis - -The OPT_OS_NONE option is the only option which requires an MCU specific function. It needs `tusb_hal_millis` to measure the passage of time. On ARM this is commonly done with SysTick. The function returns the elapsed number of milliseconds since startup. - -`tusb_hal_millis` is also provided in `hw/bsp//board_.c` because it may vary with MCU use. - -### Device API - -After the USB device is setup, the USB device code works by processing events on the main thread (by calling `tusb_task`). These events are queued by the USB interrupt handler. So, there are three parts to the device low-level API: device setup, endpoint setup and interrupt processing. - -All of the code for the low-level device API is in `src/portable///dcd_.c`. - -#### Device Setup - -##### dcd_init -Initializes the USB peripheral for device mode and enables it. - -#### dcd_int_enable / dcd_int_disable - -Enables or disables the USB device interrupt(s). May be used to prevent concurrency issues when mutating data structures shared between main code and the interrupt handler. - -##### dcd_set_address -Called when the device is given a new bus address. - -If your peripheral automatically changes address during enumeration (like the nrf52) you may leave this empty and also no queue an event for the corresponding SETUP packet. - -##### dcd_set_config -Called when the device received SET_CONFIG request, you can leave this empty if your peripheral does not require any specific action. - -#### Special events -You must let TinyUSB know when certain events occur so that it can continue its work. There are a few methods you can call to queue events for TinyUSB to process. - -##### dcd_event_bus_signal - -There are a number of events that your peripheral may communicate about the state of the bus. Here is an overview of what they are. Events in **BOLD** must be provided for TinyUSB to work. - -* **DCD_EVENT_RESET** - Triggered when the host resets the bus causing the peripheral to reset. Do any other internal reset you need from the interrupt handler such as resetting the control endpoint. -* DCD_EVENT_SOF - Signals the start of a new USB frame. - -Calls to this look like: - - dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true); - -The first `0` is the USB peripheral number. Statically saying 0 is common for single USB device MCUs. - -The `true` indicates the call is from an interrupt handler and will always be the case when porting in this way. - -##### dcd_setup_received -SETUP packets are a special type of transaction that can occur at any time on the control endpoint, numbered `0`. Since they are unique, most peripherals have special handling for them. Their data is always 8 bytes in length as well. - -Calls to this look like: - - dcd_event_setup_received(0, setup, true); - -As before with `dcd_event_bus_signal` the first argument is the USB peripheral number and the third is true to signal its being called from an interrup handler. The middle argument is byte array of length 8 with the contents of the SETUP packet. It can be stack allocated because it is copied into the queue. - -#### Endpoints - -Endpoints are the core of the USB data transfer process. They come in a few forms such as control, isochronous, bulk, and interrupt. We won't cover the details here except with some caveats in open below. In general, data is transferred by setting up a buffer of a given length to be transferred on a given endpoint address and then waiting for an interrupt to signal that the transfer is finished. Further details below. - -Endpoints within USB have an address which encodes both the number and direction of an endpoint. TinyUSB provides `edpt_number` and `edpt_dir` to unpack this data from the address. Here is a snippet that does it. - - uint8_t epnum = edpt_number(ep_addr); - uint8_t dir = edpt_dir(ep_addr); - -##### dcd_edpt_open - -Opening an endpoint is done for all non-control endpoints once the host picks a configuration that the device should use. At this point, the endpoint should be enabled in the peripheral and configured to match the endpoint descriptor. Pay special attention to the direction of the endpoint you can get from the helper methods above. It will likely change what registers you are setting. - -Also make sure to enable endpoint specific interrupts. - -##### dcd_edpt_xfer - -`dcd_edpt_xfer` is responsible for configuring the peripheral to send or receive data from the host. "xfer" is short for "transfer". **This is one of the core methods you must implement for TinyUSB to work (one other is the interrupt handler).** Data from the host is the OUT direction and data to the host is IN. In other words, direction is relative to the host. - -`dcd_edpt_xfer` is used for all endpoints including the control endpoint 0. Make sure to handle the zero-length packet STATUS packet on endpoint 0 correctly. It may be a special transaction to the peripheral. - -Besides that, all other transactions are relatively straight-forward. The endpoint address provides the endpoint number and direction which usually determines where to write the buffer info. The buffer and its length are usually written to a specific location in memory and the peripheral is told the data is valid. (Maybe by writing a 1 to a register or setting a counter register to 0 for OUT or length for IN.) - -TODO: can we promise the buffer is word aligned? - -One potential pitfall is that the buffer may be longer than the maximum endpoint size of one USB packet. Some peripherals can handle transmitting multiple USB packets for a provided buffer (like the SAMD21). Others (like the nRF52) may need each USB packet queued individually. To make this work you'll need to track some state for yourself and queue up an intermediate USB packet from the interrupt handler. - -Once the transaction is going, the interrupt handler will notify TinyUSB of transfer completion. - -TODO: who handles zero-length data packets? - -##### dcd_xfer_complete - -Once a transfer completes you must call dcd_xfer_complete from the USB interrupt handler to let TinyUSB know that a transaction has completed. Here is a sample call: - - dcd_event_xfer_complete(0, ep_addr, xfer->actual_len, XFER_RESULT_SUCCESS, true); - -The arguments are: -* the USB peripheral number -* the endpoint address -* the actual length of the transfer. (OUT transfers may be smaller than the buffer given in `dcd_edpt_xfer`) -* the result of the transfer. Failure isn't handled yet. -* `true` to note the call is from an interrupt handler. - -##### dcd_edpt_stall / dcd_edpt_stalled / dcd_edpt_clear_stall - -Stalling is one way an endpoint can indicate failure such as when an unsupported command is transmitted. The trio of `dcd_edpt_stall`, `dcd_edpt_stalled`, `dcd_edpt_clear_stall` help manage the stall state of all endpoints. - -## Woohoo! - -At this point you should have everything working! ;-) Of course, you may not write perfect code. Here are some tips and tricks for debugging. - -Use [WireShark](https://www.wireshark.org/) or [a Beagle](https://www.totalphase.com/protocols/usb/) to sniff the USB traffic. When things aren't working its likely very early in the USB enumeration process. Figuring out where can help clue in where the issue is. For example: -* If the host sends a SETUP packet and its not ACKed then your USB peripheral probably isn't started correctly. -* If the peripheral is started correctly but it still didn't work, then verify your usb clock is correct. (You did output a PWM based on it right? ;-) ) -* If the SETUP packet is ACKed but nothing is sent back then you interrupt handler isn't queueing the setup packet correctly. (Also, if you are using your own code instead of an example `tusb_task` may not be called.) If thats OK, the `dcd_xfer_complete` may not be setting up the next transaction correctly. diff --git a/doxygen/started_demo.md b/doxygen/started_demo.md deleted file mode 100644 index 7e82596f5..000000000 --- a/doxygen/started_demo.md +++ /dev/null @@ -1,48 +0,0 @@ -# Demos # - -For simplicity and user's convenience, there are only 2 basic application demos which are *Device* and *Host* respectively. Each application demo, however, has a few projects, each for its supported RTOS. For instance, in addition to the *src* folder, you will also find in the /demo/device - -- device\_os\_none for no RTOS -- device\_freertos for freeRTOS -- device\_cmsis_rtx for ARM CMSIS with RTX implemenation - -To be able to have the same application code running across RTOSes, the application make use of the "internal" **OSAL layer**. Thus this makes the application code a bit weird and over-complicated than it should be in some (many) cases. This is absolutely not necessary in product development. User can just use the native API function of supported RTOS or a state machine or blocking wait in case of none OS. For example, instead of the blinking task in application - -~~~{.c} -OSAL_TASK_FUNCTION( led_blinking_task , p_task_para) -{ - OSAL_TASK_LOOP_BEGIN - - static uint32_t led_on_mask = 0; - - osal_task_delay(led_blink_interval_ms); - - board_leds(led_on_mask, 1 - led_on_mask); - led_on_mask = 1 - led_on_mask; // toggle - - OSAL_TASK_LOOP_END -} -~~~ - -can be written in FreeRTOS's native API - -~~~{.c} -void led_blinking_task( void * p_task_para ) -{ - while(1) - { - static uint32_t led_on_mask = 0; - - // FreeRTOS API's vTaskDelay is used in place of osal_task_delay. Note it takes input parameter in tick - vTaskDelay( (led_blink_interval_ms * CFG_TUSB_TICKS_HZ) / 1000); - - board_leds(led_on_mask, 1 - led_on_mask); - led_on_mask = 1 - led_on_mask; // toggle - } -} -~~~ - - -[//]: # (\subpage md_demos_readme) -[//]: # (\subpage md_demos_device_readme) -[//]: # (\subpage md_demos_host_readme) \ No newline at end of file diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index 4b39d6d18..8d3e39c64 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -83,14 +83,14 @@ // DEVICE CONFIGURATION //-------------------------------------------------------------------- -#define CFG_TUSB_HOST_HUB 0 +#define CFG_TUH_HUB 1 #define CFG_TUSB_HOST_HID_KEYBOARD 0 #define CFG_TUSB_HOST_HID_MOUSE 0 #define CFG_TUSB_HOST_HID_GENERIC 0 // (not yet supported) #define CFG_TUSB_HOST_MSC 0 #define CFG_TUSB_HOST_CDC 1 -#define CFG_TUSB_HOST_DEVICE_MAX (CFG_TUSB_HOST_HUB ? 5 : 1) // normal hub has 4 ports +#define CFG_TUSB_HOST_DEVICE_MAX (CFG_TUH_HUB ? 5 : 1) // normal hub has 4 ports //------------- CLASS -------------// #define CFG_TUD_CDC 0 diff --git a/examples/obsolete/host/src/main.c b/examples/obsolete/host/src/main.c index 90c64f849..0f2905fc6 100644 --- a/examples/obsolete/host/src/main.c +++ b/examples/obsolete/host/src/main.c @@ -135,7 +135,7 @@ void print_greeting(void) puts("This HOST demo is configured to support:"); printf(" - RTOS = %s\n", rtos_name[CFG_TUSB_OS]); - if (CFG_TUSB_HOST_HUB ) puts(" - Hub (1 level only)"); + if (CFG_TUH_HUB ) puts(" - Hub (1 level only)"); if (CFG_TUSB_HOST_HID_MOUSE ) puts(" - HID Mouse"); if (CFG_TUSB_HOST_HID_KEYBOARD ) puts(" - HID Keyboard"); if (CFG_TUSB_HOST_MSC ) puts(" - Mass Storage"); diff --git a/examples/obsolete/host/src/tusb_config.h b/examples/obsolete/host/src/tusb_config.h index f39fa26b4..3d0d5f3db 100644 --- a/examples/obsolete/host/src/tusb_config.h +++ b/examples/obsolete/host/src/tusb_config.h @@ -54,14 +54,14 @@ //--------------------------------------------------------------------+ //------------- CLASS -------------// -#define CFG_TUSB_HOST_HUB 1 +#define CFG_TUH_HUB 1 #define CFG_TUSB_HOST_HID_KEYBOARD 1 #define CFG_TUSB_HOST_HID_MOUSE 1 #define CFG_TUSB_HOST_HID_GENERIC 0 // (not yet supported) #define CFG_TUSB_HOST_MSC 1 #define CFG_TUSB_HOST_CDC 1 -#define CFG_TUSB_HOST_DEVICE_MAX (CFG_TUSB_HOST_HUB ? 5 : 1) // normal hub has 4 ports +#define CFG_TUSB_HOST_DEVICE_MAX (CFG_TUH_HUB ? 5 : 1) // normal hub has 4 ports //--------------------------------------------------------------------+ // COMMON CONFIGURATION diff --git a/src/host/hcd.c b/src/host/hcd.c deleted file mode 100644 index 092ca96da..000000000 --- a/src/host/hcd.c +++ /dev/null @@ -1,44 +0,0 @@ -/**************************************************************************/ -/*! - @file hcd.c - @author hathach (tinyusb.org) - - @section LICENSE - - Software License Agreement (BSD License) - - Copyright (c) 2013, hathach (tinyusb.org) - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - 3. Neither the name of the copyright holders nor the - names of its contributors may be used to endorse or promote products - derived from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY - EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY - DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION HOWEVER CAUSED AND - ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY OUT OF THE USE OF THIS - SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - - This file is part of the tinyusb stack. -*/ -/**************************************************************************/ - -#include "hcd.h" - -#if MODE_HOST_SUPPORTED - - -#endif diff --git a/src/host/hcd.h b/src/host/hcd.h index 420b8a001..a6b1b7027 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -43,16 +43,45 @@ #ifndef _TUSB_HCD_H_ #define _TUSB_HCD_H_ +#include + #ifdef __cplusplus extern "C" { #endif -#include +typedef enum +{ + HCD_EVENT_DEVICE_PLUG, + HCD_EVENT_DEVICE_UNPLUG, + HCD_EVENT_XFER_COMPLETE, +} hcd_eventid_t; + +typedef struct +{ + uint8_t rhport; + uint8_t event_id; + + union + { + struct + { + uint8_t hub_addr; + uint8_t hub_port; + } plug, unplug; + + struct + { + uint8_t ep_addr; + uint8_t result; + uint32_t len; + } xfer_complete; + }; +} hcd_event_t; #if MODE_HOST_SUPPORTED // Max number of endpoints per device enum { - HCD_MAX_ENDPOINT = CFG_TUSB_HOST_HUB + CFG_TUSB_HOST_HID_KEYBOARD + CFG_TUSB_HOST_HID_MOUSE + CFG_TUSB_HOST_HID_GENERIC + + HCD_MAX_ENDPOINT = CFG_TUH_HUB + CFG_TUSB_HOST_HID_KEYBOARD + CFG_TUSB_HOST_HID_MOUSE + CFG_TUSB_HOST_HID_GENERIC + CFG_TUSB_HOST_MSC*2 + CFG_TUSB_HOST_CDC*3, HCD_MAX_XFER = HCD_MAX_ENDPOINT*2, @@ -69,13 +98,11 @@ typedef struct { uint8_t reserved; } pipe_handle_t; -static inline bool pipehandle_is_valid(pipe_handle_t pipe_hdl) ATTR_CONST ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT; static inline bool pipehandle_is_valid(pipe_handle_t pipe_hdl) { return pipe_hdl.dev_addr > 0; } -static inline bool pipehandle_is_equal(pipe_handle_t x, pipe_handle_t y) ATTR_CONST ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT; static inline bool pipehandle_is_equal(pipe_handle_t x, pipe_handle_t y) { return (x.dev_addr == y.dev_addr) && (x.xfer_type == y.xfer_type) && (x.index == y.index); diff --git a/src/host/hub.c b/src/host/hub.c index 55c8597ad..485e47147 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -38,7 +38,7 @@ #include "tusb_option.h" -#if (MODE_HOST_SUPPORTED && CFG_TUSB_HOST_HUB) +#if (MODE_HOST_SUPPORTED && CFG_TUH_HUB) #define _TINY_USB_SOURCE_FILE_ diff --git a/src/host/usbh.c b/src/host/usbh.c index 80e59037f..dc13030c3 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -94,7 +94,7 @@ static host_class_driver_t const usbh_class_drivers[] = }, #endif - #if CFG_TUSB_HOST_HUB + #if CFG_TUH_HUB [TUSB_CLASS_HUB] = { .init = hub_init, .open_subtask = hub_open_subtask, @@ -190,40 +190,35 @@ bool usbh_init(void) } //------------- USBH control transfer -------------// -// function called within a task, requesting os blocking services, subtask input parameter must be static/global variables or constant -tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, uint8_t bRequest, +bool usbh_control_xfer_subtask (uint8_t dev_addr, uint8_t bmRequestType, uint8_t bRequest, uint16_t wValue, uint16_t wIndex, uint16_t wLength, uint8_t* data) { - // FIXME [CMSIS-RTX] use svc for OS API, error value changed after mutex release at the end of function - static tusb_error_t error; + usbh_device_info_t* dev = &usbh_devices[dev_addr]; -// OSAL_SUBTASK_BEGIN + TU_ASSERT(osal_mutex_lock(dev->control.mutex_hdl, OSAL_TIMEOUT_NORMAL)); - error = osal_mutex_lock(usbh_devices[dev_addr].control.mutex_hdl, OSAL_TIMEOUT_NORMAL); - TU_VERIFY_ERR_HDLR(error, osal_mutex_unlock(usbh_devices[dev_addr].control.mutex_hdl)); - - usbh_devices[dev_addr].control.request = (tusb_control_request_t) { + dev->control.request = (tusb_control_request_t ) { {.bmRequestType = bmRequestType}, .bRequest = bRequest, .wValue = wValue, .wIndex = wIndex, .wLength = wLength }; - usbh_devices[dev_addr].control.pipe_status = 0; + dev->control.pipe_status = 0; + + TU_ASSERT_ERR(hcd_pipe_control_xfer(dev_addr, &dev->control.request, data), false); + TU_ASSERT(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL)); - error = hcd_pipe_control_xfer(dev_addr, &usbh_devices[dev_addr].control.request, data); - if ( TUSB_ERROR_NONE == error ) error = osal_semaphore_wait(usbh_devices[dev_addr].control.sem_hdl, OSAL_TIMEOUT_NORMAL); - osal_mutex_unlock(usbh_devices[dev_addr].control.mutex_hdl); + osal_mutex_unlock(dev->control.mutex_hdl); - TU_ASSERT_ERR(error); - if (XFER_RESULT_STALLED == usbh_devices[dev_addr].control.pipe_status) return (TUSB_ERROR_USBH_XFER_STALLED); - if (XFER_RESULT_FAILED == usbh_devices[dev_addr].control.pipe_status) return (TUSB_ERROR_USBH_XFER_FAILED); + if ( XFER_RESULT_STALLED == dev->control.pipe_status ) return false; + if ( XFER_RESULT_FAILED == dev->control.pipe_status ) return false; // STASK_ASSERT_HDLR(TUSB_ERROR_NONE == error && -// XFER_RESULT_SUCCESS == usbh_devices[dev_addr].control.pipe_status, +// XFER_RESULT_SUCCESS == dev->control.pipe_status, // tuh_device_mount_failed_cb(TUSB_ERROR_USBH_MOUNT_DEVICE_NOT_RESPOND, NULL) ); -// OSAL_SUBTASK_END + return true; } tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) @@ -359,7 +354,7 @@ void usbh_hcd_rhport_unplugged_isr(uint8_t hostid) //--------------------------------------------------------------------+ // ENUMERATION TASK //--------------------------------------------------------------------+ -tusb_error_t usbh_task_body(void) +bool usbh_task_body(void) { enum { POWER_STABLE_DELAY = 500, @@ -374,7 +369,7 @@ tusb_error_t usbh_task_body(void) static uint8_t configure_selected = 1; // TODO move static uint8_t *p_desc = NULL; // TODO move - if ( !osal_queue_receive(_usbh_q, &enum_entry) ) return TUSB_ERROR_NONE; + if ( !osal_queue_receive(_usbh_q, &enum_entry) ) return false; usbh_devices[0].core_id = enum_entry.core_id; // TODO refractor integrate to device_pool usbh_devices[0].hub_addr = enum_entry.hub_addr; @@ -390,7 +385,7 @@ tusb_error_t usbh_task_body(void) osal_task_delay(POWER_STABLE_DELAY); // wait until device is stable. Increase this if the first 8 bytes is failed to get // exit if device unplugged while delaying - if ( !hcd_port_connect_status(usbh_devices[0].core_id) ) return TUSB_ERROR_NONE; + if ( !hcd_port_connect_status(usbh_devices[0].core_id) ) return true; hcd_port_reset( usbh_devices[0].core_id ); // port must be reset to have correct speed operation osal_task_delay(RESET_DELAY); @@ -398,12 +393,13 @@ tusb_error_t usbh_task_body(void) usbh_devices[0].speed = hcd_port_speed_get( usbh_devices[0].core_id ); } else - { // disconnection event + { + // disconnection event usbh_device_unplugged(usbh_devices[0].core_id, 0, 0); - return TUSB_ERROR_NONE; // restart task + return true; // restart task } } - #if CFG_TUSB_HOST_HUB + #if CFG_TUH_HUB //------------- connected/disconnected via hub -------------// else { @@ -450,19 +446,19 @@ tusb_error_t usbh_task_body(void) usbh_devices[0].state = TUSB_DEVICE_STATE_ADDRESSED; //------------- Get first 8 bytes of device descriptor to get Control Endpoint Size -------------// - error = usbh_control_xfer_subtask( 0, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_DEVICE << 8), 0, - 8, enum_data_buffer ); + // TODO some slow device is observed to fail the very fist controller xfer, can try more times + TU_ASSERT(usbh_control_xfer_subtask(0, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), + TUSB_REQ_GET_DESCRIPTOR, + (TUSB_DESC_DEVICE << 8), 0, 8, enum_data_buffer)); //------------- Reset device again before Set Address -------------// if (usbh_devices[0].hub_addr == 0) { // connected directly to roothub - TU_ASSERT_ERR(error); // TODO some slow device is observed to fail the very fist controller xfer, can try more times hcd_port_reset( usbh_devices[0].core_id ); // reset port after 8 byte descriptor osal_task_delay(RESET_DELAY); } - #if CFG_TUSB_HOST_HUB + #if CFG_TUH_HUB else { // connected via a hub STASK_ASSERT_ERR_HDLR(error, hub_status_pipe_queue( usbh_devices[0].hub_addr) ); // TODO hub refractor @@ -481,10 +477,9 @@ tusb_error_t usbh_task_body(void) new_addr = get_new_address(); TU_ASSERT(new_addr <= CFG_TUSB_HOST_DEVICE_MAX); // TODO notify application we reach max devices - error = usbh_control_xfer_subtask( 0, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_SET_ADDRESS, new_addr, 0, - 0, NULL ); - TU_ASSERT_ERR(error); + TU_ASSERT(usbh_control_xfer_subtask( 0, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), + TUSB_REQ_SET_ADDRESS, new_addr, 0, + 0, NULL )); //------------- update port info & close control pipe of addr0 -------------// usbh_devices[new_addr].core_id = usbh_devices[0].core_id; @@ -500,10 +495,11 @@ tusb_error_t usbh_task_body(void) TU_ASSERT_ERR ( usbh_pipe_control_open(new_addr, ((tusb_desc_device_t*) enum_data_buffer)->bMaxPacketSize0 ) ); //------------- Get full device descriptor -------------// - error = usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), + TU_ASSERT( + usbh_control_xfer_subtask(new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_DEVICE << 8), 0, - 18, enum_data_buffer ); - TU_ASSERT_ERR(error); + 18, + enum_data_buffer)); // update device info TODO alignment issue usbh_devices[new_addr].vendor_id = ((tusb_desc_device_t*) enum_data_buffer)->idVendor; @@ -514,27 +510,28 @@ tusb_error_t usbh_task_body(void) TU_ASSERT(configure_selected <= usbh_devices[new_addr].configure_count); // TODO notify application when invalid configuration //------------- Get 9 bytes of configuration descriptor -------------// - error = usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_CONFIGURATION << 8) | (configure_selected - 1), 0, - 9, enum_data_buffer ); - TU_ASSERT_ERR(error); + TU_ASSERT( + usbh_control_xfer_subtask(new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), + TUSB_REQ_GET_DESCRIPTOR, + (TUSB_DESC_CONFIGURATION << 8) | (configure_selected - 1), 0, + 9, + enum_data_buffer)); + TU_VERIFY_HDLR( CFG_TUSB_HOST_ENUM_BUFFER_SIZE >= ((tusb_desc_configuration_t*)enum_data_buffer)->wTotalLength, tuh_device_mount_failed_cb(TUSB_ERROR_USBH_MOUNT_CONFIG_DESC_TOO_LONG, NULL) ); //------------- Get full configuration descriptor -------------// - error = usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), + TU_ASSERT( usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_CONFIGURATION << 8) | (configure_selected - 1), 0, - CFG_TUSB_HOST_ENUM_BUFFER_SIZE, enum_data_buffer ); - TU_ASSERT_ERR(error); + CFG_TUSB_HOST_ENUM_BUFFER_SIZE, enum_data_buffer ) ); // update configuration info usbh_devices[new_addr].interface_count = ((tusb_desc_configuration_t*) enum_data_buffer)->bNumInterfaces; //------------- Set Configure -------------// - error = usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), + TU_ASSERT( usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), TUSB_REQ_SET_CONFIGURATION, configure_selected, 0, - 0, NULL ); - TU_ASSERT_ERR(error); + 0, NULL )); usbh_devices[new_addr].state = TUSB_DEVICE_STATE_CONFIGURED; @@ -582,6 +579,8 @@ tusb_error_t usbh_task_body(void) } tuh_device_mount_succeed_cb(new_addr); + + return true; } diff --git a/src/host/usbh.h b/src/host/usbh.h index f4433ae31..4909eb8a7 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -100,7 +100,7 @@ ATTR_WEAK void tuh_device_mount_failed_cb(tusb_error_t error, tusb_desc_devic bool usbh_init(void); void usbh_task(void* param); -tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, uint8_t bRequest, +bool usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, uint8_t bRequest, uint16_t wValue, uint16_t wIndex, uint16_t wLength, uint8_t* data); #endif diff --git a/src/tusb_option.h b/src/tusb_option.h index 6b84db21c..07b39b5be 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -213,7 +213,7 @@ #endif //------------- HUB CLASS -------------// - #if CFG_TUSB_HOST_HUB && (CFG_TUSB_HOST_DEVICE_MAX == 1) + #if CFG_TUH_HUB && (CFG_TUSB_HOST_DEVICE_MAX == 1) #error there is no benefit enable hub with max device is 1. Please disable hub or increase CFG_TUSB_HOST_DEVICE_MAX #endif diff --git a/tests/support/tusb_config.h b/tests/support/tusb_config.h index bf6277849..3e5721019 100644 --- a/tests/support/tusb_config.h +++ b/tests/support/tusb_config.h @@ -55,7 +55,7 @@ #define CFG_TUSB_HOST_DEVICE_MAX 5 // TODO be a part of HUB config //------------- CLASS -------------// -#define CFG_TUSB_HOST_HUB 0 +#define CFG_TUH_HUB 0 #define CFG_TUSB_HOST_HID_KEYBOARD 1 #define CFG_TUSB_HOST_HID_MOUSE 1 #define CFG_TUSB_HOST_MSC 1 -- cgit v1.3.1 From 7d3ff7aff6aed13377a4cd12f1d8f2ad91720f80 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 6 Dec 2018 22:24:31 +0700 Subject: rename CFG_TUSB_HOST_CDC/MSC to CFG_TUH_CDC/MSC --- docs/configuration.txt | 4 ++-- examples/host/cdc_msc_hid/src/main.c | 4 ++-- examples/host/cdc_msc_hid/src/tusb_config.h | 4 ++-- examples/obsolete/host/src/cdc_serial_host_app.c | 2 +- examples/obsolete/host/src/cdc_serial_host_app.h | 2 +- examples/obsolete/host/src/main.c | 4 ++-- examples/obsolete/host/src/msc_cli.c | 2 +- examples/obsolete/host/src/msc_host_app.c | 2 +- examples/obsolete/host/src/msc_host_app.h | 2 +- examples/obsolete/host/src/rndis_host_app.c | 2 +- examples/obsolete/host/src/rndis_host_app.h | 2 +- examples/obsolete/host/src/tusb_config.h | 4 ++-- lib/fatfs/ccsbcs.c | 4 ++-- lib/fatfs/diskio.c | 4 ++-- lib/fatfs/ff.c | 4 ++-- src/class/cdc/cdc_host.c | 2 +- src/class/cdc/cdc_rndis_host.c | 2 +- src/class/msc/msc_host.c | 2 +- src/host/hcd.h | 2 +- src/tusb.h | 4 ++-- tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c | 2 +- tests/lpc18xx_43xx/test/host/host_helper.h | 4 ++-- tests/support/tusb_config.h | 6 +++--- 23 files changed, 35 insertions(+), 35 deletions(-) (limited to 'src/host') diff --git a/docs/configuration.txt b/docs/configuration.txt index 896c9da6c..33eb4efbf 100644 --- a/docs/configuration.txt +++ b/docs/configuration.txt @@ -44,8 +44,8 @@ #define CFG_TUSB_HOST_HID_KEYBOARD ///< Enable HID Class for Keyboard #define CFG_TUSB_HOST_HID_MOUSE ///< Enable HID Class for Mouse #define CFG_TUSB_HOST_HID_GENERIC ///< Enable HID Class for Generic (not supported yet) -#define CFG_TUSB_HOST_MSC ///< Enable Mass Storage Class (SCSI subclass only) -#define CFG_TUSB_HOST_CDC ///< Enable Virtual Serial (Communication Device Class) +#define CFG_TUH_MSC ///< Enable Mass Storage Class (SCSI subclass only) +#define CFG_TUH_CDC ///< Enable Virtual Serial (Communication Device Class) /** @} */ /** @} */ // group Host diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c index c888f7bf7..81e8a172c 100644 --- a/examples/host/cdc_msc_hid/src/main.c +++ b/examples/host/cdc_msc_hid/src/main.c @@ -66,7 +66,7 @@ int main(void) led_blinking_task(); -#if CFG_TUSB_HOST_CDC +#if CFG_TUH_CDC virtual_com_task(); #endif @@ -81,7 +81,7 @@ int main(void) //--------------------------------------------------------------------+ // USB CDC //--------------------------------------------------------------------+ -#if CFG_TUSB_HOST_CDC +#if CFG_TUH_CDC void tuh_cdc_mounted_cb(uint8_t dev_addr) { diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index 8d3e39c64..a77d9ba5e 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -84,11 +84,11 @@ //-------------------------------------------------------------------- #define CFG_TUH_HUB 1 +#define CFG_TUH_CDC 1 #define CFG_TUSB_HOST_HID_KEYBOARD 0 #define CFG_TUSB_HOST_HID_MOUSE 0 #define CFG_TUSB_HOST_HID_GENERIC 0 // (not yet supported) -#define CFG_TUSB_HOST_MSC 0 -#define CFG_TUSB_HOST_CDC 1 +#define CFG_TUH_MSC 0 #define CFG_TUSB_HOST_DEVICE_MAX (CFG_TUH_HUB ? 5 : 1) // normal hub has 4 ports diff --git a/examples/obsolete/host/src/cdc_serial_host_app.c b/examples/obsolete/host/src/cdc_serial_host_app.c index 85604dcdf..1be2e9d8b 100644 --- a/examples/obsolete/host/src/cdc_serial_host_app.c +++ b/examples/obsolete/host/src/cdc_serial_host_app.c @@ -39,7 +39,7 @@ #include "cdc_serial_host_app.h" #include "app_os_prio.h" -#if CFG_TUSB_HOST_CDC +#if CFG_TUH_CDC #define QUEUE_SERIAL_DEPTH 100 diff --git a/examples/obsolete/host/src/cdc_serial_host_app.h b/examples/obsolete/host/src/cdc_serial_host_app.h index eef00bb55..f95cbbdab 100644 --- a/examples/obsolete/host/src/cdc_serial_host_app.h +++ b/examples/obsolete/host/src/cdc_serial_host_app.h @@ -53,7 +53,7 @@ extern "C" { #endif -#if CFG_TUSB_HOST_CDC +#if CFG_TUH_CDC void cdc_serial_host_app_init(void); void cdc_serial_host_app_task(void* param); diff --git a/examples/obsolete/host/src/main.c b/examples/obsolete/host/src/main.c index 0f2905fc6..320e1c8f5 100644 --- a/examples/obsolete/host/src/main.c +++ b/examples/obsolete/host/src/main.c @@ -138,6 +138,6 @@ void print_greeting(void) if (CFG_TUH_HUB ) puts(" - Hub (1 level only)"); if (CFG_TUSB_HOST_HID_MOUSE ) puts(" - HID Mouse"); if (CFG_TUSB_HOST_HID_KEYBOARD ) puts(" - HID Keyboard"); - if (CFG_TUSB_HOST_MSC ) puts(" - Mass Storage"); - if (CFG_TUSB_HOST_CDC ) puts(" - Communication Device Class"); + if (CFG_TUH_MSC ) puts(" - Mass Storage"); + if (CFG_TUH_CDC ) puts(" - Communication Device Class"); } diff --git a/examples/obsolete/host/src/msc_cli.c b/examples/obsolete/host/src/msc_cli.c index 75dbb1c01..fa1f986a5 100644 --- a/examples/obsolete/host/src/msc_cli.c +++ b/examples/obsolete/host/src/msc_cli.c @@ -39,7 +39,7 @@ #include "msc_cli.h" #include "ctype.h" -#if CFG_TUSB_HOST_MSC +#if CFG_TUH_MSC #include "ff.h" #include "diskio.h" diff --git a/examples/obsolete/host/src/msc_host_app.c b/examples/obsolete/host/src/msc_host_app.c index 1cfe9ec60..89993cefe 100644 --- a/examples/obsolete/host/src/msc_host_app.c +++ b/examples/obsolete/host/src/msc_host_app.c @@ -42,7 +42,7 @@ #include "msc_host_app.h" #include "app_os_prio.h" -#if CFG_TUSB_HOST_MSC +#if CFG_TUH_MSC #include "msc_cli.h" #include "ff.h" diff --git a/examples/obsolete/host/src/msc_host_app.h b/examples/obsolete/host/src/msc_host_app.h index c6e508e6c..0e153fc1d 100644 --- a/examples/obsolete/host/src/msc_host_app.h +++ b/examples/obsolete/host/src/msc_host_app.h @@ -54,7 +54,7 @@ extern "C" { #endif -#if CFG_TUSB_HOST_MSC +#if CFG_TUH_MSC void msc_host_app_init(void); void msc_host_app_task(void* param); diff --git a/examples/obsolete/host/src/rndis_host_app.c b/examples/obsolete/host/src/rndis_host_app.c index 5bb60182c..374e13a2a 100644 --- a/examples/obsolete/host/src/rndis_host_app.c +++ b/examples/obsolete/host/src/rndis_host_app.c @@ -39,7 +39,7 @@ #include "rndis_host_app.h" #include "app_os_prio.h" -#if CFG_TUSB_HOST_CDC && CFG_TUSB_HOST_CDC_RNDIS +#if CFG_TUH_CDC && CFG_TUH_CDC_RNDIS //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF diff --git a/examples/obsolete/host/src/rndis_host_app.h b/examples/obsolete/host/src/rndis_host_app.h index 9fa19351e..2e8437651 100644 --- a/examples/obsolete/host/src/rndis_host_app.h +++ b/examples/obsolete/host/src/rndis_host_app.h @@ -53,7 +53,7 @@ extern "C" { #endif -#if CFG_TUSB_HOST_CDC && CFG_TUSB_HOST_CDC_RNDIS +#if CFG_TUH_CDC && CFG_TUH_CDC_RNDIS void rndis_host_app_init(void); void rndis_host_app_task(void* param); diff --git a/examples/obsolete/host/src/tusb_config.h b/examples/obsolete/host/src/tusb_config.h index 3d0d5f3db..e555c8f35 100644 --- a/examples/obsolete/host/src/tusb_config.h +++ b/examples/obsolete/host/src/tusb_config.h @@ -58,8 +58,8 @@ #define CFG_TUSB_HOST_HID_KEYBOARD 1 #define CFG_TUSB_HOST_HID_MOUSE 1 #define CFG_TUSB_HOST_HID_GENERIC 0 // (not yet supported) -#define CFG_TUSB_HOST_MSC 1 -#define CFG_TUSB_HOST_CDC 1 +#define CFG_TUH_MSC 1 +#define CFG_TUH_CDC 1 #define CFG_TUSB_HOST_DEVICE_MAX (CFG_TUH_HUB ? 5 : 1) // normal hub has 4 ports diff --git a/lib/fatfs/ccsbcs.c b/lib/fatfs/ccsbcs.c index 5cf0dd503..07d6f0983 100644 --- a/lib/fatfs/ccsbcs.c +++ b/lib/fatfs/ccsbcs.c @@ -27,7 +27,7 @@ #include "ff.h" -#if CFG_TUSB_HOST_MSC +#if CFG_TUH_MSC #if _CODE_PAGE == 437 #define _TBLDEF 1 @@ -540,4 +540,4 @@ WCHAR ff_wtoupper ( /* Upper converted character */ return tbl_lower[i] ? tbl_upper[i] : chr; } -#endif // CFG_TUSB_HOST_MSC +#endif // CFG_TUH_MSC diff --git a/lib/fatfs/diskio.c b/lib/fatfs/diskio.c index 54a228019..939015c00 100644 --- a/lib/fatfs/diskio.c +++ b/lib/fatfs/diskio.c @@ -38,7 +38,7 @@ #include "tusb.h" -#if CFG_TUSB_HOST_MSC +#if CFG_TUH_MSC //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ @@ -204,4 +204,4 @@ DWORD get_fattime (void) return timestamp.value; } -#endif // CFG_TUSB_HOST_MSC +#endif // CFG_TUH_MSC diff --git a/lib/fatfs/ff.c b/lib/fatfs/ff.c index 897965332..79414af07 100644 --- a/lib/fatfs/ff.c +++ b/lib/fatfs/ff.c @@ -99,7 +99,7 @@ #include "ff.h" /* FatFs configurations and declarations */ #include "diskio.h" /* Declarations of low level disk I/O functions */ -#if CFG_TUSB_HOST_MSC +#if CFG_TUH_MSC /*-------------------------------------------------------------------------- Module Private Definitions @@ -4327,4 +4327,4 @@ int f_printf ( #endif /* !_FS_READONLY */ #endif /* _USE_STRFUNC */ -#endif // CFG_TUSB_HOST_MSC +#endif // CFG_TUH_MSC diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 27ef502e0..2cf288a93 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -38,7 +38,7 @@ #include "tusb_option.h" -#if (MODE_HOST_SUPPORTED && CFG_TUSB_HOST_CDC) +#if (MODE_HOST_SUPPORTED && CFG_TUH_CDC) #define _TINY_USB_SOURCE_FILE_ diff --git a/src/class/cdc/cdc_rndis_host.c b/src/class/cdc/cdc_rndis_host.c index 89ea3b32f..df4a29938 100644 --- a/src/class/cdc/cdc_rndis_host.c +++ b/src/class/cdc/cdc_rndis_host.c @@ -38,7 +38,7 @@ #include "tusb_option.h" -#if (MODE_HOST_SUPPORTED && CFG_TUSB_HOST_CDC && CFG_TUSB_HOST_CDC_RNDIS) +#if (MODE_HOST_SUPPORTED && CFG_TUH_CDC && CFG_TUH_CDC_RNDIS) #define _TINY_USB_SOURCE_FILE_ diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index baef7ff44..12bffdf2d 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -38,7 +38,7 @@ #include "tusb_option.h" -#if MODE_HOST_SUPPORTED & CFG_TUSB_HOST_MSC +#if MODE_HOST_SUPPORTED & CFG_TUH_MSC #define _TINY_USB_SOURCE_FILE_ diff --git a/src/host/hcd.h b/src/host/hcd.h index a6b1b7027..9637ca661 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -82,7 +82,7 @@ typedef struct // Max number of endpoints per device enum { HCD_MAX_ENDPOINT = CFG_TUH_HUB + CFG_TUSB_HOST_HID_KEYBOARD + CFG_TUSB_HOST_HID_MOUSE + CFG_TUSB_HOST_HID_GENERIC + - CFG_TUSB_HOST_MSC*2 + CFG_TUSB_HOST_CDC*3, + CFG_TUH_MSC*2 + CFG_TUH_CDC*3, HCD_MAX_XFER = HCD_MAX_ENDPOINT*2, }; diff --git a/src/tusb.h b/src/tusb.h index 4f8918ce5..e31513f87 100644 --- a/src/tusb.h +++ b/src/tusb.h @@ -59,11 +59,11 @@ #include "class/hid/hid_host.h" #endif - #if CFG_TUSB_HOST_MSC + #if CFG_TUH_MSC #include "class/msc/msc_host.h" #endif - #if CFG_TUSB_HOST_CDC + #if CFG_TUH_CDC #include "class/cdc/cdc_host.h" #endif diff --git a/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c b/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c index 12dce0528..fe7d05516 100644 --- a/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c +++ b/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c @@ -51,7 +51,7 @@ #include "descriptor_cdc.h" #include "cdc_host.h" -#if CFG_TUSB_HOST_CDC_RNDIS // TODO enable +#if CFG_TUH_CDC_RNDIS // TODO enable #include "cdc_rndis_host.h" #endif diff --git a/tests/lpc18xx_43xx/test/host/host_helper.h b/tests/lpc18xx_43xx/test/host/host_helper.h index c293ec748..b8095b9aa 100644 --- a/tests/lpc18xx_43xx/test/host/host_helper.h +++ b/tests/lpc18xx_43xx/test/host/host_helper.h @@ -42,7 +42,7 @@ static inline void helper_class_init_expect(void) { // class code number order -#if CFG_TUSB_HOST_CDC +#if CFG_TUH_CDC cdch_init_Expect(); #endif @@ -50,7 +50,7 @@ static inline void helper_class_init_expect(void) hidh_init_Expect(); #endif -#if CFG_TUSB_HOST_MSC +#if CFG_TUH_MSC msch_init_Expect(); #endif diff --git a/tests/support/tusb_config.h b/tests/support/tusb_config.h index 3e5721019..3aacdabdc 100644 --- a/tests/support/tusb_config.h +++ b/tests/support/tusb_config.h @@ -58,10 +58,10 @@ #define CFG_TUH_HUB 0 #define CFG_TUSB_HOST_HID_KEYBOARD 1 #define CFG_TUSB_HOST_HID_MOUSE 1 -#define CFG_TUSB_HOST_MSC 1 +#define CFG_TUH_MSC 1 #define CFG_TUSB_HOST_HID_GENERIC 0 -#define CFG_TUSB_HOST_CDC 1 -#define CFG_TUSB_HOST_CDC_RNDIS 0 +#define CFG_TUH_CDC 1 +#define CFG_TUH_CDC_RNDIS 0 // Test support #define TEST_CONTROLLER_HOST_START_INDEX \ -- cgit v1.3.1 From 07c3fd5e1e6faf75c206a2abb8be739b78db801b Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 6 Dec 2018 22:47:49 +0700 Subject: clean up hub --- examples/host/cdc_msc_hid/src/tusb_config.h | 2 +- src/class/cdc/cdc_host.c | 14 ++--- src/class/cdc/cdc_host.h | 8 +-- src/host/hub.c | 98 ++++++++++------------------- src/host/hub.h | 12 ++-- src/host/usbh.c | 60 +++++++++--------- src/host/usbh.h | 2 +- 7 files changed, 78 insertions(+), 118 deletions(-) (limited to 'src/host') diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index a77d9ba5e..ef0b55ef9 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -83,7 +83,7 @@ // DEVICE CONFIGURATION //-------------------------------------------------------------------- -#define CFG_TUH_HUB 1 +#define CFG_TUH_HUB 1 // not tested #define CFG_TUH_CDC 1 #define CFG_TUSB_HOST_HID_KEYBOARD 0 #define CFG_TUSB_HOST_HID_MOUSE 0 diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 2cf288a93..7bf23f37f 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -142,11 +142,9 @@ void cdch_init(void) tu_memclr(cdch_data, sizeof(cdch_data_t)*CFG_TUSB_HOST_DEVICE_MAX); } -tusb_error_t cdch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) +bool cdch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) { - //OSAL_SUBTASK_BEGIN // TODO change following assert to subtask_assert - if ( CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL != p_interface_desc->bInterfaceSubClass) return TUSB_ERROR_CDC_UNSUPPORTED_SUBCLASS; if ( !(tu_within(CDC_COMM_PROTOCOL_ATCOMMAND, p_interface_desc->bInterfaceProtocol, CDC_COMM_PROTOCOL_ATCOMMAND_CDMA) || @@ -185,7 +183,7 @@ tusb_error_t cdch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_ (*p_length) += p_desc[DESC_OFFSET_LEN]; p_desc = descriptor_next(p_desc); - TU_ASSERT(pipehandle_is_valid(p_cdc->pipe_notification), TUSB_ERROR_HCD_OPEN_PIPE_FAILED); + TU_ASSERT(pipehandle_is_valid(p_cdc->pipe_notification)); } //------------- Data Interface (if any) -------------// @@ -199,14 +197,14 @@ tusb_error_t cdch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_ for(uint32_t i=0; i<2; i++) { tusb_desc_endpoint_t const *p_endpoint = (tusb_desc_endpoint_t const *) p_desc; - TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType, TUSB_ERROR_USBH_DESCRIPTOR_CORRUPTED); - TU_ASSERT(TUSB_XFER_BULK == p_endpoint->bmAttributes.xfer, TUSB_ERROR_USBH_DESCRIPTOR_CORRUPTED); + TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType); + TU_ASSERT(TUSB_XFER_BULK == p_endpoint->bmAttributes.xfer); pipe_handle_t * p_pipe_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_IN_MASK ) ? &p_cdc->pipe_in : &p_cdc->pipe_out; (*p_pipe_hdl) = hcd_pipe_open(dev_addr, p_endpoint, TUSB_CLASS_CDC); - TU_ASSERT ( pipehandle_is_valid(*p_pipe_hdl), TUSB_ERROR_HCD_OPEN_PIPE_FAILED ); + TU_ASSERT ( pipehandle_is_valid(*p_pipe_hdl) ); (*p_length) += p_desc[DESC_OFFSET_LEN]; p_desc = descriptor_next( p_desc ); @@ -218,7 +216,7 @@ tusb_error_t cdch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_ tuh_cdc_mounted_cb(dev_addr); } - //OSAL_SUBTASK_END + return true; } void cdch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes) diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index 0b863bb61..3252aa48d 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -149,10 +149,10 @@ typedef struct { extern cdch_data_t cdch_data[CFG_TUSB_HOST_DEVICE_MAX]; // TODO consider to move to cdch internal header file -void cdch_init(void); -tusb_error_t cdch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; -void cdch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); -void cdch_close(uint8_t dev_addr); +void cdch_init(void); +bool cdch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; +void cdch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); +void cdch_close(uint8_t dev_addr); #endif diff --git a/src/host/hub.c b/src/host/hub.c index 485e47147..a418774f6 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -67,76 +67,53 @@ ATTR_ALIGNED(4) CFG_TUSB_MEM_SECTION STATIC_VAR uint8_t hub_enum_buffer[sizeof(d //--------------------------------------------------------------------+ // HUB //--------------------------------------------------------------------+ -tusb_error_t hub_port_clear_feature_subtask(uint8_t hub_addr, uint8_t hub_port, uint8_t feature) +bool hub_port_clear_feature_subtask(uint8_t hub_addr, uint8_t hub_port, uint8_t feature) { - tusb_error_t error; - - OSAL_SUBTASK_BEGIN - - STASK_ASSERT(HUB_FEATURE_PORT_CONNECTION_CHANGE <= feature && - feature <= HUB_FEATURE_PORT_RESET_CHANGE); + TU_ASSERT(HUB_FEATURE_PORT_CONNECTION_CHANGE <= feature && feature <= HUB_FEATURE_PORT_RESET_CHANGE); //------------- Clear Port Feature request -------------// - STASK_INVOKE( - usbh_control_xfer_subtask( hub_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), - HUB_REQUEST_CLEAR_FEATURE, feature, hub_port, - 0, NULL ), - error - ); - STASK_ASSERT_ERR( error ); + TU_ASSERT( usbh_control_xfer_subtask( hub_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), + HUB_REQUEST_CLEAR_FEATURE, feature, hub_port, + 0, NULL ) ); //------------- Get Port Status to check if feature is cleared -------------// - STASK_INVOKE( - usbh_control_xfer_subtask( hub_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), - HUB_REQUEST_GET_STATUS, 0, hub_port, - 4, hub_enum_buffer ), - error - ); - STASK_ASSERT_ERR( error ); + TU_ASSERT( usbh_control_xfer_subtask( hub_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), + HUB_REQUEST_GET_STATUS, 0, hub_port, + 4, hub_enum_buffer ) ); //------------- Check if feature is cleared -------------// hub_port_status_response_t * p_port_status; p_port_status = (hub_port_status_response_t *) hub_enum_buffer; - STASK_ASSERT( !BIT_TEST_(p_port_status->status_change.value, feature-16) ); + TU_ASSERT( !BIT_TEST_(p_port_status->status_change.value, feature-16) ); - OSAL_SUBTASK_END + return true; } -tusb_error_t hub_port_reset_subtask(uint8_t hub_addr, uint8_t hub_port) +bool hub_port_reset_subtask(uint8_t hub_addr, uint8_t hub_port) { enum { RESET_DELAY = 200 }; // USB specs say only 50ms but many devices require much longer tusb_error_t error; - OSAL_SUBTASK_BEGIN - //------------- Set Port Reset -------------// - STASK_INVOKE( - usbh_control_xfer_subtask( hub_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), + TU_ASSERT( usbh_control_xfer_subtask( hub_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), HUB_REQUEST_SET_FEATURE, HUB_FEATURE_PORT_RESET, hub_port, - 0, NULL ), - error - ); - STASK_ASSERT_ERR( error ); + 0, NULL ) ); osal_task_delay(RESET_DELAY); // TODO Hub wait for Status Endpoint on Reset Change //------------- Get Port Status to check if port is enabled, powered and reset_change -------------// - STASK_INVOKE( - usbh_control_xfer_subtask( hub_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), - HUB_REQUEST_GET_STATUS, 0, hub_port, - 4, hub_enum_buffer ), - error - ); - STASK_ASSERT_ERR( error ); + TU_ASSERT( usbh_control_xfer_subtask( hub_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), + HUB_REQUEST_GET_STATUS, 0, hub_port, + 4, hub_enum_buffer ) ); hub_port_status_response_t * p_port_status; p_port_status = (hub_port_status_response_t *) hub_enum_buffer; - STASK_ASSERT ( p_port_status->status_change.reset && p_port_status->status_current.connect_status && - p_port_status->status_current.port_power && p_port_status->status_current.port_enable); + TU_ASSERT ( p_port_status->status_change.reset && p_port_status->status_current.connect_status && + p_port_status->status_current.port_power && p_port_status->status_current.port_enable); - OSAL_SUBTASK_END + return true; } // can only get the speed RIGHT AFTER hub_port_reset_subtask call @@ -156,36 +133,28 @@ void hub_init(void) // hub_enum_sem_hdl = osal_semaphore_create( OSAL_SEM_REF(hub_enum_semaphore) ); } -tusb_error_t hub_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) +bool hub_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) { - tusb_error_t error; - - OSAL_SUBTASK_BEGIN - // not support multiple TT yet - if ( p_interface_desc->bInterfaceProtocol > 1 ) return TUSB_ERROR_HUB_FEATURE_NOT_SUPPORTED; + if ( p_interface_desc->bInterfaceProtocol > 1 ) return false; //------------- Open Interrupt Status Pipe -------------// tusb_desc_endpoint_t const *p_endpoint; p_endpoint = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) p_interface_desc ); - STASK_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType); - STASK_ASSERT(TUSB_XFER_INTERRUPT == p_endpoint->bmAttributes.xfer); + TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType); + TU_ASSERT(TUSB_XFER_INTERRUPT == p_endpoint->bmAttributes.xfer); hub_data[dev_addr-1].pipe_status = hcd_pipe_open(dev_addr, p_endpoint, TUSB_CLASS_HUB); - STASK_ASSERT( pipehandle_is_valid(hub_data[dev_addr-1].pipe_status) ); + TU_ASSERT( pipehandle_is_valid(hub_data[dev_addr-1].pipe_status) ); hub_data[dev_addr-1].interface_number = p_interface_desc->bInterfaceNumber; (*p_length) = sizeof(tusb_desc_interface_t) + sizeof(tusb_desc_endpoint_t); //------------- Get Hub Descriptor -------------// - STASK_INVOKE( - usbh_control_xfer_subtask( dev_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_DEVICE), - HUB_REQUEST_GET_DESCRIPTOR, 0, 0, - sizeof(descriptor_hub_desc_t), hub_enum_buffer ), - error - ); - STASK_ASSERT_ERR(error); + TU_ASSERT( usbh_control_xfer_subtask( dev_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_DEVICE), + HUB_REQUEST_GET_DESCRIPTOR, 0, 0, + sizeof(descriptor_hub_desc_t), hub_enum_buffer ) ); // only care about this field in hub descriptor hub_data[dev_addr-1].port_number = ((descriptor_hub_desc_t*) hub_enum_buffer)->bNbrPorts; @@ -194,18 +163,15 @@ tusb_error_t hub_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_i static uint8_t i; for(i=1; i <= hub_data[dev_addr-1].port_number; i++) { - STASK_INVOKE( - usbh_control_xfer_subtask( dev_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), - HUB_REQUEST_SET_FEATURE, HUB_FEATURE_PORT_POWER, i, - 0, NULL ), - error - ); + TU_ASSERT( usbh_control_xfer_subtask( dev_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), + HUB_REQUEST_SET_FEATURE, HUB_FEATURE_PORT_POWER, i, + 0, NULL ) ); } //------------- Queue the initial Status endpoint transfer -------------// - STASK_ASSERT_ERR ( hcd_pipe_xfer(hub_data[dev_addr-1].pipe_status, &hub_data[dev_addr-1].status_change, 1, true) ); + TU_ASSERT( TUSB_ERROR_NONE == hcd_pipe_xfer(hub_data[dev_addr-1].pipe_status, &hub_data[dev_addr-1].status_change, 1, true) ); - OSAL_SUBTASK_END + return true; } // is the response of interrupt endpoint polling diff --git a/src/host/hub.h b/src/host/hub.h index 9376a2698..b949be384 100644 --- a/src/host/hub.h +++ b/src/host/hub.h @@ -184,8 +184,8 @@ typedef struct { TU_VERIFY_STATIC( sizeof(hub_port_status_response_t) == 4, "size is not correct"); -tusb_error_t hub_port_reset_subtask(uint8_t hub_addr, uint8_t hub_port); -tusb_error_t hub_port_clear_feature_subtask(uint8_t hub_addr, uint8_t hub_port, uint8_t feature); +bool hub_port_reset_subtask(uint8_t hub_addr, uint8_t hub_port); +bool hub_port_clear_feature_subtask(uint8_t hub_addr, uint8_t hub_port, uint8_t feature); tusb_speed_t hub_port_get_speed(void); tusb_error_t hub_status_pipe_queue(uint8_t dev_addr); @@ -194,10 +194,10 @@ tusb_error_t hub_status_pipe_queue(uint8_t dev_addr); //--------------------------------------------------------------------+ #ifdef _TINY_USB_SOURCE_FILE_ -void hub_init(void); -tusb_error_t hub_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; -void hub_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); -void hub_close(uint8_t dev_addr); +void hub_init(void); +bool hub_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; +void hub_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); +void hub_close(uint8_t dev_addr); #endif diff --git a/src/host/usbh.c b/src/host/usbh.c index dc13030c3..b18714635 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -76,7 +76,7 @@ static host_class_driver_t const usbh_class_drivers[] = }, #endif - #if CFG_TUSB_HOST_CDC + #if CFG_TUH_CDC [TUSB_CLASS_CDC] = { .init = cdch_init, .open_subtask = cdch_open_subtask, @@ -85,7 +85,7 @@ static host_class_driver_t const usbh_class_drivers[] = }, #endif - #if CFG_TUSB_HOST_MSC + #if CFG_TUH_MSC [TUSB_CLASS_MSC] = { .init = msch_init, .open_subtask = msch_open_subtask, @@ -404,40 +404,37 @@ bool usbh_task_body(void) else { //------------- Get Port Status -------------// - STASK_INVOKE( - usbh_control_xfer_subtask( usbh_devices[0].hub_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), - HUB_REQUEST_GET_STATUS, 0, usbh_devices[0].hub_port, - 4, enum_data_buffer ), - error - ); -// STASK_ASSERT_ERR( error ); - STASK_ASSERT_ERR_HDLR(error, hub_status_pipe_queue( usbh_devices[0].hub_addr) ); // TODO hub refractor + TU_VERIFY_HDLR( usbh_control_xfer_subtask( usbh_devices[0].hub_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), + HUB_REQUEST_GET_STATUS, 0, usbh_devices[0].hub_port, + 4, enum_data_buffer ) + , hub_status_pipe_queue( usbh_devices[0].hub_addr) ); // TODO hub refractor // Acknowledge Port Connection Change - STASK_INVOKE( hub_port_clear_feature_subtask(usbh_devices[0].hub_addr, usbh_devices[0].hub_port, HUB_FEATURE_PORT_CONNECTION_CHANGE), error ); + hub_port_clear_feature_subtask(usbh_devices[0].hub_addr, usbh_devices[0].hub_port, HUB_FEATURE_PORT_CONNECTION_CHANGE); hub_port_status_response_t * p_port_status; p_port_status = ((hub_port_status_response_t *) enum_data_buffer); - if ( ! p_port_status->status_change.connect_status ) STASK_RETURN(TUSB_ERROR_NONE); // only handle connection change + if ( ! p_port_status->status_change.connect_status ) return true; // only handle connection change if ( ! p_port_status->status_current.connect_status ) - { // Disconnection event + { + // Disconnection event usbh_device_unplugged(usbh_devices[0].core_id, usbh_devices[0].hub_addr, usbh_devices[0].hub_port); (void) hub_status_pipe_queue( usbh_devices[0].hub_addr ); // done with hub, waiting for next data on status pipe - STASK_RETURN(TUSB_ERROR_NONE); // restart task + return true; // restart task } else - { // Connection Event - STASK_INVOKE ( hub_port_reset_subtask(usbh_devices[0].hub_addr, usbh_devices[0].hub_port), error ); -// STASK_ASSERT_ERR( error ); - STASK_ASSERT_ERR_HDLR(error, hub_status_pipe_queue( usbh_devices[0].hub_addr) ); // TODO hub refractor + { + // Connection Event + TU_VERIFY_HDLR(hub_port_reset_subtask(usbh_devices[0].hub_addr, usbh_devices[0].hub_port), + hub_status_pipe_queue( usbh_devices[0].hub_addr) ); // TODO hub refractor usbh_devices[0].speed = hub_port_get_speed(); // Acknowledge Port Reset Change - STASK_INVOKE( hub_port_clear_feature_subtask(usbh_devices[0].hub_addr, usbh_devices[0].hub_port, HUB_FEATURE_PORT_RESET_CHANGE), error ); + hub_port_clear_feature_subtask(usbh_devices[0].hub_addr, usbh_devices[0].hub_port, HUB_FEATURE_PORT_RESET_CHANGE); } } #endif @@ -446,27 +443,28 @@ bool usbh_task_body(void) usbh_devices[0].state = TUSB_DEVICE_STATE_ADDRESSED; //------------- Get first 8 bytes of device descriptor to get Control Endpoint Size -------------// - // TODO some slow device is observed to fail the very fist controller xfer, can try more times - TU_ASSERT(usbh_control_xfer_subtask(0, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_GET_DESCRIPTOR, - (TUSB_DESC_DEVICE << 8), 0, 8, enum_data_buffer)); + bool is_ok = usbh_control_xfer_subtask(0, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), + TUSB_REQ_GET_DESCRIPTOR, + (TUSB_DESC_DEVICE << 8), 0, 8, enum_data_buffer); //------------- Reset device again before Set Address -------------// if (usbh_devices[0].hub_addr == 0) { // connected directly to roothub + TU_ASSERT(is_ok); // TODO some slow device is observed to fail the very fist controller xfer, can try more times hcd_port_reset( usbh_devices[0].core_id ); // reset port after 8 byte descriptor osal_task_delay(RESET_DELAY); } #if CFG_TUH_HUB else - { // connected via a hub - STASK_ASSERT_ERR_HDLR(error, hub_status_pipe_queue( usbh_devices[0].hub_addr) ); // TODO hub refractor - STASK_INVOKE ( hub_port_reset_subtask(usbh_devices[0].hub_addr, usbh_devices[0].hub_port), error ); + { + // connected via a hub + TU_VERIFY_HDLR(is_ok, hub_status_pipe_queue( usbh_devices[0].hub_addr) ); // TODO hub refractor - if ( TUSB_ERROR_NONE == error ) - { // Acknowledge Port Reset Change if Reset Successful - STASK_INVOKE( hub_port_clear_feature_subtask(usbh_devices[0].hub_addr, usbh_devices[0].hub_port, HUB_FEATURE_PORT_RESET_CHANGE), error ); + if ( hub_port_reset_subtask(usbh_devices[0].hub_addr, usbh_devices[0].hub_port) ) + { + // Acknowledge Port Reset Change if Reset Successful + hub_port_clear_feature_subtask(usbh_devices[0].hub_addr, usbh_devices[0].hub_port, HUB_FEATURE_PORT_RESET_CHANGE); } (void) hub_status_pipe_queue( usbh_devices[0].hub_addr ); // done with hub, waiting for next data on status pipe @@ -560,9 +558,7 @@ bool usbh_task_body(void) static uint16_t length; length = 0; - error = usbh_class_drivers[class_index].open_subtask( new_addr, (tusb_desc_interface_t*) p_desc, &length ); - - if (error == TUSB_ERROR_NONE) + if ( usbh_class_drivers[class_index].open_subtask(new_addr, (tusb_desc_interface_t*) p_desc, &length) ) { TU_ASSERT( length >= sizeof(tusb_desc_interface_t) ); usbh_devices[new_addr].flag_supported_class |= BIT_(class_index); diff --git a/src/host/usbh.h b/src/host/usbh.h index 4909eb8a7..bcbf2902c 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -65,7 +65,7 @@ typedef enum tusb_interface_status_{ typedef struct { void (* const init) (void); - tusb_error_t (* const open_subtask)(uint8_t, tusb_desc_interface_t const *, uint16_t*); + bool (* const open_subtask)(uint8_t, tusb_desc_interface_t const *, uint16_t*); void (* const isr) (pipe_handle_t, xfer_result_t, uint32_t); void (* const close) (uint8_t); } host_class_driver_t; -- cgit v1.3.1 From ac829c0a873a252ea9256aade275892b4ae509a5 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 6 Dec 2018 22:50:19 +0700 Subject: minor clean up --- src/class/cdc/cdc_host.c | 9 +----- src/host/usbh.c | 75 ++++++++++++++++++++++-------------------------- src/host/usbh_hcd.h | 4 --- 3 files changed, 35 insertions(+), 53 deletions(-) (limited to 'src/host') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 7bf23f37f..2aafdb934 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -69,13 +69,7 @@ static inline cdc_pipeid_t get_app_pipeid(pipe_handle_t pipe_hdl) static inline bool tusbh_cdc_is_mounted(uint8_t dev_addr) { -// FIXME cannot use mounted class flag as at the point _open_sublass is called, the flag is not set yet -#ifdef _TEST_ - return (tusbh_device_get_mounted_class_flag(dev_addr) & BIT_(TUSB_CLASS_CDC)) != 0; -#else - return pipehandle_is_valid(cdch_data[dev_addr-1].pipe_in) && - pipehandle_is_valid(cdch_data[dev_addr-1].pipe_out); -#endif + return pipehandle_is_valid(cdch_data[dev_addr-1].pipe_in) && pipehandle_is_valid(cdch_data[dev_addr-1].pipe_out); } bool tuh_cdc_is_busy(uint8_t dev_addr, cdc_pipeid_t pipeid) @@ -100,7 +94,6 @@ bool tuh_cdc_is_busy(uint8_t dev_addr, cdc_pipeid_t pipeid) } } - //--------------------------------------------------------------------+ // APPLICATION API (parameter validation needed) //--------------------------------------------------------------------+ diff --git a/src/host/usbh.c b/src/host/usbh.c index b18714635..215f4e05e 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -361,7 +361,6 @@ bool usbh_task_body(void) RESET_DELAY = 200 // USB specs say only 50ms but many devices require much longer }; - tusb_error_t error; usbh_enumerate_t enum_entry; // for OSAL_NONE local variable won't retain value after blocking service sem_wait/queue_recv @@ -371,31 +370,33 @@ bool usbh_task_body(void) if ( !osal_queue_receive(_usbh_q, &enum_entry) ) return false; - usbh_devices[0].core_id = enum_entry.core_id; // TODO refractor integrate to device_pool - usbh_devices[0].hub_addr = enum_entry.hub_addr; - usbh_devices[0].hub_port = enum_entry.hub_port; - usbh_devices[0].state = TUSB_DEVICE_STATE_UNPLUG; + usbh_device_info_t* dev0 = &usbh_devices[0]; + + dev0->core_id = enum_entry.core_id; // TODO refractor integrate to device_pool + dev0->hub_addr = enum_entry.hub_addr; + dev0->hub_port = enum_entry.hub_port; + dev0->state = TUSB_DEVICE_STATE_UNPLUG; //------------- connected/disconnected directly with roothub -------------// - if ( usbh_devices[0].hub_addr == 0) + if ( dev0->hub_addr == 0) { - if( hcd_port_connect_status(usbh_devices[0].core_id) ) + if( hcd_port_connect_status(dev0->core_id) ) { // connection event osal_task_delay(POWER_STABLE_DELAY); // wait until device is stable. Increase this if the first 8 bytes is failed to get // exit if device unplugged while delaying - if ( !hcd_port_connect_status(usbh_devices[0].core_id) ) return true; + if ( !hcd_port_connect_status(dev0->core_id) ) return true; - hcd_port_reset( usbh_devices[0].core_id ); // port must be reset to have correct speed operation + hcd_port_reset( dev0->core_id ); // port must be reset to have correct speed operation osal_task_delay(RESET_DELAY); - usbh_devices[0].speed = hcd_port_speed_get( usbh_devices[0].core_id ); + dev0->speed = hcd_port_speed_get( dev0->core_id ); } else { // disconnection event - usbh_device_unplugged(usbh_devices[0].core_id, 0, 0); + usbh_device_unplugged(dev0->core_id, 0, 0); return true; // restart task } } @@ -404,13 +405,13 @@ bool usbh_task_body(void) else { //------------- Get Port Status -------------// - TU_VERIFY_HDLR( usbh_control_xfer_subtask( usbh_devices[0].hub_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), - HUB_REQUEST_GET_STATUS, 0, usbh_devices[0].hub_port, + TU_VERIFY_HDLR( usbh_control_xfer_subtask( dev0->hub_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), + HUB_REQUEST_GET_STATUS, 0, dev0->hub_port, 4, enum_data_buffer ) - , hub_status_pipe_queue( usbh_devices[0].hub_addr) ); // TODO hub refractor + , hub_status_pipe_queue( dev0->hub_addr) ); // TODO hub refractor // Acknowledge Port Connection Change - hub_port_clear_feature_subtask(usbh_devices[0].hub_addr, usbh_devices[0].hub_port, HUB_FEATURE_PORT_CONNECTION_CHANGE); + hub_port_clear_feature_subtask(dev0->hub_addr, dev0->hub_port, HUB_FEATURE_PORT_CONNECTION_CHANGE); hub_port_status_response_t * p_port_status; p_port_status = ((hub_port_status_response_t *) enum_data_buffer); @@ -420,27 +421,27 @@ bool usbh_task_body(void) if ( ! p_port_status->status_current.connect_status ) { // Disconnection event - usbh_device_unplugged(usbh_devices[0].core_id, usbh_devices[0].hub_addr, usbh_devices[0].hub_port); + usbh_device_unplugged(dev0->core_id, dev0->hub_addr, dev0->hub_port); - (void) hub_status_pipe_queue( usbh_devices[0].hub_addr ); // done with hub, waiting for next data on status pipe + (void) hub_status_pipe_queue( dev0->hub_addr ); // done with hub, waiting for next data on status pipe return true; // restart task } else { // Connection Event - TU_VERIFY_HDLR(hub_port_reset_subtask(usbh_devices[0].hub_addr, usbh_devices[0].hub_port), - hub_status_pipe_queue( usbh_devices[0].hub_addr) ); // TODO hub refractor + TU_VERIFY_HDLR(hub_port_reset_subtask(dev0->hub_addr, dev0->hub_port), + hub_status_pipe_queue( dev0->hub_addr) ); // TODO hub refractor - usbh_devices[0].speed = hub_port_get_speed(); + dev0->speed = hub_port_get_speed(); // Acknowledge Port Reset Change - hub_port_clear_feature_subtask(usbh_devices[0].hub_addr, usbh_devices[0].hub_port, HUB_FEATURE_PORT_RESET_CHANGE); + hub_port_clear_feature_subtask(dev0->hub_addr, dev0->hub_port, HUB_FEATURE_PORT_RESET_CHANGE); } } #endif TU_ASSERT_ERR( usbh_pipe_control_open(0, 8) ); - usbh_devices[0].state = TUSB_DEVICE_STATE_ADDRESSED; + dev0->state = TUSB_DEVICE_STATE_ADDRESSED; //------------- Get first 8 bytes of device descriptor to get Control Endpoint Size -------------// bool is_ok = usbh_control_xfer_subtask(0, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), @@ -448,26 +449,26 @@ bool usbh_task_body(void) (TUSB_DESC_DEVICE << 8), 0, 8, enum_data_buffer); //------------- Reset device again before Set Address -------------// - if (usbh_devices[0].hub_addr == 0) + if (dev0->hub_addr == 0) { // connected directly to roothub TU_ASSERT(is_ok); // TODO some slow device is observed to fail the very fist controller xfer, can try more times - hcd_port_reset( usbh_devices[0].core_id ); // reset port after 8 byte descriptor + hcd_port_reset( dev0->core_id ); // reset port after 8 byte descriptor osal_task_delay(RESET_DELAY); } #if CFG_TUH_HUB else { // connected via a hub - TU_VERIFY_HDLR(is_ok, hub_status_pipe_queue( usbh_devices[0].hub_addr) ); // TODO hub refractor + TU_VERIFY_HDLR(is_ok, hub_status_pipe_queue( dev0->hub_addr) ); // TODO hub refractor - if ( hub_port_reset_subtask(usbh_devices[0].hub_addr, usbh_devices[0].hub_port) ) + if ( hub_port_reset_subtask(dev0->hub_addr, dev0->hub_port) ) { // Acknowledge Port Reset Change if Reset Successful - hub_port_clear_feature_subtask(usbh_devices[0].hub_addr, usbh_devices[0].hub_port, HUB_FEATURE_PORT_RESET_CHANGE); + hub_port_clear_feature_subtask(dev0->hub_addr, dev0->hub_port, HUB_FEATURE_PORT_RESET_CHANGE); } - (void) hub_status_pipe_queue( usbh_devices[0].hub_addr ); // done with hub, waiting for next data on status pipe + (void) hub_status_pipe_queue( dev0->hub_addr ); // done with hub, waiting for next data on status pipe } #endif @@ -480,14 +481,14 @@ bool usbh_task_body(void) 0, NULL )); //------------- update port info & close control pipe of addr0 -------------// - usbh_devices[new_addr].core_id = usbh_devices[0].core_id; - usbh_devices[new_addr].hub_addr = usbh_devices[0].hub_addr; - usbh_devices[new_addr].hub_port = usbh_devices[0].hub_port; - usbh_devices[new_addr].speed = usbh_devices[0].speed; + usbh_devices[new_addr].core_id = dev0->core_id; + usbh_devices[new_addr].hub_addr = dev0->hub_addr; + usbh_devices[new_addr].hub_port = dev0->hub_port; + usbh_devices[new_addr].speed = dev0->speed; usbh_devices[new_addr].state = TUSB_DEVICE_STATE_ADDRESSED; usbh_pipe_control_close(0); - usbh_devices[0].state = TUSB_DEVICE_STATE_UNPLUG; + dev0->state = TUSB_DEVICE_STATE_UNPLUG; // open control pipe for new address TU_ASSERT_ERR ( usbh_pipe_control_open(new_addr, ((tusb_desc_device_t*) enum_data_buffer)->bMaxPacketSize0 ) ); @@ -599,14 +600,6 @@ void usbh_task(void* param) #endif } -//--------------------------------------------------------------------+ -// REPORTER TASK & ITS DATA -//--------------------------------------------------------------------+ - - - - - //--------------------------------------------------------------------+ // INTERNAL HELPER //--------------------------------------------------------------------+ diff --git a/src/host/usbh_hcd.h b/src/host/usbh_hcd.h index cd2a712e4..19a9f2286 100644 --- a/src/host/usbh_hcd.h +++ b/src/host/usbh_hcd.h @@ -52,10 +52,6 @@ #include "common/tusb_common.h" #include "osal/osal.h" -#ifdef _TEST_ -#include "hcd.h" -#endif - //--------------------------------------------------------------------+ // USBH-HCD common data structure //--------------------------------------------------------------------+ -- cgit v1.3.1 From 2fe9abe71f49b9093e31e01c5be564489ed6c769 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 6 Dec 2018 23:45:24 +0700 Subject: change usbh queue to generic event queue --- src/host/hcd.h | 6 ++++++ src/host/usbh.c | 62 ++++++++++++++++++++++++++++++++++------------------- src/host/usbh_hcd.h | 7 ------ 3 files changed, 46 insertions(+), 29 deletions(-) (limited to 'src/host') diff --git a/src/host/hcd.h b/src/host/hcd.h index 9637ca661..efdfb920d 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -76,6 +76,7 @@ typedef struct uint32_t len; } xfer_complete; }; + } hcd_event_t; #if MODE_HOST_SUPPORTED @@ -117,6 +118,11 @@ void hal_hcd_isr(uint8_t hostid); void hcd_int_enable (uint8_t rhport); void hcd_int_disable(uint8_t rhport); +//--------------------------------------------------------------------+ +// Event function +//--------------------------------------------------------------------+ +void hcd_event_handler(hcd_event_t const* event, bool in_isr); + //--------------------------------------------------------------------+ // PIPE API //--------------------------------------------------------------------+ diff --git a/src/host/usbh.c b/src/host/usbh.c index 215f4e05e..7cb257a8c 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -124,7 +124,7 @@ OSAL_TASK_DEF(_usbh_task_def, "usbh", usbh_task, CFG_TUH_TASK_PRIO, CFG_TUH_TASK // Event queue // role device/host is used by OS NONE for mutex (disable usb isr) only -OSAL_QUEUE_DEF(OPT_MODE_HOST, _usbh_qdef, CFG_TUH_TASK_QUEUE_SZ, uint32_t); +OSAL_QUEUE_DEF(OPT_MODE_HOST, _usbh_qdef, CFG_TUH_TASK_QUEUE_SZ, hcd_event_t); static osal_queue_t _usbh_q; CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4) STATIC_VAR uint8_t enum_data_buffer[CFG_TUSB_HOST_ENUM_BUFFER_SIZE]; @@ -277,26 +277,40 @@ void usbh_xfer_isr(pipe_handle_t pipe_hdl, uint8_t class_code, xfer_result_t eve void usbh_hub_port_plugged_isr(uint8_t hub_addr, uint8_t hub_port) { - usbh_enumerate_t enum_entry = + hcd_event_t event = { - .core_id = usbh_devices[hub_addr].core_id, - .hub_addr = hub_addr, - .hub_port = hub_port + .rhport = usbh_devices[hub_addr].core_id, + .event_id = HCD_EVENT_DEVICE_PLUG }; - osal_queue_send(_usbh_q, &enum_entry, true); + event.plug.hub_addr = hub_addr; + event.plug.hub_port = hub_port; + + hcd_event_handler(&event, true); } void usbh_hcd_rhport_plugged_isr(uint8_t hostid) { - usbh_enumerate_t enum_entry = + hcd_event_t event = { - .core_id = hostid, - .hub_addr = 0, - .hub_port = 0 + .rhport = hostid, + .event_id = HCD_EVENT_DEVICE_PLUG }; - osal_queue_send(_usbh_q, &enum_entry, true); + event.plug.hub_addr = 0; + event.plug.hub_port = 0; + + hcd_event_handler(&event, true); +} + +void hcd_event_handler(hcd_event_t const* event, bool in_isr) +{ + switch (event->event_id) + { + default: + osal_queue_send(_usbh_q, event, in_isr); + break; + } } // a device unplugged on hostid, hub_addr, hub_port @@ -341,14 +355,16 @@ static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_ void usbh_hcd_rhport_unplugged_isr(uint8_t hostid) { - usbh_enumerate_t enum_entry = + hcd_event_t event = { - .core_id = hostid, - .hub_addr = 0, - .hub_port = 0 + .rhport = hostid, + .event_id = HCD_EVENT_DEVICE_UNPLUG }; - osal_queue_send(_usbh_q, &enum_entry, true); + event.plug.hub_addr = 0; + event.plug.hub_port = 0; + + hcd_event_handler(&event, true); } //--------------------------------------------------------------------+ @@ -361,20 +377,22 @@ bool usbh_task_body(void) RESET_DELAY = 200 // USB specs say only 50ms but many devices require much longer }; - usbh_enumerate_t enum_entry; - // for OSAL_NONE local variable won't retain value after blocking service sem_wait/queue_recv static uint8_t new_addr; static uint8_t configure_selected = 1; // TODO move static uint8_t *p_desc = NULL; // TODO move - if ( !osal_queue_receive(_usbh_q, &enum_entry) ) return false; + hcd_event_t event; + if ( !osal_queue_receive(_usbh_q, &event) ) return false; + + // FIXME remove later + if ( !(event.event_id == HCD_EVENT_DEVICE_PLUG || event.event_id == HCD_EVENT_DEVICE_UNPLUG) ) return false; usbh_device_info_t* dev0 = &usbh_devices[0]; - dev0->core_id = enum_entry.core_id; // TODO refractor integrate to device_pool - dev0->hub_addr = enum_entry.hub_addr; - dev0->hub_port = enum_entry.hub_port; + dev0->core_id = event.rhport; // TODO refractor integrate to device_pool + dev0->hub_addr = event.plug.hub_addr; + dev0->hub_port = event.plug.hub_port; dev0->state = TUSB_DEVICE_STATE_UNPLUG; //------------- connected/disconnected directly with roothub -------------// diff --git a/src/host/usbh_hcd.h b/src/host/usbh_hcd.h index 19a9f2286..d9ab37f45 100644 --- a/src/host/usbh_hcd.h +++ b/src/host/usbh_hcd.h @@ -55,13 +55,6 @@ //--------------------------------------------------------------------+ // USBH-HCD common data structure //--------------------------------------------------------------------+ -typedef struct ATTR_ALIGNED(4){ - uint8_t core_id; - uint8_t hub_addr; - uint8_t hub_port; - uint8_t reserve; -} usbh_enumerate_t; - typedef struct { //------------- port -------------// uint8_t core_id; -- cgit v1.3.1 From c93fb23693d2b6048ae4b07c9b1339abe8ab335c Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 7 Dec 2018 00:47:16 +0700 Subject: usbh rename vars --- src/host/ehci/ehci.c | 24 ++-- src/host/usbh.c | 128 +++++++++++---------- src/host/usbh_hcd.h | 4 +- tests/lpc18xx_43xx/test/host/ehci/test_ehci_init.c | 2 +- tests/lpc18xx_43xx/test/host/ehci/test_ehci_isr.c | 2 +- .../test/host/ehci/test_ehci_structure.c | 2 +- .../test/host/ehci/test_pipe_bulk_open.c | 6 +- .../test/host/ehci/test_pipe_bulk_xfer.c | 6 +- .../test/host/ehci/test_pipe_control_open.c | 10 +- .../test/host/ehci/test_pipe_control_xfer.c | 4 +- .../test/host/ehci/test_pipe_interrupt_open.c | 10 +- .../test/host/ehci/test_pipe_interrupt_xfer.c | 4 +- .../test/host/ehci/test_pipe_isochronous_open.c | 4 +- tests/lpc18xx_43xx/test/host/host_helper.h | 10 +- tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c | 66 +++++------ tests/lpc18xx_43xx/test/host/usbh/test_usbh.c | 42 +++---- tests/support/ehci_controller_fake.c | 6 +- 17 files changed, 171 insertions(+), 159 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index abf5e5613..d30b68a64 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -287,7 +287,7 @@ tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) if (dev_addr != 0) { //------------- insert to async list -------------// - list_insert( (ehci_link_t*) get_async_head(usbh_devices[dev_addr].core_id), + list_insert( (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].core_id), (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD); } @@ -344,7 +344,7 @@ tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) if (dev_addr != 0) { - TU_ASSERT_ERR( list_remove_qhd( (ehci_link_t*) get_async_head( usbh_devices[dev_addr].core_id ), + TU_ASSERT_ERR( list_remove_qhd( (ehci_link_t*) get_async_head( _usbh_devices[dev_addr].core_id ), (ehci_link_t*) p_qhd) ); } @@ -376,12 +376,12 @@ pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_desc_endpoint_t const * p_end if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_BULK) { - list_head = (ehci_link_t*) get_async_head(usbh_devices[dev_addr].core_id); + list_head = (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].core_id); } #if EHCI_PERIODIC_LIST // TODO refractor/group this together else if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_INTERRUPT) { - list_head = get_period_head(usbh_devices[dev_addr].core_id, p_qhd->interval_ms); + list_head = get_period_head(_usbh_devices[dev_addr].core_id, p_qhd->interval_ms); } #endif @@ -443,14 +443,14 @@ tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) if ( pipe_hdl.xfer_type == TUSB_XFER_BULK ) { TU_ASSERT_ERR( list_remove_qhd( - (ehci_link_t*) get_async_head( usbh_devices[pipe_hdl.dev_addr].core_id ), + (ehci_link_t*) get_async_head( _usbh_devices[pipe_hdl.dev_addr].core_id ), (ehci_link_t*) p_qhd) ); } #if EHCI_PERIODIC_LIST // TODO refractor/group this together else { TU_ASSERT_ERR( list_remove_qhd( - get_period_head( usbh_devices[pipe_hdl.dev_addr].core_id, p_qhd->interval_ms ), + get_period_head( _usbh_devices[pipe_hdl.dev_addr].core_id, p_qhd->interval_ms ), (ehci_link_t*) p_qhd) ); } #endif @@ -505,7 +505,7 @@ static void async_advance_isr(ehci_qhd_t * const async_head) async_head->p_qtd_list_head = async_head->p_qtd_list_tail = NULL; async_head->qtd_overlay.halted = 1; - usbh_devices[0].state = TUSB_DEVICE_STATE_UNPLUG; + _usbh_devices[0].state = TUSB_DEVICE_STATE_UNPLUG; } for(uint8_t relative_dev_addr=0; relative_dev_addr < CFG_TUSB_HOST_DEVICE_MAX; relative_dev_addr++) @@ -518,7 +518,7 @@ static void async_advance_isr(ehci_qhd_t * const async_head) p_control_qhd->used = 0; // Host Controller has cleaned up its cached data for this device, set state to unplug - usbh_devices[relative_dev_addr+1].state = TUSB_DEVICE_STATE_UNPLUG; + _usbh_devices[relative_dev_addr+1].state = TUSB_DEVICE_STATE_UNPLUG; for (uint8_t i=0; idevice_address = dev_addr; p_qhd->non_hs_period_inactive_next_xact = 0; p_qhd->endpoint_number = endpoint_addr & 0x0F; - p_qhd->endpoint_speed = usbh_devices[dev_addr].speed; + p_qhd->endpoint_speed = _usbh_devices[dev_addr].speed; p_qhd->data_toggle_control = (xfer_type == TUSB_XFER_CONTROL) ? 1 : 0; p_qhd->head_list_flag = (dev_addr == 0) ? 1 : 0; // addr0's endpoint is the static asyn list head p_qhd->max_package_size = max_packet_size; @@ -979,8 +979,8 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_si p_qhd->interrupt_smask = p_qhd->non_hs_interrupt_cmask = 0; } - p_qhd->hub_address = usbh_devices[dev_addr].hub_addr; - p_qhd->hub_port = usbh_devices[dev_addr].hub_port; + p_qhd->hub_address = _usbh_devices[dev_addr].hub_addr; + p_qhd->hub_port = _usbh_devices[dev_addr].hub_port; p_qhd->mult = 1; // TODO not use high bandwidth/park mode yet //------------- HCD Management Data -------------// diff --git a/src/host/usbh.c b/src/host/usbh.c index 7cb257a8c..e96f5f669 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -118,7 +118,7 @@ enum { USBH_CLASS_DRIVER_COUNT = sizeof(usbh_class_drivers) / sizeof(host_class_ //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; // including zero-address +CFG_TUSB_MEM_SECTION usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; // including zero-address OSAL_TASK_DEF(_usbh_task_def, "usbh", usbh_task, CFG_TUH_TASK_PRIO, CFG_TUH_TASK_STACK_SZ); @@ -127,7 +127,7 @@ OSAL_TASK_DEF(_usbh_task_def, "usbh", usbh_task, CFG_TUH_TASK_PRIO, CFG_TUH_TASK OSAL_QUEUE_DEF(OPT_MODE_HOST, _usbh_qdef, CFG_TUH_TASK_QUEUE_SZ, hcd_event_t); static osal_queue_t _usbh_q; -CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4) STATIC_VAR uint8_t enum_data_buffer[CFG_TUSB_HOST_ENUM_BUFFER_SIZE]; +CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4) static uint8_t _usbh_ctrl_buf[CFG_TUSB_HOST_ENUM_BUFFER_SIZE]; //------------- Reporter Task Data -------------// @@ -141,12 +141,12 @@ static inline uint8_t get_configure_number_for_device(tusb_desc_device_t* dev_de tusb_device_state_t tuh_device_get_state (uint8_t const dev_addr) { TU_ASSERT( dev_addr <= CFG_TUSB_HOST_DEVICE_MAX, TUSB_DEVICE_STATE_INVALID_PARAMETER); - return (tusb_device_state_t) usbh_devices[dev_addr].state; + return (tusb_device_state_t) _usbh_devices[dev_addr].state; } uint32_t tuh_device_get_mounted_class_flag(uint8_t dev_addr) { - return tuh_device_is_configured(dev_addr) ? usbh_devices[dev_addr].flag_supported_class : 0; + return tuh_device_is_configured(dev_addr) ? _usbh_devices[dev_addr].flag_supported_class : 0; } //--------------------------------------------------------------------+ @@ -154,7 +154,7 @@ uint32_t tuh_device_get_mounted_class_flag(uint8_t dev_addr) //--------------------------------------------------------------------+ bool usbh_init(void) { - tu_memclr(usbh_devices, sizeof(usbh_device_info_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); + tu_memclr(_usbh_devices, sizeof(usbh_device_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); //------------- Enumeration & Reporter Task init -------------// _usbh_q = osal_queue_create( &_usbh_qdef ); @@ -165,7 +165,7 @@ bool usbh_init(void) //------------- Semaphore, Mutex for Control Pipe -------------// for(uint8_t i=0; icontrol.sem_hdl = osal_semaphore_create(&p_device->control.sem_def); TU_ASSERT(p_device->control.sem_hdl != NULL); @@ -193,7 +193,7 @@ bool usbh_init(void) bool usbh_control_xfer_subtask (uint8_t dev_addr, uint8_t bmRequestType, uint8_t bRequest, uint16_t wValue, uint16_t wIndex, uint16_t wLength, uint8_t* data) { - usbh_device_info_t* dev = &usbh_devices[dev_addr]; + usbh_device_t* dev = &_usbh_devices[dev_addr]; TU_ASSERT(osal_mutex_lock(dev->control.mutex_hdl, OSAL_TIMEOUT_NORMAL)); @@ -223,7 +223,7 @@ bool usbh_control_xfer_subtask (uint8_t dev_addr, uint8_t bmRequestType, uint8_t tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) { - osal_semaphore_reset( usbh_devices[dev_addr].control.sem_hdl ); + osal_semaphore_reset( _usbh_devices[dev_addr].control.sem_hdl ); //osal_mutex_reset( usbh_devices[dev_addr].control.mutex_hdl ); TU_ASSERT_ERR( hcd_pipe_control_open(dev_addr, max_packet_size) ); @@ -263,9 +263,9 @@ void usbh_xfer_isr(pipe_handle_t pipe_hdl, uint8_t class_code, xfer_result_t eve uint8_t class_index = std_class_code_to_index(class_code); if (TUSB_XFER_CONTROL == pipe_hdl.xfer_type) { - usbh_devices[ pipe_hdl.dev_addr ].control.pipe_status = event; + _usbh_devices[ pipe_hdl.dev_addr ].control.pipe_status = event; // usbh_devices[ pipe_hdl.dev_addr ].control.xferred_bytes = xferred_bytes; not yet neccessary - osal_semaphore_post( usbh_devices[ pipe_hdl.dev_addr ].control.sem_hdl, true ); + osal_semaphore_post( _usbh_devices[ pipe_hdl.dev_addr ].control.sem_hdl, true ); }else if (usbh_class_drivers[class_index].isr) { usbh_class_drivers[class_index].isr(pipe_hdl, event, xferred_bytes); @@ -279,7 +279,7 @@ void usbh_hub_port_plugged_isr(uint8_t hub_addr, uint8_t hub_port) { hcd_event_t event = { - .rhport = usbh_devices[hub_addr].core_id, + .rhport = _usbh_devices[hub_addr].core_id, .event_id = HCD_EVENT_DEVICE_PLUG }; @@ -321,15 +321,15 @@ static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_ //------------- find the all devices (star-network) under port that is unplugged -------------// for (uint8_t dev_addr = 0; dev_addr <= CFG_TUSB_HOST_DEVICE_MAX; dev_addr ++) { - if (usbh_devices[dev_addr].core_id == hostid && - (hub_addr == 0 || usbh_devices[dev_addr].hub_addr == hub_addr) && // hub_addr == 0 & hub_port == 0 means roothub - (hub_port == 0 || usbh_devices[dev_addr].hub_port == hub_port) && - usbh_devices[dev_addr].state != TUSB_DEVICE_STATE_UNPLUG) + if (_usbh_devices[dev_addr].core_id == hostid && + (hub_addr == 0 || _usbh_devices[dev_addr].hub_addr == hub_addr) && // hub_addr == 0 & hub_port == 0 means roothub + (hub_port == 0 || _usbh_devices[dev_addr].hub_port == hub_port) && + _usbh_devices[dev_addr].state != TUSB_DEVICE_STATE_UNPLUG) { // TODO Hub multiple level for (uint8_t class_index = 1; class_index < USBH_CLASS_DRIVER_COUNT; class_index++) { - if ((usbh_devices[dev_addr].flag_supported_class & BIT_(class_index)) && + if ((_usbh_devices[dev_addr].flag_supported_class & BIT_(class_index)) && usbh_class_drivers[class_index].close) { usbh_class_drivers[class_index].close(dev_addr); @@ -339,8 +339,8 @@ static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_ // TODO refractor // set to REMOVING to allow HCD to clean up its cached data for this device // HCD must set this device's state to TUSB_DEVICE_STATE_UNPLUG when done - usbh_devices[dev_addr].state = TUSB_DEVICE_STATE_REMOVING; - usbh_devices[dev_addr].flag_supported_class = 0; + _usbh_devices[dev_addr].state = TUSB_DEVICE_STATE_REMOVING; + _usbh_devices[dev_addr].flag_supported_class = 0; usbh_pipe_control_close(dev_addr); @@ -349,7 +349,7 @@ static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_ } } - if (is_found) hcd_port_unplug(usbh_devices[0].core_id); // TODO hack + if (is_found) hcd_port_unplug(_usbh_devices[0].core_id); // TODO hack } @@ -370,7 +370,8 @@ void usbh_hcd_rhport_unplugged_isr(uint8_t hostid) //--------------------------------------------------------------------+ // ENUMERATION TASK //--------------------------------------------------------------------+ -bool usbh_task_body(void) + +bool enum_task(hcd_event_t* event) { enum { POWER_STABLE_DELAY = 500, @@ -378,21 +379,14 @@ bool usbh_task_body(void) }; // for OSAL_NONE local variable won't retain value after blocking service sem_wait/queue_recv - static uint8_t new_addr; static uint8_t configure_selected = 1; // TODO move static uint8_t *p_desc = NULL; // TODO move - hcd_event_t event; - if ( !osal_queue_receive(_usbh_q, &event) ) return false; - - // FIXME remove later - if ( !(event.event_id == HCD_EVENT_DEVICE_PLUG || event.event_id == HCD_EVENT_DEVICE_UNPLUG) ) return false; - - usbh_device_info_t* dev0 = &usbh_devices[0]; + usbh_device_t* dev0 = &_usbh_devices[0]; - dev0->core_id = event.rhport; // TODO refractor integrate to device_pool - dev0->hub_addr = event.plug.hub_addr; - dev0->hub_port = event.plug.hub_port; + dev0->core_id = event->rhport; // TODO refractor integrate to device_pool + dev0->hub_addr = event->plug.hub_addr; + dev0->hub_port = event->plug.hub_port; dev0->state = TUSB_DEVICE_STATE_UNPLUG; //------------- connected/disconnected directly with roothub -------------// @@ -425,14 +419,14 @@ bool usbh_task_body(void) //------------- Get Port Status -------------// TU_VERIFY_HDLR( usbh_control_xfer_subtask( dev0->hub_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), HUB_REQUEST_GET_STATUS, 0, dev0->hub_port, - 4, enum_data_buffer ) + 4, _usbh_ctrl_buf ) , hub_status_pipe_queue( dev0->hub_addr) ); // TODO hub refractor // Acknowledge Port Connection Change hub_port_clear_feature_subtask(dev0->hub_addr, dev0->hub_port, HUB_FEATURE_PORT_CONNECTION_CHANGE); hub_port_status_response_t * p_port_status; - p_port_status = ((hub_port_status_response_t *) enum_data_buffer); + p_port_status = ((hub_port_status_response_t *) _usbh_ctrl_buf); if ( ! p_port_status->status_change.connect_status ) return true; // only handle connection change @@ -464,7 +458,7 @@ bool usbh_task_body(void) //------------- Get first 8 bytes of device descriptor to get Control Endpoint Size -------------// bool is_ok = usbh_control_xfer_subtask(0, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), TUSB_REQ_GET_DESCRIPTOR, - (TUSB_DESC_DEVICE << 8), 0, 8, enum_data_buffer); + (TUSB_DESC_DEVICE << 8), 0, 8, _usbh_ctrl_buf); //------------- Reset device again before Set Address -------------// if (dev0->hub_addr == 0) @@ -491,7 +485,7 @@ bool usbh_task_body(void) #endif //------------- Set new address -------------// - new_addr = get_new_address(); + uint8_t const new_addr = get_new_address(); TU_ASSERT(new_addr <= CFG_TUSB_HOST_DEVICE_MAX); // TODO notify application we reach max devices TU_ASSERT(usbh_control_xfer_subtask( 0, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), @@ -499,32 +493,33 @@ bool usbh_task_body(void) 0, NULL )); //------------- update port info & close control pipe of addr0 -------------// - usbh_devices[new_addr].core_id = dev0->core_id; - usbh_devices[new_addr].hub_addr = dev0->hub_addr; - usbh_devices[new_addr].hub_port = dev0->hub_port; - usbh_devices[new_addr].speed = dev0->speed; - usbh_devices[new_addr].state = TUSB_DEVICE_STATE_ADDRESSED; + usbh_device_t* new_dev = &_usbh_devices[new_addr]; + new_dev->core_id = dev0->core_id; + new_dev->hub_addr = dev0->hub_addr; + new_dev->hub_port = dev0->hub_port; + new_dev->speed = dev0->speed; + new_dev->state = TUSB_DEVICE_STATE_ADDRESSED; usbh_pipe_control_close(0); dev0->state = TUSB_DEVICE_STATE_UNPLUG; // open control pipe for new address - TU_ASSERT_ERR ( usbh_pipe_control_open(new_addr, ((tusb_desc_device_t*) enum_data_buffer)->bMaxPacketSize0 ) ); + TU_ASSERT_ERR ( usbh_pipe_control_open(new_addr, ((tusb_desc_device_t*) _usbh_ctrl_buf)->bMaxPacketSize0 ) ); //------------- Get full device descriptor -------------// TU_ASSERT( usbh_control_xfer_subtask(new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_DEVICE << 8), 0, 18, - enum_data_buffer)); + _usbh_ctrl_buf)); // update device info TODO alignment issue - usbh_devices[new_addr].vendor_id = ((tusb_desc_device_t*) enum_data_buffer)->idVendor; - usbh_devices[new_addr].product_id = ((tusb_desc_device_t*) enum_data_buffer)->idProduct; - usbh_devices[new_addr].configure_count = ((tusb_desc_device_t*) enum_data_buffer)->bNumConfigurations; + new_dev->vendor_id = ((tusb_desc_device_t*) _usbh_ctrl_buf)->idVendor; + new_dev->product_id = ((tusb_desc_device_t*) _usbh_ctrl_buf)->idProduct; + new_dev->configure_count = ((tusb_desc_device_t*) _usbh_ctrl_buf)->bNumConfigurations; - configure_selected = get_configure_number_for_device((tusb_desc_device_t*) enum_data_buffer); - TU_ASSERT(configure_selected <= usbh_devices[new_addr].configure_count); // TODO notify application when invalid configuration + configure_selected = get_configure_number_for_device((tusb_desc_device_t*) _usbh_ctrl_buf); + TU_ASSERT(configure_selected <= new_dev->configure_count); // TODO notify application when invalid configuration //------------- Get 9 bytes of configuration descriptor -------------// TU_ASSERT( @@ -532,33 +527,33 @@ bool usbh_task_body(void) TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_CONFIGURATION << 8) | (configure_selected - 1), 0, 9, - enum_data_buffer)); + _usbh_ctrl_buf)); - TU_VERIFY_HDLR( CFG_TUSB_HOST_ENUM_BUFFER_SIZE >= ((tusb_desc_configuration_t*)enum_data_buffer)->wTotalLength, + TU_VERIFY_HDLR( CFG_TUSB_HOST_ENUM_BUFFER_SIZE >= ((tusb_desc_configuration_t*)_usbh_ctrl_buf)->wTotalLength, tuh_device_mount_failed_cb(TUSB_ERROR_USBH_MOUNT_CONFIG_DESC_TOO_LONG, NULL) ); //------------- Get full configuration descriptor -------------// TU_ASSERT( usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_CONFIGURATION << 8) | (configure_selected - 1), 0, - CFG_TUSB_HOST_ENUM_BUFFER_SIZE, enum_data_buffer ) ); + CFG_TUSB_HOST_ENUM_BUFFER_SIZE, _usbh_ctrl_buf ) ); // update configuration info - usbh_devices[new_addr].interface_count = ((tusb_desc_configuration_t*) enum_data_buffer)->bNumInterfaces; + new_dev->interface_count = ((tusb_desc_configuration_t*) _usbh_ctrl_buf)->bNumInterfaces; //------------- Set Configure -------------// TU_ASSERT( usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), TUSB_REQ_SET_CONFIGURATION, configure_selected, 0, 0, NULL )); - usbh_devices[new_addr].state = TUSB_DEVICE_STATE_CONFIGURED; + new_dev->state = TUSB_DEVICE_STATE_CONFIGURED; //------------- TODO Get String Descriptors -------------// //------------- parse configuration & install drivers -------------// - p_desc = enum_data_buffer + sizeof(tusb_desc_configuration_t); + p_desc = _usbh_ctrl_buf + sizeof(tusb_desc_configuration_t); // parse each interfaces - while( p_desc < enum_data_buffer + ((tusb_desc_configuration_t*)enum_data_buffer)->wTotalLength ) + while( p_desc < _usbh_ctrl_buf + ((tusb_desc_configuration_t*)_usbh_ctrl_buf)->wTotalLength ) { // skip until we see interface descriptor if ( TUSB_DESC_INTERFACE != p_desc[DESC_OFFSET_TYPE] ) @@ -572,15 +567,16 @@ bool usbh_task_body(void) TU_ASSERT( class_index != 0 ); // class_index == 0 means corrupted data, abort enumeration if (usbh_class_drivers[class_index].open_subtask && - !(class_index == TUSB_CLASS_HUB && usbh_devices[new_addr].hub_addr != 0)) - { // supported class, TODO Hub disable multiple level + !(class_index == TUSB_CLASS_HUB && new_dev->hub_addr != 0)) + { + // supported class, TODO Hub disable multiple level static uint16_t length; length = 0; if ( usbh_class_drivers[class_index].open_subtask(new_addr, (tusb_desc_interface_t*) p_desc, &length) ) { TU_ASSERT( length >= sizeof(tusb_desc_interface_t) ); - usbh_devices[new_addr].flag_supported_class |= BIT_(class_index); + new_dev->flag_supported_class |= BIT_(class_index); p_desc += length; }else // Interface open failed, for example a subclass is not supported { @@ -598,6 +594,22 @@ bool usbh_task_body(void) return true; } +bool usbh_task_body(void) +{ + while (1) + { + hcd_event_t event; + if ( !osal_queue_receive(_usbh_q, &event) ) return false; + + switch (event.event_id) + { + case HCD_EVENT_DEVICE_PLUG: + case HCD_EVENT_DEVICE_UNPLUG: + enum_task(&event); + break; + } + } +} /* USB Host task * Thread that handles all device events. With an real RTOS, the task must be a forever loop and never return. @@ -626,7 +638,7 @@ static inline uint8_t get_new_address(void) uint8_t addr; for (addr=1; addr <= CFG_TUSB_HOST_DEVICE_MAX; addr++) { - if (usbh_devices[addr].state == TUSB_DEVICE_STATE_UNPLUG) + if (_usbh_devices[addr].state == TUSB_DEVICE_STATE_UNPLUG) break; } return addr; diff --git a/src/host/usbh_hcd.h b/src/host/usbh_hcd.h index d9ab37f45..b4d9adb26 100644 --- a/src/host/usbh_hcd.h +++ b/src/host/usbh_hcd.h @@ -86,9 +86,9 @@ typedef struct { osal_mutex_def_t mutex_def; osal_mutex_t mutex_hdl; // used to exclusively occupy control pipe } control; -} usbh_device_info_t; +} usbh_device_t; -extern usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; // including zero-address +extern usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; // including zero-address //--------------------------------------------------------------------+ // callback from HCD ISR diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_init.c b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_init.c index 69b7c1dd9..c61becd69 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_init.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_init.c @@ -51,7 +51,7 @@ #include "mock_osal.h" #include "mock_usbh_hcd.h" -usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; +usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; static uint8_t hostid; diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_isr.c b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_isr.c index 6a6beec3d..58b8f9002 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_isr.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_isr.c @@ -50,7 +50,7 @@ #include "mock_osal.h" #include "mock_usbh_hcd.h" -usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; +usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; static uint8_t hostid; static ehci_registers_t * regs; diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_structure.c b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_structure.c index f35c90509..7eaabcd51 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_structure.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_structure.c @@ -51,7 +51,7 @@ #include "mock_osal.h" #include "mock_usbh_hcd.h" -usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; +usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; //--------------------------------------------------------------------+ // Setup/Teardown + helper declare diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_open.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_open.c index 581488d7d..52cf40555 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_open.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_open.c @@ -51,7 +51,7 @@ #include "ehci_controller_fake.h" #include "host_helper.h" -usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; +usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; static uint8_t const hub_addr = 2; static uint8_t const hub_port = 2; @@ -70,7 +70,7 @@ void setUp(void) dev_addr = 1; hostid = RANDOM(CONTROLLER_HOST_NUMBER) + TEST_CONTROLLER_HOST_START_INDEX; - tu_memclr(usbh_devices, sizeof(usbh_device_info_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); + tu_memclr(_usbh_devices, sizeof(usbh_device_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); helper_usbh_device_emulate(dev_addr, hub_addr, hub_port, hostid, TUSB_SPEED_HIGH); async_head = get_async_head( hostid ); @@ -85,7 +85,7 @@ void verify_open_qhd(ehci_qhd_t *p_qhd, uint8_t endpoint_addr, uint16_t max_pack TEST_ASSERT_EQUAL(dev_addr, p_qhd->device_address); TEST_ASSERT_FALSE(p_qhd->non_hs_period_inactive_next_xact); TEST_ASSERT_EQUAL(endpoint_addr & 0x0F, p_qhd->endpoint_number); - TEST_ASSERT_EQUAL(usbh_devices[dev_addr].speed, p_qhd->endpoint_speed); + TEST_ASSERT_EQUAL(_usbh_devices[dev_addr].speed, p_qhd->endpoint_speed); TEST_ASSERT_EQUAL(max_packet_size, p_qhd->max_package_size); TEST_ASSERT_EQUAL(0, p_qhd->nak_count_reload); // TDD NAK Reload disable diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c index c4037c596..7d206e88e 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c @@ -51,7 +51,7 @@ #include "ehci_controller_fake.h" #include "host_helper.h" -usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; +usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; static uint8_t hub_addr = 2; static uint8_t hub_port = 2; @@ -91,7 +91,7 @@ void setUp(void) { ehci_controller_init(); tu_memclr(xfer_data, sizeof(xfer_data)); - tu_memclr(usbh_devices, sizeof(usbh_device_info_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); + tu_memclr(_usbh_devices, sizeof(usbh_device_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); TEST_ASSERT_STATUS( hcd_init() ); @@ -146,7 +146,7 @@ void verify_qtd(ehci_qtd_t *p_qtd, uint8_t p_data[], uint16_t length) void test_bulk_xfer_hs_ping_out(void) { - usbh_devices[dev_addr].speed = TUSB_SPEED_HIGH; + _usbh_devices[dev_addr].speed = TUSB_SPEED_HIGH; pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_bulk_out, TUSB_CLASS_MSC); ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(pipe_hdl); diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_open.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_open.c index 426fed9f2..0faae0fe5 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_open.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_open.c @@ -51,7 +51,7 @@ #include "ehci_controller_fake.h" #include "host_helper.h" -usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; +usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; static uint8_t const control_max_packet_size = 64; static uint8_t const hub_addr = 2; @@ -67,7 +67,7 @@ static ehci_qhd_t *p_control_qhd; //--------------------------------------------------------------------+ void setUp(void) { - tu_memclr(usbh_devices, sizeof(usbh_device_info_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); + tu_memclr(_usbh_devices, sizeof(usbh_device_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); TEST_ASSERT_STATUS( hcd_init() ); @@ -90,7 +90,7 @@ void verify_open_qhd(ehci_qhd_t *p_qhd, uint8_t endpoint_addr, uint16_t max_pack TEST_ASSERT_EQUAL(dev_addr, p_qhd->device_address); TEST_ASSERT_FALSE(p_qhd->non_hs_period_inactive_next_xact); TEST_ASSERT_EQUAL(endpoint_addr & 0x0F, p_qhd->endpoint_number); - TEST_ASSERT_EQUAL(usbh_devices[dev_addr].speed, p_qhd->endpoint_speed); + TEST_ASSERT_EQUAL(_usbh_devices[dev_addr].speed, p_qhd->endpoint_speed); TEST_ASSERT_EQUAL(max_packet_size, p_qhd->max_package_size); TEST_ASSERT_EQUAL(0, p_qhd->nak_count_reload); // TDD NAK Reload disable @@ -149,7 +149,7 @@ void test_control_open_qhd_data(void) void test_control_open_highspeed(void) { - usbh_devices[dev_addr].speed = TUSB_SPEED_HIGH; + _usbh_devices[dev_addr].speed = TUSB_SPEED_HIGH; //------------- Code Under TEST -------------// TEST_ASSERT_STATUS( hcd_pipe_control_open(dev_addr, control_max_packet_size) ); @@ -158,7 +158,7 @@ void test_control_open_highspeed(void) void test_control_open_non_highspeed(void) { - usbh_devices[dev_addr].speed = TUSB_SPEED_FULL; + _usbh_devices[dev_addr].speed = TUSB_SPEED_FULL; //------------- Code Under TEST -------------// TEST_ASSERT_STATUS( hcd_pipe_control_open(dev_addr, control_max_packet_size) ); diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c index 4f8cdb4c8..bcea7ac8c 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c @@ -51,7 +51,7 @@ #include "ehci_controller_fake.h" #include "host_helper.h" -usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; +usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; static uint8_t const control_max_packet_size = 64; static uint8_t const hub_addr = 2; @@ -74,7 +74,7 @@ void setUp(void) { ehci_controller_init(); - tu_memclr(usbh_devices, sizeof(usbh_device_info_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); + tu_memclr(_usbh_devices, sizeof(usbh_device_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); tu_memclr(xfer_data, sizeof(xfer_data)); TEST_ASSERT_STATUS( hcd_init() ); diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_open.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_open.c index b243a468e..f48b2c7f4 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_open.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_open.c @@ -50,7 +50,7 @@ #include "ehci_controller_fake.h" #include "host_helper.h" -usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; +usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; static uint8_t const hub_addr = 2; static uint8_t const hub_port = 2; @@ -67,7 +67,7 @@ static pipe_handle_t pipe_hdl; //--------------------------------------------------------------------+ void setUp(void) { - tu_memclr(usbh_devices, sizeof(usbh_device_info_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); + tu_memclr(_usbh_devices, sizeof(usbh_device_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); hcd_init(); @@ -90,7 +90,7 @@ void verify_open_qhd(ehci_qhd_t *p_qhd, uint8_t endpoint_addr, uint16_t max_pack TEST_ASSERT_EQUAL(dev_addr, p_qhd->device_address); TEST_ASSERT_FALSE(p_qhd->non_hs_period_inactive_next_xact); TEST_ASSERT_EQUAL(endpoint_addr & 0x0F, p_qhd->endpoint_number); - TEST_ASSERT_EQUAL(usbh_devices[dev_addr].speed, p_qhd->endpoint_speed); + TEST_ASSERT_EQUAL(_usbh_devices[dev_addr].speed, p_qhd->endpoint_speed); TEST_ASSERT_EQUAL(max_packet_size, p_qhd->max_package_size); TEST_ASSERT_EQUAL(0, p_qhd->nak_count_reload); // TDD NAK Reload disable @@ -272,7 +272,7 @@ void test_open_interrupt_hs_interval_8(void) void test_open_interrupt_qhd_non_hs(void) { - usbh_devices[dev_addr].speed = TUSB_SPEED_FULL; + _usbh_devices[dev_addr].speed = TUSB_SPEED_FULL; //------------- Code Under TEST -------------// pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID); @@ -294,7 +294,7 @@ void test_open_interrupt_qhd_non_hs_9(void) tusb_desc_endpoint_t int_edp_interval = desc_ept_interrupt_out; int_edp_interval.bInterval = 32; - usbh_devices[dev_addr].speed = TUSB_SPEED_FULL; + _usbh_devices[dev_addr].speed = TUSB_SPEED_FULL; //------------- Code Under TEST -------------// pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c index bf7ad352a..5b90652d7 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c @@ -51,7 +51,7 @@ #include "ehci_controller_fake.h" #include "host_helper.h" -usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; +usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; static uint8_t const hub_addr = 2; static uint8_t const hub_port = 2; @@ -91,7 +91,7 @@ void setUp(void) { ehci_controller_init(); - tu_memclr(usbh_devices, sizeof(usbh_device_info_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); + tu_memclr(_usbh_devices, sizeof(usbh_device_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); tu_memclr(xfer_data, sizeof(xfer_data)); TEST_ASSERT_STATUS( hcd_init() ); diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_isochronous_open.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_isochronous_open.c index 1feff94e5..51381381f 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_isochronous_open.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_isochronous_open.c @@ -50,7 +50,7 @@ #include "ehci_controller_fake.h" #include "host_helper.h" -usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; +usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; static uint8_t const hub_addr = 2; static uint8_t const hub_port = 2; @@ -63,7 +63,7 @@ static ehci_qhd_t *period_head_arr; //--------------------------------------------------------------------+ void setUp(void) { - tu_memclr(usbh_devices, sizeof(usbh_device_info_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); + tu_memclr(_usbh_devices, sizeof(usbh_device_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); hcd_init(); diff --git a/tests/lpc18xx_43xx/test/host/host_helper.h b/tests/lpc18xx_43xx/test/host/host_helper.h index b8095b9aa..13996d1ce 100644 --- a/tests/lpc18xx_43xx/test/host/host_helper.h +++ b/tests/lpc18xx_43xx/test/host/host_helper.h @@ -69,11 +69,11 @@ static inline void helper_usbh_init_expect(void) static inline void helper_usbh_device_emulate(uint8_t dev_addr, uint8_t hub_addr, uint8_t hub_port, uint8_t hostid, tusb_speed_t speed) { - usbh_devices[dev_addr].core_id = hostid; - usbh_devices[dev_addr].hub_addr = hub_addr; - usbh_devices[dev_addr].hub_port = hub_port; - usbh_devices[dev_addr].speed = speed; - usbh_devices[dev_addr].state = dev_addr ? TUSB_DEVICE_STATE_CONFIGURED : TUSB_DEVICE_STATE_UNPLUG; + _usbh_devices[dev_addr].core_id = hostid; + _usbh_devices[dev_addr].hub_addr = hub_addr; + _usbh_devices[dev_addr].hub_port = hub_port; + _usbh_devices[dev_addr].speed = speed; + _usbh_devices[dev_addr].state = dev_addr ? TUSB_DEVICE_STATE_CONFIGURED : TUSB_DEVICE_STATE_UNPLUG; } diff --git a/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c b/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c index eba3fbcc3..5c11c3011 100644 --- a/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c +++ b/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c @@ -51,7 +51,7 @@ #include "mock_cdc_host.h" #include "mock_msc_host.h" -extern usbh_device_info_t usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; +extern usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; extern uint8_t enum_data_buffer[CFG_TUSB_HOST_ENUM_BUFFER_SIZE]; usbh_enumerate_t const enum_connect = { @@ -73,7 +73,7 @@ enum { void setUp(void) { - tu_memclr(usbh_devices, sizeof(usbh_device_info_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); + tu_memclr(_usbh_devices, sizeof(usbh_device_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); osal_queue_receive_StubWithCallback(queue_recv_stub); osal_semaphore_wait_StubWithCallback(semaphore_wait_success_stub); @@ -89,8 +89,8 @@ void setUp(void) osal_task_delay_Expect(RESET_DELAY); hcd_port_speed_get_ExpectAndReturn(enum_connect.core_id, device_speed); - osal_semaphore_reset_Expect( usbh_devices[0].control.sem_hdl ); - osal_mutex_reset_Expect( usbh_devices[0].control.mutex_hdl ); + osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl ); + osal_mutex_reset_Expect( _usbh_devices[0].control.mutex_hdl ); hcd_pipe_control_open_ExpectAndReturn(0, 8, TUSB_ERROR_NONE); } @@ -222,53 +222,53 @@ void test_addr0_failed_dev_desc(void) usbh_enumeration_task(NULL); - TEST_ASSERT_EQUAL(TUSB_DEVICE_STATE_ADDRESSED, usbh_devices[0].state); + TEST_ASSERT_EQUAL(TUSB_DEVICE_STATE_ADDRESSED, _usbh_devices[0].state); } void test_addr0_failed_set_address(void) { osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(1)); - hcd_port_reset_Expect( usbh_devices[0].core_id ); + hcd_port_reset_Expect( _usbh_devices[0].core_id ); osal_task_delay_Expect(RESET_DELAY); // tusbh_device_mount_failed_cb_Expect(TUSB_ERROR_USBH_MOUNT_DEVICE_NOT_RESPOND, NULL); usbh_enumeration_task(NULL); - TEST_ASSERT_EQUAL(TUSB_DEVICE_STATE_ADDRESSED, usbh_devices[0].state); + TEST_ASSERT_EQUAL(TUSB_DEVICE_STATE_ADDRESSED, _usbh_devices[0].state); TEST_ASSERT_EQUAL_MEMORY(&desc_device, enum_data_buffer, 8); } void test_enum_failed_get_full_dev_desc(void) { osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(2)); - hcd_port_reset_Expect( usbh_devices[0].core_id ); + hcd_port_reset_Expect( _usbh_devices[0].core_id ); osal_task_delay_Expect(RESET_DELAY); hcd_pipe_control_close_ExpectAndReturn(0, TUSB_ERROR_NONE); - osal_semaphore_reset_Expect( usbh_devices[0].control.sem_hdl ); - osal_mutex_reset_Expect( usbh_devices[0].control.mutex_hdl ); + osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl ); + osal_mutex_reset_Expect( _usbh_devices[0].control.mutex_hdl ); hcd_pipe_control_open_ExpectAndReturn(1, desc_device.bMaxPacketSize0, TUSB_ERROR_NONE); // tusbh_device_mount_failed_cb_Expect(TUSB_ERROR_USBH_MOUNT_DEVICE_NOT_RESPOND, NULL); usbh_enumeration_task(NULL); - TEST_ASSERT_EQUAL(TUSB_DEVICE_STATE_UNPLUG, usbh_devices[0].state); - TEST_ASSERT_EQUAL(TUSB_DEVICE_STATE_ADDRESSED, usbh_devices[1].state); - TEST_ASSERT_EQUAL(TUSB_SPEED_FULL, usbh_devices[1].speed); - TEST_ASSERT_EQUAL(enum_connect.core_id, usbh_devices[1].core_id); - TEST_ASSERT_EQUAL(enum_connect.hub_addr, usbh_devices[1].hub_addr); - TEST_ASSERT_EQUAL(enum_connect.hub_port, usbh_devices[1].hub_port); + TEST_ASSERT_EQUAL(TUSB_DEVICE_STATE_UNPLUG, _usbh_devices[0].state); + TEST_ASSERT_EQUAL(TUSB_DEVICE_STATE_ADDRESSED, _usbh_devices[1].state); + TEST_ASSERT_EQUAL(TUSB_SPEED_FULL, _usbh_devices[1].speed); + TEST_ASSERT_EQUAL(enum_connect.core_id, _usbh_devices[1].core_id); + TEST_ASSERT_EQUAL(enum_connect.hub_addr, _usbh_devices[1].hub_addr); + TEST_ASSERT_EQUAL(enum_connect.hub_port, _usbh_devices[1].hub_port); } void test_enum_failed_get_9byte_config_desc(void) { osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(3)); - hcd_port_reset_Expect( usbh_devices[0].core_id ); + hcd_port_reset_Expect( _usbh_devices[0].core_id ); osal_task_delay_Expect(RESET_DELAY); hcd_pipe_control_close_ExpectAndReturn(0, TUSB_ERROR_NONE); - osal_semaphore_reset_Expect( usbh_devices[0].control.sem_hdl ); - osal_mutex_reset_Expect( usbh_devices[0].control.mutex_hdl ); + osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl ); + osal_mutex_reset_Expect( _usbh_devices[0].control.mutex_hdl ); hcd_pipe_control_open_ExpectAndReturn(1, desc_device.bMaxPacketSize0, TUSB_ERROR_NONE); tusbh_device_attached_cb_ExpectAndReturn((tusb_desc_device_t*) enum_data_buffer, 1); @@ -276,19 +276,19 @@ void test_enum_failed_get_9byte_config_desc(void) usbh_enumeration_task(NULL); - TEST_ASSERT_EQUAL(desc_device.idVendor, usbh_devices[1].vendor_id); - TEST_ASSERT_EQUAL(desc_device.idProduct, usbh_devices[1].product_id); - TEST_ASSERT_EQUAL(desc_device.bNumConfigurations, usbh_devices[1].configure_count); + TEST_ASSERT_EQUAL(desc_device.idVendor, _usbh_devices[1].vendor_id); + TEST_ASSERT_EQUAL(desc_device.idProduct, _usbh_devices[1].product_id); + TEST_ASSERT_EQUAL(desc_device.bNumConfigurations, _usbh_devices[1].configure_count); } void test_enum_failed_get_full_config_desc(void) { osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(4)); - hcd_port_reset_Expect( usbh_devices[0].core_id ); + hcd_port_reset_Expect( _usbh_devices[0].core_id ); osal_task_delay_Expect(RESET_DELAY); hcd_pipe_control_close_ExpectAndReturn(0, TUSB_ERROR_NONE); - osal_semaphore_reset_Expect( usbh_devices[0].control.sem_hdl ); - osal_mutex_reset_Expect( usbh_devices[0].control.mutex_hdl ); + osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl ); + osal_mutex_reset_Expect( _usbh_devices[0].control.mutex_hdl ); hcd_pipe_control_open_ExpectAndReturn(1, desc_device.bMaxPacketSize0, TUSB_ERROR_NONE); tusbh_device_attached_cb_ExpectAndReturn((tusb_desc_device_t*) enum_data_buffer, 1); // tusbh_device_mount_failed_cb_Expect(TUSB_ERROR_USBH_MOUNT_DEVICE_NOT_RESPOND, NULL); @@ -299,11 +299,11 @@ void test_enum_failed_get_full_config_desc(void) void test_enum_parse_config_desc(void) { osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(5)); - hcd_port_reset_Expect( usbh_devices[0].core_id ); + hcd_port_reset_Expect( _usbh_devices[0].core_id ); osal_task_delay_Expect(RESET_DELAY); hcd_pipe_control_close_ExpectAndReturn(0, TUSB_ERROR_NONE); - osal_semaphore_reset_Expect( usbh_devices[0].control.sem_hdl ); - osal_mutex_reset_Expect( usbh_devices[0].control.mutex_hdl ); + osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl ); + osal_mutex_reset_Expect( _usbh_devices[0].control.mutex_hdl ); hcd_pipe_control_open_ExpectAndReturn(1, desc_device.bMaxPacketSize0, TUSB_ERROR_NONE); tusbh_device_attached_cb_ExpectAndReturn((tusb_desc_device_t*) enum_data_buffer, 1); @@ -311,17 +311,17 @@ void test_enum_parse_config_desc(void) usbh_enumeration_task(NULL); - TEST_ASSERT_EQUAL(desc_configuration.configuration.bNumInterfaces, usbh_devices[1].interface_count); + TEST_ASSERT_EQUAL(desc_configuration.configuration.bNumInterfaces, _usbh_devices[1].interface_count); } void test_enum_set_configure(void) { osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(6)); - hcd_port_reset_Expect( usbh_devices[0].core_id ); + hcd_port_reset_Expect( _usbh_devices[0].core_id ); osal_task_delay_Expect(RESET_DELAY); hcd_pipe_control_close_ExpectAndReturn(0, TUSB_ERROR_NONE); - osal_semaphore_reset_Expect( usbh_devices[0].control.sem_hdl ); - osal_mutex_reset_Expect( usbh_devices[0].control.mutex_hdl ); + osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl ); + osal_mutex_reset_Expect( _usbh_devices[0].control.mutex_hdl ); hcd_pipe_control_open_ExpectAndReturn(1, desc_device.bMaxPacketSize0, TUSB_ERROR_NONE); tusbh_device_attached_cb_ExpectAndReturn((tusb_desc_device_t*) enum_data_buffer, 1); @@ -335,5 +335,5 @@ void test_enum_set_configure(void) usbh_enumeration_task(NULL); TEST_ASSERT_EQUAL( BIT_(TUSB_CLASS_HID) | BIT_(TUSB_CLASS_MSC) | BIT_(TUSB_CLASS_CDC), - usbh_devices[1].flag_supported_class); // TODO change later + _usbh_devices[1].flag_supported_class); // TODO change later } diff --git a/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c b/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c index 7b99b013a..75da7cfdf 100644 --- a/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c +++ b/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c @@ -68,7 +68,7 @@ void tearDown(void) //--------------------------------------------------------------------+ void test_usbh_status_get_fail(void) { - usbh_devices[dev_addr].state = 0; + _usbh_devices[dev_addr].state = 0; TEST_ASSERT_EQUAL( TUSB_DEVICE_STATE_INVALID_PARAMETER, tusbh_device_get_state(CFG_TUSB_HOST_DEVICE_MAX+1) ); TEST_ASSERT_EQUAL( TUSB_DEVICE_STATE_UNPLUG, tusbh_device_get_state(dev_addr) ); @@ -76,7 +76,7 @@ void test_usbh_status_get_fail(void) void test_usbh_status_get_succeed(void) { - usbh_devices[dev_addr].state = TUSB_DEVICE_STATE_CONFIGURED; + _usbh_devices[dev_addr].state = TUSB_DEVICE_STATE_CONFIGURED; TEST_ASSERT_EQUAL( TUSB_DEVICE_STATE_CONFIGURED, tusbh_device_get_state(dev_addr) ); } @@ -136,7 +136,7 @@ void test_usbh_init_ok(void) for (uint8_t i=0; iusb_sts = EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_NXP_PERIODIC; - hcd_isr( usbh_devices[dev_addr].core_id ); + hcd_isr( _usbh_devices[dev_addr].core_id ); } void complete_qtd_in_qhd(ehci_qhd_t *p_qhd) -- cgit v1.3.1 From 9478c647e37f041694bc9057d16b0d66386a7c11 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 7 Dec 2018 12:23:37 +0700 Subject: change usbh_control_xfer name and signature --- src/common/tusb_types.h | 1 + src/host/hub.c | 77 +++++++++++++++------ src/host/usbh.c | 96 ++++++++++++++++----------- src/host/usbh.h | 4 +- tests/lpc18xx_43xx/test/host/usbh/test_usbh.c | 4 +- 5 files changed, 120 insertions(+), 62 deletions(-) (limited to 'src/host') diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index b11481b18..6ba713084 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -358,6 +358,7 @@ typedef struct ATTR_PACKED{ uint8_t type : 2; ///< Request type tusb_request_type_t. uint8_t direction : 1; ///< Direction type. tusb_dir_t } bmRequestType_bit; + uint8_t bmRequestType; }; diff --git a/src/host/hub.c b/src/host/hub.c index a418774f6..82ad2ba17 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -71,15 +71,27 @@ bool hub_port_clear_feature_subtask(uint8_t hub_addr, uint8_t hub_port, uint8_t { TU_ASSERT(HUB_FEATURE_PORT_CONNECTION_CHANGE <= feature && feature <= HUB_FEATURE_PORT_RESET_CHANGE); + tusb_control_request_t request = { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_OTHER, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_OUT }, + .bRequest = HUB_REQUEST_CLEAR_FEATURE, + .wValue = feature, + .wIndex = hub_port, + .wLength = 0 + }; + //------------- Clear Port Feature request -------------// - TU_ASSERT( usbh_control_xfer_subtask( hub_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), - HUB_REQUEST_CLEAR_FEATURE, feature, hub_port, - 0, NULL ) ); + TU_ASSERT( usbh_control_xfer( hub_addr, &request, NULL ) ); //------------- Get Port Status to check if feature is cleared -------------// - TU_ASSERT( usbh_control_xfer_subtask( hub_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), - HUB_REQUEST_GET_STATUS, 0, hub_port, - 4, hub_enum_buffer ) ); + request = (tusb_control_request_t ) { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_OTHER, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_IN }, + .bRequest = HUB_REQUEST_GET_STATUS, + .wValue = 0, + .wIndex = hub_port, + .wLength = 4 + }; + + TU_ASSERT( usbh_control_xfer( hub_addr, &request, hub_enum_buffer ) ); //------------- Check if feature is cleared -------------// hub_port_status_response_t * p_port_status; @@ -96,16 +108,28 @@ bool hub_port_reset_subtask(uint8_t hub_addr, uint8_t hub_port) tusb_error_t error; //------------- Set Port Reset -------------// - TU_ASSERT( usbh_control_xfer_subtask( hub_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), - HUB_REQUEST_SET_FEATURE, HUB_FEATURE_PORT_RESET, hub_port, - 0, NULL ) ); + tusb_control_request_t request = { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_OTHER, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_OUT }, + .bRequest = HUB_REQUEST_SET_FEATURE, + .wValue = HUB_FEATURE_PORT_RESET, + .wIndex = hub_port, + .wLength = 0 + }; + + TU_ASSERT( usbh_control_xfer( hub_addr, &request, NULL ) ); osal_task_delay(RESET_DELAY); // TODO Hub wait for Status Endpoint on Reset Change //------------- Get Port Status to check if port is enabled, powered and reset_change -------------// - TU_ASSERT( usbh_control_xfer_subtask( hub_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), - HUB_REQUEST_GET_STATUS, 0, hub_port, - 4, hub_enum_buffer ) ); + request = (tusb_control_request_t ) { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_OTHER, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_IN }, + .bRequest = HUB_REQUEST_GET_STATUS, + .wValue = 0, + .wIndex = hub_port, + .wLength = 4 + }; + + TU_ASSERT( usbh_control_xfer( hub_addr, &request, hub_enum_buffer ) ); hub_port_status_response_t * p_port_status; p_port_status = (hub_port_status_response_t *) hub_enum_buffer; @@ -152,20 +176,33 @@ bool hub_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface (*p_length) = sizeof(tusb_desc_interface_t) + sizeof(tusb_desc_endpoint_t); //------------- Get Hub Descriptor -------------// - TU_ASSERT( usbh_control_xfer_subtask( dev_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_DEVICE), - HUB_REQUEST_GET_DESCRIPTOR, 0, 0, - sizeof(descriptor_hub_desc_t), hub_enum_buffer ) ); + tusb_control_request_t request = { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_DEVICE, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_IN }, + .bRequest = HUB_REQUEST_GET_DESCRIPTOR, + .wValue = 0, + .wIndex = 0, + .wLength = sizeof(descriptor_hub_desc_t) + }; + + TU_ASSERT( usbh_control_xfer( dev_addr, &request, hub_enum_buffer ) ); // only care about this field in hub descriptor hub_data[dev_addr-1].port_number = ((descriptor_hub_desc_t*) hub_enum_buffer)->bNbrPorts; //------------- Set Port_Power on all ports -------------// - static uint8_t i; - for(i=1; i <= hub_data[dev_addr-1].port_number; i++) + // TODO may only power port with attached + request = (tusb_control_request_t ) { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_OTHER, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_OUT }, + .bRequest = HUB_REQUEST_SET_FEATURE, + .wValue = HUB_FEATURE_PORT_POWER, + .wIndex = 0, + .wLength = 0 + }; + + for(uint8_t i=1; i <= hub_data[dev_addr-1].port_number; i++) { - TU_ASSERT( usbh_control_xfer_subtask( dev_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), - HUB_REQUEST_SET_FEATURE, HUB_FEATURE_PORT_POWER, i, - 0, NULL ) ); + request.wIndex = i; + TU_ASSERT( usbh_control_xfer( dev_addr, &request, NULL ) ); } //------------- Queue the initial Status endpoint transfer -------------// diff --git a/src/host/usbh.c b/src/host/usbh.c index e96f5f669..ad0653cf4 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -190,20 +190,13 @@ bool usbh_init(void) } //------------- USBH control transfer -------------// -bool usbh_control_xfer_subtask (uint8_t dev_addr, uint8_t bmRequestType, uint8_t bRequest, - uint16_t wValue, uint16_t wIndex, uint16_t wLength, uint8_t* data) +bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8_t* data) { usbh_device_t* dev = &_usbh_devices[dev_addr]; TU_ASSERT(osal_mutex_lock(dev->control.mutex_hdl, OSAL_TIMEOUT_NORMAL)); - dev->control.request = (tusb_control_request_t ) { - {.bmRequestType = bmRequestType}, - .bRequest = bRequest, - .wValue = wValue, - .wIndex = wIndex, - .wLength = wLength - }; + dev->control.request = *request; dev->control.pipe_status = 0; TU_ASSERT_ERR(hcd_pipe_control_xfer(dev_addr, &dev->control.request, data), false); @@ -383,6 +376,7 @@ bool enum_task(hcd_event_t* event) static uint8_t *p_desc = NULL; // TODO move usbh_device_t* dev0 = &_usbh_devices[0]; + tusb_control_request_t request; dev0->core_id = event->rhport; // TODO refractor integrate to device_pool dev0->hub_addr = event->plug.hub_addr; @@ -417,10 +411,15 @@ bool enum_task(hcd_event_t* event) else { //------------- Get Port Status -------------// - TU_VERIFY_HDLR( usbh_control_xfer_subtask( dev0->hub_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_OTHER), - HUB_REQUEST_GET_STATUS, 0, dev0->hub_port, - 4, _usbh_ctrl_buf ) - , hub_status_pipe_queue( dev0->hub_addr) ); // TODO hub refractor + request = (tusb_control_request_t ) { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_OTHER, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_IN }, + .bRequest = HUB_REQUEST_GET_STATUS, + .wValue = 0, + .wIndex = dev0->hub_port, + .wLength = 4 + }; + // TODO hub refractor + TU_VERIFY_HDLR( usbh_control_xfer( dev0->hub_addr, &request, _usbh_ctrl_buf ), hub_status_pipe_queue( dev0->hub_addr) ); // Acknowledge Port Connection Change hub_port_clear_feature_subtask(dev0->hub_addr, dev0->hub_port, HUB_FEATURE_PORT_CONNECTION_CHANGE); @@ -456,9 +455,14 @@ bool enum_task(hcd_event_t* event) dev0->state = TUSB_DEVICE_STATE_ADDRESSED; //------------- Get first 8 bytes of device descriptor to get Control Endpoint Size -------------// - bool is_ok = usbh_control_xfer_subtask(0, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_GET_DESCRIPTOR, - (TUSB_DESC_DEVICE << 8), 0, 8, _usbh_ctrl_buf); + request = (tusb_control_request_t ) { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_DEVICE, .type = TUSB_REQ_TYPE_STANDARD, .direction = TUSB_DIR_IN }, + .bRequest = TUSB_REQ_GET_DESCRIPTOR, + .wValue = TUSB_DESC_DEVICE << 8, + .wIndex = 0, + .wLength = 8 + }; + bool is_ok = usbh_control_xfer(0, &request, _usbh_ctrl_buf); //------------- Reset device again before Set Address -------------// if (dev0->hub_addr == 0) @@ -488,9 +492,14 @@ bool enum_task(hcd_event_t* event) uint8_t const new_addr = get_new_address(); TU_ASSERT(new_addr <= CFG_TUSB_HOST_DEVICE_MAX); // TODO notify application we reach max devices - TU_ASSERT(usbh_control_xfer_subtask( 0, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_SET_ADDRESS, new_addr, 0, - 0, NULL )); + request = (tusb_control_request_t ) { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_DEVICE, .type = TUSB_REQ_TYPE_STANDARD, .direction = TUSB_DIR_OUT }, + .bRequest = TUSB_REQ_SET_ADDRESS, + .wValue = new_addr, + .wIndex = 0, + .wLength = 0 + }; + TU_ASSERT(usbh_control_xfer(0, &request, NULL)); //------------- update port info & close control pipe of addr0 -------------// usbh_device_t* new_dev = &_usbh_devices[new_addr]; @@ -507,11 +516,14 @@ bool enum_task(hcd_event_t* event) TU_ASSERT_ERR ( usbh_pipe_control_open(new_addr, ((tusb_desc_device_t*) _usbh_ctrl_buf)->bMaxPacketSize0 ) ); //------------- Get full device descriptor -------------// - TU_ASSERT( - usbh_control_xfer_subtask(new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_DEVICE << 8), 0, - 18, - _usbh_ctrl_buf)); + request = (tusb_control_request_t ) { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_DEVICE, .type = TUSB_REQ_TYPE_STANDARD, .direction = TUSB_DIR_IN }, + .bRequest = TUSB_REQ_GET_DESCRIPTOR, + .wValue = TUSB_DESC_DEVICE << 8, + .wIndex = 0, + .wLength = 18 + }; + TU_ASSERT(usbh_control_xfer(new_addr, &request, _usbh_ctrl_buf)); // update device info TODO alignment issue new_dev->vendor_id = ((tusb_desc_device_t*) _usbh_ctrl_buf)->idVendor; @@ -522,28 +534,34 @@ bool enum_task(hcd_event_t* event) TU_ASSERT(configure_selected <= new_dev->configure_count); // TODO notify application when invalid configuration //------------- Get 9 bytes of configuration descriptor -------------// - TU_ASSERT( - usbh_control_xfer_subtask(new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_GET_DESCRIPTOR, - (TUSB_DESC_CONFIGURATION << 8) | (configure_selected - 1), 0, - 9, - _usbh_ctrl_buf)); + request = (tusb_control_request_t ) { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_DEVICE, .type = TUSB_REQ_TYPE_STANDARD, .direction = TUSB_DIR_IN }, + .bRequest = TUSB_REQ_GET_DESCRIPTOR, + .wValue = (TUSB_DESC_CONFIGURATION << 8) | (configure_selected - 1), + .wIndex = 0, + .wLength = 9 + }; + TU_ASSERT( usbh_control_xfer(new_addr, &request, _usbh_ctrl_buf)); - TU_VERIFY_HDLR( CFG_TUSB_HOST_ENUM_BUFFER_SIZE >= ((tusb_desc_configuration_t*)_usbh_ctrl_buf)->wTotalLength, - tuh_device_mount_failed_cb(TUSB_ERROR_USBH_MOUNT_CONFIG_DESC_TOO_LONG, NULL) ); + // TODO not enough buffer to hold configuration descriptor + TU_ASSERT( CFG_TUSB_HOST_ENUM_BUFFER_SIZE >= ((tusb_desc_configuration_t*)_usbh_ctrl_buf)->wTotalLength ); //------------- Get full configuration descriptor -------------// - TU_ASSERT( usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_GET_DESCRIPTOR, (TUSB_DESC_CONFIGURATION << 8) | (configure_selected - 1), 0, - CFG_TUSB_HOST_ENUM_BUFFER_SIZE, _usbh_ctrl_buf ) ); + request.wLength = ((tusb_desc_configuration_t*)_usbh_ctrl_buf)->wTotalLength; // full length + TU_ASSERT( usbh_control_xfer( new_addr, &request, _usbh_ctrl_buf ) ); // update configuration info new_dev->interface_count = ((tusb_desc_configuration_t*) _usbh_ctrl_buf)->bNumInterfaces; //------------- Set Configure -------------// - TU_ASSERT( usbh_control_xfer_subtask( new_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_DEVICE), - TUSB_REQ_SET_CONFIGURATION, configure_selected, 0, - 0, NULL )); + request = (tusb_control_request_t ) { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_DEVICE, .type = TUSB_REQ_TYPE_STANDARD, .direction = TUSB_DIR_OUT }, + .bRequest = TUSB_REQ_SET_CONFIGURATION, + .wValue = configure_selected, + .wIndex = 0, + .wLength = 0 + }; + TU_ASSERT(usbh_control_xfer( new_addr, &request, NULL )); new_dev->state = TUSB_DEVICE_STATE_CONFIGURED; @@ -607,6 +625,8 @@ bool usbh_task_body(void) case HCD_EVENT_DEVICE_UNPLUG: enum_task(&event); break; + + default: break; } } } diff --git a/src/host/usbh.h b/src/host/usbh.h index bcbf2902c..039997a24 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -100,8 +100,8 @@ ATTR_WEAK void tuh_device_mount_failed_cb(tusb_error_t error, tusb_desc_devic bool usbh_init(void); void usbh_task(void* param); -bool usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, uint8_t bRequest, - uint16_t wValue, uint16_t wIndex, uint16_t wLength, uint8_t* data); +bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8_t* data); + #endif #ifdef __cplusplus diff --git a/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c b/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c index 75da7cfdf..dde629cf0 100644 --- a/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c +++ b/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c @@ -222,7 +222,7 @@ void test_usbh_control_xfer_mutex_failed(void) osal_mutex_release_ExpectAndReturn(_usbh_devices[dev_addr].control.mutex_hdl, TUSB_ERROR_NONE); //------------- Code Under Test -------------// - usbh_control_xfer_subtask(dev_addr, 1, 2, 3, 4, 0, NULL); + usbh_control_xfer(dev_addr, 1, 2, 3, 4, 0, NULL); } void test_usbh_control_xfer_ok(void) @@ -244,7 +244,7 @@ void test_usbh_control_xfer_ok(void) osal_mutex_release_ExpectAndReturn(_usbh_devices[dev_addr].control.mutex_hdl, TUSB_ERROR_NONE); //------------- Code Under Test -------------// - usbh_control_xfer_subtask(dev_addr, 1, 2, 3, 4, 0, NULL); + usbh_control_xfer(dev_addr, 1, 2, 3, 4, 0, NULL); } //void test_usbh_xfer_isr_non_control_stalled(void) // do nothing for stall on control -- cgit v1.3.1 From 89820a36a153506c7634d5e44214394ae3ff45c1 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 7 Dec 2018 12:56:42 +0700 Subject: able to build with host msc --- examples/host/cdc_msc_hid/src/msc_app.c | 125 +++++++++++++++++++++ examples/host/cdc_msc_hid/src/tusb_config.h | 2 +- src/class/msc/msc_host.c | 116 ++++++++++--------- src/class/msc/msc_host.h | 9 +- src/host/ehci/ehci.c | 4 +- src/host/hcd.h | 2 +- src/host/ohci/ohci.c | 4 +- src/host/usbh.c | 2 +- .../host/ehci/test_ehci_usbh_hcd_integration.c | 4 +- .../test/host/ehci/test_pipe_control_xfer.c | 12 +- 10 files changed, 202 insertions(+), 78 deletions(-) create mode 100644 examples/host/cdc_msc_hid/src/msc_app.c (limited to 'src/host') diff --git a/examples/host/cdc_msc_hid/src/msc_app.c b/examples/host/cdc_msc_hid/src/msc_app.c new file mode 100644 index 000000000..7235aeca7 --- /dev/null +++ b/examples/host/cdc_msc_hid/src/msc_app.c @@ -0,0 +1,125 @@ +/**************************************************************************/ +/*! + @file msc_app.c + @author hathach (tinyusb.org) + + @section LICENSE + + Software License Agreement (BSD License) + + Copyright (c) 2018, hathach (tinyusb.org) + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + 1. Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + 3. Neither the name of the copyright holders nor the + names of its contributors may be used to endorse or promote products + derived from this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY + EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY + DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + This file is part of the tinyusb stack. +*/ +/**************************************************************************/ + +#include "tusb.h" + +#if CFG_TUH_MSC + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM DECLARATION +//--------------------------------------------------------------------+ + + +//------------- IMPLEMENTATION -------------// +void tuh_msc_mounted_cb(uint8_t dev_addr) +{ + puts("\na MassStorage device is mounted"); + +// //------------- Disk Information -------------// +// // SCSI VendorID[8] & ProductID[16] from Inquiry Command +// uint8_t const* p_vendor = tuh_msc_get_vendor_name(dev_addr); +// uint8_t const* p_product = tuh_msc_get_product_name(dev_addr); +// +// for(uint8_t i=0; i<8; i++) putchar(p_vendor[i]); +// +// putchar(' '); +// for(uint8_t i=0; i<16; i++) putchar(p_product[i]); +// putchar('\n'); +// +// uint32_t last_lba, block_size; +// tuh_msc_get_capacity(dev_addr, &last_lba, &block_size); +// printf("Disk Size: %d MB\n", (last_lba+1)/ ((1024*1024)/block_size) ); +// printf("LBA 0-0x%X Block Size: %d\n", last_lba, block_size); +// +// //------------- file system (only 1 LUN support) -------------// +// uint8_t phy_disk = dev_addr-1; +// disk_initialize(phy_disk); +// +// if ( disk_is_ready(phy_disk) ) +// { +// if ( f_mount(phy_disk, &fatfs[phy_disk]) != FR_OK ) +// { +// puts("mount failed"); +// return; +// } +// +// puts("---------------------------------------------------------------------"); +// puts("- MASSSTORAGE CLASS CLI IS A IMMATURE CODE. DISK-WRITING COMMANDS"); +// puts("- SUCH AS cp(COPY), mkdir(MAKE DIRECTORY) ARE POTENTIAL TO DAMAGE"); +// puts("- YOUR USB THUMBDRIVE. USING THOSE COMMANDS ARE AT YOUR OWN RISK."); +// puts("- THE AUTHOR HAS NO RESPONSIBILITY WITH YOUR DEVICE NOR ITS DATA"); +// puts("---------------------------------------------------------------------"); +// +// f_chdrive(phy_disk); // change to newly mounted drive +// f_chdir("/"); // root as current dir +// +// cli_init(); +// } +} + +void tuh_msc_unmounted_cb(uint8_t dev_addr) +{ + puts("\na MassStorage device is unmounted"); + +// uint8_t phy_disk = dev_addr-1; +// +// f_mount(phy_disk, NULL); // unmount disk +// disk_deinitialize(phy_disk); +// +// if ( phy_disk == f_get_current_drive() ) +// { // active drive is unplugged --> change to other drive +// for(uint8_t i=0; icbw.dir & TUSB_DIR_IN_MASK) { TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false) ); - TU_ASSERT_ERR( hcd_pipe_queue_xfer(p_msch->bulk_in , p_buffer, p_msch->cbw.xfer_bytes) ); + TU_ASSERT_ERR( hcd_pipe_queue_xfer(p_msch->bulk_in , p_buffer, p_msch->cbw.total_bytes) ); }else { TU_ASSERT_ERR( hcd_pipe_queue_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t)) ); - TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out , p_buffer, p_msch->cbw.xfer_bytes, false) ); + TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out , p_buffer, p_msch->cbw.total_bytes, false) ); } } @@ -136,7 +137,7 @@ tusb_error_t tusbh_msc_inquiry(uint8_t dev_addr, uint8_t lun, uint8_t *p_data) //------------- Command Block Wrapper -------------// msc_cbw_add_signature(&p_msch->cbw, lun); - p_msch->cbw.xfer_bytes = sizeof(scsi_inquiry_data_t); + p_msch->cbw.total_bytes = sizeof(scsi_inquiry_resp_t); p_msch->cbw.dir = TUSB_DIR_IN_MASK; p_msch->cbw.cmd_len = sizeof(scsi_inquiry_t); @@ -144,7 +145,7 @@ tusb_error_t tusbh_msc_inquiry(uint8_t dev_addr, uint8_t lun, uint8_t *p_data) scsi_inquiry_t cmd_inquiry = { .cmd_code = SCSI_CMD_INQUIRY, - .alloc_length = sizeof(scsi_inquiry_data_t) + .alloc_length = sizeof(scsi_inquiry_resp_t) }; memcpy(p_msch->cbw.command, &cmd_inquiry, p_msch->cbw.cmd_len); @@ -160,7 +161,7 @@ tusb_error_t tusbh_msc_read_capacity10(uint8_t dev_addr, uint8_t lun, uint8_t *p //------------- Command Block Wrapper -------------// msc_cbw_add_signature(&p_msch->cbw, lun); - p_msch->cbw.xfer_bytes = sizeof(scsi_read_capacity10_data_t); + p_msch->cbw.total_bytes = sizeof(scsi_read_capacity10_resp_t); p_msch->cbw.dir = TUSB_DIR_IN_MASK; p_msch->cbw.cmd_len = sizeof(scsi_read_capacity10_t); @@ -186,7 +187,7 @@ tusb_error_t tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, uint8_t *p_dat msch_interface_t* p_msch = &msch_data[dev_addr-1]; //------------- Command Block Wrapper -------------// - p_msch->cbw.xfer_bytes = 18; + p_msch->cbw.total_bytes = 18; p_msch->cbw.dir = TUSB_DIR_IN_MASK; p_msch->cbw.cmd_len = sizeof(scsi_request_sense_t); @@ -211,7 +212,7 @@ tusb_error_t tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, msc_csw_t * //------------- Command Block Wrapper -------------// msc_cbw_add_signature(&p_msch->cbw, lun); - p_msch->cbw.xfer_bytes = 0; // Number of bytes + p_msch->cbw.total_bytes = 0; // Number of bytes p_msch->cbw.dir = TUSB_DIR_OUT; p_msch->cbw.cmd_len = sizeof(scsi_test_unit_ready_t); @@ -238,7 +239,7 @@ tusb_error_t tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uin //------------- Command Block Wrapper -------------// msc_cbw_add_signature(&p_msch->cbw, lun); - p_msch->cbw.xfer_bytes = p_msch->block_size*block_count; // Number of bytes + p_msch->cbw.total_bytes = p_msch->block_size*block_count; // Number of bytes p_msch->cbw.dir = TUSB_DIR_IN_MASK; p_msch->cbw.cmd_len = sizeof(scsi_read10_t); @@ -247,7 +248,7 @@ tusb_error_t tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uin { .cmd_code = SCSI_CMD_READ_10, .lba = __n2be(lba), - .block_count = u16_le2be(block_count) + .block_count = tu_u16_le2be(block_count) }; memcpy(p_msch->cbw.command, &cmd_read10, p_msch->cbw.cmd_len); @@ -264,7 +265,7 @@ tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffe //------------- Command Block Wrapper -------------// msc_cbw_add_signature(&p_msch->cbw, lun); - p_msch->cbw.xfer_bytes = p_msch->block_size*block_count; // Number of bytes + p_msch->cbw.total_bytes = p_msch->block_size*block_count; // Number of bytes p_msch->cbw.dir = TUSB_DIR_OUT; p_msch->cbw.cmd_len = sizeof(scsi_write10_t); @@ -273,7 +274,7 @@ tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffe { .cmd_code = SCSI_CMD_WRITE_10, .lba = __n2be(lba), - .block_count = u16_le2be(block_count) + .block_count = tu_u16_le2be(block_count) }; memcpy(p_msch->cbw.command, &cmd_write10, p_msch->cbw.cmd_len); @@ -289,15 +290,13 @@ tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffe void msch_init(void) { tu_memclr(msch_data, sizeof(msch_interface_t)*CFG_TUSB_HOST_DEVICE_MAX); - msch_sem_hdl = osal_semaphore_create(1, 0); + msch_sem_hdl = osal_semaphore_create(&msch_sem_def); } -tusb_error_t msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) +bool msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) { tusb_error_t error; - OSAL_SUBTASK_BEGIN - if (! ( MSC_SUBCLASS_SCSI == p_interface_desc->bInterfaceSubClass && MSC_PROTOCOL_BOT == p_interface_desc->bInterfaceProtocol ) ) { @@ -310,14 +309,14 @@ tusb_error_t msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_ for(uint32_t i=0; i<2; i++) { - STASK_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType); - STASK_ASSERT(TUSB_XFER_BULK == p_endpoint->bmAttributes.xfer); + TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType); + TU_ASSERT(TUSB_XFER_BULK == p_endpoint->bmAttributes.xfer); pipe_handle_t * p_pipe_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_IN_MASK ) ? &msch_data[dev_addr-1].bulk_in : &msch_data[dev_addr-1].bulk_out; (*p_pipe_hdl) = hcd_pipe_open(dev_addr, p_endpoint, TUSB_CLASS_MSC); - STASK_ASSERT( pipehandle_is_valid(*p_pipe_hdl) ); + TU_ASSERT( pipehandle_is_valid(*p_pipe_hdl) ); p_endpoint = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) p_endpoint ); } @@ -327,74 +326,73 @@ tusb_error_t msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_ //------------- Get Max Lun -------------// - STASK_INVOKE( - usbh_control_xfer_subtask( dev_addr, bm_request_type(TUSB_DIR_IN, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_INTERFACE), - MSC_REQ_GET_MAX_LUN, 0, msch_data[dev_addr-1].interface_number, - 1, msch_buffer ), - error - ); - - STASK_ASSERT( TUSB_ERROR_NONE == error /* && TODO STALL means zero */); + tusb_control_request_t request = { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_INTERFACE, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_IN }, + .bRequest = MSC_REQ_GET_MAX_LUN, + .wValue = 0, + .wIndex = msch_data[dev_addr-1].interface_number, + .wLength = 1 + }; + // TODO STALL means zero + TU_ASSERT( usbh_control_xfer( dev_addr, &request, msch_buffer ) ); msch_data[dev_addr-1].max_lun = msch_buffer[0]; #if 0 //------------- Reset -------------// - STASK_INVOKE( - usbh_control_xfer_subtask( dev_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_INTERFACE), - MSC_REQ_RESET, 0, msch_data[dev_addr-1].interface_number, - 0, NULL ), - error - ); + request = (tusb_control_request_t) { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_INTERFACE, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_OUT }, + .bRequest = MSC_REQ_RESET, + .wValue = 0, + .wIndex = msch_data[dev_addr-1].interface_number, + .wLength = 0 + }; + TU_ASSERT( usbh_control_xfer( dev_addr, &request, NULL ) ); #endif enum { SCSI_XFER_TIMEOUT = 2000 }; //------------- SCSI Inquiry -------------// tusbh_msc_inquiry(dev_addr, 0, msch_buffer); - osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT, &error); - STASK_ASSERT_ERR(error); + TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT) ); - memcpy(msch_data[dev_addr-1].vendor_id , ((scsi_inquiry_data_t*) msch_buffer)->vendor_id , 8); - memcpy(msch_data[dev_addr-1].product_id, ((scsi_inquiry_data_t*) msch_buffer)->product_id, 16); + memcpy(msch_data[dev_addr-1].vendor_id , ((scsi_inquiry_resp_t*) msch_buffer)->vendor_id , 8); + memcpy(msch_data[dev_addr-1].product_id, ((scsi_inquiry_resp_t*) msch_buffer)->product_id, 16); //------------- SCSI Read Capacity 10 -------------// tusbh_msc_read_capacity10(dev_addr, 0, msch_buffer); - osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT, &error); - STASK_ASSERT_ERR(error); + TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT)); // NOTE: my toshiba thumb-drive stall the first Read Capacity and require the sequence // Read Capacity --> Stalled --> Clear Stall --> Request Sense --> Read Capacity (2) to work if ( hcd_pipe_is_stalled(msch_data[dev_addr-1].bulk_in) ) - { // clear stall TODO abstract clear stall function - STASK_INVOKE( - usbh_control_xfer_subtask( dev_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_STANDARD, TUSB_REQ_RCPT_ENDPOINT), - TUSB_REQ_CLEAR_FEATURE, 0, hcd_pipe_get_endpoint_addr(msch_data[dev_addr-1].bulk_in), - 0, NULL ), - error - ); - STASK_ASSERT_ERR(error); + { + // clear stall TODO abstract clear stall function + request = (tusb_control_request_t) { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_ENDPOINT, .type = TUSB_REQ_TYPE_STANDARD, .direction = TUSB_DIR_OUT }, + .bRequest = TUSB_REQ_CLEAR_FEATURE, + .wValue = 0, + .wIndex = hcd_pipe_get_endpoint_addr(msch_data[dev_addr-1].bulk_in), + .wLength = 0 + }; + + TU_ASSERT(usbh_control_xfer( dev_addr, &request, NULL )); hcd_pipe_clear_stall(msch_data[dev_addr-1].bulk_in); - osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT, &error); // wait for SCSI status - STASK_ASSERT_ERR(error); + TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT) ); // wait for SCSI status //------------- SCSI Request Sense -------------// (void) tuh_msc_request_sense(dev_addr, 0, msch_buffer); - osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT, &error); - STASK_ASSERT_ERR(error); + TU_ASSERT(osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT)); //------------- Re-read SCSI Read Capactity -------------// tusbh_msc_read_capacity10(dev_addr, 0, msch_buffer); - osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT, &error); - STASK_ASSERT_ERR(error); + TU_ASSERT(osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT)); } - msch_data[dev_addr-1].last_lba = __be2n( ((scsi_read_capacity10_data_t*)msch_buffer)->last_lba ); - msch_data[dev_addr-1].block_size = (uint16_t) __be2n( ((scsi_read_capacity10_data_t*)msch_buffer)->block_size ); + msch_data[dev_addr-1].last_lba = __be2n( ((scsi_read_capacity10_resp_t*)msch_buffer)->last_lba ); + msch_data[dev_addr-1].block_size = (uint16_t) __be2n( ((scsi_read_capacity10_resp_t*)msch_buffer)->block_size ); msch_data[dev_addr-1].is_initialized = true; tuh_msc_mounted_cb(dev_addr); - - OSAL_SUBTASK_END } void msch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes) @@ -406,7 +404,7 @@ void msch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_byte tuh_msc_isr(pipe_hdl.dev_addr, event, xferred_bytes); }else { // still initializing under open subtask - osal_semaphore_post(msch_sem_hdl); + osal_semaphore_post(msch_sem_hdl, true); } } } diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index a408bbeaf..5c5068eb3 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -203,10 +203,11 @@ typedef struct { msc_csw_t csw; }msch_interface_t; -void msch_init(void); -tusb_error_t msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; -void msch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); -void msch_close(uint8_t dev_addr); +void msch_init(void); +bool msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; +void msch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); +void msch_close(uint8_t dev_addr); + #endif #ifdef __cplusplus diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index d30b68a64..c9947a19c 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -294,7 +294,7 @@ tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) return TUSB_ERROR_NONE; } -tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) +bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) { ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); @@ -332,7 +332,7 @@ tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t con p_qhd->qtd_overlay.next.address = (uint32_t) p_setup; - return TUSB_ERROR_NONE; + return true; } tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) diff --git a/src/host/hcd.h b/src/host/hcd.h index efdfb920d..3e3b966d0 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -128,7 +128,7 @@ void hcd_event_handler(hcd_event_t const* event, bool in_isr); //--------------------------------------------------------------------+ // TODO control xfer should be used via usbh layer tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) ATTR_WARN_UNUSED_RESULT; -tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) ATTR_WARN_UNUSED_RESULT; +bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) ATTR_WARN_UNUSED_RESULT; tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) ATTR_WARN_UNUSED_RESULT; pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_desc_endpoint_t const * endpoint_desc, uint8_t class_code) ATTR_WARN_UNUSED_RESULT; diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index 91d9b6243..cef0d5dae 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -291,7 +291,7 @@ tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) return TUSB_ERROR_NONE; } -tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) +bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) { ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed; @@ -331,7 +331,7 @@ tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t con OHCI_REG->command_status_bit.control_list_filled = 1; - return TUSB_ERROR_NONE; + return true; } tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) diff --git a/src/host/usbh.c b/src/host/usbh.c index ad0653cf4..6c3194fdd 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -199,7 +199,7 @@ bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8 dev->control.request = *request; dev->control.pipe_status = 0; - TU_ASSERT_ERR(hcd_pipe_control_xfer(dev_addr, &dev->control.request, data), false); + TU_ASSERT(hcd_pipe_control_xfer(dev_addr, &dev->control.request, data)); TU_ASSERT(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL)); osal_mutex_unlock(dev->control.mutex_hdl); diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_usbh_hcd_integration.c b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_usbh_hcd_integration.c index f39f25022..e17b2ba74 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_usbh_hcd_integration.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_usbh_hcd_integration.c @@ -100,7 +100,7 @@ void test_addr0_control_close(void) TEST_ASSERT_STATUS( hcd_pipe_control_open(dev_addr, control_max_packet_size) ); - TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, + TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &(tusb_control_request_t) { .bmRequestType_bit = { .direction = TUSB_DIR_HOST_TO_DEV, .type = TUSB_REQ_TYPE_STANDARD, .recipient = TUSB_REQ_RECIPIENT_DEVICE }, .bRequest = TUSB_REQ_SET_ADDRESS, @@ -126,7 +126,7 @@ void test_isr_disconnect_then_async_advance_control_pipe(void) { TEST_ASSERT_STATUS( hcd_pipe_control_open(dev_addr, control_max_packet_size) ); - TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, + TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &(tusb_control_request_t) { .bmRequestType_bit = { .direction = TUSB_DIR_HOST_TO_DEV, .type = TUSB_REQ_TYPE_STANDARD, .recipient = TUSB_REQ_RECIPIENT_DEVICE }, .bRequest = TUSB_REQ_SET_ADDRESS, diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c index bcea7ac8c..ff1a2c0ac 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c @@ -149,7 +149,7 @@ void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void) TEST_ASSERT_STATUS( hcd_pipe_control_open(dev_addr, control_max_packet_size) ); //------------- Code Under TEST -------------// - TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) ); + TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) ); p_setup = &ehci_data.addr0_qtd[0]; p_data = &ehci_data.addr0_qtd[1]; @@ -171,7 +171,7 @@ void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void) void test_control_xfer_get(void) { //------------- Code Under TEST -------------// - TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) ); + TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) ); TEST_ASSERT_EQUAL_HEX( p_setup, p_control_qhd->qtd_overlay.next.address ); TEST_ASSERT_EQUAL_HEX( p_setup , p_control_qhd->p_qtd_list_head); @@ -206,7 +206,7 @@ void test_control_xfer_get(void) void test_control_xfer_set(void) { //------------- Code Under TEST -------------// - TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_set_dev_addr, xfer_data) ); + TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &request_set_dev_addr, xfer_data) ); TEST_ASSERT_EQUAL_HEX( p_setup, p_control_qhd->qtd_overlay.next.address ); TEST_ASSERT_EQUAL_HEX( p_setup , p_control_qhd->p_qtd_list_head); @@ -226,7 +226,7 @@ void test_control_xfer_set(void) void test_control_xfer_complete_isr(void) { - TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) ); + TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) ); usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, XFER_RESULT_SUCCESS, 18); @@ -245,7 +245,7 @@ void test_control_xfer_complete_isr(void) void test_control_xfer_error_isr(void) { - TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) ); + TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) ); usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, XFER_RESULT_FAILED, 0); @@ -264,7 +264,7 @@ void test_control_xfer_error_isr(void) void test_control_xfer_error_stall(void) { - TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) ); + TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) ); usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, XFER_RESULT_STALLED, 0); -- cgit v1.3.1 From 366ab797769b77dbf353b101ba862b20084dbc02 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 7 Dec 2018 14:57:58 +0700 Subject: able to build host hid --- docs/configuration.txt | 4 +- .../host/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject | 3 +- examples/host/cdc_msc_hid/src/main.c | 39 ++++++++++++- examples/host/cdc_msc_hid/src/tusb_config.h | 7 +-- examples/obsolete/host/src/keyboard_host_app.c | 2 +- examples/obsolete/host/src/keyboard_host_app.h | 2 +- examples/obsolete/host/src/main.c | 4 +- examples/obsolete/host/src/mouse_host_app.c | 2 +- examples/obsolete/host/src/mouse_host_app.h | 2 +- examples/obsolete/host/src/tusb_config.h | 4 +- src/class/hid/hid_host.c | 64 +++++++++++----------- src/class/hid/hid_host.h | 8 +-- src/class/msc/msc_host.c | 4 +- src/host/ehci/ehci.c | 3 + src/host/hcd.h | 2 +- src/host/hub.c | 1 - src/tusb_option.h | 2 +- tests/support/tusb_config.h | 4 +- 18 files changed, 98 insertions(+), 59 deletions(-) (limited to 'src/host') diff --git a/docs/configuration.txt b/docs/configuration.txt index 33eb4efbf..49061a4a0 100644 --- a/docs/configuration.txt +++ b/docs/configuration.txt @@ -41,8 +41,8 @@ * \brief For each Class Driver a value of 1 means enable, value of 0 mean disable * @{ */ #define CFG_TUH_HUB ///< Enable Hub Class -#define CFG_TUSB_HOST_HID_KEYBOARD ///< Enable HID Class for Keyboard -#define CFG_TUSB_HOST_HID_MOUSE ///< Enable HID Class for Mouse +#define CFG_TUH_HID_KEYBOARD ///< Enable HID Class for Keyboard +#define CFG_TUH_HID_MOUSE ///< Enable HID Class for Mouse #define CFG_TUSB_HOST_HID_GENERIC ///< Enable HID Class for Generic (not supported yet) #define CFG_TUH_MSC ///< Enable Mass Storage Class (SCSI subclass only) #define CFG_TUH_CDC ///< Enable Virtual Serial (Communication Device Class) diff --git a/examples/host/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject b/examples/host/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject index 3b8924309..425f42a58 100644 --- a/examples/host/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject +++ b/examples/host/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject @@ -18,11 +18,12 @@ arm_target_debug_interface_type="ADIv5" arm_target_device_name="LPC4357_M4" arm_target_interface_type="SWD" - build_treat_warnings_as_errors="Yes" + build_treat_warnings_as_errors="No" c_preprocessor_definitions="CORE_M4;__LPC4300_FAMILY;__LPC435x_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;BOARD_EA4357;CFG_TUSB_MCU=OPT_MCU_LPC43XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss2")))" c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/src;$(lpcDir)//inc;$(lpcDir)//inc/config_43xx" debug_register_definition_file="LPC43xx_Registers.xml" debug_target_connection="J-Link" + gcc_enable_all_warnings="Yes" gcc_entry_point="Reset_Handler" link_use_linker_script_file="No" linker_memory_map_file="LPC4357 Cortex-M4_MemoryMap.xml" diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c index 81e8a172c..88d7cd4de 100644 --- a/examples/host/cdc_msc_hid/src/main.c +++ b/examples/host/cdc_msc_hid/src/main.c @@ -111,12 +111,49 @@ void virtual_com_task(void) //--------------------------------------------------------------------+ // USB HID //--------------------------------------------------------------------+ -#if CFG_TUD_HID +#if CFG_TUH_HID_KEYBOARD void usb_hid_task(void) { } +void tuh_hid_keyboard_mounted_cb(uint8_t dev_addr) +{ + // application set-up + printf("\na Keyboard device (address %d) is mounted\n", dev_addr); +} + +void tuh_hid_keyboard_unmounted_cb(uint8_t dev_addr) +{ + // application tear-down + printf("\na Keyboard device (address %d) is unmounted\n", dev_addr); +} + +// invoked ISR context +void tuh_hid_keyboard_isr(uint8_t dev_addr, xfer_result_t event) +{ + +} + +#endif + +#if CFG_TUH_HID_MOUSE +void tuh_hid_mouse_mounted_cb(uint8_t dev_addr) +{ + // application set-up + printf("\na Mouse device (address %d) is mounted\n", dev_addr); +} + +void tuh_hid_mouse_unmounted_cb(uint8_t dev_addr) +{ + // application tear-down + printf("\na Mouse device (address %d) is unmounted\n", dev_addr); +} + +// invoked ISR context +void tuh_hid_mouse_isr(uint8_t dev_addr, xfer_result_t event) +{ +} #endif //--------------------------------------------------------------------+ diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index 6c6540b66..b7a766796 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -39,9 +39,6 @@ #ifndef _TUSB_CONFIG_H_ #define _TUSB_CONFIG_H_ -#include "tusb_option.h" -#include "bsp/board.h" - #ifdef __cplusplus extern "C" { #endif @@ -85,8 +82,8 @@ #define CFG_TUH_HUB 1 // not tested #define CFG_TUH_CDC 1 -#define CFG_TUSB_HOST_HID_KEYBOARD 0 -#define CFG_TUSB_HOST_HID_MOUSE 0 +#define CFG_TUH_HID_KEYBOARD 1 +#define CFG_TUH_HID_MOUSE 1 #define CFG_TUSB_HOST_HID_GENERIC 0 // (not yet supported) #define CFG_TUH_MSC 1 diff --git a/examples/obsolete/host/src/keyboard_host_app.c b/examples/obsolete/host/src/keyboard_host_app.c index fd51548c3..77fa8e5d3 100644 --- a/examples/obsolete/host/src/keyboard_host_app.c +++ b/examples/obsolete/host/src/keyboard_host_app.c @@ -42,7 +42,7 @@ #include "keyboard_host_app.h" #include "app_os_prio.h" -#if CFG_TUSB_HOST_HID_KEYBOARD +#if CFG_TUH_HID_KEYBOARD //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF diff --git a/examples/obsolete/host/src/keyboard_host_app.h b/examples/obsolete/host/src/keyboard_host_app.h index ff20d75df..965cd45cc 100644 --- a/examples/obsolete/host/src/keyboard_host_app.h +++ b/examples/obsolete/host/src/keyboard_host_app.h @@ -59,7 +59,7 @@ extern "C" { #endif -#if CFG_TUSB_HOST_HID_KEYBOARD +#if CFG_TUH_HID_KEYBOARD void keyboard_host_app_init(void); void keyboard_host_app_task(void* param); diff --git a/examples/obsolete/host/src/main.c b/examples/obsolete/host/src/main.c index 320e1c8f5..5da98fb68 100644 --- a/examples/obsolete/host/src/main.c +++ b/examples/obsolete/host/src/main.c @@ -136,8 +136,8 @@ void print_greeting(void) puts("This HOST demo is configured to support:"); printf(" - RTOS = %s\n", rtos_name[CFG_TUSB_OS]); if (CFG_TUH_HUB ) puts(" - Hub (1 level only)"); - if (CFG_TUSB_HOST_HID_MOUSE ) puts(" - HID Mouse"); - if (CFG_TUSB_HOST_HID_KEYBOARD ) puts(" - HID Keyboard"); + if (CFG_TUH_HID_MOUSE ) puts(" - HID Mouse"); + if (CFG_TUH_HID_KEYBOARD ) puts(" - HID Keyboard"); if (CFG_TUH_MSC ) puts(" - Mass Storage"); if (CFG_TUH_CDC ) puts(" - Communication Device Class"); } diff --git a/examples/obsolete/host/src/mouse_host_app.c b/examples/obsolete/host/src/mouse_host_app.c index 819c2b290..79af898c7 100644 --- a/examples/obsolete/host/src/mouse_host_app.c +++ b/examples/obsolete/host/src/mouse_host_app.c @@ -42,7 +42,7 @@ #include "mouse_host_app.h" #include "app_os_prio.h" -#if CFG_TUSB_HOST_HID_MOUSE +#if CFG_TUH_HID_MOUSE //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF diff --git a/examples/obsolete/host/src/mouse_host_app.h b/examples/obsolete/host/src/mouse_host_app.h index c5e9977ae..823107a5e 100644 --- a/examples/obsolete/host/src/mouse_host_app.h +++ b/examples/obsolete/host/src/mouse_host_app.h @@ -62,7 +62,7 @@ extern "C" { #endif -#if CFG_TUSB_HOST_HID_MOUSE +#if CFG_TUH_HID_MOUSE void mouse_host_app_init(void); void mouse_host_app_task(void* param); diff --git a/examples/obsolete/host/src/tusb_config.h b/examples/obsolete/host/src/tusb_config.h index e555c8f35..7a7951f89 100644 --- a/examples/obsolete/host/src/tusb_config.h +++ b/examples/obsolete/host/src/tusb_config.h @@ -55,8 +55,8 @@ //------------- CLASS -------------// #define CFG_TUH_HUB 1 -#define CFG_TUSB_HOST_HID_KEYBOARD 1 -#define CFG_TUSB_HOST_HID_MOUSE 1 +#define CFG_TUH_HID_KEYBOARD 1 +#define CFG_TUH_HID_MOUSE 1 #define CFG_TUSB_HOST_HID_GENERIC 0 // (not yet supported) #define CFG_TUH_MSC 1 #define CFG_TUH_CDC 1 diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index 6aa0748df..14398aa67 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -54,15 +54,15 @@ //--------------------------------------------------------------------+ // HID Interface common functions //--------------------------------------------------------------------+ -static inline tusb_error_t hidh_interface_open(uint8_t dev_addr, uint8_t interface_number, tusb_desc_endpoint_t const *p_endpoint_desc, hidh_interface_info_t *p_hid) +static inline bool hidh_interface_open(uint8_t dev_addr, uint8_t interface_number, tusb_desc_endpoint_t const *p_endpoint_desc, hidh_interface_info_t *p_hid) { p_hid->pipe_hdl = hcd_pipe_open(dev_addr, p_endpoint_desc, TUSB_CLASS_HID); p_hid->report_size = p_endpoint_desc->wMaxPacketSize.size; // TODO get size from report descriptor p_hid->interface_number = interface_number; - TU_ASSERT (pipehandle_is_valid(p_hid->pipe_hdl), TUSB_ERROR_HCD_FAILED); + TU_ASSERT (pipehandle_is_valid(p_hid->pipe_hdl)); - return TUSB_ERROR_NONE; + return true; } static inline void hidh_interface_close(hidh_interface_info_t *p_hid) @@ -78,7 +78,7 @@ tusb_error_t hidh_interface_get_report(uint8_t dev_addr, void * report, hidh_int // TODO change to use is configured function TU_ASSERT (TUSB_DEVICE_STATE_CONFIGURED == tuh_device_get_state(dev_addr), TUSB_ERROR_DEVICE_NOT_READY); TU_VERIFY (report, TUSB_ERROR_INVALID_PARA); - TU_ASSSERT (!hcd_pipe_is_busy(p_hid->pipe_hdl), TUSB_ERROR_INTERFACE_IS_BUSY); + TU_ASSERT (!hcd_pipe_is_busy(p_hid->pipe_hdl), TUSB_ERROR_INTERFACE_IS_BUSY); TU_ASSERT_ERR( hcd_pipe_xfer(p_hid->pipe_hdl, report, p_hid->report_size, true) ) ; @@ -88,8 +88,9 @@ tusb_error_t hidh_interface_get_report(uint8_t dev_addr, void * report, hidh_int //--------------------------------------------------------------------+ // KEYBOARD //--------------------------------------------------------------------+ -#if CFG_TUSB_HOST_HID_KEYBOARD +#if CFG_TUH_HID_KEYBOARD +#if 0 #define EXPAND_KEYCODE_TO_ASCII(keycode, ascii, shift_modified) \ [0][keycode] = ascii,\ [1][keycode] = shift_modified,\ @@ -99,8 +100,9 @@ uint8_t const hid_keycode_to_ascii_tbl[2][128] = { HID_KEYCODE_TABLE(EXPAND_KEYCODE_TO_ASCII) }; +#endif -STATIC_VAR hidh_interface_info_t keyboardh_data[CFG_TUSB_HOST_DEVICE_MAX]; // does not have addr0, index = dev_address-1 +static hidh_interface_info_t keyboardh_data[CFG_TUSB_HOST_DEVICE_MAX]; // does not have addr0, index = dev_address-1 //------------- KEYBOARD PUBLIC API (parameter validation required) -------------// bool tuh_hid_keyboard_is_mounted(uint8_t dev_addr) @@ -124,7 +126,7 @@ bool tuh_hid_keyboard_is_busy(uint8_t dev_addr) //--------------------------------------------------------------------+ // MOUSE //--------------------------------------------------------------------+ -#if CFG_TUSB_HOST_HID_MOUSE +#if CFG_TUH_HID_MOUSE STATIC_VAR hidh_interface_info_t mouseh_data[CFG_TUSB_HOST_DEVICE_MAX]; // does not have addr0, index = dev_address-1 @@ -163,11 +165,11 @@ tusb_error_t tuh_hid_mouse_get_report(uint8_t dev_addr, void * report) //--------------------------------------------------------------------+ void hidh_init(void) { -#if CFG_TUSB_HOST_HID_KEYBOARD +#if CFG_TUH_HID_KEYBOARD tu_memclr(&keyboardh_data, sizeof(hidh_interface_info_t)*CFG_TUSB_HOST_DEVICE_MAX); #endif -#if CFG_TUSB_HOST_HID_MOUSE +#if CFG_TUH_HID_MOUSE tu_memclr(&mouseh_data, sizeof(hidh_interface_info_t)*CFG_TUSB_HOST_DEVICE_MAX); #endif @@ -180,9 +182,8 @@ void hidh_init(void) CFG_TUSB_MEM_SECTION uint8_t report_descriptor[256]; #endif -tusb_error_t hidh_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) +bool hidh_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) { - tusb_error_t error; uint8_t const *p_desc = (uint8_t const *) p_interface_desc; //------------- HID descriptor -------------// @@ -195,16 +196,15 @@ tusb_error_t hidh_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_ tusb_desc_endpoint_t const * p_endpoint_desc = (tusb_desc_endpoint_t const *) p_desc; TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint_desc->bDescriptorType, TUSB_ERROR_INVALID_PARA); - OSAL_SUBTASK_BEGIN - //------------- SET IDLE (0) request -------------// - STASK_INVOKE( - usbh_control_xfer_subtask( dev_addr, bm_request_type(TUSB_DIR_OUT, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RCPT_INTERFACE), - HID_REQ_CONTROL_SET_IDLE, 0, p_interface_desc->bInterfaceNumber, - 0, NULL ), - error - ); - (void) error; // skip if set idle is failed + tusb_control_request_t request = { + .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_INTERFACE, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_OUT }, + .bRequest = HID_REQ_CONTROL_SET_IDLE, + .wValue = 0, // idle_rate = 0 + .wIndex = p_interface_desc->bInterfaceNumber, + .wLength = 0 + }; + TU_ASSERT( usbh_control_xfer( dev_addr, &request, NULL ) ); #if 0 //------------- Get Report Descriptor TODO HID parser -------------// @@ -222,40 +222,42 @@ tusb_error_t hidh_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_ if ( HID_SUBCLASS_BOOT == p_interface_desc->bInterfaceSubClass ) { - #if CFG_TUSB_HOST_HID_KEYBOARD + #if CFG_TUH_HID_KEYBOARD if ( HID_PROTOCOL_KEYBOARD == p_interface_desc->bInterfaceProtocol) { - STASK_ASSERT_ERR ( hidh_interface_open(dev_addr, p_interface_desc->bInterfaceNumber, p_endpoint_desc, &keyboardh_data[dev_addr-1]) ); + TU_ASSERT( hidh_interface_open(dev_addr, p_interface_desc->bInterfaceNumber, p_endpoint_desc, &keyboardh_data[dev_addr-1]) ); tuh_hid_keyboard_mounted_cb(dev_addr); } else #endif - #if CFG_TUSB_HOST_HID_MOUSE + #if CFG_TUH_HID_MOUSE if ( HID_PROTOCOL_MOUSE == p_interface_desc->bInterfaceProtocol) { - STASK_ASSERT_ERR ( hidh_interface_open(dev_addr, p_interface_desc->bInterfaceNumber, p_endpoint_desc, &mouseh_data[dev_addr-1]) ); + TU_ASSERT ( hidh_interface_open(dev_addr, p_interface_desc->bInterfaceNumber, p_endpoint_desc, &mouseh_data[dev_addr-1]) ); tuh_hid_mouse_mounted_cb(dev_addr); } else #endif { - STASK_RETURN(TUSB_ERROR_HIDH_NOT_SUPPORTED_PROTOCOL); // exit & restart task + // TUSB_ERROR_HIDH_NOT_SUPPORTED_PROTOCOL + return false; } }else { - STASK_RETURN(TUSB_ERROR_HIDH_NOT_SUPPORTED_SUBCLASS); // exit & restart task + // TUSB_ERROR_HIDH_NOT_SUPPORTED_SUBCLASS + return false; } *p_length = sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + sizeof(tusb_desc_endpoint_t); - OSAL_SUBTASK_END + return true; } void hidh_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes) { (void) xferred_bytes; // TODO may need to use this para later -#if CFG_TUSB_HOST_HID_KEYBOARD +#if CFG_TUH_HID_KEYBOARD if ( pipehandle_is_equal(pipe_hdl, keyboardh_data[pipe_hdl.dev_addr-1].pipe_hdl) ) { tuh_hid_keyboard_isr(pipe_hdl.dev_addr, event); @@ -263,7 +265,7 @@ void hidh_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_byte } #endif -#if CFG_TUSB_HOST_HID_MOUSE +#if CFG_TUH_HID_MOUSE if ( pipehandle_is_equal(pipe_hdl, mouseh_data[pipe_hdl.dev_addr-1].pipe_hdl) ) { tuh_hid_mouse_isr(pipe_hdl.dev_addr, event); @@ -278,7 +280,7 @@ void hidh_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_byte void hidh_close(uint8_t dev_addr) { -#if CFG_TUSB_HOST_HID_KEYBOARD +#if CFG_TUH_HID_KEYBOARD if ( pipehandle_is_valid( keyboardh_data[dev_addr-1].pipe_hdl ) ) { hidh_interface_close(&keyboardh_data[dev_addr-1]); @@ -286,7 +288,7 @@ void hidh_close(uint8_t dev_addr) } #endif -#if CFG_TUSB_HOST_HID_MOUSE +#if CFG_TUH_HID_MOUSE if( pipehandle_is_valid( mouseh_data[dev_addr-1].pipe_hdl ) ) { hidh_interface_close(&mouseh_data[dev_addr-1]); diff --git a/src/class/hid/hid_host.h b/src/class/hid/hid_host.h index cb0230e8a..7336f5ada 100644 --- a/src/class/hid/hid_host.h +++ b/src/class/hid/hid_host.h @@ -215,10 +215,10 @@ typedef struct { uint8_t interface_number; }hidh_interface_info_t; -void hidh_init(void); -tusb_error_t hidh_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; -void hidh_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); -void hidh_close(uint8_t dev_addr); +void hidh_init(void); +bool hidh_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; +void hidh_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); +void hidh_close(uint8_t dev_addr); #endif diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index bb4d117e6..0c52011df 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -295,8 +295,6 @@ void msch_init(void) bool msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) { - tusb_error_t error; - if (! ( MSC_SUBCLASS_SCSI == p_interface_desc->bInterfaceSubClass && MSC_PROTOCOL_BOT == p_interface_desc->bInterfaceProtocol ) ) { @@ -393,6 +391,8 @@ bool msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interfac msch_data[dev_addr-1].is_initialized = true; tuh_msc_mounted_cb(dev_addr); + + return true; } void msch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes) diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index c9947a19c..84839b697 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -48,6 +48,9 @@ #include "../usbh_hcd.h" #include "ehci.h" +// TODO remove +#include "chip.h" + //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ diff --git a/src/host/hcd.h b/src/host/hcd.h index 3e3b966d0..104c78a36 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -82,7 +82,7 @@ typedef struct #if MODE_HOST_SUPPORTED // Max number of endpoints per device enum { - HCD_MAX_ENDPOINT = CFG_TUH_HUB + CFG_TUSB_HOST_HID_KEYBOARD + CFG_TUSB_HOST_HID_MOUSE + CFG_TUSB_HOST_HID_GENERIC + + HCD_MAX_ENDPOINT = CFG_TUH_HUB + CFG_TUH_HID_KEYBOARD + CFG_TUH_HID_MOUSE + CFG_TUSB_HOST_HID_GENERIC + CFG_TUH_MSC*2 + CFG_TUH_CDC*3, HCD_MAX_XFER = HCD_MAX_ENDPOINT*2, diff --git a/src/host/hub.c b/src/host/hub.c index 82ad2ba17..28814ebd7 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -105,7 +105,6 @@ bool hub_port_clear_feature_subtask(uint8_t hub_addr, uint8_t hub_port, uint8_t bool hub_port_reset_subtask(uint8_t hub_addr, uint8_t hub_port) { enum { RESET_DELAY = 200 }; // USB specs say only 50ms but many devices require much longer - tusb_error_t error; //------------- Set Port Reset -------------// tusb_control_request_t request = { diff --git a/src/tusb_option.h b/src/tusb_option.h index 07b39b5be..ad5025235 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -218,7 +218,7 @@ #endif //------------- HID CLASS -------------// - #define HOST_CLASS_HID ( CFG_TUSB_HOST_HID_KEYBOARD + CFG_TUSB_HOST_HID_MOUSE + CFG_TUSB_HOST_HID_GENERIC ) + #define HOST_CLASS_HID ( CFG_TUH_HID_KEYBOARD + CFG_TUH_HID_MOUSE + CFG_TUSB_HOST_HID_GENERIC ) // #if HOST_CLASS_HID // #define HOST_HCD_XFER_INTERRUPT // #endif diff --git a/tests/support/tusb_config.h b/tests/support/tusb_config.h index 3aacdabdc..4ff3965e1 100644 --- a/tests/support/tusb_config.h +++ b/tests/support/tusb_config.h @@ -56,8 +56,8 @@ //------------- CLASS -------------// #define CFG_TUH_HUB 0 -#define CFG_TUSB_HOST_HID_KEYBOARD 1 -#define CFG_TUSB_HOST_HID_MOUSE 1 +#define CFG_TUH_HID_KEYBOARD 1 +#define CFG_TUH_HID_MOUSE 1 #define CFG_TUH_MSC 1 #define CFG_TUSB_HOST_HID_GENERIC 0 #define CFG_TUH_CDC 1 -- cgit v1.3.1 From 13d08cd63681c20d30e07e8fdcb4ac8d863453a5 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 7 Dec 2018 17:31:35 +0700 Subject: adding new hcd api, tested working with control xfer. - hcd_edpt_open - hcd_edpt_xfer - hcd_edpt_xfer --- src/host/ehci/ehci.c | 140 ++++++++++++++++++++++++++++++++++++++------------- src/host/hcd.h | 9 ++++ src/host/usbh.c | 31 ++++++++++-- 3 files changed, 140 insertions(+), 40 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 84839b697..f941c0b4c 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -281,63 +281,131 @@ static tusb_error_t hcd_controller_stop(uint8_t hostid) //--------------------------------------------------------------------+ // CONTROL PIPE API //--------------------------------------------------------------------+ -tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) +bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* ep_desc) { - ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); + // FIXME control only for now + (void) rhport; + hcd_pipe_control_open(dev_addr, ep_desc->wMaxPacketSize.size); - qhd_init(p_qhd, dev_addr, max_packet_size, 0, TUSB_XFER_CONTROL, 1); // TODO binterval of control is ignored + return true; +} - if (dev_addr != 0) - { - //------------- insert to async list -------------// - list_insert( (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].core_id), - (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD); - } +bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) +{ + // FIXME control only for now - return TUSB_ERROR_NONE; + hcd_pipe_control_close(dev_addr); + + return true; } -bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) +bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) { - ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); + uint8_t const epnum = edpt_number(ep_addr); + uint8_t const dir = edpt_dir(ep_addr); - ehci_qtd_t *p_setup = get_control_qtds(dev_addr); - ehci_qtd_t *p_data = p_setup + 1; - ehci_qtd_t *p_status = p_setup + 2; + // FIXME control only for now + if ( epnum == 0 ) + { + ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); + ehci_qtd_t *p_data = get_control_qtds(dev_addr); - //------------- SETUP Phase -------------// - qtd_init(p_setup, (uint32_t) p_request, 8); - p_setup->pid = EHCI_PID_SETUP; - p_setup->next.address = (uint32_t) p_data; + qtd_init(p_data, (uint32_t) buffer, buflen); - //------------- DATA Phase -------------// - if (p_request->wLength > 0) - { - qtd_init(p_data, (uint32_t) data, p_request->wLength); + // first first data toggle is always 1 (data & setup stage) p_data->data_toggle = 1; - p_data->pid = p_request->bmRequestType_bit.direction ? EHCI_PID_IN : EHCI_PID_OUT; - }else - { - p_data = p_setup; + p_data->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT; + p_data->int_on_complete = 1; + p_data->next.terminate = 1; + + // sw region + p_qhd->p_qtd_list_head = p_data; + p_qhd->p_qtd_list_tail = p_data; + + // attach TD + p_qhd->qtd_overlay.next.address = (uint32_t) p_data; } - p_data->next.address = (uint32_t) p_status; - //------------- STATUS Phase -------------// - qtd_init(p_status, 0, 0); // zero-length data - p_status->int_on_complete = 1; - p_status->data_toggle = 1; - p_status->pid = p_request->bmRequestType_bit.direction ? EHCI_PID_OUT : EHCI_PID_IN; // reverse direction of data phase - p_status->next.terminate = 1; + return true; +} + +bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) +{ + ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); + ehci_qtd_t *p_setup = get_control_qtds(dev_addr); + + qtd_init(p_setup, (uint32_t) setup_packet, 8); + p_setup->pid = EHCI_PID_SETUP; + p_setup->int_on_complete = 1; + p_setup->next.terminate = 1; - //------------- Attach TDs list to Control Endpoint -------------// + // sw region p_qhd->p_qtd_list_head = p_setup; - p_qhd->p_qtd_list_tail = p_status; + p_qhd->p_qtd_list_tail = p_setup; + // attach TD p_qhd->qtd_overlay.next.address = (uint32_t) p_setup; return true; } +tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) +{ + ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); + + qhd_init(p_qhd, dev_addr, max_packet_size, 0, TUSB_XFER_CONTROL, 1); // TODO binterval of control is ignored + + if (dev_addr != 0) + { + //------------- insert to async list -------------// + list_insert( (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].core_id), + (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD); + } + + return TUSB_ERROR_NONE; +} + +//bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) +//{ +// ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); +// +// ehci_qtd_t *p_setup = get_control_qtds(dev_addr); +// ehci_qtd_t *p_data = p_setup + 1; +// ehci_qtd_t *p_status = p_setup + 2; +// +// //------------- SETUP Phase -------------// +// qtd_init(p_setup, (uint32_t) p_request, 8); +// p_setup->pid = EHCI_PID_SETUP; +// p_setup->next.address = (uint32_t) p_data; +// +// //------------- DATA Phase -------------// +// if (p_request->wLength > 0) +// { +// qtd_init(p_data, (uint32_t) data, p_request->wLength); +// p_data->data_toggle = 1; +// p_data->pid = p_request->bmRequestType_bit.direction ? EHCI_PID_IN : EHCI_PID_OUT; +// }else +// { +// p_data = p_setup; +// } +// p_data->next.address = (uint32_t) p_status; +// +// //------------- STATUS Phase -------------// +// qtd_init(p_status, 0, 0); // zero-length data +// p_status->int_on_complete = 1; +// p_status->data_toggle = 1; +// p_status->pid = p_request->bmRequestType_bit.direction ? EHCI_PID_OUT : EHCI_PID_IN; // reverse direction of data phase +// p_status->next.terminate = 1; +// +// //------------- Attach TDs list to Control Endpoint -------------// +// p_qhd->p_qtd_list_head = p_setup; +// p_qhd->p_qtd_list_tail = p_status; +// +// p_qhd->qtd_overlay.next.address = (uint32_t) p_setup; +// +// return true; +//} + tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) { //------------- TODO pipe handle validate -------------// diff --git a/src/host/hcd.h b/src/host/hcd.h index 104c78a36..94ee8d0fa 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -123,6 +123,15 @@ void hcd_int_disable(uint8_t rhport); //--------------------------------------------------------------------+ void hcd_event_handler(hcd_event_t const* event, bool in_isr); +//--------------------------------------------------------------------+ +// Endpoints API +//--------------------------------------------------------------------+ +bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* ep_desc); +bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr); +bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen); + +bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]); + //--------------------------------------------------------------------+ // PIPE API //--------------------------------------------------------------------+ diff --git a/src/host/usbh.c b/src/host/usbh.c index 6c3194fdd..69ac042e6 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -193,14 +193,27 @@ bool usbh_init(void) bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8_t* data) { usbh_device_t* dev = &_usbh_devices[dev_addr]; + const uint8_t rhport = dev->core_id; TU_ASSERT(osal_mutex_lock(dev->control.mutex_hdl, OSAL_TIMEOUT_NORMAL)); dev->control.request = *request; dev->control.pipe_status = 0; - TU_ASSERT(hcd_pipe_control_xfer(dev_addr, &dev->control.request, data)); - TU_ASSERT(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL)); + // Setup Stage + hcd_setup_send(rhport, dev_addr, (uint8_t*) &dev->control.request); + TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL)); + + // Data stage : first data toggle is always 1 + if ( request->wLength ) + { + hcd_edpt_xfer(rhport, dev_addr, edpt_addr(0, request->bmRequestType_bit.direction), data, request->wLength); + TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL)); + } + + // Status : data toggle is always 1 + hcd_edpt_xfer(rhport, dev_addr, edpt_addr(0, 1-request->bmRequestType_bit.direction), NULL, 0); + TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL)); osal_mutex_unlock(dev->control.mutex_hdl); @@ -219,14 +232,24 @@ tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) osal_semaphore_reset( _usbh_devices[dev_addr].control.sem_hdl ); //osal_mutex_reset( usbh_devices[dev_addr].control.mutex_hdl ); - TU_ASSERT_ERR( hcd_pipe_control_open(dev_addr, max_packet_size) ); + tusb_desc_endpoint_t ep0_desc = + { + .bLength = sizeof(tusb_desc_endpoint_t), + .bDescriptorType = TUSB_DESC_ENDPOINT, + .bEndpointAddress = 0, + .bmAttributes = { .xfer = TUSB_XFER_CONTROL }, + .wMaxPacketSize = { .size = max_packet_size }, + .bInterval = 0 + }; + + hcd_edpt_open(_usbh_devices[dev_addr].core_id, dev_addr, &ep0_desc); return TUSB_ERROR_NONE; } static inline tusb_error_t usbh_pipe_control_close(uint8_t dev_addr) { - TU_ASSERT_ERR( hcd_pipe_control_close(dev_addr) ); + hcd_edpt_close(_usbh_devices[dev_addr].core_id, dev_addr, 0); return TUSB_ERROR_NONE; } -- cgit v1.3.1 From 2aa21a14e6f44256d5debe263e4b858ed3342dac Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 7 Dec 2018 18:49:26 +0700 Subject: lpc17 ohci failed to execute control transfer !! --- .../cdc_msc_hid/ses/lpc175x_6x/LPC1700_Startup.s | 109 + .../cdc_msc_hid/ses/lpc175x_6x/LPC1700_Target.js | 19 + .../ses/lpc175x_6x/LPC1769_MemoryMap.xml | 6 + .../ses/lpc175x_6x/LPC176x5x_Registers.xml | 11058 +++++++++++++++++++ .../cdc_msc_hid/ses/lpc175x_6x/LPC176x5x_Vectors.s | 418 + .../cdc_msc_hid/ses/lpc175x_6x/flash_placement.xml | 37 + .../ses/lpc175x_6x/lpc175x_6x.emProject | 112 + .../host/cdc_msc_hid/ses/lpc175x_6x/thumb_crt0.s | 415 + examples/host/cdc_msc_hid/src/main.c | 4 + examples/host/cdc_msc_hid/src/tusb_config.h | 2 +- src/host/hcd.h | 6 +- src/host/ohci/ohci.c | 33 +- src/host/usbh.c | 35 +- src/portable/nxp/lpc17_40/hal_lpc17_40.c | 19 +- 14 files changed, 12249 insertions(+), 24 deletions(-) create mode 100644 examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC1700_Startup.s create mode 100644 examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC1700_Target.js create mode 100644 examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC1769_MemoryMap.xml create mode 100644 examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC176x5x_Registers.xml create mode 100644 examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC176x5x_Vectors.s create mode 100644 examples/host/cdc_msc_hid/ses/lpc175x_6x/flash_placement.xml create mode 100644 examples/host/cdc_msc_hid/ses/lpc175x_6x/lpc175x_6x.emProject create mode 100644 examples/host/cdc_msc_hid/ses/lpc175x_6x/thumb_crt0.s (limited to 'src/host') diff --git a/examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC1700_Startup.s b/examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC1700_Startup.s new file mode 100644 index 000000000..f039ad934 --- /dev/null +++ b/examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC1700_Startup.s @@ -0,0 +1,109 @@ +/***************************************************************************** + * SEGGER Microcontroller GmbH & Co. KG * + * Solutions for real time microcontroller applications * + ***************************************************************************** + * * + * (c) 2015 SEGGER Microcontroller GmbH & Co. KG * + * * + * Internet: www.segger.com Support: support@segger.com * + * * + *****************************************************************************/ + +/***************************************************************************** + * Preprocessor Definitions * + * ------------------------ * + * NO_STACK_INIT * + * * + * If defined, the stack pointer will not be initialised. * + * * + * NO_SYSTEM_INIT * + * * + * If defined, the SystemInit() function will not be called. By default * + * SystemInit() is called after reset to enable the clocks and memories to * + * be initialised prior to any C startup initialisation. * + * * + * NO_VTOR_CONFIG * + * * + * If defined, the vector table offset register will not be configured. * + * * + * MEMORY_INIT * + * * + * If defined, the MemoryInit() function will be called. By default * + * MemoryInit() is called after SystemInit() to enable an external memory * + * controller. * + * * + * STACK_INIT_VAL * + * * + * If defined, specifies the initial stack pointer value. If undefined, * + * the stack pointer will be initialised to point to the end of the * + * RAM segment. * + * * + * VECTORS_IN_RAM * + * * + * If defined, the exception vectors will be copied from Flash to RAM. * + * * + *****************************************************************************/ + + .syntax unified + + .global Reset_Handler + .extern _vectors + + .section .init, "ax" + .thumb_func + + .equ VTOR_REG, 0xE000ED08 + +#ifndef STACK_INIT_VAL +#define STACK_INIT_VAL __RAM_segment_end__ +#endif + +Reset_Handler: +#ifndef NO_STACK_INIT + /* Initialise main stack */ + ldr r0, =STACK_INIT_VAL + bic r0, #0x7 + mov sp, r0 +#endif +#ifndef NO_SYSTEM_INIT + /* Initialise system */ + ldr r0, =SystemInit + blx r0 +#endif + +#ifdef MEMORY_INIT + ldr r0, =MemoryInit + blx r0 +#endif + +#ifdef VECTORS_IN_RAM + /* Copy exception vectors into RAM */ + ldr r0, =__vectors_start__ + ldr r1, =__vectors_end__ + ldr r2, =__vectors_ram_start__ +1: + cmp r0, r1 + beq 2f + ldr r3, [r0] + str r3, [r2] + adds r0, r0, #4 + adds r2, r2, #4 + b 1b +2: +#endif + +#ifndef NO_VTOR_CONFIG + /* Configure vector table offset register */ + ldr r0, =VTOR_REG +#ifdef VECTORS_IN_RAM + ldr r1, =_vectors_ram +#else + ldr r1, =_vectors +#endif + str r1, [r0] +#endif + + /* Jump to program start */ + b _start + + diff --git a/examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC1700_Target.js b/examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC1700_Target.js new file mode 100644 index 000000000..7f945a3d2 --- /dev/null +++ b/examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC1700_Target.js @@ -0,0 +1,19 @@ +/***************************************************************************** + * SEGGER Microcontroller GmbH & Co. KG * + * Solutions for real time microcontroller applications * + ***************************************************************************** + * * + * (c) 2015 SEGGER Microcontroller GmbH & Co. KG * + * * + * Internet: www.segger.com Support: support@segger.com * + * * + *****************************************************************************/ + +function Reset() { + TargetInterface.resetAndStop(); +} + +function EnableTrace(traceInterfaceType) { + // TODO: Enable trace +} + diff --git a/examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC1769_MemoryMap.xml b/examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC1769_MemoryMap.xml new file mode 100644 index 000000000..d9c07aea3 --- /dev/null +++ b/examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC1769_MemoryMap.xml @@ -0,0 +1,6 @@ + + + + + + diff --git a/examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC176x5x_Registers.xml b/examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC176x5x_Registers.xml new file mode 100644 index 000000000..fd38966b8 --- /dev/null +++ b/examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC176x5x_Registers.xml @@ -0,0 +1,11058 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC176x5x_Vectors.s b/examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC176x5x_Vectors.s new file mode 100644 index 000000000..c5fae1310 --- /dev/null +++ b/examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC176x5x_Vectors.s @@ -0,0 +1,418 @@ +/***************************************************************************** + * SEGGER Microcontroller GmbH & Co. KG * + * Solutions for real time microcontroller applications * + ***************************************************************************** + * * + * (c) 2015 SEGGER Microcontroller GmbH & Co. KG * + * * + * Internet: www.segger.com Support: support@segger.com * + * * + *****************************************************************************/ + +/***************************************************************************** + * Preprocessor Definitions * + * ------------------------ * + * VECTORS_IN_RAM * + * * + * If defined, an area of RAM will large enough to store the vector table * + * will be reserved. * + * * + *****************************************************************************/ + + .syntax unified + .code 16 + + .section .init, "ax" + .align 0 + +/***************************************************************************** + * Default Exception Handlers * + *****************************************************************************/ + + .thumb_func + .weak NMI_Handler +NMI_Handler: + b . + + .thumb_func + .weak HardFault_Handler +HardFault_Handler: + b . + + .thumb_func + .weak SVC_Handler +SVC_Handler: + b . + + .thumb_func + .weak PendSV_Handler +PendSV_Handler: + b . + + .thumb_func + .weak SysTick_Handler +SysTick_Handler: + b . + + .thumb_func +Dummy_Handler: + b . + +#if defined(__OPTIMIZATION_SMALL) + + .weak WDT_IRQHandler + .thumb_set WDT_IRQHandler,Dummy_Handler + + .weak TIMER0_IRQHandler + .thumb_set TIMER0_IRQHandler,Dummy_Handler + + .weak TIMER1_IRQHandler + .thumb_set TIMER1_IRQHandler,Dummy_Handler + + .weak TIMER2_IRQHandler + .thumb_set TIMER2_IRQHandler,Dummy_Handler + + .weak TIMER3_IRQHandler + .thumb_set TIMER3_IRQHandler,Dummy_Handler + + .weak UART0_IRQHandler + .thumb_set UART0_IRQHandler,Dummy_Handler + + .weak UART1_IRQHandler + .thumb_set UART1_IRQHandler,Dummy_Handler + + .weak UART2_IRQHandler + .thumb_set UART2_IRQHandler,Dummy_Handler + + .weak UART3_IRQHandler + .thumb_set UART3_IRQHandler,Dummy_Handler + + .weak PWM1_IRQHandler + .thumb_set PWM1_IRQHandler,Dummy_Handler + + .weak I2C0_IRQHandler + .thumb_set I2C0_IRQHandler,Dummy_Handler + + .weak I2C1_IRQHandler + .thumb_set I2C1_IRQHandler,Dummy_Handler + + .weak I2C2_IRQHandler + .thumb_set I2C2_IRQHandler,Dummy_Handler + + .weak SPI_IRQHandler + .thumb_set SPI_IRQHandler,Dummy_Handler + + .weak SSP0_IRQHandler + .thumb_set SSP0_IRQHandler,Dummy_Handler + + .weak SSP1_IRQHandler + .thumb_set SSP1_IRQHandler,Dummy_Handler + + .weak PLL0_IRQHandler + .thumb_set PLL0_IRQHandler,Dummy_Handler + + .weak RTC_IRQHandler + .thumb_set RTC_IRQHandler,Dummy_Handler + + .weak EINT0_IRQHandler + .thumb_set EINT0_IRQHandler,Dummy_Handler + + .weak EINT1_IRQHandler + .thumb_set EINT1_IRQHandler,Dummy_Handler + + .weak EINT2_IRQHandler + .thumb_set EINT2_IRQHandler,Dummy_Handler + + .weak EINT3_IRQHandler + .thumb_set EINT3_IRQHandler,Dummy_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Dummy_Handler + + .weak BOD_IRQHandler + .thumb_set BOD_IRQHandler,Dummy_Handler + + .weak USB_IRQHandler + .thumb_set USB_IRQHandler,Dummy_Handler + + .weak CAN_IRQHandler + .thumb_set CAN_IRQHandler,Dummy_Handler + + .weak DMA_IRQHandler + .thumb_set DMA_IRQHandler,Dummy_Handler + + .weak I2S_IRQHandler + .thumb_set I2S_IRQHandler,Dummy_Handler + + .weak ENET_IRQHandler + .thumb_set ENET_IRQHandler,Dummy_Handler + + .weak RIT_IRQHandler + .thumb_set RIT_IRQHandler,Dummy_Handler + + .weak MCPWM_IRQHandler + .thumb_set MCPWM_IRQHandler,Dummy_Handler + + .weak QEI_IRQHandler + .thumb_set QEI_IRQHandler,Dummy_Handler + + .weak PLL1_IRQHandler + .thumb_set PLL1_IRQHandler,Dummy_Handler + + .weak USBActivity_IRQHandler + .thumb_set USBActivity_IRQHandler,Dummy_Handler + + .weak CANActivity_IRQHandler + .thumb_set CANActivity_IRQHandler,Dummy_Handler + +#else + + .thumb_func + .weak WDT_IRQHandler +WDT_IRQHandler: + b . + + .thumb_func + .weak TIMER0_IRQHandler +TIMER0_IRQHandler: + b . + + .thumb_func + .weak TIMER1_IRQHandler +TIMER1_IRQHandler: + b . + + .thumb_func + .weak TIMER2_IRQHandler +TIMER2_IRQHandler: + b . + + .thumb_func + .weak TIMER3_IRQHandler +TIMER3_IRQHandler: + b . + + .thumb_func + .weak UART0_IRQHandler +UART0_IRQHandler: + b . + + .thumb_func + .weak UART1_IRQHandler +UART1_IRQHandler: + b . + + .thumb_func + .weak UART2_IRQHandler +UART2_IRQHandler: + b . + + .thumb_func + .weak UART3_IRQHandler +UART3_IRQHandler: + b . + + .thumb_func + .weak PWM1_IRQHandler +PWM1_IRQHandler: + b . + + .thumb_func + .weak I2C0_IRQHandler +I2C0_IRQHandler: + b . + + .thumb_func + .weak I2C1_IRQHandler +I2C1_IRQHandler: + b . + + .thumb_func + .weak I2C2_IRQHandler +I2C2_IRQHandler: + b . + + .thumb_func + .weak SPI_IRQHandler +SPI_IRQHandler: + b . + + .thumb_func + .weak SSP0_IRQHandler +SSP0_IRQHandler: + b . + + .thumb_func + .weak SSP1_IRQHandler +SSP1_IRQHandler: + b . + + .thumb_func + .weak PLL0_IRQHandler +PLL0_IRQHandler: + b . + + .thumb_func + .weak RTC_IRQHandler +RTC_IRQHandler: + b . + + .thumb_func + .weak EINT0_IRQHandler +EINT0_IRQHandler: + b . + + .thumb_func + .weak EINT1_IRQHandler +EINT1_IRQHandler: + b . + + .thumb_func + .weak EINT2_IRQHandler +EINT2_IRQHandler: + b . + + .thumb_func + .weak EINT3_IRQHandler +EINT3_IRQHandler: + b . + + .thumb_func + .weak ADC_IRQHandler +ADC_IRQHandler: + b . + + .thumb_func + .weak BOD_IRQHandler +BOD_IRQHandler: + b . + + .thumb_func + .weak USB_IRQHandler +USB_IRQHandler: + b . + + .thumb_func + .weak CAN_IRQHandler +CAN_IRQHandler: + b . + + .thumb_func + .weak DMA_IRQHandler +DMA_IRQHandler: + b . + + .thumb_func + .weak I2S_IRQHandler +I2S_IRQHandler: + b . + + .thumb_func + .weak ENET_IRQHandler +ENET_IRQHandler: + b . + + .thumb_func + .weak RIT_IRQHandler +RIT_IRQHandler: + b . + + .thumb_func + .weak MCPWM_IRQHandler +MCPWM_IRQHandler: + b . + + .thumb_func + .weak QEI_IRQHandler +QEI_IRQHandler: + b . + + .thumb_func + .weak PLL1_IRQHandler +PLL1_IRQHandler: + b . + + .thumb_func + .weak USBActivity_IRQHandler +USBActivity_IRQHandler: + b . + + .thumb_func + .weak CANActivity_IRQHandler +CANActivity_IRQHandler: + b . + +#endif + +/***************************************************************************** + * Vector Table * + *****************************************************************************/ + + .section .vectors, "ax" + .align 0 + .global _vectors + .extern __stack_end__ + .extern Reset_Handler + +_vectors: + .word __stack_end__ + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SVC_Handler + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word PendSV_Handler + .word SysTick_Handler + .word WDT_IRQHandler + .word TIMER0_IRQHandler + .word TIMER1_IRQHandler + .word TIMER2_IRQHandler + .word TIMER3_IRQHandler + .word UART0_IRQHandler + .word UART1_IRQHandler + .word UART2_IRQHandler + .word UART3_IRQHandler + .word PWM1_IRQHandler + .word I2C0_IRQHandler + .word I2C1_IRQHandler + .word I2C2_IRQHandler + .word SPI_IRQHandler + .word SSP0_IRQHandler + .word SSP1_IRQHandler + .word PLL0_IRQHandler + .word RTC_IRQHandler + .word EINT0_IRQHandler + .word EINT1_IRQHandler + .word EINT2_IRQHandler + .word EINT3_IRQHandler + .word ADC_IRQHandler + .word BOD_IRQHandler + .word USB_IRQHandler + .word CAN_IRQHandler + .word DMA_IRQHandler + .word I2S_IRQHandler + .word ENET_IRQHandler + .word RIT_IRQHandler + .word MCPWM_IRQHandler + .word QEI_IRQHandler + .word PLL1_IRQHandler + .word USBActivity_IRQHandler + .word CANActivity_IRQHandler +_vectors_end: + +#ifdef VECTORS_IN_RAM + .section .vectors_ram, "ax" + .align 0 + .global _vectors_ram + +_vectors_ram: + .space _vectors_end - _vectors, 0 +#endif diff --git a/examples/host/cdc_msc_hid/ses/lpc175x_6x/flash_placement.xml b/examples/host/cdc_msc_hid/ses/lpc175x_6x/flash_placement.xml new file mode 100644 index 000000000..79bedc537 --- /dev/null +++ b/examples/host/cdc_msc_hid/ses/lpc175x_6x/flash_placement.xml @@ -0,0 +1,37 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/host/cdc_msc_hid/ses/lpc175x_6x/lpc175x_6x.emProject b/examples/host/cdc_msc_hid/ses/lpc175x_6x/lpc175x_6x.emProject new file mode 100644 index 000000000..ecd2dc716 --- /dev/null +++ b/examples/host/cdc_msc_hid/ses/lpc175x_6x/lpc175x_6x.emProject @@ -0,0 +1,112 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/host/cdc_msc_hid/ses/lpc175x_6x/thumb_crt0.s b/examples/host/cdc_msc_hid/ses/lpc175x_6x/thumb_crt0.s new file mode 100644 index 000000000..17f88e0ca --- /dev/null +++ b/examples/host/cdc_msc_hid/ses/lpc175x_6x/thumb_crt0.s @@ -0,0 +1,415 @@ +// ********************************************************************** +// * SEGGER Microcontroller GmbH * +// * The Embedded Experts * +// ********************************************************************** +// * * +// * (c) 2014 - 2018 SEGGER Microcontroller GmbH * +// * (c) 2001 - 2018 Rowley Associates Limited * +// * * +// * www.segger.com Support: support@segger.com * +// * * +// ********************************************************************** +// * * +// * All rights reserved. * +// * * +// * Redistribution and use in source and binary forms, with or * +// * without modification, are permitted provided that the following * +// * conditions are met: * +// * * +// * - Redistributions of source code must retain the above copyright * +// * notice, this list of conditions and the following disclaimer. * +// * * +// * - Neither the name of SEGGER Microcontroller GmbH * +// * nor the names of its contributors may be used to endorse or * +// * promote products derived from this software without specific * +// * prior written permission. * +// * * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +// * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +// * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +// * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +// * DISCLAIMED. * +// * IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR * +// * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +// * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +// * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +// * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +// * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +// * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +// * DAMAGE. * +// * * +// ********************************************************************** +// +// +// Preprocessor Definitions +// ------------------------ +// APP_ENTRY_POINT +// +// Defines the application entry point function, if undefined this setting +// defaults to "main". +// +// INITIALIZE_STACK +// +// If defined, the contents of the stack will be initialized to a the +// value 0xCC. +// +// INITIALIZE_SECONDARY_SECTIONS +// +// If defined, the .data2, .text2, .rodata2 and .bss2 sections will be initialized. +// +// INITIALIZE_TCM_SECTIONS +// +// If defined, the .data_tcm, .text_tcm, .rodata_tcm and .bss_tcm sections +// will be initialized. +// +// INITIALIZE_USER_SECTIONS +// +// If defined, the function InitializeUserMemorySections will be called prior +// to entering main in order to allow the user to initialize any user defined +// memory sections. +// +// FULL_LIBRARY +// +// If defined then +// - argc, argv are setup by the debug_getargs. +// - the exit symbol is defined and executes on return from main. +// - the exit symbol calls destructors, atexit functions and then debug_exit. +// +// If not defined then +// - argc and argv are zero. +// - the exit symbol is defined, executes on return from main and loops +// + +#ifndef APP_ENTRY_POINT +#define APP_ENTRY_POINT main +#endif + +#ifndef ARGSSPACE +#define ARGSSPACE 128 +#endif + .syntax unified + + .global _start + .extern APP_ENTRY_POINT + .global exit + .weak exit + +#ifdef INITIALIZE_USER_SECTIONS + .extern InitializeUserMemorySections +#endif + + .section .init, "ax" + .code 16 + .balign 2 + .thumb_func + +_start: + /* Set up main stack if size > 0 */ + ldr r1, =__stack_end__ + ldr r0, =__stack_start__ + subs r2, r1, r0 + beq 1f +#ifdef __ARM_EABI__ + movs r2, #0x7 + bics r1, r2 +#endif + mov sp, r1 +#ifdef INITIALIZE_STACK + movs r2, #0xCC + ldr r0, =__stack_start__ + bl memory_set +#endif +1: + + /* Set up process stack if size > 0 */ + ldr r1, =__stack_process_end__ + ldr r0, =__stack_process_start__ + subs r2, r1, r0 + beq 1f +#ifdef __ARM_EABI__ + movs r2, #0x7 + bics r1, r2 +#endif + msr psp, r1 + movs r2, #2 + msr control, r2 +#ifdef INITIALIZE_STACK + movs r2, #0xCC + bl memory_set +#endif +1: + + /* Copy initialized memory sections into RAM (if necessary). */ + ldr r0, =__data_load_start__ + ldr r1, =__data_start__ + ldr r2, =__data_end__ + bl memory_copy + ldr r0, =__text_load_start__ + ldr r1, =__text_start__ + ldr r2, =__text_end__ + bl memory_copy + ldr r0, =__fast_load_start__ + ldr r1, =__fast_start__ + ldr r2, =__fast_end__ + bl memory_copy + ldr r0, =__ctors_load_start__ + ldr r1, =__ctors_start__ + ldr r2, =__ctors_end__ + bl memory_copy + ldr r0, =__dtors_load_start__ + ldr r1, =__dtors_start__ + ldr r2, =__dtors_end__ + bl memory_copy + ldr r0, =__rodata_load_start__ + ldr r1, =__rodata_start__ + ldr r2, =__rodata_end__ + bl memory_copy + ldr r0, =__tdata_load_start__ + ldr r1, =__tdata_start__ + ldr r2, =__tdata_end__ + bl memory_copy +#ifdef INITIALIZE_SECONDARY_SECTIONS + ldr r0, =__data2_load_start__ + ldr r1, =__data2_start__ + ldr r2, =__data2_end__ + bl memory_copy + ldr r0, =__text2_load_start__ + ldr r1, =__text2_start__ + ldr r2, =__text2_end__ + bl memory_copy + ldr r0, =__rodata2_load_start__ + ldr r1, =__rodata2_start__ + ldr r2, =__rodata2_end__ + bl memory_copy +#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */ +#ifdef INITIALIZE_TCM_SECTIONS + ldr r0, =__data_tcm_load_start__ + ldr r1, =__data_tcm_start__ + ldr r2, =__data_tcm_end__ + bl memory_copy + ldr r0, =__text_tcm_load_start__ + ldr r1, =__text_tcm_start__ + ldr r2, =__text_tcm_end__ + bl memory_copy + ldr r0, =__rodata_tcm_load_start__ + ldr r1, =__rodata_tcm_start__ + ldr r2, =__rodata_tcm_end__ + bl memory_copy +#endif /* #ifdef INITIALIZE_TCM_SECTIONS */ + + /* Zero the bss. */ + ldr r0, =__bss_start__ + ldr r1, =__bss_end__ + movs r2, #0 + bl memory_set + ldr r0, =__tbss_start__ + ldr r1, =__tbss_end__ + movs r2, #0 + bl memory_set +#ifdef INITIALIZE_SECONDARY_SECTIONS + ldr r0, =__bss2_start__ + ldr r1, =__bss2_end__ + mov r2, #0 + bl memory_set +#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */ +#ifdef INITIALIZE_TCM_SECTIONS + ldr r0, =__bss_tcm_start__ + ldr r1, =__bss_tcm_end__ + mov r2, #0 + bl memory_set +#endif /* #ifdef INITIALIZE_TCM_SECTIONS */ + + /* Initialize the heap */ + ldr r0, = __heap_start__ + ldr r1, = __heap_end__ + subs r1, r1, r0 + cmp r1, #8 + blt 1f + movs r2, #0 + str r2, [r0] + adds r0, r0, #4 + str r1, [r0] +1: + +#ifdef INITIALIZE_USER_SECTIONS + ldr r2, =InitializeUserMemorySections + blx r2 +#endif + + /* Call constructors */ + ldr r0, =__ctors_start__ + ldr r1, =__ctors_end__ +ctor_loop: + cmp r0, r1 + beq ctor_end + ldr r2, [r0] + adds r0, #4 + push {r0-r1} + blx r2 + pop {r0-r1} + b ctor_loop +ctor_end: + + /* Setup initial call frame */ + movs r0, #0 + mov lr, r0 + mov r12, sp + + .type start, function +start: + /* Jump to application entry point */ +#ifdef FULL_LIBRARY + movs r0, #ARGSSPACE + ldr r1, =args + ldr r2, =debug_getargs + blx r2 + ldr r1, =args +#else + movs r0, #0 + movs r1, #0 +#endif + ldr r2, =APP_ENTRY_POINT + blx r2 + + .thumb_func +exit: +#ifdef FULL_LIBRARY + mov r5, r0 // save the exit parameter/return result + + /* Call destructors */ + ldr r0, =__dtors_start__ + ldr r1, =__dtors_end__ +dtor_loop: + cmp r0, r1 + beq dtor_end + ldr r2, [r0] + add r0, #4 + push {r0-r1} + blx r2 + pop {r0-r1} + b dtor_loop +dtor_end: + + /* Call atexit functions */ + ldr r2, =_execute_at_exit_fns + blx r2 + + /* Call debug_exit with return result/exit parameter */ + mov r0, r5 + ldr r2, =debug_exit + blx r2 +#endif + + /* Returned from application entry point, loop forever. */ +exit_loop: + b exit_loop + + .thumb_func +memory_copy: + cmp r0, r1 + beq 2f + subs r2, r2, r1 + beq 2f +1: + ldrb r3, [r0] + adds r0, r0, #1 + strb r3, [r1] + adds r1, r1, #1 + subs r2, r2, #1 + bne 1b +2: + bx lr + + .thumb_func +memory_set: + cmp r0, r1 + beq 1f + strb r2, [r0] + adds r0, r0, #1 + b memory_set +1: + bx lr + + // default C/C++ library helpers + +.macro HELPER helper_name + .section .text.\helper_name, "ax", %progbits + .balign 2 + .global \helper_name + .weak \helper_name +\helper_name: + .thumb_func +.endm + +.macro JUMPTO name +#if defined(__thumb__) && !defined(__thumb2__) + mov r12, r0 + ldr r0, =\name + push {r0} + mov r0, r12 + pop {pc} +#else + b \name +#endif +.endm + +HELPER __aeabi_read_tp + ldr r0, =__tbss_start__-8 + bx lr +HELPER abort + b . +HELPER __assert + b . +HELPER __aeabi_assert + b . +HELPER __sync_synchronize + bx lr +HELPER __getchar + JUMPTO debug_getchar +HELPER __putchar + JUMPTO debug_putchar +HELPER __open + JUMPTO debug_fopen +HELPER __close + JUMPTO debug_fclose +HELPER __write + mov r3, r0 + mov r0, r1 + movs r1, #1 + JUMPTO debug_fwrite +HELPER __read + mov r3, r0 + mov r0, r1 + movs r1, #1 + JUMPTO debug_fread +HELPER __seek + push {r4, lr} + mov r4, r0 + bl debug_fseek + cmp r0, #0 + bne 1f + mov r0, r4 + bl debug_ftell + pop {r4, pc} +1: + ldr r0, =-1 + pop {r4, pc} + // char __user_locale_name_buffer[]; + .section .bss.__user_locale_name_buffer, "aw", %nobits + .global __user_locale_name_buffer + .weak __user_locale_name_buffer + __user_locale_name_buffer: + .word 0x0 + +#ifdef FULL_LIBRARY + .bss +args: + .space ARGSSPACE +#endif + + /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */ + .section .stack, "wa", %nobits + .section .stack_process, "wa", %nobits + .section .heap, "wa", %nobits + diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c index 7f8b9d6e2..4d197a16a 100644 --- a/examples/host/cdc_msc_hid/src/main.c +++ b/examples/host/cdc_msc_hid/src/main.c @@ -101,6 +101,10 @@ void tuh_cdc_unmounted_cb(uint8_t dev_addr) // invoked ISR context void tuh_cdc_xfer_isr(uint8_t dev_addr, xfer_result_t event, cdc_pipeid_t pipe_id, uint32_t xferred_bytes) { + (void) event; + (void) pipe_id; + (void) xferred_bytes; + printf(serial_in_buffer); tu_memclr(serial_in_buffer, sizeof(serial_in_buffer)); diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index ea411d3f4..be584b181 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -55,7 +55,7 @@ #if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST | OPT_MODE_HIGH_SPEED) #else -#define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE +#define CFG_TUSB_RHPORT0_MODE OPT_MODE_HOST #endif #define CFG_TUSB_DEBUG 2 diff --git a/src/host/hcd.h b/src/host/hcd.h index 94ee8d0fa..1383f6839 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -51,8 +51,8 @@ typedef enum { - HCD_EVENT_DEVICE_PLUG, - HCD_EVENT_DEVICE_UNPLUG, + HCD_EVENT_DEVICE_ATTACH, + HCD_EVENT_DEVICE_REMOVE, HCD_EVENT_XFER_COMPLETE, } hcd_eventid_t; @@ -67,7 +67,7 @@ typedef struct { uint8_t hub_addr; uint8_t hub_port; - } plug, unplug; + } attach, remove; struct { diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index cef0d5dae..b04b0da7c 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -42,13 +42,15 @@ //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ -#include "hal/hal.h" #include "osal/osal.h" #include "../hcd.h" #include "../usbh_hcd.h" #include "ohci.h" +// TODO remove +#include "chip.h" + //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ @@ -206,16 +208,19 @@ tusb_error_t hcd_init(void) //--------------------------------------------------------------------+ void hcd_port_reset(uint8_t hostid) { + (void) hostid; OHCI_REG->rhport_status[0] = OHCI_RHPORT_PORT_RESET_STATUS_MASK; } bool hcd_port_connect_status(uint8_t hostid) { + (void) hostid; return OHCI_REG->rhport_status_bit[0].current_connect_status; } tusb_speed_t hcd_port_speed_get(uint8_t hostid) { + (void) hostid; return OHCI_REG->rhport_status_bit[0].low_speed_device_attached ? TUSB_SPEED_LOW : TUSB_SPEED_FULL; } @@ -223,6 +228,7 @@ tusb_speed_t hcd_port_speed_get(uint8_t hostid) void hcd_port_unplug(uint8_t hostid) { // TODO OHCI + (void) hostid; } //--------------------------------------------------------------------+ @@ -242,6 +248,8 @@ static inline tusb_xfer_type_t ed_get_xfer_type(ohci_ed_t const * const p_ed) static void ed_init(ohci_ed_t *p_ed, uint8_t dev_addr, uint16_t max_packet_size, uint8_t endpoint_addr, uint8_t xfer_type, uint8_t interval) { + (void) interval; + // address 0 is used as async head, which always on the list --> cannot be cleared if (dev_addr != 0) { @@ -251,7 +259,7 @@ static void ed_init(ohci_ed_t *p_ed, uint8_t dev_addr, uint16_t max_packet_size, p_ed->device_address = dev_addr; p_ed->endpoint_number = endpoint_addr & 0x0F; p_ed->direction = (xfer_type == TUSB_XFER_CONTROL) ? OHCI_PID_SETUP : ( (endpoint_addr & TUSB_DIR_IN_MASK) ? OHCI_PID_IN : OHCI_PID_OUT ); - p_ed->speed = usbh_devices[dev_addr].speed; + p_ed->speed = _usbh_devices[dev_addr].speed; p_ed->is_iso = (xfer_type == TUSB_XFER_ISOCHRONOUS) ? 1 : 0; p_ed->max_package_size = max_packet_size; @@ -274,6 +282,22 @@ static void gtd_init(ohci_gtd_t* p_td, void* data_ptr, uint16_t total_bytes) p_td->buffer_end = total_bytes ? (((uint8_t*) data_ptr) + total_bytes-1) : NULL; } +bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* ep_desc) +{ + // FIXME control only for now + (void) rhport; + return hcd_pipe_control_open(dev_addr, ep_desc->wMaxPacketSize.size); +} + +bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) +{ + // FIXME control only for now + (void) rhport; + (void) ep_addr; + + return hcd_pipe_control_close(dev_addr); +} + tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) { ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed; @@ -346,7 +370,7 @@ tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) ed_list_remove( p_ed_head[ ed_get_xfer_type(p_ed)], p_ed ); // TODO refractor to be USBH - usbh_devices[dev_addr].state = TUSB_DEVICE_STATE_UNPLUG; + _usbh_devices[dev_addr].state = TUSB_DEVICE_STATE_UNPLUG; } return TUSB_ERROR_NONE; @@ -496,6 +520,7 @@ tusb_error_t hcd_pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) { + (void) int_on_complete; TU_ASSERT_ERR( pipe_queue_xfer(pipe_hdl, buffer, total_bytes, true) ); tusb_xfer_type_t xfer_type = ed_get_xfer_type( ed_from_pipe_handle(pipe_hdl) ); @@ -607,6 +632,8 @@ static inline uint32_t gtd_xfer_byte_left(uint32_t buffer_end, uint32_t current_ static void done_queue_isr(uint8_t hostid) { + (void) hostid; + uint8_t max_loop = (CFG_TUSB_HOST_DEVICE_MAX+1)*(HCD_MAX_XFER+OHCI_MAX_ITD); // done head is written in reversed order of completion --> need to reverse the done queue first diff --git a/src/host/usbh.c b/src/host/usbh.c index 69ac042e6..36822ea06 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -193,13 +193,17 @@ bool usbh_init(void) bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8_t* data) { usbh_device_t* dev = &_usbh_devices[dev_addr]; - const uint8_t rhport = dev->core_id; + //const uint8_t rhport = dev->core_id; TU_ASSERT(osal_mutex_lock(dev->control.mutex_hdl, OSAL_TIMEOUT_NORMAL)); dev->control.request = *request; dev->control.pipe_status = 0; +#if 1 + TU_ASSERT(hcd_pipe_control_xfer(dev_addr, &dev->control.request, data)); + TU_ASSERT(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL)); +#else // Setup Stage hcd_setup_send(rhport, dev_addr, (uint8_t*) &dev->control.request); TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL)); @@ -214,6 +218,7 @@ bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8 // Status : data toggle is always 1 hcd_edpt_xfer(rhport, dev_addr, edpt_addr(0, 1-request->bmRequestType_bit.direction), NULL, 0); TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL)); +#endif osal_mutex_unlock(dev->control.mutex_hdl); @@ -231,7 +236,7 @@ tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) { osal_semaphore_reset( _usbh_devices[dev_addr].control.sem_hdl ); //osal_mutex_reset( usbh_devices[dev_addr].control.mutex_hdl ); - + tusb_desc_endpoint_t ep0_desc = { .bLength = sizeof(tusb_desc_endpoint_t), @@ -296,11 +301,11 @@ void usbh_hub_port_plugged_isr(uint8_t hub_addr, uint8_t hub_port) hcd_event_t event = { .rhport = _usbh_devices[hub_addr].core_id, - .event_id = HCD_EVENT_DEVICE_PLUG + .event_id = HCD_EVENT_DEVICE_ATTACH }; - event.plug.hub_addr = hub_addr; - event.plug.hub_port = hub_port; + event.attach.hub_addr = hub_addr; + event.attach.hub_port = hub_port; hcd_event_handler(&event, true); } @@ -310,11 +315,11 @@ void usbh_hcd_rhport_plugged_isr(uint8_t hostid) hcd_event_t event = { .rhport = hostid, - .event_id = HCD_EVENT_DEVICE_PLUG + .event_id = HCD_EVENT_DEVICE_ATTACH }; - event.plug.hub_addr = 0; - event.plug.hub_port = 0; + event.attach.hub_addr = 0; + event.attach.hub_port = 0; hcd_event_handler(&event, true); } @@ -374,11 +379,11 @@ void usbh_hcd_rhport_unplugged_isr(uint8_t hostid) hcd_event_t event = { .rhport = hostid, - .event_id = HCD_EVENT_DEVICE_UNPLUG + .event_id = HCD_EVENT_DEVICE_REMOVE }; - event.plug.hub_addr = 0; - event.plug.hub_port = 0; + event.attach.hub_addr = 0; + event.attach.hub_port = 0; hcd_event_handler(&event, true); } @@ -402,8 +407,8 @@ bool enum_task(hcd_event_t* event) tusb_control_request_t request; dev0->core_id = event->rhport; // TODO refractor integrate to device_pool - dev0->hub_addr = event->plug.hub_addr; - dev0->hub_port = event->plug.hub_port; + dev0->hub_addr = event->attach.hub_addr; + dev0->hub_port = event->attach.hub_port; dev0->state = TUSB_DEVICE_STATE_UNPLUG; //------------- connected/disconnected directly with roothub -------------// @@ -644,8 +649,8 @@ bool usbh_task_body(void) switch (event.event_id) { - case HCD_EVENT_DEVICE_PLUG: - case HCD_EVENT_DEVICE_UNPLUG: + case HCD_EVENT_DEVICE_ATTACH: + case HCD_EVENT_DEVICE_REMOVE: enum_task(&event); break; diff --git a/src/portable/nxp/lpc17_40/hal_lpc17_40.c b/src/portable/nxp/lpc17_40/hal_lpc17_40.c index 7509dac58..2acd19f6e 100644 --- a/src/portable/nxp/lpc17_40/hal_lpc17_40.c +++ b/src/portable/nxp/lpc17_40/hal_lpc17_40.c @@ -42,10 +42,11 @@ #include "chip.h" +extern void hal_hcd_isr(uint8_t hostid); +extern void hal_dcd_isr(uint8_t rhport); + void USB_IRQHandler(void) { - extern void hal_dcd_isr(uint8_t rhport); - #if MODE_HOST_SUPPORTED hal_hcd_isr(0); #endif @@ -55,4 +56,18 @@ void USB_IRQHandler(void) #endif } +//FIXME move later +void hcd_int_enable(uint8_t rhport) +{ + (void) rhport; + NVIC_EnableIRQ(USB_IRQn); +} + +void hcd_int_disable(uint8_t rhport) +{ + (void) rhport; + NVIC_DisableIRQ(USB_IRQn); +} + + #endif -- cgit v1.3.1 From 6c49848d59b96bfb4db452a57444838b7e11913e Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 7 Dec 2018 22:01:26 +0700 Subject: ohci got device not response condition in control transfer --- src/host/ohci/ohci.c | 63 +++++++++++++++++++++++++++++++++++++++++++--------- src/host/usbh.c | 4 ++-- 2 files changed, 54 insertions(+), 13 deletions(-) (limited to 'src/host') diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index b04b0da7c..7eef36a75 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -38,7 +38,7 @@ #include -#if MODE_HOST_SUPPORTED && (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X) +#if MODE_HOST_SUPPORTED && (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC40XX) //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ @@ -80,10 +80,6 @@ enum { OHCI_PERIODIC_START = 0x3E67 }; -#ifdef __CC_ARM -#pragma diag_suppress 66 // Suppress Keil warnings #66-D: enumeration value is out of "int" range -#endif - enum { OHCI_INT_SCHEDULING_OVERUN_MASK = BIT_(0), OHCI_INT_WRITEBACK_DONEHEAD_MASK = BIT_(1), @@ -97,10 +93,6 @@ enum { OHCI_INT_MASTER_ENABLE_MASK = BIT_(31), }; -#ifdef __CC_ARM -#pragma diag_default 66 // return Keil 66 to normal severity -#endif - enum { OHCI_RHPORT_CURRENT_CONNECT_STATUS_MASK = BIT_(0), OHCI_RHPORT_PORT_ENABLE_STATUS_MASK = BIT_(1), @@ -238,7 +230,6 @@ void hcd_port_unplug(uint8_t hostid) //--------------------------------------------------------------------+ // CONTROL PIPE API //--------------------------------------------------------------------+ -static inline tusb_xfer_type_t ed_get_xfer_type(ohci_ed_t const * const p_ed) ATTR_PURE ATTR_ALWAYS_INLINE; static inline tusb_xfer_type_t ed_get_xfer_type(ohci_ed_t const * const p_ed) { return (p_ed->endpoint_number == 0 ) ? TUSB_XFER_CONTROL : @@ -298,9 +289,59 @@ bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) return hcd_pipe_control_close(dev_addr); } +bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) +{ + (void) rhport; + + ohci_ed_t* p_ed = &ohci_data.control[dev_addr].ed; + ohci_gtd_t *p_setup = &ohci_data.control[dev_addr].gtd[0]; + + gtd_init(p_setup, (void*) setup_packet, 8); + p_setup->index = dev_addr; + p_setup->pid = OHCI_PID_SETUP; + p_setup->data_toggle = BIN8(10); // DATA0 + p_setup->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; + + //------------- Attach TDs list to Control Endpoint -------------// + p_ed->td_head.address = (uint32_t) p_setup; + + OHCI_REG->command_status_bit.control_list_filled = 1; + + return true; +} + +bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) +{ + (void) rhport; + + uint8_t const epnum = edpt_number(ep_addr); + uint8_t const dir = edpt_dir(ep_addr); + + // FIXME control only for now + if ( epnum == 0 ) + { + ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed; + ohci_gtd_t *p_data = &ohci_data.control[dev_addr].gtd[0]; + + gtd_init(p_data, buffer, buflen); + + p_data->index = dev_addr; + p_data->pid = dir ? OHCI_PID_IN : OHCI_PID_OUT; + p_data->data_toggle = BIN8(11); // DATA1 + + p_data->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; + + p_ed->td_head.address = (uint32_t) p_data; + + OHCI_REG->command_status_bit.control_list_filled = 1; + } + + return false; +} + tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) { - ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed; + ohci_ed_t* p_ed = &ohci_data.control[dev_addr].ed; ed_init(p_ed, dev_addr, max_packet_size, 0, TUSB_XFER_CONTROL, 0); // TODO binterval of control is ignored diff --git a/src/host/usbh.c b/src/host/usbh.c index 36822ea06..6d3e66f99 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -193,14 +193,14 @@ bool usbh_init(void) bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8_t* data) { usbh_device_t* dev = &_usbh_devices[dev_addr]; - //const uint8_t rhport = dev->core_id; + const uint8_t rhport = dev->core_id; TU_ASSERT(osal_mutex_lock(dev->control.mutex_hdl, OSAL_TIMEOUT_NORMAL)); dev->control.request = *request; dev->control.pipe_status = 0; -#if 1 +#if 0 TU_ASSERT(hcd_pipe_control_xfer(dev_addr, &dev->control.request, data)); TU_ASSERT(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL)); #else -- cgit v1.3.1 From e4fd9fbaf4ef9294acbf1842a2ef3f16504bbf0b Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 7 Dec 2018 23:16:06 +0700 Subject: seperate control xfer to 3 tds for ohci - ohci only work with 1st transfer with specific timing. TODO fix it later --- src/host/ohci/ohci.c | 87 ++++++++++++++++++++++++++-------------------------- src/host/usbh.c | 13 ++++---- 2 files changed, 50 insertions(+), 50 deletions(-) (limited to 'src/host') diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index 7eef36a75..b72ba787e 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -328,7 +328,6 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * p_data->index = dev_addr; p_data->pid = dir ? OHCI_PID_IN : OHCI_PID_OUT; p_data->data_toggle = BIN8(11); // DATA1 - p_data->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; p_ed->td_head.address = (uint32_t) p_data; @@ -336,7 +335,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * OHCI_REG->command_status_bit.control_list_filled = 1; } - return false; + return true; } tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) @@ -356,48 +355,48 @@ tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) return TUSB_ERROR_NONE; } -bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) -{ - ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed; - - ohci_gtd_t *p_setup = &ohci_data.control[dev_addr].gtd[0]; - ohci_gtd_t *p_data = p_setup + 1; - ohci_gtd_t *p_status = p_setup + 2; - - //------------- SETUP Phase -------------// - gtd_init(p_setup, (void*) p_request, 8); - p_setup->index = dev_addr; - p_setup->pid = OHCI_PID_SETUP; - p_setup->data_toggle = BIN8(10); // DATA0 - p_setup->next_td = (uint32_t) p_data; - - //------------- DATA Phase -------------// - if (p_request->wLength > 0) - { - gtd_init(p_data, data, p_request->wLength); - p_data->index = dev_addr; - p_data->pid = p_request->bmRequestType_bit.direction ? OHCI_PID_IN : OHCI_PID_OUT; - p_data->data_toggle = BIN8(11); // DATA1 - }else - { - p_data = p_setup; - } - p_data->next_td = (uint32_t) p_status; - - //------------- STATUS Phase -------------// - gtd_init(p_status, NULL, 0); // zero-length data - p_status->index = dev_addr; - p_status->pid = p_request->bmRequestType_bit.direction ? OHCI_PID_OUT : OHCI_PID_IN; // reverse direction of data phase - p_status->data_toggle = BIN8(11); // DATA1 - p_status->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; - - //------------- Attach TDs list to Control Endpoint -------------// - p_ed->td_head.address = (uint32_t) p_setup; - - OHCI_REG->command_status_bit.control_list_filled = 1; - - return true; -} +//bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) +//{ +// ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed; +// +// ohci_gtd_t *p_setup = &ohci_data.control[dev_addr].gtd[0]; +// ohci_gtd_t *p_data = p_setup + 1; +// ohci_gtd_t *p_status = p_setup + 2; +// +// //------------- SETUP Phase -------------// +// gtd_init(p_setup, (void*) p_request, 8); +// p_setup->index = dev_addr; +// p_setup->pid = OHCI_PID_SETUP; +// p_setup->data_toggle = BIN8(10); // DATA0 +// p_setup->next_td = (uint32_t) p_data; +// +// //------------- DATA Phase -------------// +// if (p_request->wLength > 0) +// { +// gtd_init(p_data, data, p_request->wLength); +// p_data->index = dev_addr; +// p_data->pid = p_request->bmRequestType_bit.direction ? OHCI_PID_IN : OHCI_PID_OUT; +// p_data->data_toggle = BIN8(11); // DATA1 +// }else +// { +// p_data = p_setup; +// } +// p_data->next_td = (uint32_t) p_status; +// +// //------------- STATUS Phase -------------// +// gtd_init(p_status, NULL, 0); // zero-length data +// p_status->index = dev_addr; +// p_status->pid = p_request->bmRequestType_bit.direction ? OHCI_PID_OUT : OHCI_PID_IN; // reverse direction of data phase +// p_status->data_toggle = BIN8(11); // DATA1 +// p_status->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; +// +// //------------- Attach TDs list to Control Endpoint -------------// +// p_ed->td_head.address = (uint32_t) p_setup; +// +// OHCI_REG->command_status_bit.control_list_filled = 1; +// +// return true; +//} tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) { diff --git a/src/host/usbh.c b/src/host/usbh.c index 6d3e66f99..ad101a5b0 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -200,10 +200,6 @@ bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8 dev->control.request = *request; dev->control.pipe_status = 0; -#if 0 - TU_ASSERT(hcd_pipe_control_xfer(dev_addr, &dev->control.request, data)); - TU_ASSERT(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL)); -#else // Setup Stage hcd_setup_send(rhport, dev_addr, (uint8_t*) &dev->control.request); TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL)); @@ -218,7 +214,6 @@ bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8 // Status : data toggle is always 1 hcd_edpt_xfer(rhport, dev_addr, edpt_addr(0, 1-request->bmRequestType_bit.direction), NULL, 0); TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL)); -#endif osal_mutex_unlock(dev->control.mutex_hdl); @@ -395,8 +390,14 @@ void usbh_hcd_rhport_unplugged_isr(uint8_t hostid) bool enum_task(hcd_event_t* event) { enum { +#if 1 + // FIXME ohci LPC1769 xpresso + debugging to have 1st control xfer to work, some kind of timing or ohci driver issue !!! + POWER_STABLE_DELAY = 100, + RESET_DELAY = 500 +#else POWER_STABLE_DELAY = 500, - RESET_DELAY = 200 // USB specs say only 50ms but many devices require much longer + RESET_DELAY = 200, // USB specs say only 50ms but many devices require much longer +#endif }; // for OSAL_NONE local variable won't retain value after blocking service sem_wait/queue_recv -- cgit v1.3.1 From 98dd0c4d4d181181e62c99d9e43f3a2aaea7662f Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 7 Dec 2018 23:28:51 +0700 Subject: clean up --- src/host/ehci/ehci.c | 154 +++++++++++++++++++++++++-------------------------- src/host/hcd.h | 5 +- src/host/ohci/ohci.c | 141 +++++++++++++++++++++++----------------------- src/host/usbh.c | 2 +- 4 files changed, 148 insertions(+), 154 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index f941c0b4c..bb0e02d7d 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -123,26 +123,26 @@ static inline ehci_link_t* list_next(ehci_link_t *p_link_pointer) ATTR_PURE ATTR static ehci_link_t* list_find_previous_item(ehci_link_t* p_head, ehci_link_t* p_current); static tusb_error_t list_remove_qhd(ehci_link_t* p_head, ehci_link_t* p_remove); -static tusb_error_t hcd_controller_init(uint8_t hostid) ATTR_WARN_UNUSED_RESULT; +static bool ehci_init(uint8_t hostid); static tusb_error_t hcd_controller_stop(uint8_t hostid) ATTR_WARN_UNUSED_RESULT ATTR_UNUSED; //--------------------------------------------------------------------+ // USBH-HCD API //--------------------------------------------------------------------+ -tusb_error_t hcd_init(void) +bool hcd_init(void) { //------------- Data Structure init -------------// tu_memclr(&ehci_data, sizeof(ehci_data_t)); #if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST) - TU_ASSERT_ERR (hcd_controller_init(0)); + TU_VERIFY(ehci_init(0)); #endif #if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST) - TU_ASSERT_ERR (hcd_controller_init(1)); + TU_VERIFY(ehci_init(1)); #endif - return TUSB_ERROR_NONE; + return true; } //--------------------------------------------------------------------+ @@ -176,7 +176,7 @@ void hcd_port_unplug(uint8_t hostid) //--------------------------------------------------------------------+ // Controller API //--------------------------------------------------------------------+ -static tusb_error_t hcd_controller_init(uint8_t hostid) +static bool ehci_init(uint8_t hostid) { ehci_registers_t* const regs = get_operational_register(hostid); @@ -262,7 +262,7 @@ static tusb_error_t hcd_controller_init(uint8_t hostid) regs->portsc_bit.port_power = 1; // enable port power - return TUSB_ERROR_NONE; + return true; } static tusb_error_t hcd_controller_stop(uint8_t hostid) @@ -281,75 +281,7 @@ static tusb_error_t hcd_controller_stop(uint8_t hostid) //--------------------------------------------------------------------+ // CONTROL PIPE API //--------------------------------------------------------------------+ -bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* ep_desc) -{ - // FIXME control only for now - (void) rhport; - hcd_pipe_control_open(dev_addr, ep_desc->wMaxPacketSize.size); - - return true; -} - -bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) -{ - // FIXME control only for now - - hcd_pipe_control_close(dev_addr); - - return true; -} - -bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) -{ - uint8_t const epnum = edpt_number(ep_addr); - uint8_t const dir = edpt_dir(ep_addr); - - // FIXME control only for now - if ( epnum == 0 ) - { - ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); - ehci_qtd_t *p_data = get_control_qtds(dev_addr); - - qtd_init(p_data, (uint32_t) buffer, buflen); - - // first first data toggle is always 1 (data & setup stage) - p_data->data_toggle = 1; - p_data->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT; - p_data->int_on_complete = 1; - p_data->next.terminate = 1; - - // sw region - p_qhd->p_qtd_list_head = p_data; - p_qhd->p_qtd_list_tail = p_data; - - // attach TD - p_qhd->qtd_overlay.next.address = (uint32_t) p_data; - } - - return true; -} - -bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) -{ - ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); - ehci_qtd_t *p_setup = get_control_qtds(dev_addr); - - qtd_init(p_setup, (uint32_t) setup_packet, 8); - p_setup->pid = EHCI_PID_SETUP; - p_setup->int_on_complete = 1; - p_setup->next.terminate = 1; - - // sw region - p_qhd->p_qtd_list_head = p_setup; - p_qhd->p_qtd_list_tail = p_setup; - - // attach TD - p_qhd->qtd_overlay.next.address = (uint32_t) p_setup; - - return true; -} - -tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) +bool hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) { ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); @@ -362,7 +294,7 @@ tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD); } - return TUSB_ERROR_NONE; + return true; } //bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) @@ -406,7 +338,7 @@ tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) // return true; //} -tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) +bool hcd_pipe_control_close(uint8_t dev_addr) { //------------- TODO pipe handle validate -------------// ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); @@ -419,7 +351,71 @@ tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) (ehci_link_t*) p_qhd) ); } - return TUSB_ERROR_NONE; + return true; +} + +bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* ep_desc) +{ + // FIXME control only for now + (void) rhport; + return hcd_pipe_control_open(dev_addr, ep_desc->wMaxPacketSize.size); +} + +bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) +{ + // FIXME control only for now + + return hcd_pipe_control_close(dev_addr); +} + +bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) +{ + uint8_t const epnum = edpt_number(ep_addr); + uint8_t const dir = edpt_dir(ep_addr); + + // FIXME control only for now + if ( epnum == 0 ) + { + ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); + ehci_qtd_t *p_data = get_control_qtds(dev_addr); + + qtd_init(p_data, (uint32_t) buffer, buflen); + + // first first data toggle is always 1 (data & setup stage) + p_data->data_toggle = 1; + p_data->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT; + p_data->int_on_complete = 1; + p_data->next.terminate = 1; + + // sw region + p_qhd->p_qtd_list_head = p_data; + p_qhd->p_qtd_list_tail = p_data; + + // attach TD + p_qhd->qtd_overlay.next.address = (uint32_t) p_data; + } + + return true; +} + +bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) +{ + ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); + ehci_qtd_t *p_setup = get_control_qtds(dev_addr); + + qtd_init(p_setup, (uint32_t) setup_packet, 8); + p_setup->pid = EHCI_PID_SETUP; + p_setup->int_on_complete = 1; + p_setup->next.terminate = 1; + + // sw region + p_qhd->p_qtd_list_head = p_setup; + p_qhd->p_qtd_list_tail = p_setup; + + // attach TD + p_qhd->qtd_overlay.next.address = (uint32_t) p_setup; + + return true; } //--------------------------------------------------------------------+ diff --git a/src/host/hcd.h b/src/host/hcd.h index 1383f6839..77d8aa8fc 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -112,7 +112,7 @@ static inline bool pipehandle_is_equal(pipe_handle_t x, pipe_handle_t y) //--------------------------------------------------------------------+ // USBH-HCD API //--------------------------------------------------------------------+ -tusb_error_t hcd_init(void) ATTR_WARN_UNUSED_RESULT; +bool hcd_init(void); void hal_hcd_isr(uint8_t hostid); void hcd_int_enable (uint8_t rhport); @@ -136,9 +136,6 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet // PIPE API //--------------------------------------------------------------------+ // TODO control xfer should be used via usbh layer -tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) ATTR_WARN_UNUSED_RESULT; -bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) ATTR_WARN_UNUSED_RESULT; -tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) ATTR_WARN_UNUSED_RESULT; pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_desc_endpoint_t const * endpoint_desc, uint8_t class_code) ATTR_WARN_UNUSED_RESULT; tusb_error_t hcd_pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) ATTR_WARN_UNUSED_RESULT; // only queue, not transferring yet diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index b72ba787e..3944d72d0 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -155,7 +155,7 @@ static ohci_ed_t * ed_list_find_previous(ohci_ed_t const * p_head, ohci_ed_t con // USBH-HCD API //--------------------------------------------------------------------+ // Initialization according to 5.1.1.4 -tusb_error_t hcd_init(void) +bool hcd_init(void) { //------------- Data Structure init -------------// tu_memclr(&ohci_data, sizeof(ohci_data_t)); @@ -192,7 +192,7 @@ tusb_error_t hcd_init(void) OHCI_REG->control_bit.hc_functional_state = OHCI_CONTROL_FUNCSTATE_OPERATIONAL; // make HC's state to operational state TODO use this to suspend (save power) OHCI_REG->rh_status_bit.local_power_status_change = 1; // set global power for ports - return TUSB_ERROR_NONE; + return true; } //--------------------------------------------------------------------+ @@ -273,72 +273,8 @@ static void gtd_init(ohci_gtd_t* p_td, void* data_ptr, uint16_t total_bytes) p_td->buffer_end = total_bytes ? (((uint8_t*) data_ptr) + total_bytes-1) : NULL; } -bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* ep_desc) -{ - // FIXME control only for now - (void) rhport; - return hcd_pipe_control_open(dev_addr, ep_desc->wMaxPacketSize.size); -} - -bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) -{ - // FIXME control only for now - (void) rhport; - (void) ep_addr; - - return hcd_pipe_control_close(dev_addr); -} - -bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) -{ - (void) rhport; - - ohci_ed_t* p_ed = &ohci_data.control[dev_addr].ed; - ohci_gtd_t *p_setup = &ohci_data.control[dev_addr].gtd[0]; - - gtd_init(p_setup, (void*) setup_packet, 8); - p_setup->index = dev_addr; - p_setup->pid = OHCI_PID_SETUP; - p_setup->data_toggle = BIN8(10); // DATA0 - p_setup->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; - - //------------- Attach TDs list to Control Endpoint -------------// - p_ed->td_head.address = (uint32_t) p_setup; - - OHCI_REG->command_status_bit.control_list_filled = 1; - - return true; -} - -bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) -{ - (void) rhport; - - uint8_t const epnum = edpt_number(ep_addr); - uint8_t const dir = edpt_dir(ep_addr); - - // FIXME control only for now - if ( epnum == 0 ) - { - ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed; - ohci_gtd_t *p_data = &ohci_data.control[dev_addr].gtd[0]; - - gtd_init(p_data, buffer, buflen); - - p_data->index = dev_addr; - p_data->pid = dir ? OHCI_PID_IN : OHCI_PID_OUT; - p_data->data_toggle = BIN8(11); // DATA1 - p_data->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; - - p_ed->td_head.address = (uint32_t) p_data; - OHCI_REG->command_status_bit.control_list_filled = 1; - } - - return true; -} - -tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) +bool hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) { ohci_ed_t* p_ed = &ohci_data.control[dev_addr].ed; @@ -352,7 +288,7 @@ tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) p_ed->skip = 0; // addr0 is used as static control head --> only need to clear skip bit } - return TUSB_ERROR_NONE; + return true; } //bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) @@ -398,7 +334,7 @@ tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) // return true; //} -tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) +bool hcd_pipe_control_close(uint8_t dev_addr) { ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed; @@ -413,7 +349,72 @@ tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) _usbh_devices[dev_addr].state = TUSB_DEVICE_STATE_UNPLUG; } - return TUSB_ERROR_NONE; + return true; +} + +bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* ep_desc) +{ + // FIXME control only for now + (void) rhport; + return hcd_pipe_control_open(dev_addr, ep_desc->wMaxPacketSize.size); +} + +bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) +{ + // FIXME control only for now + (void) rhport; + (void) ep_addr; + + return hcd_pipe_control_close(dev_addr); +} + +bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) +{ + (void) rhport; + + ohci_ed_t* p_ed = &ohci_data.control[dev_addr].ed; + ohci_gtd_t *p_setup = &ohci_data.control[dev_addr].gtd[0]; + + gtd_init(p_setup, (void*) setup_packet, 8); + p_setup->index = dev_addr; + p_setup->pid = OHCI_PID_SETUP; + p_setup->data_toggle = BIN8(10); // DATA0 + p_setup->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; + + //------------- Attach TDs list to Control Endpoint -------------// + p_ed->td_head.address = (uint32_t) p_setup; + + OHCI_REG->command_status_bit.control_list_filled = 1; + + return true; +} + +bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) +{ + (void) rhport; + + uint8_t const epnum = edpt_number(ep_addr); + uint8_t const dir = edpt_dir(ep_addr); + + // FIXME control only for now + if ( epnum == 0 ) + { + ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed; + ohci_gtd_t *p_data = &ohci_data.control[dev_addr].gtd[0]; + + gtd_init(p_data, buffer, buflen); + + p_data->index = dev_addr; + p_data->pid = dir ? OHCI_PID_IN : OHCI_PID_OUT; + p_data->data_toggle = BIN8(11); // DATA1 + p_data->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; + + p_ed->td_head.address = (uint32_t) p_data; + + OHCI_REG->command_status_bit.control_list_filled = 1; + } + + return true; } //--------------------------------------------------------------------+ diff --git a/src/host/usbh.c b/src/host/usbh.c index ad101a5b0..4c4fd5319 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -183,7 +183,7 @@ bool usbh_init(void) } } - TU_ASSERT( hcd_init() == TUSB_ERROR_NONE ); + TU_ASSERT(hcd_init()); hcd_int_enable(TUH_OPT_RHPORT); return true; -- cgit v1.3.1 From e0199162637465b576b9f082404cf163c7cb1fef Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 7 Dec 2018 23:35:42 +0700 Subject: clean up ehci, support only 1 controller --- src/host/ehci/ehci.c | 19 ++++--------------- src/host/ehci/ehci.h | 4 ++-- src/host/hcd.h | 5 +---- src/portable/nxp/lpc18_43/hal_lpc18_43.c | 3 ++- 4 files changed, 9 insertions(+), 22 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index bb0e02d7d..8e40804d5 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -209,8 +209,8 @@ static bool ehci_init(uint8_t hostid) for(uint32_t i=0; i<4; i++) { - ehci_data.period_head_arr[ hostid_to_data_idx(hostid) ][i].interrupt_smask = 1; // queue head in period list must have smask non-zero - ehci_data.period_head_arr[ hostid_to_data_idx(hostid) ][i].qtd_overlay.halted = 1; // dummy node, always inactive + ehci_data.period_head_arr[i].interrupt_smask = 1; // queue head in period list must have smask non-zero + ehci_data.period_head_arr[i].qtd_overlay.halted = 1; // dummy node, always inactive } ehci_link_t * const framelist = get_period_frame_list(hostid); @@ -873,27 +873,16 @@ static inline ehci_link_t* get_period_frame_list(uint8_t hostid) } #endif -static inline uint8_t hostid_to_data_idx(uint8_t hostid) -{ - #if (CONTROLLER_HOST_NUMBER == 1) && (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST) - (void) hostid; - return 0; - #else - return hostid; - #endif -} - //------------- queue head helper -------------// static inline ehci_qhd_t* get_async_head(uint8_t hostid) { - return &ehci_data.async_head[ hostid_to_data_idx(hostid) ]; + return &ehci_data.async_head; } #if EHCI_PERIODIC_LIST // TODO refractor/group this together static inline ehci_link_t* get_period_head(uint8_t hostid, uint8_t interval_ms) { - return (ehci_link_t*) (&ehci_data.period_head_arr[ hostid_to_data_idx(hostid) ] - [ tu_log2( tu_min8(EHCI_FRAMELIST_SIZE, interval_ms) ) ] ); + return (ehci_link_t*) &ehci_data.period_head_arr[ tu_log2( tu_min8(EHCI_FRAMELIST_SIZE, interval_ms) ) ]; } #endif diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index f5180402b..881ec4233 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -450,12 +450,12 @@ typedef volatile struct { //--------------------------------------------------------------------+ typedef struct { //------------- Static Async/Period List Head, Each for one controller -------------// - ehci_qhd_t async_head[CONTROLLER_HOST_NUMBER]; /// head qhd of async list, also is used as control endpoint for address 0 + ehci_qhd_t async_head; /// head qhd of async list, also is used as control endpoint for address 0 #if EHCI_PERIODIC_LIST // for NXP ECHI, only implement 1 ms & 2 ms & 4 ms, 8 ms (framelist) // [0] : 1ms, [1] : 2ms, [2] : 4ms, [3] : 8 ms - ehci_qhd_t period_head_arr[CONTROLLER_HOST_NUMBER][4]; + ehci_qhd_t period_head_arr[4]; #endif //------------- Data for Address 0 (use async head as its queue head) -------------// diff --git a/src/host/hcd.h b/src/host/hcd.h index 77d8aa8fc..db80994c0 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -113,8 +113,6 @@ static inline bool pipehandle_is_equal(pipe_handle_t x, pipe_handle_t y) // USBH-HCD API //--------------------------------------------------------------------+ bool hcd_init(void); -void hal_hcd_isr(uint8_t hostid); - void hcd_int_enable (uint8_t rhport); void hcd_int_disable(uint8_t rhport); @@ -128,9 +126,8 @@ void hcd_event_handler(hcd_event_t const* event, bool in_isr); //--------------------------------------------------------------------+ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* ep_desc); bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr); -bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen); - bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]); +bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen); //--------------------------------------------------------------------+ // PIPE API diff --git a/src/portable/nxp/lpc18_43/hal_lpc18_43.c b/src/portable/nxp/lpc18_43/hal_lpc18_43.c index 2978bebf6..48a25f99a 100644 --- a/src/portable/nxp/lpc18_43/hal_lpc18_43.c +++ b/src/portable/nxp/lpc18_43/hal_lpc18_43.c @@ -42,7 +42,8 @@ #include "chip.h" -void hal_dcd_isr(uint8_t rhport); +extern void hal_dcd_isr(uint8_t rhport); +extern void hal_hcd_isr(uint8_t hostid); #if CFG_TUSB_RHPORT0_MODE void USB0_IRQHandler(void) -- cgit v1.3.1 From 607658d047a3c27a096b9f6a25ea0a76f3d8735d Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 7 Dec 2018 23:38:52 +0700 Subject: rename MODE_HOST_SUPPORTED to TUSB_OPT_HOST_ENABLED --- hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c | 2 +- src/class/cdc/cdc_host.c | 2 +- src/class/cdc/cdc_rndis_host.c | 2 +- src/class/custom/custom_host.c | 2 +- src/class/hid/hid_host.c | 2 +- src/class/msc/msc_host.c | 2 +- src/host/ehci/ehci.c | 2 +- src/host/hcd.h | 2 +- src/host/hub.c | 2 +- src/host/ohci/ohci.c | 2 +- src/host/usbh.c | 2 +- src/osal/osal_none.h | 6 +++--- src/portable/nxp/lpc17_40/hal_lpc17_40.c | 2 +- src/portable/nxp/lpc18_43/hal_lpc18_43.c | 4 ++-- src/tusb.c | 4 ++-- src/tusb.h | 2 +- src/tusb_option.h | 11 ++--------- 17 files changed, 22 insertions(+), 29 deletions(-) (limited to 'src/host') diff --git a/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c b/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c index 0c5f5189c..427e8733c 100644 --- a/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c +++ b/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c @@ -148,7 +148,7 @@ void board_init(void) LPC_USB->OTGClkCtrl = clk_en; while ( (LPC_USB->OTGClkSt & clk_en) != clk_en ); -#if MODE_HOST_SUPPORTED +#if TUSB_OPT_HOST_ENABLED // set portfunc to host !!! LPC_USB->StCtrl = 0x3; // should be 1 #endif diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index c4ec88416..8d7c2bd40 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -38,7 +38,7 @@ #include "tusb_option.h" -#if (MODE_HOST_SUPPORTED && CFG_TUH_CDC) +#if (TUSB_OPT_HOST_ENABLED && CFG_TUH_CDC) #define _TINY_USB_SOURCE_FILE_ diff --git a/src/class/cdc/cdc_rndis_host.c b/src/class/cdc/cdc_rndis_host.c index df4a29938..ae61bf8b5 100644 --- a/src/class/cdc/cdc_rndis_host.c +++ b/src/class/cdc/cdc_rndis_host.c @@ -38,7 +38,7 @@ #include "tusb_option.h" -#if (MODE_HOST_SUPPORTED && CFG_TUH_CDC && CFG_TUH_CDC_RNDIS) +#if (TUSB_OPT_HOST_ENABLED && CFG_TUH_CDC && CFG_TUH_CDC_RNDIS) #define _TINY_USB_SOURCE_FILE_ diff --git a/src/class/custom/custom_host.c b/src/class/custom/custom_host.c index 9f0b70afb..2a8206e36 100644 --- a/src/class/custom/custom_host.c +++ b/src/class/custom/custom_host.c @@ -38,7 +38,7 @@ #include "tusb_option.h" -#if (MODE_HOST_SUPPORTED && CFG_TUSB_HOST_CUSTOM_CLASS) +#if (TUSB_OPT_HOST_ENABLED && CFG_TUSB_HOST_CUSTOM_CLASS) #define _TINY_USB_SOURCE_FILE_ diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index 14398aa67..980381bf5 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -38,7 +38,7 @@ #include "tusb_option.h" -#if (MODE_HOST_SUPPORTED && HOST_CLASS_HID) +#if (TUSB_OPT_HOST_ENABLED && HOST_CLASS_HID) #define _TINY_USB_SOURCE_FILE_ //--------------------------------------------------------------------+ diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 0c52011df..57a409ffd 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -38,7 +38,7 @@ #include "tusb_option.h" -#if MODE_HOST_SUPPORTED & CFG_TUH_MSC +#if TUSB_OPT_HOST_ENABLED & CFG_TUH_MSC #define _TINY_USB_SOURCE_FILE_ diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 8e40804d5..d18f19195 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -38,7 +38,7 @@ #include "common/tusb_common.h" -#if MODE_HOST_SUPPORTED && (CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX) +#if TUSB_OPT_HOST_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX) //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ diff --git a/src/host/hcd.h b/src/host/hcd.h index db80994c0..387fbcf1c 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -79,7 +79,7 @@ typedef struct } hcd_event_t; -#if MODE_HOST_SUPPORTED +#if TUSB_OPT_HOST_ENABLED // Max number of endpoints per device enum { HCD_MAX_ENDPOINT = CFG_TUH_HUB + CFG_TUH_HID_KEYBOARD + CFG_TUH_HID_MOUSE + CFG_TUSB_HOST_HID_GENERIC + diff --git a/src/host/hub.c b/src/host/hub.c index 28814ebd7..04618d448 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -38,7 +38,7 @@ #include "tusb_option.h" -#if (MODE_HOST_SUPPORTED && CFG_TUH_HUB) +#if (TUSB_OPT_HOST_ENABLED && CFG_TUH_HUB) #define _TINY_USB_SOURCE_FILE_ diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index 3944d72d0..2c22a3c98 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -38,7 +38,7 @@ #include -#if MODE_HOST_SUPPORTED && (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC40XX) +#if TUSB_OPT_HOST_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC40XX) //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ diff --git a/src/host/usbh.c b/src/host/usbh.c index 4c4fd5319..d97b4b0d3 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -38,7 +38,7 @@ #include "common/tusb_common.h" -#if MODE_HOST_SUPPORTED +#if TUSB_OPT_HOST_ENABLED #define _TINY_USB_SOURCE_FILE_ diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h index 4da5cffc8..ff37113c6 100644 --- a/src/osal/osal_none.h +++ b/src/osal/osal_none.h @@ -134,7 +134,7 @@ extern void dcd_int_disable(uint8_t rhport); extern void dcd_int_enable(uint8_t rhport); #endif -#if MODE_HOST_SUPPORTED +#if TUSB_OPT_HOST_ENABLED extern void hcd_int_disable(uint8_t rhport); extern void hcd_int_enable(uint8_t rhport); #endif @@ -167,7 +167,7 @@ static inline void _osal_q_lock(osal_queue_t qhdl) if (qhdl->role == OPT_MODE_DEVICE) dcd_int_disable(TUD_OPT_RHPORT); #endif -#if MODE_HOST_SUPPORTED +#if TUSB_OPT_HOST_ENABLED if (qhdl->role == OPT_MODE_HOST) hcd_int_disable(TUH_OPT_RHPORT); #endif } @@ -179,7 +179,7 @@ static inline void _osal_q_unlock(osal_queue_t qhdl) if (qhdl->role == OPT_MODE_DEVICE) dcd_int_enable(TUD_OPT_RHPORT); #endif -#if MODE_HOST_SUPPORTED +#if TUSB_OPT_HOST_ENABLED if (qhdl->role == OPT_MODE_HOST) hcd_int_enable(TUH_OPT_RHPORT); #endif } diff --git a/src/portable/nxp/lpc17_40/hal_lpc17_40.c b/src/portable/nxp/lpc17_40/hal_lpc17_40.c index 2acd19f6e..04aebf920 100644 --- a/src/portable/nxp/lpc17_40/hal_lpc17_40.c +++ b/src/portable/nxp/lpc17_40/hal_lpc17_40.c @@ -47,7 +47,7 @@ extern void hal_dcd_isr(uint8_t rhport); void USB_IRQHandler(void) { - #if MODE_HOST_SUPPORTED + #if TUSB_OPT_HOST_ENABLED hal_hcd_isr(0); #endif diff --git a/src/portable/nxp/lpc18_43/hal_lpc18_43.c b/src/portable/nxp/lpc18_43/hal_lpc18_43.c index 48a25f99a..ef3977995 100644 --- a/src/portable/nxp/lpc18_43/hal_lpc18_43.c +++ b/src/portable/nxp/lpc18_43/hal_lpc18_43.c @@ -48,7 +48,7 @@ extern void hal_hcd_isr(uint8_t hostid); #if CFG_TUSB_RHPORT0_MODE void USB0_IRQHandler(void) { - #if MODE_HOST_SUPPORTED + #if TUSB_OPT_HOST_ENABLED hal_hcd_isr(0); #endif @@ -61,7 +61,7 @@ void USB0_IRQHandler(void) #if CFG_TUSB_RHPORT1_MODE void USB1_IRQHandler(void) { - #if MODE_HOST_SUPPORTED + #if TUSB_OPT_HOST_ENABLED hal_hcd_isr(1); #endif diff --git a/src/tusb.c b/src/tusb.c index 931cc0ebe..4f7996664 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -55,7 +55,7 @@ bool tusb_init(void) // skip if already initialized if (_initialized) return true; -#if MODE_HOST_SUPPORTED +#if TUSB_OPT_HOST_ENABLED TU_VERIFY( usbh_init() ); // init host stack #endif @@ -71,7 +71,7 @@ bool tusb_init(void) #if CFG_TUSB_OS == OPT_OS_NONE void tusb_task(void) { - #if MODE_HOST_SUPPORTED + #if TUSB_OPT_HOST_ENABLED usbh_task(NULL); #endif diff --git a/src/tusb.h b/src/tusb.h index e31513f87..4d65c80e1 100644 --- a/src/tusb.h +++ b/src/tusb.h @@ -52,7 +52,7 @@ #include "common/tusb_fifo.h" //------------- HOST -------------// -#if MODE_HOST_SUPPORTED +#if TUSB_OPT_HOST_ENABLED #include "host/usbh.h" #if HOST_CLASS_HID diff --git a/src/tusb_option.h b/src/tusb_option.h index ad5025235..e8baf4149 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -109,13 +109,6 @@ #error "tinyusb does not support same modes on more than 1 roothub port" #endif -// TODO remove -#define CONTROLLER_HOST_NUMBER (\ - ((CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST) ? 1 : 0) + \ - ((CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST) ? 1 : 0)) - -#define MODE_HOST_SUPPORTED (CONTROLLER_HOST_NUMBER > 0) - // Which roothub port is configured as host #define TUH_OPT_RHPORT ( (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST) ? 0 : ((CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST) ? 1 : -1) ) #define TUSB_OPT_HOST_ENABLED ( TUH_OPT_RHPORT >= 0 ) @@ -206,7 +199,7 @@ //-------------------------------------------------------------------- // HOST OPTIONS //-------------------------------------------------------------------- -#if MODE_HOST_SUPPORTED +#if TUSB_OPT_HOST_ENABLED #ifndef CFG_TUSB_HOST_DEVICE_MAX #define CFG_TUSB_HOST_DEVICE_MAX 1 #warning CFG_TUSB_HOST_DEVICE_MAX is not defined, default value is 1 @@ -228,7 +221,7 @@ #endif //------------- CLASS -------------// -#endif // MODE_HOST_SUPPORTED +#endif // TUSB_OPT_HOST_ENABLED //------------------------------------------------------------------ -- cgit v1.3.1 From d3ac4c14a3204c585bdeba8e8f27c8257d1ac826 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 8 Dec 2018 20:51:48 +0700 Subject: refactor hcd api --- src/host/ehci/ehci.c | 4 +-- src/host/hcd.h | 6 +++++ src/host/ohci/ohci.c | 4 +-- src/host/usbh.c | 33 ++++++++++++----------- src/host/usbh_hcd.h | 3 +-- tests/lpc18xx_43xx/test/host/ehci/test_ehci_isr.c | 8 +++--- tests/lpc18xx_43xx/test/host/usbh/test_usbh.c | 10 +++---- 7 files changed, 37 insertions(+), 31 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index d18f19195..00bb444f5 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -609,10 +609,10 @@ static void port_connect_status_change_isr(uint8_t hostid) if (regs->portsc_bit.current_connect_status) { hcd_port_reset(hostid); - usbh_hcd_rhport_plugged_isr(hostid); + hcd_event_device_attach(hostid); }else // device unplugged { - usbh_hcd_rhport_unplugged_isr(hostid); + hcd_event_device_remove(hostid); } } diff --git a/src/host/hcd.h b/src/host/hcd.h index 387fbcf1c..a5ee63c8c 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -121,6 +121,12 @@ void hcd_int_disable(uint8_t rhport); //--------------------------------------------------------------------+ void hcd_event_handler(hcd_event_t const* event, bool in_isr); +// Helper to send device attach event +void hcd_event_device_attach(uint8_t rhport); + +// Helper to send device removal event +void hcd_event_device_remove(uint8_t hostid); + //--------------------------------------------------------------------+ // Endpoints API //--------------------------------------------------------------------+ diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index 2c22a3c98..88296fb82 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -745,10 +745,10 @@ void hal_hcd_isr(uint8_t hostid) { // TODO reset port immediately, without this controller will got 2-3 (debouncing connection status change) OHCI_REG->rhport_status[0] = OHCI_RHPORT_PORT_RESET_STATUS_MASK; - usbh_hcd_rhport_plugged_isr(0); + hcd_event_device_attach(0); }else { - usbh_hcd_rhport_unplugged_isr(0); + hcd_event_device_remove(0); } } diff --git a/src/host/usbh.c b/src/host/usbh.c index d97b4b0d3..c83424c9f 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -305,11 +305,11 @@ void usbh_hub_port_plugged_isr(uint8_t hub_addr, uint8_t hub_port) hcd_event_handler(&event, true); } -void usbh_hcd_rhport_plugged_isr(uint8_t hostid) +void hcd_event_device_attach(uint8_t rhport) { hcd_event_t event = { - .rhport = hostid, + .rhport = rhport, .event_id = HCD_EVENT_DEVICE_ATTACH }; @@ -329,6 +329,21 @@ void hcd_event_handler(hcd_event_t const* event, bool in_isr) } } +void hcd_event_device_remove(uint8_t hostid) +{ + hcd_event_t event = + { + .rhport = hostid, + .event_id = HCD_EVENT_DEVICE_REMOVE + }; + + event.attach.hub_addr = 0; + event.attach.hub_port = 0; + + hcd_event_handler(&event, true); +} + + // a device unplugged on hostid, hub_addr, hub_port // return true if found and unmounted device, false if cannot find static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_port) @@ -369,20 +384,6 @@ static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_ } -void usbh_hcd_rhport_unplugged_isr(uint8_t hostid) -{ - hcd_event_t event = - { - .rhport = hostid, - .event_id = HCD_EVENT_DEVICE_REMOVE - }; - - event.attach.hub_addr = 0; - event.attach.hub_port = 0; - - hcd_event_handler(&event, true); -} - //--------------------------------------------------------------------+ // ENUMERATION TASK //--------------------------------------------------------------------+ diff --git a/src/host/usbh_hcd.h b/src/host/usbh_hcd.h index b4d9adb26..66a0e2d93 100644 --- a/src/host/usbh_hcd.h +++ b/src/host/usbh_hcd.h @@ -94,8 +94,7 @@ extern usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; // including zer // callback from HCD ISR //--------------------------------------------------------------------+ void usbh_xfer_isr(pipe_handle_t pipe_hdl, uint8_t class_code, xfer_result_t event, uint32_t xferred_bytes); -void usbh_hcd_rhport_plugged_isr(uint8_t hostid); -void usbh_hcd_rhport_unplugged_isr(uint8_t hostid); + #ifdef __cplusplus } diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_isr.c b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_isr.c index 58b8f9002..df830512e 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_isr.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_isr.c @@ -70,7 +70,7 @@ void tearDown(void) void test_isr_device_connect_highspeed(void) { - usbh_hcd_rhport_plugged_isr_Expect(hostid); + hcd_event_device_attach_Expect(hostid); //------------- Code Under Test -------------// ehci_controller_device_plug(hostid, TUSB_SPEED_HIGH); @@ -78,7 +78,7 @@ void test_isr_device_connect_highspeed(void) void test_isr_device_connect_fullspeed(void) { - usbh_hcd_rhport_plugged_isr_Expect(hostid); + hcd_event_device_attach_Expect(hostid); //------------- Code Under Test -------------// ehci_controller_device_plug(hostid, TUSB_SPEED_FULL); @@ -86,7 +86,7 @@ void test_isr_device_connect_fullspeed(void) void test_isr_device_connect_slowspeed(void) { - usbh_hcd_rhport_plugged_isr_Expect(hostid); + hcd_event_device_attach_Expect(hostid); //------------- Code Under Test -------------// ehci_controller_device_plug(hostid, TUSB_SPEED_LOW); @@ -94,7 +94,7 @@ void test_isr_device_connect_slowspeed(void) void test_isr_device_disconnect(void) { - usbh_hcd_rhport_unplugged_isr_Expect(hostid); + hcd_event_device_remove_Expect(hostid); //------------- Code Under Test -------------// ehci_controller_device_unplug(hostid); diff --git a/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c b/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c index dde629cf0..db5382e48 100644 --- a/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c +++ b/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c @@ -142,7 +142,7 @@ void test_usbh_init_ok(void) #if 0 // TODO TEST enable this // device is not mounted before, even the control pipe is not open, do nothing -void test_usbh_hcd_rhport_unplugged_isr_device_not_previously_mounted(void) +void test_hcd_event_device_remove_device_not_previously_mounted(void) { uint8_t dev_addr = 1; @@ -151,10 +151,10 @@ void test_usbh_hcd_rhport_unplugged_isr_device_not_previously_mounted(void) _usbh_devices[dev_addr].hub_addr = 0; _usbh_devices[dev_addr].hub_port = 0; - usbh_hcd_rhport_unplugged_isr(0); + hcd_event_device_remove(0); } -void test_usbh_hcd_rhport_unplugged_isr(void) +void test_hcd_event_device_remove(void) { uint8_t dev_addr = 1; @@ -168,7 +168,7 @@ void test_usbh_hcd_rhport_unplugged_isr(void) hcd_pipe_control_close_ExpectAndReturn(dev_addr, TUSB_ERROR_NONE); //------------- Code Under Test -------------// - usbh_hcd_rhport_unplugged_isr(0); + hcd_event_device_remove(0); TEST_ASSERT_EQUAL(TUSB_DEVICE_STATE_REMOVING, _usbh_devices[dev_addr].state); } @@ -190,7 +190,7 @@ void test_usbh_device_unplugged_multple_class(void) hcd_pipe_control_close_ExpectAndReturn(dev_addr, TUSB_ERROR_NONE); //------------- Code Under Test -------------// - usbh_hcd_rhport_unplugged_isr(0); + hcd_event_device_remove(0); TEST_ASSERT_EQUAL(TUSB_DEVICE_STATE_REMOVING, _usbh_devices[dev_addr].state); -- cgit v1.3.1 From f6f0910778be2be2cfa25ef4e00ec2cf40c05fe9 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 8 Dec 2018 20:56:56 +0700 Subject: hub clean up --- src/host/hub.c | 16 +++++++++++--- src/host/usbh.c | 14 ------------ src/host/usbh_hub.h | 64 ----------------------------------------------------- 3 files changed, 13 insertions(+), 81 deletions(-) delete mode 100644 src/host/usbh_hub.h (limited to 'src/host') diff --git a/src/host/hub.c b/src/host/hub.c index 04618d448..bc1434471 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -46,7 +46,6 @@ // INCLUDE //--------------------------------------------------------------------+ #include "hub.h" -#include "usbh_hub.h" //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF @@ -211,6 +210,7 @@ bool hub_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface } // is the response of interrupt endpoint polling +#include "usbh_hcd.h" // FIXME remove void hub_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes) { (void) xferred_bytes; // TODO can be more than 1 for hub with lots of ports @@ -220,10 +220,20 @@ void hub_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes if ( event == XFER_RESULT_SUCCESS ) { for (uint8_t port=1; port <= p_hub->port_number; port++) - { // TODO HUB ignore bit0 hub_status_change + { + // TODO HUB ignore bit0 hub_status_change if ( BIT_TEST_(p_hub->status_change, port) ) { - usbh_hub_port_plugged_isr(pipe_hdl.dev_addr, port); + hcd_event_t event = + { + .rhport = _usbh_devices[pipe_hdl.dev_addr].core_id, + .event_id = HCD_EVENT_DEVICE_ATTACH + }; + + event.attach.hub_addr = pipe_hdl.dev_addr; + event.attach.hub_port = port; + + hcd_event_handler(&event, true); break; // handle one port at a time, next port if any will be handled in the next cycle } } diff --git a/src/host/usbh.c b/src/host/usbh.c index c83424c9f..764203dbf 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -291,20 +291,6 @@ void usbh_xfer_isr(pipe_handle_t pipe_hdl, uint8_t class_code, xfer_result_t eve } } -void usbh_hub_port_plugged_isr(uint8_t hub_addr, uint8_t hub_port) -{ - hcd_event_t event = - { - .rhport = _usbh_devices[hub_addr].core_id, - .event_id = HCD_EVENT_DEVICE_ATTACH - }; - - event.attach.hub_addr = hub_addr; - event.attach.hub_port = hub_port; - - hcd_event_handler(&event, true); -} - void hcd_event_device_attach(uint8_t rhport) { hcd_event_t event = diff --git a/src/host/usbh_hub.h b/src/host/usbh_hub.h deleted file mode 100644 index 48a81bcd2..000000000 --- a/src/host/usbh_hub.h +++ /dev/null @@ -1,64 +0,0 @@ -/**************************************************************************/ -/*! - @file usbh_hub.h - @author hathach (tinyusb.org) - - @section LICENSE - - Software License Agreement (BSD License) - - Copyright (c) 2013, hathach (tinyusb.org) - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - 3. Neither the name of the copyright holders nor the - names of its contributors may be used to endorse or promote products - derived from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY - EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY - DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - - This file is part of the tinyusb stack. -*/ -/**************************************************************************/ - -/** \ingroup group_usbh - * @{ */ - -#ifndef _TUSB_USBH_HUB_H_ -#define _TUSB_USBH_HUB_H_ - -//--------------------------------------------------------------------+ -// INCLUDE -//--------------------------------------------------------------------+ -#include "common/tusb_common.h" - -#ifdef __cplusplus - extern "C" { -#endif - - -void usbh_hub_port_plugged_isr(uint8_t hub_addr, uint8_t hub_port); - - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_USBH_HUB_H_ */ - -/** @} */ -- cgit v1.3.1 From 637285e9ae81b1703dbf38b3e9aac7b4a002a601 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 8 Dec 2018 21:06:54 +0700 Subject: clean up ehci --- src/host/ehci/ehci.c | 23 +++++++---------------- src/host/ehci/ehci.h | 14 +++++++------- src/host/usbh.c | 1 - 3 files changed, 14 insertions(+), 24 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 00bb444f5..1d2ad5787 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -58,12 +58,12 @@ //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION STATIC_VAR ehci_data_t ehci_data; +CFG_TUSB_MEM_SECTION static ehci_data_t ehci_data; #if EHCI_PERIODIC_LIST #if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST) - CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4096) STATIC_VAR ehci_link_t period_frame_list0[EHCI_FRAMELIST_SIZE]; + CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4096) static ehci_link_t period_frame_list0[EHCI_FRAMELIST_SIZE]; #ifndef __ICCARM__ // IAR cannot able to determine the alignment with datalignment pragma TU_VERIFY_STATIC( ALIGN_OF(period_frame_list0) == 4096, "Period Framelist must be 4k alginment"); // validation @@ -87,7 +87,6 @@ CFG_TUSB_MEM_SECTION STATIC_VAR ehci_data_t ehci_data; //--------------------------------------------------------------------+ static inline ehci_registers_t* get_operational_register(uint8_t hostid) ATTR_PURE ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT; static inline ehci_link_t* get_period_frame_list(uint8_t hostid) ATTR_PURE ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT; -static inline uint8_t hostid_to_data_idx(uint8_t hostid) ATTR_ALWAYS_INLINE ATTR_CONST ATTR_WARN_UNUSED_RESULT; static inline ehci_qhd_t* get_async_head(uint8_t hostid) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT; static inline ehci_link_t* get_period_head(uint8_t hostid, uint8_t interval_ms) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT; @@ -259,7 +258,6 @@ static bool ehci_init(uint8_t hostid) | ((EHCI_CFG_FRAMELIST_SIZE_BITS >> 2) << EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB); //------------- ConfigFlag Register (skip) -------------// - regs->portsc_bit.port_power = 1; // enable port power return true; @@ -364,7 +362,6 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) { // FIXME control only for now - return hcd_pipe_control_close(dev_addr); } @@ -710,7 +707,6 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) p_qhd->total_xferred_bytes += p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes; - // if ( XFER_RESULT_FAILED == error_event ) TU_BREAKPOINT(); // TODO skip unplugged device p_qhd->p_qtd_list_head->used = 0; // free QTD @@ -728,11 +724,8 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) p_qhd->qtd_overlay.alternate.terminate = 1; p_qhd->qtd_overlay.halted = 0; - ehci_qtd_t *p_setup = get_control_qtds(p_qhd->device_address); - ehci_qtd_t *p_data = p_setup + 1; - ehci_qtd_t *p_status = p_setup + 2; - - p_setup->used = p_data->used = p_status->used = 0; + ehci_qtd_t *p_setup = get_control_qtds(p_qhd->device_address); + p_setup->used = 0; } // call USBH callback @@ -876,7 +869,7 @@ static inline ehci_link_t* get_period_frame_list(uint8_t hostid) //------------- queue head helper -------------// static inline ehci_qhd_t* get_async_head(uint8_t hostid) { - return &ehci_data.async_head; + return &ehci_data.dev0.qhd; } #if EHCI_PERIODIC_LIST // TODO refractor/group this together @@ -894,10 +887,7 @@ static inline ehci_qhd_t* get_control_qhd(uint8_t dev_addr) } static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr) { - return (dev_addr == 0) ? - ehci_data.addr0_qtd : - ehci_data.device[ dev_addr-1 ].control.qtd; - + return (dev_addr == 0) ? &ehci_data.dev0.qtd : &ehci_data.device[ dev_addr-1 ].control.qtd; } static inline ehci_qhd_t* qhd_find_free (uint8_t dev_addr) @@ -915,6 +905,7 @@ static inline uint8_t qhd_get_index(ehci_qhd_t const * p_qhd) { return p_qhd - ehci_data.device[p_qhd->device_address-1].qhd; } + static inline tusb_xfer_type_t qhd_get_xfer_type(ehci_qhd_t const * p_qhd) { return ( p_qhd->endpoint_number == 0 ) ? TUSB_XFER_CONTROL : diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index 881ec4233..4f6a721fd 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -448,23 +448,23 @@ typedef volatile struct { //--------------------------------------------------------------------+ // EHCI Data Organization //--------------------------------------------------------------------+ -typedef struct { - //------------- Static Async/Period List Head, Each for one controller -------------// - ehci_qhd_t async_head; /// head qhd of async list, also is used as control endpoint for address 0 - +typedef struct +{ #if EHCI_PERIODIC_LIST // for NXP ECHI, only implement 1 ms & 2 ms & 4 ms, 8 ms (framelist) // [0] : 1ms, [1] : 2ms, [2] : 4ms, [3] : 8 ms ehci_qhd_t period_head_arr[4]; #endif - //------------- Data for Address 0 (use async head as its queue head) -------------// - ehci_qtd_t addr0_qtd[3]; + struct { + ehci_qhd_t qhd; // also used as head of async list (each for 1 controller), always exists + ehci_qtd_t qtd; + }dev0; struct { struct { ehci_qhd_t qhd; - ehci_qtd_t qtd[3]; + ehci_qtd_t qtd; }control; ehci_qhd_t qhd[HCD_MAX_ENDPOINT] ; ///< Queue Head Pool diff --git a/src/host/usbh.c b/src/host/usbh.c index 764203dbf..c3a56031f 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -361,7 +361,6 @@ static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_ usbh_pipe_control_close(dev_addr); - is_found = true; } } -- cgit v1.3.1 From 05913a73501c8e2ea1a88299f6b900f92307aaa7 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 9 Dec 2018 12:34:05 +0700 Subject: change usbh class driver open signature --- src/class/cdc/cdc_host.c | 6 +- src/class/cdc/cdc_host.h | 2 +- src/host/ehci/ehci.c | 117 ++++++++++++--------- src/host/ehci/ehci.h | 2 +- src/host/hcd.h | 2 +- src/host/hub.c | 6 +- src/host/hub.h | 2 +- src/host/usbh.c | 30 +++--- src/host/usbh.h | 2 +- src/host/usbh_hcd.h | 2 +- tests/lpc18xx_43xx/test/host/host_helper.h | 2 +- tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c | 24 ++--- tests/support/ehci_controller_fake.c | 4 +- 13 files changed, 111 insertions(+), 90 deletions(-) (limited to 'src/host') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 8d7c2bd40..5e410fbf9 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -134,7 +134,7 @@ void cdch_init(void) tu_memclr(cdch_data, sizeof(cdch_data_t)*CFG_TUSB_HOST_DEVICE_MAX); } -bool cdch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) +bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) { // TODO change following assert to subtask_assert if ( CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL != p_interface_desc->bInterfaceSubClass) return TUSB_ERROR_CDC_UNSUPPORTED_SUBCLASS; @@ -170,7 +170,7 @@ bool cdch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interfac if ( TUSB_DESC_ENDPOINT == p_desc[DESC_OFFSET_TYPE]) { // notification endpoint if any - p_cdc->pipe_notification = hcd_pipe_open(dev_addr, (tusb_desc_endpoint_t const *) p_desc, TUSB_CLASS_CDC); + p_cdc->pipe_notification = hcd_pipe_open(rhport, dev_addr, (tusb_desc_endpoint_t const *) p_desc, TUSB_CLASS_CDC); (*p_length) += p_desc[DESC_OFFSET_LEN]; p_desc = descriptor_next(p_desc); @@ -195,7 +195,7 @@ bool cdch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interfac pipe_handle_t * p_pipe_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_IN_MASK ) ? &p_cdc->pipe_in : &p_cdc->pipe_out; - (*p_pipe_hdl) = hcd_pipe_open(dev_addr, p_endpoint, TUSB_CLASS_CDC); + (*p_pipe_hdl) = hcd_pipe_open(rhport, dev_addr, p_endpoint, TUSB_CLASS_CDC); TU_ASSERT ( pipehandle_is_valid(*p_pipe_hdl) ); (*p_length) += p_desc[DESC_OFFSET_LEN]; diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index 13d7b710c..faf4cfe93 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -150,7 +150,7 @@ typedef struct { extern cdch_data_t cdch_data[CFG_TUSB_HOST_DEVICE_MAX]; // TODO consider to move to cdch internal header file void cdch_init(void); -bool cdch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; +bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; void cdch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); void cdch_close(uint8_t dev_addr); diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 1d2ad5787..dadd377bc 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -100,15 +100,15 @@ static inline ehci_qhd_t* qhd_find_free (uint8_t dev_addr) ATTR_PURE ATTR_ALW static inline tusb_xfer_type_t qhd_get_xfer_type(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; static inline ehci_qhd_t* qhd_get_from_pipe_handle(pipe_handle_t pipe_hdl) ATTR_PURE ATTR_ALWAYS_INLINE; static inline pipe_handle_t qhd_create_pipe_handle(ehci_qhd_t const * p_qhd, tusb_xfer_type_t xfer_type) ATTR_PURE ATTR_ALWAYS_INLINE; + // determine if a queue head has bus-related error -static inline bool qhd_has_xact_error(ehci_qhd_t * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; static inline bool qhd_has_xact_error(ehci_qhd_t * p_qhd) { return ( p_qhd->qtd_overlay.buffer_err ||p_qhd->qtd_overlay.babble_err || p_qhd->qtd_overlay.xact_err ); //p_qhd->qtd_overlay.non_hs_period_missed_uframe || p_qhd->qtd_overlay.pingstate_err TODO split transaction error } -static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_size, uint8_t endpoint_addr, uint8_t xfer_type, uint8_t interval); +static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); static inline ehci_qtd_t* qtd_find_free(uint8_t dev_addr) ATTR_PURE ATTR_ALWAYS_INLINE; @@ -123,7 +123,6 @@ static ehci_link_t* list_find_previous_item(ehci_link_t* p_head, ehci_link_t* p static tusb_error_t list_remove_qhd(ehci_link_t* p_head, ehci_link_t* p_remove); static bool ehci_init(uint8_t hostid); -static tusb_error_t hcd_controller_stop(uint8_t hostid) ATTR_WARN_UNUSED_RESULT ATTR_UNUSED; //--------------------------------------------------------------------+ // USBH-HCD API @@ -279,21 +278,21 @@ static tusb_error_t hcd_controller_stop(uint8_t hostid) //--------------------------------------------------------------------+ // CONTROL PIPE API //--------------------------------------------------------------------+ -bool hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) -{ - ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); - - qhd_init(p_qhd, dev_addr, max_packet_size, 0, TUSB_XFER_CONTROL, 1); // TODO binterval of control is ignored - - if (dev_addr != 0) - { - //------------- insert to async list -------------// - list_insert( (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].core_id), - (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD); - } - - return true; -} +//bool hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) +//{ +// ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); +// +// qhd_init(p_qhd, dev_addr, max_packet_size, 0, TUSB_XFER_CONTROL, 1); // TODO binterval of control is ignored +// +// if (dev_addr != 0) +// { +// //------------- insert to async list -------------// +// list_insert( (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].core_id), +// (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD); +// } +// +// return true; +//} //bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) //{ @@ -345,7 +344,7 @@ bool hcd_pipe_control_close(uint8_t dev_addr) if (dev_addr != 0) { - TU_ASSERT_ERR( list_remove_qhd( (ehci_link_t*) get_async_head( _usbh_devices[dev_addr].core_id ), + TU_ASSERT_ERR( list_remove_qhd( (ehci_link_t*) get_async_head( _usbh_devices[dev_addr].rhport ), (ehci_link_t*) p_qhd) ); } @@ -356,7 +355,9 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* { // FIXME control only for now (void) rhport; - return hcd_pipe_control_open(dev_addr, ep_desc->wMaxPacketSize.size); + hcd_pipe_open(rhport, dev_addr, ep_desc, 0); + + return true; } bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) @@ -418,42 +419,59 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet //--------------------------------------------------------------------+ // BULK/INT/ISO PIPE API //--------------------------------------------------------------------+ -pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_desc_endpoint_t const * p_endpoint_desc, uint8_t class_code) +pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc, uint8_t class_code) { pipe_handle_t const null_handle = { .dev_addr = 0, .xfer_type = 0, .index = 0 }; - TU_ASSERT(dev_addr > 0, null_handle); - - if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) - return null_handle; // TODO not support ISO yet + // TODO not support ISO yet + if (ep_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) return null_handle; //------------- Prepare Queue Head -------------// - ehci_qhd_t * const p_qhd = qhd_find_free(dev_addr); + ehci_qhd_t * p_qhd; + + if ( ep_desc->bEndpointAddress == 0 ) + { + p_qhd = get_control_qhd(dev_addr); + }else + { + p_qhd = qhd_find_free(dev_addr); + } TU_ASSERT(p_qhd, null_handle); - qhd_init( p_qhd, dev_addr, p_endpoint_desc->wMaxPacketSize.size, p_endpoint_desc->bEndpointAddress, - p_endpoint_desc->bmAttributes.xfer, p_endpoint_desc->bInterval ); + qhd_init( p_qhd, dev_addr, ep_desc); p_qhd->class_code = class_code; //------------- Insert to Async List -------------// ehci_link_t * list_head; - if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_BULK) + switch (ep_desc->bmAttributes.xfer) { - list_head = (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].core_id); - } - #if EHCI_PERIODIC_LIST // TODO refractor/group this together - else if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_INTERRUPT) - { - list_head = get_period_head(_usbh_devices[dev_addr].core_id, p_qhd->interval_ms); + case TUSB_XFER_CONTROL: + list_head = (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].rhport); + break; + + case TUSB_XFER_BULK: + list_head = (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].rhport); + break; + + #if EHCI_PERIODIC_LIST // TODO refractor/group this together + case TUSB_XFER_INTERRUPT: + list_head = get_period_head(_usbh_devices[dev_addr].rhport, p_qhd->interval_ms); + break; + #endif + + case TUSB_XFER_ISOCHRONOUS: + // TODO iso is not supported + break; + + default: break; } - #endif - //------------- insert to async/period list TODO might need to disable async/period list -------------// - list_insert( list_head, - (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD); + //------------- insert to async/period list -------------// + // TODO might need to disable async/period list + list_insert( list_head, (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD); - return (pipe_handle_t) { .dev_addr = dev_addr, .xfer_type = p_endpoint_desc->bmAttributes.xfer, .index = qhd_get_index(p_qhd) }; + return (pipe_handle_t) { .dev_addr = dev_addr, .xfer_type = ep_desc->bmAttributes.xfer, .index = qhd_get_index(p_qhd) }; } tusb_error_t hcd_pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) @@ -507,14 +525,14 @@ tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) if ( pipe_hdl.xfer_type == TUSB_XFER_BULK ) { TU_ASSERT_ERR( list_remove_qhd( - (ehci_link_t*) get_async_head( _usbh_devices[pipe_hdl.dev_addr].core_id ), + (ehci_link_t*) get_async_head( _usbh_devices[pipe_hdl.dev_addr].rhport ), (ehci_link_t*) p_qhd) ); } #if EHCI_PERIODIC_LIST // TODO refractor/group this together else { TU_ASSERT_ERR( list_remove_qhd( - get_period_head( _usbh_devices[pipe_hdl.dev_addr].core_id, p_qhd->interval_ms ), + get_period_head( _usbh_devices[pipe_hdl.dev_addr].rhport, p_qhd->interval_ms ), (ehci_link_t*) p_qhd) ); } #endif @@ -882,7 +900,7 @@ static inline ehci_link_t* get_period_head(uint8_t hostid, uint8_t interval_ms) static inline ehci_qhd_t* get_control_qhd(uint8_t dev_addr) { return (dev_addr == 0) ? - get_async_head( _usbh_devices[dev_addr].core_id ) : + get_async_head( _usbh_devices[dev_addr].rhport ) : &ehci_data.device[dev_addr-1].control.qhd; } static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr) @@ -978,7 +996,7 @@ static inline void qtd_insert_to_qhd(ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new) } } -static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_size, uint8_t endpoint_addr, uint8_t xfer_type, uint8_t interval) +static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) { // address 0 is used as async head, which always on the list --> cannot be cleared (ehci halted otherwise) if (dev_addr != 0) @@ -986,14 +1004,17 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_si tu_memclr(p_qhd, sizeof(ehci_qhd_t)); } + uint8_t const xfer_type = ep_desc->bmAttributes.xfer; + uint8_t const interval = ep_desc->bInterval; + p_qhd->device_address = dev_addr; p_qhd->non_hs_period_inactive_next_xact = 0; - p_qhd->endpoint_number = endpoint_addr & 0x0F; + p_qhd->endpoint_number = edpt_number(ep_desc->bEndpointAddress); p_qhd->endpoint_speed = _usbh_devices[dev_addr].speed; p_qhd->data_toggle_control = (xfer_type == TUSB_XFER_CONTROL) ? 1 : 0; p_qhd->head_list_flag = (dev_addr == 0) ? 1 : 0; // addr0's endpoint is the static asyn list head - p_qhd->max_package_size = max_packet_size; - p_qhd->non_hs_control_endpoint = ((TUSB_XFER_CONTROL == xfer_type) && (p_qhd->endpoint_speed != TUSB_SPEED_HIGH)) ? 1 : 0; + p_qhd->max_package_size = ep_desc->wMaxPacketSize.size; + p_qhd->non_hs_control_endpoint = ((xfer_type == TUSB_XFER_CONTROL) && (p_qhd->endpoint_speed != TUSB_SPEED_HIGH)) ? 1 : 0; p_qhd->nak_count_reload = 0; // Bulk/Control -> smask = cmask = 0 @@ -1035,7 +1056,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_si p_qhd->is_removing = 0; p_qhd->p_qtd_list_head = NULL; p_qhd->p_qtd_list_tail = NULL; - p_qhd->pid_non_control = (endpoint_addr & 0x80) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint + p_qhd->pid_non_control = edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint //------------- active, but no TD list -------------// p_qhd->qtd_overlay.halted = 0; diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index 4f6a721fd..b06a6f8b1 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -467,7 +467,7 @@ typedef struct ehci_qtd_t qtd; }control; - ehci_qhd_t qhd[HCD_MAX_ENDPOINT] ; ///< Queue Head Pool + ehci_qhd_t qhd[HCD_MAX_ENDPOINT] ; ///< Queue Head Pool ehci_qtd_t qtd[HCD_MAX_XFER] ATTR_ALIGNED(32) ; ///< Queue Element Transfer Pool // ehci_itd_t itd[EHCI_MAX_ITD] ; ///< Iso Transfer Pool // ehci_sitd_t sitd[EHCI_MAX_SITD] ; ///< Split (FS) Isochronous Transfer Pool diff --git a/src/host/hcd.h b/src/host/hcd.h index a5ee63c8c..6c7a3e98c 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -140,7 +140,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * //--------------------------------------------------------------------+ // TODO control xfer should be used via usbh layer -pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_desc_endpoint_t const * endpoint_desc, uint8_t class_code) ATTR_WARN_UNUSED_RESULT; +pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * endpoint_desc, uint8_t class_code) ATTR_WARN_UNUSED_RESULT; tusb_error_t hcd_pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) ATTR_WARN_UNUSED_RESULT; // only queue, not transferring yet tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) ATTR_WARN_UNUSED_RESULT; tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) /*ATTR_WARN_UNUSED_RESULT*/; diff --git a/src/host/hub.c b/src/host/hub.c index bc1434471..0b909bef0 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -155,7 +155,7 @@ void hub_init(void) // hub_enum_sem_hdl = osal_semaphore_create( OSAL_SEM_REF(hub_enum_semaphore) ); } -bool hub_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) +bool hub_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) { // not support multiple TT yet if ( p_interface_desc->bInterfaceProtocol > 1 ) return false; @@ -167,7 +167,7 @@ bool hub_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType); TU_ASSERT(TUSB_XFER_INTERRUPT == p_endpoint->bmAttributes.xfer); - hub_data[dev_addr-1].pipe_status = hcd_pipe_open(dev_addr, p_endpoint, TUSB_CLASS_HUB); + hub_data[dev_addr-1].pipe_status = hcd_pipe_open(rhport, dev_addr, p_endpoint, TUSB_CLASS_HUB); TU_ASSERT( pipehandle_is_valid(hub_data[dev_addr-1].pipe_status) ); hub_data[dev_addr-1].interface_number = p_interface_desc->bInterfaceNumber; @@ -226,7 +226,7 @@ void hub_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes { hcd_event_t event = { - .rhport = _usbh_devices[pipe_hdl.dev_addr].core_id, + .rhport = _usbh_devices[pipe_hdl.dev_addr].rhport, .event_id = HCD_EVENT_DEVICE_ATTACH }; diff --git a/src/host/hub.h b/src/host/hub.h index b949be384..8d1fece4b 100644 --- a/src/host/hub.h +++ b/src/host/hub.h @@ -195,7 +195,7 @@ tusb_error_t hub_status_pipe_queue(uint8_t dev_addr); #ifdef _TINY_USB_SOURCE_FILE_ void hub_init(void); -bool hub_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; +bool hub_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; void hub_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); void hub_close(uint8_t dev_addr); diff --git a/src/host/usbh.c b/src/host/usbh.c index c3a56031f..4e3643aac 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -193,7 +193,7 @@ bool usbh_init(void) bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8_t* data) { usbh_device_t* dev = &_usbh_devices[dev_addr]; - const uint8_t rhport = dev->core_id; + const uint8_t rhport = dev->rhport; TU_ASSERT(osal_mutex_lock(dev->control.mutex_hdl, OSAL_TIMEOUT_NORMAL)); @@ -242,14 +242,14 @@ tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) .bInterval = 0 }; - hcd_edpt_open(_usbh_devices[dev_addr].core_id, dev_addr, &ep0_desc); + hcd_edpt_open(_usbh_devices[dev_addr].rhport, dev_addr, &ep0_desc); return TUSB_ERROR_NONE; } static inline tusb_error_t usbh_pipe_control_close(uint8_t dev_addr) { - hcd_edpt_close(_usbh_devices[dev_addr].core_id, dev_addr, 0); + hcd_edpt_close(_usbh_devices[dev_addr].rhport, dev_addr, 0); return TUSB_ERROR_NONE; } @@ -338,7 +338,7 @@ static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_ //------------- find the all devices (star-network) under port that is unplugged -------------// for (uint8_t dev_addr = 0; dev_addr <= CFG_TUSB_HOST_DEVICE_MAX; dev_addr ++) { - if (_usbh_devices[dev_addr].core_id == hostid && + if (_usbh_devices[dev_addr].rhport == hostid && (hub_addr == 0 || _usbh_devices[dev_addr].hub_addr == hub_addr) && // hub_addr == 0 & hub_port == 0 means roothub (hub_port == 0 || _usbh_devices[dev_addr].hub_port == hub_port) && _usbh_devices[dev_addr].state != TUSB_DEVICE_STATE_UNPLUG) @@ -365,7 +365,7 @@ static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_ } } - if (is_found) hcd_port_unplug(_usbh_devices[0].core_id); // TODO hack + if (is_found) hcd_port_unplug(_usbh_devices[0].rhport); // TODO hack } @@ -393,7 +393,7 @@ bool enum_task(hcd_event_t* event) usbh_device_t* dev0 = &_usbh_devices[0]; tusb_control_request_t request; - dev0->core_id = event->rhport; // TODO refractor integrate to device_pool + dev0->rhport = event->rhport; // TODO refractor integrate to device_pool dev0->hub_addr = event->attach.hub_addr; dev0->hub_port = event->attach.hub_port; dev0->state = TUSB_DEVICE_STATE_UNPLUG; @@ -401,23 +401,23 @@ bool enum_task(hcd_event_t* event) //------------- connected/disconnected directly with roothub -------------// if ( dev0->hub_addr == 0) { - if( hcd_port_connect_status(dev0->core_id) ) + if( hcd_port_connect_status(dev0->rhport) ) { // connection event osal_task_delay(POWER_STABLE_DELAY); // wait until device is stable. Increase this if the first 8 bytes is failed to get // exit if device unplugged while delaying - if ( !hcd_port_connect_status(dev0->core_id) ) return true; + if ( !hcd_port_connect_status(dev0->rhport) ) return true; - hcd_port_reset( dev0->core_id ); // port must be reset to have correct speed operation + hcd_port_reset( dev0->rhport ); // port must be reset to have correct speed operation osal_task_delay(RESET_DELAY); - dev0->speed = hcd_port_speed_get( dev0->core_id ); + dev0->speed = hcd_port_speed_get( dev0->rhport ); } else { // disconnection event - usbh_device_unplugged(dev0->core_id, 0, 0); + usbh_device_unplugged(dev0->rhport, 0, 0); return true; // restart task } } @@ -447,7 +447,7 @@ bool enum_task(hcd_event_t* event) if ( ! p_port_status->status_current.connect_status ) { // Disconnection event - usbh_device_unplugged(dev0->core_id, dev0->hub_addr, dev0->hub_port); + usbh_device_unplugged(dev0->rhport, dev0->hub_addr, dev0->hub_port); (void) hub_status_pipe_queue( dev0->hub_addr ); // done with hub, waiting for next data on status pipe return true; // restart task @@ -484,7 +484,7 @@ bool enum_task(hcd_event_t* event) { // connected directly to roothub TU_ASSERT(is_ok); // TODO some slow device is observed to fail the very fist controller xfer, can try more times - hcd_port_reset( dev0->core_id ); // reset port after 8 byte descriptor + hcd_port_reset( dev0->rhport ); // reset port after 8 byte descriptor osal_task_delay(RESET_DELAY); } #if CFG_TUH_HUB @@ -518,7 +518,7 @@ bool enum_task(hcd_event_t* event) //------------- update port info & close control pipe of addr0 -------------// usbh_device_t* new_dev = &_usbh_devices[new_addr]; - new_dev->core_id = dev0->core_id; + new_dev->rhport = dev0->rhport; new_dev->hub_addr = dev0->hub_addr; new_dev->hub_port = dev0->hub_port; new_dev->speed = dev0->speed; @@ -606,7 +606,7 @@ bool enum_task(hcd_event_t* event) static uint16_t length; length = 0; - if ( usbh_class_drivers[class_index].open_subtask(new_addr, (tusb_desc_interface_t*) p_desc, &length) ) + if ( usbh_class_drivers[class_index].open_subtask(new_dev->rhport, new_addr, (tusb_desc_interface_t*) p_desc, &length) ) { TU_ASSERT( length >= sizeof(tusb_desc_interface_t) ); new_dev->flag_supported_class |= BIT_(class_index); diff --git a/src/host/usbh.h b/src/host/usbh.h index 039997a24..584d8cdbd 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -65,7 +65,7 @@ typedef enum tusb_interface_status_{ typedef struct { void (* const init) (void); - bool (* const open_subtask)(uint8_t, tusb_desc_interface_t const *, uint16_t*); + bool (* const open_subtask)(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *, uint16_t* outlen); void (* const isr) (pipe_handle_t, xfer_result_t, uint32_t); void (* const close) (uint8_t); } host_class_driver_t; diff --git a/src/host/usbh_hcd.h b/src/host/usbh_hcd.h index 66a0e2d93..7ccbe3a25 100644 --- a/src/host/usbh_hcd.h +++ b/src/host/usbh_hcd.h @@ -57,7 +57,7 @@ //--------------------------------------------------------------------+ typedef struct { //------------- port -------------// - uint8_t core_id; + uint8_t rhport; uint8_t hub_addr; uint8_t hub_port; uint8_t speed; diff --git a/tests/lpc18xx_43xx/test/host/host_helper.h b/tests/lpc18xx_43xx/test/host/host_helper.h index 13996d1ce..183254e7e 100644 --- a/tests/lpc18xx_43xx/test/host/host_helper.h +++ b/tests/lpc18xx_43xx/test/host/host_helper.h @@ -69,7 +69,7 @@ static inline void helper_usbh_init_expect(void) static inline void helper_usbh_device_emulate(uint8_t dev_addr, uint8_t hub_addr, uint8_t hub_port, uint8_t hostid, tusb_speed_t speed) { - _usbh_devices[dev_addr].core_id = hostid; + _usbh_devices[dev_addr].rhport = hostid; _usbh_devices[dev_addr].hub_addr = hub_addr; _usbh_devices[dev_addr].hub_port = hub_port; _usbh_devices[dev_addr].speed = speed; diff --git a/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c b/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c index 5c11c3011..85f9cf813 100644 --- a/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c +++ b/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c @@ -55,7 +55,7 @@ extern usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; extern uint8_t enum_data_buffer[CFG_TUSB_HOST_ENUM_BUFFER_SIZE]; usbh_enumerate_t const enum_connect = { - .core_id = 0, + .rhport = 0, .hub_addr = 0, .hub_port = 0, }; @@ -82,12 +82,12 @@ void setUp(void) osal_mutex_release_IgnoreAndReturn(TUSB_ERROR_NONE); hcd_pipe_control_xfer_StubWithCallback(control_xfer_stub); - hcd_port_connect_status_ExpectAndReturn(enum_connect.core_id, true); + hcd_port_connect_status_ExpectAndReturn(enum_connect.rhport, true); osal_task_delay_Expect(POWER_STABLE_DELAY); - hcd_port_connect_status_ExpectAndReturn(enum_connect.core_id, true); - hcd_port_reset_Expect(enum_connect.core_id); + hcd_port_connect_status_ExpectAndReturn(enum_connect.rhport, true); + hcd_port_reset_Expect(enum_connect.rhport); osal_task_delay_Expect(RESET_DELAY); - hcd_port_speed_get_ExpectAndReturn(enum_connect.core_id, device_speed); + hcd_port_speed_get_ExpectAndReturn(enum_connect.rhport, device_speed); osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl ); osal_mutex_reset_Expect( _usbh_devices[0].control.mutex_hdl ); @@ -229,7 +229,7 @@ void test_addr0_failed_dev_desc(void) void test_addr0_failed_set_address(void) { osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(1)); - hcd_port_reset_Expect( _usbh_devices[0].core_id ); + hcd_port_reset_Expect( _usbh_devices[0].rhport ); osal_task_delay_Expect(RESET_DELAY); // tusbh_device_mount_failed_cb_Expect(TUSB_ERROR_USBH_MOUNT_DEVICE_NOT_RESPOND, NULL); @@ -242,7 +242,7 @@ void test_addr0_failed_set_address(void) void test_enum_failed_get_full_dev_desc(void) { osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(2)); - hcd_port_reset_Expect( _usbh_devices[0].core_id ); + hcd_port_reset_Expect( _usbh_devices[0].rhport ); osal_task_delay_Expect(RESET_DELAY); hcd_pipe_control_close_ExpectAndReturn(0, TUSB_ERROR_NONE); @@ -256,7 +256,7 @@ void test_enum_failed_get_full_dev_desc(void) TEST_ASSERT_EQUAL(TUSB_DEVICE_STATE_UNPLUG, _usbh_devices[0].state); TEST_ASSERT_EQUAL(TUSB_DEVICE_STATE_ADDRESSED, _usbh_devices[1].state); TEST_ASSERT_EQUAL(TUSB_SPEED_FULL, _usbh_devices[1].speed); - TEST_ASSERT_EQUAL(enum_connect.core_id, _usbh_devices[1].core_id); + TEST_ASSERT_EQUAL(enum_connect.rhport, _usbh_devices[1].rhport); TEST_ASSERT_EQUAL(enum_connect.hub_addr, _usbh_devices[1].hub_addr); TEST_ASSERT_EQUAL(enum_connect.hub_port, _usbh_devices[1].hub_port); } @@ -264,7 +264,7 @@ void test_enum_failed_get_full_dev_desc(void) void test_enum_failed_get_9byte_config_desc(void) { osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(3)); - hcd_port_reset_Expect( _usbh_devices[0].core_id ); + hcd_port_reset_Expect( _usbh_devices[0].rhport ); osal_task_delay_Expect(RESET_DELAY); hcd_pipe_control_close_ExpectAndReturn(0, TUSB_ERROR_NONE); osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl ); @@ -284,7 +284,7 @@ void test_enum_failed_get_9byte_config_desc(void) void test_enum_failed_get_full_config_desc(void) { osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(4)); - hcd_port_reset_Expect( _usbh_devices[0].core_id ); + hcd_port_reset_Expect( _usbh_devices[0].rhport ); osal_task_delay_Expect(RESET_DELAY); hcd_pipe_control_close_ExpectAndReturn(0, TUSB_ERROR_NONE); osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl ); @@ -299,7 +299,7 @@ void test_enum_failed_get_full_config_desc(void) void test_enum_parse_config_desc(void) { osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(5)); - hcd_port_reset_Expect( _usbh_devices[0].core_id ); + hcd_port_reset_Expect( _usbh_devices[0].rhport ); osal_task_delay_Expect(RESET_DELAY); hcd_pipe_control_close_ExpectAndReturn(0, TUSB_ERROR_NONE); osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl ); @@ -317,7 +317,7 @@ void test_enum_parse_config_desc(void) void test_enum_set_configure(void) { osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(6)); - hcd_port_reset_Expect( _usbh_devices[0].core_id ); + hcd_port_reset_Expect( _usbh_devices[0].rhport ); osal_task_delay_Expect(RESET_DELAY); hcd_pipe_control_close_ExpectAndReturn(0, TUSB_ERROR_NONE); osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl ); diff --git a/tests/support/ehci_controller_fake.c b/tests/support/ehci_controller_fake.c index 2c6c919a7..eed72e20c 100644 --- a/tests/support/ehci_controller_fake.c +++ b/tests/support/ehci_controller_fake.c @@ -67,7 +67,7 @@ void ehci_controller_init(void) void ehci_controller_control_xfer_proceed(uint8_t dev_addr, uint8_t p_data[]) { - ehci_registers_t* const regs = get_operational_register( _usbh_devices[dev_addr].core_id ); + ehci_registers_t* const regs = get_operational_register( _usbh_devices[dev_addr].rhport ); ehci_qhd_t * p_qhd = get_control_qhd(dev_addr); ehci_qtd_t * p_qtd_setup = get_control_qtds(dev_addr); ehci_qtd_t * p_qtd_data = p_qtd_setup + 1; @@ -86,7 +86,7 @@ void ehci_controller_control_xfer_proceed(uint8_t dev_addr, uint8_t p_data[]) regs->usb_sts = EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_NXP_PERIODIC; - hcd_isr( _usbh_devices[dev_addr].core_id ); + hcd_isr( _usbh_devices[dev_addr].rhport ); } void complete_qtd_in_qhd(ehci_qhd_t *p_qhd) -- cgit v1.3.1 From 6a6e7d0ecb6690c5bc833f6d543c5303b6b52155 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 10 Dec 2018 05:07:22 +0700 Subject: refactor usbh class driver --- src/device/usbd.c | 12 +-- src/host/ehci/ehci.c | 1 + src/host/hcd.h | 2 +- src/host/usbh.c | 227 ++++++++++++++++++++++++++++----------------------- src/host/usbh.h | 3 +- src/host/usbh_hcd.h | 3 + 6 files changed, 138 insertions(+), 110 deletions(-) (limited to 'src/host') diff --git a/src/device/usbd.c b/src/device/usbd.c index 121ee3da9..44bd641dc 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -450,19 +450,19 @@ static bool process_set_config(uint8_t rhport) { if ( usbd_class_drivers[drv_id].class_code == desc_itf->bInterfaceClass ) break; } - TU_ASSERT( drv_id < USBD_CLASS_DRIVER_COUNT ); // unsupported class + TU_ASSERT( drv_id < USBD_CLASS_DRIVER_COUNT ); // Interface number must not be used already TODO alternate interface TU_ASSERT( 0xff == _usbd_dev.itf2drv[desc_itf->bInterfaceNumber] ); _usbd_dev.itf2drv[desc_itf->bInterfaceNumber] = drv_id; - uint16_t len=0; - TU_ASSERT_ERR( usbd_class_drivers[drv_id].open( rhport, desc_itf, &len ), false ); - TU_ASSERT( len >= sizeof(tusb_desc_interface_t) ); + uint16_t itf_len=0; + TU_ASSERT_ERR( usbd_class_drivers[drv_id].open( rhport, desc_itf, &itf_len ), false ); + TU_ASSERT( itf_len >= sizeof(tusb_desc_interface_t) ); - mark_interface_endpoint(p_desc, len, drv_id); + mark_interface_endpoint(p_desc, itf_len, drv_id); - p_desc += len; // next interface + p_desc += itf_len; // next interface } } diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index dadd377bc..49f43a9ad 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -951,6 +951,7 @@ static inline pipe_handle_t qhd_create_pipe_handle(ehci_qhd_t const * p_qhd, tus if (TUSB_XFER_CONTROL != xfer_type) // qhd index for control is meaningless { pipe_hdl.index = qhd_get_index(p_qhd); + pipe_hdl.ep_addr = edpt_addr(p_qhd->endpoint_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0); } return pipe_hdl; diff --git a/src/host/hcd.h b/src/host/hcd.h index 6c7a3e98c..8ee06b2be 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -96,7 +96,7 @@ typedef struct { uint8_t dev_addr; uint8_t xfer_type; uint8_t index; - uint8_t reserved; + uint8_t ep_addr; } pipe_handle_t; static inline bool pipehandle_is_valid(pipe_handle_t pipe_hdl) diff --git a/src/host/usbh.c b/src/host/usbh.c index 4e3643aac..73bcc2e96 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -67,44 +67,49 @@ //--------------------------------------------------------------------+ static host_class_driver_t const usbh_class_drivers[] = { - #if HOST_CLASS_HID - [TUSB_CLASS_HID] = { - .init = hidh_init, - .open_subtask = hidh_open_subtask, - .isr = hidh_isr, - .close = hidh_close + #if CFG_TUH_CDC + { + .class_code = TUSB_CLASS_CDC, + .init = cdch_init, + .open_subtask = cdch_open_subtask, + .isr = cdch_isr, + .close = cdch_close }, #endif - #if CFG_TUH_CDC - [TUSB_CLASS_CDC] = { - .init = cdch_init, - .open_subtask = cdch_open_subtask, - .isr = cdch_isr, - .close = cdch_close + #if CFG_TUH_MSC + { + .class_code = TUSB_CLASS_MSC, + .init = msch_init, + .open_subtask = msch_open_subtask, + .isr = msch_isr, + .close = msch_close }, #endif - #if CFG_TUH_MSC - [TUSB_CLASS_MSC] = { - .init = msch_init, - .open_subtask = msch_open_subtask, - .isr = msch_isr, - .close = msch_close + #if HOST_CLASS_HID + { + .class_code = TUSB_CLASS_HID, + .init = hidh_init, + .open_subtask = hidh_open_subtask, + .isr = hidh_isr, + .close = hidh_close }, #endif #if CFG_TUH_HUB - [TUSB_CLASS_HUB] = { - .init = hub_init, - .open_subtask = hub_open_subtask, - .isr = hub_isr, - .close = hub_close + { + .class_code = TUSB_CLASS_HUB, + .init = hub_init, + .open_subtask = hub_open_subtask, + .isr = hub_isr, + .close = hub_close }, #endif #if CFG_TUSB_HOST_CUSTOM_CLASS - [TUSB_CLASS_MAPPED_INDEX_END-1] = { + { + .class_code = TUSB_CLASS_VENDOR_SPECIFIC, .init = cush_init, .open_subtask = cush_open_subtask, .isr = cush_isr, @@ -134,6 +139,7 @@ CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4) static uint8_t _usbh_ctrl_buf[CFG_TUSB_HOST //------------- Helper Function Prototypes -------------// static inline uint8_t get_new_address(void) ATTR_ALWAYS_INLINE; static inline uint8_t get_configure_number_for_device(tusb_desc_device_t* dev_desc) ATTR_ALWAYS_INLINE; +static void mark_interface_endpoint(int8_t ep2drv[8][2], uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id); //--------------------------------------------------------------------+ // PUBLIC API (Parameter Verification is required) @@ -144,11 +150,6 @@ tusb_device_state_t tuh_device_get_state (uint8_t const dev_addr) return (tusb_device_state_t) _usbh_devices[dev_addr].state; } -uint32_t tuh_device_get_mounted_class_flag(uint8_t dev_addr) -{ - return tuh_device_is_configured(dev_addr) ? _usbh_devices[dev_addr].flag_supported_class : 0; -} - //--------------------------------------------------------------------+ // CLASS-USBD API (don't require to verify parameters) //--------------------------------------------------------------------+ @@ -165,24 +166,21 @@ bool usbh_init(void) //------------- Semaphore, Mutex for Control Pipe -------------// for(uint8_t i=0; icontrol.sem_hdl = osal_semaphore_create(&p_device->control.sem_def); - TU_ASSERT(p_device->control.sem_hdl != NULL); + dev->control.sem_hdl = osal_semaphore_create(&dev->control.sem_def); + TU_ASSERT(dev->control.sem_hdl != NULL); - p_device->control.mutex_hdl = osal_mutex_create(&p_device->control.mutex_def); - TU_ASSERT(p_device->control.mutex_hdl != NULL); - } + dev->control.mutex_hdl = osal_mutex_create(&dev->control.mutex_def); + TU_ASSERT(dev->control.mutex_hdl != NULL); - //------------- class init -------------// - for (uint8_t class_index = 1; class_index < USBH_CLASS_DRIVER_COUNT; class_index++) - { - if (usbh_class_drivers[class_index].init) - { - usbh_class_drivers[class_index].init(); - } + memset(dev->itf2drv, -1, sizeof(dev->itf2drv)); // invalid mapping + memset(dev->ep2drv , -1, sizeof(dev->ep2drv )); // invalid mapping } + // Class drivers init + for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) usbh_class_drivers[drv_id].init(); + TU_ASSERT(hcd_init()); hcd_int_enable(TUH_OPT_RHPORT); @@ -254,40 +252,33 @@ static inline tusb_error_t usbh_pipe_control_close(uint8_t dev_addr) return TUSB_ERROR_NONE; } -// TODO [USBH] unify pipe status get -//tusb_interface_status_t usbh_pipe_status_get(pipe_handle_t pipe_hdl) -//{ -// return TUSB_INTERFACE_STATUS_BUSY; -//} - -static inline uint8_t std_class_code_to_index(uint8_t std_class_code) -{ - return (std_class_code <= TUSB_CLASS_AUDIO_VIDEO ) ? std_class_code : - (std_class_code == TUSB_CLASS_DIAGNOSTIC ) ? TUSB_CLASS_MAPPED_INDEX_START : - (std_class_code == TUSB_CLASS_WIRELESS_CONTROLLER ) ? TUSB_CLASS_MAPPED_INDEX_START + 1 : - (std_class_code == TUSB_CLASS_MISC ) ? TUSB_CLASS_MAPPED_INDEX_START + 2 : - (std_class_code == TUSB_CLASS_APPLICATION_SPECIFIC ) ? TUSB_CLASS_MAPPED_INDEX_START + 3 : - (std_class_code == TUSB_CLASS_VENDOR_SPECIFIC ) ? TUSB_CLASS_MAPPED_INDEX_START + 4 : 0; -} - //--------------------------------------------------------------------+ // USBH-HCD ISR/Callback API //--------------------------------------------------------------------+ // interrupt caused by a TD (with IOC=1) in pipe of class class_code void usbh_xfer_isr(pipe_handle_t pipe_hdl, uint8_t class_code, xfer_result_t event, uint32_t xferred_bytes) { - uint8_t class_index = std_class_code_to_index(class_code); + usbh_device_t* dev = &_usbh_devices[ pipe_hdl.dev_addr ]; + if (TUSB_XFER_CONTROL == pipe_hdl.xfer_type) { - _usbh_devices[ pipe_hdl.dev_addr ].control.pipe_status = event; + dev->control.pipe_status = event; // usbh_devices[ pipe_hdl.dev_addr ].control.xferred_bytes = xferred_bytes; not yet neccessary - osal_semaphore_post( _usbh_devices[ pipe_hdl.dev_addr ].control.sem_hdl, true ); - }else if (usbh_class_drivers[class_index].isr) - { - usbh_class_drivers[class_index].isr(pipe_hdl, event, xferred_bytes); - }else + osal_semaphore_post( dev->control.sem_hdl, true ); + } + else { - TU_ASSERT(false, ); // something wrong, no one claims the isr's source + int8_t drv_id = dev->ep2drv[edpt_number(pipe_hdl.ep_addr)][edpt_dir(pipe_hdl.ep_addr)]; + TU_ASSERT(drv_id >= 0, ); + + if (usbh_class_drivers[drv_id].isr) + { + usbh_class_drivers[drv_id].isr(pipe_hdl, event, xferred_bytes); + } + else + { + TU_ASSERT(false, ); // something wrong, no one claims the isr's source + } } } @@ -338,26 +329,24 @@ static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_ //------------- find the all devices (star-network) under port that is unplugged -------------// for (uint8_t dev_addr = 0; dev_addr <= CFG_TUSB_HOST_DEVICE_MAX; dev_addr ++) { - if (_usbh_devices[dev_addr].rhport == hostid && - (hub_addr == 0 || _usbh_devices[dev_addr].hub_addr == hub_addr) && // hub_addr == 0 & hub_port == 0 means roothub - (hub_port == 0 || _usbh_devices[dev_addr].hub_port == hub_port) && - _usbh_devices[dev_addr].state != TUSB_DEVICE_STATE_UNPLUG) + usbh_device_t* dev = &_usbh_devices[dev_addr]; + + if (dev->rhport == hostid && + (hub_addr == 0 || dev->hub_addr == hub_addr) && // hub_addr == 0 & hub_port == 0 means roothub + (hub_port == 0 || dev->hub_port == hub_port) && + dev->state != TUSB_DEVICE_STATE_UNPLUG) { // TODO Hub multiple level - for (uint8_t class_index = 1; class_index < USBH_CLASS_DRIVER_COUNT; class_index++) - { - if ((_usbh_devices[dev_addr].flag_supported_class & BIT_(class_index)) && - usbh_class_drivers[class_index].close) - { - usbh_class_drivers[class_index].close(dev_addr); - } - } + // Close class driver + for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) usbh_class_drivers[drv_id].close(dev_addr); // TODO refractor // set to REMOVING to allow HCD to clean up its cached data for this device // HCD must set this device's state to TUSB_DEVICE_STATE_UNPLUG when done - _usbh_devices[dev_addr].state = TUSB_DEVICE_STATE_REMOVING; - _usbh_devices[dev_addr].flag_supported_class = 0; + dev->state = TUSB_DEVICE_STATE_REMOVING; + + memset(dev->itf2drv, -1, sizeof(dev->itf2drv)); // invalid mapping + memset(dev->ep2drv , -1, sizeof(dev->ep2drv )); // invalid mapping usbh_pipe_control_close(dev_addr); @@ -388,7 +377,6 @@ bool enum_task(hcd_event_t* event) // for OSAL_NONE local variable won't retain value after blocking service sem_wait/queue_recv static uint8_t configure_selected = 1; // TODO move - static uint8_t *p_desc = NULL; // TODO move usbh_device_t* dev0 = &_usbh_devices[0]; tusb_control_request_t request; @@ -583,41 +571,55 @@ bool enum_task(hcd_event_t* event) //------------- TODO Get String Descriptors -------------// //------------- parse configuration & install drivers -------------// - p_desc = _usbh_ctrl_buf + sizeof(tusb_desc_configuration_t); + uint8_t const* p_desc = _usbh_ctrl_buf + sizeof(tusb_desc_configuration_t); // parse each interfaces while( p_desc < _usbh_ctrl_buf + ((tusb_desc_configuration_t*)_usbh_ctrl_buf)->wTotalLength ) { // skip until we see interface descriptor - if ( TUSB_DESC_INTERFACE != p_desc[DESC_OFFSET_TYPE] ) + if ( TUSB_DESC_INTERFACE != descriptor_type(p_desc) ) { - p_desc += p_desc[DESC_OFFSET_LEN]; // skip the descriptor, increase by the descriptor's length + p_desc = descriptor_next(p_desc); // skip the descriptor, increase by the descriptor's length }else { - static uint8_t class_index; // has to be static as it is used to call class's open_subtask - - class_index = std_class_code_to_index( ((tusb_desc_interface_t*) p_desc)->bInterfaceClass ); - TU_ASSERT( class_index != 0 ); // class_index == 0 means corrupted data, abort enumeration + tusb_desc_interface_t* desc_itf = (tusb_desc_interface_t*) p_desc; - if (usbh_class_drivers[class_index].open_subtask && - !(class_index == TUSB_CLASS_HUB && new_dev->hub_addr != 0)) + // Check if class is supported + uint8_t drv_id; + for (drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) + { + if ( usbh_class_drivers[drv_id].class_code == desc_itf->bInterfaceClass ) break; + } + + if( drv_id >= USBH_CLASS_DRIVER_COUNT ) + { + // skip unsupported class + p_desc = descriptor_next(p_desc); + } + else { - // supported class, TODO Hub disable multiple level - static uint16_t length; - length = 0; + // Interface number must not be used already TODO alternate interface + TU_ASSERT( new_dev->itf2drv[desc_itf->bInterfaceNumber] < 0 ); + new_dev->itf2drv[desc_itf->bInterfaceNumber] = drv_id; - if ( usbh_class_drivers[class_index].open_subtask(new_dev->rhport, new_addr, (tusb_desc_interface_t*) p_desc, &length) ) + if (desc_itf->bInterfaceClass == TUSB_CLASS_HUB && new_dev->hub_addr != 0) { - TU_ASSERT( length >= sizeof(tusb_desc_interface_t) ); - new_dev->flag_supported_class |= BIT_(class_index); - p_desc += length; - }else // Interface open failed, for example a subclass is not supported + // TODO Attach hub to Hub is not currently supported + // skip this interface + p_desc = descriptor_next(p_desc); + } + else { - p_desc += p_desc[DESC_OFFSET_LEN]; // skip this interface, the rest will be skipped by the above loop + uint16_t itf_len = 0; + + if ( usbh_class_drivers[drv_id].open_subtask(new_dev->rhport, new_addr, desc_itf, &itf_len) ) + { + mark_interface_endpoint(new_dev->ep2drv, p_desc, itf_len, drv_id); + } + + TU_ASSERT( itf_len >= sizeof(tusb_desc_interface_t) ); + p_desc += itf_len; } - } else // unsupported class (not enable or yet implemented) - { - p_desc += p_desc[DESC_OFFSET_LEN]; // skip this interface, the rest will be skipped by the above loop } } } @@ -692,4 +694,25 @@ static inline uint8_t get_configure_number_for_device(tusb_desc_device_t* dev_de return config_num; } +// Helper marking endpoint of interface belongs to class driver +// TODO merge with usbd +static void mark_interface_endpoint(int8_t ep2drv[8][2], uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id) +{ + uint16_t len = 0; + + while( len < desc_len ) + { + if ( TUSB_DESC_ENDPOINT == descriptor_type(p_desc) ) + { + uint8_t const ep_addr = ((tusb_desc_endpoint_t const*) p_desc)->bEndpointAddress; + + ep2drv[ edpt_number(ep_addr) ][ edpt_dir(ep_addr) ] = driver_id; + } + + len += descriptor_len(p_desc); + p_desc = descriptor_next(p_desc); + } +} + + #endif diff --git a/src/host/usbh.h b/src/host/usbh.h index 584d8cdbd..b04328e40 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -64,6 +64,8 @@ typedef enum tusb_interface_status_{ } tusb_interface_status_t; typedef struct { + uint8_t class_code; + void (* const init) (void); bool (* const open_subtask)(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *, uint16_t* outlen); void (* const isr) (pipe_handle_t, xfer_result_t, uint32_t); @@ -83,7 +85,6 @@ static inline bool tuh_device_is_configured(uint8_t dev_addr) { return tuh_device_get_state(dev_addr) == TUSB_DEVICE_STATE_CONFIGURED; } -uint32_t tuh_device_get_mounted_class_flag(uint8_t dev_addr); //--------------------------------------------------------------------+ // APPLICATION CALLBACK diff --git a/src/host/usbh_hcd.h b/src/host/usbh_hcd.h index 7ccbe3a25..398c61112 100644 --- a/src/host/usbh_hcd.h +++ b/src/host/usbh_hcd.h @@ -86,6 +86,9 @@ typedef struct { osal_mutex_def_t mutex_def; osal_mutex_t mutex_hdl; // used to exclusively occupy control pipe } control; + + int8_t itf2drv[16]; // map interface number to driver (negative is invalid) + int8_t ep2drv[8][2]; // map endpoint to driver ( negative is invalid ) } usbh_device_t; extern usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; // including zero-address -- cgit v1.3.1 From ac67e0ea3fdb7e3121b82335268a00133bd4b660 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 10 Dec 2018 05:15:49 +0700 Subject: clean up --- src/device/usbd.c | 14 +++++++------- src/host/usbh.c | 18 +++++++++--------- src/host/usbh_hcd.h | 4 ++-- 3 files changed, 18 insertions(+), 18 deletions(-) (limited to 'src/host') diff --git a/src/device/usbd.c b/src/device/usbd.c index 44bd641dc..5262d6c73 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -68,7 +68,7 @@ typedef struct { uint8_t config_num; uint8_t itf2drv[16]; // map interface number to driver (0xff is invalid) - uint8_t ep2drv[2][8]; // map endpoint to driver ( 0xff is invalid ) + uint8_t ep2drv[8][2]; // map endpoint to driver ( 0xff is invalid ) }usbd_device_t; @@ -169,7 +169,7 @@ static osal_queue_t _usbd_q; //--------------------------------------------------------------------+ // Prototypes //--------------------------------------------------------------------+ -static void mark_interface_endpoint(uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id); +static void mark_interface_endpoint(uint8_t ep2drv[8][2], uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id); static bool process_control_request(uint8_t rhport, tusb_control_request_t const * p_request); static bool process_set_config(uint8_t rhport); static void const* get_descriptor(tusb_control_request_t const * p_request, uint16_t* desc_len); @@ -253,7 +253,7 @@ static void usbd_task_body(void) } else { - uint8_t const drv_id = _usbd_dev.ep2drv[edpt_dir(ep_addr)][edpt_number(ep_addr)]; + uint8_t const drv_id = _usbd_dev.ep2drv[edpt_number(ep_addr)][edpt_dir(ep_addr)]; TU_ASSERT(drv_id < USBD_CLASS_DRIVER_COUNT,); usbd_class_drivers[drv_id].xfer_cb(event.rhport, ep_addr, event.xfer_complete.result, event.xfer_complete.len); @@ -375,7 +375,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const uint8_t const itf = tu_u16_low(p_request->wIndex); uint8_t const drvid = _usbd_dev.itf2drv[ itf ]; - TU_VERIFY (drvid < USBD_CLASS_DRIVER_COUNT ); + TU_VERIFY(drvid < USBD_CLASS_DRIVER_COUNT); usbd_control_set_complete_callback(usbd_class_drivers[drvid].control_request_complete ); @@ -460,7 +460,7 @@ static bool process_set_config(uint8_t rhport) TU_ASSERT_ERR( usbd_class_drivers[drv_id].open( rhport, desc_itf, &itf_len ), false ); TU_ASSERT( itf_len >= sizeof(tusb_desc_interface_t) ); - mark_interface_endpoint(p_desc, itf_len, drv_id); + mark_interface_endpoint(_usbd_dev.ep2drv, p_desc, itf_len, drv_id); p_desc += itf_len; // next interface } @@ -473,7 +473,7 @@ static bool process_set_config(uint8_t rhport) } // Helper marking endpoint of interface belongs to class driver -static void mark_interface_endpoint(uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id) +static void mark_interface_endpoint(uint8_t ep2drv[8][2], uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id) { uint16_t len = 0; @@ -483,7 +483,7 @@ static void mark_interface_endpoint(uint8_t const* p_desc, uint16_t desc_len, ui { uint8_t const ep_addr = ((tusb_desc_endpoint_t const*) p_desc)->bEndpointAddress; - _usbd_dev.ep2drv[ edpt_dir(ep_addr) ][ edpt_number(ep_addr) ] = driver_id; + ep2drv[edpt_number(ep_addr)][edpt_dir(ep_addr)] = driver_id; } len += descriptor_len(p_desc); diff --git a/src/host/usbh.c b/src/host/usbh.c index 73bcc2e96..7be0376c0 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -139,7 +139,7 @@ CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4) static uint8_t _usbh_ctrl_buf[CFG_TUSB_HOST //------------- Helper Function Prototypes -------------// static inline uint8_t get_new_address(void) ATTR_ALWAYS_INLINE; static inline uint8_t get_configure_number_for_device(tusb_desc_device_t* dev_desc) ATTR_ALWAYS_INLINE; -static void mark_interface_endpoint(int8_t ep2drv[8][2], uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id); +static void mark_interface_endpoint(uint8_t ep2drv[8][2], uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id); //--------------------------------------------------------------------+ // PUBLIC API (Parameter Verification is required) @@ -174,8 +174,8 @@ bool usbh_init(void) dev->control.mutex_hdl = osal_mutex_create(&dev->control.mutex_def); TU_ASSERT(dev->control.mutex_hdl != NULL); - memset(dev->itf2drv, -1, sizeof(dev->itf2drv)); // invalid mapping - memset(dev->ep2drv , -1, sizeof(dev->ep2drv )); // invalid mapping + memset(dev->itf2drv, 0xff, sizeof(dev->itf2drv)); // invalid mapping + memset(dev->ep2drv , 0xff, sizeof(dev->ep2drv )); // invalid mapping } // Class drivers init @@ -268,8 +268,8 @@ void usbh_xfer_isr(pipe_handle_t pipe_hdl, uint8_t class_code, xfer_result_t eve } else { - int8_t drv_id = dev->ep2drv[edpt_number(pipe_hdl.ep_addr)][edpt_dir(pipe_hdl.ep_addr)]; - TU_ASSERT(drv_id >= 0, ); + uint8_t drv_id = dev->ep2drv[edpt_number(pipe_hdl.ep_addr)][edpt_dir(pipe_hdl.ep_addr)]; + TU_ASSERT(drv_id < USBH_CLASS_DRIVER_COUNT, ); if (usbh_class_drivers[drv_id].isr) { @@ -345,8 +345,8 @@ static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_ // HCD must set this device's state to TUSB_DEVICE_STATE_UNPLUG when done dev->state = TUSB_DEVICE_STATE_REMOVING; - memset(dev->itf2drv, -1, sizeof(dev->itf2drv)); // invalid mapping - memset(dev->ep2drv , -1, sizeof(dev->ep2drv )); // invalid mapping + memset(dev->itf2drv, 0xff, sizeof(dev->itf2drv)); // invalid mapping + memset(dev->ep2drv , 0xff, sizeof(dev->ep2drv )); // invalid mapping usbh_pipe_control_close(dev_addr); @@ -599,7 +599,7 @@ bool enum_task(hcd_event_t* event) else { // Interface number must not be used already TODO alternate interface - TU_ASSERT( new_dev->itf2drv[desc_itf->bInterfaceNumber] < 0 ); + TU_ASSERT( new_dev->itf2drv[desc_itf->bInterfaceNumber] == 0xff ); new_dev->itf2drv[desc_itf->bInterfaceNumber] = drv_id; if (desc_itf->bInterfaceClass == TUSB_CLASS_HUB && new_dev->hub_addr != 0) @@ -696,7 +696,7 @@ static inline uint8_t get_configure_number_for_device(tusb_desc_device_t* dev_de // Helper marking endpoint of interface belongs to class driver // TODO merge with usbd -static void mark_interface_endpoint(int8_t ep2drv[8][2], uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id) +static void mark_interface_endpoint(uint8_t ep2drv[8][2], uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id) { uint16_t len = 0; diff --git a/src/host/usbh_hcd.h b/src/host/usbh_hcd.h index 398c61112..8af454b1a 100644 --- a/src/host/usbh_hcd.h +++ b/src/host/usbh_hcd.h @@ -87,8 +87,8 @@ typedef struct { osal_mutex_t mutex_hdl; // used to exclusively occupy control pipe } control; - int8_t itf2drv[16]; // map interface number to driver (negative is invalid) - int8_t ep2drv[8][2]; // map endpoint to driver ( negative is invalid ) + uint8_t itf2drv[16]; // map interface number to driver (0xff is invalid) + uint8_t ep2drv[8][2]; // map endpoint to driver ( 0xff is invalid ) } usbh_device_t; extern usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; // including zero-address -- cgit v1.3.1 From 8ef93ef85dfa68916706a25fecd8590ffad11dc2 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 10 Dec 2018 05:19:08 +0700 Subject: usbh remove class code in xfer isr callback --- src/host/ehci/ehci.c | 8 ++------ src/host/ehci/ehci.h | 4 ++-- src/host/usbh.c | 2 +- src/host/usbh_hcd.h | 2 +- 4 files changed, 6 insertions(+), 10 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 49f43a9ad..387de5e85 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -439,7 +439,6 @@ pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint TU_ASSERT(p_qhd, null_handle); qhd_init( p_qhd, dev_addr, ep_desc); - p_qhd->class_code = class_code; //------------- Insert to Async List -------------// ehci_link_t * list_head; @@ -649,8 +648,7 @@ static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd) if (is_ioc) // end of request { // call USBH callback - usbh_xfer_isr( qhd_create_pipe_handle(p_qhd, xfer_type), - p_qhd->class_code, XFER_RESULT_SUCCESS, + usbh_xfer_isr( qhd_create_pipe_handle(p_qhd, xfer_type), XFER_RESULT_SUCCESS, p_qhd->total_xferred_bytes - (xfer_type == TUSB_XFER_CONTROL ? 8 : 0) ); // subtract setup packet size if control, p_qhd->total_xferred_bytes = 0; } @@ -747,9 +745,7 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) } // call USBH callback - usbh_xfer_isr( qhd_create_pipe_handle(p_qhd, xfer_type), - p_qhd->class_code, error_event, - p_qhd->total_xferred_bytes); + usbh_xfer_isr( qhd_create_pipe_handle(p_qhd, xfer_type), error_event, p_qhd->total_xferred_bytes); p_qhd->total_xferred_bytes = 0; } diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index b06a6f8b1..47d007390 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -192,11 +192,11 @@ typedef struct ATTR_ALIGNED(32) { uint8_t used; uint8_t is_removing; uint8_t pid_non_control; - uint8_t class_code; + uint8_t reserved1; uint16_t total_xferred_bytes; // number of bytes xferred until a qtd with ioc bit set uint8_t interval_ms; // polling interval in frames (or milisecond) - uint8_t reserved; + uint8_t reserved2; ehci_qtd_t * volatile p_qtd_list_head; // head of the scheduled TD list ehci_qtd_t * volatile p_qtd_list_tail; // tail of the scheduled TD list diff --git a/src/host/usbh.c b/src/host/usbh.c index 7be0376c0..ff80ee78d 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -256,7 +256,7 @@ static inline tusb_error_t usbh_pipe_control_close(uint8_t dev_addr) // USBH-HCD ISR/Callback API //--------------------------------------------------------------------+ // interrupt caused by a TD (with IOC=1) in pipe of class class_code -void usbh_xfer_isr(pipe_handle_t pipe_hdl, uint8_t class_code, xfer_result_t event, uint32_t xferred_bytes) +void usbh_xfer_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes) { usbh_device_t* dev = &_usbh_devices[ pipe_hdl.dev_addr ]; diff --git a/src/host/usbh_hcd.h b/src/host/usbh_hcd.h index 8af454b1a..ce4469233 100644 --- a/src/host/usbh_hcd.h +++ b/src/host/usbh_hcd.h @@ -96,7 +96,7 @@ extern usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; // including zer //--------------------------------------------------------------------+ // callback from HCD ISR //--------------------------------------------------------------------+ -void usbh_xfer_isr(pipe_handle_t pipe_hdl, uint8_t class_code, xfer_result_t event, uint32_t xferred_bytes); +void usbh_xfer_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); #ifdef __cplusplus -- cgit v1.3.1 From 75baedf27d09e57deb9d88cc7c82d95b0d530bca Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 10 Dec 2018 05:33:25 +0700 Subject: removing pipe handle, remove xfer type --- src/host/ehci/ehci.c | 32 ++++++++++++++------------------ src/host/ehci/ehci.h | 2 +- src/host/hcd.h | 4 ++-- src/host/usbh.c | 5 +++-- 4 files changed, 20 insertions(+), 23 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 387de5e85..2186bfcdf 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -99,7 +99,7 @@ static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLI static inline ehci_qhd_t* qhd_find_free (uint8_t dev_addr) ATTR_PURE ATTR_ALWAYS_INLINE; static inline tusb_xfer_type_t qhd_get_xfer_type(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; static inline ehci_qhd_t* qhd_get_from_pipe_handle(pipe_handle_t pipe_hdl) ATTR_PURE ATTR_ALWAYS_INLINE; -static inline pipe_handle_t qhd_create_pipe_handle(ehci_qhd_t const * p_qhd, tusb_xfer_type_t xfer_type) ATTR_PURE ATTR_ALWAYS_INLINE; +static inline pipe_handle_t qhd_create_pipe_handle(ehci_qhd_t const * p_qhd); // determine if a queue head has bus-related error static inline bool qhd_has_xact_error(ehci_qhd_t * p_qhd) @@ -421,7 +421,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet //--------------------------------------------------------------------+ pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc, uint8_t class_code) { - pipe_handle_t const null_handle = { .dev_addr = 0, .xfer_type = 0, .index = 0 }; + pipe_handle_t const null_handle = { .dev_addr = 0, .index = 0 }; // TODO not support ISO yet if (ep_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) return null_handle; @@ -470,7 +470,7 @@ pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint // TODO might need to disable async/period list list_insert( list_head, (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD); - return (pipe_handle_t) { .dev_addr = dev_addr, .xfer_type = ep_desc->bmAttributes.xfer, .index = qhd_get_index(p_qhd) }; + return (pipe_handle_t) { .dev_addr = dev_addr, .index = qhd_get_index(p_qhd) }; } tusb_error_t hcd_pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) @@ -512,8 +512,6 @@ tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) { TU_ASSERT(pipe_hdl.dev_addr > 0, TUSB_ERROR_INVALID_PARA); - TU_ASSERT(pipe_hdl.xfer_type != TUSB_XFER_ISOCHRONOUS, TUSB_ERROR_INVALID_PARA); - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle( pipe_hdl ); // async list needs async advance handshake to make sure host controller has released cached data @@ -521,7 +519,7 @@ tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) // period list queue element is guarantee to be free in the next frame (1 ms) p_qhd->is_removing = 1; // TODO redundant, only apply to control queue head - if ( pipe_hdl.xfer_type == TUSB_XFER_BULK ) + if ( p_qhd->xfer_type == TUSB_XFER_BULK ) { TU_ASSERT_ERR( list_remove_qhd( (ehci_link_t*) get_async_head( _usbh_devices[pipe_hdl.dev_addr].rhport ), @@ -633,7 +631,6 @@ static void port_connect_status_change_isr(uint8_t hostid) static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd) { uint8_t max_loop = 0; - tusb_xfer_type_t const xfer_type = qhd_get_xfer_type(p_qhd); // free all TDs from the head td to the first active TD while(p_qhd->p_qtd_list_head != NULL && !p_qhd->p_qtd_list_head->active @@ -646,10 +643,11 @@ static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd) p_qhd->p_qtd_list_head->used = 0; // free QTD qtd_remove_1st_from_qhd(p_qhd); - if (is_ioc) // end of request - { // call USBH callback - usbh_xfer_isr( qhd_create_pipe_handle(p_qhd, xfer_type), XFER_RESULT_SUCCESS, - p_qhd->total_xferred_bytes - (xfer_type == TUSB_XFER_CONTROL ? 8 : 0) ); // subtract setup packet size if control, + if (is_ioc) + { + // end of request + // call USBH callback + usbh_xfer_isr( qhd_create_pipe_handle(p_qhd), XFER_RESULT_SUCCESS, p_qhd->total_xferred_bytes); p_qhd->total_xferred_bytes = 0; } @@ -728,10 +726,8 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) p_qhd->p_qtd_list_head->used = 0; // free QTD qtd_remove_1st_from_qhd(p_qhd); - if ( TUSB_XFER_CONTROL == xfer_type ) + if ( 0 == p_qhd->endpoint_number ) { - p_qhd->total_xferred_bytes -= tu_min8(8, p_qhd->total_xferred_bytes); // subtract setup size - // control cannot be halted --> clear all qtd list p_qhd->p_qtd_list_head = NULL; p_qhd->p_qtd_list_tail = NULL; @@ -745,7 +741,7 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) } // call USBH callback - usbh_xfer_isr( qhd_create_pipe_handle(p_qhd, xfer_type), error_event, p_qhd->total_xferred_bytes); + usbh_xfer_isr( qhd_create_pipe_handle(p_qhd), error_event, p_qhd->total_xferred_bytes); p_qhd->total_xferred_bytes = 0; } @@ -936,15 +932,14 @@ static inline ehci_qhd_t* qhd_get_from_pipe_handle(pipe_handle_t pipe_hdl) return &ehci_data.device[ pipe_hdl.dev_addr-1 ].qhd[ pipe_hdl.index ]; } -static inline pipe_handle_t qhd_create_pipe_handle(ehci_qhd_t const * p_qhd, tusb_xfer_type_t xfer_type) +static inline pipe_handle_t qhd_create_pipe_handle(ehci_qhd_t const * p_qhd) { pipe_handle_t pipe_hdl = { .dev_addr = p_qhd->device_address, - .xfer_type = xfer_type }; // TODO Isochronous transfer support - if (TUSB_XFER_CONTROL != xfer_type) // qhd index for control is meaningless + if (TUSB_XFER_CONTROL != p_qhd->xfer_type) // qhd index for control is meaningless { pipe_hdl.index = qhd_get_index(p_qhd); pipe_hdl.ep_addr = edpt_addr(p_qhd->endpoint_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0); @@ -1054,6 +1049,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c p_qhd->p_qtd_list_head = NULL; p_qhd->p_qtd_list_tail = NULL; p_qhd->pid_non_control = edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint + p_qhd->xfer_type = xfer_type; //------------- active, but no TD list -------------// p_qhd->qtd_overlay.halted = 0; diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index 47d007390..48e0c34e5 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -192,7 +192,7 @@ typedef struct ATTR_ALIGNED(32) { uint8_t used; uint8_t is_removing; uint8_t pid_non_control; - uint8_t reserved1; + uint8_t xfer_type; uint16_t total_xferred_bytes; // number of bytes xferred until a qtd with ioc bit set uint8_t interval_ms; // polling interval in frames (or milisecond) diff --git a/src/host/hcd.h b/src/host/hcd.h index 8ee06b2be..14ec68a48 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -94,7 +94,7 @@ enum { //--------------------------------------------------------------------+ typedef struct { uint8_t dev_addr; - uint8_t xfer_type; + uint8_t reserved; uint8_t index; uint8_t ep_addr; } pipe_handle_t; @@ -106,7 +106,7 @@ static inline bool pipehandle_is_valid(pipe_handle_t pipe_hdl) static inline bool pipehandle_is_equal(pipe_handle_t x, pipe_handle_t y) { - return (x.dev_addr == y.dev_addr) && (x.xfer_type == y.xfer_type) && (x.index == y.index); + return (x.dev_addr == y.dev_addr) && (x.index == y.index); } //--------------------------------------------------------------------+ diff --git a/src/host/usbh.c b/src/host/usbh.c index ff80ee78d..0df7c1dc8 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -259,8 +259,9 @@ static inline tusb_error_t usbh_pipe_control_close(uint8_t dev_addr) void usbh_xfer_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes) { usbh_device_t* dev = &_usbh_devices[ pipe_hdl.dev_addr ]; + uint8_t ep_addr = pipe_hdl.ep_addr; - if (TUSB_XFER_CONTROL == pipe_hdl.xfer_type) + if (0 == edpt_number(ep_addr)) { dev->control.pipe_status = event; // usbh_devices[ pipe_hdl.dev_addr ].control.xferred_bytes = xferred_bytes; not yet neccessary @@ -268,7 +269,7 @@ void usbh_xfer_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred } else { - uint8_t drv_id = dev->ep2drv[edpt_number(pipe_hdl.ep_addr)][edpt_dir(pipe_hdl.ep_addr)]; + uint8_t drv_id = dev->ep2drv[edpt_number(ep_addr)][edpt_dir(ep_addr)]; TU_ASSERT(drv_id < USBH_CLASS_DRIVER_COUNT, ); if (usbh_class_drivers[drv_id].isr) -- cgit v1.3.1 From a31f83dbb0d123d15dcc393dd9d926a4cc7352b6 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 10 Dec 2018 05:40:02 +0700 Subject: removing pipe handle --- src/class/cdc/cdc_host.c | 13 ++----------- src/class/cdc/cdc_host.h | 2 +- src/host/ehci/ehci.c | 4 ++-- src/host/hub.c | 8 ++++---- src/host/hub.h | 2 +- src/host/usbh.c | 7 +++---- src/host/usbh.h | 2 +- src/host/usbh_hcd.h | 2 +- 8 files changed, 15 insertions(+), 25 deletions(-) (limited to 'src/host') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 5e410fbf9..6eadca23d 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -57,15 +57,6 @@ //--------------------------------------------------------------------+ STATIC_VAR cdch_data_t cdch_data[CFG_TUSB_HOST_DEVICE_MAX]; // TODO to be static -static inline cdc_pipeid_t get_app_pipeid(pipe_handle_t pipe_hdl) -{ - cdch_data_t const * p_cdc = &cdch_data[pipe_hdl.dev_addr-1]; - - return pipehandle_is_equal( pipe_hdl, p_cdc->pipe_notification ) ? CDC_PIPE_NOTIFICATION : - pipehandle_is_equal( pipe_hdl, p_cdc->pipe_in ) ? CDC_PIPE_DATA_IN : - pipehandle_is_equal( pipe_hdl, p_cdc->pipe_out ) ? CDC_PIPE_DATA_OUT : CDC_PIPE_ERROR; -} - static inline bool tusbh_cdc_is_mounted(uint8_t dev_addr) { return pipehandle_is_valid(cdch_data[dev_addr-1].pipe_in) && pipehandle_is_valid(cdch_data[dev_addr-1].pipe_out); @@ -221,9 +212,9 @@ bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t c return true; } -void cdch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes) +void cdch_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes) { - tuh_cdc_xfer_isr( pipe_hdl.dev_addr, event, get_app_pipeid(pipe_hdl), xferred_bytes ); + tuh_cdc_xfer_isr( dev_addr, event, 0, xferred_bytes ); } void cdch_close(uint8_t dev_addr) diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index faf4cfe93..02eaa16e4 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -151,7 +151,7 @@ extern cdch_data_t cdch_data[CFG_TUSB_HOST_DEVICE_MAX]; // TODO consider to move void cdch_init(void); bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; -void cdch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); +void cdch_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes); void cdch_close(uint8_t dev_addr); #endif diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 2186bfcdf..445210c8b 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -647,7 +647,7 @@ static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd) { // end of request // call USBH callback - usbh_xfer_isr( qhd_create_pipe_handle(p_qhd), XFER_RESULT_SUCCESS, p_qhd->total_xferred_bytes); + usbh_xfer_isr(p_qhd->device_address, edpt_addr(p_qhd->endpoint_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0), XFER_RESULT_SUCCESS, p_qhd->total_xferred_bytes); p_qhd->total_xferred_bytes = 0; } @@ -741,7 +741,7 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) } // call USBH callback - usbh_xfer_isr( qhd_create_pipe_handle(p_qhd), error_event, p_qhd->total_xferred_bytes); + usbh_xfer_isr(p_qhd->device_address, edpt_addr(p_qhd->endpoint_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0), error_event, p_qhd->total_xferred_bytes); p_qhd->total_xferred_bytes = 0; } diff --git a/src/host/hub.c b/src/host/hub.c index 0b909bef0..5612f6cda 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -211,11 +211,11 @@ bool hub_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t co // is the response of interrupt endpoint polling #include "usbh_hcd.h" // FIXME remove -void hub_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes) +void hub_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes) { (void) xferred_bytes; // TODO can be more than 1 for hub with lots of ports - usbh_hub_t * p_hub = &hub_data[pipe_hdl.dev_addr-1]; + usbh_hub_t * p_hub = &hub_data[dev_addr-1]; if ( event == XFER_RESULT_SUCCESS ) { @@ -226,11 +226,11 @@ void hub_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes { hcd_event_t event = { - .rhport = _usbh_devices[pipe_hdl.dev_addr].rhport, + .rhport = _usbh_devices[dev_addr].rhport, .event_id = HCD_EVENT_DEVICE_ATTACH }; - event.attach.hub_addr = pipe_hdl.dev_addr; + event.attach.hub_addr = dev_addr; event.attach.hub_port = port; hcd_event_handler(&event, true); diff --git a/src/host/hub.h b/src/host/hub.h index 8d1fece4b..8e8416d8f 100644 --- a/src/host/hub.h +++ b/src/host/hub.h @@ -196,7 +196,7 @@ tusb_error_t hub_status_pipe_queue(uint8_t dev_addr); void hub_init(void); bool hub_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; -void hub_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); +void hub_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes); void hub_close(uint8_t dev_addr); #endif diff --git a/src/host/usbh.c b/src/host/usbh.c index 0df7c1dc8..a9e825f70 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -256,10 +256,9 @@ static inline tusb_error_t usbh_pipe_control_close(uint8_t dev_addr) // USBH-HCD ISR/Callback API //--------------------------------------------------------------------+ // interrupt caused by a TD (with IOC=1) in pipe of class class_code -void usbh_xfer_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes) +void usbh_xfer_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) { - usbh_device_t* dev = &_usbh_devices[ pipe_hdl.dev_addr ]; - uint8_t ep_addr = pipe_hdl.ep_addr; + usbh_device_t* dev = &_usbh_devices[ dev_addr ]; if (0 == edpt_number(ep_addr)) { @@ -274,7 +273,7 @@ void usbh_xfer_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred if (usbh_class_drivers[drv_id].isr) { - usbh_class_drivers[drv_id].isr(pipe_hdl, event, xferred_bytes); + usbh_class_drivers[drv_id].isr(dev_addr , event, xferred_bytes); } else { diff --git a/src/host/usbh.h b/src/host/usbh.h index b04328e40..de43c8a4f 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -68,7 +68,7 @@ typedef struct { void (* const init) (void); bool (* const open_subtask)(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *, uint16_t* outlen); - void (* const isr) (pipe_handle_t, xfer_result_t, uint32_t); + void (* const isr) (uint8_t dev_addr, xfer_result_t, uint32_t); void (* const close) (uint8_t); } host_class_driver_t; //--------------------------------------------------------------------+ diff --git a/src/host/usbh_hcd.h b/src/host/usbh_hcd.h index ce4469233..3c1c1511d 100644 --- a/src/host/usbh_hcd.h +++ b/src/host/usbh_hcd.h @@ -96,7 +96,7 @@ extern usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; // including zer //--------------------------------------------------------------------+ // callback from HCD ISR //--------------------------------------------------------------------+ -void usbh_xfer_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); +void usbh_xfer_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); #ifdef __cplusplus -- cgit v1.3.1 From 57233cead73120dc10148340d32278e59c8ead3f Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 10 Dec 2018 05:46:42 +0700 Subject: rename usbh_xfer_isr to hcd_event_xfer_complete --- src/host/ehci/ehci.c | 4 ++-- src/host/hcd.h | 3 +++ src/host/ohci/ohci.c | 2 +- src/host/usbh.c | 2 +- src/host/usbh_hcd.h | 3 +-- tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c | 2 +- tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c | 6 +++--- tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c | 6 +++--- tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c | 2 +- tests/lpc18xx_43xx/test/host/usbh/test_usbh.c | 2 +- 10 files changed, 17 insertions(+), 15 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 445210c8b..f21e4cee2 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -647,7 +647,7 @@ static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd) { // end of request // call USBH callback - usbh_xfer_isr(p_qhd->device_address, edpt_addr(p_qhd->endpoint_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0), XFER_RESULT_SUCCESS, p_qhd->total_xferred_bytes); + hcd_event_xfer_complete(p_qhd->device_address, edpt_addr(p_qhd->endpoint_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0), XFER_RESULT_SUCCESS, p_qhd->total_xferred_bytes); p_qhd->total_xferred_bytes = 0; } @@ -741,7 +741,7 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) } // call USBH callback - usbh_xfer_isr(p_qhd->device_address, edpt_addr(p_qhd->endpoint_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0), error_event, p_qhd->total_xferred_bytes); + hcd_event_xfer_complete(p_qhd->device_address, edpt_addr(p_qhd->endpoint_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0), error_event, p_qhd->total_xferred_bytes); p_qhd->total_xferred_bytes = 0; } diff --git a/src/host/hcd.h b/src/host/hcd.h index 14ec68a48..31a1876b4 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -127,6 +127,9 @@ void hcd_event_device_attach(uint8_t rhport); // Helper to send device removal event void hcd_event_device_remove(uint8_t hostid); +// Helper to send USB transfer event +void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); + //--------------------------------------------------------------------+ // Endpoints API //--------------------------------------------------------------------+ diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index 88296fb82..08d562e0d 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -717,7 +717,7 @@ static void done_queue_isr(uint8_t hostid) if ( pipe_hdl.xfer_type != TUSB_XFER_CONTROL) pipe_hdl.index = ed_get_index(p_ed); - usbh_xfer_isr(pipe_hdl, p_ed->td_tail.class_code, event, xferred_bytes); + hcd_event_xfer_complete(pipe_hdl, p_ed->td_tail.class_code, event, xferred_bytes); } td_head = (ohci_td_item_t*) td_head->next_td; diff --git a/src/host/usbh.c b/src/host/usbh.c index a9e825f70..ff9ca9666 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -256,7 +256,7 @@ static inline tusb_error_t usbh_pipe_control_close(uint8_t dev_addr) // USBH-HCD ISR/Callback API //--------------------------------------------------------------------+ // interrupt caused by a TD (with IOC=1) in pipe of class class_code -void usbh_xfer_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) +void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) { usbh_device_t* dev = &_usbh_devices[ dev_addr ]; diff --git a/src/host/usbh_hcd.h b/src/host/usbh_hcd.h index 3c1c1511d..48bb4bb9d 100644 --- a/src/host/usbh_hcd.h +++ b/src/host/usbh_hcd.h @@ -72,7 +72,6 @@ typedef struct { //------------- device -------------// volatile uint8_t state; // device state, value from enum tusbh_device_state_t - uint32_t flag_supported_class; // a bitmap of supported class //------------- control pipe -------------// struct { @@ -96,7 +95,7 @@ extern usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; // including zer //--------------------------------------------------------------------+ // callback from HCD ISR //--------------------------------------------------------------------+ -void usbh_xfer_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); + #ifdef __cplusplus diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c index 7d206e88e..634184ee2 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c @@ -208,7 +208,7 @@ void test_bulk_xfer_complete_isr(void) ehci_qtd_t* p_head = p_qhd_bulk->p_qtd_list_head; ehci_qtd_t* p_tail = p_qhd_bulk->p_qtd_list_tail; - usbh_xfer_isr_Expect(pipe_hdl_bulk, TUSB_CLASS_MSC, XFER_RESULT_SUCCESS, sizeof(data2)+sizeof(xfer_data)); + hcd_event_xfer_complete_Expect(pipe_hdl_bulk, TUSB_CLASS_MSC, XFER_RESULT_SUCCESS, sizeof(data2)+sizeof(xfer_data)); //------------- Code Under Test -------------// ehci_controller_run(hostid); diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c index ff1a2c0ac..9db8b999e 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c @@ -228,7 +228,7 @@ void test_control_xfer_complete_isr(void) { TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) ); - usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, XFER_RESULT_SUCCESS, 18); + hcd_event_xfer_complete_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, XFER_RESULT_SUCCESS, 18); //------------- Code Under TEST -------------// ehci_controller_run(hostid); @@ -247,7 +247,7 @@ void test_control_xfer_error_isr(void) { TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) ); - usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, XFER_RESULT_FAILED, 0); + hcd_event_xfer_complete_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, XFER_RESULT_FAILED, 0); //------------- Code Under TEST -------------// ehci_controller_run_error(hostid); @@ -266,7 +266,7 @@ void test_control_xfer_error_stall(void) { TEST_ASSERT( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) ); - usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, XFER_RESULT_STALLED, 0); + hcd_event_xfer_complete_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, XFER_RESULT_STALLED, 0); //------------- Code Under TEST -------------// ehci_controller_run_stall(hostid); diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c index 5b90652d7..b55ec1d9a 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c @@ -201,7 +201,7 @@ void test_interrupt_xfer_complete_isr_interval_less_than_1ms(void) TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl_interrupt, data2, sizeof(data2), true) ); - usbh_xfer_isr_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, XFER_RESULT_SUCCESS, sizeof(xfer_data)+sizeof(data2)); + hcd_event_xfer_complete_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, XFER_RESULT_SUCCESS, sizeof(xfer_data)+sizeof(data2)); ehci_qtd_t* p_head = p_qhd_interrupt->p_qtd_list_head; ehci_qtd_t* p_tail = p_qhd_interrupt->p_qtd_list_tail; @@ -242,7 +242,7 @@ void test_interrupt_xfer_error_isr(void) { TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl_interrupt, xfer_data, sizeof(xfer_data), true) ); - usbh_xfer_isr_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, XFER_RESULT_FAILED, 0); + hcd_event_xfer_complete_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, XFER_RESULT_FAILED, 0); //------------- Code Under TEST -------------// ehci_controller_run_error(hostid); @@ -254,7 +254,7 @@ void test_interrupt_xfer_error_stall(void) { TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl_interrupt, xfer_data, sizeof(xfer_data), true) ); - usbh_xfer_isr_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, XFER_RESULT_STALLED, 0); + hcd_event_xfer_complete_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, XFER_RESULT_STALLED, 0); //------------- Code Under TEST -------------// ehci_controller_run_stall(hostid); diff --git a/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c b/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c index 85f9cf813..096e10ac2 100644 --- a/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c +++ b/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c @@ -179,7 +179,7 @@ tusb_error_t control_xfer_stub(uint8_t dev_addr, const tusb_control_request_t * return TUSB_ERROR_OSAL_TIMEOUT; } - usbh_xfer_isr( + hcd_event_xfer_complete( (pipe_handle_t) { .dev_addr = (num_call > 1 ? 1 : 0), .xfer_type = TUSB_XFER_CONTROL }, 0, XFER_RESULT_SUCCESS, 0); diff --git a/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c b/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c index db5382e48..5a673fb04 100644 --- a/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c +++ b/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c @@ -247,7 +247,7 @@ void test_usbh_control_xfer_ok(void) usbh_control_xfer(dev_addr, 1, 2, 3, 4, 0, NULL); } -//void test_usbh_xfer_isr_non_control_stalled(void) // do nothing for stall on control +//void test_hcd_event_xfer_complete_non_control_stalled(void) // do nothing for stall on control //{ // //} -- cgit v1.3.1 From a486da33eeddc3f2d5be948905132723fb2cb9c8 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 10 Dec 2018 05:55:02 +0700 Subject: usbh clean up --- src/class/cdc/cdc_host.c | 14 +++++++------- src/class/cdc/cdc_host.h | 4 +--- src/host/usbh.c | 2 +- src/host/usbh.h | 4 ++-- 4 files changed, 11 insertions(+), 13 deletions(-) (limited to 'src/host') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 6eadca23d..2968fb576 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -55,16 +55,16 @@ //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -STATIC_VAR cdch_data_t cdch_data[CFG_TUSB_HOST_DEVICE_MAX]; // TODO to be static +static cdch_data_t cdch_data[CFG_TUSB_HOST_DEVICE_MAX]; // TODO to be static -static inline bool tusbh_cdc_is_mounted(uint8_t dev_addr) +static inline bool tuh_cdc_mounted(uint8_t dev_addr) { return pipehandle_is_valid(cdch_data[dev_addr-1].pipe_in) && pipehandle_is_valid(cdch_data[dev_addr-1].pipe_out); } bool tuh_cdc_is_busy(uint8_t dev_addr, cdc_pipeid_t pipeid) { - if ( !tusbh_cdc_is_mounted(dev_addr) ) return false; + if ( !tuh_cdc_mounted(dev_addr) ) return false; cdch_data_t const * p_cdc = &cdch_data[dev_addr-1]; @@ -90,14 +90,14 @@ bool tuh_cdc_is_busy(uint8_t dev_addr, cdc_pipeid_t pipeid) bool tuh_cdc_serial_is_mounted(uint8_t dev_addr) { // TODO consider all AT Command as serial candidate - return tusbh_cdc_is_mounted(dev_addr) && + return tuh_cdc_mounted(dev_addr) && (CDC_COMM_PROTOCOL_ATCOMMAND <= cdch_data[dev_addr-1].interface_protocol) && (cdch_data[dev_addr-1].interface_protocol <= CDC_COMM_PROTOCOL_ATCOMMAND_CDMA); } tusb_error_t tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length, bool is_notify) { - TU_ASSERT( tusbh_cdc_is_mounted(dev_addr), TUSB_ERROR_CDCH_DEVICE_NOT_MOUNTED); + TU_ASSERT( tuh_cdc_mounted(dev_addr), TUSB_ERROR_CDCH_DEVICE_NOT_MOUNTED); TU_ASSERT( p_data != NULL && length, TUSB_ERROR_INVALID_PARA); pipe_handle_t pipe_out = cdch_data[dev_addr-1].pipe_out; @@ -108,7 +108,7 @@ tusb_error_t tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length tusb_error_t tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is_notify) { - TU_ASSERT( tusbh_cdc_is_mounted(dev_addr), TUSB_ERROR_CDCH_DEVICE_NOT_MOUNTED); + TU_ASSERT( tuh_cdc_mounted(dev_addr), TUSB_ERROR_CDCH_DEVICE_NOT_MOUNTED); TU_ASSERT( p_buffer != NULL && length, TUSB_ERROR_INVALID_PARA); pipe_handle_t pipe_in = cdch_data[dev_addr-1].pipe_in; @@ -212,7 +212,7 @@ bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t c return true; } -void cdch_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes) +void cdch_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) { tuh_cdc_xfer_isr( dev_addr, event, 0, xferred_bytes ); } diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index 02eaa16e4..2fbd40f40 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -147,11 +147,9 @@ typedef struct { } cdch_data_t; -extern cdch_data_t cdch_data[CFG_TUSB_HOST_DEVICE_MAX]; // TODO consider to move to cdch internal header file - void cdch_init(void); bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; -void cdch_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes); +void cdch_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); void cdch_close(uint8_t dev_addr); #endif diff --git a/src/host/usbh.c b/src/host/usbh.c index ff9ca9666..c345ddf0d 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -273,7 +273,7 @@ void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t ev if (usbh_class_drivers[drv_id].isr) { - usbh_class_drivers[drv_id].isr(dev_addr , event, xferred_bytes); + usbh_class_drivers[drv_id].isr(dev_addr, ep_addr, event, xferred_bytes); } else { diff --git a/src/host/usbh.h b/src/host/usbh.h index de43c8a4f..390b04053 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -67,8 +67,8 @@ typedef struct { uint8_t class_code; void (* const init) (void); - bool (* const open_subtask)(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *, uint16_t* outlen); - void (* const isr) (uint8_t dev_addr, xfer_result_t, uint32_t); + bool (* const open_subtask)(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const * itf_desc, uint16_t* outlen); + void (* const isr) (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t len); void (* const close) (uint8_t); } host_class_driver_t; //--------------------------------------------------------------------+ -- cgit v1.3.1 From 0ae8a1aa896a1c258ccf8637f6c7bbfdf0adb356 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 10 Dec 2018 16:58:17 +0700 Subject: remove pipe handle.dev_addr --- src/class/cdc/cdc_host.c | 20 ++++++++-------- src/host/ehci/ehci.c | 62 ++++++++++++++++++++++-------------------------- src/host/hcd.h | 25 ++++++++++--------- src/host/hub.c | 6 ++--- 4 files changed, 54 insertions(+), 59 deletions(-) (limited to 'src/host') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 2968fb576..290cbfb44 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -71,13 +71,13 @@ bool tuh_cdc_is_busy(uint8_t dev_addr, cdc_pipeid_t pipeid) switch (pipeid) { case CDC_PIPE_NOTIFICATION: - return hcd_pipe_is_busy( p_cdc->pipe_notification ); + return hcd_pipe_is_busy(dev_addr, p_cdc->pipe_notification ); case CDC_PIPE_DATA_IN: - return hcd_pipe_is_busy( p_cdc->pipe_in ); + return hcd_pipe_is_busy(dev_addr, p_cdc->pipe_in ); case CDC_PIPE_DATA_OUT: - return hcd_pipe_is_busy( p_cdc->pipe_out ); + return hcd_pipe_is_busy(dev_addr, p_cdc->pipe_out ); default: return false; @@ -101,9 +101,9 @@ tusb_error_t tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length TU_ASSERT( p_data != NULL && length, TUSB_ERROR_INVALID_PARA); pipe_handle_t pipe_out = cdch_data[dev_addr-1].pipe_out; - if ( hcd_pipe_is_busy(pipe_out) ) return TUSB_ERROR_INTERFACE_IS_BUSY; + if ( hcd_pipe_is_busy(dev_addr, pipe_out) ) return TUSB_ERROR_INTERFACE_IS_BUSY; - return hcd_pipe_xfer( pipe_out, (void *) p_data, length, is_notify); + return hcd_pipe_xfer(dev_addr, pipe_out, (void *) p_data, length, is_notify); } tusb_error_t tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is_notify) @@ -112,9 +112,9 @@ tusb_error_t tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, TU_ASSERT( p_buffer != NULL && length, TUSB_ERROR_INVALID_PARA); pipe_handle_t pipe_in = cdch_data[dev_addr-1].pipe_in; - if ( hcd_pipe_is_busy(pipe_in) ) return TUSB_ERROR_INTERFACE_IS_BUSY; + if ( hcd_pipe_is_busy(dev_addr, pipe_in) ) return TUSB_ERROR_INTERFACE_IS_BUSY; - return hcd_pipe_xfer( pipe_in, p_buffer, length, is_notify); + return hcd_pipe_xfer(dev_addr, pipe_in, p_buffer, length, is_notify); } //--------------------------------------------------------------------+ @@ -221,9 +221,9 @@ void cdch_close(uint8_t dev_addr) { cdch_data_t * p_cdc = &cdch_data[dev_addr-1]; - (void) hcd_pipe_close(p_cdc->pipe_notification); - (void) hcd_pipe_close(p_cdc->pipe_in); - (void) hcd_pipe_close(p_cdc->pipe_out); + hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, p_cdc->pipe_notification); + hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, p_cdc->pipe_in); + hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, p_cdc->pipe_out); tu_memclr(p_cdc, sizeof(cdch_data_t)); diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index f21e4cee2..4989c74a0 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -98,7 +98,7 @@ static inline uint8_t qhd_get_index(ehci_qhd_t const * p_qhd) ATTR_ALWAYS static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; static inline ehci_qhd_t* qhd_find_free (uint8_t dev_addr) ATTR_PURE ATTR_ALWAYS_INLINE; static inline tusb_xfer_type_t qhd_get_xfer_type(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; -static inline ehci_qhd_t* qhd_get_from_pipe_handle(pipe_handle_t pipe_hdl) ATTR_PURE ATTR_ALWAYS_INLINE; +static inline ehci_qhd_t* qhd_get_from_pipe_handle(uint8_t dev_addr, pipe_handle_t pipe_hdl); static inline pipe_handle_t qhd_create_pipe_handle(ehci_qhd_t const * p_qhd); // determine if a queue head has bus-related error @@ -421,7 +421,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet //--------------------------------------------------------------------+ pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc, uint8_t class_code) { - pipe_handle_t const null_handle = { .dev_addr = 0, .index = 0 }; + pipe_handle_t const null_handle = { .index = 0 }; // TODO not support ISO yet if (ep_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) return null_handle; @@ -470,16 +470,16 @@ pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint // TODO might need to disable async/period list list_insert( list_head, (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD); - return (pipe_handle_t) { .dev_addr = dev_addr, .index = qhd_get_index(p_qhd) }; + return (pipe_handle_t) { .index = qhd_get_index(p_qhd) }; } -tusb_error_t hcd_pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) +tusb_error_t hcd_pipe_queue_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) { //------------- TODO pipe handle validate -------------// //------------- set up QTD -------------// - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(pipe_hdl); - ehci_qtd_t *p_qtd = qtd_find_free(pipe_hdl.dev_addr); + ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); + ehci_qtd_t *p_qtd = qtd_find_free(dev_addr); TU_ASSERT(p_qtd, TUSB_ERROR_EHCI_NOT_ENOUGH_QTD); @@ -492,11 +492,11 @@ tusb_error_t hcd_pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint return TUSB_ERROR_NONE; } -tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) +tusb_error_t hcd_pipe_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) { - TU_ASSERT_ERR ( hcd_pipe_queue_xfer(pipe_hdl, buffer, total_bytes) ); + TU_ASSERT_ERR ( hcd_pipe_queue_xfer(dev_addr, pipe_hdl, buffer, total_bytes) ); - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(pipe_hdl); + ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); if ( int_on_complete ) { // the just added qtd is pointed by list_tail @@ -508,11 +508,9 @@ tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t t } /// pipe_close should only be called as a part of unmount/safe-remove process -tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) +bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, pipe_handle_t pipe_hdl) { - TU_ASSERT(pipe_hdl.dev_addr > 0, TUSB_ERROR_INVALID_PARA); - - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle( pipe_hdl ); + ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); // async list needs async advance handshake to make sure host controller has released cached data // non-control does not use async advance, it will eventually free by control pipe close @@ -522,48 +520,48 @@ tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) if ( p_qhd->xfer_type == TUSB_XFER_BULK ) { TU_ASSERT_ERR( list_remove_qhd( - (ehci_link_t*) get_async_head( _usbh_devices[pipe_hdl.dev_addr].rhport ), - (ehci_link_t*) p_qhd) ); + (ehci_link_t*) get_async_head( _usbh_devices[dev_addr].rhport ), + (ehci_link_t*) p_qhd), false ); } #if EHCI_PERIODIC_LIST // TODO refractor/group this together else { TU_ASSERT_ERR( list_remove_qhd( - get_period_head( _usbh_devices[pipe_hdl.dev_addr].rhport, p_qhd->interval_ms ), - (ehci_link_t*) p_qhd) ); + get_period_head( _usbh_devices[dev_addr].rhport, p_qhd->interval_ms ), + (ehci_link_t*) p_qhd), false ); } #endif - return TUSB_ERROR_NONE; + return true; } -bool hcd_pipe_is_busy(pipe_handle_t pipe_hdl) +bool hcd_pipe_is_busy(uint8_t dev_addr, pipe_handle_t pipe_hdl) { - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle( pipe_hdl ); + ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); return !p_qhd->qtd_overlay.halted && (p_qhd->p_qtd_list_head != NULL); } -bool hcd_pipe_is_error(pipe_handle_t pipe_hdl) +bool hcd_pipe_is_error(uint8_t dev_addr, pipe_handle_t pipe_hdl) { - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle( pipe_hdl ); + ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); return p_qhd->qtd_overlay.halted; } -bool hcd_pipe_is_stalled(pipe_handle_t pipe_hdl) +bool hcd_pipe_is_stalled(uint8_t dev_addr, pipe_handle_t pipe_hdl) { - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle( pipe_hdl ); + ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); return p_qhd->qtd_overlay.halted && !qhd_has_xact_error(p_qhd); } -uint8_t hcd_pipe_get_endpoint_addr(pipe_handle_t pipe_hdl) +uint8_t hcd_pipe_get_endpoint_addr(uint8_t dev_addr, pipe_handle_t pipe_hdl) { - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle( pipe_hdl ); + ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); return p_qhd->endpoint_number + ( (p_qhd->pid_non_control == EHCI_PID_IN) ? TUSB_DIR_IN_MASK : 0); } -tusb_error_t hcd_pipe_clear_stall(pipe_handle_t pipe_hdl) +tusb_error_t hcd_pipe_clear_stall(uint8_t dev_addr, pipe_handle_t pipe_hdl) { - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle( pipe_hdl ); + ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); p_qhd->qtd_overlay.halted = 0; // TODO reset data toggle ? return TUSB_ERROR_NONE; @@ -927,16 +925,14 @@ static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd) return (ehci_qhd_t*) tu_align32(p_qhd->next.address); } -static inline ehci_qhd_t* qhd_get_from_pipe_handle(pipe_handle_t pipe_hdl) +static inline ehci_qhd_t* qhd_get_from_pipe_handle(uint8_t dev_addr, pipe_handle_t pipe_hdl) { - return &ehci_data.device[ pipe_hdl.dev_addr-1 ].qhd[ pipe_hdl.index ]; + return &ehci_data.device[dev_addr-1].qhd[pipe_hdl.index]; } static inline pipe_handle_t qhd_create_pipe_handle(ehci_qhd_t const * p_qhd) { - pipe_handle_t pipe_hdl = { - .dev_addr = p_qhd->device_address, - }; + pipe_handle_t pipe_hdl = { }; // TODO Isochronous transfer support if (TUSB_XFER_CONTROL != p_qhd->xfer_type) // qhd index for control is meaningless diff --git a/src/host/hcd.h b/src/host/hcd.h index 31a1876b4..6d86ae9e5 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -93,20 +93,19 @@ enum { // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ typedef struct { - uint8_t dev_addr; - uint8_t reserved; - uint8_t index; uint8_t ep_addr; + uint8_t index; + uint8_t reserved[2]; } pipe_handle_t; static inline bool pipehandle_is_valid(pipe_handle_t pipe_hdl) { - return pipe_hdl.dev_addr > 0; + return true ; // pipe_hdl.dev_addr > 0; } static inline bool pipehandle_is_equal(pipe_handle_t x, pipe_handle_t y) { - return (x.dev_addr == y.dev_addr) && (x.index == y.index); + return (x.index == y.index); } //--------------------------------------------------------------------+ @@ -144,16 +143,16 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * // TODO control xfer should be used via usbh layer pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * endpoint_desc, uint8_t class_code) ATTR_WARN_UNUSED_RESULT; -tusb_error_t hcd_pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) ATTR_WARN_UNUSED_RESULT; // only queue, not transferring yet -tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) ATTR_WARN_UNUSED_RESULT; -tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) /*ATTR_WARN_UNUSED_RESULT*/; +tusb_error_t hcd_pipe_queue_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) ATTR_WARN_UNUSED_RESULT; // only queue, not transferring yet +tusb_error_t hcd_pipe_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) ATTR_WARN_UNUSED_RESULT; +bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, pipe_handle_t pipe_hdl); -bool hcd_pipe_is_busy(pipe_handle_t pipe_hdl) ATTR_PURE; -bool hcd_pipe_is_error(pipe_handle_t pipe_hdl) ATTR_PURE; -bool hcd_pipe_is_stalled(pipe_handle_t pipe_hdl) ATTR_PURE; // stalled also counted as error +bool hcd_pipe_is_busy(uint8_t dev_addr, pipe_handle_t pipe_hdl); +bool hcd_pipe_is_error(uint8_t dev_addr, pipe_handle_t pipe_hdl); +bool hcd_pipe_is_stalled(uint8_t dev_addr, pipe_handle_t pipe_hdl); // stalled also counted as error +tusb_error_t hcd_pipe_clear_stall(uint8_t dev_addr, pipe_handle_t pipe_hdl); -uint8_t hcd_pipe_get_endpoint_addr(pipe_handle_t pipe_hdl) ATTR_PURE; -tusb_error_t hcd_pipe_clear_stall(pipe_handle_t pipe_hdl); +uint8_t hcd_pipe_get_endpoint_addr(uint8_t dev_addr, pipe_handle_t pipe_hdl); #if 0 tusb_error_t hcd_pipe_cancel()ATTR_WARN_UNUSED_RESULT; diff --git a/src/host/hub.c b/src/host/hub.c index 5612f6cda..2a71c45fc 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -204,7 +204,7 @@ bool hub_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t co } //------------- Queue the initial Status endpoint transfer -------------// - TU_ASSERT( TUSB_ERROR_NONE == hcd_pipe_xfer(hub_data[dev_addr-1].pipe_status, &hub_data[dev_addr-1].status_change, 1, true) ); + TU_ASSERT( TUSB_ERROR_NONE == hcd_pipe_xfer(dev_addr, hub_data[dev_addr-1].pipe_status, &hub_data[dev_addr-1].status_change, 1, true) ); return true; } @@ -248,7 +248,7 @@ void hub_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes) void hub_close(uint8_t dev_addr) { - (void) hcd_pipe_close(hub_data[dev_addr-1].pipe_status); + hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, hub_data[dev_addr-1].pipe_status); tu_memclr(&hub_data[dev_addr-1], sizeof(usbh_hub_t)); // osal_semaphore_reset(hub_enum_sem_hdl); @@ -256,7 +256,7 @@ void hub_close(uint8_t dev_addr) tusb_error_t hub_status_pipe_queue(uint8_t dev_addr) { - return hcd_pipe_xfer(hub_data[dev_addr-1].pipe_status, &hub_data[dev_addr-1].status_change, 1, true); + return hcd_pipe_xfer(dev_addr, hub_data[dev_addr-1].pipe_status, &hub_data[dev_addr-1].status_change, 1, true); } -- cgit v1.3.1 From 9c4c7975024e9b971a43a866c1feffb419dd8f5b Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 10 Dec 2018 19:01:28 +0700 Subject: add ep addr to host cdc --- src/class/cdc/cdc_device.c | 7 +- src/class/cdc/cdc_host.c | 83 +++++++++++++-------- src/class/cdc/cdc_host.h | 12 +-- src/common/tusb_common.h | 61 ++++----------- src/device/usbd.c | 16 ++-- src/host/ehci/ehci.c | 86 +++++----------------- src/host/ehci/ehci.h | 8 +- .../test/host/ehci/test_ehci_structure.c | 2 +- 8 files changed, 104 insertions(+), 171 deletions(-) (limited to 'src/host') diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c index 040c8d4f4..d477a0d23 100644 --- a/src/class/cdc/cdc_device.c +++ b/src/class/cdc/cdc_device.c @@ -41,9 +41,7 @@ #if (TUSB_OPT_DEVICE_ENABLED && CFG_TUD_CDC) #define _TINY_USB_SOURCE_FILE_ -//--------------------------------------------------------------------+ -// INCLUDE -//--------------------------------------------------------------------+ + #include "cdc_device.h" #include "device/usbd_pvt.h" @@ -236,8 +234,7 @@ tusb_error_t cdcd_open(uint8_t rhport, tusb_desc_interface_t const * p_interface if ( CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL != p_interface_desc->bInterfaceSubClass) return TUSB_ERROR_CDC_UNSUPPORTED_SUBCLASS; // Only support AT commands, no protocol and vendor specific commands. - if ( !(tu_within(CDC_COMM_PROTOCOL_ATCOMMAND, p_interface_desc->bInterfaceProtocol, CDC_COMM_PROTOCOL_ATCOMMAND_CDMA) || - p_interface_desc->bInterfaceProtocol == CDC_COMM_PROTOCOL_NONE || + if ( !(tu_within(CDC_COMM_PROTOCOL_NONE, p_interface_desc->bInterfaceProtocol, CDC_COMM_PROTOCOL_ATCOMMAND_CDMA) || p_interface_desc->bInterfaceProtocol == 0xff ) ) { return TUSB_ERROR_CDC_UNSUPPORTED_PROTOCOL; diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 290cbfb44..0d0378920 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -42,24 +42,35 @@ #define _TINY_USB_SOURCE_FILE_ -//--------------------------------------------------------------------+ -// INCLUDE -//--------------------------------------------------------------------+ #include "common/tusb_common.h" #include "cdc_host.h" //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ +typedef struct { + uint8_t itf_num; + uint8_t itf_protocol; + + cdc_acm_capability_t acm_capability; + + pipe_handle_t pipe_notification, pipe_out, pipe_in; + + uint8_t ep_notif; + uint8_t ep_in; + uint8_t ep_out; + +} cdch_data_t; //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -static cdch_data_t cdch_data[CFG_TUSB_HOST_DEVICE_MAX]; // TODO to be static +static cdch_data_t cdch_data[CFG_TUSB_HOST_DEVICE_MAX]; -static inline bool tuh_cdc_mounted(uint8_t dev_addr) +bool tuh_cdc_mounted(uint8_t dev_addr) { - return pipehandle_is_valid(cdch_data[dev_addr-1].pipe_in) && pipehandle_is_valid(cdch_data[dev_addr-1].pipe_out); + cdch_data_t* cdc = &cdch_data[dev_addr-1]; + return cdc->ep_in && cdc->ep_out; } bool tuh_cdc_is_busy(uint8_t dev_addr, cdc_pipeid_t pipeid) @@ -91,8 +102,8 @@ bool tuh_cdc_serial_is_mounted(uint8_t dev_addr) { // TODO consider all AT Command as serial candidate return tuh_cdc_mounted(dev_addr) && - (CDC_COMM_PROTOCOL_ATCOMMAND <= cdch_data[dev_addr-1].interface_protocol) && - (cdch_data[dev_addr-1].interface_protocol <= CDC_COMM_PROTOCOL_ATCOMMAND_CDMA); + (CDC_COMM_PROTOCOL_ATCOMMAND <= cdch_data[dev_addr-1].itf_protocol) && + (cdch_data[dev_addr-1].itf_protocol <= CDC_COMM_PROTOCOL_ATCOMMAND_CDMA); } tusb_error_t tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length, bool is_notify) @@ -125,33 +136,33 @@ void cdch_init(void) tu_memclr(cdch_data, sizeof(cdch_data_t)*CFG_TUSB_HOST_DEVICE_MAX); } -bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) +bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length) { - // TODO change following assert to subtask_assert - if ( CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL != p_interface_desc->bInterfaceSubClass) return TUSB_ERROR_CDC_UNSUPPORTED_SUBCLASS; + // Only support ACM + TU_VERIFY( CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL == itf_desc->bInterfaceSubClass); - if ( !(tu_within(CDC_COMM_PROTOCOL_ATCOMMAND, p_interface_desc->bInterfaceProtocol, CDC_COMM_PROTOCOL_ATCOMMAND_CDMA) || - 0xff == p_interface_desc->bInterfaceProtocol) ) - { - return TUSB_ERROR_CDC_UNSUPPORTED_PROTOCOL; - } + // Only support AT commands, no protocol and vendor specific commands. + TU_VERIFY(tu_within(CDC_COMM_PROTOCOL_NONE, itf_desc->bInterfaceProtocol, CDC_COMM_PROTOCOL_ATCOMMAND_CDMA) || + 0xff == itf_desc->bInterfaceProtocol); uint8_t const * p_desc; cdch_data_t * p_cdc; - p_desc = descriptor_next ( (uint8_t const *) p_interface_desc ); - p_cdc = &cdch_data[dev_addr-1]; // non-static variable cannot be used after OS service call + p_desc = descriptor_next ( (uint8_t const *) itf_desc ); + p_cdc = &cdch_data[dev_addr-1]; - p_cdc->interface_number = p_interface_desc->bInterfaceNumber; - p_cdc->interface_protocol = p_interface_desc->bInterfaceProtocol; // TODO 0xff is consider as rndis candidate, other is virtual Com + p_cdc->itf_num = itf_desc->bInterfaceNumber; + p_cdc->itf_protocol = itf_desc->bInterfaceProtocol; // TODO 0xff is consider as rndis candidate, other is virtual Com //------------- Communication Interface -------------// (*p_length) = sizeof(tusb_desc_interface_t); + // Communication Functional Descriptors while( TUSB_DESC_CLASS_SPECIFIC == p_desc[DESC_OFFSET_TYPE] ) - { // Communication Functional Descriptors + { if ( CDC_FUNC_DESC_ABSTRACT_CONTROL_MANAGEMENT == cdc_functional_desc_typeof(p_desc) ) - { // save ACM bmCapabilities + { + // save ACM bmCapabilities p_cdc->acm_capability = ((cdc_desc_func_acm_t const *) p_desc)->bmCapabilities; } @@ -160,8 +171,12 @@ bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t c } if ( TUSB_DESC_ENDPOINT == p_desc[DESC_OFFSET_TYPE]) - { // notification endpoint if any - p_cdc->pipe_notification = hcd_pipe_open(rhport, dev_addr, (tusb_desc_endpoint_t const *) p_desc, TUSB_CLASS_CDC); + { + // notification endpoint if any + tusb_desc_endpoint_t const * ep_desc = (tusb_desc_endpoint_t const *) p_desc; + p_cdc->pipe_notification = hcd_pipe_open(rhport, dev_addr, ep_desc, TUSB_CLASS_CDC); + + p_cdc->ep_notif = ep_desc->bEndpointAddress; (*p_length) += p_desc[DESC_OFFSET_LEN]; p_desc = descriptor_next(p_desc); @@ -179,16 +194,24 @@ bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t c // data endpoints expected to be in pairs for(uint32_t i=0; i<2; i++) { - tusb_desc_endpoint_t const *p_endpoint = (tusb_desc_endpoint_t const *) p_desc; - TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType); - TU_ASSERT(TUSB_XFER_BULK == p_endpoint->bmAttributes.xfer); + tusb_desc_endpoint_t const *ep_desc = (tusb_desc_endpoint_t const *) p_desc; + TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType); + TU_ASSERT(TUSB_XFER_BULK == ep_desc->bmAttributes.xfer); - pipe_handle_t * p_pipe_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_IN_MASK ) ? + pipe_handle_t * p_pipe_hdl = ( ep_desc->bEndpointAddress & TUSB_DIR_IN_MASK ) ? &p_cdc->pipe_in : &p_cdc->pipe_out; - (*p_pipe_hdl) = hcd_pipe_open(rhport, dev_addr, p_endpoint, TUSB_CLASS_CDC); + (*p_pipe_hdl) = hcd_pipe_open(rhport, dev_addr, ep_desc, TUSB_CLASS_CDC); TU_ASSERT ( pipehandle_is_valid(*p_pipe_hdl) ); + if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) + { + p_cdc->ep_in = ep_desc->bEndpointAddress; + }else + { + p_cdc->ep_out = ep_desc->bEndpointAddress; + } + (*p_length) += p_desc[DESC_OFFSET_LEN]; p_desc = descriptor_next( p_desc ); } @@ -203,7 +226,7 @@ bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t c .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_INTERFACE, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_OUT }, .bRequest = CDC_REQUEST_SET_CONTROL_LINE_STATE, .wValue = 0x03, // dtr on, cst on - .wIndex = p_cdc->interface_number, + .wIndex = p_cdc->itf_num, .wLength = 0 }; diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index 2fbd40f40..eceec3ee3 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -137,18 +137,8 @@ void tuh_cdc_xfer_isr(uint8_t dev_addr, xfer_result_t event, cdc_pipeid_t pipe_i //--------------------------------------------------------------------+ #ifdef _TINY_USB_SOURCE_FILE_ -typedef struct { - uint8_t interface_number; - uint8_t interface_protocol; - - cdc_acm_capability_t acm_capability; - - pipe_handle_t pipe_notification, pipe_out, pipe_in; - -} cdch_data_t; - void cdch_init(void); -bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; +bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length); void cdch_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); void cdch_close(uint8_t dev_addr); diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 3c5402e59..f4fac96b8 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -73,6 +73,8 @@ // MACROS //--------------------------------------------------------------------+ #define TU_ARRAY_SZIE(_arr) ( sizeof(_arr) / sizeof(_arr[0]) ) +#define TU_MIN(_x, _y) ( (_x) < (_y) ) ? (_x) : (_y) ) +#define TU_MAX(_x, _y) ( (_x) > (_y) ) ? (_x) : (_y) ) #define U16_HIGH_U8(u16) ((uint8_t) (((u16) >> 8) & 0x00ff)) #define U16_LOW_U8(u16) ((uint8_t) ((u16) & 0x00ff)) @@ -167,53 +169,23 @@ static inline uint16_t tu_u16_le2be(uint16_t u16) return ((uint16_t)(tu_u16_low(u16) << 8)) | tu_u16_high(u16); } -//------------- Min -------------// -static inline uint8_t tu_min8(uint8_t x, uint8_t y) -{ - return (x < y) ? x : y; -} - -static inline uint16_t tu_min16(uint16_t x, uint16_t y) -{ - return (x < y) ? x : y; -} - -static inline uint32_t tu_min32(uint32_t x, uint32_t y) -{ - return (x < y) ? x : y; -} - -//------------- Max -------------// -static inline uint32_t tu_max32(uint32_t x, uint32_t y) -{ - return (x > y) ? x : y; -} - -//------------- Align -------------// -static inline uint32_t tu_align32 (uint32_t value) -{ - return (value & 0xFFFFFFE0UL); -} - -static inline uint32_t tu_align16 (uint32_t value) -{ - return (value & 0xFFFFFFF0UL); -} +// Min +static inline uint8_t tu_min8(uint8_t x, uint8_t y) { return (x < y) ? x : y; } +static inline uint16_t tu_min16(uint16_t x, uint16_t y) { return (x < y) ? x : y; } +static inline uint32_t tu_min32(uint32_t x, uint32_t y) { return (x < y) ? x : y; } -static inline uint32_t tu_align_n (uint32_t alignment, uint32_t value) -{ - return value & ((uint32_t) ~(alignment-1)); -} +// Max +static inline uint8_t tu_max8(uint8_t x, uint8_t y) { return (x > y) ? x : y; } +static inline uint16_t tu_max16(uint16_t x, uint16_t y) { return (x > y) ? x : y; } +static inline uint32_t tu_max32(uint32_t x, uint32_t y) { return (x > y) ? x : y; } -static inline uint32_t tu_align4k (uint32_t value) -{ - return (value & 0xFFFFF000UL); -} +// Align +static inline uint32_t tu_align32 (uint32_t value) { return (value & 0xFFFFFFE0UL); } +static inline uint32_t tu_align16 (uint32_t value) { return (value & 0xFFFFFFF0UL); } +static inline uint32_t tu_align_n (uint32_t alignment, uint32_t value) { return value & ((uint32_t) ~(alignment-1)); } +static inline uint32_t tu_align4k (uint32_t value) { return (value & 0xFFFFF000UL); } -static inline uint32_t tu_offset4k(uint32_t value) -{ - return (value & 0xFFFUL); -} +static inline uint32_t tu_offset4k(uint32_t value) { return (value & 0xFFFUL); } //------------- Mathematics -------------// static inline uint32_t tu_abs(int32_t value) @@ -221,7 +193,6 @@ static inline uint32_t tu_abs(int32_t value) return (value < 0) ? (-value) : value; } - /// inclusive range checking static inline bool tu_within(uint32_t lower, uint32_t value, uint32_t upper) { diff --git a/src/device/usbd.c b/src/device/usbd.c index 5262d6c73..d1b708a0d 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -623,24 +623,24 @@ void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_ //--------------------------------------------------------------------+ // Helper to parse an pair of endpoint descriptors (IN & OUT) -tusb_error_t usbd_open_edpt_pair(uint8_t rhport, tusb_desc_endpoint_t const* p_desc_ep, uint8_t xfer_type, uint8_t* ep_out, uint8_t* ep_in) +tusb_error_t usbd_open_edpt_pair(uint8_t rhport, tusb_desc_endpoint_t const* ep_desc, uint8_t xfer_type, uint8_t* ep_out, uint8_t* ep_in) { for(int i=0; i<2; i++) { - TU_ASSERT(TUSB_DESC_ENDPOINT == p_desc_ep->bDescriptorType && - xfer_type == p_desc_ep->bmAttributes.xfer, TUSB_ERROR_DESCRIPTOR_CORRUPTED); + TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType && + xfer_type == ep_desc->bmAttributes.xfer, TUSB_ERROR_DESCRIPTOR_CORRUPTED); - TU_ASSERT( dcd_edpt_open(rhport, p_desc_ep), TUSB_ERROR_DCD_OPEN_PIPE_FAILED ); + TU_ASSERT( dcd_edpt_open(rhport, ep_desc), TUSB_ERROR_DCD_OPEN_PIPE_FAILED ); - if ( edpt_dir(p_desc_ep->bEndpointAddress) == TUSB_DIR_IN ) + if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) { - (*ep_in) = p_desc_ep->bEndpointAddress; + (*ep_in) = ep_desc->bEndpointAddress; }else { - (*ep_out) = p_desc_ep->bEndpointAddress; + (*ep_out) = ep_desc->bEndpointAddress; } - p_desc_ep = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) p_desc_ep ); + ep_desc = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) ep_desc ); } return TUSB_ERROR_NONE; diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 4989c74a0..2e9090db2 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -58,26 +58,8 @@ //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION static ehci_data_t ehci_data; - -#if EHCI_PERIODIC_LIST - - #if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST) - CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4096) static ehci_link_t period_frame_list0[EHCI_FRAMELIST_SIZE]; - - #ifndef __ICCARM__ // IAR cannot able to determine the alignment with datalignment pragma - TU_VERIFY_STATIC( ALIGN_OF(period_frame_list0) == 4096, "Period Framelist must be 4k alginment"); // validation - #endif - #endif - - #if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST) - CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4096) STATIC_VAR ehci_link_t period_frame_list1[EHCI_FRAMELIST_SIZE]; - - #ifndef __ICCARM__ // IAR cannot able to determine the alignment with datalignment pragma - TU_VERIFY_STATIC( ALIGN_OF(period_frame_list1) == 4096, "Period Framelist must be 4k alginment"); // validation - #endif - #endif -#endif +// Periodic frame list must be 4K alignment +CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4096) static ehci_data_t ehci_data; //------------- Validation -------------// // TODO static assert for memory placement on some known MCU such as lpc43xx @@ -86,7 +68,6 @@ CFG_TUSB_MEM_SECTION static ehci_data_t ehci_data; // PROTOTYPE //--------------------------------------------------------------------+ static inline ehci_registers_t* get_operational_register(uint8_t hostid) ATTR_PURE ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT; -static inline ehci_link_t* get_period_frame_list(uint8_t hostid) ATTR_PURE ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT; static inline ehci_qhd_t* get_async_head(uint8_t hostid) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT; static inline ehci_link_t* get_period_head(uint8_t hostid, uint8_t interval_ms) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT; @@ -112,9 +93,9 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c static inline ehci_qtd_t* qtd_find_free(uint8_t dev_addr) ATTR_PURE ATTR_ALWAYS_INLINE; -static inline ehci_qtd_t* qtd_next(ehci_qtd_t const * p_qtd ) ATTR_PURE ATTR_ALWAYS_INLINE; -static inline void qtd_insert_to_qhd(ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new) ATTR_ALWAYS_INLINE; -static inline void qtd_remove_1st_from_qhd(ehci_qhd_t *p_qhd) ATTR_ALWAYS_INLINE; +static inline ehci_qtd_t* qtd_next(ehci_qtd_t const * p_qtd ) ATTR_PURE ATTR_ALWAYS_INLINE; +static inline void qtd_insert_to_qhd(ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new) ATTR_ALWAYS_INLINE; +static inline void qtd_remove_1st_from_qhd(ehci_qhd_t *p_qhd) ATTR_ALWAYS_INLINE; static void qtd_init(ehci_qtd_t* p_qtd, uint32_t data_ptr, uint16_t total_bytes); static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t new_type) ATTR_ALWAYS_INLINE; @@ -129,18 +110,8 @@ static bool ehci_init(uint8_t hostid); //--------------------------------------------------------------------+ bool hcd_init(void) { - //------------- Data Structure init -------------// tu_memclr(&ehci_data, sizeof(ehci_data_t)); - - #if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST) - TU_VERIFY(ehci_init(0)); - #endif - - #if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST) - TU_VERIFY(ehci_init(1)); - #endif - - return true; + return ehci_init(TUH_OPT_RHPORT); } //--------------------------------------------------------------------+ @@ -148,7 +119,7 @@ bool hcd_init(void) //--------------------------------------------------------------------+ void hcd_port_reset(uint8_t hostid) { - ehci_registers_t* const regs = get_operational_register(hostid); + ehci_registers_t* regs = ehci_data.regs; regs->portsc_bit.port_enable = 0; // disable port before reset regs->portsc_bit.port_reset = 1; @@ -156,19 +127,18 @@ void hcd_port_reset(uint8_t hostid) bool hcd_port_connect_status(uint8_t hostid) { - return get_operational_register(hostid)->portsc_bit.current_connect_status; + return ehci_data.regs->portsc_bit.current_connect_status; } tusb_speed_t hcd_port_speed_get(uint8_t hostid) { - return (tusb_speed_t) get_operational_register(hostid)->portsc_bit.nxp_port_speed; // NXP specific port speed + return (tusb_speed_t) ehci_data.regs->portsc_bit.nxp_port_speed; // NXP specific port speed } // TODO refractor abtract later void hcd_port_unplug(uint8_t hostid) { - ehci_registers_t* const regs = get_operational_register(hostid); - regs->usb_cmd_bit.advacne_async = 1; // Async doorbell check EHCI 4.8.2 for operational details + ehci_data.regs->usb_cmd_bit.advance_async = 1; // Async doorbell check EHCI 4.8.2 for operational details } //--------------------------------------------------------------------+ @@ -176,7 +146,9 @@ void hcd_port_unplug(uint8_t hostid) //--------------------------------------------------------------------+ static bool ehci_init(uint8_t hostid) { - ehci_registers_t* const regs = get_operational_register(hostid); + ehci_data.regs = get_operational_register(hostid); + + ehci_registers_t* regs = ehci_data.regs; //------------- CTRLDSSEGMENT Register (skip) -------------// //------------- USB INT Register -------------// @@ -211,7 +183,7 @@ static bool ehci_init(uint8_t hostid) ehci_data.period_head_arr[i].qtd_overlay.halted = 1; // dummy node, always inactive } - ehci_link_t * const framelist = get_period_frame_list(hostid); + ehci_link_t * const framelist = ehci_data.period_framelist; ehci_link_t * const period_1ms = get_period_head(hostid, 1); // all links --> period_head_arr[0] (1ms) // 0, 2, 4, 6 etc --> period_head_arr[1] (2ms) @@ -264,11 +236,11 @@ static bool ehci_init(uint8_t hostid) static tusb_error_t hcd_controller_stop(uint8_t hostid) { - ehci_registers_t* const regs = get_operational_register(hostid); - tu_timeout_t timeout; + ehci_registers_t* regs = ehci_data.regs; regs->usb_cmd_bit.run_stop = 0; + tu_timeout_t timeout; tu_timeout_set(&timeout, 2); // USB Spec: controller has to stop within 16 uframe = 2 frames while( regs->usb_sts_bit.hc_halted == 0 && !tu_timeout_expired(&timeout)) {} @@ -613,10 +585,8 @@ static void async_advance_isr(ehci_qhd_t * const async_head) static void port_connect_status_change_isr(uint8_t hostid) { - ehci_registers_t* const regs = get_operational_register(hostid); - // NOTE There is an sequence plug->unplug->…..-> plug if device is powering with pre-plugged device - if (regs->portsc_bit.current_connect_status) + if (ehci_data.regs->portsc_bit.current_connect_status) { hcd_port_reset(hostid); hcd_event_device_attach(hostid); @@ -797,7 +767,7 @@ static void xfer_error_isr(uint8_t hostid) //------------- Host Controller Driver's Interrupt Handler -------------// void hal_hcd_isr(uint8_t hostid) { - ehci_registers_t* const regs = get_operational_register(hostid); + ehci_registers_t* regs = ehci_data.regs; uint32_t int_status = regs->usb_sts; int_status &= regs->usb_int_enable; @@ -854,26 +824,6 @@ static inline ehci_registers_t* get_operational_register(uint8_t hostid) return (ehci_registers_t*) (hostid ? (&LPC_USB1->USBCMD_H) : (&LPC_USB0->USBCMD_H) ); } -#if EHCI_PERIODIC_LIST // TODO refractor/group this together -static inline ehci_link_t* get_period_frame_list(uint8_t hostid) -{ - switch(hostid) - { -#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST) - case 0: - return period_frame_list0; -#endif - -#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST) - case 1: - return period_frame_list1; -#endif - - default: return NULL; - } -} -#endif - //------------- queue head helper -------------// static inline ehci_qhd_t* get_async_head(uint8_t hostid) { diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index 48e0c34e5..4534c4cd3 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -352,7 +352,7 @@ typedef volatile struct { uint32_t framelist_size : 2 ; ///< This field is R/W only if Programmable Frame List Flagin the HCCPARAMS registers is set to a one. This field specifies the size of the frame list.00b 1024 elements (4096 bytes) Default value 01b 512 elements (2048 bytes) 10b 256 elements (1024 bytes) uint32_t periodic_enable : 1 ; ///< This bit controls whether the host controller skips processing the Periodic Schedule. Values mean: 0b Do not process the Periodic Schedule 1b Use the PERIODICLISTBASE register to access the Periodic Schedule. uint32_t async_enable : 1 ; ///< This bit controls whether the host controller skips processing the Asynchronous Schedule. Values mean: 0b Do not process the Asynchronous Schedule 1b Use the ASYNCLISTADDR register to access the Asynchronous Schedule. - uint32_t advacne_async : 1 ; ///< This bit is used as a doorbell by software to tell the host controller to issue an interrupt the next time it advances asynchronous schedule. Software must write a 1 to this bit to ringthe doorbell. When the host controller has evicted all appropriate cached schedule state, it sets the Interrupt on Async Advancestatus bit in the USBSTS register. If the Interrupt on Async Advance Enablebit in the USBINTR register is a one then the host controller will assert an interrupt at the next interrupt threshold. See Section 4.8.2 for operational details. The host controller sets this bit to a zero after it has set the Interrupt on Async Advance status bit in the USBSTS register to a one. Software should not write a one to this bit when the asynchronous schedule is disabled. Doing so will yield undefined results. + uint32_t advance_async : 1 ; ///< This bit is used as a doorbell by software to tell the host controller to issue an interrupt the next time it advances asynchronous schedule. Software must write a 1 to this bit to ringthe doorbell. When the host controller has evicted all appropriate cached schedule state, it sets the Interrupt on Async Advancestatus bit in the USBSTS register. If the Interrupt on Async Advance Enablebit in the USBINTR register is a one then the host controller will assert an interrupt at the next interrupt threshold. See Section 4.8.2 for operational details. The host controller sets this bit to a zero after it has set the Interrupt on Async Advance status bit in the USBSTS register to a one. Software should not write a one to this bit when the asynchronous schedule is disabled. Doing so will yield undefined results. uint32_t light_reset : 1 ; ///< This control bit is not required. If implemented, it allows the driver to reset the EHCI controller without affecting the state of the ports or the relationship to the companion host controllers. For example, the PORSTC registers should not be reset to their default values and the CF bit setting should not go to zero (retaining port ownership relationships). A host software read of this bit as zero indicates the Light Host Controller Reset has completed and it is safe for host software to re-initialize the host controller. A host software read of this bit as a one indicates the Light Host Controller Reset has not yet completed. uint32_t async_park : 2 ; ///< It contains a count of the number of successive transactions the host controller is allowed to execute from a high-speed queue head on the Asynchronous schedule before continuing traversal of the Asynchronous schedule. See Section 4.10.3.2 for full operational details. Valid values are 1h to 3h. Software must not write a zero to this bit when Park Mode Enableis a one as this will result in undefined behavior. uint32_t : 1 ; ///< reserved @@ -450,11 +450,11 @@ typedef volatile struct { //--------------------------------------------------------------------+ typedef struct { -#if EHCI_PERIODIC_LIST + ehci_link_t period_framelist[EHCI_FRAMELIST_SIZE]; + // for NXP ECHI, only implement 1 ms & 2 ms & 4 ms, 8 ms (framelist) // [0] : 1ms, [1] : 2ms, [2] : 4ms, [3] : 8 ms ehci_qhd_t period_head_arr[4]; -#endif struct { ehci_qhd_t qhd; // also used as head of async list (each for 1 controller), always exists @@ -472,6 +472,8 @@ typedef struct // ehci_itd_t itd[EHCI_MAX_ITD] ; ///< Iso Transfer Pool // ehci_sitd_t sitd[EHCI_MAX_SITD] ; ///< Split (FS) Isochronous Transfer Pool }device[CFG_TUSB_HOST_DEVICE_MAX]; + + ehci_registers_t* regs; }ehci_data_t; #ifdef __cplusplus diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_structure.c b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_structure.c index 7eaabcd51..39e15b227 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_structure.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_structure.c @@ -225,7 +225,7 @@ void test_register_usbcmd(void) TEST_ASSERT_EQUAL( 2 , BITFIELD_OFFSET_OF_MEMBER(ehci_registers_t, usb_cmd_bit, framelist_size) ); TEST_ASSERT_EQUAL( 4 , BITFIELD_OFFSET_OF_MEMBER(ehci_registers_t, usb_cmd_bit, periodic_enable) ); TEST_ASSERT_EQUAL( 5 , BITFIELD_OFFSET_OF_MEMBER(ehci_registers_t, usb_cmd_bit, async_enable) ); - TEST_ASSERT_EQUAL( 6 , BITFIELD_OFFSET_OF_MEMBER(ehci_registers_t, usb_cmd_bit, advacne_async) ); + TEST_ASSERT_EQUAL( 6 , BITFIELD_OFFSET_OF_MEMBER(ehci_registers_t, usb_cmd_bit, advance_async) ); TEST_ASSERT_EQUAL( 7 , BITFIELD_OFFSET_OF_MEMBER(ehci_registers_t, usb_cmd_bit, light_reset) ); TEST_ASSERT_EQUAL( 8 , BITFIELD_OFFSET_OF_MEMBER(ehci_registers_t, usb_cmd_bit, async_park) ); TEST_ASSERT_EQUAL( 11 , BITFIELD_OFFSET_OF_MEMBER(ehci_registers_t, usb_cmd_bit, async_park_enable) ); -- cgit v1.3.1 From 4e7596ca9cdde3bd1197cf1853c370d8da48d7a2 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 10 Dec 2018 19:25:57 +0700 Subject: add tuh_mount_cb/tuh_umount_cb --- examples/host/cdc_msc_hid/src/main.c | 4 ++-- src/class/cdc/cdc_host.c | 8 +------- src/class/cdc/cdc_host.h | 13 +------------ src/device/usbd.c | 5 +++-- src/host/usbh.c | 11 +++++------ src/host/usbh.h | 8 ++++++-- tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c | 16 ++++++++-------- 7 files changed, 26 insertions(+), 39 deletions(-) (limited to 'src/host') diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c index 4d197a16a..ebb540782 100644 --- a/examples/host/cdc_msc_hid/src/main.c +++ b/examples/host/cdc_msc_hid/src/main.c @@ -84,7 +84,7 @@ int main(void) #if CFG_TUH_CDC CFG_TUSB_MEM_SECTION static char serial_in_buffer[64] = { 0 }; -void tuh_cdc_mounted_cb(uint8_t dev_addr) +void tuh_mount_cb(uint8_t dev_addr) { // application set-up printf("\na CDC device (address %d) is mounted\n", dev_addr); @@ -92,7 +92,7 @@ void tuh_cdc_mounted_cb(uint8_t dev_addr) tuh_cdc_receive(dev_addr, serial_in_buffer, sizeof(serial_in_buffer), true); // schedule first transfer } -void tuh_cdc_unmounted_cb(uint8_t dev_addr) +void tuh_umount_cb(uint8_t dev_addr) { // application tear-down printf("\na CDC device (address %d) is unmounted \n", dev_addr); diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 0d0378920..9e1ca0e7a 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -136,7 +136,7 @@ void cdch_init(void) tu_memclr(cdch_data, sizeof(cdch_data_t)*CFG_TUSB_HOST_DEVICE_MAX); } -bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length) +bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length) { // Only support ACM TU_VERIFY( CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL == itf_desc->bInterfaceSubClass); @@ -217,9 +217,6 @@ bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t c } } - // FIXME mounted class flag is not set yet - tuh_cdc_mounted_cb(dev_addr); - // FIXME move to seperate API : connect tusb_control_request_t request = { @@ -249,9 +246,6 @@ void cdch_close(uint8_t dev_addr) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, p_cdc->pipe_out); tu_memclr(p_cdc, sizeof(cdch_data_t)); - - tuh_cdc_unmounted_cb(dev_addr); - } #endif diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index eceec3ee3..8d0b1d28d 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -104,17 +104,6 @@ tusb_error_t tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, //--------------------------------------------------------------------+ // CDC APPLICATION CALLBACKS //--------------------------------------------------------------------+ -/** \brief Callback function that will be invoked when a device with CDC Abstract Control Model interface is mounted - * \param[in] dev_addr Address of newly mounted device - * \note This callback should be used by Application to set-up interface-related data - */ -void tuh_cdc_mounted_cb(uint8_t dev_addr); - -/** \brief Callback function that will be invoked when a device with CDC Abstract Control Model interface is unmounted - * \param[in] dev_addr Address of newly unmounted device - * \note This callback should be used by Application to tear-down interface-related data - */ -void tuh_cdc_unmounted_cb(uint8_t dev_addr); /** \brief Callback function that is invoked when an transferring event occurred * \param[in] dev_addr Address of device @@ -138,7 +127,7 @@ void tuh_cdc_xfer_isr(uint8_t dev_addr, xfer_result_t event, cdc_pipeid_t pipe_i #ifdef _TINY_USB_SOURCE_FILE_ void cdch_init(void); -bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length); +bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length); void cdch_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); void cdch_close(uint8_t dev_addr); diff --git a/src/device/usbd.c b/src/device/usbd.c index d1b708a0d..ad40e3c9f 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -272,7 +272,8 @@ static void usbd_task_body(void) // TODO remove since if task is too slow, we could clear the event of the new attached osal_queue_reset(_usbd_q); - tud_umount_cb(); // invoke callback + // invoke callback + if (tud_umount_cb) tud_umount_cb(); break; case DCD_EVENT_SOF: @@ -467,7 +468,7 @@ static bool process_set_config(uint8_t rhport) } // invoke callback - tud_mount_cb(); + if (tud_mount_cb) tud_mount_cb(); return TUSB_ERROR_NONE; } diff --git a/src/host/usbh.c b/src/host/usbh.c index c345ddf0d..2c2286698 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -71,7 +71,7 @@ static host_class_driver_t const usbh_class_drivers[] = { .class_code = TUSB_CLASS_CDC, .init = cdch_init, - .open_subtask = cdch_open_subtask, + .open_subtask = cdch_open, .isr = cdch_isr, .close = cdch_close }, @@ -218,10 +218,6 @@ bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8 if ( XFER_RESULT_STALLED == dev->control.pipe_status ) return false; if ( XFER_RESULT_FAILED == dev->control.pipe_status ) return false; -// STASK_ASSERT_HDLR(TUSB_ERROR_NONE == error && -// XFER_RESULT_SUCCESS == dev->control.pipe_status, -// tuh_device_mount_failed_cb(TUSB_ERROR_USBH_MOUNT_DEVICE_NOT_RESPOND, NULL) ); - return true; } @@ -336,6 +332,9 @@ static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_ (hub_port == 0 || dev->hub_port == hub_port) && dev->state != TUSB_DEVICE_STATE_UNPLUG) { + // Invoke callback before close driver + if (tuh_umount_cb) tuh_umount_cb(dev_addr); + // TODO Hub multiple level // Close class driver for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) usbh_class_drivers[drv_id].close(dev_addr); @@ -624,7 +623,7 @@ bool enum_task(hcd_event_t* event) } } - tuh_device_mount_succeed_cb(new_addr); + if (tuh_mount_cb) tuh_mount_cb(new_addr); return true; } diff --git a/src/host/usbh.h b/src/host/usbh.h index 390b04053..a2e196c9a 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -90,8 +90,12 @@ static inline bool tuh_device_is_configured(uint8_t dev_addr) // APPLICATION CALLBACK //--------------------------------------------------------------------+ ATTR_WEAK uint8_t tuh_device_attached_cb (tusb_desc_device_t const *p_desc_device) ATTR_WARN_UNUSED_RESULT; -ATTR_WEAK void tuh_device_mount_succeed_cb (uint8_t dev_addr); -ATTR_WEAK void tuh_device_mount_failed_cb(tusb_error_t error, tusb_desc_device_t const *p_desc_device); // TODO refractor remove desc_device + +/** Callback invoked when device is mounted (configured) */ +ATTR_WEAK void tuh_mount_cb (uint8_t dev_addr); + +/** Callback invoked when device is unmounted (bus reset/unplugged) */ +ATTR_WEAK void tuh_umount_cb(uint8_t dev_addr); //--------------------------------------------------------------------+ // CLASS-USBH & INTERNAL API diff --git a/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c b/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c index fe7d05516..1b73e649f 100644 --- a/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c +++ b/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c @@ -89,7 +89,7 @@ void test_cdch_open_failed_to_open_notification_endpoint(void) hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, null_hdl); //------------- CUT -------------// - TEST_ASSERT_EQUAL(TUSB_ERROR_HCD_OPEN_PIPE_FAILED, cdch_open_subtask(dev_addr, p_comm_interface, &length)); + TEST_ASSERT_EQUAL(TUSB_ERROR_HCD_OPEN_PIPE_FAILED, cdch_open(dev_addr, p_comm_interface, &length)); } @@ -102,7 +102,7 @@ void test_cdch_open_failed_to_open_data_endpoint_out(void) hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, null_hdl); //------------- CUT -------------// - TEST_ASSERT_EQUAL(TUSB_ERROR_HCD_OPEN_PIPE_FAILED, cdch_open_subtask(dev_addr, p_comm_interface, &length)); + TEST_ASSERT_EQUAL(TUSB_ERROR_HCD_OPEN_PIPE_FAILED, cdch_open(dev_addr, p_comm_interface, &length)); } @@ -116,7 +116,7 @@ void test_cdch_open_failed_to_open_data_endpoint_in(void) hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_in, TUSB_CLASS_CDC, null_hdl); //------------- CUT -------------// - TEST_ASSERT_EQUAL(TUSB_ERROR_HCD_OPEN_PIPE_FAILED, cdch_open_subtask(dev_addr, p_comm_interface, &length)); + TEST_ASSERT_EQUAL(TUSB_ERROR_HCD_OPEN_PIPE_FAILED, cdch_open(dev_addr, p_comm_interface, &length)); } @@ -135,7 +135,7 @@ void test_cdch_open_length_check(void) tusbh_cdc_mounted_cb_Expect(dev_addr); //------------- CUT -------------// - TEST_ASSERT_EQUAL( TUSB_ERROR_NONE, cdch_open_subtask(dev_addr, p_comm_interface, &length) ); + TEST_ASSERT_EQUAL( TUSB_ERROR_NONE, cdch_open(dev_addr, p_comm_interface, &length) ); TEST_ASSERT_EQUAL(expected_length, length); } @@ -147,7 +147,7 @@ void test_cdch_open_interface_number_check(void) tusbh_cdc_mounted_cb_Expect(dev_addr); //------------- CUT -------------// - TEST_ASSERT_EQUAL( TUSB_ERROR_NONE, cdch_open_subtask(dev_addr, p_comm_interface, &length) ); + TEST_ASSERT_EQUAL( TUSB_ERROR_NONE, cdch_open(dev_addr, p_comm_interface, &length) ); TEST_ASSERT_EQUAL(1, p_cdc->interface_number); @@ -160,7 +160,7 @@ void test_cdch_open_protocol_check(void) tusbh_cdc_mounted_cb_Expect(dev_addr); //------------- CUT -------------// - TEST_ASSERT_EQUAL( TUSB_ERROR_NONE, cdch_open_subtask(dev_addr, p_comm_interface, &length) ); + TEST_ASSERT_EQUAL( TUSB_ERROR_NONE, cdch_open(dev_addr, p_comm_interface, &length) ); TEST_ASSERT_EQUAL(p_comm_interface->bInterfaceProtocol, p_cdc->interface_protocol); @@ -173,7 +173,7 @@ void test_cdch_open_acm_capacity_check(void) tusbh_cdc_mounted_cb_Expect(dev_addr); //------------- CUT -------------// - TEST_ASSERT_EQUAL( TUSB_ERROR_NONE, cdch_open_subtask(dev_addr, p_comm_interface, &length) ); + TEST_ASSERT_EQUAL( TUSB_ERROR_NONE, cdch_open(dev_addr, p_comm_interface, &length) ); TEST_ASSERT_EQUAL_MEMORY(&cdc_config_descriptor.cdc_acm.bmCapabilities, &p_cdc->acm_capability, 1); } @@ -192,7 +192,7 @@ void test_cdch_close_device(void) hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_in, TUSB_CLASS_CDC, pipe_int); tusbh_cdc_mounted_cb_Expect(dev_addr); - TEST_ASSERT_EQUAL( TUSB_ERROR_NONE, cdch_open_subtask(dev_addr, p_comm_interface, &length) ); + TEST_ASSERT_EQUAL( TUSB_ERROR_NONE, cdch_open(dev_addr, p_comm_interface, &length) ); hcd_pipe_close_ExpectAndReturn(pipe_notification , TUSB_ERROR_NONE); hcd_pipe_close_ExpectAndReturn(pipe_int , TUSB_ERROR_NONE); -- cgit v1.3.1 From 5886ccdb0388345740a7572f26eaa9f167091222 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 10 Dec 2018 20:16:26 +0700 Subject: ehci clean up --- src/host/ehci/ehci.c | 38 ++++++++++---------------------------- src/host/ehci/ehci.h | 10 +++------- src/host/hcd.h | 6 ++++-- src/host/usbh.c | 2 +- 4 files changed, 18 insertions(+), 38 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 2e9090db2..e71b817aa 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -80,7 +80,6 @@ static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLI static inline ehci_qhd_t* qhd_find_free (uint8_t dev_addr) ATTR_PURE ATTR_ALWAYS_INLINE; static inline tusb_xfer_type_t qhd_get_xfer_type(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; static inline ehci_qhd_t* qhd_get_from_pipe_handle(uint8_t dev_addr, pipe_handle_t pipe_hdl); -static inline pipe_handle_t qhd_create_pipe_handle(ehci_qhd_t const * p_qhd); // determine if a queue head has bus-related error static inline bool qhd_has_xact_error(ehci_qhd_t * p_qhd) @@ -91,7 +90,6 @@ static inline bool qhd_has_xact_error(ehci_qhd_t * p_qhd) static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); - static inline ehci_qtd_t* qtd_find_free(uint8_t dev_addr) ATTR_PURE ATTR_ALWAYS_INLINE; static inline ehci_qtd_t* qtd_next(ehci_qtd_t const * p_qtd ) ATTR_PURE ATTR_ALWAYS_INLINE; static inline void qtd_insert_to_qhd(ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new) ATTR_ALWAYS_INLINE; @@ -557,30 +555,30 @@ static void async_advance_isr(ehci_qhd_t * const async_head) _usbh_devices[0].state = TUSB_DEVICE_STATE_UNPLUG; } - for(uint8_t relative_dev_addr=0; relative_dev_addr < CFG_TUSB_HOST_DEVICE_MAX; relative_dev_addr++) + for(uint8_t dev_addr=1; dev_addr < CFG_TUSB_HOST_DEVICE_MAX; dev_addr++) { // check if control endpoint is removing - ehci_qhd_t *p_control_qhd = &ehci_data.device[relative_dev_addr].control.qhd; + ehci_qhd_t *p_control_qhd = get_control_qhd(dev_addr); if ( p_control_qhd->is_removing ) { p_control_qhd->is_removing = 0; p_control_qhd->used = 0; // Host Controller has cleaned up its cached data for this device, set state to unplug - _usbh_devices[relative_dev_addr+1].state = TUSB_DEVICE_STATE_UNPLUG; + _usbh_devices[dev_addr+1].state = TUSB_DEVICE_STATE_UNPLUG; for (uint8_t i=0; ixfer_type) // qhd index for control is meaningless - { - pipe_hdl.index = qhd_get_index(p_qhd); - pipe_hdl.ep_addr = edpt_addr(p_qhd->endpoint_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0); - } - - return pipe_hdl; -} - //------------- TD helper -------------// static inline ehci_qtd_t* qtd_find_free(uint8_t dev_addr) { diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index 4534c4cd3..fdb1936d3 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -456,17 +456,13 @@ typedef struct // [0] : 1ms, [1] : 2ms, [2] : 4ms, [3] : 8 ms ehci_qhd_t period_head_arr[4]; + // Note control qhd of dev0 is used as head of async list, always exists struct { - ehci_qhd_t qhd; // also used as head of async list (each for 1 controller), always exists - ehci_qtd_t qtd; - }dev0; - - struct { - struct { ehci_qhd_t qhd; ehci_qtd_t qtd; - }control; + }control[CFG_TUSB_HOST_DEVICE_MAX+1]; + struct { ehci_qhd_t qhd[HCD_MAX_ENDPOINT] ; ///< Queue Head Pool ehci_qtd_t qtd[HCD_MAX_XFER] ATTR_ALIGNED(32) ; ///< Queue Element Transfer Pool // ehci_itd_t itd[EHCI_MAX_ITD] ; ///< Iso Transfer Pool diff --git a/src/host/hcd.h b/src/host/hcd.h index 6d86ae9e5..0f83838e9 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -87,15 +87,17 @@ enum { HCD_MAX_XFER = HCD_MAX_ENDPOINT*2, }; + +//#define HCD_MAX_ENDPOINT 16 +//#define HCD_MAX_XFER 16 #endif //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ typedef struct { - uint8_t ep_addr; uint8_t index; - uint8_t reserved[2]; + uint8_t reserved[3]; } pipe_handle_t; static inline bool pipehandle_is_valid(pipe_handle_t pipe_hdl) diff --git a/src/host/usbh.c b/src/host/usbh.c index 2c2286698..1c698cb35 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -273,7 +273,7 @@ void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t ev } else { - TU_ASSERT(false, ); // something wrong, no one claims the isr's source + TU_BREAKPOINT(); // something wrong, no one claims the isr's source } } } -- cgit v1.3.1 From dffe9b335ee38a7720adff9a819f17b2899e38d1 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 10 Dec 2018 20:26:47 +0700 Subject: clean up host pipe api --- examples/host/cdc_msc_hid/src/tusb_config.h | 2 +- src/class/cdc/cdc_host.c | 4 +-- src/class/msc/msc_host.c | 2 +- src/host/ehci/ehci.c | 43 +++++++++-------------------- src/host/hcd.h | 5 +--- src/host/hub.c | 2 +- src/host/ohci/ohci.c | 12 -------- 7 files changed, 19 insertions(+), 51 deletions(-) (limited to 'src/host') diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index be584b181..07764fa90 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -80,7 +80,7 @@ // DEVICE CONFIGURATION //-------------------------------------------------------------------- -#define CFG_TUH_HUB 1 // not tested +#define CFG_TUH_HUB 1 #define CFG_TUH_CDC 1 #define CFG_TUH_HID_KEYBOARD 0 #define CFG_TUH_HID_MOUSE 0 diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 9e1ca0e7a..c6378e546 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -174,7 +174,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it { // notification endpoint if any tusb_desc_endpoint_t const * ep_desc = (tusb_desc_endpoint_t const *) p_desc; - p_cdc->pipe_notification = hcd_pipe_open(rhport, dev_addr, ep_desc, TUSB_CLASS_CDC); + p_cdc->pipe_notification = hcd_pipe_open(rhport, dev_addr, ep_desc); p_cdc->ep_notif = ep_desc->bEndpointAddress; @@ -201,7 +201,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it pipe_handle_t * p_pipe_hdl = ( ep_desc->bEndpointAddress & TUSB_DIR_IN_MASK ) ? &p_cdc->pipe_in : &p_cdc->pipe_out; - (*p_pipe_hdl) = hcd_pipe_open(rhport, dev_addr, ep_desc, TUSB_CLASS_CDC); + (*p_pipe_hdl) = hcd_pipe_open(rhport, dev_addr, ep_desc); TU_ASSERT ( pipehandle_is_valid(*p_pipe_hdl) ); if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 57a409ffd..4f5f0c599 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -368,7 +368,7 @@ bool msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interfac .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_ENDPOINT, .type = TUSB_REQ_TYPE_STANDARD, .direction = TUSB_DIR_OUT }, .bRequest = TUSB_REQ_CLEAR_FEATURE, .wValue = 0, - .wIndex = hcd_pipe_get_endpoint_addr(msch_data[dev_addr-1].bulk_in), + .wIndex = hcd_pipe_get_endpoint_addr(msch_data[dev_addr-1].bulk_in), // FIXME use ep addr .wLength = 0 }; diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index e71b817aa..dd19a5224 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -325,7 +325,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* { // FIXME control only for now (void) rhport; - hcd_pipe_open(rhport, dev_addr, ep_desc, 0); + hcd_pipe_open(rhport, dev_addr, ep_desc); return true; } @@ -344,23 +344,23 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * // FIXME control only for now if ( epnum == 0 ) { - ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); - ehci_qtd_t *p_data = get_control_qtds(dev_addr); + ehci_qhd_t* qhd = get_control_qhd(dev_addr); + ehci_qtd_t* qtd = get_control_qtds(dev_addr); - qtd_init(p_data, (uint32_t) buffer, buflen); + qtd_init(qtd, (uint32_t) buffer, buflen); // first first data toggle is always 1 (data & setup stage) - p_data->data_toggle = 1; - p_data->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT; - p_data->int_on_complete = 1; - p_data->next.terminate = 1; + qtd->data_toggle = 1; + qtd->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT; + qtd->int_on_complete = 1; + qtd->next.terminate = 1; // sw region - p_qhd->p_qtd_list_head = p_data; - p_qhd->p_qtd_list_tail = p_data; + qhd->p_qtd_list_head = qtd; + qhd->p_qtd_list_tail = qtd; // attach TD - p_qhd->qtd_overlay.next.address = (uint32_t) p_data; + qhd->qtd_overlay.next.address = (uint32_t) qtd; } return true; @@ -389,7 +389,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet //--------------------------------------------------------------------+ // BULK/INT/ISO PIPE API //--------------------------------------------------------------------+ -pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc, uint8_t class_code) +pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) { pipe_handle_t const null_handle = { .index = 0 }; @@ -511,24 +511,12 @@ bool hcd_pipe_is_busy(uint8_t dev_addr, pipe_handle_t pipe_hdl) return !p_qhd->qtd_overlay.halted && (p_qhd->p_qtd_list_head != NULL); } -bool hcd_pipe_is_error(uint8_t dev_addr, pipe_handle_t pipe_hdl) -{ - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); - return p_qhd->qtd_overlay.halted; -} - bool hcd_pipe_is_stalled(uint8_t dev_addr, pipe_handle_t pipe_hdl) { ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); return p_qhd->qtd_overlay.halted && !qhd_has_xact_error(p_qhd); } -uint8_t hcd_pipe_get_endpoint_addr(uint8_t dev_addr, pipe_handle_t pipe_hdl) -{ - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); - return p_qhd->endpoint_number + ( (p_qhd->pid_non_control == EHCI_PID_IN) ? TUSB_DIR_IN_MASK : 0); -} - tusb_error_t hcd_pipe_clear_stall(uint8_t dev_addr, pipe_handle_t pipe_hdl) { ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); @@ -596,11 +584,8 @@ static void port_connect_status_change_isr(uint8_t hostid) static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd) { - uint8_t max_loop = 0; - // free all TDs from the head td to the first active TD - while(p_qhd->p_qtd_list_head != NULL && !p_qhd->p_qtd_list_head->active - && max_loop < HCD_MAX_XFER) + while(p_qhd->p_qtd_list_head != NULL && !p_qhd->p_qtd_list_head->active) { // TD need to be freed and removed from qhd, before invoking callback bool is_ioc = (p_qhd->p_qtd_list_head->int_on_complete != 0); @@ -616,8 +601,6 @@ static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd) hcd_event_xfer_complete(p_qhd->device_address, edpt_addr(p_qhd->endpoint_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0), XFER_RESULT_SUCCESS, p_qhd->total_xferred_bytes); p_qhd->total_xferred_bytes = 0; } - - max_loop++; } } diff --git a/src/host/hcd.h b/src/host/hcd.h index 0f83838e9..9ea86a5fe 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -144,18 +144,15 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * //--------------------------------------------------------------------+ // TODO control xfer should be used via usbh layer -pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * endpoint_desc, uint8_t class_code) ATTR_WARN_UNUSED_RESULT; +pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); tusb_error_t hcd_pipe_queue_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) ATTR_WARN_UNUSED_RESULT; // only queue, not transferring yet tusb_error_t hcd_pipe_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) ATTR_WARN_UNUSED_RESULT; bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, pipe_handle_t pipe_hdl); bool hcd_pipe_is_busy(uint8_t dev_addr, pipe_handle_t pipe_hdl); -bool hcd_pipe_is_error(uint8_t dev_addr, pipe_handle_t pipe_hdl); bool hcd_pipe_is_stalled(uint8_t dev_addr, pipe_handle_t pipe_hdl); // stalled also counted as error tusb_error_t hcd_pipe_clear_stall(uint8_t dev_addr, pipe_handle_t pipe_hdl); -uint8_t hcd_pipe_get_endpoint_addr(uint8_t dev_addr, pipe_handle_t pipe_hdl); - #if 0 tusb_error_t hcd_pipe_cancel()ATTR_WARN_UNUSED_RESULT; #endif diff --git a/src/host/hub.c b/src/host/hub.c index 2a71c45fc..bc0592a97 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -167,7 +167,7 @@ bool hub_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t co TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType); TU_ASSERT(TUSB_XFER_INTERRUPT == p_endpoint->bmAttributes.xfer); - hub_data[dev_addr-1].pipe_status = hcd_pipe_open(rhport, dev_addr, p_endpoint, TUSB_CLASS_HUB); + hub_data[dev_addr-1].pipe_status = hcd_pipe_open(rhport, dev_addr, p_endpoint); TU_ASSERT( pipehandle_is_valid(hub_data[dev_addr-1].pipe_status) ); hub_data[dev_addr-1].interface_number = p_interface_desc->bInterfaceNumber; diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index 08d562e0d..5923be936 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -589,24 +589,12 @@ bool hcd_pipe_is_busy(pipe_handle_t pipe_hdl) return tu_align16(p_ed->td_head.address) != tu_align16(p_ed->td_tail.address); } -bool hcd_pipe_is_error(pipe_handle_t pipe_hdl) -{ - ohci_ed_t const * const p_ed = ed_from_pipe_handle(pipe_hdl); - return p_ed->td_head.halted; -} - bool hcd_pipe_is_stalled(pipe_handle_t pipe_hdl) { ohci_ed_t const * const p_ed = ed_from_pipe_handle(pipe_hdl); return p_ed->td_head.halted && p_ed->is_stalled; } -uint8_t hcd_pipe_get_endpoint_addr(pipe_handle_t pipe_hdl) -{ - ohci_ed_t const * const p_ed = ed_from_pipe_handle(pipe_hdl); - return p_ed->endpoint_number | (p_ed->direction == OHCI_PID_IN ? TUSB_DIR_IN_MASK : 0 ); -} - tusb_error_t hcd_pipe_clear_stall(pipe_handle_t pipe_hdl) { ohci_ed_t * const p_ed = ed_from_pipe_handle(pipe_hdl); -- cgit v1.3.1 From 9c3c782b64d196daf97d12732611fb5e16c80008 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 10 Dec 2018 22:06:48 +0700 Subject: host msc built but got hardfault with inquiry command --- src/class/cdc/cdc_host.h | 2 +- src/class/msc/msc_host.c | 102 ++++++++++++----------- src/class/msc/msc_host.h | 9 +- src/host/ehci/ehci.h | 4 +- src/host/usbh.c | 2 +- tests/lpc18xx_43xx/test/host/msc/test_msc_host.c | 8 +- 6 files changed, 68 insertions(+), 59 deletions(-) (limited to 'src/host') diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index 8d0b1d28d..192842dfa 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -127,7 +127,7 @@ void tuh_cdc_xfer_isr(uint8_t dev_addr, xfer_result_t event, cdc_pipeid_t pipe_i #ifdef _TINY_USB_SOURCE_FILE_ void cdch_init(void); -bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length); +bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length); void cdch_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); void cdch_close(uint8_t dev_addr); diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 4f5f0c599..f2b4deb73 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -76,7 +76,7 @@ bool tuh_msc_is_mounted(uint8_t dev_addr) bool tuh_msc_is_busy(uint8_t dev_addr) { return msch_data[dev_addr-1].is_initialized && - hcd_pipe_is_busy(msch_data[dev_addr-1].bulk_in); + hcd_pipe_is_busy(dev_addr, msch_data[dev_addr-1].bulk_in); } uint8_t const* tuh_msc_get_vendor_name(uint8_t dev_addr) @@ -110,23 +110,22 @@ static inline void msc_cbw_add_signature(msc_cbw_t *p_cbw, uint8_t lun) p_cbw->lun = lun; } -static tusb_error_t msch_command_xfer(msch_interface_t * p_msch, void* p_buffer) ATTR_WARN_UNUSED_RESULT; -static tusb_error_t msch_command_xfer(msch_interface_t * p_msch, void* p_buffer) +static tusb_error_t msch_command_xfer(uint8_t dev_addr, msch_interface_t * p_msch, void* p_buffer) { if ( NULL != p_buffer) { // there is data phase if (p_msch->cbw.dir & TUSB_DIR_IN_MASK) { - TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false) ); - TU_ASSERT_ERR( hcd_pipe_queue_xfer(p_msch->bulk_in , p_buffer, p_msch->cbw.total_bytes) ); + TU_ASSERT_ERR( hcd_pipe_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false) ); + TU_ASSERT_ERR( hcd_pipe_queue_xfer(dev_addr, p_msch->bulk_in , p_buffer, p_msch->cbw.total_bytes) ); }else { - TU_ASSERT_ERR( hcd_pipe_queue_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t)) ); - TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out , p_buffer, p_msch->cbw.total_bytes, false) ); + TU_ASSERT_ERR( hcd_pipe_queue_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t)) ); + TU_ASSERT_ERR( hcd_pipe_xfer(dev_addr, p_msch->bulk_out , p_buffer, p_msch->cbw.total_bytes, false) ); } } - TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_in , (uint8_t*) &p_msch->csw, sizeof(msc_csw_t), true) ); + TU_ASSERT_ERR( hcd_pipe_xfer(dev_addr, p_msch->bulk_in , (uint8_t*) &p_msch->csw, sizeof(msc_csw_t), true) ); return TUSB_ERROR_NONE; } @@ -150,7 +149,7 @@ tusb_error_t tusbh_msc_inquiry(uint8_t dev_addr, uint8_t lun, uint8_t *p_data) memcpy(p_msch->cbw.command, &cmd_inquiry, p_msch->cbw.cmd_len); - TU_ASSERT_ERR ( msch_command_xfer(p_msch, p_data) ); + TU_ASSERT_ERR ( msch_command_xfer(dev_addr, p_msch, p_data) ); return TUSB_ERROR_NONE; } @@ -175,7 +174,7 @@ tusb_error_t tusbh_msc_read_capacity10(uint8_t dev_addr, uint8_t lun, uint8_t *p memcpy(p_msch->cbw.command, &cmd_read_capacity10, p_msch->cbw.cmd_len); - TU_ASSERT_ERR ( msch_command_xfer(p_msch, p_data) ); + TU_ASSERT_ERR ( msch_command_xfer(dev_addr, p_msch, p_data) ); return TUSB_ERROR_NONE; } @@ -200,7 +199,7 @@ tusb_error_t tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, uint8_t *p_dat memcpy(p_msch->cbw.command, &cmd_request_sense, p_msch->cbw.cmd_len); - TU_ASSERT_ERR ( msch_command_xfer(p_msch, p_data) ); + TU_ASSERT_ERR ( msch_command_xfer(dev_addr, p_msch, p_data) ); return TUSB_ERROR_NONE; } @@ -226,8 +225,8 @@ tusb_error_t tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, msc_csw_t * memcpy(p_msch->cbw.command, &cmd_test_unit_ready, p_msch->cbw.cmd_len); // TODO MSCH refractor test uinit ready - TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false) ); - TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_in , (uint8_t*) p_csw, sizeof(msc_csw_t), true) ); + TU_ASSERT_ERR( hcd_pipe_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false) ); + TU_ASSERT_ERR( hcd_pipe_xfer(dev_addr, p_msch->bulk_in , (uint8_t*) p_csw, sizeof(msc_csw_t), true) ); return TUSB_ERROR_NONE; } @@ -253,7 +252,7 @@ tusb_error_t tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uin memcpy(p_msch->cbw.command, &cmd_read10, p_msch->cbw.cmd_len); - TU_ASSERT_ERR ( msch_command_xfer(p_msch, p_buffer)); + TU_ASSERT_ERR ( msch_command_xfer(dev_addr, p_msch, p_buffer)); return TUSB_ERROR_NONE; } @@ -279,7 +278,7 @@ tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffe memcpy(p_msch->cbw.command, &cmd_write10, p_msch->cbw.cmd_len); - TU_ASSERT_ERR ( msch_command_xfer(p_msch, (void*) p_buffer)); + TU_ASSERT_ERR ( msch_command_xfer(dev_addr, p_msch, (void*) p_buffer)); return TUSB_ERROR_NONE; } @@ -293,47 +292,52 @@ void msch_init(void) msch_sem_hdl = osal_semaphore_create(&msch_sem_def); } -bool msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) +bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length) { - if (! ( MSC_SUBCLASS_SCSI == p_interface_desc->bInterfaceSubClass && - MSC_PROTOCOL_BOT == p_interface_desc->bInterfaceProtocol ) ) - { - return TUSB_ERROR_MSC_UNSUPPORTED_PROTOCOL; - } + TU_VERIFY (MSC_SUBCLASS_SCSI == itf_desc->bInterfaceSubClass && + MSC_PROTOCOL_BOT == itf_desc->bInterfaceProtocol); + + msch_interface_t* p_msc = &msch_data[dev_addr-1]; //------------- Open Data Pipe -------------// - tusb_desc_endpoint_t const *p_endpoint; - p_endpoint = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) p_interface_desc ); + tusb_desc_endpoint_t const * ep_desc = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) itf_desc ); for(uint32_t i=0; i<2; i++) { - TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType); - TU_ASSERT(TUSB_XFER_BULK == p_endpoint->bmAttributes.xfer); + TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType); + TU_ASSERT(TUSB_XFER_BULK == ep_desc->bmAttributes.xfer); - pipe_handle_t * p_pipe_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_IN_MASK ) ? - &msch_data[dev_addr-1].bulk_in : &msch_data[dev_addr-1].bulk_out; + pipe_handle_t * p_pipe_hdl = ( ep_desc->bEndpointAddress & TUSB_DIR_IN_MASK ) ? + &p_msc->bulk_in : &p_msc->bulk_out; - (*p_pipe_hdl) = hcd_pipe_open(dev_addr, p_endpoint, TUSB_CLASS_MSC); + (*p_pipe_hdl) = hcd_pipe_open(dev_addr, ep_desc, TUSB_CLASS_MSC); TU_ASSERT( pipehandle_is_valid(*p_pipe_hdl) ); - p_endpoint = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) p_endpoint ); + if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) + { + p_msc->ep_in = ep_desc->bEndpointAddress; + }else + { + p_msc->ep_out = ep_desc->bEndpointAddress; + } + + ep_desc = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) ep_desc ); } - msch_data[dev_addr-1].interface_number = p_interface_desc->bInterfaceNumber; + p_msc->itf_numr = itf_desc->bInterfaceNumber; (*p_length) += sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t); - //------------- Get Max Lun -------------// tusb_control_request_t request = { .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_INTERFACE, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_IN }, .bRequest = MSC_REQ_GET_MAX_LUN, .wValue = 0, - .wIndex = msch_data[dev_addr-1].interface_number, + .wIndex = p_msc->itf_numr, .wLength = 1 }; // TODO STALL means zero TU_ASSERT( usbh_control_xfer( dev_addr, &request, msch_buffer ) ); - msch_data[dev_addr-1].max_lun = msch_buffer[0]; + p_msc->max_lun = msch_buffer[0]; #if 0 //------------- Reset -------------// @@ -341,7 +345,7 @@ bool msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interfac .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_INTERFACE, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_OUT }, .bRequest = MSC_REQ_RESET, .wValue = 0, - .wIndex = msch_data[dev_addr-1].interface_number, + .wIndex = p_msc->itf_numr, .wLength = 0 }; TU_ASSERT( usbh_control_xfer( dev_addr, &request, NULL ) ); @@ -352,8 +356,8 @@ bool msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interfac tusbh_msc_inquiry(dev_addr, 0, msch_buffer); TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT) ); - memcpy(msch_data[dev_addr-1].vendor_id , ((scsi_inquiry_resp_t*) msch_buffer)->vendor_id , 8); - memcpy(msch_data[dev_addr-1].product_id, ((scsi_inquiry_resp_t*) msch_buffer)->product_id, 16); + memcpy(p_msc->vendor_id , ((scsi_inquiry_resp_t*) msch_buffer)->vendor_id , 8); + memcpy(p_msc->product_id, ((scsi_inquiry_resp_t*) msch_buffer)->product_id, 16); //------------- SCSI Read Capacity 10 -------------// tusbh_msc_read_capacity10(dev_addr, 0, msch_buffer); @@ -361,20 +365,20 @@ bool msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interfac // NOTE: my toshiba thumb-drive stall the first Read Capacity and require the sequence // Read Capacity --> Stalled --> Clear Stall --> Request Sense --> Read Capacity (2) to work - if ( hcd_pipe_is_stalled(msch_data[dev_addr-1].bulk_in) ) + if ( hcd_pipe_is_stalled(dev_addr, p_msc->bulk_in) ) { // clear stall TODO abstract clear stall function request = (tusb_control_request_t) { .bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_ENDPOINT, .type = TUSB_REQ_TYPE_STANDARD, .direction = TUSB_DIR_OUT }, .bRequest = TUSB_REQ_CLEAR_FEATURE, .wValue = 0, - .wIndex = hcd_pipe_get_endpoint_addr(msch_data[dev_addr-1].bulk_in), // FIXME use ep addr + .wIndex = p_msc->ep_in, .wLength = 0 }; TU_ASSERT(usbh_control_xfer( dev_addr, &request, NULL )); - hcd_pipe_clear_stall(msch_data[dev_addr-1].bulk_in); + hcd_pipe_clear_stall(dev_addr, p_msc->bulk_in); TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT) ); // wait for SCSI status //------------- SCSI Request Sense -------------// @@ -386,22 +390,24 @@ bool msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interfac TU_ASSERT(osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT)); } - msch_data[dev_addr-1].last_lba = __be2n( ((scsi_read_capacity10_resp_t*)msch_buffer)->last_lba ); - msch_data[dev_addr-1].block_size = (uint16_t) __be2n( ((scsi_read_capacity10_resp_t*)msch_buffer)->block_size ); + p_msc->last_lba = __be2n( ((scsi_read_capacity10_resp_t*)msch_buffer)->last_lba ); + p_msc->block_size = (uint16_t) __be2n( ((scsi_read_capacity10_resp_t*)msch_buffer)->block_size ); + + p_msc->is_initialized = true; - msch_data[dev_addr-1].is_initialized = true; tuh_msc_mounted_cb(dev_addr); return true; } -void msch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes) +void msch_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) { - if ( pipehandle_is_equal(pipe_hdl, msch_data[pipe_hdl.dev_addr-1].bulk_in) ) + msch_interface_t* p_msc = &msch_data[dev_addr-1]; + if ( ep_addr == p_msc->ep_in ) { - if (msch_data[pipe_hdl.dev_addr-1].is_initialized) + if (p_msc->is_initialized) { - tuh_msc_isr(pipe_hdl.dev_addr, event, xferred_bytes); + tuh_msc_isr(dev_addr, event, xferred_bytes); }else { // still initializing under open subtask osal_semaphore_post(msch_sem_hdl, true); @@ -411,8 +417,8 @@ void msch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_byte void msch_close(uint8_t dev_addr) { - (void) hcd_pipe_close(msch_data[dev_addr-1].bulk_in); - (void) hcd_pipe_close(msch_data[dev_addr-1].bulk_out); + (void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].bulk_in); + (void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].bulk_out); tu_memclr(&msch_data[dev_addr-1], sizeof(msch_interface_t)); osal_semaphore_reset(msch_sem_hdl); diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index 5c5068eb3..a77b494ed 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -189,7 +189,10 @@ void tuh_msc_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes); typedef struct { pipe_handle_t bulk_in, bulk_out; - uint8_t interface_number; + + uint8_t itf_numr; + uint8_t ep_in; + uint8_t ep_out; uint8_t max_lun; uint16_t block_size; @@ -204,8 +207,8 @@ typedef struct { }msch_interface_t; void msch_init(void); -bool msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; -void msch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); +bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length); +void msch_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); void msch_close(uint8_t dev_addr); #endif diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index fdb1936d3..8db923edf 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -458,8 +458,8 @@ typedef struct // Note control qhd of dev0 is used as head of async list, always exists struct { - ehci_qhd_t qhd; - ehci_qtd_t qtd; + ehci_qhd_t qhd; + ehci_qtd_t qtd; }control[CFG_TUSB_HOST_DEVICE_MAX+1]; struct { diff --git a/src/host/usbh.c b/src/host/usbh.c index 1c698cb35..9fe16e5d1 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -81,7 +81,7 @@ static host_class_driver_t const usbh_class_drivers[] = { .class_code = TUSB_CLASS_MSC, .init = msch_init, - .open_subtask = msch_open_subtask, + .open_subtask = msch_open, .isr = msch_isr, .close = msch_close }, diff --git a/tests/lpc18xx_43xx/test/host/msc/test_msc_host.c b/tests/lpc18xx_43xx/test/host/msc/test_msc_host.c index 3f4f9102b..b89a716c2 100644 --- a/tests/lpc18xx_43xx/test/host/msc/test_msc_host.c +++ b/tests/lpc18xx_43xx/test/host/msc/test_msc_host.c @@ -86,7 +86,7 @@ void test_open_pipe_in_failed(void) { hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, pipe_null); - TEST_ASSERT(TUSB_ERROR_NONE != msch_open_subtask(dev_addr, p_msc_interface_desc, &length)); + TEST_ASSERT(TUSB_ERROR_NONE != msch_open(dev_addr, p_msc_interface_desc, &length)); } void test_open_pipe_out_failed(void) @@ -94,7 +94,7 @@ void test_open_pipe_out_failed(void) hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, (pipe_handle_t) {1} ); hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_out, TUSB_CLASS_MSC, pipe_null); - TEST_ASSERT(TUSB_ERROR_NONE != msch_open_subtask(dev_addr, p_msc_interface_desc, &length)); + TEST_ASSERT(TUSB_ERROR_NONE != msch_open(dev_addr, p_msc_interface_desc, &length)); } tusb_error_t stub_control_xfer(uint8_t dev_addr, uint8_t bmRequestType, uint8_t bRequest, @@ -129,7 +129,7 @@ void test_open_desc_length(void) hcd_pipe_queue_xfer_IgnoreAndReturn(TUSB_ERROR_NONE); //------------- Code Under Test -------------// - TEST_ASSERT_STATUS( msch_open_subtask(dev_addr, p_msc_interface_desc, &length) ); + TEST_ASSERT_STATUS( msch_open(dev_addr, p_msc_interface_desc, &length) ); TEST_ASSERT_EQUAL(sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t), length); @@ -144,7 +144,7 @@ void test_open_ok(void) usbh_control_xfer_subtask_StubWithCallback(stub_control_xfer); //------------- Code Under Test -------------// - TEST_ASSERT_STATUS( msch_open_subtask(dev_addr, p_msc_interface_desc, &length) ); + TEST_ASSERT_STATUS( msch_open(dev_addr, p_msc_interface_desc, &length) ); TEST_ASSERT_EQUAL(p_msc_interface_desc->bInterfaceNumber, p_msc->interface_number); } -- cgit v1.3.1 From 212deaf2f8102208099279562b0c6ce04cb60515 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 10 Dec 2018 22:19:01 +0700 Subject: usbh name change --- src/class/cdc/cdc_host.c | 16 ++++++++-------- src/class/cdc/cdc_host.h | 4 ++-- src/class/msc/msc_host.c | 14 +++++++------- src/host/ehci/ehci.c | 12 ++++++------ src/host/hcd.h | 4 ++-- src/host/hub.c | 6 +++--- src/host/hub.h | 4 ++-- src/host/usbh.c | 12 ++++++------ src/host/usbh.h | 2 +- 9 files changed, 37 insertions(+), 37 deletions(-) (limited to 'src/host') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index c6378e546..a44a0b97c 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -106,24 +106,24 @@ bool tuh_cdc_serial_is_mounted(uint8_t dev_addr) (cdch_data[dev_addr-1].itf_protocol <= CDC_COMM_PROTOCOL_ATCOMMAND_CDMA); } -tusb_error_t tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length, bool is_notify) +bool tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length, bool is_notify) { - TU_ASSERT( tuh_cdc_mounted(dev_addr), TUSB_ERROR_CDCH_DEVICE_NOT_MOUNTED); - TU_ASSERT( p_data != NULL && length, TUSB_ERROR_INVALID_PARA); + TU_VERIFY( tuh_cdc_mounted(dev_addr) ); + TU_VERIFY( p_data != NULL && length, TUSB_ERROR_INVALID_PARA); pipe_handle_t pipe_out = cdch_data[dev_addr-1].pipe_out; - if ( hcd_pipe_is_busy(dev_addr, pipe_out) ) return TUSB_ERROR_INTERFACE_IS_BUSY; + if ( hcd_pipe_is_busy(dev_addr, pipe_out) ) return false; return hcd_pipe_xfer(dev_addr, pipe_out, (void *) p_data, length, is_notify); } -tusb_error_t tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is_notify) +bool tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is_notify) { - TU_ASSERT( tuh_cdc_mounted(dev_addr), TUSB_ERROR_CDCH_DEVICE_NOT_MOUNTED); - TU_ASSERT( p_buffer != NULL && length, TUSB_ERROR_INVALID_PARA); + TU_VERIFY( tuh_cdc_mounted(dev_addr) ); + TU_VERIFY( p_buffer != NULL && length, TUSB_ERROR_INVALID_PARA); pipe_handle_t pipe_in = cdch_data[dev_addr-1].pipe_in; - if ( hcd_pipe_is_busy(dev_addr, pipe_in) ) return TUSB_ERROR_INTERFACE_IS_BUSY; + if ( hcd_pipe_is_busy(dev_addr, pipe_in) ) return false; return hcd_pipe_xfer(dev_addr, pipe_in, p_buffer, length, is_notify); } diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index 192842dfa..5388a8f60 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -86,7 +86,7 @@ bool tuh_cdc_is_busy(uint8_t dev_addr, cdc_pipeid_t pipeid); * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by the * interface's callback function. \a p_data must be declared with \ref CFG_TUSB_MEM_SECTION. */ -tusb_error_t tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length, bool is_notify); +bool tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length, bool is_notify); /** \brief Perform USB IN transfer to get data from device * \param[in] dev_addr device address @@ -99,7 +99,7 @@ tusb_error_t tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by the * interface's callback function. \a p_data must be declared with \ref CFG_TUSB_MEM_SECTION. */ -tusb_error_t tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is_notify); +bool tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is_notify); //--------------------------------------------------------------------+ // CDC APPLICATION CALLBACKS diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index f2b4deb73..b61256805 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -116,16 +116,16 @@ static tusb_error_t msch_command_xfer(uint8_t dev_addr, msch_interface_t * p_msc { // there is data phase if (p_msch->cbw.dir & TUSB_DIR_IN_MASK) { - TU_ASSERT_ERR( hcd_pipe_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false) ); - TU_ASSERT_ERR( hcd_pipe_queue_xfer(dev_addr, p_msch->bulk_in , p_buffer, p_msch->cbw.total_bytes) ); + TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false), TUSB_ERROR_FAILED ); + TU_ASSERT( hcd_pipe_queue_xfer(dev_addr, p_msch->bulk_in , p_buffer, p_msch->cbw.total_bytes), TUSB_ERROR_FAILED ); }else { - TU_ASSERT_ERR( hcd_pipe_queue_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t)) ); - TU_ASSERT_ERR( hcd_pipe_xfer(dev_addr, p_msch->bulk_out , p_buffer, p_msch->cbw.total_bytes, false) ); + TU_ASSERT( hcd_pipe_queue_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t)), TUSB_ERROR_FAILED ); + TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_out , p_buffer, p_msch->cbw.total_bytes, false), TUSB_ERROR_FAILED ); } } - TU_ASSERT_ERR( hcd_pipe_xfer(dev_addr, p_msch->bulk_in , (uint8_t*) &p_msch->csw, sizeof(msc_csw_t), true) ); + TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_in , (uint8_t*) &p_msch->csw, sizeof(msc_csw_t), true), TUSB_ERROR_FAILED); return TUSB_ERROR_NONE; } @@ -225,8 +225,8 @@ tusb_error_t tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, msc_csw_t * memcpy(p_msch->cbw.command, &cmd_test_unit_ready, p_msch->cbw.cmd_len); // TODO MSCH refractor test uinit ready - TU_ASSERT_ERR( hcd_pipe_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false) ); - TU_ASSERT_ERR( hcd_pipe_xfer(dev_addr, p_msch->bulk_in , (uint8_t*) p_csw, sizeof(msc_csw_t), true) ); + TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false), TUSB_ERROR_FAILED ); + TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_in , (uint8_t*) p_csw, sizeof(msc_csw_t), true), TUSB_ERROR_FAILED ); return TUSB_ERROR_NONE; } diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index dd19a5224..bfdc4e4f7 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -443,7 +443,7 @@ pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint return (pipe_handle_t) { .index = qhd_get_index(p_qhd) }; } -tusb_error_t hcd_pipe_queue_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) +bool hcd_pipe_queue_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) { //------------- TODO pipe handle validate -------------// @@ -451,7 +451,7 @@ tusb_error_t hcd_pipe_queue_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); ehci_qtd_t *p_qtd = qtd_find_free(dev_addr); - TU_ASSERT(p_qtd, TUSB_ERROR_EHCI_NOT_ENOUGH_QTD); + TU_ASSERT(p_qtd); qtd_init(p_qtd, (uint32_t) buffer, total_bytes); p_qtd->pid = p_qhd->pid_non_control; @@ -459,12 +459,12 @@ tusb_error_t hcd_pipe_queue_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint //------------- insert TD to TD list -------------// qtd_insert_to_qhd(p_qhd, p_qtd); - return TUSB_ERROR_NONE; + return true; } -tusb_error_t hcd_pipe_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) +bool hcd_pipe_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) { - TU_ASSERT_ERR ( hcd_pipe_queue_xfer(dev_addr, pipe_hdl, buffer, total_bytes) ); + TU_ASSERT ( hcd_pipe_queue_xfer(dev_addr, pipe_hdl, buffer, total_bytes) ); ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); @@ -474,7 +474,7 @@ tusb_error_t hcd_pipe_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t bu } p_qhd->qtd_overlay.next.address = (uint32_t) p_qhd->p_qtd_list_head; // attach head QTD to QHD start transferring - return TUSB_ERROR_NONE; + return true; } /// pipe_close should only be called as a part of unmount/safe-remove process diff --git a/src/host/hcd.h b/src/host/hcd.h index 9ea86a5fe..0449754c7 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -145,8 +145,8 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * // TODO control xfer should be used via usbh layer pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); -tusb_error_t hcd_pipe_queue_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) ATTR_WARN_UNUSED_RESULT; // only queue, not transferring yet -tusb_error_t hcd_pipe_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) ATTR_WARN_UNUSED_RESULT; +bool hcd_pipe_queue_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) ATTR_WARN_UNUSED_RESULT; // only queue, not transferring yet +bool hcd_pipe_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) ATTR_WARN_UNUSED_RESULT; bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, pipe_handle_t pipe_hdl); bool hcd_pipe_is_busy(uint8_t dev_addr, pipe_handle_t pipe_hdl); diff --git a/src/host/hub.c b/src/host/hub.c index bc0592a97..a5b0d2e99 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -155,7 +155,7 @@ void hub_init(void) // hub_enum_sem_hdl = osal_semaphore_create( OSAL_SEM_REF(hub_enum_semaphore) ); } -bool hub_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) +bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) { // not support multiple TT yet if ( p_interface_desc->bInterfaceProtocol > 1 ) return false; @@ -204,7 +204,7 @@ bool hub_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t co } //------------- Queue the initial Status endpoint transfer -------------// - TU_ASSERT( TUSB_ERROR_NONE == hcd_pipe_xfer(dev_addr, hub_data[dev_addr-1].pipe_status, &hub_data[dev_addr-1].status_change, 1, true) ); + TU_ASSERT( hcd_pipe_xfer(dev_addr, hub_data[dev_addr-1].pipe_status, &hub_data[dev_addr-1].status_change, 1, true) ); return true; } @@ -254,7 +254,7 @@ void hub_close(uint8_t dev_addr) // osal_semaphore_reset(hub_enum_sem_hdl); } -tusb_error_t hub_status_pipe_queue(uint8_t dev_addr) +bool hub_status_pipe_queue(uint8_t dev_addr) { return hcd_pipe_xfer(dev_addr, hub_data[dev_addr-1].pipe_status, &hub_data[dev_addr-1].status_change, 1, true); } diff --git a/src/host/hub.h b/src/host/hub.h index 8e8416d8f..dc26a098c 100644 --- a/src/host/hub.h +++ b/src/host/hub.h @@ -187,7 +187,7 @@ TU_VERIFY_STATIC( sizeof(hub_port_status_response_t) == 4, "size is not correct" bool hub_port_reset_subtask(uint8_t hub_addr, uint8_t hub_port); bool hub_port_clear_feature_subtask(uint8_t hub_addr, uint8_t hub_port, uint8_t feature); tusb_speed_t hub_port_get_speed(void); -tusb_error_t hub_status_pipe_queue(uint8_t dev_addr); +bool hub_status_pipe_queue(uint8_t dev_addr); //--------------------------------------------------------------------+ // USBH-CLASS DRIVER API @@ -195,7 +195,7 @@ tusb_error_t hub_status_pipe_queue(uint8_t dev_addr); #ifdef _TINY_USB_SOURCE_FILE_ void hub_init(void); -bool hub_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; +bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; void hub_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes); void hub_close(uint8_t dev_addr); diff --git a/src/host/usbh.c b/src/host/usbh.c index 9fe16e5d1..127d0f8fd 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -71,7 +71,7 @@ static host_class_driver_t const usbh_class_drivers[] = { .class_code = TUSB_CLASS_CDC, .init = cdch_init, - .open_subtask = cdch_open, + .open = cdch_open, .isr = cdch_isr, .close = cdch_close }, @@ -81,7 +81,7 @@ static host_class_driver_t const usbh_class_drivers[] = { .class_code = TUSB_CLASS_MSC, .init = msch_init, - .open_subtask = msch_open, + .open = msch_open, .isr = msch_isr, .close = msch_close }, @@ -91,7 +91,7 @@ static host_class_driver_t const usbh_class_drivers[] = { .class_code = TUSB_CLASS_HID, .init = hidh_init, - .open_subtask = hidh_open_subtask, + .open = hidh_open_subtask, .isr = hidh_isr, .close = hidh_close }, @@ -101,7 +101,7 @@ static host_class_driver_t const usbh_class_drivers[] = { .class_code = TUSB_CLASS_HUB, .init = hub_init, - .open_subtask = hub_open_subtask, + .open = hub_open, .isr = hub_isr, .close = hub_close }, @@ -111,7 +111,7 @@ static host_class_driver_t const usbh_class_drivers[] = { .class_code = TUSB_CLASS_VENDOR_SPECIFIC, .init = cush_init, - .open_subtask = cush_open_subtask, + .open = cush_open_subtask, .isr = cush_isr, .close = cush_close } @@ -611,7 +611,7 @@ bool enum_task(hcd_event_t* event) { uint16_t itf_len = 0; - if ( usbh_class_drivers[drv_id].open_subtask(new_dev->rhport, new_addr, desc_itf, &itf_len) ) + if ( usbh_class_drivers[drv_id].open(new_dev->rhport, new_addr, desc_itf, &itf_len) ) { mark_interface_endpoint(new_dev->ep2drv, p_desc, itf_len, drv_id); } diff --git a/src/host/usbh.h b/src/host/usbh.h index a2e196c9a..3656b9a0d 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -67,7 +67,7 @@ typedef struct { uint8_t class_code; void (* const init) (void); - bool (* const open_subtask)(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const * itf_desc, uint16_t* outlen); + bool (* const open)(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const * itf_desc, uint16_t* outlen); void (* const isr) (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t len); void (* const close) (uint8_t); } host_class_driver_t; -- cgit v1.3.1 From e863c99a6fd50aee7cea2bcf3b86ce0cda14cf95 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 10 Dec 2018 23:15:53 +0700 Subject: fix msc host --- src/class/msc/msc_host.c | 2 +- src/host/ehci/ehci.c | 6 +++--- src/host/usbh.c | 50 ++++++++++++++++++++++++------------------------ 3 files changed, 29 insertions(+), 29 deletions(-) (limited to 'src/host') diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index b61256805..72f4afa27 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -310,7 +310,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it pipe_handle_t * p_pipe_hdl = ( ep_desc->bEndpointAddress & TUSB_DIR_IN_MASK ) ? &p_msc->bulk_in : &p_msc->bulk_out; - (*p_pipe_hdl) = hcd_pipe_open(dev_addr, ep_desc, TUSB_CLASS_MSC); + (*p_pipe_hdl) = hcd_pipe_open(rhport, dev_addr, ep_desc); TU_ASSERT( pipehandle_is_valid(*p_pipe_hdl) ); if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index bfdc4e4f7..fbc110b83 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -829,13 +829,13 @@ static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr) static inline ehci_qhd_t* qhd_find_free (uint8_t dev_addr) { - uint8_t relative_address = dev_addr-1; + uint8_t relative_addr = dev_addr-1; uint8_t index=0; - while( index Date: Tue, 11 Dec 2018 00:56:21 +0700 Subject: completely remove pipe handle for cdc/hub/ehci --- src/class/cdc/cdc_host.c | 44 ++++++++----------- src/host/ehci/ehci.c | 111 ++++++++++++++++++++++------------------------- src/host/ehci/ehci.h | 8 +--- src/host/hcd.h | 32 +++++--------- src/host/hub.c | 31 +++++++------ src/host/hub.h | 2 +- src/host/usbh.c | 2 +- 7 files changed, 102 insertions(+), 128 deletions(-) (limited to 'src/host') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index a44a0b97c..78b338f15 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -52,14 +52,12 @@ typedef struct { uint8_t itf_num; uint8_t itf_protocol; - cdc_acm_capability_t acm_capability; - - pipe_handle_t pipe_notification, pipe_out, pipe_in; - uint8_t ep_notif; uint8_t ep_in; uint8_t ep_out; + cdc_acm_capability_t acm_capability; + } cdch_data_t; //--------------------------------------------------------------------+ @@ -82,13 +80,13 @@ bool tuh_cdc_is_busy(uint8_t dev_addr, cdc_pipeid_t pipeid) switch (pipeid) { case CDC_PIPE_NOTIFICATION: - return hcd_pipe_is_busy(dev_addr, p_cdc->pipe_notification ); + return hcd_pipe_is_busy(dev_addr, p_cdc->ep_notif ); case CDC_PIPE_DATA_IN: - return hcd_pipe_is_busy(dev_addr, p_cdc->pipe_in ); + return hcd_pipe_is_busy(dev_addr, p_cdc->ep_in ); case CDC_PIPE_DATA_OUT: - return hcd_pipe_is_busy(dev_addr, p_cdc->pipe_out ); + return hcd_pipe_is_busy(dev_addr, p_cdc->ep_out ); default: return false; @@ -111,10 +109,10 @@ bool tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length, bool i TU_VERIFY( tuh_cdc_mounted(dev_addr) ); TU_VERIFY( p_data != NULL && length, TUSB_ERROR_INVALID_PARA); - pipe_handle_t pipe_out = cdch_data[dev_addr-1].pipe_out; - if ( hcd_pipe_is_busy(dev_addr, pipe_out) ) return false; + uint8_t const ep_out = cdch_data[dev_addr-1].ep_out; + if ( hcd_pipe_is_busy(dev_addr, ep_out) ) return false; - return hcd_pipe_xfer(dev_addr, pipe_out, (void *) p_data, length, is_notify); + return hcd_pipe_xfer(dev_addr, ep_out, (void *) p_data, length, is_notify); } bool tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is_notify) @@ -122,10 +120,10 @@ bool tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is TU_VERIFY( tuh_cdc_mounted(dev_addr) ); TU_VERIFY( p_buffer != NULL && length, TUSB_ERROR_INVALID_PARA); - pipe_handle_t pipe_in = cdch_data[dev_addr-1].pipe_in; - if ( hcd_pipe_is_busy(dev_addr, pipe_in) ) return false; + uint8_t const ep_in = cdch_data[dev_addr-1].ep_in; + if ( hcd_pipe_is_busy(dev_addr, ep_in) ) return false; - return hcd_pipe_xfer(dev_addr, pipe_in, p_buffer, length, is_notify); + return hcd_pipe_xfer(dev_addr, ep_in, p_buffer, length, is_notify); } //--------------------------------------------------------------------+ @@ -172,21 +170,19 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it if ( TUSB_DESC_ENDPOINT == p_desc[DESC_OFFSET_TYPE]) { - // notification endpoint if any + // notification endpoint tusb_desc_endpoint_t const * ep_desc = (tusb_desc_endpoint_t const *) p_desc; - p_cdc->pipe_notification = hcd_pipe_open(rhport, dev_addr, ep_desc); + TU_ASSERT( hcd_pipe_open(rhport, dev_addr, ep_desc) ); p_cdc->ep_notif = ep_desc->bEndpointAddress; (*p_length) += p_desc[DESC_OFFSET_LEN]; p_desc = descriptor_next(p_desc); - - TU_ASSERT(pipehandle_is_valid(p_cdc->pipe_notification)); } //------------- Data Interface (if any) -------------// if ( (TUSB_DESC_INTERFACE == p_desc[DESC_OFFSET_TYPE]) && - (TUSB_CLASS_CDC_DATA == ((tusb_desc_interface_t const *) p_desc)->bInterfaceClass) ) + (TUSB_CLASS_CDC_DATA == ((tusb_desc_interface_t const *) p_desc)->bInterfaceClass) ) { (*p_length) += p_desc[DESC_OFFSET_LEN]; p_desc = descriptor_next(p_desc); @@ -198,11 +194,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType); TU_ASSERT(TUSB_XFER_BULK == ep_desc->bmAttributes.xfer); - pipe_handle_t * p_pipe_hdl = ( ep_desc->bEndpointAddress & TUSB_DIR_IN_MASK ) ? - &p_cdc->pipe_in : &p_cdc->pipe_out; - - (*p_pipe_hdl) = hcd_pipe_open(rhport, dev_addr, ep_desc); - TU_ASSERT ( pipehandle_is_valid(*p_pipe_hdl) ); + TU_ASSERT(hcd_pipe_open(rhport, dev_addr, ep_desc)); if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) { @@ -241,9 +233,9 @@ void cdch_close(uint8_t dev_addr) { cdch_data_t * p_cdc = &cdch_data[dev_addr-1]; - hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, p_cdc->pipe_notification); - hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, p_cdc->pipe_in); - hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, p_cdc->pipe_out); + hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, p_cdc->ep_notif); + hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, p_cdc->ep_in); + hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, p_cdc->ep_out); tu_memclr(p_cdc, sizeof(cdch_data_t)); } diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index fbc110b83..f9b9db797 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -77,9 +77,9 @@ static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr) ATTR_ALWAYS_INLINE static inline uint8_t qhd_get_index(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; -static inline ehci_qhd_t* qhd_find_free (uint8_t dev_addr) ATTR_PURE ATTR_ALWAYS_INLINE; +static inline ehci_qhd_t* qhd_find_free (void); static inline tusb_xfer_type_t qhd_get_xfer_type(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; -static inline ehci_qhd_t* qhd_get_from_pipe_handle(uint8_t dev_addr, pipe_handle_t pipe_hdl); +static inline ehci_qhd_t* qhd_get_from_pipe_handle(uint8_t dev_addr, uint8_t ep_addr); // determine if a queue head has bus-related error static inline bool qhd_has_xact_error(ehci_qhd_t * p_qhd) @@ -321,15 +321,6 @@ bool hcd_pipe_control_close(uint8_t dev_addr) return true; } -bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* ep_desc) -{ - // FIXME control only for now - (void) rhport; - hcd_pipe_open(rhport, dev_addr, ep_desc); - - return true; -} - bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) { // FIXME control only for now @@ -389,12 +380,10 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet //--------------------------------------------------------------------+ // BULK/INT/ISO PIPE API //--------------------------------------------------------------------+ -pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) +bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) { - pipe_handle_t const null_handle = { .index = 0 }; - // TODO not support ISO yet - if (ep_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) return null_handle; + TU_ASSERT (ep_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS); //------------- Prepare Queue Head -------------// ehci_qhd_t * p_qhd; @@ -404,11 +393,11 @@ pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint p_qhd = get_control_qhd(dev_addr); }else { - p_qhd = qhd_find_free(dev_addr); + p_qhd = qhd_find_free(); } - TU_ASSERT(p_qhd, null_handle); + TU_ASSERT(p_qhd); - qhd_init( p_qhd, dev_addr, ep_desc); + qhd_init(p_qhd, dev_addr, ep_desc); //------------- Insert to Async List -------------// ehci_link_t * list_head; @@ -440,15 +429,13 @@ pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint // TODO might need to disable async/period list list_insert( list_head, (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD); - return (pipe_handle_t) { .index = qhd_get_index(p_qhd) }; + return true; } -bool hcd_pipe_queue_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) +bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes) { - //------------- TODO pipe handle validate -------------// - //------------- set up QTD -------------// - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); + ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); ehci_qtd_t *p_qtd = qtd_find_free(dev_addr); TU_ASSERT(p_qtd); @@ -462,11 +449,11 @@ bool hcd_pipe_queue_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffe return true; } -bool hcd_pipe_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) +bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) { - TU_ASSERT ( hcd_pipe_queue_xfer(dev_addr, pipe_hdl, buffer, total_bytes) ); + TU_ASSERT ( hcd_pipe_queue_xfer(dev_addr, ep_addr, buffer, total_bytes) ); - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); + ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); if ( int_on_complete ) { // the just added qtd is pointed by list_tail @@ -478,9 +465,9 @@ bool hcd_pipe_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], u } /// pipe_close should only be called as a part of unmount/safe-remove process -bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, pipe_handle_t pipe_hdl) +bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) { - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); + ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); // async list needs async advance handshake to make sure host controller has released cached data // non-control does not use async advance, it will eventually free by control pipe close @@ -505,21 +492,21 @@ bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, pipe_handle_t pipe_hdl) return true; } -bool hcd_pipe_is_busy(uint8_t dev_addr, pipe_handle_t pipe_hdl) +bool hcd_pipe_is_busy(uint8_t dev_addr, uint8_t ep_addr) { - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); + ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); return !p_qhd->qtd_overlay.halted && (p_qhd->p_qtd_list_head != NULL); } -bool hcd_pipe_is_stalled(uint8_t dev_addr, pipe_handle_t pipe_hdl) +bool hcd_pipe_is_stalled(uint8_t dev_addr, uint8_t ep_addr) { - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); + ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); return p_qhd->qtd_overlay.halted && !qhd_has_xact_error(p_qhd); } -tusb_error_t hcd_pipe_clear_stall(uint8_t dev_addr, pipe_handle_t pipe_hdl) +tusb_error_t hcd_pipe_clear_stall(uint8_t dev_addr, uint8_t ep_addr) { - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, pipe_hdl); + ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); p_qhd->qtd_overlay.halted = 0; // TODO reset data toggle ? return TUSB_ERROR_NONE; @@ -553,18 +540,22 @@ static void async_advance_isr(ehci_qhd_t * const async_head) p_control_qhd->used = 0; // Host Controller has cleaned up its cached data for this device, set state to unplug - _usbh_devices[dev_addr+1].state = TUSB_DEVICE_STATE_UNPLUG; + _usbh_devices[dev_addr].state = TUSB_DEVICE_STATE_UNPLUG; for (uint8_t i=0; idevice_address-1].qhd; + return NULL; } static inline tusb_xfer_type_t qhd_get_xfer_type(ehci_qhd_t const * p_qhd) @@ -854,21 +839,31 @@ static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd) return (ehci_qhd_t*) tu_align32(p_qhd->next.address); } -static inline ehci_qhd_t* qhd_get_from_pipe_handle(uint8_t dev_addr, pipe_handle_t pipe_hdl) +static inline ehci_qhd_t* qhd_get_from_pipe_handle(uint8_t dev_addr, uint8_t ep_addr) { - return &ehci_data.device[dev_addr-1].qhd[pipe_hdl.index]; + ehci_qhd_t* qhd_pool = ehci_data.qhd_pool; + + for(uint32_t i=0; i 0; -} - -static inline bool pipehandle_is_equal(pipe_handle_t x, pipe_handle_t y) -{ - return (x.index == y.index); -} - //--------------------------------------------------------------------+ // USBH-HCD API //--------------------------------------------------------------------+ @@ -134,7 +123,6 @@ void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t ev //--------------------------------------------------------------------+ // Endpoints API //--------------------------------------------------------------------+ -bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* ep_desc); bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr); bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]); bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen); @@ -144,14 +132,14 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * //--------------------------------------------------------------------+ // TODO control xfer should be used via usbh layer -pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); -bool hcd_pipe_queue_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) ATTR_WARN_UNUSED_RESULT; // only queue, not transferring yet -bool hcd_pipe_xfer(uint8_t dev_addr, pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) ATTR_WARN_UNUSED_RESULT; -bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, pipe_handle_t pipe_hdl); +bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); +bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes); // only queue, not transferring yet +bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete); +bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr); // TODO remove -bool hcd_pipe_is_busy(uint8_t dev_addr, pipe_handle_t pipe_hdl); -bool hcd_pipe_is_stalled(uint8_t dev_addr, pipe_handle_t pipe_hdl); // stalled also counted as error -tusb_error_t hcd_pipe_clear_stall(uint8_t dev_addr, pipe_handle_t pipe_hdl); +bool hcd_pipe_is_busy(uint8_t dev_addr, uint8_t ep_addr); +bool hcd_pipe_is_stalled(uint8_t dev_addr, uint8_t ep_addr); // stalled also counted as error +tusb_error_t hcd_pipe_clear_stall(uint8_t dev_addr, uint8_t ep_addr); #if 0 tusb_error_t hcd_pipe_cancel()ATTR_WARN_UNUSED_RESULT; diff --git a/src/host/hub.c b/src/host/hub.c index a5b0d2e99..f755928e8 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -50,9 +50,10 @@ //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ -typedef struct { - pipe_handle_t pipe_status; - uint8_t interface_number; +typedef struct +{ + uint8_t itf_num; + uint8_t ep_status; uint8_t port_number; uint8_t status_change; // data from status change interrupt endpoint }usbh_hub_t; @@ -161,15 +162,16 @@ bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_i if ( p_interface_desc->bInterfaceProtocol > 1 ) return false; //------------- Open Interrupt Status Pipe -------------// - tusb_desc_endpoint_t const *p_endpoint; - p_endpoint = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) p_interface_desc ); + tusb_desc_endpoint_t const *ep_desc; + ep_desc = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) p_interface_desc ); + + TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType); + TU_ASSERT(TUSB_XFER_INTERRUPT == ep_desc->bmAttributes.xfer); - TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType); - TU_ASSERT(TUSB_XFER_INTERRUPT == p_endpoint->bmAttributes.xfer); + TU_ASSERT(hcd_pipe_open(rhport, dev_addr, ep_desc)); - hub_data[dev_addr-1].pipe_status = hcd_pipe_open(rhport, dev_addr, p_endpoint); - TU_ASSERT( pipehandle_is_valid(hub_data[dev_addr-1].pipe_status) ); - hub_data[dev_addr-1].interface_number = p_interface_desc->bInterfaceNumber; + hub_data[dev_addr-1].itf_num = p_interface_desc->bInterfaceNumber; + hub_data[dev_addr-1].ep_status = ep_desc->bEndpointAddress; (*p_length) = sizeof(tusb_desc_interface_t) + sizeof(tusb_desc_endpoint_t); @@ -204,16 +206,17 @@ bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_i } //------------- Queue the initial Status endpoint transfer -------------// - TU_ASSERT( hcd_pipe_xfer(dev_addr, hub_data[dev_addr-1].pipe_status, &hub_data[dev_addr-1].status_change, 1, true) ); + TU_ASSERT( hcd_pipe_xfer(dev_addr, hub_data[dev_addr-1].ep_status, &hub_data[dev_addr-1].status_change, 1, true) ); return true; } // is the response of interrupt endpoint polling #include "usbh_hcd.h" // FIXME remove -void hub_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes) +void hub_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) { (void) xferred_bytes; // TODO can be more than 1 for hub with lots of ports + (void) ep_addr; usbh_hub_t * p_hub = &hub_data[dev_addr-1]; @@ -248,7 +251,7 @@ void hub_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes) void hub_close(uint8_t dev_addr) { - hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, hub_data[dev_addr-1].pipe_status); + hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, hub_data[dev_addr-1].ep_status); tu_memclr(&hub_data[dev_addr-1], sizeof(usbh_hub_t)); // osal_semaphore_reset(hub_enum_sem_hdl); @@ -256,7 +259,7 @@ void hub_close(uint8_t dev_addr) bool hub_status_pipe_queue(uint8_t dev_addr) { - return hcd_pipe_xfer(dev_addr, hub_data[dev_addr-1].pipe_status, &hub_data[dev_addr-1].status_change, 1, true); + return hcd_pipe_xfer(dev_addr, hub_data[dev_addr-1].ep_status, &hub_data[dev_addr-1].status_change, 1, true); } diff --git a/src/host/hub.h b/src/host/hub.h index dc26a098c..f8d8a4c6a 100644 --- a/src/host/hub.h +++ b/src/host/hub.h @@ -196,7 +196,7 @@ bool hub_status_pipe_queue(uint8_t dev_addr); void hub_init(void); bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; -void hub_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes); +void hub_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); void hub_close(uint8_t dev_addr); #endif diff --git a/src/host/usbh.c b/src/host/usbh.c index e1c0600d5..8e03d97d1 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -236,7 +236,7 @@ tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) .bInterval = 0 }; - hcd_edpt_open(_usbh_devices[dev_addr].rhport, dev_addr, &ep0_desc); + hcd_pipe_open(_usbh_devices[dev_addr].rhport, dev_addr, &ep0_desc); return TUSB_ERROR_NONE; } -- cgit v1.3.1 From 7c2056defbc9aff3f7aaba4763fd0630df9159bf Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 11 Dec 2018 01:02:11 +0700 Subject: remove pipe handle in host msc --- src/class/msc/msc_host.c | 30 +++++++++++++----------------- src/class/msc/msc_host.h | 5 ++--- src/host/ehci/ehci.c | 17 ++++++++--------- src/host/hcd.h | 11 +++-------- 4 files changed, 26 insertions(+), 37 deletions(-) (limited to 'src/host') diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 72f4afa27..1053d42d2 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -76,7 +76,7 @@ bool tuh_msc_is_mounted(uint8_t dev_addr) bool tuh_msc_is_busy(uint8_t dev_addr) { return msch_data[dev_addr-1].is_initialized && - hcd_pipe_is_busy(dev_addr, msch_data[dev_addr-1].bulk_in); + hcd_pipe_is_busy(dev_addr, msch_data[dev_addr-1].ep_in); } uint8_t const* tuh_msc_get_vendor_name(uint8_t dev_addr) @@ -116,16 +116,16 @@ static tusb_error_t msch_command_xfer(uint8_t dev_addr, msch_interface_t * p_msc { // there is data phase if (p_msch->cbw.dir & TUSB_DIR_IN_MASK) { - TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false), TUSB_ERROR_FAILED ); - TU_ASSERT( hcd_pipe_queue_xfer(dev_addr, p_msch->bulk_in , p_buffer, p_msch->cbw.total_bytes), TUSB_ERROR_FAILED ); + TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->ep_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false), TUSB_ERROR_FAILED ); + TU_ASSERT( hcd_pipe_queue_xfer(dev_addr, p_msch->ep_in , p_buffer, p_msch->cbw.total_bytes), TUSB_ERROR_FAILED ); }else { - TU_ASSERT( hcd_pipe_queue_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t)), TUSB_ERROR_FAILED ); - TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_out , p_buffer, p_msch->cbw.total_bytes, false), TUSB_ERROR_FAILED ); + TU_ASSERT( hcd_pipe_queue_xfer(dev_addr, p_msch->ep_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t)), TUSB_ERROR_FAILED ); + TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->ep_out , p_buffer, p_msch->cbw.total_bytes, false), TUSB_ERROR_FAILED ); } } - TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_in , (uint8_t*) &p_msch->csw, sizeof(msc_csw_t), true), TUSB_ERROR_FAILED); + TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->ep_in , (uint8_t*) &p_msch->csw, sizeof(msc_csw_t), true), TUSB_ERROR_FAILED); return TUSB_ERROR_NONE; } @@ -225,8 +225,8 @@ tusb_error_t tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, msc_csw_t * memcpy(p_msch->cbw.command, &cmd_test_unit_ready, p_msch->cbw.cmd_len); // TODO MSCH refractor test uinit ready - TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false), TUSB_ERROR_FAILED ); - TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->bulk_in , (uint8_t*) p_csw, sizeof(msc_csw_t), true), TUSB_ERROR_FAILED ); + TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->ep_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false), TUSB_ERROR_FAILED ); + TU_ASSERT( hcd_pipe_xfer(dev_addr, p_msch->ep_in , (uint8_t*) p_csw, sizeof(msc_csw_t), true), TUSB_ERROR_FAILED ); return TUSB_ERROR_NONE; } @@ -307,11 +307,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType); TU_ASSERT(TUSB_XFER_BULK == ep_desc->bmAttributes.xfer); - pipe_handle_t * p_pipe_hdl = ( ep_desc->bEndpointAddress & TUSB_DIR_IN_MASK ) ? - &p_msc->bulk_in : &p_msc->bulk_out; - - (*p_pipe_hdl) = hcd_pipe_open(rhport, dev_addr, ep_desc); - TU_ASSERT( pipehandle_is_valid(*p_pipe_hdl) ); + TU_ASSERT(hcd_pipe_open(rhport, dev_addr, ep_desc)); if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) { @@ -365,7 +361,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it // NOTE: my toshiba thumb-drive stall the first Read Capacity and require the sequence // Read Capacity --> Stalled --> Clear Stall --> Request Sense --> Read Capacity (2) to work - if ( hcd_pipe_is_stalled(dev_addr, p_msc->bulk_in) ) + if ( hcd_pipe_is_stalled(dev_addr, p_msc->ep_in) ) { // clear stall TODO abstract clear stall function request = (tusb_control_request_t) { @@ -378,7 +374,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it TU_ASSERT(usbh_control_xfer( dev_addr, &request, NULL )); - hcd_pipe_clear_stall(dev_addr, p_msc->bulk_in); + hcd_pipe_clear_stall(dev_addr, p_msc->ep_in); TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT) ); // wait for SCSI status //------------- SCSI Request Sense -------------// @@ -417,8 +413,8 @@ void msch_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t x void msch_close(uint8_t dev_addr) { - (void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].bulk_in); - (void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].bulk_out); + (void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].ep_in); + (void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].ep_out); tu_memclr(&msch_data[dev_addr-1], sizeof(msch_interface_t)); osal_semaphore_reset(msch_sem_hdl); diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index a77b494ed..968d221b4 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -187,9 +187,8 @@ void tuh_msc_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes); //--------------------------------------------------------------------+ #ifdef _TINY_USB_SOURCE_FILE_ -typedef struct { - pipe_handle_t bulk_in, bulk_out; - +typedef struct +{ uint8_t itf_numr; uint8_t ep_in; uint8_t ep_out; diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index f9b9db797..c36bfe181 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -75,11 +75,10 @@ static inline ehci_link_t* get_period_head(uint8_t hostid, uint8_t interval_ms) static inline ehci_qhd_t* get_control_qhd(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT; static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT; -static inline uint8_t qhd_get_index(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; static inline ehci_qhd_t* qhd_find_free (void); static inline tusb_xfer_type_t qhd_get_xfer_type(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; -static inline ehci_qhd_t* qhd_get_from_pipe_handle(uint8_t dev_addr, uint8_t ep_addr); +static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr); // determine if a queue head has bus-related error static inline bool qhd_has_xact_error(ehci_qhd_t * p_qhd) @@ -435,7 +434,7 @@ bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes) { //------------- set up QTD -------------// - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); + ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); ehci_qtd_t *p_qtd = qtd_find_free(dev_addr); TU_ASSERT(p_qtd); @@ -453,7 +452,7 @@ bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t { TU_ASSERT ( hcd_pipe_queue_xfer(dev_addr, ep_addr, buffer, total_bytes) ); - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); + ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); if ( int_on_complete ) { // the just added qtd is pointed by list_tail @@ -467,7 +466,7 @@ bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t /// pipe_close should only be called as a part of unmount/safe-remove process bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) { - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); + ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); // async list needs async advance handshake to make sure host controller has released cached data // non-control does not use async advance, it will eventually free by control pipe close @@ -494,19 +493,19 @@ bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) bool hcd_pipe_is_busy(uint8_t dev_addr, uint8_t ep_addr) { - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); + ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); return !p_qhd->qtd_overlay.halted && (p_qhd->p_qtd_list_head != NULL); } bool hcd_pipe_is_stalled(uint8_t dev_addr, uint8_t ep_addr) { - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); + ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); return p_qhd->qtd_overlay.halted && !qhd_has_xact_error(p_qhd); } tusb_error_t hcd_pipe_clear_stall(uint8_t dev_addr, uint8_t ep_addr) { - ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(dev_addr, ep_addr); + ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); p_qhd->qtd_overlay.halted = 0; // TODO reset data toggle ? return TUSB_ERROR_NONE; @@ -839,7 +838,7 @@ static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd) return (ehci_qhd_t*) tu_align32(p_qhd->next.address); } -static inline ehci_qhd_t* qhd_get_from_pipe_handle(uint8_t dev_addr, uint8_t ep_addr) +static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr) { ehci_qhd_t* qhd_pool = ehci_data.qhd_pool; diff --git a/src/host/hcd.h b/src/host/hcd.h index f19812379..3c34a5609 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -49,6 +49,9 @@ extern "C" { #endif + //--------------------------------------------------------------------+ +// MACRO CONSTANT TYPEDEF +//--------------------------------------------------------------------+ typedef enum { HCD_EVENT_DEVICE_ATTACH, @@ -92,13 +95,6 @@ enum { //#define HCD_MAX_XFER 16 #endif -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ -typedef struct { - uint8_t reserved[4]; -} pipe_handle_t; - //--------------------------------------------------------------------+ // USBH-HCD API //--------------------------------------------------------------------+ @@ -131,7 +127,6 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * // PIPE API //--------------------------------------------------------------------+ // TODO control xfer should be used via usbh layer - bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes); // only queue, not transferring yet bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete); -- cgit v1.3.1 From 73e6bb6f5d9461915bd157e5802eb6f6436b5831 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 11 Dec 2018 01:06:10 +0700 Subject: clean up --- src/host/ehci/ehci.c | 4 ++-- src/host/hcd.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index c36bfe181..fa4a1f3f3 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -503,12 +503,12 @@ bool hcd_pipe_is_stalled(uint8_t dev_addr, uint8_t ep_addr) return p_qhd->qtd_overlay.halted && !qhd_has_xact_error(p_qhd); } -tusb_error_t hcd_pipe_clear_stall(uint8_t dev_addr, uint8_t ep_addr) +bool hcd_pipe_clear_stall(uint8_t dev_addr, uint8_t ep_addr) { ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); p_qhd->qtd_overlay.halted = 0; // TODO reset data toggle ? - return TUSB_ERROR_NONE; + return true; } //--------------------------------------------------------------------+ diff --git a/src/host/hcd.h b/src/host/hcd.h index 3c34a5609..5a7f0756b 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -134,7 +134,7 @@ bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr); // TODO bool hcd_pipe_is_busy(uint8_t dev_addr, uint8_t ep_addr); bool hcd_pipe_is_stalled(uint8_t dev_addr, uint8_t ep_addr); // stalled also counted as error -tusb_error_t hcd_pipe_clear_stall(uint8_t dev_addr, uint8_t ep_addr); +bool hcd_pipe_clear_stall(uint8_t dev_addr, uint8_t ep_addr); #if 0 tusb_error_t hcd_pipe_cancel()ATTR_WARN_UNUSED_RESULT; -- cgit v1.3.1 From b0717275c838306688cc9bb2af625725656856d5 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 11 Dec 2018 10:50:05 +0700 Subject: ehci periodic --- src/host/ehci/ehci.c | 23 +--------------------- src/host/ehci/ehci.h | 3 --- src/host/hcd.h | 22 ++++++++++----------- src/host/usbh.c | 10 +++++++--- src/tusb_option.h | 3 --- tests/lpc18xx_43xx/test/host/ehci/test_ehci_init.c | 7 ------- 6 files changed, 19 insertions(+), 49 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index fa4a1f3f3..e4dedd0d0 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -133,7 +133,7 @@ tusb_speed_t hcd_port_speed_get(uint8_t hostid) } // TODO refractor abtract later -void hcd_port_unplug(uint8_t hostid) +void hcd_device_remove(uint8_t rhport, uint8_t dev_addr) { ehci_data.regs->usb_cmd_bit.advance_async = 1; // Async doorbell check EHCI 4.8.2 for operational details } @@ -153,9 +153,7 @@ static bool ehci_init(uint8_t hostid) regs->usb_sts = EHCI_INT_MASK_ALL; // 2. clear all status regs->usb_int_enable = EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | -#if EHCI_PERIODIC_LIST EHCI_INT_MASK_NXP_PERIODIC | -#endif EHCI_INT_MASK_ASYNC_ADVANCE | EHCI_INT_MASK_NXP_ASYNC; //------------- Asynchronous List -------------// @@ -170,7 +168,6 @@ static bool ehci_init(uint8_t hostid) regs->async_list_base = (uint32_t) async_head; -#if EHCI_PERIODIC_LIST //------------- Periodic List -------------// // Build the polling interval tree with 1 ms, 2 ms, 4 ms and 8 ms (framesize) only @@ -209,19 +206,13 @@ static bool ehci_init(uint8_t hostid) period_1ms->terminate = 1; regs->periodic_list_base = (uint32_t) framelist; -#else - regs->periodic_list_base = 0; -#endif //------------- TT Control (NXP only) -------------// regs->tt_control = 0; //------------- USB CMD Register -------------// - regs->usb_cmd |= BIT_(EHCI_USBCMD_POS_RUN_STOP) | BIT_(EHCI_USBCMD_POS_ASYNC_ENABLE) -#if EHCI_PERIODIC_LIST | BIT_(EHCI_USBCMD_POS_PERIOD_ENABLE) // TODO enable period list only there is int/iso endpoint -#endif | ((EHCI_CFG_FRAMELIST_SIZE_BITS & BIN8(011)) << EHCI_USBCMD_POS_FRAMELIST_SZIE) | ((EHCI_CFG_FRAMELIST_SIZE_BITS >> 2) << EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB); @@ -411,11 +402,9 @@ bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const list_head = (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].rhport); break; - #if EHCI_PERIODIC_LIST // TODO refractor/group this together case TUSB_XFER_INTERRUPT: list_head = get_period_head(_usbh_devices[dev_addr].rhport, p_qhd->interval_ms); break; - #endif case TUSB_XFER_ISOCHRONOUS: // TODO iso is not supported @@ -479,14 +468,12 @@ bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) (ehci_link_t*) get_async_head( _usbh_devices[dev_addr].rhport ), (ehci_link_t*) p_qhd), false ); } - #if EHCI_PERIODIC_LIST // TODO refractor/group this together else { TU_ASSERT_ERR( list_remove_qhd( get_period_head( _usbh_devices[dev_addr].rhport, p_qhd->interval_ms ), (ehci_link_t*) p_qhd), false ); } - #endif return true; } @@ -610,7 +597,6 @@ static void async_list_xfer_complete_isr(ehci_qhd_t * const async_head) // TODO abstract max loop guard for async } -#if EHCI_PERIODIC_LIST // TODO refractor/group this together static void period_list_xfer_complete_isr(uint8_t hostid, uint8_t interval_ms) { uint8_t max_loop = 0; @@ -645,7 +631,6 @@ static void period_list_xfer_complete_isr(uint8_t hostid, uint8_t interval_ms) max_loop++; } } -#endif static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) { @@ -699,7 +684,6 @@ static void xfer_error_isr(uint8_t hostid) max_loop++; }while(p_qhd != async_head && max_loop < HCD_MAX_ENDPOINT*CFG_TUSB_HOST_DEVICE_MAX); // async list traversal, stop if loop around - #if EHCI_PERIODIC_LIST //------------- TODO refractor period list -------------// uint32_t const period_1ms_addr = (uint32_t) get_period_head(hostid, 1); for (uint8_t interval_ms=1; interval_ms <= EHCI_FRAMELIST_SIZE; interval_ms *= 2) @@ -732,7 +716,6 @@ static void xfer_error_isr(uint8_t hostid) period_max_loop++; } } - #endif } //------------- Host Controller Driver's Interrupt Handler -------------// @@ -770,7 +753,6 @@ void hal_hcd_isr(uint8_t hostid) async_list_xfer_complete_isr( get_async_head(hostid) ); } -#if EHCI_PERIODIC_LIST // TODO refractor/group this together if (int_status & EHCI_INT_MASK_NXP_PERIODIC) { for (uint8_t i=1; i <= EHCI_FRAMELIST_SIZE; i *= 2) @@ -778,7 +760,6 @@ void hal_hcd_isr(uint8_t hostid) period_list_xfer_complete_isr( hostid, i ); } } -#endif //------------- There is some removed async previously -------------// if (int_status & EHCI_INT_MASK_ASYNC_ADVANCE) // need to place after EHCI_INT_MASK_NXP_ASYNC @@ -801,12 +782,10 @@ static inline ehci_qhd_t* get_async_head(uint8_t hostid) return get_control_qhd(0); } -#if EHCI_PERIODIC_LIST // TODO refractor/group this together static inline ehci_link_t* get_period_head(uint8_t hostid, uint8_t interval_ms) { return (ehci_link_t*) &ehci_data.period_head_arr[ tu_log2( tu_min8(EHCI_FRAMELIST_SIZE, interval_ms) ) ]; } -#endif static inline ehci_qhd_t* get_control_qhd(uint8_t dev_addr) { diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index 3758dc223..f1fe75cf1 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -68,9 +68,6 @@ //--------------------------------------------------------------------+ // EHCI CONFIGURATION & CONSTANTS //--------------------------------------------------------------------+ -#define HOST_HCD_XFER_INTERRUPT // TODO interrupt is used widely, should always be enalbed -#define EHCI_PERIODIC_LIST (defined HOST_HCD_XFER_INTERRUPT || defined HOST_HCD_XFER_ISOCHRONOUS) - #define EHCI_CFG_FRAMELIST_SIZE_BITS 7 /// Framelist Size (NXP specific) (0:1024) - (1:512) - (2:256) - (3:128) - (4:64) - (5:32) - (6:16) - (7:8) #define EHCI_FRAMELIST_SIZE (1024 >> EHCI_CFG_FRAMELIST_SIZE_BITS) diff --git a/src/host/hcd.h b/src/host/hcd.h index 5a7f0756b..dcc2bdf53 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -96,12 +96,21 @@ enum { #endif //--------------------------------------------------------------------+ -// USBH-HCD API +// HCD API //--------------------------------------------------------------------+ bool hcd_init(void); void hcd_int_enable (uint8_t rhport); void hcd_int_disable(uint8_t rhport); +// PORT API +/// return the current connect status of roothub port +bool hcd_port_connect_status(uint8_t hostid) ATTR_PURE ATTR_WARN_UNUSED_RESULT; // TODO make inline if possible +void hcd_port_reset(uint8_t hostid); +tusb_speed_t hcd_port_speed_get(uint8_t hostid) ATTR_PURE ATTR_WARN_UNUSED_RESULT; // TODO make inline if possible + +// Call by USBH after event device remove +void hcd_device_remove(uint8_t rhport, uint8_t dev_addr); + //--------------------------------------------------------------------+ // Event function //--------------------------------------------------------------------+ @@ -111,7 +120,7 @@ void hcd_event_handler(hcd_event_t const* event, bool in_isr); void hcd_event_device_attach(uint8_t rhport); // Helper to send device removal event -void hcd_event_device_remove(uint8_t hostid); +void hcd_event_device_remove(uint8_t rhport); // Helper to send USB transfer event void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); @@ -140,15 +149,6 @@ bool hcd_pipe_clear_stall(uint8_t dev_addr, uint8_t ep_addr); tusb_error_t hcd_pipe_cancel()ATTR_WARN_UNUSED_RESULT; #endif -//--------------------------------------------------------------------+ -// PORT API -//--------------------------------------------------------------------+ -/// return the current connect status of roothub port -bool hcd_port_connect_status(uint8_t hostid) ATTR_PURE ATTR_WARN_UNUSED_RESULT; // TODO make inline if possible -void hcd_port_reset(uint8_t hostid); -tusb_speed_t hcd_port_speed_get(uint8_t hostid) ATTR_PURE ATTR_WARN_UNUSED_RESULT; // TODO make inline if possible -void hcd_port_unplug(uint8_t hostid); // called by usbh to instruct hcd that it can execute unplug procedure - #ifdef __cplusplus } #endif diff --git a/src/host/usbh.c b/src/host/usbh.c index 8e03d97d1..3ab3bd71e 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -319,15 +319,16 @@ void hcd_event_device_remove(uint8_t hostid) // a device unplugged on hostid, hub_addr, hub_port // return true if found and unmounted device, false if cannot find -static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_port) +static void usbh_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t hub_port) { bool is_found = false; + //------------- find the all devices (star-network) under port that is unplugged -------------// for (uint8_t dev_addr = 0; dev_addr <= CFG_TUSB_HOST_DEVICE_MAX; dev_addr ++) { usbh_device_t* dev = &_usbh_devices[dev_addr]; - if (dev->rhport == hostid && + if (dev->rhport == rhport && (hub_addr == 0 || dev->hub_addr == hub_addr) && // hub_addr == 0 & hub_port == 0 means roothub (hub_port == 0 || dev->hub_port == hub_port) && dev->state != TUSB_DEVICE_STATE_UNPLUG) @@ -349,11 +350,14 @@ static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_ usbh_pipe_control_close(dev_addr); +// hcd_device_remove(rhport, dev_addr); + is_found = true; } } - if (is_found) hcd_port_unplug(_usbh_devices[0].rhport); // TODO hack + // FIXME remove + if (is_found) hcd_device_remove(_usbh_devices[0].rhport, 0); } diff --git a/src/tusb_option.h b/src/tusb_option.h index e8baf4149..8b2e59b17 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -212,9 +212,6 @@ //------------- HID CLASS -------------// #define HOST_CLASS_HID ( CFG_TUH_HID_KEYBOARD + CFG_TUH_HID_MOUSE + CFG_TUSB_HOST_HID_GENERIC ) -// #if HOST_CLASS_HID -// #define HOST_HCD_XFER_INTERRUPT -// #endif #ifndef CFG_TUSB_HOST_ENUM_BUFFER_SIZE #define CFG_TUSB_HOST_ENUM_BUFFER_SIZE 256 diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_init.c b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_init.c index c61becd69..8d552cb8a 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_init.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_init.c @@ -125,7 +125,6 @@ void check_qhd_endpoint_link(ehci_link_t *p_prev, ehci_qhd_t *p_qhd) void test_hcd_init_period_list(void) { -#if EHCI_PERIODIC_LIST ehci_registers_t* const regs = get_operational_register(hostid); ehci_qhd_t * const period_head_arr = get_period_head(hostid, 1); ehci_link_t * const framelist = get_period_frame_list(hostid); @@ -153,7 +152,6 @@ void test_hcd_init_period_list(void) } TEST_ASSERT_TRUE(period_head_arr[0].next.terminate); -#endif } void test_hcd_init_tt_control(void) @@ -166,12 +164,7 @@ void test_hcd_init_usbcmd(void) ehci_registers_t* const regs = get_operational_register(hostid); TEST_ASSERT(regs->usb_cmd_bit.async_enable); - -#if EHCI_PERIODIC_LIST TEST_ASSERT(regs->usb_cmd_bit.periodic_enable); -#else - TEST_ASSERT_FALSE(regs->usb_cmd_bit.periodic_enable); -#endif //------------- Framelist size (NXP specific) -------------// TEST_ASSERT_BITS(BIN8(11), EHCI_CFG_FRAMELIST_SIZE_BITS, regs->usb_cmd_bit.framelist_size); -- cgit v1.3.1 From b8c63ff624c1ede1d5f49e82d0c7bbbd94a294be Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 11 Dec 2018 12:57:30 +0700 Subject: ehci struct rename --- src/host/ehci/ehci.c | 112 ++++++++++---------- src/host/ehci/ehci.h | 289 +++++++++++++++++++++++++-------------------------- 2 files changed, 196 insertions(+), 205 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index e4dedd0d0..49863585a 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -118,24 +118,24 @@ void hcd_port_reset(uint8_t hostid) { ehci_registers_t* regs = ehci_data.regs; - regs->portsc_bit.port_enable = 0; // disable port before reset - regs->portsc_bit.port_reset = 1; + regs->portsc_bm.port_enabled = 0; // disable port before reset + regs->portsc_bm.port_reset = 1; } bool hcd_port_connect_status(uint8_t hostid) { - return ehci_data.regs->portsc_bit.current_connect_status; + return ehci_data.regs->portsc_bm.current_connect_status; } tusb_speed_t hcd_port_speed_get(uint8_t hostid) { - return (tusb_speed_t) ehci_data.regs->portsc_bit.nxp_port_speed; // NXP specific port speed + return (tusb_speed_t) ehci_data.regs->portsc_bm.nxp_port_speed; // NXP specific port speed } // TODO refractor abtract later void hcd_device_remove(uint8_t rhport, uint8_t dev_addr) { - ehci_data.regs->usb_cmd_bit.advance_async = 1; // Async doorbell check EHCI 4.8.2 for operational details + ehci_data.regs->command_bm.async_adv_doorbell = 1; // Async doorbell check EHCI 4.8.2 for operational details } //--------------------------------------------------------------------+ @@ -149,10 +149,10 @@ static bool ehci_init(uint8_t hostid) //------------- CTRLDSSEGMENT Register (skip) -------------// //------------- USB INT Register -------------// - regs->usb_int_enable = 0; // 1. disable all the interrupt - regs->usb_sts = EHCI_INT_MASK_ALL; // 2. clear all status + regs->inten = 0; // 1. disable all the interrupt + regs->status = EHCI_INT_MASK_ALL; // 2. clear all status - regs->usb_int_enable = EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | + regs->inten = EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | EHCI_INT_MASK_NXP_PERIODIC | EHCI_INT_MASK_ASYNC_ADVANCE | EHCI_INT_MASK_NXP_ASYNC; @@ -166,14 +166,14 @@ static bool ehci_init(uint8_t hostid) async_head->qtd_overlay.halted = 1; // inactive most of time async_head->qtd_overlay.next.terminate = 1; // TODO removed if verified - regs->async_list_base = (uint32_t) async_head; + regs->async_list_addr = (uint32_t) async_head; //------------- Periodic List -------------// // Build the polling interval tree with 1 ms, 2 ms, 4 ms and 8 ms (framesize) only for(uint32_t i=0; i<4; i++) { - ehci_data.period_head_arr[i].interrupt_smask = 1; // queue head in period list must have smask non-zero + ehci_data.period_head_arr[i].int_smask = 1; // queue head in period list must have smask non-zero ehci_data.period_head_arr[i].qtd_overlay.halted = 1; // dummy node, always inactive } @@ -208,16 +208,16 @@ static bool ehci_init(uint8_t hostid) regs->periodic_list_base = (uint32_t) framelist; //------------- TT Control (NXP only) -------------// - regs->tt_control = 0; + regs->nxp_tt_control = 0; //------------- USB CMD Register -------------// - regs->usb_cmd |= BIT_(EHCI_USBCMD_POS_RUN_STOP) | BIT_(EHCI_USBCMD_POS_ASYNC_ENABLE) + regs->command |= BIT_(EHCI_USBCMD_POS_RUN_STOP) | BIT_(EHCI_USBCMD_POS_ASYNC_ENABLE) | BIT_(EHCI_USBCMD_POS_PERIOD_ENABLE) // TODO enable period list only there is int/iso endpoint | ((EHCI_CFG_FRAMELIST_SIZE_BITS & BIN8(011)) << EHCI_USBCMD_POS_FRAMELIST_SZIE) | ((EHCI_CFG_FRAMELIST_SIZE_BITS >> 2) << EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB); //------------- ConfigFlag Register (skip) -------------// - regs->portsc_bit.port_power = 1; // enable port power + regs->portsc_bm.port_power = 1; // enable port power return true; } @@ -226,11 +226,11 @@ static tusb_error_t hcd_controller_stop(uint8_t hostid) { ehci_registers_t* regs = ehci_data.regs; - regs->usb_cmd_bit.run_stop = 0; + regs->command_bm.run_stop = 0; tu_timeout_t timeout; tu_timeout_set(&timeout, 2); // USB Spec: controller has to stop within 16 uframe = 2 frames - while( regs->usb_sts_bit.hc_halted == 0 && !tu_timeout_expired(&timeout)) {} + while( regs->status_bm.hc_halted == 0 && !tu_timeout_expired(&timeout)) {} return tu_timeout_expired(&timeout) ? TUSB_ERROR_OSAL_TIMEOUT : TUSB_ERROR_NONE; } @@ -530,7 +530,7 @@ static void async_advance_isr(ehci_qhd_t * const async_head) for (uint8_t i=0; iunplug->…..-> plug if device is powering with pre-plugged device - if (ehci_data.regs->portsc_bit.current_connect_status) + if (ehci_data.regs->portsc_bm.current_connect_status) { hcd_port_reset(hostid); hcd_event_device_attach(hostid); @@ -575,7 +575,7 @@ static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd) { // end of request // call USBH callback - hcd_event_xfer_complete(p_qhd->device_address, edpt_addr(p_qhd->endpoint_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0), XFER_RESULT_SUCCESS, p_qhd->total_xferred_bytes); + hcd_event_xfer_complete(p_qhd->dev_addr, edpt_addr(p_qhd->ep_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0), XFER_RESULT_SUCCESS, p_qhd->total_xferred_bytes); p_qhd->total_xferred_bytes = 0; } } @@ -634,7 +634,7 @@ static void period_list_xfer_complete_isr(uint8_t hostid, uint8_t interval_ms) static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) { - if ( (p_qhd->device_address != 0 && p_qhd->qtd_overlay.halted) || // addr0 cannot be protocol STALL + if ( (p_qhd->dev_addr != 0 && p_qhd->qtd_overlay.halted) || // addr0 cannot be protocol STALL qhd_has_xact_error(p_qhd) ) { // current qhd has error in transaction tusb_xfer_type_t const xfer_type = qhd_get_xfer_type(p_qhd); @@ -650,7 +650,7 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) p_qhd->p_qtd_list_head->used = 0; // free QTD qtd_remove_1st_from_qhd(p_qhd); - if ( 0 == p_qhd->endpoint_number ) + if ( 0 == p_qhd->ep_number ) { // control cannot be halted --> clear all qtd list p_qhd->p_qtd_list_head = NULL; @@ -660,12 +660,12 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) p_qhd->qtd_overlay.alternate.terminate = 1; p_qhd->qtd_overlay.halted = 0; - ehci_qtd_t *p_setup = get_control_qtds(p_qhd->device_address); + ehci_qtd_t *p_setup = get_control_qtds(p_qhd->dev_addr); p_setup->used = 0; } // call USBH callback - hcd_event_xfer_complete(p_qhd->device_address, edpt_addr(p_qhd->endpoint_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0), error_event, p_qhd->total_xferred_bytes); + hcd_event_xfer_complete(p_qhd->dev_addr, edpt_addr(p_qhd->ep_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0), error_event, p_qhd->total_xferred_bytes); p_qhd->total_xferred_bytes = 0; } @@ -723,10 +723,10 @@ void hal_hcd_isr(uint8_t hostid) { ehci_registers_t* regs = ehci_data.regs; - uint32_t int_status = regs->usb_sts; - int_status &= regs->usb_int_enable; + uint32_t int_status = regs->status; + int_status &= regs->inten; - regs->usb_sts |= int_status; // Acknowledge handled interrupt + regs->status |= int_status; // Acknowledge handled interrupt if (int_status == 0) return; @@ -734,7 +734,7 @@ void hal_hcd_isr(uint8_t hostid) { uint32_t port_status = regs->portsc & EHCI_PORTSC_MASK_ALL; - if (regs->portsc_bit.connect_status_change) + if (regs->portsc_bm.connect_status_change) { port_connect_status_change_isr(hostid); } @@ -808,8 +808,8 @@ static inline ehci_qhd_t* qhd_find_free (void) static inline tusb_xfer_type_t qhd_get_xfer_type(ehci_qhd_t const * p_qhd) { - return ( p_qhd->endpoint_number == 0 ) ? TUSB_XFER_CONTROL : - ( p_qhd->interrupt_smask != 0 ) ? TUSB_XFER_INTERRUPT : TUSB_XFER_BULK; + return ( p_qhd->ep_number == 0 ) ? TUSB_XFER_CONTROL : + ( p_qhd->int_smask != 0 ) ? TUSB_XFER_INTERRUPT : TUSB_XFER_BULK; } static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd) @@ -823,8 +823,8 @@ static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr) for(uint32_t i=0; ibmAttributes.xfer; uint8_t const interval = ep_desc->bInterval; - p_qhd->device_address = dev_addr; - p_qhd->non_hs_period_inactive_next_xact = 0; - p_qhd->endpoint_number = edpt_number(ep_desc->bEndpointAddress); - p_qhd->endpoint_speed = _usbh_devices[dev_addr].speed; - p_qhd->data_toggle_control = (xfer_type == TUSB_XFER_CONTROL) ? 1 : 0; - p_qhd->head_list_flag = (dev_addr == 0) ? 1 : 0; // addr0's endpoint is the static asyn list head - p_qhd->max_package_size = ep_desc->wMaxPacketSize.size; - p_qhd->non_hs_control_endpoint = ((xfer_type == TUSB_XFER_CONTROL) && (p_qhd->endpoint_speed != TUSB_SPEED_HIGH)) ? 1 : 0; - p_qhd->nak_count_reload = 0; + p_qhd->dev_addr = dev_addr; + p_qhd->inactive_next_xact = 0; + p_qhd->ep_number = edpt_number(ep_desc->bEndpointAddress); + p_qhd->ep_speed = _usbh_devices[dev_addr].speed; + p_qhd->data_toggle = (xfer_type == TUSB_XFER_CONTROL) ? 1 : 0; + p_qhd->head_list_flag = (dev_addr == 0) ? 1 : 0; // addr0's endpoint is the static asyn list head + p_qhd->max_packet_size = ep_desc->wMaxPacketSize.size; + p_qhd->fl_ctrl_ep_flag = ((xfer_type == TUSB_XFER_CONTROL) && (p_qhd->ep_speed != TUSB_SPEED_HIGH)) ? 1 : 0; + p_qhd->nak_reload = 0; // Bulk/Control -> smask = cmask = 0 // TODO Isochronous if (TUSB_XFER_INTERRUPT == xfer_type) { - if (TUSB_SPEED_HIGH == p_qhd->endpoint_speed) + if (TUSB_SPEED_HIGH == p_qhd->ep_speed) { TU_ASSERT( interval <= 16, ); if ( interval < 4) // sub milisecond interval { - p_qhd->interval_ms = 0; - p_qhd->interrupt_smask = (interval == 1) ? BIN8(11111111) : - (interval == 2) ? BIN8(10101010) : BIN8(01000100); + p_qhd->interval_ms = 0; + p_qhd->int_smask = (interval == 1) ? BIN8(11111111) : + (interval == 2) ? BIN8(10101010) : BIN8(01000100); }else { - p_qhd->interval_ms = (uint8_t) tu_min16( 1 << (interval-4), 255 ); - p_qhd->interrupt_smask = BIT_(interval % 8); + p_qhd->interval_ms = (uint8_t) tu_min16( 1 << (interval-4), 255 ); + p_qhd->int_smask = BIT_(interval % 8); } }else { TU_ASSERT( 0 != interval, ); // Full/Low: 4.12.2.1 (EHCI) case 1 schedule start split at 1 us & complete split at 2,3,4 uframes - p_qhd->interrupt_smask = 0x01; - p_qhd->non_hs_interrupt_cmask = BIN8(11100); - p_qhd->interval_ms = interval; + p_qhd->int_smask = 0x01; + p_qhd->fl_int_cmask = BIN8(11100); + p_qhd->interval_ms = interval; } }else { - p_qhd->interrupt_smask = p_qhd->non_hs_interrupt_cmask = 0; + p_qhd->int_smask = p_qhd->fl_int_cmask = 0; } - p_qhd->hub_address = _usbh_devices[dev_addr].hub_addr; - p_qhd->hub_port = _usbh_devices[dev_addr].hub_port; - p_qhd->mult = 1; // TODO not use high bandwidth/park mode yet + p_qhd->fl_hub_addr = _usbh_devices[dev_addr].hub_addr; + p_qhd->fl_hub_port = _usbh_devices[dev_addr].hub_port; + p_qhd->mult = 1; // TODO not use high bandwidth/park mode yet //------------- HCD Management Data -------------// p_qhd->used = 1; @@ -939,9 +939,9 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c p_qhd->qtd_overlay.halted = 0; p_qhd->qtd_overlay.next.terminate = 1; p_qhd->qtd_overlay.alternate.terminate = 1; - if (TUSB_XFER_BULK == xfer_type && p_qhd->endpoint_speed == TUSB_SPEED_HIGH && p_qhd->pid_non_control == EHCI_PID_OUT) + if (TUSB_XFER_BULK == xfer_type && p_qhd->ep_speed == TUSB_SPEED_HIGH && p_qhd->pid_non_control == EHCI_PID_OUT) { - p_qhd->qtd_overlay.pingstate_err = 1; // do PING for Highspeed Bulk OUT, EHCI section 4.11 + p_qhd->qtd_overlay.ping_err = 1; // do PING for Highspeed Bulk OUT, EHCI section 4.11 } } @@ -954,12 +954,12 @@ static void qtd_init(ehci_qtd_t* p_qtd, uint32_t data_ptr, uint16_t total_bytes) p_qtd->next.terminate = 1; // init to null p_qtd->alternate.terminate = 1; // not used, always set to terminated p_qtd->active = 1; - p_qtd->cerr = 3; // TODO 3 consecutive errors tolerance + p_qtd->err_count = 3; // TODO 3 consecutive errors tolerance p_qtd->data_toggle = 0; p_qtd->total_bytes = total_bytes; p_qtd->expected_bytes = total_bytes; - p_qtd->buffer[0] = data_ptr; + p_qtd->buffer[0] = data_ptr; for(uint8_t i=1; i<5; i++) { p_qtd->buffer[i] |= tu_align4k( p_qtd->buffer[i-1] ) + 4096; diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index f1fe75cf1..ea5199de5 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -57,8 +57,6 @@ * SITD: Split ISO Transfer Descriptor for full-speed * SMASK: Start Split mask for Slipt Transaction * CMASK: Complete Split mask for Slipt Transaction - * RO: Read Only - * R/WC: Read, Write to Clear */ #ifdef __cplusplus @@ -106,13 +104,14 @@ typedef union { }; }ehci_link_t; -/// Queue Element Transfer Descriptor (section 3.5) -typedef struct { - - /// Word 0: Next QTD Pointer +/// Queue Element Transfer Descriptor +/// Qtd is used to declare overlay in ehci_qhd_t -> cannot be declared with ATTR_ALIGNED(32) +typedef struct +{ + // Word 0: Next QTD Pointer ehci_link_t next; - /// Word 1: Alternate Next QTD Pointer (not used) + // Word 1: Alternate Next QTD Pointer (not used) union{ ehci_link_t alternate; struct { @@ -123,63 +122,58 @@ typedef struct { }; }; - /// Word 2: qTQ Token - volatile uint32_t pingstate_err : 1 ; ///< If the QH.EPSfield indicates a High-speed device and the PID_Codeindicates an OUT endpoint, then this is the state bit for the Ping protocol. 0b=OUT 1b=PING - volatile uint32_t non_hs_split_state : 1 ; ///< This bit is ignored by the host controller unless the QH.EPSfield indicates a full- or low-speed endpoint. When a Full- or Low-speed device, the host controller uses this bit to track the state of the split-transaction. The functional requirements of the host controller for managing this state bit and the split transaction protocol depends on whether the endpoint is in the periodic or asynchronous schedule. 0b=Start Split 1b=Complete Split - volatile uint32_t non_hs_period_missed_uframe : 1 ; ///< This bit is ignored unless the QH.EPSfield indicates a full- or low-speed endpoint and the queue head is in the periodic list. This bit is set when the host controller detected that a host-induced hold-off caused the host controller to miss a required complete-split transaction. If the host controller sets this bit to a one, then it remains a one for the duration of the transfer. - volatile uint32_t xact_err : 1 ; ///< Set to a one by the Host Controller during status update in the case where the host did not receive a valid response from the device (Timeout, CRC, Bad PID, etc.) - volatile uint32_t babble_err : 1 ; ///< Set to a 1 by the Host Controller during status update when a babble is detected during the transaction. In addition to setting this bit, the Host Controller also sets the Haltedbit to a 1 - volatile uint32_t buffer_err : 1 ; ///< Set to a 1 by the Host Controller during status update to indicate that the Host Controller is unable to keep up with the reception of incoming data (overrun) or is unable to supply data fast enough during transmission (underrun) - volatile uint32_t halted : 1 ; ///< Set to a 1 by the Host Controller during status updates to indicate that a serious error has occurred at the device/endpoint addressed by this qTD. This can be caused by babble, the error counter counting down to zero, or reception of the STALL handshake from the device during a transaction. Any time that a transaction results in the Halted bit being set to a one, the Active bit is also set to 0 - volatile uint32_t active : 1 ; ///< Set to 1 by software to enable the execution of transactions by the Host Controller - - uint32_t pid : 2 ; ///< This field is an encoding of the token which should be used for transactions associated with this transfer descriptor. 00=OUT 01=IN 10=SETUP - volatile uint32_t cerr : 2 ; ///< Error Counter, This field is a 2-bit down counter that keeps track of the number of consecutive Errors detected while executing this qTD - volatile uint32_t current_page : 3 ; ///< This field is used as an index into the qTD buffer pointer list - uint32_t int_on_complete : 1 ; ///< If this bit is set to a one, it specifies that when this qTD is completed, the Host Controller should issue an interrupt at the next interrupt threshold - - volatile uint32_t total_bytes : 15 ; ///< This field specifies the total number of bytes to be moved with this transfer descriptor - volatile uint32_t data_toggle : 1 ; ///< This is the data toggle sequence bit - uint32_t : 0 ; // padding to the end of current storage unit - // End of Word 2 + // Word 2: qTQ Token + volatile uint32_t ping_err : 1 ; ///< For Highspeed: 0 Out, 1 Ping. Full/Slow used as error indicator + volatile uint32_t non_hs_split_state : 1 ; ///< Used by HC to track the state of slipt transaction + volatile uint32_t non_hs_missed_uframe : 1 ; ///< HC misses a complete slip transaction + volatile uint32_t xact_err : 1 ; ///< Error (Timeout, CRC, Bad PID ... ) + volatile uint32_t babble_err : 1 ; ///< Babble detected, also set Halted bit to 1 + volatile uint32_t buffer_err : 1 ; ///< Data overrun/underrun error + volatile uint32_t halted : 1 ; ///< Serious error or STALL received + volatile uint32_t active : 1 ; ///< Start transfer, clear by HC when complete + + uint32_t pid : 2 ; ///< 0: OUT, 1: IN, 2 Setup + volatile uint32_t err_count : 2 ; ///< Error Counter of consecutive errors + volatile uint32_t current_page : 3 ; ///< Index into the qTD buffer pointer list + uint32_t int_on_complete : 1 ; ///< Interrupt on complete + volatile uint32_t total_bytes : 15 ; ///< Transfer bytes, decreased during transaction + volatile uint32_t data_toggle : 1 ; ///< Data Toogle bit + /// Buffer Page Pointer List, Each element in the list is a 4K page aligned, physical memory address. The lower 12 bits in each pointer are reserved (except for the first one) as each memory pointer must reference the start of a 4K page uint32_t buffer[5]; -} ehci_qtd_t; // XXX qtd is used to declare overlay in ehci_qhd_t -> cannot be declared with ATTR_ALIGNED(32) +} ehci_qtd_t; TU_VERIFY_STATIC( sizeof(ehci_qtd_t) == 32, "size is not correct" ); -/// Queue Head (section 3.6) -typedef struct ATTR_ALIGNED(32) { - /// Word 0: Queue Head Horizontal Link Pointer +/// Queue Head +typedef struct ATTR_ALIGNED(32) +{ + // Word 0: Next QHD ehci_link_t next; - /// Word 1 : Endpoint Characteristics - uint32_t device_address : 7 ; ///< This field selects the specific device serving as the data source or sink - uint32_t non_hs_period_inactive_next_xact : 1 ; ///< This bit is used by system software to request that the host controller set the Active bit to zero. See Section 4.12.2.5 for full operational details - uint32_t endpoint_number : 4 ; ///< This 4-bit field selects the particular endpoint number on the device serving as the data source or sink. - uint32_t endpoint_speed : 2 ; ///< This is the speed of the associated endpoint 00b=Full 01b=Low 10b=High 11b=Reserved - uint32_t data_toggle_control : 1 ; ///< This bit specifies where the host controller should get the initial data toggle on an overlay transition. 0b=Ignore DT bit of qTD, 1b=Use DT bit of qTD - uint32_t head_list_flag : 1 ; ///< This bit is set by System Software to mark a queue head as being the head of the reclamation list. See Section 4.8 for operational model - uint32_t max_package_size : 11 ; ///< This directly corresponds to the maximum packet size of the associated endpoint (wMaxPacketSize) - uint32_t non_hs_control_endpoint : 1 ; ///< If the QH.EPSfield indicates the endpoint is not a high-speed device, and the endpoint is an control endpoint, then software must set this bit to a one. Otherwise it should always set this bit to a zero. - uint32_t nak_count_reload : 4 ; ///< This field contains a value, which is used by the host controller to reload the Nak Counter field. - uint32_t : 0 ; // padding to the end of current storage unit - // End of Word 1 - - /// Word 2 : Endpoint Capabilities - uint32_t interrupt_smask : 8 ; ///< This field is used for all endpoint speeds. Software should set this field to a zero when the queue head is on the asynchronous schedule. A non-zero value in this field indicates an interrupt endpoint - uint32_t non_hs_interrupt_cmask : 8 ; ///< This field is ignored by the host controller unless the EPSfield indicates this device is a low- or full-speed device and this queue head is in the periodic list. This field (along with the Activeand SplitX-statefields) is used to determine during which micro-frames the host controller should execute a complete-split transaction - uint32_t hub_address : 7 ; ///< This field is ignored by the host controller unless the EPSfield indicates a full- or low-speed device. The value is the USB device address of the USB 2.0 Hub below which the full- or low-speed device associated with this endpoint is attached. This field is used in the split-transaction protocol. See Section 4.12. - uint32_t hub_port : 7 ; ///< This field is ignored by the host controller unless the EPSfield indicates a full- or low-speed device. The value is the port number identifier on the USB 2.0 Hub (for hub at device address Hub Addrbelow), below which the full- or low-speed device associated with this endpoint is attached. This information is used in the split-transaction protocol. See Section 4.12. - uint32_t mult : 2 ; ///< This field is a multiplier used to key the host controller as the number of successive packets the host controller may submit to the endpoint in the current execution. 00b=Reserved 01b,10b,11b= 1 (2, 3) Transaction for this endpoint/micro frame - uint32_t : 0 ; // padding to the end of current storage unit - // End of Word 2 - - /// Word 3: Current qTD Pointer + // Word 1: Endpoint Characteristics + uint32_t dev_addr : 7 ; ///< device address + uint32_t inactive_next_xact : 1 ; ///< request HC to set the Active bit to zero (only valid for Periodic with Full/Slow speed) + uint32_t ep_number : 4 ; ///< EP number + uint32_t ep_speed : 2 ; ///< 0: Full, 1: Low, 2: High + uint32_t data_toggle : 1 ; ///< 0: use DT in qHD, 1: use DT in qTD + uint32_t head_list_flag : 1 ; ///< Head of the queue + uint32_t max_packet_size : 11 ; ///< Max packet size + uint32_t fl_ctrl_ep_flag : 1 ; ///< 1 if is Full/Low speed control endpoint + uint32_t nak_reload : 4 ; ///< Used by HC + + // Word 2: Endpoint Capabilities + uint32_t int_smask : 8 ; ///< Interrupt Schedule Mask + uint32_t fl_int_cmask : 8 ; ///< Split Completion Mask for Full/Slow speed + uint32_t fl_hub_addr : 7 ; ///< Hub Address for Full/Slow speed + uint32_t fl_hub_port : 7 ; ///< Hub Port for Full/Slow speed + uint32_t mult : 2 ; ///< Transaction per micro frame + + // Word 3: Current qTD Pointer volatile uint32_t qtd_addr; - /// Word 4-11: Transfer Overlay + // Word 4-11: Transfer Overlay volatile ehci_qtd_t qtd_overlay; //--------------------------------------------------------------------+ @@ -203,10 +197,10 @@ TU_VERIFY_STATIC( sizeof(ehci_qhd_t) == 64, "size is not correct" ); /// Highspeed Isochronous Transfer Descriptor (section 3.3) typedef struct ATTR_ALIGNED(32) { - /// Word 0: Next Link Pointer + // Word 0: Next Link Pointer ehci_link_t next; - /// Word 1-8: iTD Transaction Status and Control List + // Word 1-8: iTD Transaction Status and Control List struct { // iTD Control volatile uint32_t offset : 12 ; ///< This field is a value that is an offset, expressed in bytes, from the beginning of a buffer. @@ -221,7 +215,7 @@ typedef struct ATTR_ALIGNED(32) { volatile uint32_t active : 1 ; ///< Set to 1 by software to enable the execution of an isochronous transaction by the Host Controller } xact[8]; - ///Word 9-15 Buffer Page Pointer List (Plus) + // Word 9-15 Buffer Page Pointer List (Plus) uint32_t BufferPointer[7]; // // FIXME: Store meta data into buffer pointer reserved for saving memory @@ -235,28 +229,26 @@ TU_VERIFY_STATIC( sizeof(ehci_itd_t) == 64, "size is not correct" ); /// Split (Full-Speed) Isochronous Transfer Descriptor typedef struct ATTR_ALIGNED(32) { - /// Word 0: Next Link Pointer + // Word 0: Next Link Pointer ehci_link_t next; - /// Word 1: siTD Endpoint Characteristics - uint32_t device_address : 7; ///< This field selects the specific device serving as the data source or sink. - uint32_t : 1; ///< reserved - uint32_t endpoint_number : 4; ///< This 4-bit field selects the particular endpoint number on the device serving as the data source or sink. - uint32_t : 4; ///< This field is reserved and should be set to zero. - uint32_t hub_address : 7; ///< This field holds the device address of the transaction translators’ hub. - uint32_t : 1; ///< reserved - uint32_t port_number : 7; ///< This field is the port number of the recipient transaction translator. - uint32_t direction : 1; ///< 0 = OUT; 1 = IN. This field encodes whether the full-speed transaction should be an IN or OUT. - uint32_t : 0; // padding to the end of current storage unit - // End of Word 1 - - /// Word 2: Micro-frame Schedule Control - uint8_t interrupt_smask ; ///< This field (along with the Activeand SplitX-statefields in the Statusbyte) are used to determine during which micro-frames the host controller should execute complete-split transactions - uint8_t non_hs_interrupt_cmask ; ///< This field (along with the Activeand SplitX-statefields in the Statusbyte) are used to determine during which micro-frames the host controller should execute start-split transactions. + // Word 1: siTD Endpoint Characteristics + uint32_t dev_addr : 7; ///< This field selects the specific device serving as the data source or sink. + uint32_t : 1; ///< reserved + uint32_t ep_number : 4; ///< This 4-bit field selects the particular endpoint number on the device serving as the data source or sink. + uint32_t : 4; ///< This field is reserved and should be set to zero. + uint32_t hub_addr : 7; ///< This field holds the device address of the transaction translators’ hub. + uint32_t : 1; ///< reserved + uint32_t port_number : 7; ///< This field is the port number of the recipient transaction translator. + uint32_t direction : 1; ///< 0 = OUT; 1 = IN. This field encodes whether the full-speed transaction should be an IN or OUT. + uint32_t : 0; // padding to the end of current storage unit + + // Word 2: Micro-frame Schedule Control + uint8_t int_smask ; ///< This field (along with the Activeand SplitX-statefields in the Statusbyte) are used to determine during which micro-frames the host controller should execute complete-split transactions + uint8_t fl_int_cmask; ///< This field (along with the Activeand SplitX-statefields in the Statusbyte) are used to determine during which micro-frames the host controller should execute start-split transactions. uint16_t reserved ; ///< reserved - // End of Word 2 - /// Word 3: siTD Transfer Status and Control + // Word 3: siTD Transfer Status and Control // Status [7:0] TODO indentical to qTD Token'status --> refractor later volatile uint32_t : 1 ; // reserved volatile uint32_t split_state : 1 ; @@ -273,7 +265,6 @@ typedef struct ATTR_ALIGNED(32) { volatile uint32_t page_select : 1 ; ///< Used to indicate which data page pointer should be concatenated with the CurrentOffsetfield to construct a data buffer pointer uint32_t int_on_complete : 1 ; ///< Do not interrupt when transaction is complete. 1 = Do interrupt when transaction is complete uint32_t : 0 ; // padding to the end of current storage unit - // End of Word 3 /// Word 4-5: Buffer Pointer List uint32_t buffer[2]; // buffer[1] TP: Transaction Position - T-Count: Transaction Count @@ -342,103 +333,103 @@ enum ehci_portsc_change_mask_{ typedef volatile struct { union { - uint32_t usb_cmd ; ///< The Command Register indicates the command to be executed by the serial bus host controller. Writing to the register causes a command to be executed + uint32_t command; + struct { - uint32_t run_stop : 1 ; ///< Default 0b. 1=Run. 0=Stop. When set to a 1, the Host Controller proceeds with execution of the schedule. The Host Controller continues execution as long as this bit is set to a 1. When this bit is set to 0, the Host Controller completes the current and any actively pipelined transactions on the USB and then halts. The Host Controller must halt within 16 micro-frames after software clears the Run bit. The HC Halted bit in the status register indicates when the Host Controller has finished its pending pipelined transactions and has entered the stopped state. Software must not write a one to this field unless the host controller is in the Halted state (i.e. HCHaltedin the USBSTS register is a one). Doing so will yield undefined results. - uint32_t reset : 1 ; ///< his control bit is used by software to reset the host controller. The effects of this on Root Hub registers are similar to a Chip Hardware Reset. When software writes a one to this bit, the Host Controller resets its internal pipelines, timers, counters, state machines, etc. to their initial value. Any transaction currently in progress on USB is immediately terminated. A USB reset is not driven on downstream ports.This bit is set to zero by the Host Controller when the reset process is complete. Software cannot terminate the reset process early by writing a zero to this register. Software should not set this bit to a one when the HCHaltedbit in the USBSTS register is a zero. Attempting to reset an actively running host controller will result in undefined behavior. - uint32_t framelist_size : 2 ; ///< This field is R/W only if Programmable Frame List Flagin the HCCPARAMS registers is set to a one. This field specifies the size of the frame list.00b 1024 elements (4096 bytes) Default value 01b 512 elements (2048 bytes) 10b 256 elements (1024 bytes) + uint32_t run_stop : 1 ; ///< 1=Run. 0=Stop + uint32_t reset : 1 ; ///< SW write 1 to reset HC, clear by HC when complete + uint32_t framelist_size : 2 ; ///< Frame List size 0: 1024, 1: 512, 2: 256 uint32_t periodic_enable : 1 ; ///< This bit controls whether the host controller skips processing the Periodic Schedule. Values mean: 0b Do not process the Periodic Schedule 1b Use the PERIODICLISTBASE register to access the Periodic Schedule. uint32_t async_enable : 1 ; ///< This bit controls whether the host controller skips processing the Asynchronous Schedule. Values mean: 0b Do not process the Asynchronous Schedule 1b Use the ASYNCLISTADDR register to access the Asynchronous Schedule. - uint32_t advance_async : 1 ; ///< This bit is used as a doorbell by software to tell the host controller to issue an interrupt the next time it advances asynchronous schedule. Software must write a 1 to this bit to ringthe doorbell. When the host controller has evicted all appropriate cached schedule state, it sets the Interrupt on Async Advancestatus bit in the USBSTS register. If the Interrupt on Async Advance Enablebit in the USBINTR register is a one then the host controller will assert an interrupt at the next interrupt threshold. See Section 4.8.2 for operational details. The host controller sets this bit to a zero after it has set the Interrupt on Async Advance status bit in the USBSTS register to a one. Software should not write a one to this bit when the asynchronous schedule is disabled. Doing so will yield undefined results. - uint32_t light_reset : 1 ; ///< This control bit is not required. If implemented, it allows the driver to reset the EHCI controller without affecting the state of the ports or the relationship to the companion host controllers. For example, the PORSTC registers should not be reset to their default values and the CF bit setting should not go to zero (retaining port ownership relationships). A host software read of this bit as zero indicates the Light Host Controller Reset has completed and it is safe for host software to re-initialize the host controller. A host software read of this bit as a one indicates the Light Host Controller Reset has not yet completed. - uint32_t async_park : 2 ; ///< It contains a count of the number of successive transactions the host controller is allowed to execute from a high-speed queue head on the Asynchronous schedule before continuing traversal of the Asynchronous schedule. See Section 4.10.3.2 for full operational details. Valid values are 1h to 3h. Software must not write a zero to this bit when Park Mode Enableis a one as this will result in undefined behavior. - uint32_t : 1 ; ///< reserved - uint32_t async_park_enable : 1 ; ///< Software uses this bit to enable or disable Park mode. When this bit is one, Park mode is enabled. When this bit is a zero, Park mode is disabled. - uint32_t : 3 ; ///< reserved + uint32_t async_adv_doorbell : 1 ; ///< Tell HC to interrupt next time it advances async list. Clear by HC + uint32_t light_reset : 1 ; ///< Reset HC without affecting ports state + uint32_t async_park_count : 2 ; ///< not used by tinyusb + uint32_t : 1 ; + uint32_t async_park_enable : 1 ; ///< Enable park mode, not used by tinyusb + uint32_t : 3 ; uint32_t nxp_framelist_size_msb : 1 ; ///< NXP customized : Bit 2 of the Frame List Size bits \n 011b: 128 elements \n 100b: 64 elements \n 101b: 32 elements \n 110b: 16 elements \n 111b: 8 elements - uint32_t int_threshold : 8 ; ///< Default 08h. This field is used by system software to select the maximum rate at which the host controller will issue interrupts. The only valid values are defined below. If software writes an invalid value to this register, the results are undefined. Value Maximum Interrupt Interval 00h Reserved 01h 1 micro-frame 02h 2 micro-frames 04h 4 micro-frames 08h 8 micro-frames (default, equates to 1 ms) 10h 16 micro-frames (2 ms) 20h 32 micro-frames (4 ms) 40h 64 micro-frames (8 ms) Refer to Section 4.15 for interrupts affected by this register. Any other value in this register yields undefined results. Software modifications to this bit while HCHalted bit is equal to zero results in undefined behavior. - uint32_t : 0 ; // padding to the boundary of storage unit - }usb_cmd_bit; + uint32_t int_threshold : 8 ; ///< Default 08h. Interrupt rate in unit of micro frame + }command_bm; }; union { - uint32_t usb_sts ; ///< This register indicates pending interrupts and various states of the Host Controller. The status resulting from a transaction on the serial bus is not indicated in this register. Software sets a bit to 0 in this register by writing a 1 to it. See Section 4.15 for additional information concerning USB interrupt conditions. + uint32_t status; + struct { - uint32_t usb : 1 ; ///< R/WC The Host Controller sets this bit to 1 on the completion of a USB transaction, which results in the retirement of a Transfer Descriptor that had its IOC bit set. \n The Host Controller also sets this bit to 1 when a short packet is detected (actual number of bytes received was less than the expected number of bytes). - uint32_t usb_error : 1 ; ///< R/WC The Host Controller sets this bit to 1 when completion of a USB transaction results in an error condition (e.g., error counter underflow). If the TD on which the error interrupt occurred also had its IOC bit set, both this bit and USBINT bit are set. See Section 4.15.1 for a list of the USB errors that will result in this bit being set to a one. - uint32_t port_change_detect : 1 ; ///< R/WC The Host Controller sets this bit to a one when any port for which the Port Ownerbit is set to zero (see Section 2.3.9) has a change bit transition from a zero to a one or a Force Port Resumebit transition from a zero to a one as a result of a J-K transition detected on a suspended port. - uint32_t framelist_rollover : 1 ; ///< R/WC The Host Controller sets this bit to a one when the Frame List Index(see Section 2.3.4) rolls over from its maximum value to zero. The exact value at which the rollover occurs depends on the frame list size. For example, if the frame list size (as programmed in the Frame List Sizefield of the USBCMD register) is 1024, the Frame Index Registerrolls over every time FRINDEX[13] toggles. Similarly, if the size is 512, the Host Controller sets this bit to a one every time FRINDEX[12] toggles. - uint32_t pci_host_system_error : 1 ; ///< R/WC (not used by NXP) The Host Controller sets this bit to 1 when a serious error occurs during a host system access involving the Host Controller module. In a PCI system, conditions that set this bit to 1 include PCI Parity error, PCI Master Abort, and PCI Target Abort. When this error occurs, the Host Controller clears the Run/Stop bit in the Command register to prevent further execution of the scheduled TDs. - uint32_t async_advance : 1 ; ///< R/WC 0=Default. System software can force the host controller to issue an interrupt the next time the host controller advances the asynchronous schedule by writing a one to the Interrupt on Async Advance Doorbell bit in the USBCMD register. This status bit indicates the assertion of that interrupt source. - uint32_t : 1 ; ///< These bits are reserved and should be set to zero. - uint32_t nxp_int_sof : 1 ; ///< R/WC NXP customized: this bit will be set every 125us and can be used by host controller driver as a time base. - uint32_t : 4 ; ///< These bits are reserved and should be set to zero. - uint32_t hc_halted : 1 ; ///< Read-Only 1=Default. This bit is a zero whenever the Run/Stop bit is a one. The Host Controller sets this bit to one after it has stopped executing as a result of the Run/Stop bit being set to 0, either by software or by the Host Controller hardware (e.g. internal error). - uint32_t reclamation : 1 ; ///< Read-Only 0=Default. This is a read-only status bit, which is used to detect an empty asynchronous schedule. The operational model of empty schedule detection is described in Section 4.8.3. The valid transitions for this bit are described in Section 4.8.6. - uint32_t period_schedule_status : 1 ; ///< Read-Only The bit reports the current real status of the Periodic Schedule. If this bit is a zero then the status of the Periodic Schedule is disabled. If this bit is a one then the status of the Periodic Schedule is enabled - uint32_t async_schedule_status : 1 ; ///< Read-Only 0=Default. The bit reports the current real status of the Asynchronous Schedule. If this bit is a zero then the status of the Asynchronous Schedule is disabled. If this bit is a one then the status of the Asynchronous Schedule is enabled. - uint32_t : 2 ; ///< reseved - uint32_t nxp_int_async : 1 ; ///< R/WC NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set andthe TD was from the asynchronous schedule. This bit is also set by the Host when a short packet is detected andthe packet is on the asynchronous schedule. - uint32_t nxp_int_period : 1 ; ///< R/WC NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set andthe TD was from the periodic schedule. - uint32_t : 12 ; ///< reserved - uint32_t : 0 ; // padding to the boundary of storage unit - }usb_sts_bit; + uint32_t usb : 1 ; ///< qTD with IOC is retired + uint32_t usb_error : 1 ; ///< qTD retired due to error + uint32_t port_change_detect : 1 ; ///< Set when PortOwner or ForcePortResume change from 0 -> 1 + uint32_t framelist_rollover : 1 ; ///< R/WC The Host Controller sets this bit to a one when the Frame List Index(see Section 2.3.4) rolls over from its maximum value to zero. The exact value at which the rollover occurs depends on the frame list size. For example, if the frame list size (as programmed in the Frame List Sizefield of the USBCMD register) is 1024, the Frame Index Registerrolls over every time FRINDEX[13] toggles. Similarly, if the size is 512, the Host Controller sets this bit to a one every time FRINDEX[12] toggles. + uint32_t pci_host_system_error : 1 ; ///< R/WC (not used by NXP) The Host Controller sets this bit to 1 when a serious error occurs during a host system access involving the Host Controller module. In a PCI system, conditions that set this bit to 1 include PCI Parity error, PCI Master Abort, and PCI Target Abort. When this error occurs, the Host Controller clears the Run/Stop bit in the Command register to prevent further execution of the scheduled TDs. + uint32_t async_adv : 1 ; ///< Async Advance interrupt + uint32_t : 1 ; + uint32_t nxp_int_sof : 1 ; ///< NXP customized: this bit will be set every 125us and can be used by host controller driver as a time base. + uint32_t : 4 ; + uint32_t hc_halted : 1 ; ///< Opposite value to run_stop bit. + uint32_t reclamation : 1 ; ///< Used to detect empty async shecudle + uint32_t periodic_status : 1 ; ///< Periodic schedule status + uint32_t async_status : 1 ; ///< Async schedule status + uint32_t : 2 ; + uint32_t nxp_int_async : 1 ; ///< NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set andthe TD was from the asynchronous schedule. This bit is also set by the Host when a short packet is detected andthe packet is on the asynchronous schedule. + uint32_t nxp_int_period : 1 ; ///< NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set andthe TD was from the periodic schedule. + uint32_t : 12 ; + }status_bm; }; union{ - uint32_t usb_int_enable ; ///< This register enables and disables reporting of the corresponding interrupt to the software. When a bit is set and the corresponding interrupt is active, an interrupt is generated to the host. Interrupt sources that are disabled in this register still appear in the USBSTS to allow the software to poll for events. + uint32_t inten; + struct { - uint32_t usb : 1 ; ///< When this bit is a one, and the USBINT bit in the USBSTS register is a one, the host controller will issue an interrupt at the next interrupt threshold. The interrupt is acknowledged by software clearing the USBINTbit. - uint32_t usb_error : 1 ; ///< When this bit is a one, and the USBERRINT bit in the USBSTS register is a one, the host controller will issue an interrupt at the next interrupt threshold. The interrupt is acknowledged by software clearing the USBERRINTbit. - uint32_t port_change_detect : 1 ; ///< When this bit is a one, and the Port Change Detect bit in the USBSTS register is a one, the host controller will issue an interrupt. The interrupt is acknowledged by software clearing the Port Change Detectbit. - uint32_t framelist_rollover : 1 ; ///< When this bit is a one, and the Frame List Rolloverbit in the USBSTS register is a one, the host controller will issue an interrupt. The interrupt is acknowledged by software clearing the Frame List Rollover bit. - uint32_t pci_host_system_error : 1 ; ///< (not used by NXP) When this bit is a one, and the Host System Error Statusbit in the USBSTS register is a one, the host controller will issue an interrupt. The interrupt is acknowledged by software clearing the Host System Error bit. - uint32_t async_advance : 1 ; ///< When this bit is a one, and the Interrupt on Async Advancebit in the USBSTS register is a one, the host controller will issue an interrupt at the next interrupt threshold. The interrupt is acknowledged by software clearing the Interrupt on Async Advancebit. - uint32_t : 1 ; ///< reserved - uint32_t nxp_int_sof : 1 ; ///< NXP customized: if this bit is one and the SRI bit in the USBSTS register is one, the host controller will issue an interrupt. In host mode, the SRI bit will be set every 125 micro sec and can be used by the host controller as a time base. The interrupt is acknowledged by software clearing the SRI bit in the USBSTS register. - uint32_t : 10 ; ///< reserved - uint32_t nxp_int_async : 1 ; ///< NXP customized: When this bit is a one, and the USBHSTASYNCINT bit in the USBSTS register is a one, the host controller will issue an interrupt at the next interrupt threshold. The interrupt is acknowledged by software clearing the USBHSTASYNCINT bit. - uint32_t nxp_int_period : 1 ; ///< NXP customized: When this bit is a one, and the USBHSTPERINT bit in the USBSTS register is a one, the host controller will issue an interrupt at the next interrupt threshold. The interrupt is acknowledged by software clearing the USBHSTPERINT bit. - uint32_t : 12 ; ///< reserved - uint32_t : 0 ; // padding to the boundary of storage unit - }usb_int_enable_bit; + uint32_t usb : 1 ; + uint32_t usb_error : 1 ; + uint32_t port_change_detect : 1 ; + uint32_t framelist_rollover : 1 ; + uint32_t pci_host_system_error : 1 ; + uint32_t async_adv : 1 ; + uint32_t : 1 ; + uint32_t nxp_int_sof : 1 ; + uint32_t : 10 ; + uint32_t nxp_int_async : 1 ; + uint32_t nxp_int_period : 1 ; + uint32_t : 12 ; + }inten_bm; }; - uint32_t frame_index ; ///< This register is used by the host controller to index into the periodic frame list. The register updates every 125 microseconds (once each micro-frame). Bits [N:3] are used to select a particular entry in the Periodic Frame List during periodic schedule execution. The number of bits used for the index depends on the size of the frame list as set by system software in the Frame List Sizefield in the USBCMD register - uint32_t ctrl_ds_seg ; ///< (not used by NXP) This 32-bit register corresponds to the most significant address bits [63:32] for all EHCI data structures. If the 64-bit Addressing Capabilityfield in HCCPARAMS is a zero, then this register is not used - uint32_t periodic_list_base ; ///< This 32-bit register contains the beginning address of the Periodic Frame List in the system memory. System software loads this register prior to starting the schedule execution by the Host Controller (see 4.1). The memory structure referenced by this physical memory pointer is assumed to be 4-Kbyte aligned. The contents of this register are combined with the Frame Index Register (FRINDEX) to enable the Host Controller to step through the Periodic Frame List in sequence. - uint32_t async_list_base ; ///< This 32-bit register contains the address of the next asynchronous queue head to be executed. Bits [4:0] of this register cannot be modified by system software and will always return a zero when read. The memory structure referenced by this physical memory pointer is assumed to be 32-byte (cache line) aligned - uint32_t tt_control ; ///< nxp embedded transaction translator (reserved by EHCI specs) - uint32_t reserved[8] ; ///< reserved by EHCI specs - uint32_t config_flag ; ///< (not used by NXP) configured flag register + uint32_t frame_index ; ///< Micro frame counter + uint32_t ctrl_ds_seg ; ///< Control Data Structure Segment + uint32_t periodic_list_base ; ///< Beginning address of perodic frame list + uint32_t async_list_addr ; ///< Address of next async QHD to be executed + uint32_t nxp_tt_control ; ///< nxp embedded transaction translator (reserved by EHCI specs) + uint32_t reserved[8] ; + uint32_t config_flag ; ///< not used by NXP union { uint32_t portsc ; ///< port status and control struct { - uint32_t current_connect_status : 1; ///< RO 1=Device is present on port. 0=No device is present. Default = 0. This value reflects the current state of the port, and may not correspond directly to the event that caused the Connect Status Change bit (Bit 1) to be set. This field is zero if Port Power is zero. - uint32_t connect_status_change : 1; ///< R/WC 1=Change in Current Connect Status. 0=No change. Default = 0. Indicates a change has occurred in the port's Current Connect Status. The host controller sets this bit for all changes to the port device connect status, even if system software has not cleared an existing connect status change. For example, the insertion status changes twice before system software has cleared the changed condition, hub hardware will be "setting" an already-set bit (i.e., the bit will remain set). Software sets this bit to 0 by writing a 1 to it. This field is zero if Port Power is zero. - uint32_t port_enable : 1; ///< 1=Enable. 0=Disable. Default = 0. Ports can only be enabled by the host controller as a part of the reset and enable. Software cannot enable a port by writing a one to this field. The host controller will only set this bit to a one when the reset sequence determines that the attached device is a high-speed device. Ports can be disabled by either a fault condition (disconnect event or other fault condition) or by host software. Note that the bit status does not change until the port state actually changes. - uint32_t port_enable_change : 1; ///< R/WC 1=Port enabled/disabled status has changed. 0=No change. Default = 0. For the root hub, this bit gets set to a one only when a port is disabled due to the appropriate conditions existing at the EOF2 point (See Chapter 11 of the USB Specification for the definition of a Port Error). Software clears this bit by writing a 1 to it. This field is zero if Port Power is zero. - uint32_t over_current_active : 1; ///< RO Default = 0. 1=This port currently has an over-current condition. 0=This port does not have an over-current condition. This bit will automatically transition from a one to a zero when the over current condition is removed. - uint32_t over_current_change : 1; ///< R/WC Default = 0. 1=This bit gets set to a one when there is a change to Over-current Active. Software clears this bit by writing a one to this bit position. - uint32_t force_port_resume : 1; ///< 1= Resume detected/driven on port. 0=No resume (K-state) detected/driven on port. Default = 0. This functionality defined for manipulating this bit depends on the value of the Suspendbit. For example, if the port is not suspended (Suspendand Enabledbits are a one) and software transitions this bit to a one, then the effects on the bus are undefined. Software sets this bit to a 1 to drive resume signaling. The Host Controller sets this bit to a 1 if a J-to-K transition is detected while the port is in the Suspend state. When this bit transitions to a one because a J-to-K transition is detected, the Port Change Detectbit in the USBSTS register is also set to a one. If software sets this bit to a one, the host controller must not set the Port Change Detectbit. - uint32_t suspend : 1; ///< 1=Port in suspend state. 0=Port not in suspend state. Default = 0. Port Enabled Bit and Suspend bit of this register define the port states as follows: Bits [Port Enabled, Suspend] Port State 0X Disable 10 Enable 11 Suspend When in suspend state, downstream propagation of data is blocked on this port, except for port reset. The blocking occurs at the end of the current transaction, if a transaction was in progress when this bit was written to 1. In the suspend state, the port is sensitive to resume detection. Note that the bit status does not change until the port is suspended and that there may be a delay in suspending a port if there is a transaction currently in progress on the USB. A write of zero to this bit is ignored by the host controller. The host controller will unconditionally set this bit to a zero when: •Software sets the Force Port Resumebit to a zero (from a one). •Software sets the Port Resetbit to a one (from a zero). - uint32_t port_reset : 1; ///< 1=Port is in Reset. 0=Port is not in Reset. Default = 0. When software writes a one to this bit (from a zero) + uint32_t current_connect_status : 1; ///< 0: No device, 1: Device is present on port + uint32_t connect_status_change : 1; ///< Change in Current Connect Status + uint32_t port_enabled : 1; ///< Ports can only be enabled by HC as a part of the reset and enable. SW can write 0 to disable + uint32_t port_enable_change : 1; ///< Port Enabled has changed + uint32_t over_current_active : 1; ///< Port has an over-current condition + uint32_t over_current_change : 1; ///< Change to Over-current Active + uint32_t force_port_resume : 1; ///< Resume detected/driven on port. This functionality defined for manipulating this bit depends on the value of the Suspend bit. + uint32_t suspend : 1; ///< Port in suspend state + uint32_t port_reset : 1; ///< 1=Port is in Reset. 0=Port is not in Reset uint32_t nxp_highspeed_status : 1; ///< NXP customized: 0=connected to the port is not in High-speed mode, 1=connected to the port is in High-speed mode - uint32_t line_status : 2; ///< hese bits reflect the current logical levels of the D+ (bit 11) and D- (bit 10) signal lines. These bits are used for detection of low-speed USB devices prior to the port reset and enable sequence. This field is valid only when the port enable bit is zero and the current connect status bit is set to a one. The encoding of the bits are: 00b SE0, 10b J-state, 01b K-state, 11b undefined - uint32_t port_power : 1; ///< 0= power off, 1= power on, Host/OTG controller requires port power control switches. This bit represents the current setting of the switch (0=off, 1=on). When power is not available on a port (i.e. PP equals a 0), the port is non-functional and will not report attaches, detaches, etc. When an over-current condition is detected on a powered port and PPC is a one, the PP bit in each affected port may be transitioned by the host controller driver from a one to a zero (removing power from the port). - uint32_t port_owner : 1; ///< (not used by NXP) - uint32_t port_indicator_control : 2; ///< Writing to this field effects the value of the pins USB0_IND1 and USB0_IND0. 00b: Port indication is off, 01b: Amber, 10b: green, 11b: undefined - uint32_t port_test_control : 4; ///< When this field is zero, the port is NOT operating in a test mode. A non-zero value indicates that it is operating in test mode - uint32_t wake_on_connect_enable : 1; ///< Default = 0b. Writing this bit to a one enables the port to be sensitive to device connects as wake-up events. See Section 4.3 for effects of this bit on resume event behavior. Refer to Section 4.3.1 for operational model. - uint32_t wake_on_disconnect_enable : 1; ///< Default = 0b. Writing this bit to a one enables the port to be sensitive to device disconnects as wake-up events. See Section 4.3 for effects of this bit on resume event behavior. Refer to Section 4.3.1 for operational model. - uint32_t wake_on_over_current_enable : 1; ///< Default = 0b. Writing this bit to a one enables the port to be sensitive to over-current conditions as wake-up events. See Section 4.3 for effects of this bit on resume event behavior. Refer to Section 4.3.1 for operational model. + uint32_t line_status : 2; ///< D+/D- state: 00: SE0, 10: J-state, 01: K-state + uint32_t port_power : 1; ///< 0= power off, 1= power on + uint32_t port_owner : 1; ///< not used by NXP + uint32_t port_indicator_control : 2; ///< 00b: off, 01b: Amber, 10b: green, 11b: undefined + uint32_t port_test_control : 4; ///< Port test mode, not used by tinyusb + uint32_t wake_on_connect_enable : 1; ///< Enables device connects as wake-up events + uint32_t wake_on_disconnect_enable : 1; ///< Enables device disconnects as wake-up events + uint32_t wake_on_over_current_enable : 1; ///< Enables over-current conditions as wake-up events uint32_t nxp_phy_clock_disable : 1; ///< NXP customized: the PHY can be put into Low Power Suspend – Clock Disable when the downstream device has been put into suspend mode or when no downstream device is connected. Low power suspend is completely under the control of software. 0: enable PHY clock, 1: disable PHY clock uint32_t nxp_port_force_fullspeed : 1; ///< NXP customized: Writing this bit to a 1 will force the port to only connect at Full Speed. It disables the chirp sequence that allowsthe port to identify itself as High Speed. This is useful for testing FS configurations with a HS host, hub or device. uint32_t : 1; uint32_t nxp_port_speed : 2; ///< NXP customized: This register field indicates the speed atwhich the port is operating. For HS mode operation in the host controllerand HS/FS operation in the device controller the port routing steers data to the Protocol engine. For FS and LS mode operation in the host controller, the port routing steers data to the Protocol Engine w/ Embedded Transaction Translator. 0x0: Fullspeed, 0x1: Lowspeed, 0x2: Highspeed uint32_t : 0; // padding to the boundary of storage unit - }portsc_bit; + }portsc_bm; }; }ehci_registers_t; -- cgit v1.3.1 From 7deac61d5f01e96df22e2d02a640c0f528d0109f Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 11 Dec 2018 13:09:40 +0700 Subject: clean up --- src/host/ehci/ehci.c | 66 ++++------------------------------------------------ 1 file changed, 4 insertions(+), 62 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 49863585a..ce74476bb 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -238,63 +238,6 @@ static tusb_error_t hcd_controller_stop(uint8_t hostid) //--------------------------------------------------------------------+ // CONTROL PIPE API //--------------------------------------------------------------------+ -//bool hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) -//{ -// ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); -// -// qhd_init(p_qhd, dev_addr, max_packet_size, 0, TUSB_XFER_CONTROL, 1); // TODO binterval of control is ignored -// -// if (dev_addr != 0) -// { -// //------------- insert to async list -------------// -// list_insert( (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].core_id), -// (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD); -// } -// -// return true; -//} - -//bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) -//{ -// ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); -// -// ehci_qtd_t *p_setup = get_control_qtds(dev_addr); -// ehci_qtd_t *p_data = p_setup + 1; -// ehci_qtd_t *p_status = p_setup + 2; -// -// //------------- SETUP Phase -------------// -// qtd_init(p_setup, (uint32_t) p_request, 8); -// p_setup->pid = EHCI_PID_SETUP; -// p_setup->next.address = (uint32_t) p_data; -// -// //------------- DATA Phase -------------// -// if (p_request->wLength > 0) -// { -// qtd_init(p_data, (uint32_t) data, p_request->wLength); -// p_data->data_toggle = 1; -// p_data->pid = p_request->bmRequestType_bit.direction ? EHCI_PID_IN : EHCI_PID_OUT; -// }else -// { -// p_data = p_setup; -// } -// p_data->next.address = (uint32_t) p_status; -// -// //------------- STATUS Phase -------------// -// qtd_init(p_status, 0, 0); // zero-length data -// p_status->int_on_complete = 1; -// p_status->data_toggle = 1; -// p_status->pid = p_request->bmRequestType_bit.direction ? EHCI_PID_OUT : EHCI_PID_IN; // reverse direction of data phase -// p_status->next.terminate = 1; -// -// //------------- Attach TDs list to Control Endpoint -------------// -// p_qhd->p_qtd_list_head = p_setup; -// p_qhd->p_qtd_list_tail = p_status; -// -// p_qhd->qtd_overlay.next.address = (uint32_t) p_setup; -// -// return true; -//} - bool hcd_pipe_control_close(uint8_t dev_addr) { //------------- TODO pipe handle validate -------------// @@ -389,15 +332,15 @@ bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const qhd_init(p_qhd, dev_addr, ep_desc); - //------------- Insert to Async List -------------// + // control of dev0 is always present as async head + if ( dev_addr == 0 ) return true; + + // Insert to list ehci_link_t * list_head; switch (ep_desc->bmAttributes.xfer) { case TUSB_XFER_CONTROL: - list_head = (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].rhport); - break; - case TUSB_XFER_BULK: list_head = (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].rhport); break; @@ -413,7 +356,6 @@ bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const default: break; } - //------------- insert to async/period list -------------// // TODO might need to disable async/period list list_insert( list_head, (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD); -- cgit v1.3.1 From 0d04e6eb96935723f17969bf43a33532fcebcbf6 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 11 Dec 2018 13:12:21 +0700 Subject: rename to hcd_edpt_open() --- src/class/cdc/cdc_host.c | 4 ++-- src/class/custom/custom_host.c | 2 +- src/class/hid/hid_host.c | 2 +- src/class/msc/msc_host.c | 2 +- src/host/ehci/ehci.c | 2 +- src/host/hcd.h | 6 ++--- src/host/hub.c | 2 +- src/host/ohci/ohci.c | 2 +- src/host/usbh.c | 2 +- tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c | 26 +++++++++++----------- .../test/host/cdc/test_cdc_rndis_host.c | 6 ++--- .../host/ehci/test_ehci_usbh_hcd_integration.c | 2 +- .../test/host/ehci/test_pipe_bulk_open.c | 6 ++--- .../test/host/ehci/test_pipe_bulk_xfer.c | 4 ++-- .../test/host/ehci/test_pipe_interrupt_open.c | 26 +++++++++++----------- .../test/host/ehci/test_pipe_interrupt_xfer.c | 4 ++-- .../test/host/ehci/test_pipe_isochronous_open.c | 2 +- tests/lpc18xx_43xx/test/host/hid/test_hid_host.c | 2 +- .../test/host/hid/test_hidh_keyboard.c | 2 +- tests/lpc18xx_43xx/test/host/hid/test_hidh_mouse.c | 2 +- tests/lpc18xx_43xx/test/host/msc/test_msc_host.c | 14 ++++++------ 21 files changed, 60 insertions(+), 60 deletions(-) (limited to 'src/host') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 78b338f15..f889c8c90 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -173,7 +173,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it // notification endpoint tusb_desc_endpoint_t const * ep_desc = (tusb_desc_endpoint_t const *) p_desc; - TU_ASSERT( hcd_pipe_open(rhport, dev_addr, ep_desc) ); + TU_ASSERT( hcd_edpt_open(rhport, dev_addr, ep_desc) ); p_cdc->ep_notif = ep_desc->bEndpointAddress; (*p_length) += p_desc[DESC_OFFSET_LEN]; @@ -194,7 +194,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType); TU_ASSERT(TUSB_XFER_BULK == ep_desc->bmAttributes.xfer); - TU_ASSERT(hcd_pipe_open(rhport, dev_addr, ep_desc)); + TU_ASSERT(hcd_edpt_open(rhport, dev_addr, ep_desc)); if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) { diff --git a/src/class/custom/custom_host.c b/src/class/custom/custom_host.c index 2a8206e36..e840a2829 100644 --- a/src/class/custom/custom_host.c +++ b/src/class/custom/custom_host.c @@ -121,7 +121,7 @@ tusb_error_t cush_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_ pipe_handle_t * p_pipe_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_IN_MASK ) ? &custom_interface[dev_addr-1].pipe_in : &custom_interface[dev_addr-1].pipe_out; - *p_pipe_hdl = hcd_pipe_open(dev_addr, p_endpoint, TUSB_CLASS_VENDOR_SPECIFIC); + *p_pipe_hdl = hcd_edpt_open(dev_addr, p_endpoint, TUSB_CLASS_VENDOR_SPECIFIC); TU_ASSERT ( pipehandle_is_valid(*p_pipe_hdl), TUSB_ERROR_HCD_OPEN_PIPE_FAILED ); p_desc = descriptor_next(p_desc); diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index 980381bf5..8d7dce70a 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -56,7 +56,7 @@ //--------------------------------------------------------------------+ static inline bool hidh_interface_open(uint8_t dev_addr, uint8_t interface_number, tusb_desc_endpoint_t const *p_endpoint_desc, hidh_interface_info_t *p_hid) { - p_hid->pipe_hdl = hcd_pipe_open(dev_addr, p_endpoint_desc, TUSB_CLASS_HID); + p_hid->pipe_hdl = hcd_edpt_open(dev_addr, p_endpoint_desc, TUSB_CLASS_HID); p_hid->report_size = p_endpoint_desc->wMaxPacketSize.size; // TODO get size from report descriptor p_hid->interface_number = interface_number; diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 1053d42d2..8e51debcf 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -307,7 +307,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType); TU_ASSERT(TUSB_XFER_BULK == ep_desc->bmAttributes.xfer); - TU_ASSERT(hcd_pipe_open(rhport, dev_addr, ep_desc)); + TU_ASSERT(hcd_edpt_open(rhport, dev_addr, ep_desc)); if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) { diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index ce74476bb..94796c9dd 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -313,7 +313,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet //--------------------------------------------------------------------+ // BULK/INT/ISO PIPE API //--------------------------------------------------------------------+ -bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) +bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) { // TODO not support ISO yet TU_ASSERT (ep_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS); diff --git a/src/host/hcd.h b/src/host/hcd.h index dcc2bdf53..9b7b99321 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -128,15 +128,15 @@ void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t ev //--------------------------------------------------------------------+ // Endpoints API //--------------------------------------------------------------------+ -bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr); bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]); -bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen); +bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); +bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr); +bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen); //--------------------------------------------------------------------+ // PIPE API //--------------------------------------------------------------------+ // TODO control xfer should be used via usbh layer -bool hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes); // only queue, not transferring yet bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete); bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr); // TODO remove diff --git a/src/host/hub.c b/src/host/hub.c index f755928e8..411e1ae95 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -168,7 +168,7 @@ bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_i TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType); TU_ASSERT(TUSB_XFER_INTERRUPT == ep_desc->bmAttributes.xfer); - TU_ASSERT(hcd_pipe_open(rhport, dev_addr, ep_desc)); + TU_ASSERT(hcd_edpt_open(rhport, dev_addr, ep_desc)); hub_data[dev_addr-1].itf_num = p_interface_desc->bInterfaceNumber; hub_data[dev_addr-1].ep_status = ep_desc->bEndpointAddress; diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index 5923be936..37de86c60 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -481,7 +481,7 @@ static void ed_list_remove(ohci_ed_t * p_head, ohci_ed_t * p_ed) p_ed->used = 0; // free ED } -pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_desc_endpoint_t const * p_endpoint_desc, uint8_t class_code) +pipe_handle_t hcd_edpt_open(uint8_t dev_addr, tusb_desc_endpoint_t const * p_endpoint_desc, uint8_t class_code) { pipe_handle_t const null_handle = { .dev_addr = 0, .xfer_type = 0, .index = 0 }; diff --git a/src/host/usbh.c b/src/host/usbh.c index 3ab3bd71e..ff4343fd2 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -236,7 +236,7 @@ tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) .bInterval = 0 }; - hcd_pipe_open(_usbh_devices[dev_addr].rhport, dev_addr, &ep0_desc); + hcd_edpt_open(_usbh_devices[dev_addr].rhport, dev_addr, &ep0_desc); return TUSB_ERROR_NONE; } diff --git a/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c b/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c index 1b73e649f..1f8410461 100644 --- a/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c +++ b/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c @@ -86,7 +86,7 @@ void test_cdch_open_failed_to_open_notification_endpoint(void) { pipe_handle_t null_hdl = {0}; - hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, null_hdl); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, null_hdl); //------------- CUT -------------// TEST_ASSERT_EQUAL(TUSB_ERROR_HCD_OPEN_PIPE_FAILED, cdch_open(dev_addr, p_comm_interface, &length)); @@ -98,8 +98,8 @@ void test_cdch_open_failed_to_open_data_endpoint_out(void) pipe_handle_t dummy_hld = { .dev_addr = 1 }; pipe_handle_t null_hdl = {0}; - hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, dummy_hld); - hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, null_hdl); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, dummy_hld); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, null_hdl); //------------- CUT -------------// TEST_ASSERT_EQUAL(TUSB_ERROR_HCD_OPEN_PIPE_FAILED, cdch_open(dev_addr, p_comm_interface, &length)); @@ -111,9 +111,9 @@ void test_cdch_open_failed_to_open_data_endpoint_in(void) pipe_handle_t dummy_hld = { .dev_addr = 1 }; pipe_handle_t null_hdl = {0}; - hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, dummy_hld); - hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, dummy_hld); - hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_in, TUSB_CLASS_CDC, null_hdl); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, dummy_hld); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, dummy_hld); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_in, TUSB_CLASS_CDC, null_hdl); //------------- CUT -------------// TEST_ASSERT_EQUAL(TUSB_ERROR_HCD_OPEN_PIPE_FAILED, cdch_open(dev_addr, p_comm_interface, &length)); @@ -131,7 +131,7 @@ void test_cdch_open_length_check(void) sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t); pipe_handle_t dummy_hld = { .dev_addr = 1 }; - hcd_pipe_open_IgnoreAndReturn(dummy_hld); + hcd_edpt_open_IgnoreAndReturn(dummy_hld); tusbh_cdc_mounted_cb_Expect(dev_addr); //------------- CUT -------------// @@ -143,7 +143,7 @@ void test_cdch_open_length_check(void) void test_cdch_open_interface_number_check(void) { pipe_handle_t dummy_hld = { .dev_addr = 1 }; - hcd_pipe_open_IgnoreAndReturn(dummy_hld); + hcd_edpt_open_IgnoreAndReturn(dummy_hld); tusbh_cdc_mounted_cb_Expect(dev_addr); //------------- CUT -------------// @@ -156,7 +156,7 @@ void test_cdch_open_interface_number_check(void) void test_cdch_open_protocol_check(void) { pipe_handle_t dummy_hld = { .dev_addr = 1 }; - hcd_pipe_open_IgnoreAndReturn(dummy_hld); + hcd_edpt_open_IgnoreAndReturn(dummy_hld); tusbh_cdc_mounted_cb_Expect(dev_addr); //------------- CUT -------------// @@ -169,7 +169,7 @@ void test_cdch_open_protocol_check(void) void test_cdch_open_acm_capacity_check(void) { pipe_handle_t dummy_hld = { .dev_addr = 1 }; - hcd_pipe_open_IgnoreAndReturn(dummy_hld); + hcd_edpt_open_IgnoreAndReturn(dummy_hld); tusbh_cdc_mounted_cb_Expect(dev_addr); //------------- CUT -------------// @@ -187,9 +187,9 @@ void test_cdch_close_device(void) pipe_handle_t pipe_out = { .dev_addr = 1, .xfer_type = TUSB_XFER_BULK, .index = 0 }; pipe_handle_t pipe_int = { .dev_addr = 1, .xfer_type = TUSB_XFER_BULK, .index = 1 }; - hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, pipe_notification); - hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, pipe_out); - hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_in, TUSB_CLASS_CDC, pipe_int); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, pipe_notification); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, pipe_out); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_in, TUSB_CLASS_CDC, pipe_int); tusbh_cdc_mounted_cb_Expect(dev_addr); TEST_ASSERT_EQUAL( TUSB_ERROR_NONE, cdch_open(dev_addr, p_comm_interface, &length) ); diff --git a/tests/lpc18xx_43xx/test/host/cdc/test_cdc_rndis_host.c b/tests/lpc18xx_43xx/test/host/cdc/test_cdc_rndis_host.c index 86d6c2890..ca478b129 100644 --- a/tests/lpc18xx_43xx/test/host/cdc/test_cdc_rndis_host.c +++ b/tests/lpc18xx_43xx/test/host/cdc/test_cdc_rndis_host.c @@ -103,9 +103,9 @@ void setUp(void) osal_mutex_wait_StubWithCallback(stub_mutex_wait); osal_mutex_release_IgnoreAndReturn(TUSB_ERROR_NONE); - hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, pipe_notification); - hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, pipe_out); - hcd_pipe_open_ExpectAndReturn(dev_addr, p_endpoint_in, TUSB_CLASS_CDC, pipe_in); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_notification, TUSB_CLASS_CDC, pipe_notification); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_out, TUSB_CLASS_CDC, pipe_out); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_endpoint_in, TUSB_CLASS_CDC, pipe_in); } void tearDown(void) diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_usbh_hcd_integration.c b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_usbh_hcd_integration.c index e17b2ba74..8fa5af5d5 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_usbh_hcd_integration.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_usbh_hcd_integration.c @@ -168,7 +168,7 @@ void test_bulk_pipe_close(void) }; uint8_t xfer_data[100]; - pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_bulk_in, TUSB_CLASS_MSC); + pipe_handle_t pipe_hdl = hcd_edpt_open(dev_addr, &desc_ept_bulk_in, TUSB_CLASS_MSC); TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl, xfer_data, sizeof(xfer_data), 100) ); TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl, xfer_data, sizeof(xfer_data), 50) ); diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_open.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_open.c index 52cf40555..5b86750ef 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_open.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_open.c @@ -155,7 +155,7 @@ void test_open_bulk_qhd_data(void) tusb_desc_endpoint_t const * desc_endpoint = &desc_ept_bulk_in; //------------- Code Under TEST -------------// - pipe_hdl = hcd_pipe_open(dev_addr, desc_endpoint, TUSB_CLASS_MSC); + pipe_hdl = hcd_edpt_open(dev_addr, desc_endpoint, TUSB_CLASS_MSC); TEST_ASSERT_EQUAL(dev_addr, pipe_hdl.dev_addr); TEST_ASSERT_EQUAL(TUSB_XFER_BULK, pipe_hdl.xfer_type); @@ -175,7 +175,7 @@ void test_open_bulk_hs_out_pingstate(void) pipe_handle_t pipe_hdl; //------------- Code Under TEST -------------// - pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_bulk_out, TUSB_CLASS_MSC); + pipe_hdl = hcd_edpt_open(dev_addr, &desc_ept_bulk_out, TUSB_CLASS_MSC); p_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1 ].qhd[ pipe_hdl.index ]; TEST_ASSERT(p_qhd->qtd_overlay.pingstate_err); @@ -187,7 +187,7 @@ void test_open_bulk_hs_out_pingstate(void) void test_bulk_close(void) { tusb_desc_endpoint_t const * desc_endpoint = &desc_ept_bulk_in; - pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, desc_endpoint, TUSB_CLASS_MSC); + pipe_handle_t pipe_hdl = hcd_edpt_open(dev_addr, desc_endpoint, TUSB_CLASS_MSC); ehci_qhd_t *p_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ]; //------------- Code Under TEST -------------// diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c index 634184ee2..47e8177a3 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c @@ -102,7 +102,7 @@ void setUp(void) async_head = get_async_head( hostid ); //------------- pipe open -------------// - pipe_hdl_bulk = hcd_pipe_open(dev_addr, &desc_ept_bulk_in, TUSB_CLASS_MSC); + pipe_hdl_bulk = hcd_edpt_open(dev_addr, &desc_ept_bulk_in, TUSB_CLASS_MSC); TEST_ASSERT_EQUAL(dev_addr, pipe_hdl_bulk.dev_addr); TEST_ASSERT_EQUAL(TUSB_XFER_BULK, pipe_hdl_bulk.xfer_type); @@ -148,7 +148,7 @@ void test_bulk_xfer_hs_ping_out(void) { _usbh_devices[dev_addr].speed = TUSB_SPEED_HIGH; - pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_bulk_out, TUSB_CLASS_MSC); + pipe_handle_t pipe_hdl = hcd_edpt_open(dev_addr, &desc_ept_bulk_out, TUSB_CLASS_MSC); ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(pipe_hdl); //------------- Code Under Test -------------// diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_open.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_open.c index f48b2c7f4..ff6dfef8f 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_open.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_open.c @@ -144,7 +144,7 @@ void check_int_endpoint_link(ehci_qhd_t *p_prev, ehci_qhd_t *p_qhd) void test_open_interrupt_qhd_hs(void) { //------------- Code Under TEST -------------// - pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID); + pipe_hdl = hcd_edpt_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID); TEST_ASSERT_EQUAL(dev_addr, pipe_hdl.dev_addr); TEST_ASSERT_EQUAL(TUSB_XFER_INTERRUPT, pipe_hdl.xfer_type); @@ -162,7 +162,7 @@ void test_open_interrupt_hs_interval_1(void) int_edp_interval.bInterval = 1; //------------- Code Under TEST -------------// - pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); + pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ]; TEST_ASSERT_EQUAL(0 , p_int_qhd->interval_ms); @@ -177,7 +177,7 @@ void test_open_interrupt_hs_interval_2(void) int_edp_interval.bInterval = 2; //------------- Code Under TEST -------------// - pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); + pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ]; TEST_ASSERT_EQUAL(0 , p_int_qhd->interval_ms); @@ -191,7 +191,7 @@ void test_open_interrupt_hs_interval_3(void) int_edp_interval.bInterval = 3; //------------- Code Under TEST -------------// - pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); + pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ]; TEST_ASSERT_EQUAL(0, p_int_qhd->interval_ms); @@ -205,7 +205,7 @@ void test_open_interrupt_hs_interval_4(void) int_edp_interval.bInterval = 4; //------------- Code Under TEST -------------// - pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); + pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ]; TEST_ASSERT_EQUAL(1, p_int_qhd->interval_ms); @@ -219,7 +219,7 @@ void test_open_interrupt_hs_interval_5(void) int_edp_interval.bInterval = 5; //------------- Code Under TEST -------------// - pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); + pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ]; TEST_ASSERT_EQUAL(2, p_int_qhd->interval_ms); @@ -233,7 +233,7 @@ void test_open_interrupt_hs_interval_6(void) int_edp_interval.bInterval = 6; //------------- Code Under TEST -------------// - pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); + pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ]; TEST_ASSERT_EQUAL(4, p_int_qhd->interval_ms); @@ -247,7 +247,7 @@ void test_open_interrupt_hs_interval_7(void) int_edp_interval.bInterval = 7; //------------- Code Under TEST -------------// - pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); + pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ]; TEST_ASSERT_EQUAL(8, p_int_qhd->interval_ms); @@ -261,7 +261,7 @@ void test_open_interrupt_hs_interval_8(void) int_edp_interval.bInterval = 16; //------------- Code Under TEST -------------// - pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); + pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ]; TEST_ASSERT_EQUAL(255, p_int_qhd->interval_ms); @@ -275,7 +275,7 @@ void test_open_interrupt_qhd_non_hs(void) _usbh_devices[dev_addr].speed = TUSB_SPEED_FULL; //------------- Code Under TEST -------------// - pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID); + pipe_hdl = hcd_edpt_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID); TEST_ASSERT_EQUAL(dev_addr, pipe_hdl.dev_addr); TEST_ASSERT_EQUAL(TUSB_XFER_INTERRUPT, pipe_hdl.xfer_type); @@ -297,7 +297,7 @@ void test_open_interrupt_qhd_non_hs_9(void) _usbh_devices[dev_addr].speed = TUSB_SPEED_FULL; //------------- Code Under TEST -------------// - pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); + pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ]; TEST_ASSERT_EQUAL(int_edp_interval.bInterval, p_int_qhd->interval_ms); @@ -310,7 +310,7 @@ void test_open_interrupt_qhd_non_hs_9(void) //--------------------------------------------------------------------+ void test_interrupt_close(void) { - pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID); + pipe_hdl = hcd_edpt_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID); p_int_qhd = qhd_get_from_pipe_handle(pipe_hdl); //------------- Code Under TEST -------------// @@ -328,7 +328,7 @@ void test_interrupt_256ms_close(void) tusb_desc_endpoint_t int_edp_interval = desc_ept_interrupt_out; int_edp_interval.bInterval = 9; - pipe_hdl = hcd_pipe_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); + pipe_hdl = hcd_edpt_open(dev_addr, &int_edp_interval, TUSB_CLASS_HID); p_int_qhd = qhd_get_from_pipe_handle(pipe_hdl); //------------- Code Under TEST -------------// diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c index b55ec1d9a..d6a5e396c 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c @@ -104,7 +104,7 @@ void setUp(void) period_head_arr = (ehci_qhd_t*) get_period_head( hostid, 1 ); //------------- pipe open -------------// - pipe_hdl_interrupt = hcd_pipe_open(dev_addr, &desc_ept_interrupt_in, TUSB_CLASS_HID); + pipe_hdl_interrupt = hcd_edpt_open(dev_addr, &desc_ept_interrupt_in, TUSB_CLASS_HID); TEST_ASSERT_EQUAL(dev_addr, pipe_hdl_interrupt.dev_addr); TEST_ASSERT_EQUAL(TUSB_XFER_INTERRUPT, pipe_hdl_interrupt.xfer_type); @@ -220,7 +220,7 @@ void test_interrupt_xfer_complete_isr_interval_2ms(void) tusb_desc_endpoint_t desc_endpoint_2ms = desc_ept_interrupt_in; desc_endpoint_2ms.bInterval = 5; - pipe_handle_t pipe_hdl_2ms = hcd_pipe_open(dev_addr, &desc_endpoint_2ms, TUSB_CLASS_HID); + pipe_handle_t pipe_hdl_2ms = hcd_edpt_open(dev_addr, &desc_endpoint_2ms, TUSB_CLASS_HID); ehci_qhd_t * p_qhd_2ms = &ehci_data.device[ dev_addr -1].qhd[ pipe_hdl_2ms.index ]; TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl_2ms, xfer_data, sizeof(xfer_data), false) ); diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_isochronous_open.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_isochronous_open.c index 51381381f..92dd2b474 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_isochronous_open.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_isochronous_open.c @@ -94,6 +94,6 @@ tusb_desc_endpoint_t const desc_ept_iso_in = void test_open_isochronous(void) { - pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_iso_in, TUSB_CLASS_AUDIO); + pipe_handle_t pipe_hdl = hcd_edpt_open(dev_addr, &desc_ept_iso_in, TUSB_CLASS_AUDIO); TEST_ASSERT_EQUAL(0, pipe_hdl.dev_addr); } diff --git a/tests/lpc18xx_43xx/test/host/hid/test_hid_host.c b/tests/lpc18xx_43xx/test/host/hid/test_hid_host.c index 59ad54c88..963c344ab 100644 --- a/tests/lpc18xx_43xx/test/host/hid/test_hid_host.c +++ b/tests/lpc18xx_43xx/test/host/hid/test_hid_host.c @@ -75,7 +75,7 @@ void tearDown(void) // uint16_t length=0; // // // TODO expect get HID report descriptor -// hcd_pipe_open_IgnoreAndReturn( pipe_hdl ); +// hcd_edpt_open_IgnoreAndReturn( pipe_hdl ); // // //------------- Code Under TEST -------------// // TEST_ASSERT_EQUAL(TUSB_ERROR_NONE, hidh_open_subtask(dev_addr, p_kbd_interface_desc, &length) ); diff --git a/tests/lpc18xx_43xx/test/host/hid/test_hidh_keyboard.c b/tests/lpc18xx_43xx/test/host/hid/test_hidh_keyboard.c index de3581423..49bb26342 100644 --- a/tests/lpc18xx_43xx/test/host/hid/test_hidh_keyboard.c +++ b/tests/lpc18xx_43xx/test/host/hid/test_hidh_keyboard.c @@ -146,7 +146,7 @@ void test_keyboard_open_ok(void) usbh_control_xfer_subtask_ExpectAndReturn(dev_addr, bm_request_type(TUSB_DIR_HOST_TO_DEV, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RECIPIENT_INTERFACE), HID_REQ_CONTROL_SET_IDLE, 0, p_kbd_interface_desc->bInterfaceNumber, 0, NULL, TUSB_ERROR_NONE); - hcd_pipe_open_ExpectAndReturn(dev_addr, p_kdb_endpoint_desc, TUSB_CLASS_HID, pipe_hdl); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_kdb_endpoint_desc, TUSB_CLASS_HID, pipe_hdl); tusbh_hid_keyboard_mounted_cb_Expect(dev_addr); //------------- Code Under TEST -------------// diff --git a/tests/lpc18xx_43xx/test/host/hid/test_hidh_mouse.c b/tests/lpc18xx_43xx/test/host/hid/test_hidh_mouse.c index 541c2caef..bf71a7438 100644 --- a/tests/lpc18xx_43xx/test/host/hid/test_hidh_mouse.c +++ b/tests/lpc18xx_43xx/test/host/hid/test_hidh_mouse.c @@ -117,7 +117,7 @@ void test_mouse_open_ok(void) usbh_control_xfer_subtask_ExpectAndReturn(dev_addr, bm_request_type(TUSB_DIR_HOST_TO_DEV, TUSB_REQ_TYPE_CLASS, TUSB_REQ_RECIPIENT_INTERFACE), HID_REQ_CONTROL_SET_IDLE, 0, p_mouse_interface_desc->bInterfaceNumber, 0, NULL, TUSB_ERROR_NONE); - hcd_pipe_open_ExpectAndReturn(dev_addr, p_mouse_endpoint_desc, TUSB_CLASS_HID, pipe_hdl); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_mouse_endpoint_desc, TUSB_CLASS_HID, pipe_hdl); tusbh_hid_mouse_mounted_cb_Expect(dev_addr); //------------- Code Under TEST -------------// diff --git a/tests/lpc18xx_43xx/test/host/msc/test_msc_host.c b/tests/lpc18xx_43xx/test/host/msc/test_msc_host.c index b89a716c2..abdcbaf1f 100644 --- a/tests/lpc18xx_43xx/test/host/msc/test_msc_host.c +++ b/tests/lpc18xx_43xx/test/host/msc/test_msc_host.c @@ -84,15 +84,15 @@ void tearDown(void) void test_open_pipe_in_failed(void) { - hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, pipe_null); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, pipe_null); TEST_ASSERT(TUSB_ERROR_NONE != msch_open(dev_addr, p_msc_interface_desc, &length)); } void test_open_pipe_out_failed(void) { - hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, (pipe_handle_t) {1} ); - hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_out, TUSB_CLASS_MSC, pipe_null); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, (pipe_handle_t) {1} ); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_edp_out, TUSB_CLASS_MSC, pipe_null); TEST_ASSERT(TUSB_ERROR_NONE != msch_open(dev_addr, p_msc_interface_desc, &length)); } @@ -121,8 +121,8 @@ tusb_error_t stub_control_xfer(uint8_t dev_addr, uint8_t bmRequestType, uint8_t #if 0 // TODO TEST enable this void test_open_desc_length(void) { - hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, pipe_in); - hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_out, TUSB_CLASS_MSC, pipe_out); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, pipe_in); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_edp_out, TUSB_CLASS_MSC, pipe_out); usbh_control_xfer_subtask_IgnoreAndReturn(TUSB_ERROR_NONE); hcd_pipe_xfer_IgnoreAndReturn(TUSB_ERROR_NONE); @@ -137,8 +137,8 @@ void test_open_desc_length(void) void test_open_ok(void) { - hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, pipe_in); - hcd_pipe_open_ExpectAndReturn(dev_addr, p_edp_out, TUSB_CLASS_MSC, pipe_out); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_edp_in, TUSB_CLASS_MSC, pipe_in); + hcd_edpt_open_ExpectAndReturn(dev_addr, p_edp_out, TUSB_CLASS_MSC, pipe_out); //------------- get max lun -------------// usbh_control_xfer_subtask_StubWithCallback(stub_control_xfer); -- cgit v1.3.1 From dbc560658a900525acd11ffcae2e59839d9c6fe5 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 11 Dec 2018 13:15:05 +0700 Subject: more hcd_pipe to hcd_edpt rename --- src/class/cdc/cdc_host.c | 10 +++++----- src/class/hid/hid_host.c | 6 +++--- src/class/msc/msc_host.c | 6 +++--- src/host/ehci/ehci.c | 6 +++--- src/host/hcd.h | 10 ++++++---- src/host/ohci/ohci.c | 6 +++--- tests/lpc18xx_43xx/test/host/hid/test_hidh_keyboard.c | 6 +++--- tests/lpc18xx_43xx/test/host/hid/test_hidh_mouse.c | 6 +++--- 8 files changed, 29 insertions(+), 27 deletions(-) (limited to 'src/host') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index f889c8c90..df07e0683 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -80,13 +80,13 @@ bool tuh_cdc_is_busy(uint8_t dev_addr, cdc_pipeid_t pipeid) switch (pipeid) { case CDC_PIPE_NOTIFICATION: - return hcd_pipe_is_busy(dev_addr, p_cdc->ep_notif ); + return hcd_edpt_busy(dev_addr, p_cdc->ep_notif ); case CDC_PIPE_DATA_IN: - return hcd_pipe_is_busy(dev_addr, p_cdc->ep_in ); + return hcd_edpt_busy(dev_addr, p_cdc->ep_in ); case CDC_PIPE_DATA_OUT: - return hcd_pipe_is_busy(dev_addr, p_cdc->ep_out ); + return hcd_edpt_busy(dev_addr, p_cdc->ep_out ); default: return false; @@ -110,7 +110,7 @@ bool tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length, bool i TU_VERIFY( p_data != NULL && length, TUSB_ERROR_INVALID_PARA); uint8_t const ep_out = cdch_data[dev_addr-1].ep_out; - if ( hcd_pipe_is_busy(dev_addr, ep_out) ) return false; + if ( hcd_edpt_busy(dev_addr, ep_out) ) return false; return hcd_pipe_xfer(dev_addr, ep_out, (void *) p_data, length, is_notify); } @@ -121,7 +121,7 @@ bool tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is TU_VERIFY( p_buffer != NULL && length, TUSB_ERROR_INVALID_PARA); uint8_t const ep_in = cdch_data[dev_addr-1].ep_in; - if ( hcd_pipe_is_busy(dev_addr, ep_in) ) return false; + if ( hcd_edpt_busy(dev_addr, ep_in) ) return false; return hcd_pipe_xfer(dev_addr, ep_in, p_buffer, length, is_notify); } diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index 8d7dce70a..aa93f7837 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -78,7 +78,7 @@ tusb_error_t hidh_interface_get_report(uint8_t dev_addr, void * report, hidh_int // TODO change to use is configured function TU_ASSERT (TUSB_DEVICE_STATE_CONFIGURED == tuh_device_get_state(dev_addr), TUSB_ERROR_DEVICE_NOT_READY); TU_VERIFY (report, TUSB_ERROR_INVALID_PARA); - TU_ASSERT (!hcd_pipe_is_busy(p_hid->pipe_hdl), TUSB_ERROR_INTERFACE_IS_BUSY); + TU_ASSERT (!hcd_edpt_busy(p_hid->pipe_hdl), TUSB_ERROR_INTERFACE_IS_BUSY); TU_ASSERT_ERR( hcd_pipe_xfer(p_hid->pipe_hdl, report, p_hid->report_size, true) ) ; @@ -118,7 +118,7 @@ tusb_error_t tuh_hid_keyboard_get_report(uint8_t dev_addr, void* p_report) bool tuh_hid_keyboard_is_busy(uint8_t dev_addr) { return tuh_hid_keyboard_is_mounted(dev_addr) && - hcd_pipe_is_busy( keyboardh_data[dev_addr-1].pipe_hdl ); + hcd_edpt_busy( keyboardh_data[dev_addr-1].pipe_hdl ); } #endif @@ -139,7 +139,7 @@ bool tuh_hid_mouse_is_mounted(uint8_t dev_addr) bool tuh_hid_mouse_is_busy(uint8_t dev_addr) { return tuh_hid_mouse_is_mounted(dev_addr) && - hcd_pipe_is_busy( mouseh_data[dev_addr-1].pipe_hdl ); + hcd_edpt_busy( mouseh_data[dev_addr-1].pipe_hdl ); } tusb_error_t tuh_hid_mouse_get_report(uint8_t dev_addr, void * report) diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 8e51debcf..0b1359264 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -76,7 +76,7 @@ bool tuh_msc_is_mounted(uint8_t dev_addr) bool tuh_msc_is_busy(uint8_t dev_addr) { return msch_data[dev_addr-1].is_initialized && - hcd_pipe_is_busy(dev_addr, msch_data[dev_addr-1].ep_in); + hcd_edpt_busy(dev_addr, msch_data[dev_addr-1].ep_in); } uint8_t const* tuh_msc_get_vendor_name(uint8_t dev_addr) @@ -361,7 +361,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it // NOTE: my toshiba thumb-drive stall the first Read Capacity and require the sequence // Read Capacity --> Stalled --> Clear Stall --> Request Sense --> Read Capacity (2) to work - if ( hcd_pipe_is_stalled(dev_addr, p_msc->ep_in) ) + if ( hcd_edpt_stalled(dev_addr, p_msc->ep_in) ) { // clear stall TODO abstract clear stall function request = (tusb_control_request_t) { @@ -374,7 +374,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it TU_ASSERT(usbh_control_xfer( dev_addr, &request, NULL )); - hcd_pipe_clear_stall(dev_addr, p_msc->ep_in); + hcd_edpt_clear_stall(dev_addr, p_msc->ep_in); TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT) ); // wait for SCSI status //------------- SCSI Request Sense -------------// diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 94796c9dd..3833a46d7 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -420,19 +420,19 @@ bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) return true; } -bool hcd_pipe_is_busy(uint8_t dev_addr, uint8_t ep_addr) +bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) { ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); return !p_qhd->qtd_overlay.halted && (p_qhd->p_qtd_list_head != NULL); } -bool hcd_pipe_is_stalled(uint8_t dev_addr, uint8_t ep_addr) +bool hcd_edpt_stalled(uint8_t dev_addr, uint8_t ep_addr) { ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); return p_qhd->qtd_overlay.halted && !qhd_has_xact_error(p_qhd); } -bool hcd_pipe_clear_stall(uint8_t dev_addr, uint8_t ep_addr) +bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) { ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); p_qhd->qtd_overlay.halted = 0; diff --git a/src/host/hcd.h b/src/host/hcd.h index 9b7b99321..257a7da59 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -131,8 +131,14 @@ void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t ev bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]); bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); +bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr); +bool hcd_edpt_stalled(uint8_t dev_addr, uint8_t ep_addr); +bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr); + +// TODO remove bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr); bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen); + //--------------------------------------------------------------------+ // PIPE API //--------------------------------------------------------------------+ @@ -141,10 +147,6 @@ bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], ui bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete); bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr); // TODO remove -bool hcd_pipe_is_busy(uint8_t dev_addr, uint8_t ep_addr); -bool hcd_pipe_is_stalled(uint8_t dev_addr, uint8_t ep_addr); // stalled also counted as error -bool hcd_pipe_clear_stall(uint8_t dev_addr, uint8_t ep_addr); - #if 0 tusb_error_t hcd_pipe_cancel()ATTR_WARN_UNUSED_RESULT; #endif diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index 37de86c60..4c54c5eaa 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -583,19 +583,19 @@ tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) return TUSB_ERROR_FAILED; } -bool hcd_pipe_is_busy(pipe_handle_t pipe_hdl) +bool hcd_edpt_busy(pipe_handle_t pipe_hdl) { ohci_ed_t const * const p_ed = ed_from_pipe_handle(pipe_hdl); return tu_align16(p_ed->td_head.address) != tu_align16(p_ed->td_tail.address); } -bool hcd_pipe_is_stalled(pipe_handle_t pipe_hdl) +bool hcd_edpt_stalled(pipe_handle_t pipe_hdl) { ohci_ed_t const * const p_ed = ed_from_pipe_handle(pipe_hdl); return p_ed->td_head.halted && p_ed->is_stalled; } -tusb_error_t hcd_pipe_clear_stall(pipe_handle_t pipe_hdl) +tusb_error_t hcd_edpt_clear_stall(pipe_handle_t pipe_hdl) { ohci_ed_t * const p_ed = ed_from_pipe_handle(pipe_hdl); diff --git a/tests/lpc18xx_43xx/test/host/hid/test_hidh_keyboard.c b/tests/lpc18xx_43xx/test/host/hid/test_hidh_keyboard.c index 49bb26342..e5f33574a 100644 --- a/tests/lpc18xx_43xx/test/host/hid/test_hidh_keyboard.c +++ b/tests/lpc18xx_43xx/test/host/hid/test_hidh_keyboard.c @@ -187,7 +187,7 @@ void test_keyboard_get_device_not_ready(void) void test_keyboard_get_report_xfer_failed() { tusbh_device_get_state_IgnoreAndReturn(TUSB_DEVICE_STATE_CONFIGURED); - hcd_pipe_is_busy_ExpectAndReturn(p_hidh_kbd->pipe_hdl, false); + hcd_edpt_busy_ExpectAndReturn(p_hidh_kbd->pipe_hdl, false); hcd_pipe_xfer_ExpectAndReturn(p_hidh_kbd->pipe_hdl, (uint8_t*) &report, p_hidh_kbd->report_size, true, TUSB_ERROR_INVALID_PARA); //------------- Code Under TEST -------------// @@ -197,7 +197,7 @@ void test_keyboard_get_report_xfer_failed() void test_keyboard_get_report_xfer_failed_busy() { tusbh_device_get_state_IgnoreAndReturn(TUSB_DEVICE_STATE_CONFIGURED); - hcd_pipe_is_busy_ExpectAndReturn(p_hidh_kbd->pipe_hdl, true); + hcd_edpt_busy_ExpectAndReturn(p_hidh_kbd->pipe_hdl, true); TEST_ASSERT_EQUAL(TUSB_ERROR_INTERFACE_IS_BUSY, tusbh_hid_keyboard_get_report(dev_addr, &report)); } @@ -206,7 +206,7 @@ void test_keyboard_get_ok() { tusbh_device_get_state_IgnoreAndReturn(TUSB_DEVICE_STATE_CONFIGURED); // TEST_ASSERT_EQUAL(TUSB_INTERFACE_STATUS_READY, tusbh_hid_keyboard_status(dev_addr)); - hcd_pipe_is_busy_ExpectAndReturn(p_hidh_kbd->pipe_hdl, false); + hcd_edpt_busy_ExpectAndReturn(p_hidh_kbd->pipe_hdl, false); hcd_pipe_xfer_ExpectAndReturn(p_hidh_kbd->pipe_hdl, (uint8_t*) &report, p_hidh_kbd->report_size, true, TUSB_ERROR_NONE); //------------- Code Under TEST -------------// diff --git a/tests/lpc18xx_43xx/test/host/hid/test_hidh_mouse.c b/tests/lpc18xx_43xx/test/host/hid/test_hidh_mouse.c index bf71a7438..9aca982b8 100644 --- a/tests/lpc18xx_43xx/test/host/hid/test_hidh_mouse.c +++ b/tests/lpc18xx_43xx/test/host/hid/test_hidh_mouse.c @@ -159,7 +159,7 @@ void test_mouse_get_device_not_ready(void) void test_mouse_get_report_xfer_failed() { tusbh_device_get_state_IgnoreAndReturn(TUSB_DEVICE_STATE_CONFIGURED); - hcd_pipe_is_busy_ExpectAndReturn(p_hidh_mouse->pipe_hdl, false); + hcd_edpt_busy_ExpectAndReturn(p_hidh_mouse->pipe_hdl, false); hcd_pipe_xfer_ExpectAndReturn(p_hidh_mouse->pipe_hdl, (uint8_t*) &report, p_hidh_mouse->report_size, true, TUSB_ERROR_INVALID_PARA); //------------- Code Under TEST -------------// @@ -169,7 +169,7 @@ void test_mouse_get_report_xfer_failed() void test_mouse_get_report_xfer_failed_busy() { tusbh_device_get_state_IgnoreAndReturn(TUSB_DEVICE_STATE_CONFIGURED); - hcd_pipe_is_busy_ExpectAndReturn(p_hidh_mouse->pipe_hdl, true); + hcd_edpt_busy_ExpectAndReturn(p_hidh_mouse->pipe_hdl, true); TEST_ASSERT_EQUAL(TUSB_ERROR_INTERFACE_IS_BUSY, tusbh_hid_mouse_get_report(dev_addr, &report)); } @@ -178,7 +178,7 @@ void test_mouse_get_ok() { tusbh_device_get_state_IgnoreAndReturn(TUSB_DEVICE_STATE_CONFIGURED); // TEST_ASSERT_EQUAL(TUSB_INTERFACE_STATUS_READY, tusbh_hid_mouse_status(dev_addr)); - hcd_pipe_is_busy_ExpectAndReturn(p_hidh_mouse->pipe_hdl, false); + hcd_edpt_busy_ExpectAndReturn(p_hidh_mouse->pipe_hdl, false); hcd_pipe_xfer_ExpectAndReturn(p_hidh_mouse->pipe_hdl, (uint8_t*) &report, p_hidh_mouse->report_size, true, TUSB_ERROR_NONE); //------------- Code Under TEST -------------// -- cgit v1.3.1 From 600fac1845abec7630adda4dc7487f7711a58300 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 11 Dec 2018 16:18:56 +0700 Subject: fix build error with ohci --- src/class/cdc/cdc_host.c | 1 + src/common/tusb_types.h | 4 +- src/host/ohci/ohci.c | 245 +++++++++++++++++------------------------------ src/host/ohci/ohci.h | 28 +++--- src/host/usbh.c | 2 +- 5 files changed, 101 insertions(+), 179 deletions(-) (limited to 'src/host') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index df07e0683..53f62d684 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -226,6 +226,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it void cdch_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) { + (void) ep_addr; tuh_cdc_xfer_isr( dev_addr, event, 0, xferred_bytes ); } diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 6ba713084..8be1e87f6 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -392,9 +392,9 @@ static inline uint8_t edpt_number(uint8_t addr) return addr & (~TUSB_DIR_IN_MASK); } -static inline uint8_t edpt_addr(uint8_t num, tusb_dir_t dir) +static inline uint8_t edpt_addr(uint8_t num, uint8_t dir) { - return num | (dir == TUSB_DIR_IN ? TUSB_DIR_IN_MASK : 0); + return num | (dir ? TUSB_DIR_IN_MASK : 0); } //--------------------------------------------------------------------+ diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index 4c54c5eaa..5593cd55d 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -136,7 +136,7 @@ enum { //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION ATTR_ALIGNED(256) STATIC_VAR ohci_data_t ohci_data; +CFG_TUSB_MEM_SECTION ATTR_ALIGNED(256) static ohci_data_t ohci_data; static ohci_ed_t * const p_ed_head[] = { @@ -216,11 +216,11 @@ tusb_speed_t hcd_port_speed_get(uint8_t hostid) return OHCI_REG->rhport_status_bit[0].low_speed_device_attached ? TUSB_SPEED_LOW : TUSB_SPEED_FULL; } -// TODO refractor abtract later -void hcd_port_unplug(uint8_t hostid) +void hcd_device_remove(uint8_t rhport, uint8_t dev_addr) { // TODO OHCI - (void) hostid; + (void) rhport; + (void) dev_addr; } //--------------------------------------------------------------------+ @@ -273,67 +273,6 @@ static void gtd_init(ohci_gtd_t* p_td, void* data_ptr, uint16_t total_bytes) p_td->buffer_end = total_bytes ? (((uint8_t*) data_ptr) + total_bytes-1) : NULL; } - -bool hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) -{ - ohci_ed_t* p_ed = &ohci_data.control[dev_addr].ed; - - ed_init(p_ed, dev_addr, max_packet_size, 0, TUSB_XFER_CONTROL, 0); // TODO binterval of control is ignored - - if ( dev_addr != 0 ) - { // insert to control head - ed_list_insert( p_ed_head[TUSB_XFER_CONTROL], p_ed); - }else - { - p_ed->skip = 0; // addr0 is used as static control head --> only need to clear skip bit - } - - return true; -} - -//bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[]) -//{ -// ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed; -// -// ohci_gtd_t *p_setup = &ohci_data.control[dev_addr].gtd[0]; -// ohci_gtd_t *p_data = p_setup + 1; -// ohci_gtd_t *p_status = p_setup + 2; -// -// //------------- SETUP Phase -------------// -// gtd_init(p_setup, (void*) p_request, 8); -// p_setup->index = dev_addr; -// p_setup->pid = OHCI_PID_SETUP; -// p_setup->data_toggle = BIN8(10); // DATA0 -// p_setup->next_td = (uint32_t) p_data; -// -// //------------- DATA Phase -------------// -// if (p_request->wLength > 0) -// { -// gtd_init(p_data, data, p_request->wLength); -// p_data->index = dev_addr; -// p_data->pid = p_request->bmRequestType_bit.direction ? OHCI_PID_IN : OHCI_PID_OUT; -// p_data->data_toggle = BIN8(11); // DATA1 -// }else -// { -// p_data = p_setup; -// } -// p_data->next_td = (uint32_t) p_status; -// -// //------------- STATUS Phase -------------// -// gtd_init(p_status, NULL, 0); // zero-length data -// p_status->index = dev_addr; -// p_status->pid = p_request->bmRequestType_bit.direction ? OHCI_PID_OUT : OHCI_PID_IN; // reverse direction of data phase -// p_status->data_toggle = BIN8(11); // DATA1 -// p_status->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; -// -// //------------- Attach TDs list to Control Endpoint -------------// -// p_ed->td_head.address = (uint32_t) p_setup; -// -// OHCI_REG->command_status_bit.control_list_filled = 1; -// -// return true; -//} - bool hcd_pipe_control_close(uint8_t dev_addr) { ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed; @@ -352,13 +291,6 @@ bool hcd_pipe_control_close(uint8_t dev_addr) return true; } -bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* ep_desc) -{ - // FIXME control only for now - (void) rhport; - return hcd_pipe_control_open(dev_addr, ep_desc->wMaxPacketSize.size); -} - bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) { // FIXME control only for now @@ -373,7 +305,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet (void) rhport; ohci_ed_t* p_ed = &ohci_data.control[dev_addr].ed; - ohci_gtd_t *p_setup = &ohci_data.control[dev_addr].gtd[0]; + ohci_gtd_t *p_setup = &ohci_data.control[dev_addr].gtd; gtd_init(p_setup, (void*) setup_packet, 8); p_setup->index = dev_addr; @@ -400,7 +332,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * if ( epnum == 0 ) { ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed; - ohci_gtd_t *p_data = &ohci_data.control[dev_addr].gtd[0]; + ohci_gtd_t *p_data = &ohci_data.control[dev_addr].gtd; gtd_init(p_data, buffer, buflen); @@ -420,27 +352,31 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * //--------------------------------------------------------------------+ // BULK/INT/ISO PIPE API //--------------------------------------------------------------------+ -static inline uint8_t ed_get_index(ohci_ed_t const * const p_ed) ATTR_PURE ATTR_ALWAYS_INLINE; -static inline uint8_t ed_get_index(ohci_ed_t const * const p_ed) +static inline ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr) { - return p_ed - ohci_data.device[p_ed->device_address-1].ed; -} + if ( edpt_number(ep_addr) == 0 ) return &ohci_data.control[dev_addr].ed; -static inline ohci_ed_t * ed_from_pipe_handle(pipe_handle_t pipe_hdl) ATTR_PURE ATTR_ALWAYS_INLINE; -static inline ohci_ed_t * ed_from_pipe_handle(pipe_handle_t pipe_hdl) -{ - return &ohci_data.device[pipe_hdl.dev_addr-1].ed[pipe_hdl.index]; + ohci_ed_t* ed_pool = ohci_data.ed_pool; + + for(uint32_t i=0; iused = 0; // free ED } -pipe_handle_t hcd_edpt_open(uint8_t dev_addr, tusb_desc_endpoint_t const * p_endpoint_desc, uint8_t class_code) +bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) { - pipe_handle_t const null_handle = { .dev_addr = 0, .xfer_type = 0, .index = 0 }; + (void) rhport; // TODO iso support - TU_ASSERT(p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS, null_handle ); + TU_ASSERT(ep_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS); //------------- Prepare Queue Head -------------// - ohci_ed_t * const p_ed = ed_find_free(dev_addr); - TU_ASSERT(p_ed, null_handle); + ohci_ed_t * p_ed; - ed_init( p_ed, dev_addr, p_endpoint_desc->wMaxPacketSize.size, p_endpoint_desc->bEndpointAddress, - p_endpoint_desc->bmAttributes.xfer, p_endpoint_desc->bInterval ); - p_ed->td_tail.class_code = class_code; + if ( ep_desc->bEndpointAddress == 0 ) + { + p_ed = &ohci_data.control[dev_addr].ed; + }else + { + p_ed = ed_find_free(); + } + TU_ASSERT(p_ed); - ed_list_insert( p_ed_head[p_endpoint_desc->bmAttributes.xfer], p_ed ); + ed_init( p_ed, dev_addr, ep_desc->wMaxPacketSize.size, ep_desc->bEndpointAddress, + ep_desc->bmAttributes.xfer, ep_desc->bInterval ); - return (pipe_handle_t) + // control of dev0 is used as static async head + if ( dev_addr == 0 ) { - .dev_addr = dev_addr, - .xfer_type = p_endpoint_desc->bmAttributes.xfer, - .index = ed_get_index(p_ed) - }; + p_ed->skip = 0; // only need to clear skip bit + return true; + } + + ed_list_insert( p_ed_head[ep_desc->bmAttributes.xfer], p_ed ); + + return true; } -static ohci_gtd_t * gtd_find_free(uint8_t dev_addr) +static ohci_gtd_t * gtd_find_free(void) { for(uint8_t i=0; i < HCD_MAX_XFER; i++) { - if (!ohci_data.device[dev_addr-1].gtd[i].used) - { - return &ohci_data.device[dev_addr-1].gtd[i]; - } + if ( !ohci_data.gtd_pool[i].used ) return &ohci_data.gtd_pool[i]; } return NULL; @@ -532,72 +474,71 @@ static void td_insert_to_ed(ohci_ed_t* p_ed, ohci_gtd_t * p_gtd) } } -static tusb_error_t pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) +static bool pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) { - ohci_ed_t* const p_ed = ed_from_pipe_handle(pipe_hdl); + ohci_ed_t* const p_ed = ed_from_addr(dev_addr, ep_addr); - if ( !p_ed->is_iso ) - { - ohci_gtd_t * const p_gtd = gtd_find_free(pipe_hdl.dev_addr); - TU_ASSERT(p_gtd, TUSB_ERROR_EHCI_NOT_ENOUGH_QTD); // TODO refractor error code + // not support ISO yet + TU_VERIFY ( !p_ed->is_iso ); - gtd_init(p_gtd, buffer, total_bytes); - p_gtd->index = pipe_hdl.index; - if ( int_on_complete ) p_gtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; + ohci_gtd_t * const p_gtd = gtd_find_free(); + TU_ASSERT(p_gtd); // not enough gtd - td_insert_to_ed(p_ed, p_gtd); - }else - { - TU_ASSERT_ERR(TUSB_ERROR_NOT_SUPPORTED_YET); - } + gtd_init(p_gtd, buffer, total_bytes); + p_gtd->index = p_ed-ohci_data.ed_pool; + + if ( int_on_complete ) p_gtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; + + td_insert_to_ed(p_ed, p_gtd); - return TUSB_ERROR_NONE; + return true; } -tusb_error_t hcd_pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) +bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes) { - return pipe_queue_xfer(pipe_hdl, buffer, total_bytes, false); + return pipe_queue_xfer(dev_addr, ep_addr, buffer, total_bytes, false); } -tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) +bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) { (void) int_on_complete; - TU_ASSERT_ERR( pipe_queue_xfer(pipe_hdl, buffer, total_bytes, true) ); + TU_ASSERT( pipe_queue_xfer(dev_addr, ep_addr, buffer, total_bytes, true) ); - tusb_xfer_type_t xfer_type = ed_get_xfer_type( ed_from_pipe_handle(pipe_hdl) ); + tusb_xfer_type_t xfer_type = ed_get_xfer_type( ed_from_addr(dev_addr, ep_addr) ); if (TUSB_XFER_BULK == xfer_type) OHCI_REG->command_status_bit.bulk_list_filled = 1; - return TUSB_ERROR_NONE; + return true; } /// pipe_close should only be called as a part of unmount/safe-remove process // endpoints are tied to an address, which only reclaim after a long delay when enumerating // thus there is no need to make sure ED is not in HC's cahed as it will not for sure -tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) +bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) { - ohci_ed_t * const p_ed = ed_from_pipe_handle(pipe_hdl); + (void) rhport; + ohci_ed_t * const p_ed = ed_from_addr(dev_addr, ep_addr); ed_list_remove( p_ed_head[ ed_get_xfer_type(p_ed)], p_ed ); - return TUSB_ERROR_FAILED; + return true; } -bool hcd_edpt_busy(pipe_handle_t pipe_hdl) +bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) { - ohci_ed_t const * const p_ed = ed_from_pipe_handle(pipe_hdl); + ohci_ed_t const * const p_ed = ed_from_addr(dev_addr, ep_addr); return tu_align16(p_ed->td_head.address) != tu_align16(p_ed->td_tail.address); } -bool hcd_edpt_stalled(pipe_handle_t pipe_hdl) +bool hcd_edpt_stalled(uint8_t dev_addr, uint8_t ep_addr) { - ohci_ed_t const * const p_ed = ed_from_pipe_handle(pipe_hdl); + ohci_ed_t const * const p_ed = ed_from_addr(dev_addr, ep_addr); return p_ed->td_head.halted && p_ed->is_stalled; } -tusb_error_t hcd_edpt_clear_stall(pipe_handle_t pipe_hdl) +bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) { - ohci_ed_t * const p_ed = ed_from_pipe_handle(pipe_hdl); + ohci_ed_t * const p_ed = ed_from_addr(dev_addr, ep_addr); p_ed->is_stalled = 0; p_ed->td_tail.address &= 0x0Ful; // set tail pointer back to NULL @@ -607,7 +548,7 @@ tusb_error_t hcd_edpt_clear_stall(pipe_handle_t pipe_hdl) if ( TUSB_XFER_BULK == ed_get_xfer_type(p_ed) ) OHCI_REG->command_status_bit.bulk_list_filled = 1; - return TUSB_ERROR_NONE; + return true; } @@ -632,13 +573,11 @@ static ohci_td_item_t* list_reverse(ohci_td_item_t* td_head) return td_reverse_head; } -static inline bool gtd_is_control(ohci_gtd_t const * const p_qtd) ATTR_CONST ATTR_ALWAYS_INLINE; static inline bool gtd_is_control(ohci_gtd_t const * const p_qtd) { - return ((uint32_t) p_qtd) < ((uint32_t) ohci_data.device); // check ohci_data_t for memory layout + return ((uint32_t) p_qtd) < ((uint32_t) ohci_data.gtd_pool); // check ohci_data_t for memory layout } -static inline ohci_ed_t* gtd_get_ed(ohci_gtd_t const * const p_qtd) ATTR_PURE ATTR_ALWAYS_INLINE; static inline ohci_ed_t* gtd_get_ed(ohci_gtd_t const * const p_qtd) { if ( gtd_is_control(p_qtd) ) @@ -646,13 +585,10 @@ static inline ohci_ed_t* gtd_get_ed(ohci_gtd_t const * const p_qtd) return &ohci_data.control[p_qtd->index].ed; }else { - uint8_t dev_addr_idx = (((uint32_t)p_qtd) - ((uint32_t)ohci_data.device)) / sizeof(ohci_data.device[0]); - - return &ohci_data.device[dev_addr_idx].ed[p_qtd->index]; + return &ohci_data.ed_pool[p_qtd->index]; } } -static inline uint32_t gtd_xfer_byte_left(uint32_t buffer_end, uint32_t current_buffer) ATTR_CONST ATTR_ALWAYS_INLINE; static inline uint32_t gtd_xfer_byte_left(uint32_t buffer_end, uint32_t current_buffer) { // 5.2.9 OHCI sample code return (tu_align4k(buffer_end ^ current_buffer) ? 0x1000 : 0) + @@ -663,18 +599,16 @@ static void done_queue_isr(uint8_t hostid) { (void) hostid; - uint8_t max_loop = (CFG_TUSB_HOST_DEVICE_MAX+1)*(HCD_MAX_XFER+OHCI_MAX_ITD); - // done head is written in reversed order of completion --> need to reverse the done queue first ohci_td_item_t* td_head = list_reverse ( (ohci_td_item_t*) tu_align16(ohci_data.hcca.done_head) ); - while( td_head != NULL && max_loop > 0) + while( td_head != NULL ) { // TODO check if td_head is iso td //------------- Non ISO transfer -------------// ohci_gtd_t * const p_qtd = (ohci_gtd_t *) td_head; xfer_result_t const event = (p_qtd->condition_code == OHCI_CCODE_NO_ERROR) ? XFER_RESULT_SUCCESS : - (p_qtd->condition_code == OHCI_CCODE_STALL) ? XFER_RESULT_STALLED : XFER_RESULT_FAILED; + (p_qtd->condition_code == OHCI_CCODE_STALL) ? XFER_RESULT_STALLED : XFER_RESULT_FAILED; p_qtd->used = 0; // free TD if ( (p_qtd->delay_interrupt == OHCI_INT_ON_COMPLETE_YES) || (event != XFER_RESULT_SUCCESS) ) @@ -697,19 +631,12 @@ static void done_queue_isr(uint8_t hostid) if ( event == XFER_RESULT_STALLED ) p_ed->is_stalled = 1; } - pipe_handle_t pipe_hdl = - { - .dev_addr = p_ed->device_address, - .xfer_type = ed_get_xfer_type(p_ed), - }; - - if ( pipe_hdl.xfer_type != TUSB_XFER_CONTROL) pipe_hdl.index = ed_get_index(p_ed); - - hcd_event_xfer_complete(pipe_hdl, p_ed->td_tail.class_code, event, xferred_bytes); + hcd_event_xfer_complete(p_ed->device_address, + edpt_addr(p_ed->endpoint_number, p_ed->direction == OHCI_PID_IN), + event, xferred_bytes); } td_head = (ohci_td_item_t*) td_head->next_td; - max_loop--; } } diff --git a/src/host/ohci/ohci.h b/src/host/ohci/ohci.h index c407b8ac1..f68500703 100644 --- a/src/host/ohci/ohci.h +++ b/src/host/ohci/ohci.h @@ -88,8 +88,9 @@ typedef struct { }ohci_td_item_t; -typedef struct ATTR_ALIGNED(16) { - //------------- Word 0 -------------// +typedef struct ATTR_ALIGNED(16) +{ + // Word 0 uint32_t used : 1; uint32_t index : 4; // endpoint index the td belongs to, or device address in case of control xfer uint32_t expected_bytes : 13; // TODO available for hcd @@ -100,15 +101,14 @@ typedef struct ATTR_ALIGNED(16) { volatile uint32_t data_toggle : 2; volatile uint32_t error_count : 2; volatile uint32_t condition_code : 4; - /*---------- End Word 1 ----------*/ - //------------- Word 1 -------------// + // Word 1 volatile uint8_t* current_buffer_pointer; - //------------- Word 2 -------------// + // Word 2 volatile uint32_t next_td; - //------------- Word 3 -------------// + // Word 3 uint8_t* buffer_end; } ohci_gtd_t; @@ -132,11 +132,7 @@ typedef struct ATTR_ALIGNED(16) { //------------- Word 1 -------------// union { - uint32_t address; // 4 lsb bits are free to use - struct { - uint32_t class_code : 4; // FIXME refractor to use interface number instead - uint32_t : 28; - }; + uint32_t address; }td_tail; //------------- Word 2 -------------// @@ -190,14 +186,12 @@ typedef struct ATTR_ALIGNED(256) { // control endpoints has reserved resources struct { ohci_ed_t ed; - ohci_gtd_t gtd[3]; // setup, data, status + ohci_gtd_t gtd; }control[CFG_TUSB_HOST_DEVICE_MAX+1]; - struct { - // ochi_itd_t itd[OHCI_MAX_ITD]; // itd requires alignment of 32 - ohci_ed_t ed[HCD_MAX_ENDPOINT]; - ohci_gtd_t gtd[HCD_MAX_XFER]; - }device[CFG_TUSB_HOST_DEVICE_MAX]; + // ochi_itd_t itd[OHCI_MAX_ITD]; // itd requires alignment of 32 + ohci_ed_t ed_pool[HCD_MAX_ENDPOINT]; + ohci_gtd_t gtd_pool[HCD_MAX_XFER]; } ohci_data_t; diff --git a/src/host/usbh.c b/src/host/usbh.c index ff4343fd2..456eff531 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -515,7 +515,7 @@ bool enum_task(hcd_event_t* event) new_dev->speed = dev0->speed; new_dev->state = TUSB_DEVICE_STATE_ADDRESSED; - usbh_pipe_control_close(0); + usbh_pipe_control_close(0); // hcd_device_remove(rhport, 0); // close device 0 dev0->state = TUSB_DEVICE_STATE_UNPLUG; // open control pipe for new address -- cgit v1.3.1 From d05021009b20ff027fda5a719091cfb6193bd651 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 11 Dec 2018 16:29:43 +0700 Subject: more ohci clean up --- src/host/ohci/ohci.c | 56 ++++++++++++++++++++++++++-------------------------- src/host/ohci/ohci.h | 48 +++++++++++++++++++++----------------------- 2 files changed, 51 insertions(+), 53 deletions(-) (limited to 'src/host') diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index 5593cd55d..645315b38 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -232,7 +232,7 @@ void hcd_device_remove(uint8_t rhport, uint8_t dev_addr) //--------------------------------------------------------------------+ static inline tusb_xfer_type_t ed_get_xfer_type(ohci_ed_t const * const p_ed) { - return (p_ed->endpoint_number == 0 ) ? TUSB_XFER_CONTROL : + return (p_ed->ep_number == 0 ) ? TUSB_XFER_CONTROL : (p_ed->is_iso ) ? TUSB_XFER_ISOCHRONOUS : (p_ed->is_interrupt_xfer ) ? TUSB_XFER_INTERRUPT : TUSB_XFER_BULK; } @@ -247,12 +247,12 @@ static void ed_init(ohci_ed_t *p_ed, uint8_t dev_addr, uint16_t max_packet_size, tu_memclr(p_ed, sizeof(ohci_ed_t)); } - p_ed->device_address = dev_addr; - p_ed->endpoint_number = endpoint_addr & 0x0F; - p_ed->direction = (xfer_type == TUSB_XFER_CONTROL) ? OHCI_PID_SETUP : ( (endpoint_addr & TUSB_DIR_IN_MASK) ? OHCI_PID_IN : OHCI_PID_OUT ); + p_ed->dev_addr = dev_addr; + p_ed->ep_number = endpoint_addr & 0x0F; + p_ed->pid = (xfer_type == TUSB_XFER_CONTROL) ? OHCI_PID_SETUP : ( (endpoint_addr & TUSB_DIR_IN_MASK) ? OHCI_PID_IN : OHCI_PID_OUT ); p_ed->speed = _usbh_devices[dev_addr].speed; p_ed->is_iso = (xfer_type == TUSB_XFER_ISOCHRONOUS) ? 1 : 0; - p_ed->max_package_size = max_packet_size; + p_ed->max_packet_size = max_packet_size; p_ed->used = 1; p_ed->is_interrupt_xfer = (xfer_type == TUSB_XFER_INTERRUPT ? 1 : 0); @@ -360,8 +360,8 @@ static inline ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr) for(uint32_t i=0; inext_ed) != 0 && /* not reach null */ - tu_align16(p_prev->next_ed) != (uint32_t) p_ed && /* not found yet */ + while ( tu_align16(p_prev->next) != 0 && /* not reach null */ + tu_align16(p_prev->next) != (uint32_t) p_ed && /* not found yet */ max_loop > 0) { - p_prev = (ohci_ed_t const *) tu_align16(p_prev->next_ed); + p_prev = (ohci_ed_t const *) tu_align16(p_prev->next); max_loop--; } - return ( tu_align16(p_prev->next_ed) == (uint32_t) p_ed ) ? (ohci_ed_t*) p_prev : NULL; + return ( tu_align16(p_prev->next) == (uint32_t) p_ed ) ? (ohci_ed_t*) p_prev : NULL; } static void ed_list_insert(ohci_ed_t * p_pre, ohci_ed_t * p_ed) { - p_ed->next_ed |= p_pre->next_ed; // to reserve 4 lsb bits - p_pre->next_ed = (p_pre->next_ed & 0x0FUL) | ((uint32_t) p_ed); + p_ed->next |= p_pre->next; // to reserve 4 lsb bits + p_pre->next = (p_pre->next & 0x0FUL) | ((uint32_t) p_ed); } static void ed_list_remove(ohci_ed_t * p_head, ohci_ed_t * p_ed) { ohci_ed_t * const p_prev = ed_list_find_previous(p_head, p_ed); - p_prev->next_ed = (p_prev->next_ed & 0x0fUL) | tu_align16(p_ed->next_ed); + p_prev->next = (p_prev->next & 0x0fUL) | tu_align16(p_ed->next); // point the removed ED's next pointer to list head to make sure HC can always safely move away from this ED - p_ed->next_ed = (uint32_t) p_head; + p_ed->next = (uint32_t) p_head; p_ed->used = 0; // free ED } @@ -470,7 +470,7 @@ static void td_insert_to_ed(ohci_ed_t* p_ed, ohci_gtd_t * p_gtd) } else { // TODO currently only support queue up to 2 TD each endpoint at a time - ((ohci_gtd_t*) tu_align16(p_ed->td_head.address))->next_td = (uint32_t) p_gtd; + ((ohci_gtd_t*) tu_align16(p_ed->td_head.address))->next = (uint32_t) p_gtd; } } @@ -527,7 +527,7 @@ bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) { ohci_ed_t const * const p_ed = ed_from_addr(dev_addr, ep_addr); - return tu_align16(p_ed->td_head.address) != tu_align16(p_ed->td_tail.address); + return tu_align16(p_ed->td_head.address) != tu_align16(p_ed->td_tail); } bool hcd_edpt_stalled(uint8_t dev_addr, uint8_t ep_addr) @@ -540,11 +540,11 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) { ohci_ed_t * const p_ed = ed_from_addr(dev_addr, ep_addr); - p_ed->is_stalled = 0; - p_ed->td_tail.address &= 0x0Ful; // set tail pointer back to NULL + p_ed->is_stalled = 0; + p_ed->td_tail &= 0x0Ful; // set tail pointer back to NULL - p_ed->td_head.toggle = 0; // reset data toggle - p_ed->td_head.halted = 0; + p_ed->td_head.toggle = 0; // reset data toggle + p_ed->td_head.halted = 0; if ( TUSB_XFER_BULK == ed_get_xfer_type(p_ed) ) OHCI_REG->command_status_bit.bulk_list_filled = 1; @@ -561,10 +561,10 @@ static ohci_td_item_t* list_reverse(ohci_td_item_t* td_head) while(td_head != NULL) { - uint32_t next = td_head->next_td; + uint32_t next = td_head->next; // make current's item become reverse's first item - td_head->next_td = (uint32_t) td_reverse_head; + td_head->next = (uint32_t) td_reverse_head; td_reverse_head = td_head; td_head = (ohci_td_item_t*) next; // advance to next item @@ -626,17 +626,17 @@ static void done_queue_isr(uint8_t hostid) // the TailP must be set back to NULL for processing remaining TDs if ((event != XFER_RESULT_SUCCESS)) { - p_ed->td_tail.address &= 0x0Ful; - p_ed->td_tail.address |= tu_align16(p_ed->td_head.address); // mark halted EP as empty queue + p_ed->td_tail &= 0x0Ful; + p_ed->td_tail |= tu_align16(p_ed->td_head.address); // mark halted EP as empty queue if ( event == XFER_RESULT_STALLED ) p_ed->is_stalled = 1; } - hcd_event_xfer_complete(p_ed->device_address, - edpt_addr(p_ed->endpoint_number, p_ed->direction == OHCI_PID_IN), + hcd_event_xfer_complete(p_ed->dev_addr, + edpt_addr(p_ed->ep_number, p_ed->pid == OHCI_PID_IN), event, xferred_bytes); } - td_head = (ohci_td_item_t*) td_head->next_td; + td_head = (ohci_td_item_t*) td_head->next; } } diff --git a/src/host/ohci/ohci.h b/src/host/ohci/ohci.h index f68500703..cbd2047d8 100644 --- a/src/host/ohci/ohci.h +++ b/src/host/ohci/ohci.h @@ -83,7 +83,7 @@ TU_VERIFY_STATIC( sizeof(ohci_hcca_t) == 256, "size is not correct" ); typedef struct { uint32_t reserved[2]; - volatile uint32_t next_td; + volatile uint32_t next; uint32_t reserved2; }ohci_td_item_t; @@ -105,8 +105,8 @@ typedef struct ATTR_ALIGNED(16) // Word 1 volatile uint8_t* current_buffer_pointer; - // Word 2 - volatile uint32_t next_td; + // Word 2 : next TD + volatile uint32_t next; // Word 3 uint8_t* buffer_end; @@ -114,28 +114,26 @@ typedef struct ATTR_ALIGNED(16) TU_VERIFY_STATIC( sizeof(ohci_gtd_t) == 16, "size is not correct" ); -typedef struct ATTR_ALIGNED(16) { - //------------- Word 0 -------------// - uint32_t device_address : 7; - uint32_t endpoint_number : 4; - uint32_t direction : 2; - uint32_t speed : 1; - uint32_t skip : 1; - uint32_t is_iso : 1; - uint32_t max_package_size : 11; - - uint32_t used : 1; // HCD +typedef struct ATTR_ALIGNED(16) +{ + // Word 0 + uint32_t dev_addr : 7; + uint32_t ep_number : 4; + uint32_t pid : 2; // 00b from TD, 01b Out, 10b In + uint32_t speed : 1; + uint32_t skip : 1; + uint32_t is_iso : 1; + uint32_t max_packet_size : 11; + // HCD: make use of 5 reserved bits + uint32_t used : 1; uint32_t is_interrupt_xfer : 1; uint32_t is_stalled : 1; uint32_t : 2; + // Word 1 + uint32_t td_tail; - //------------- Word 1 -------------// - union { - uint32_t address; - }td_tail; - - //------------- Word 2 -------------// + // Word 2 volatile union { uint32_t address; struct { @@ -145,13 +143,14 @@ typedef struct ATTR_ALIGNED(16) { }; }td_head; - //------------- Word 3 -------------// - uint32_t next_ed; // 4 lsb bits are free to use + // Word 3: next ED (4 lsb bits are free to use ) + uint32_t next; } ohci_ed_t; TU_VERIFY_STATIC( sizeof(ohci_ed_t) == 16, "size is not correct" ); -typedef struct ATTR_ALIGNED(32) { +typedef struct ATTR_ALIGNED(32) +{ /*---------- Word 1 ----------*/ uint32_t starting_frame : 16; uint32_t : 5; // can be used @@ -159,13 +158,12 @@ typedef struct ATTR_ALIGNED(32) { uint32_t frame_count : 3; uint32_t : 1; // can be used volatile uint32_t condition_code : 4; - /*---------- End Word 1 ----------*/ /*---------- Word 2 ----------*/ uint32_t buffer_page0; // 12 lsb bits can be used /*---------- Word 3 ----------*/ - volatile uint32_t next_td; + volatile uint32_t next; /*---------- Word 4 ----------*/ uint32_t buffer_end; -- cgit v1.3.1 From 364666c206f36ec00dcf1da2f0088c7c9e75c2ef Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 11 Dec 2018 17:05:56 +0700 Subject: ehci clean up --- src/host/ehci/ehci.c | 160 +++++++++++++++++++++++++-------------------------- src/host/ehci/ehci.h | 21 +++---- 2 files changed, 88 insertions(+), 93 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 3833a46d7..b37ed2098 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -64,16 +64,36 @@ CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4096) static ehci_data_t ehci_data; //------------- Validation -------------// // TODO static assert for memory placement on some known MCU such as lpc43xx +uint32_t hcd_ehci_register_addr(uint8_t rhport) +{ + return (uint32_t) (rhport ? &LPC_USB1->USBCMD_H : &LPC_USB0->USBCMD_H ); +} + //--------------------------------------------------------------------+ // PROTOTYPE //--------------------------------------------------------------------+ -static inline ehci_registers_t* get_operational_register(uint8_t hostid) ATTR_PURE ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT; +static inline ehci_link_t* get_period_head(uint8_t rhport, uint8_t interval_ms) +{ + (uint8_t) rhport; + return (ehci_link_t*) &ehci_data.period_head_arr[ tu_log2( tu_min8(EHCI_FRAMELIST_SIZE, interval_ms) ) ]; +} + +static inline ehci_qhd_t* qhd_control(uint8_t dev_addr) +{ + return &ehci_data.control[dev_addr].qhd; +} -static inline ehci_qhd_t* get_async_head(uint8_t hostid) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT; -static inline ehci_link_t* get_period_head(uint8_t hostid, uint8_t interval_ms) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT; +static inline ehci_qhd_t* qhd_async_head(uint8_t rhport) +{ + (void) rhport; + return qhd_control(0); // control qhd of dev0 is used as async head +} + +static inline ehci_qtd_t* qtd_control(uint8_t dev_addr) +{ + return &ehci_data.control[dev_addr].qtd; +} -static inline ehci_qhd_t* get_control_qhd(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT; -static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT; static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; static inline ehci_qhd_t* qhd_find_free (void); @@ -98,12 +118,12 @@ static void qtd_init(ehci_qtd_t* p_qtd, uint32_t data_ptr, uint16_t total_bytes) static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t new_type) ATTR_ALWAYS_INLINE; static inline ehci_link_t* list_next(ehci_link_t *p_link_pointer) ATTR_PURE ATTR_ALWAYS_INLINE; static ehci_link_t* list_find_previous_item(ehci_link_t* p_head, ehci_link_t* p_current); -static tusb_error_t list_remove_qhd(ehci_link_t* p_head, ehci_link_t* p_remove); +static bool list_remove_qhd(ehci_link_t* p_head, ehci_link_t* p_remove); static bool ehci_init(uint8_t hostid); //--------------------------------------------------------------------+ -// USBH-HCD API +// HCD API //--------------------------------------------------------------------+ bool hcd_init(void) { @@ -111,9 +131,6 @@ bool hcd_init(void) return ehci_init(TUH_OPT_RHPORT); } -//--------------------------------------------------------------------+ -// PORT API -//--------------------------------------------------------------------+ void hcd_port_reset(uint8_t hostid) { ehci_registers_t* regs = ehci_data.regs; @@ -138,30 +155,27 @@ void hcd_device_remove(uint8_t rhport, uint8_t dev_addr) ehci_data.regs->command_bm.async_adv_doorbell = 1; // Async doorbell check EHCI 4.8.2 for operational details } -//--------------------------------------------------------------------+ -// Controller API -//--------------------------------------------------------------------+ +// EHCI controller init static bool ehci_init(uint8_t hostid) { - ehci_data.regs = get_operational_register(hostid); + ehci_data.regs = (ehci_registers_t* ) hcd_ehci_register_addr(hostid); ehci_registers_t* regs = ehci_data.regs; //------------- CTRLDSSEGMENT Register (skip) -------------// //------------- USB INT Register -------------// - regs->inten = 0; // 1. disable all the interrupt - regs->status = EHCI_INT_MASK_ALL; // 2. clear all status + regs->inten = 0; // 1. disable all the interrupt + regs->status = EHCI_INT_MASK_ALL; // 2. clear all status - regs->inten = EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | - EHCI_INT_MASK_NXP_PERIODIC | - EHCI_INT_MASK_ASYNC_ADVANCE | EHCI_INT_MASK_NXP_ASYNC; + regs->inten = EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | EHCI_INT_MASK_ASYNC_ADVANCE | + EHCI_INT_MASK_NXP_PERIODIC | EHCI_INT_MASK_NXP_ASYNC ; //------------- Asynchronous List -------------// - ehci_qhd_t * const async_head = get_async_head(hostid); + ehci_qhd_t * const async_head = qhd_async_head(hostid); tu_memclr(async_head, sizeof(ehci_qhd_t)); async_head->next.address = (uint32_t) async_head; // circular list, next is itself - async_head->next.type = EHCI_QUEUE_ELEMENT_QHD; + async_head->next.type = EHCI_QTYPE_QHD; async_head->head_list_flag = 1; async_head->qtd_overlay.halted = 1; // inactive most of time async_head->qtd_overlay.next.terminate = 1; // TODO removed if verified @@ -188,20 +202,20 @@ static bool ehci_init(uint8_t hostid) for(uint32_t i=0; iterminate = 1; @@ -212,9 +226,9 @@ static bool ehci_init(uint8_t hostid) //------------- USB CMD Register -------------// regs->command |= BIT_(EHCI_USBCMD_POS_RUN_STOP) | BIT_(EHCI_USBCMD_POS_ASYNC_ENABLE) - | BIT_(EHCI_USBCMD_POS_PERIOD_ENABLE) // TODO enable period list only there is int/iso endpoint - | ((EHCI_CFG_FRAMELIST_SIZE_BITS & BIN8(011)) << EHCI_USBCMD_POS_FRAMELIST_SZIE) - | ((EHCI_CFG_FRAMELIST_SIZE_BITS >> 2) << EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB); + | BIT_(EHCI_USBCMD_POS_PERIOD_ENABLE) // TODO enable period list only there is int/iso endpoint + | ((EHCI_CFG_FRAMELIST_SIZE_BITS & BIN8(011)) << EHCI_USBCMD_POS_FRAMELIST_SZIE) + | ((EHCI_CFG_FRAMELIST_SIZE_BITS >> 2) << EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB); //------------- ConfigFlag Register (skip) -------------// regs->portsc_bm.port_power = 1; // enable port power @@ -241,14 +255,14 @@ static tusb_error_t hcd_controller_stop(uint8_t hostid) bool hcd_pipe_control_close(uint8_t dev_addr) { //------------- TODO pipe handle validate -------------// - ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); + ehci_qhd_t* p_qhd = qhd_control(dev_addr); p_qhd->is_removing = 1; if (dev_addr != 0) { - TU_ASSERT_ERR( list_remove_qhd( (ehci_link_t*) get_async_head( _usbh_devices[dev_addr].rhport ), - (ehci_link_t*) p_qhd) ); + TU_ASSERT( list_remove_qhd( (ehci_link_t*) qhd_async_head( _usbh_devices[dev_addr].rhport ), + (ehci_link_t*) p_qhd) ); } return true; @@ -268,8 +282,8 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * // FIXME control only for now if ( epnum == 0 ) { - ehci_qhd_t* qhd = get_control_qhd(dev_addr); - ehci_qtd_t* qtd = get_control_qtds(dev_addr); + ehci_qhd_t* qhd = qhd_control(dev_addr); + ehci_qtd_t* qtd = qtd_control(dev_addr); qtd_init(qtd, (uint32_t) buffer, buflen); @@ -292,8 +306,8 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) { - ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr); - ehci_qtd_t *p_setup = get_control_qtds(dev_addr); + ehci_qhd_t* p_qhd = qhd_control(dev_addr); + ehci_qtd_t* p_setup = qtd_control(dev_addr); qtd_init(p_setup, (uint32_t) setup_packet, 8); p_setup->pid = EHCI_PID_SETUP; @@ -323,7 +337,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const if ( ep_desc->bEndpointAddress == 0 ) { - p_qhd = get_control_qhd(dev_addr); + p_qhd = qhd_control(dev_addr); }else { p_qhd = qhd_find_free(); @@ -342,7 +356,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const { case TUSB_XFER_CONTROL: case TUSB_XFER_BULK: - list_head = (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].rhport); + list_head = (ehci_link_t*) qhd_async_head(_usbh_devices[dev_addr].rhport); break; case TUSB_XFER_INTERRUPT: @@ -357,7 +371,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const } // TODO might need to disable async/period list - list_insert( list_head, (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD); + list_insert( list_head, (ehci_link_t*) p_qhd, EHCI_QTYPE_QHD); return true; } @@ -404,17 +418,16 @@ bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) // period list queue element is guarantee to be free in the next frame (1 ms) p_qhd->is_removing = 1; // TODO redundant, only apply to control queue head - if ( p_qhd->xfer_type == TUSB_XFER_BULK ) + if ( p_qhd->int_smask == 0 ) { - TU_ASSERT_ERR( list_remove_qhd( - (ehci_link_t*) get_async_head( _usbh_devices[dev_addr].rhport ), - (ehci_link_t*) p_qhd), false ); + // Async list + TU_ASSERT( list_remove_qhd( (ehci_link_t*) qhd_async_head( _usbh_devices[dev_addr].rhport ), + (ehci_link_t*) p_qhd), false ); } else { - TU_ASSERT_ERR( list_remove_qhd( - get_period_head( _usbh_devices[dev_addr].rhport, p_qhd->interval_ms ), - (ehci_link_t*) p_qhd), false ); + TU_ASSERT( list_remove_qhd( get_period_head( _usbh_devices[dev_addr].rhport, p_qhd->interval_ms ), + (ehci_link_t*) p_qhd), false ); } return true; @@ -461,7 +474,8 @@ static void async_advance_isr(ehci_qhd_t * const async_head) for(uint8_t dev_addr=1; dev_addr < CFG_TUSB_HOST_DEVICE_MAX; dev_addr++) { // check if control endpoint is removing - ehci_qhd_t *p_control_qhd = get_control_qhd(dev_addr); + ehci_qhd_t *p_control_qhd = qhd_control(dev_addr); + if ( p_control_qhd->is_removing ) { p_control_qhd->is_removing = 0; @@ -552,7 +566,7 @@ static void period_list_xfer_complete_isr(uint8_t hostid, uint8_t interval_ms) { switch ( next_item.type ) { - case EHCI_QUEUE_ELEMENT_QHD: + case EHCI_QTYPE_QHD: { ehci_qhd_t *p_qhd_int = (ehci_qhd_t *) tu_align32(next_item.address); if ( !p_qhd_int->qtd_overlay.halted ) @@ -562,9 +576,9 @@ static void period_list_xfer_complete_isr(uint8_t hostid, uint8_t interval_ms) } break; - case EHCI_QUEUE_ELEMENT_ITD: // TODO support hs/fs ISO - case EHCI_QUEUE_ELEMENT_SITD: - case EHCI_QUEUE_ELEMENT_FSTN: + case EHCI_QTYPE_ITD: // TODO support hs/fs ISO + case EHCI_QTYPE_SITD: + case EHCI_QTYPE_FSTN: default: break; } @@ -602,7 +616,7 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) p_qhd->qtd_overlay.alternate.terminate = 1; p_qhd->qtd_overlay.halted = 0; - ehci_qtd_t *p_setup = get_control_qtds(p_qhd->dev_addr); + ehci_qtd_t *p_setup = qtd_control(p_qhd->dev_addr); p_setup->used = 0; } @@ -617,7 +631,7 @@ static void xfer_error_isr(uint8_t hostid) { //------------- async list -------------// uint8_t max_loop = 0; - ehci_qhd_t * const async_head = get_async_head(hostid); + ehci_qhd_t * const async_head = qhd_async_head(hostid); ehci_qhd_t *p_qhd = async_head; do { @@ -640,7 +654,7 @@ static void xfer_error_isr(uint8_t hostid) { switch ( next_item.type ) { - case EHCI_QUEUE_ELEMENT_QHD: + case EHCI_QTYPE_QHD: { ehci_qhd_t *p_qhd_int = (ehci_qhd_t *) tu_align32(next_item.address); qhd_xfer_error_isr(p_qhd_int); @@ -648,9 +662,9 @@ static void xfer_error_isr(uint8_t hostid) break; // TODO support hs/fs ISO - case EHCI_QUEUE_ELEMENT_ITD: - case EHCI_QUEUE_ELEMENT_SITD: - case EHCI_QUEUE_ELEMENT_FSTN: + case EHCI_QTYPE_ITD: + case EHCI_QTYPE_SITD: + case EHCI_QTYPE_FSTN: default: break; } @@ -692,7 +706,7 @@ void hal_hcd_isr(uint8_t hostid) //------------- some QTD/SITD/ITD with IOC set is completed -------------// if (int_status & EHCI_INT_MASK_NXP_ASYNC) { - async_list_xfer_complete_isr( get_async_head(hostid) ); + async_list_xfer_complete_isr( qhd_async_head(hostid) ); } if (int_status & EHCI_INT_MASK_NXP_PERIODIC) @@ -706,37 +720,18 @@ void hal_hcd_isr(uint8_t hostid) //------------- There is some removed async previously -------------// if (int_status & EHCI_INT_MASK_ASYNC_ADVANCE) // need to place after EHCI_INT_MASK_NXP_ASYNC { - async_advance_isr( get_async_head(hostid) ); + async_advance_isr( qhd_async_head(hostid) ); } } //--------------------------------------------------------------------+ // HELPER //--------------------------------------------------------------------+ -static inline ehci_registers_t* get_operational_register(uint8_t hostid) -{ - return (ehci_registers_t*) (hostid ? (&LPC_USB1->USBCMD_H) : (&LPC_USB0->USBCMD_H) ); -} + //------------- queue head helper -------------// -static inline ehci_qhd_t* get_async_head(uint8_t hostid) -{ - return get_control_qhd(0); -} -static inline ehci_link_t* get_period_head(uint8_t hostid, uint8_t interval_ms) -{ - return (ehci_link_t*) &ehci_data.period_head_arr[ tu_log2( tu_min8(EHCI_FRAMELIST_SIZE, interval_ms) ) ]; -} -static inline ehci_qhd_t* get_control_qhd(uint8_t dev_addr) -{ - return &ehci_data.control[dev_addr].qhd; -} -static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr) -{ - return &ehci_data.control[dev_addr].qtd; -} static inline ehci_qhd_t* qhd_find_free (void) { @@ -875,7 +870,6 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c p_qhd->p_qtd_list_head = NULL; p_qhd->p_qtd_list_tail = NULL; p_qhd->pid_non_control = edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint - p_qhd->xfer_type = xfer_type; //------------- active, but no TD list -------------// p_qhd->qtd_overlay.halted = 0; @@ -936,17 +930,17 @@ static ehci_link_t* list_find_previous_item(ehci_link_t* p_head, ehci_link_t* p_ return (tu_align32(p_prev->address) != (uint32_t) p_head) ? p_prev : NULL; } -static tusb_error_t list_remove_qhd(ehci_link_t* p_head, ehci_link_t* p_remove) +static bool list_remove_qhd(ehci_link_t* p_head, ehci_link_t* p_remove) { ehci_link_t *p_prev = list_find_previous_item(p_head, p_remove); - TU_ASSERT(p_prev, TUSB_ERROR_INVALID_PARA); + TU_ASSERT(p_prev); p_prev->address = p_remove->address; // EHCI 4.8.2 link the removing queue head to async/period head (which always reachable by Host Controller) - p_remove->address = ((uint32_t) p_head) | (EHCI_QUEUE_ELEMENT_QHD << 1); + p_remove->address = ((uint32_t) p_head) | (EHCI_QTYPE_QHD << 1); - return TUSB_ERROR_NONE; + return true; } #endif diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index ea5199de5..1e0f80310 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -81,15 +81,17 @@ TU_VERIFY_STATIC(EHCI_CFG_FRAMELIST_SIZE_BITS <= 7, "incorrect value"); //--------------------------------------------------------------------+ // EHCI Data Structure //--------------------------------------------------------------------+ -enum ehci_queue_element_type_{ - EHCI_QUEUE_ELEMENT_ITD = 0 , ///< 0 - EHCI_QUEUE_ELEMENT_QHD , ///< 1 - EHCI_QUEUE_ELEMENT_SITD , ///< 2 - EHCI_QUEUE_ELEMENT_FSTN ///< 3 +enum +{ + EHCI_QTYPE_ITD = 0 , + EHCI_QTYPE_QHD , + EHCI_QTYPE_SITD , + EHCI_QTYPE_FSTN }; /// EHCI PID -enum tusb_pid_{ +enum +{ EHCI_PID_OUT = 0 , EHCI_PID_IN , EHCI_PID_SETUP @@ -183,11 +185,10 @@ typedef struct ATTR_ALIGNED(32) uint8_t used; uint8_t is_removing; uint8_t pid_non_control; - uint8_t xfer_type; + uint8_t interval_ms; // polling interval in frames (or milisecond) uint16_t total_xferred_bytes; // number of bytes xferred until a qtd with ioc bit set - uint8_t interval_ms; // polling interval in frames (or milisecond) - uint8_t reserved2; + uint8_t reserved2[2]; ehci_qtd_t * volatile p_qtd_list_head; // head of the scheduled TD list ehci_qtd_t * volatile p_qtd_list_tail; // tail of the scheduled TD list @@ -444,7 +445,7 @@ typedef struct // [0] : 1ms, [1] : 2ms, [2] : 4ms, [3] : 8 ms ehci_qhd_t period_head_arr[4]; - // Note control qhd of dev0 is used as head of async list, always exists + // Note control qhd of dev0 is used as head of async list struct { ehci_qhd_t qhd; ehci_qtd_t qtd; -- cgit v1.3.1 From c94df5150308e451baccae2857525d50fe1df232 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 11 Dec 2018 19:35:08 +0700 Subject: more clean up --- src/host/ehci/ehci.c | 29 +++++++++++++---------------- src/host/ehci/ehci.h | 30 +++++++++++++++--------------- 2 files changed, 28 insertions(+), 31 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index b37ed2098..1b5289333 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -257,7 +257,7 @@ bool hcd_pipe_control_close(uint8_t dev_addr) //------------- TODO pipe handle validate -------------// ehci_qhd_t* p_qhd = qhd_control(dev_addr); - p_qhd->is_removing = 1; + p_qhd->removing = 1; if (dev_addr != 0) { @@ -289,7 +289,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * // first first data toggle is always 1 (data & setup stage) qtd->data_toggle = 1; - qtd->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT; + qtd->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT; qtd->int_on_complete = 1; qtd->next.terminate = 1; @@ -416,7 +416,7 @@ bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) // async list needs async advance handshake to make sure host controller has released cached data // non-control does not use async advance, it will eventually free by control pipe close // period list queue element is guarantee to be free in the next frame (1 ms) - p_qhd->is_removing = 1; // TODO redundant, only apply to control queue head + p_qhd->removing = 1; // TODO redundant, only apply to control queue head if ( p_qhd->int_smask == 0 ) { @@ -462,9 +462,9 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) static void async_advance_isr(ehci_qhd_t * const async_head) { // TODO do we need to close addr0 - if (async_head->is_removing) // closing control pipe of addr0 + if (async_head->removing) // closing control pipe of addr0 { - async_head->is_removing = 0; + async_head->removing = 0; async_head->p_qtd_list_head = async_head->p_qtd_list_tail = NULL; async_head->qtd_overlay.halted = 1; @@ -476,10 +476,10 @@ static void async_advance_isr(ehci_qhd_t * const async_head) // check if control endpoint is removing ehci_qhd_t *p_control_qhd = qhd_control(dev_addr); - if ( p_control_qhd->is_removing ) + if ( p_control_qhd->removing ) { - p_control_qhd->is_removing = 0; - p_control_qhd->used = 0; + p_control_qhd->removing = 0; + p_control_qhd->used = 0; // Host Controller has cleaned up its cached data for this device, set state to unplug _usbh_devices[dev_addr].state = TUSB_DEVICE_STATE_UNPLUG; @@ -488,8 +488,8 @@ static void async_advance_isr(ehci_qhd_t * const async_head) { if (ehci_data.qhd_pool[i].dev_addr == dev_addr) { - ehci_data.qhd_pool[i].used = 0; - ehci_data.qhd_pool[i].is_removing = 0; + ehci_data.qhd_pool[i].used = 0; + ehci_data.qhd_pool[i].removing = 0; } } @@ -730,9 +730,6 @@ void hal_hcd_isr(uint8_t hostid) //------------- queue head helper -------------// - - - static inline ehci_qhd_t* qhd_find_free (void) { for (uint32_t i=0; ibInterval; p_qhd->dev_addr = dev_addr; - p_qhd->inactive_next_xact = 0; + p_qhd->fl_inactive_next_xact = 0; p_qhd->ep_number = edpt_number(ep_desc->bEndpointAddress); p_qhd->ep_speed = _usbh_devices[dev_addr].speed; - p_qhd->data_toggle = (xfer_type == TUSB_XFER_CONTROL) ? 1 : 0; + p_qhd->data_toggle_control= (xfer_type == TUSB_XFER_CONTROL) ? 1 : 0; p_qhd->head_list_flag = (dev_addr == 0) ? 1 : 0; // addr0's endpoint is the static asyn list head p_qhd->max_packet_size = ep_desc->wMaxPacketSize.size; p_qhd->fl_ctrl_ep_flag = ((xfer_type == TUSB_XFER_CONTROL) && (p_qhd->ep_speed != TUSB_SPEED_HIGH)) ? 1 : 0; @@ -866,7 +863,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c //------------- HCD Management Data -------------// p_qhd->used = 1; - p_qhd->is_removing = 0; + p_qhd->removing = 0; p_qhd->p_qtd_list_head = NULL; p_qhd->p_qtd_list_tail = NULL; p_qhd->pid_non_control = edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index 1e0f80310..d0d746706 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -155,22 +155,22 @@ typedef struct ATTR_ALIGNED(32) ehci_link_t next; // Word 1: Endpoint Characteristics - uint32_t dev_addr : 7 ; ///< device address - uint32_t inactive_next_xact : 1 ; ///< request HC to set the Active bit to zero (only valid for Periodic with Full/Slow speed) - uint32_t ep_number : 4 ; ///< EP number - uint32_t ep_speed : 2 ; ///< 0: Full, 1: Low, 2: High - uint32_t data_toggle : 1 ; ///< 0: use DT in qHD, 1: use DT in qTD - uint32_t head_list_flag : 1 ; ///< Head of the queue - uint32_t max_packet_size : 11 ; ///< Max packet size - uint32_t fl_ctrl_ep_flag : 1 ; ///< 1 if is Full/Low speed control endpoint - uint32_t nak_reload : 4 ; ///< Used by HC + uint32_t dev_addr : 7 ; ///< device address + uint32_t fl_inactive_next_xact : 1 ; ///< Only valid for Periodic with Full/Slow speed + uint32_t ep_number : 4 ; ///< EP number + uint32_t ep_speed : 2 ; ///< 0: Full, 1: Low, 2: High + uint32_t data_toggle_control : 1 ; ///< 0: use DT in qHD, 1: use DT in qTD + uint32_t head_list_flag : 1 ; ///< Head of the queue + uint32_t max_packet_size : 11 ; ///< Max packet size + uint32_t fl_ctrl_ep_flag : 1 ; ///< 1 if is Full/Low speed control endpoint + uint32_t nak_reload : 4 ; ///< Used by HC // Word 2: Endpoint Capabilities - uint32_t int_smask : 8 ; ///< Interrupt Schedule Mask - uint32_t fl_int_cmask : 8 ; ///< Split Completion Mask for Full/Slow speed - uint32_t fl_hub_addr : 7 ; ///< Hub Address for Full/Slow speed - uint32_t fl_hub_port : 7 ; ///< Hub Port for Full/Slow speed - uint32_t mult : 2 ; ///< Transaction per micro frame + uint32_t int_smask : 8 ; ///< Interrupt Schedule Mask + uint32_t fl_int_cmask : 8 ; ///< Split Completion Mask for Full/Slow speed + uint32_t fl_hub_addr : 7 ; ///< Hub Address for Full/Slow speed + uint32_t fl_hub_port : 7 ; ///< Hub Port for Full/Slow speed + uint32_t mult : 2 ; ///< Transaction per micro frame // Word 3: Current qTD Pointer volatile uint32_t qtd_addr; @@ -183,7 +183,7 @@ typedef struct ATTR_ALIGNED(32) /// thus there are 16 bytes padding free that we can make use of. //--------------------------------------------------------------------+ uint8_t used; - uint8_t is_removing; + uint8_t removing; // removed from asyn list, waiting for async advance uint8_t pid_non_control; uint8_t interval_ms; // polling interval in frames (or milisecond) -- cgit v1.3.1 From 67d6d753d66ffb821e9cfc4831d44f6b2f8549b8 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 11 Dec 2018 23:57:53 +0700 Subject: replace all hcd pipe close by hcd_device_remove --- src/class/cdc/cdc_host.c | 5 -- src/class/hid/hid_host.c | 1 - src/class/msc/msc_host.c | 3 - src/common/tusb_types.h | 5 -- src/host/ehci/ehci.c | 223 +++++++++++++++++------------------------------ src/host/ehci/ehci.h | 8 +- src/host/hcd.h | 6 +- src/host/hub.c | 2 - src/host/usbh.c | 32 ++----- 9 files changed, 94 insertions(+), 191 deletions(-) (limited to 'src/host') diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 53f62d684..159a13990 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -233,11 +233,6 @@ void cdch_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t x void cdch_close(uint8_t dev_addr) { cdch_data_t * p_cdc = &cdch_data[dev_addr-1]; - - hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, p_cdc->ep_notif); - hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, p_cdc->ep_in); - hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, p_cdc->ep_out); - tu_memclr(p_cdc, sizeof(cdch_data_t)); } diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index aa93f7837..1e44055ec 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -67,7 +67,6 @@ static inline bool hidh_interface_open(uint8_t dev_addr, uint8_t interface_numbe static inline void hidh_interface_close(hidh_interface_info_t *p_hid) { - (void) hcd_pipe_close(p_hid->pipe_hdl); tu_memclr(p_hid, sizeof(hidh_interface_info_t)); } diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 0b1359264..2c9b2dec7 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -413,9 +413,6 @@ void msch_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t x void msch_close(uint8_t dev_addr) { - (void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].ep_in); - (void) hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, msch_data[dev_addr-1].ep_out); - tu_memclr(&msch_data[dev_addr-1], sizeof(msch_interface_t)); osal_semaphore_reset(msch_sem_hdl); diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 8be1e87f6..d0a10acef 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -184,11 +184,6 @@ typedef enum TUSB_DEVICE_STATE_ADDRESSED , TUSB_DEVICE_STATE_CONFIGURED , TUSB_DEVICE_STATE_SUSPENDED , - - TUSB_DEVICE_STATE_REMOVING , - TUSB_DEVICE_STATE_SAFE_REMOVE , - - TUSB_DEVICE_STATE_INVALID_PARAMETER }tusb_device_state_t; typedef enum diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 1b5289333..91a87f9d2 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -113,7 +113,7 @@ static inline ehci_qtd_t* qtd_find_free(uint8_t dev_addr) ATTR_PURE ATTR_ALWAYS static inline ehci_qtd_t* qtd_next(ehci_qtd_t const * p_qtd ) ATTR_PURE ATTR_ALWAYS_INLINE; static inline void qtd_insert_to_qhd(ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new) ATTR_ALWAYS_INLINE; static inline void qtd_remove_1st_from_qhd(ehci_qhd_t *p_qhd) ATTR_ALWAYS_INLINE; -static void qtd_init(ehci_qtd_t* p_qtd, uint32_t data_ptr, uint16_t total_bytes); +static void qtd_init (ehci_qtd_t* p_qtd, void* buffer, uint16_t total_bytes); static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t new_type) ATTR_ALWAYS_INLINE; static inline ehci_link_t* list_next(ehci_link_t *p_link_pointer) ATTR_PURE ATTR_ALWAYS_INLINE; @@ -149,10 +149,53 @@ tusb_speed_t hcd_port_speed_get(uint8_t hostid) return (tusb_speed_t) ehci_data.regs->portsc_bm.nxp_port_speed; // NXP specific port speed } -// TODO refractor abtract later +static void list_remove_qhd_by_addr(ehci_link_t* list_head, uint8_t dev_addr) +{ + for(ehci_link_t* prev = list_head; + !prev->terminate && (tu_align32(prev->address) != (uint32_t) list_head); + prev = list_next(prev) ) + { + // TODO check type for ISO iTD and siTD + ehci_qhd_t* qhd = (ehci_qhd_t*) list_next(prev); + if ( qhd->dev_addr == dev_addr ) + { + // TODO deactive all TD, wait for QHD to inactive before removal + prev->address = qhd->next.address; + + // EHCI 4.8.2 link the removed qhd to async head (which always reachable by Host Controller) + qhd->next.address = ((uint32_t) list_head) | (EHCI_QTYPE_QHD << 1); + + if ( qhd->int_smask ) + { + // period list queue element is guarantee to be free in the next frame (1 ms) + qhd->used = 0; + }else + { + // async list use async advance handshake + // mark as removing, will completely re-usable when async advance isr occurs + qhd->removing = 1; + } + } + } +} + +// Close all opened endpoint belong to this device void hcd_device_remove(uint8_t rhport, uint8_t dev_addr) { - ehci_data.regs->command_bm.async_adv_doorbell = 1; // Async doorbell check EHCI 4.8.2 for operational details + // skip dev0 + if (dev_addr == 0) return; + + // Remove from async list + list_remove_qhd_by_addr( (ehci_link_t*) qhd_async_head(rhport), dev_addr ); + + // Remove from all interval period list + for(uint8_t i = 0; i < TU_ARRAY_SZIE(ehci_data.period_head_arr); i++) + { + list_remove_qhd_by_addr( (ehci_link_t*) &ehci_data.period_head_arr[i], dev_addr); + } + + // Async doorbell (EHCI 4.8.2 for operational details) + ehci_data.regs->command_bm.async_adv_doorbell = 1; } // EHCI controller init @@ -184,7 +227,6 @@ static bool ehci_init(uint8_t hostid) //------------- Periodic List -------------// // Build the polling interval tree with 1 ms, 2 ms, 4 ms and 8 ms (framesize) only - for(uint32_t i=0; i<4; i++) { ehci_data.period_head_arr[i].int_smask = 1; // queue head in period list must have smask non-zero @@ -252,28 +294,6 @@ static tusb_error_t hcd_controller_stop(uint8_t hostid) //--------------------------------------------------------------------+ // CONTROL PIPE API //--------------------------------------------------------------------+ -bool hcd_pipe_control_close(uint8_t dev_addr) -{ - //------------- TODO pipe handle validate -------------// - ehci_qhd_t* p_qhd = qhd_control(dev_addr); - - p_qhd->removing = 1; - - if (dev_addr != 0) - { - TU_ASSERT( list_remove_qhd( (ehci_link_t*) qhd_async_head( _usbh_devices[dev_addr].rhport ), - (ehci_link_t*) p_qhd) ); - } - - return true; -} - -bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) -{ - // FIXME control only for now - return hcd_pipe_control_close(dev_addr); -} - bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) { uint8_t const epnum = edpt_number(ep_addr); @@ -285,7 +305,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * ehci_qhd_t* qhd = qhd_control(dev_addr); ehci_qtd_t* qtd = qtd_control(dev_addr); - qtd_init(qtd, (uint32_t) buffer, buflen); + qtd_init(qtd, buffer, buflen); // first first data toggle is always 1 (data & setup stage) qtd->data_toggle = 1; @@ -306,20 +326,20 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) { - ehci_qhd_t* p_qhd = qhd_control(dev_addr); - ehci_qtd_t* p_setup = qtd_control(dev_addr); + ehci_qhd_t* qhd = &ehci_data.control[dev_addr].qhd; + ehci_qtd_t* td = &ehci_data.control[dev_addr].qtd; - qtd_init(p_setup, (uint32_t) setup_packet, 8); - p_setup->pid = EHCI_PID_SETUP; - p_setup->int_on_complete = 1; - p_setup->next.terminate = 1; + qtd_init(td, setup_packet, 8); + td->pid = EHCI_PID_SETUP; + td->int_on_complete = 1; + td->next.terminate = 1; // sw region - p_qhd->p_qtd_list_head = p_setup; - p_qhd->p_qtd_list_tail = p_setup; + qhd->p_qtd_list_head = td; + qhd->p_qtd_list_tail = td; // attach TD - p_qhd->qtd_overlay.next.address = (uint32_t) p_setup; + qhd->qtd_overlay.next.address = (uint32_t) td; return true; } @@ -384,8 +404,8 @@ bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], ui TU_ASSERT(p_qtd); - qtd_init(p_qtd, (uint32_t) buffer, total_bytes); - p_qtd->pid = p_qhd->pid_non_control; + qtd_init(p_qtd, buffer, total_bytes); + p_qtd->pid = p_qhd->pid; //------------- insert TD to TD list -------------// qtd_insert_to_qhd(p_qhd, p_qtd); @@ -408,31 +428,6 @@ bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t return true; } -/// pipe_close should only be called as a part of unmount/safe-remove process -bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) -{ - ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); - - // async list needs async advance handshake to make sure host controller has released cached data - // non-control does not use async advance, it will eventually free by control pipe close - // period list queue element is guarantee to be free in the next frame (1 ms) - p_qhd->removing = 1; // TODO redundant, only apply to control queue head - - if ( p_qhd->int_smask == 0 ) - { - // Async list - TU_ASSERT( list_remove_qhd( (ehci_link_t*) qhd_async_head( _usbh_devices[dev_addr].rhport ), - (ehci_link_t*) p_qhd), false ); - } - else - { - TU_ASSERT( list_remove_qhd( get_period_head( _usbh_devices[dev_addr].rhport, p_qhd->interval_ms ), - (ehci_link_t*) p_qhd), false ); - } - - return true; -} - bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) { ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); @@ -457,47 +452,20 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) // EHCI Interrupt Handler //--------------------------------------------------------------------+ -// async_advance is handshake between sw stack & ehci controller where ehci free all memory from an deleted queue head. -// In tinyusb, queue head is only removed when device is unplugged. So only control queue head is checked if removing -static void async_advance_isr(ehci_qhd_t * const async_head) +// async_advance is handshake between usb stack & ehci controller. +// This isr mean it is safe to modify previously removed queue head from async list. +// In tinyusb, queue head is only removed when device is unplugged. +static void async_advance_isr(uint8_t rhport) { - // TODO do we need to close addr0 - if (async_head->removing) // closing control pipe of addr0 - { - async_head->removing = 0; - async_head->p_qtd_list_head = async_head->p_qtd_list_tail = NULL; - async_head->qtd_overlay.halted = 1; - - _usbh_devices[0].state = TUSB_DEVICE_STATE_UNPLUG; - } + (void) rhport; - for(uint8_t dev_addr=1; dev_addr < CFG_TUSB_HOST_DEVICE_MAX; dev_addr++) + ehci_qhd_t* qhd_pool = ehci_data.qhd_pool; + for(uint32_t i = 0; i < HCD_MAX_ENDPOINT; i++) { - // check if control endpoint is removing - ehci_qhd_t *p_control_qhd = qhd_control(dev_addr); - - if ( p_control_qhd->removing ) + if ( qhd_pool[i].removing ) { - p_control_qhd->removing = 0; - p_control_qhd->used = 0; - - // Host Controller has cleaned up its cached data for this device, set state to unplug - _usbh_devices[dev_addr].state = TUSB_DEVICE_STATE_UNPLUG; - - for (uint8_t i=0; idev_addr, edpt_addr(p_qhd->ep_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0), XFER_RESULT_SUCCESS, p_qhd->total_xferred_bytes); + hcd_event_xfer_complete(p_qhd->dev_addr, edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0), XFER_RESULT_SUCCESS, p_qhd->total_xferred_bytes); p_qhd->total_xferred_bytes = 0; } } @@ -621,7 +589,7 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) } // call USBH callback - hcd_event_xfer_complete(p_qhd->dev_addr, edpt_addr(p_qhd->ep_number, p_qhd->pid_non_control == EHCI_PID_IN ? 1 : 0), error_event, p_qhd->total_xferred_bytes); + hcd_event_xfer_complete(p_qhd->dev_addr, edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0), error_event, p_qhd->total_xferred_bytes); p_qhd->total_xferred_bytes = 0; } @@ -675,7 +643,7 @@ static void xfer_error_isr(uint8_t hostid) } //------------- Host Controller Driver's Interrupt Handler -------------// -void hal_hcd_isr(uint8_t hostid) +void hal_hcd_isr(uint8_t rhport) { ehci_registers_t* regs = ehci_data.regs; @@ -692,7 +660,7 @@ void hal_hcd_isr(uint8_t hostid) if (regs->portsc_bm.connect_status_change) { - port_connect_status_change_isr(hostid); + port_connect_status_change_isr(rhport); } regs->portsc |= port_status; // Acknowledge change bits in portsc @@ -700,27 +668,27 @@ void hal_hcd_isr(uint8_t hostid) if (int_status & EHCI_INT_MASK_ERROR) { - xfer_error_isr(hostid); + xfer_error_isr(rhport); } //------------- some QTD/SITD/ITD with IOC set is completed -------------// if (int_status & EHCI_INT_MASK_NXP_ASYNC) { - async_list_xfer_complete_isr( qhd_async_head(hostid) ); + async_list_xfer_complete_isr( qhd_async_head(rhport) ); } if (int_status & EHCI_INT_MASK_NXP_PERIODIC) { for (uint8_t i=1; i <= EHCI_FRAMELIST_SIZE; i *= 2) { - period_list_xfer_complete_isr( hostid, i ); + period_list_xfer_complete_isr( rhport, i ); } } //------------- There is some removed async previously -------------// if (int_status & EHCI_INT_MASK_ASYNC_ADVANCE) // need to place after EHCI_INT_MASK_NXP_ASYNC { - async_advance_isr( qhd_async_head(hostid) ); + async_advance_isr(rhport); } } @@ -758,7 +726,7 @@ static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr) for(uint32_t i=0; iremoving = 0; p_qhd->p_qtd_list_head = NULL; p_qhd->p_qtd_list_tail = NULL; - p_qhd->pid_non_control = edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint + p_qhd->pid = edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint //------------- active, but no TD list -------------// p_qhd->qtd_overlay.halted = 0; p_qhd->qtd_overlay.next.terminate = 1; p_qhd->qtd_overlay.alternate.terminate = 1; - if (TUSB_XFER_BULK == xfer_type && p_qhd->ep_speed == TUSB_SPEED_HIGH && p_qhd->pid_non_control == EHCI_PID_OUT) + if (TUSB_XFER_BULK == xfer_type && p_qhd->ep_speed == TUSB_SPEED_HIGH && p_qhd->pid == EHCI_PID_OUT) { p_qhd->qtd_overlay.ping_err = 1; // do PING for Highspeed Bulk OUT, EHCI section 4.11 } } -static void qtd_init(ehci_qtd_t* p_qtd, uint32_t data_ptr, uint16_t total_bytes) +static void qtd_init(ehci_qtd_t* p_qtd, void* buffer, uint16_t total_bytes) { tu_memclr(p_qtd, sizeof(ehci_qtd_t)); @@ -892,7 +860,7 @@ static void qtd_init(ehci_qtd_t* p_qtd, uint32_t data_ptr, uint16_t total_bytes) p_qtd->total_bytes = total_bytes; p_qtd->expected_bytes = total_bytes; - p_qtd->buffer[0] = data_ptr; + p_qtd->buffer[0] = (uint32_t) buffer; for(uint8_t i=1; i<5; i++) { p_qtd->buffer[i] |= tu_align4k( p_qtd->buffer[i-1] ) + 4096; @@ -911,33 +879,4 @@ static inline ehci_link_t* list_next(ehci_link_t *p_link_pointer) return (ehci_link_t*) tu_align32(p_link_pointer->address); } -static ehci_link_t* list_find_previous_item(ehci_link_t* p_head, ehci_link_t* p_current) -{ - ehci_link_t *p_prev = p_head; - uint32_t max_loop = 0; - while( (tu_align32(p_prev->address) != (uint32_t) p_head) && // not loop around - (tu_align32(p_prev->address) != (uint32_t) p_current) && // not found yet - !p_prev->terminate && // not advanceable - max_loop < HCD_MAX_ENDPOINT) - { - p_prev = list_next(p_prev); - max_loop++; - } - - return (tu_align32(p_prev->address) != (uint32_t) p_head) ? p_prev : NULL; -} - -static bool list_remove_qhd(ehci_link_t* p_head, ehci_link_t* p_remove) -{ - ehci_link_t *p_prev = list_find_previous_item(p_head, p_remove); - - TU_ASSERT(p_prev); - - p_prev->address = p_remove->address; - // EHCI 4.8.2 link the removing queue head to async/period head (which always reachable by Host Controller) - p_remove->address = ((uint32_t) p_head) | (EHCI_QTYPE_QHD << 1); - - return true; -} - #endif diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index d0d746706..c1c274793 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -184,7 +184,7 @@ typedef struct ATTR_ALIGNED(32) //--------------------------------------------------------------------+ uint8_t used; uint8_t removing; // removed from asyn list, waiting for async advance - uint8_t pid_non_control; + uint8_t pid; uint8_t interval_ms; // polling interval in frames (or milisecond) uint16_t total_xferred_bytes; // number of bytes xferred until a qtd with ioc bit set @@ -229,7 +229,8 @@ typedef struct ATTR_ALIGNED(32) { TU_VERIFY_STATIC( sizeof(ehci_itd_t) == 64, "size is not correct" ); /// Split (Full-Speed) Isochronous Transfer Descriptor -typedef struct ATTR_ALIGNED(32) { +typedef struct ATTR_ALIGNED(32) +{ // Word 0: Next Link Pointer ehci_link_t next; @@ -332,7 +333,8 @@ enum ehci_portsc_change_mask_{ EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE }; -typedef volatile struct { +typedef volatile struct +{ union { uint32_t command; diff --git a/src/host/hcd.h b/src/host/hcd.h index 257a7da59..fb0612ed8 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -108,7 +108,7 @@ bool hcd_port_connect_status(uint8_t hostid) ATTR_PURE ATTR_WARN_UNUSED_RESULT; void hcd_port_reset(uint8_t hostid); tusb_speed_t hcd_port_speed_get(uint8_t hostid) ATTR_PURE ATTR_WARN_UNUSED_RESULT; // TODO make inline if possible -// Call by USBH after event device remove +// HCD closs all opened endpoints belong to this device void hcd_device_remove(uint8_t rhport, uint8_t dev_addr); //--------------------------------------------------------------------+ @@ -135,8 +135,7 @@ bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr); bool hcd_edpt_stalled(uint8_t dev_addr, uint8_t ep_addr); bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr); -// TODO remove -bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr); + bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen); //--------------------------------------------------------------------+ @@ -145,7 +144,6 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * // TODO control xfer should be used via usbh layer bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes); // only queue, not transferring yet bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete); -bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr); // TODO remove #if 0 tusb_error_t hcd_pipe_cancel()ATTR_WARN_UNUSED_RESULT; diff --git a/src/host/hub.c b/src/host/hub.c index 411e1ae95..e2e91d73d 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -251,9 +251,7 @@ void hub_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xf void hub_close(uint8_t dev_addr) { - hcd_pipe_close(TUH_OPT_RHPORT, dev_addr, hub_data[dev_addr-1].ep_status); tu_memclr(&hub_data[dev_addr-1], sizeof(usbh_hub_t)); - // osal_semaphore_reset(hub_enum_sem_hdl); } diff --git a/src/host/usbh.c b/src/host/usbh.c index 456eff531..31024f1f7 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -118,7 +118,7 @@ static host_class_driver_t const usbh_class_drivers[] = #endif }; -enum { USBH_CLASS_DRIVER_COUNT = sizeof(usbh_class_drivers) / sizeof(host_class_driver_t) }; +enum { USBH_CLASS_DRIVER_COUNT = TU_ARRAY_SZIE(usbh_class_drivers) }; //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION @@ -146,7 +146,7 @@ static void mark_interface_endpoint(uint8_t ep2drv[8][2], uint8_t const* p_desc, //--------------------------------------------------------------------+ tusb_device_state_t tuh_device_get_state (uint8_t const dev_addr) { - TU_ASSERT( dev_addr <= CFG_TUSB_HOST_DEVICE_MAX, TUSB_DEVICE_STATE_INVALID_PARAMETER); + TU_ASSERT( dev_addr <= CFG_TUSB_HOST_DEVICE_MAX, TUSB_DEVICE_STATE_UNPLUG); return (tusb_device_state_t) _usbh_devices[dev_addr].state; } @@ -241,13 +241,6 @@ tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) return TUSB_ERROR_NONE; } -static inline tusb_error_t usbh_pipe_control_close(uint8_t dev_addr) -{ - hcd_edpt_close(_usbh_devices[dev_addr].rhport, dev_addr, 0); - - return TUSB_ERROR_NONE; -} - //--------------------------------------------------------------------+ // USBH-HCD ISR/Callback API //--------------------------------------------------------------------+ @@ -321,13 +314,12 @@ void hcd_event_device_remove(uint8_t hostid) // return true if found and unmounted device, false if cannot find static void usbh_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t hub_port) { - bool is_found = false; - //------------- find the all devices (star-network) under port that is unplugged -------------// for (uint8_t dev_addr = 0; dev_addr <= CFG_TUSB_HOST_DEVICE_MAX; dev_addr ++) { usbh_device_t* dev = &_usbh_devices[dev_addr]; + // TODO Hub multiple level if (dev->rhport == rhport && (hub_addr == 0 || dev->hub_addr == hub_addr) && // hub_addr == 0 & hub_port == 0 means roothub (hub_port == 0 || dev->hub_port == hub_port) && @@ -336,29 +328,17 @@ static void usbh_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t hub_ // Invoke callback before close driver if (tuh_umount_cb) tuh_umount_cb(dev_addr); - // TODO Hub multiple level // Close class driver for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) usbh_class_drivers[drv_id].close(dev_addr); - // TODO refractor - // set to REMOVING to allow HCD to clean up its cached data for this device - // HCD must set this device's state to TUSB_DEVICE_STATE_UNPLUG when done - dev->state = TUSB_DEVICE_STATE_REMOVING; - memset(dev->itf2drv, 0xff, sizeof(dev->itf2drv)); // invalid mapping memset(dev->ep2drv , 0xff, sizeof(dev->ep2drv )); // invalid mapping - usbh_pipe_control_close(dev_addr); - -// hcd_device_remove(rhport, dev_addr); + hcd_device_remove(rhport, dev_addr); - is_found = true; + dev->state = TUSB_DEVICE_STATE_UNPLUG; } } - - // FIXME remove - if (is_found) hcd_device_remove(_usbh_devices[0].rhport, 0); - } //--------------------------------------------------------------------+ @@ -515,7 +495,7 @@ bool enum_task(hcd_event_t* event) new_dev->speed = dev0->speed; new_dev->state = TUSB_DEVICE_STATE_ADDRESSED; - usbh_pipe_control_close(0); // hcd_device_remove(rhport, 0); // close device 0 + hcd_device_remove(dev0->rhport, 0); // close device 0 dev0->state = TUSB_DEVICE_STATE_UNPLUG; // open control pipe for new address -- cgit v1.3.1 From def20ce35b1684c49d229b87dab36d2a6cb418dd Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 12 Dec 2018 00:13:48 +0700 Subject: clean up ehci warnings --- src/host/ehci/ehci.c | 88 ++++++++++++++++++++++++---------------------------- src/host/hcd.h | 4 +-- 2 files changed, 42 insertions(+), 50 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 91a87f9d2..146ab0615 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -74,7 +74,7 @@ uint32_t hcd_ehci_register_addr(uint8_t rhport) //--------------------------------------------------------------------+ static inline ehci_link_t* get_period_head(uint8_t rhport, uint8_t interval_ms) { - (uint8_t) rhport; + (void) rhport; return (ehci_link_t*) &ehci_data.period_head_arr[ tu_log2( tu_min8(EHCI_FRAMELIST_SIZE, interval_ms) ) ]; } @@ -95,32 +95,29 @@ static inline ehci_qtd_t* qtd_control(uint8_t dev_addr) } -static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; -static inline ehci_qhd_t* qhd_find_free (void); -static inline tusb_xfer_type_t qhd_get_xfer_type(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE; -static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr); +static inline ehci_qhd_t* qhd_next (ehci_qhd_t const * p_qhd); +static inline ehci_qhd_t* qhd_find_free (void); +static inline ehci_qhd_t* qhd_get_from_addr (uint8_t dev_addr, uint8_t ep_addr); // determine if a queue head has bus-related error -static inline bool qhd_has_xact_error(ehci_qhd_t * p_qhd) +static inline bool qhd_has_xact_error (ehci_qhd_t * p_qhd) { - return ( p_qhd->qtd_overlay.buffer_err ||p_qhd->qtd_overlay.babble_err || p_qhd->qtd_overlay.xact_err ); + return (p_qhd->qtd_overlay.buffer_err || p_qhd->qtd_overlay.babble_err || p_qhd->qtd_overlay.xact_err); //p_qhd->qtd_overlay.non_hs_period_missed_uframe || p_qhd->qtd_overlay.pingstate_err TODO split transaction error } -static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); +static void qhd_init (ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); -static inline ehci_qtd_t* qtd_find_free(uint8_t dev_addr) ATTR_PURE ATTR_ALWAYS_INLINE; -static inline ehci_qtd_t* qtd_next(ehci_qtd_t const * p_qtd ) ATTR_PURE ATTR_ALWAYS_INLINE; -static inline void qtd_insert_to_qhd(ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new) ATTR_ALWAYS_INLINE; -static inline void qtd_remove_1st_from_qhd(ehci_qhd_t *p_qhd) ATTR_ALWAYS_INLINE; +static inline ehci_qtd_t* qtd_find_free (void); +static inline ehci_qtd_t* qtd_next (ehci_qtd_t const * p_qtd); +static inline void qtd_insert_to_qhd (ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new); +static inline void qtd_remove_1st_from_qhd (ehci_qhd_t *p_qhd); static void qtd_init (ehci_qtd_t* p_qtd, void* buffer, uint16_t total_bytes); -static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t new_type) ATTR_ALWAYS_INLINE; -static inline ehci_link_t* list_next(ehci_link_t *p_link_pointer) ATTR_PURE ATTR_ALWAYS_INLINE; -static ehci_link_t* list_find_previous_item(ehci_link_t* p_head, ehci_link_t* p_current); -static bool list_remove_qhd(ehci_link_t* p_head, ehci_link_t* p_remove); +static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type); +static inline ehci_link_t* list_next (ehci_link_t *p_link_pointer); -static bool ehci_init(uint8_t hostid); +static bool ehci_init (uint8_t hostid); //--------------------------------------------------------------------+ // HCD API @@ -131,21 +128,25 @@ bool hcd_init(void) return ehci_init(TUH_OPT_RHPORT); } -void hcd_port_reset(uint8_t hostid) +void hcd_port_reset(uint8_t rhport) { + (void) rhport; + ehci_registers_t* regs = ehci_data.regs; regs->portsc_bm.port_enabled = 0; // disable port before reset regs->portsc_bm.port_reset = 1; } -bool hcd_port_connect_status(uint8_t hostid) +bool hcd_port_connect_status(uint8_t rhport) { + (void) rhport; return ehci_data.regs->portsc_bm.current_connect_status; } -tusb_speed_t hcd_port_speed_get(uint8_t hostid) +tusb_speed_t hcd_port_speed_get(uint8_t rhport) { + (void) rhport; return (tusb_speed_t) ehci_data.regs->portsc_bm.nxp_port_speed; // NXP specific port speed } @@ -278,17 +279,16 @@ static bool ehci_init(uint8_t hostid) return true; } -static tusb_error_t hcd_controller_stop(uint8_t hostid) +static void hcd_controller_stop(uint8_t rhport) { + (void) rhport; + ehci_registers_t* regs = ehci_data.regs; regs->command_bm.run_stop = 0; - tu_timeout_t timeout; - tu_timeout_set(&timeout, 2); // USB Spec: controller has to stop within 16 uframe = 2 frames - while( regs->status_bm.hc_halted == 0 && !tu_timeout_expired(&timeout)) {} - - return tu_timeout_expired(&timeout) ? TUSB_ERROR_OSAL_TIMEOUT : TUSB_ERROR_NONE; + // USB Spec: controller has to stop within 16 uframe = 2 frames + while( regs->status_bm.hc_halted == 0 ) {} } //--------------------------------------------------------------------+ @@ -296,6 +296,8 @@ static tusb_error_t hcd_controller_stop(uint8_t hostid) //--------------------------------------------------------------------+ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) { + (void) rhport; + uint8_t const epnum = edpt_number(ep_addr); uint8_t const dir = edpt_dir(ep_addr); @@ -326,10 +328,12 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) { + (void) rhport; + ehci_qhd_t* qhd = &ehci_data.control[dev_addr].qhd; ehci_qtd_t* td = &ehci_data.control[dev_addr].qtd; - qtd_init(td, setup_packet, 8); + qtd_init(td, (void*) setup_packet, 8); td->pid = EHCI_PID_SETUP; td->int_on_complete = 1; td->next.terminate = 1; @@ -349,6 +353,8 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet //--------------------------------------------------------------------+ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) { + (void) rhport; + // TODO not support ISO yet TU_ASSERT (ep_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS); @@ -400,7 +406,7 @@ bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], ui { //------------- set up QTD -------------// ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); - ehci_qtd_t *p_qtd = qtd_find_free(dev_addr); + ehci_qtd_t *p_qtd = qtd_find_free(); TU_ASSERT(p_qtd); @@ -507,7 +513,6 @@ static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd) static void async_list_xfer_complete_isr(ehci_qhd_t * const async_head) { - uint8_t max_loop = 0; ehci_qhd_t *p_qhd = async_head; do { @@ -516,9 +521,7 @@ static void async_list_xfer_complete_isr(ehci_qhd_t * const async_head) qhd_xfer_complete_isr(p_qhd); } p_qhd = qhd_next(p_qhd); - max_loop++; - }while(p_qhd != async_head && max_loop < HCD_MAX_ENDPOINT*CFG_TUSB_HOST_DEVICE_MAX); // async list traversal, stop if loop around - // TODO abstract max loop guard for async + }while(p_qhd != async_head); // async list traversal, stop if loop around } static void period_list_xfer_complete_isr(uint8_t hostid, uint8_t interval_ms) @@ -560,8 +563,8 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) { if ( (p_qhd->dev_addr != 0 && p_qhd->qtd_overlay.halted) || // addr0 cannot be protocol STALL qhd_has_xact_error(p_qhd) ) - { // current qhd has error in transaction - tusb_xfer_type_t const xfer_type = qhd_get_xfer_type(p_qhd); + { + // current qhd has error in transaction xfer_result_t error_event; // no error bits are set, endpoint is halted due to STALL @@ -598,27 +601,23 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) static void xfer_error_isr(uint8_t hostid) { //------------- async list -------------// - uint8_t max_loop = 0; ehci_qhd_t * const async_head = qhd_async_head(hostid); ehci_qhd_t *p_qhd = async_head; do { qhd_xfer_error_isr( p_qhd ); p_qhd = qhd_next(p_qhd); - max_loop++; - }while(p_qhd != async_head && max_loop < HCD_MAX_ENDPOINT*CFG_TUSB_HOST_DEVICE_MAX); // async list traversal, stop if loop around + }while(p_qhd != async_head); // async list traversal, stop if loop around //------------- TODO refractor period list -------------// uint32_t const period_1ms_addr = (uint32_t) get_period_head(hostid, 1); for (uint8_t interval_ms=1; interval_ms <= EHCI_FRAMELIST_SIZE; interval_ms *= 2) { - uint8_t period_max_loop = 0; ehci_link_t next_item = * get_period_head(hostid, interval_ms); // TODO abstract max loop guard for period while( !next_item.terminate && - !(interval_ms > 1 && period_1ms_addr == tu_align32(next_item.address)) && - period_max_loop < (HCD_MAX_ENDPOINT + EHCI_MAX_ITD + EHCI_MAX_SITD)*CFG_TUSB_HOST_DEVICE_MAX) + !(interval_ms > 1 && period_1ms_addr == tu_align32(next_item.address)) ) { switch ( next_item.type ) { @@ -637,7 +636,6 @@ static void xfer_error_isr(uint8_t hostid) } next_item = *list_next(&next_item); - period_max_loop++; } } } @@ -708,12 +706,6 @@ static inline ehci_qhd_t* qhd_find_free (void) return NULL; } -static inline tusb_xfer_type_t qhd_get_xfer_type(ehci_qhd_t const * p_qhd) -{ - return ( p_qhd->ep_number == 0 ) ? TUSB_XFER_CONTROL : - ( p_qhd->int_smask != 0 ) ? TUSB_XFER_INTERRUPT : TUSB_XFER_BULK; -} - static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd) { return (ehci_qhd_t*) tu_align32(p_qhd->next.address); @@ -736,7 +728,7 @@ static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr) } //------------- TD helper -------------// -static inline ehci_qtd_t* qtd_find_free(uint8_t dev_addr) +static inline ehci_qtd_t* qtd_find_free(void) { for (uint32_t i=0; i Date: Wed, 12 Dec 2018 00:48:41 +0700 Subject: update ohci for hcd_device_remove --- src/host/ohci/ohci.c | 116 ++++++++++++++++++++++----------------------------- src/host/ohci/ohci.h | 5 ++- 2 files changed, 53 insertions(+), 68 deletions(-) (limited to 'src/host') diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index 645315b38..f48a85693 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -147,9 +147,7 @@ static ohci_ed_t * const p_ed_head[] = }; static void ed_list_insert(ohci_ed_t * p_pre, ohci_ed_t * p_ed); -static void ed_list_remove(ohci_ed_t * p_head, ohci_ed_t * p_ed); - -static ohci_ed_t * ed_list_find_previous(ohci_ed_t const * p_head, ohci_ed_t const * p_ed); +static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr); //--------------------------------------------------------------------+ // USBH-HCD API @@ -216,11 +214,30 @@ tusb_speed_t hcd_port_speed_get(uint8_t hostid) return OHCI_REG->rhport_status_bit[0].low_speed_device_attached ? TUSB_SPEED_LOW : TUSB_SPEED_FULL; } +// endpoints are tied to an address, which only reclaim after a long delay when enumerating +// thus there is no need to make sure ED is not in HC's cahed as it will not for sure void hcd_device_remove(uint8_t rhport, uint8_t dev_addr) { // TODO OHCI (void) rhport; - (void) dev_addr; + + // addr0 serves as static head --> only set skip bit + if ( dev_addr == 0 ) + { + ohci_data.control[0].ed.skip = 1; + }else + { + // remove control + ed_list_remove_by_addr( p_ed_head[TUSB_XFER_CONTROL], dev_addr); + + // remove bulk + ed_list_remove_by_addr(p_ed_head[TUSB_XFER_BULK], dev_addr); + + // remove interrupt + ed_list_remove_by_addr(p_ed_head[TUSB_XFER_INTERRUPT], dev_addr); + + // TODO remove ISO + } } //--------------------------------------------------------------------+ @@ -273,33 +290,6 @@ static void gtd_init(ohci_gtd_t* p_td, void* data_ptr, uint16_t total_bytes) p_td->buffer_end = total_bytes ? (((uint8_t*) data_ptr) + total_bytes-1) : NULL; } -bool hcd_pipe_control_close(uint8_t dev_addr) -{ - ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed; - - if ( dev_addr == 0 ) - { // addr0 serves as static head --> only set skip bitx - p_ed->skip = 1; - }else - { - ed_list_remove( p_ed_head[ ed_get_xfer_type(p_ed)], p_ed ); - - // TODO refractor to be USBH - _usbh_devices[dev_addr].state = TUSB_DEVICE_STATE_UNPLUG; - } - - return true; -} - -bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) -{ - // FIXME control only for now - (void) rhport; - (void) ep_addr; - - return hcd_pipe_control_close(dev_addr); -} - bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) { (void) rhport; @@ -382,39 +372,33 @@ static inline ohci_ed_t * ed_find_free(void) return NULL; } -static ohci_ed_t * ed_list_find_previous(ohci_ed_t const * p_head, ohci_ed_t const * p_ed) +static void ed_list_insert(ohci_ed_t * p_pre, ohci_ed_t * p_ed) { - uint32_t max_loop = HCD_MAX_ENDPOINT*CFG_TUSB_HOST_DEVICE_MAX; - - ohci_ed_t const * p_prev = p_head; + p_ed->next = p_pre->next; + p_pre->next = (uint32_t) p_ed; +} - TU_ASSERT(p_prev, NULL); +static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr) +{ + ohci_ed_t* p_prev = p_head; - while ( tu_align16(p_prev->next) != 0 && /* not reach null */ - tu_align16(p_prev->next) != (uint32_t) p_ed && /* not found yet */ - max_loop > 0) + while( p_prev->next ) { - p_prev = (ohci_ed_t const *) tu_align16(p_prev->next); - max_loop--; - } - - return ( tu_align16(p_prev->next) == (uint32_t) p_ed ) ? (ohci_ed_t*) p_prev : NULL; -} + ohci_ed_t* ed = (ohci_ed_t*) p_prev->next; -static void ed_list_insert(ohci_ed_t * p_pre, ohci_ed_t * p_ed) -{ - p_ed->next |= p_pre->next; // to reserve 4 lsb bits - p_pre->next = (p_pre->next & 0x0FUL) | ((uint32_t) p_ed); -} + if (ed->dev_addr == dev_addr) + { + // unlink ed + p_prev->next = ed->next; -static void ed_list_remove(ohci_ed_t * p_head, ohci_ed_t * p_ed) -{ - ohci_ed_t * const p_prev = ed_list_find_previous(p_head, p_ed); + // point the removed ED's next pointer to list head to make sure HC can always safely move away from this ED + ed->next = (uint32_t) p_head; + ed->used = 0; + } - p_prev->next = (p_prev->next & 0x0fUL) | tu_align16(p_ed->next); - // point the removed ED's next pointer to list head to make sure HC can always safely move away from this ED - p_ed->next = (uint32_t) p_head; - p_ed->used = 0; // free ED + // check next valid since we could remove it + if (p_prev->next) p_prev = (ohci_ed_t*) p_prev->next; + } } bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) @@ -514,15 +498,15 @@ bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_ /// pipe_close should only be called as a part of unmount/safe-remove process // endpoints are tied to an address, which only reclaim after a long delay when enumerating // thus there is no need to make sure ED is not in HC's cahed as it will not for sure -bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) -{ - (void) rhport; - ohci_ed_t * const p_ed = ed_from_addr(dev_addr, ep_addr); - - ed_list_remove( p_ed_head[ ed_get_xfer_type(p_ed)], p_ed ); - - return true; -} +//bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) +//{ +// (void) rhport; +// ohci_ed_t * const p_ed = ed_from_addr(dev_addr, ep_addr); +// +// ed_list_remove( p_ed_head[ ed_get_xfer_type(p_ed)], p_ed ); +// +// return true; +//} bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) { diff --git a/src/host/ohci/ohci.h b/src/host/ohci/ohci.h index cbd2047d8..5c0bd0b45 100644 --- a/src/host/ohci/ohci.h +++ b/src/host/ohci/ohci.h @@ -143,7 +143,7 @@ typedef struct ATTR_ALIGNED(16) }; }td_head; - // Word 3: next ED (4 lsb bits are free to use ) + // Word 3: next ED uint32_t next; } ohci_ed_t; @@ -175,7 +175,8 @@ typedef struct ATTR_ALIGNED(32) TU_VERIFY_STATIC( sizeof(ochi_itd_t) == 32, "size is not correct" ); // structure with member alignment required from large to small -typedef struct ATTR_ALIGNED(256) { +typedef struct ATTR_ALIGNED(256) +{ ohci_hcca_t hcca; ohci_ed_t bulk_head_ed; // static bulk head (dummy) -- cgit v1.3.1 From c88e16bd116a826ebd2d9fb348fd3704f6b1f14d Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 12 Dec 2018 00:48:53 +0700 Subject: clean up --- src/host/ohci/ohci.c | 13 ------------- 1 file changed, 13 deletions(-) (limited to 'src/host') diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index f48a85693..669aa2a15 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -495,19 +495,6 @@ bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_ return true; } -/// pipe_close should only be called as a part of unmount/safe-remove process -// endpoints are tied to an address, which only reclaim after a long delay when enumerating -// thus there is no need to make sure ED is not in HC's cahed as it will not for sure -//bool hcd_pipe_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) -//{ -// (void) rhport; -// ohci_ed_t * const p_ed = ed_from_addr(dev_addr, ep_addr); -// -// ed_list_remove( p_ed_head[ ed_get_xfer_type(p_ed)], p_ed ); -// -// return true; -//} - bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) { ohci_ed_t const * const p_ed = ed_from_addr(dev_addr, ep_addr); -- cgit v1.3.1 From e3514b80543ac2514a80d886255bd8e33b325750 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 12 Dec 2018 11:32:46 +0700 Subject: rename hcd_device_remove to hcd_device_close --- src/host/ehci/ehci.c | 2 +- src/host/hcd.h | 4 ++-- src/host/ohci/ohci.c | 2 +- src/host/usbh.c | 4 ++-- src/portable/nxp/lpc18_43/hcd_lpc18_43.c | 5 +---- 5 files changed, 7 insertions(+), 10 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 146ab0615..ef5510a6d 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -181,7 +181,7 @@ static void list_remove_qhd_by_addr(ehci_link_t* list_head, uint8_t dev_addr) } // Close all opened endpoint belong to this device -void hcd_device_remove(uint8_t rhport, uint8_t dev_addr) +void hcd_device_close(uint8_t rhport, uint8_t dev_addr) { // skip dev0 if (dev_addr == 0) return; diff --git a/src/host/hcd.h b/src/host/hcd.h index 1496d462a..f93cbd2c6 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -108,8 +108,8 @@ bool hcd_port_connect_status(uint8_t hostid); void hcd_port_reset(uint8_t hostid); tusb_speed_t hcd_port_speed_get(uint8_t hostid); -// HCD closs all opened endpoints belong to this device -void hcd_device_remove(uint8_t rhport, uint8_t dev_addr); +// HCD closes all opened endpoints belong to this device +void hcd_device_close(uint8_t rhport, uint8_t dev_addr); //--------------------------------------------------------------------+ // Event function diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index 669aa2a15..c35eaa77b 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -216,7 +216,7 @@ tusb_speed_t hcd_port_speed_get(uint8_t hostid) // endpoints are tied to an address, which only reclaim after a long delay when enumerating // thus there is no need to make sure ED is not in HC's cahed as it will not for sure -void hcd_device_remove(uint8_t rhport, uint8_t dev_addr) +void hcd_device_close(uint8_t rhport, uint8_t dev_addr) { // TODO OHCI (void) rhport; diff --git a/src/host/usbh.c b/src/host/usbh.c index 31024f1f7..962dc04dc 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -334,7 +334,7 @@ static void usbh_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t hub_ memset(dev->itf2drv, 0xff, sizeof(dev->itf2drv)); // invalid mapping memset(dev->ep2drv , 0xff, sizeof(dev->ep2drv )); // invalid mapping - hcd_device_remove(rhport, dev_addr); + hcd_device_close(rhport, dev_addr); dev->state = TUSB_DEVICE_STATE_UNPLUG; } @@ -495,7 +495,7 @@ bool enum_task(hcd_event_t* event) new_dev->speed = dev0->speed; new_dev->state = TUSB_DEVICE_STATE_ADDRESSED; - hcd_device_remove(dev0->rhport, 0); // close device 0 + hcd_device_close(dev0->rhport, 0); // close device 0 dev0->state = TUSB_DEVICE_STATE_UNPLUG; // open control pipe for new address diff --git a/src/portable/nxp/lpc18_43/hcd_lpc18_43.c b/src/portable/nxp/lpc18_43/hcd_lpc18_43.c index 141a77656..efdf8fea4 100644 --- a/src/portable/nxp/lpc18_43/hcd_lpc18_43.c +++ b/src/portable/nxp/lpc18_43/hcd_lpc18_43.c @@ -42,10 +42,6 @@ #include "chip.h" -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM DECLARATION -//--------------------------------------------------------------------+ - void hcd_int_enable(uint8_t rhport) { NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn); @@ -55,4 +51,5 @@ void hcd_int_disable(uint8_t rhport) { NVIC_DisableIRQ(rhport ? USB1_IRQn : USB0_IRQn); } + #endif -- cgit v1.3.1 From 6d86db3977aa60963d78d1bceaa7e3def60f1957 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 12 Dec 2018 11:51:31 +0700 Subject: rename edpt_dir/number/addr to tu_edpt_* --- docs/porting.md | 6 +++--- examples/host/cdc_msc_hid/src/tusb_config.h | 2 +- src/class/cdc/cdc_device.h | 2 +- src/class/cdc/cdc_host.c | 2 +- src/class/custom/custom_device.c | 2 +- src/class/custom/custom_device.h | 2 +- src/class/hid/hid_device.c | 2 +- src/class/hid/hid_device.h | 2 +- src/class/msc/msc_device.h | 2 +- src/class/msc/msc_host.c | 2 +- src/common/tusb_types.h | 6 +++--- src/device/usbd.c | 10 ++++----- src/host/ehci/ehci.c | 30 +++++++++++--------------- src/host/ohci/ohci.c | 10 ++++----- src/host/usbh.c | 10 ++++----- src/portable/microchip/samd21/dcd_samd21.c | 24 ++++++++++----------- src/portable/microchip/samd51/dcd_samd51.c | 24 ++++++++++----------- src/portable/nordic/nrf5x/dcd_nrf5x.c | 22 +++++++++---------- src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c | 6 +++--- src/portable/nxp/lpc17_40/dcd_lpc17_40.c | 8 +++---- src/portable/nxp/lpc18_43/dcd_lpc18_43.c | 24 ++++++++++----------- src/portable/nxp/lpc18_43/hcd_lpc18_43.c | 7 ++++++ tests/support/tusb_config.h | 2 +- 23 files changed, 104 insertions(+), 103 deletions(-) (limited to 'src/host') diff --git a/docs/porting.md b/docs/porting.md index 5a464fa6b..040112d9c 100644 --- a/docs/porting.md +++ b/docs/porting.md @@ -113,10 +113,10 @@ As before with `dcd_event_bus_signal` the first argument is the USB peripheral n Endpoints are the core of the USB data transfer process. They come in a few forms such as control, isochronous, bulk, and interrupt. We won't cover the details here except with some caveats in open below. In general, data is transferred by setting up a buffer of a given length to be transferred on a given endpoint address and then waiting for an interrupt to signal that the transfer is finished. Further details below. -Endpoints within USB have an address which encodes both the number and direction of an endpoint. TinyUSB provides `edpt_number` and `edpt_dir` to unpack this data from the address. Here is a snippet that does it. +Endpoints within USB have an address which encodes both the number and direction of an endpoint. TinyUSB provides `tu_edpt_number` and `tu_edpt_dir` to unpack this data from the address. Here is a snippet that does it. - uint8_t epnum = edpt_number(ep_addr); - uint8_t dir = edpt_dir(ep_addr); + uint8_t epnum = tu_edpt_number(ep_addr); + uint8_t dir = tu_edpt_dir(ep_addr); ##### dcd_edpt_open diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index 07764fa90..cc06ae93d 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -84,7 +84,7 @@ #define CFG_TUH_CDC 1 #define CFG_TUH_HID_KEYBOARD 0 #define CFG_TUH_HID_MOUSE 0 -#define CFG_TUSB_HOST_HID_GENERIC 0 // (not yet supported) +#define CFG_TUSB_HOST_HID_GENERIC 0 // (not yet supported) #define CFG_TUH_MSC 0 #define CFG_TUSB_HOST_DEVICE_MAX (CFG_TUH_HUB ? 5 : 1) // normal hub has 4 ports diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h index 0a17aa916..9dd837d7d 100644 --- a/src/class/cdc/cdc_device.h +++ b/src/class/cdc/cdc_device.h @@ -116,7 +116,7 @@ void cdcd_init (void); tusb_error_t cdcd_open (uint8_t rhport, tusb_desc_interface_t const * p_interface_desc, uint16_t *p_length); bool cdcd_control_request (uint8_t rhport, tusb_control_request_t const * p_request); bool cdcd_control_request_complete (uint8_t rhport, tusb_control_request_t const * p_request); -tusb_error_t cdcd_xfer_cb (uint8_t rhport, uint8_t edpt_addr, xfer_result_t result, uint32_t xferred_bytes); +tusb_error_t cdcd_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes); void cdcd_reset (uint8_t rhport); #endif diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 159a13990..d660cc39f 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -196,7 +196,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it TU_ASSERT(hcd_edpt_open(rhport, dev_addr, ep_desc)); - if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) + if ( tu_edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) { p_cdc->ep_in = ep_desc->bEndpointAddress; }else diff --git a/src/class/custom/custom_device.c b/src/class/custom/custom_device.c index 194963c17..5abffacf6 100644 --- a/src/class/custom/custom_device.c +++ b/src/class/custom/custom_device.c @@ -94,7 +94,7 @@ bool cusd_control_request(uint8_t rhport, tusb_control_request_t const * p_reque return false; } -tusb_error_t cusd_xfer_cb(uint8_t rhport, uint8_t edpt_addr, xfer_result_t event, uint32_t xferred_bytes) +tusb_error_t cusd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) { return TUSB_ERROR_NONE; } diff --git a/src/class/custom/custom_device.h b/src/class/custom/custom_device.h index 0a8f05e7d..f223a4d3c 100644 --- a/src/class/custom/custom_device.h +++ b/src/class/custom/custom_device.h @@ -66,7 +66,7 @@ void cusd_init(void); tusb_error_t cusd_open(uint8_t rhport, tusb_desc_interface_t const * p_interface_desc, uint16_t *p_length); bool cusd_control_request_st(uint8_t rhport, tusb_control_request_t const * p_request); bool cusd_control_request_complete (uint8_t rhport, tusb_control_request_t const * p_request); -tusb_error_t cusd_xfer_cb(uint8_t rhport, uint8_t edpt_addr, xfer_result_t event, uint32_t xferred_bytes); +tusb_error_t cusd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); void cusd_reset(uint8_t rhport); #endif diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c index 6e2ea27db..fa76ee015 100644 --- a/src/class/hid/hid_device.c +++ b/src/class/hid/hid_device.c @@ -510,7 +510,7 @@ bool hidd_control_request_complete(uint8_t rhport, tusb_control_request_t const return true; } -tusb_error_t hidd_xfer_cb(uint8_t rhport, uint8_t edpt_addr, xfer_result_t event, uint32_t xferred_bytes) +tusb_error_t hidd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) { // nothing to do return TUSB_ERROR_NONE; diff --git a/src/class/hid/hid_device.h b/src/class/hid/hid_device.h index 7aff7f34d..42c61a47b 100644 --- a/src/class/hid/hid_device.h +++ b/src/class/hid/hid_device.h @@ -380,7 +380,7 @@ void hidd_init(void); tusb_error_t hidd_open(uint8_t rhport, tusb_desc_interface_t const * p_interface_desc, uint16_t *p_length); bool hidd_control_request(uint8_t rhport, tusb_control_request_t const * p_request); bool hidd_control_request_complete (uint8_t rhport, tusb_control_request_t const * p_request); -tusb_error_t hidd_xfer_cb(uint8_t rhport, uint8_t edpt_addr, xfer_result_t event, uint32_t xferred_bytes); +tusb_error_t hidd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); void hidd_reset(uint8_t rhport); #endif diff --git a/src/class/msc/msc_device.h b/src/class/msc/msc_device.h index 4053679b8..55bfba83c 100644 --- a/src/class/msc/msc_device.h +++ b/src/class/msc/msc_device.h @@ -174,7 +174,7 @@ void mscd_init(void); tusb_error_t mscd_open(uint8_t rhport, tusb_desc_interface_t const * p_interface_desc, uint16_t *p_length); bool mscd_control_request(uint8_t rhport, tusb_control_request_t const * p_request); bool mscd_control_request_complete (uint8_t rhport, tusb_control_request_t const * p_request); -tusb_error_t mscd_xfer_cb(uint8_t rhport, uint8_t edpt_addr, xfer_result_t event, uint32_t xferred_bytes); +tusb_error_t mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); void mscd_reset(uint8_t rhport); #endif diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 2c9b2dec7..dd771440d 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -309,7 +309,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it TU_ASSERT(hcd_edpt_open(rhport, dev_addr, ep_desc)); - if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) + if ( tu_edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) { p_msc->ep_in = ep_desc->bEndpointAddress; }else diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index d0a10acef..cbddd4156 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -376,18 +376,18 @@ static inline uint8_t bm_request_type(uint8_t direction, uint8_t type, uint8_t r //--------------------------------------------------------------------+ // Get direction from Endpoint address -static inline tusb_dir_t edpt_dir(uint8_t addr) +static inline tusb_dir_t tu_edpt_dir(uint8_t addr) { return (addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT; } // Get Endpoint number from address -static inline uint8_t edpt_number(uint8_t addr) +static inline uint8_t tu_edpt_number(uint8_t addr) { return addr & (~TUSB_DIR_IN_MASK); } -static inline uint8_t edpt_addr(uint8_t num, uint8_t dir) +static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) { return num | (dir ? TUSB_DIR_IN_MASK : 0); } diff --git a/src/device/usbd.c b/src/device/usbd.c index ad40e3c9f..b63dcb131 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -246,14 +246,14 @@ static void usbd_task_body(void) // Invoke the class callback associated with the endpoint address uint8_t const ep_addr = event.xfer_complete.ep_addr; - if ( 0 == edpt_number(ep_addr) ) + if ( 0 == tu_edpt_number(ep_addr) ) { // control transfer DATA stage callback usbd_control_xfer_cb(event.rhport, ep_addr, event.xfer_complete.result, event.xfer_complete.len); } else { - uint8_t const drv_id = _usbd_dev.ep2drv[edpt_number(ep_addr)][edpt_dir(ep_addr)]; + uint8_t const drv_id = _usbd_dev.ep2drv[tu_edpt_number(ep_addr)][tu_edpt_dir(ep_addr)]; TU_ASSERT(drv_id < USBD_CLASS_DRIVER_COUNT,); usbd_class_drivers[drv_id].xfer_cb(event.rhport, ep_addr, event.xfer_complete.result, event.xfer_complete.len); @@ -484,7 +484,7 @@ static void mark_interface_endpoint(uint8_t ep2drv[8][2], uint8_t const* p_desc, { uint8_t const ep_addr = ((tusb_desc_endpoint_t const*) p_desc)->bEndpointAddress; - ep2drv[edpt_number(ep_addr)][edpt_dir(ep_addr)] = driver_id; + ep2drv[tu_edpt_number(ep_addr)][tu_edpt_dir(ep_addr)] = driver_id; } len += descriptor_len(p_desc); @@ -576,7 +576,7 @@ void dcd_event_handler(dcd_event_t const * event, bool in_isr) case DCD_EVENT_XFER_COMPLETE: // skip zero-length control status complete event, should dcd notifies us. - if ( 0 == edpt_number(event->xfer_complete.ep_addr) && event->xfer_complete.len == 0) break; + if ( 0 == tu_edpt_number(event->xfer_complete.ep_addr) && event->xfer_complete.len == 0) break; osal_queue_send(_usbd_q, event, in_isr); TU_ASSERT(event->xfer_complete.result == XFER_RESULT_SUCCESS,); @@ -633,7 +633,7 @@ tusb_error_t usbd_open_edpt_pair(uint8_t rhport, tusb_desc_endpoint_t const* ep_ TU_ASSERT( dcd_edpt_open(rhport, ep_desc), TUSB_ERROR_DCD_OPEN_PIPE_FAILED ); - if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) + if ( tu_edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) { (*ep_in) = ep_desc->bEndpointAddress; }else diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index ef5510a6d..278765585 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -48,9 +48,6 @@ #include "../usbh_hcd.h" #include "ehci.h" -// TODO remove -#include "chip.h" - //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ @@ -61,13 +58,8 @@ // Periodic frame list must be 4K alignment CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4096) static ehci_data_t ehci_data; -//------------- Validation -------------// -// TODO static assert for memory placement on some known MCU such as lpc43xx - -uint32_t hcd_ehci_register_addr(uint8_t rhport) -{ - return (uint32_t) (rhport ? &LPC_USB1->USBCMD_H : &LPC_USB0->USBCMD_H ); -} +// EHCI portable +uint32_t hcd_ehci_register_addr(uint8_t rhport); //--------------------------------------------------------------------+ // PROTOTYPE @@ -279,7 +271,8 @@ static bool ehci_init(uint8_t hostid) return true; } -static void hcd_controller_stop(uint8_t rhport) +#if 0 +static void ehci_stop(uint8_t rhport) { (void) rhport; @@ -290,6 +283,7 @@ static void hcd_controller_stop(uint8_t rhport) // USB Spec: controller has to stop within 16 uframe = 2 frames while( regs->status_bm.hc_halted == 0 ) {} } +#endif //--------------------------------------------------------------------+ // CONTROL PIPE API @@ -298,8 +292,8 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * { (void) rhport; - uint8_t const epnum = edpt_number(ep_addr); - uint8_t const dir = edpt_dir(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); // FIXME control only for now if ( epnum == 0 ) @@ -505,7 +499,7 @@ static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd) { // end of request // call USBH callback - hcd_event_xfer_complete(p_qhd->dev_addr, edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0), XFER_RESULT_SUCCESS, p_qhd->total_xferred_bytes); + hcd_event_xfer_complete(p_qhd->dev_addr, tu_edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0), XFER_RESULT_SUCCESS, p_qhd->total_xferred_bytes); p_qhd->total_xferred_bytes = 0; } } @@ -592,7 +586,7 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) } // call USBH callback - hcd_event_xfer_complete(p_qhd->dev_addr, edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0), error_event, p_qhd->total_xferred_bytes); + hcd_event_xfer_complete(p_qhd->dev_addr, tu_edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0), error_event, p_qhd->total_xferred_bytes); p_qhd->total_xferred_bytes = 0; } @@ -718,7 +712,7 @@ static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr) for(uint32_t i=0; idev_addr = dev_addr; p_qhd->fl_inactive_next_xact = 0; - p_qhd->ep_number = edpt_number(ep_desc->bEndpointAddress); + p_qhd->ep_number = tu_edpt_number(ep_desc->bEndpointAddress); p_qhd->ep_speed = _usbh_devices[dev_addr].speed; p_qhd->data_toggle_control= (xfer_type == TUSB_XFER_CONTROL) ? 1 : 0; p_qhd->head_list_flag = (dev_addr == 0) ? 1 : 0; // addr0's endpoint is the static asyn list head @@ -826,7 +820,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c p_qhd->removing = 0; p_qhd->p_qtd_list_head = NULL; p_qhd->p_qtd_list_tail = NULL; - p_qhd->pid = edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint + p_qhd->pid = tu_edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint //------------- active, but no TD list -------------// p_qhd->qtd_overlay.halted = 0; diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index c35eaa77b..bebb8a2ef 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -315,8 +315,8 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * { (void) rhport; - uint8_t const epnum = edpt_number(ep_addr); - uint8_t const dir = edpt_dir(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); // FIXME control only for now if ( epnum == 0 ) @@ -344,14 +344,14 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * //--------------------------------------------------------------------+ static inline ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr) { - if ( edpt_number(ep_addr) == 0 ) return &ohci_data.control[dev_addr].ed; + if ( tu_edpt_number(ep_addr) == 0 ) return &ohci_data.control[dev_addr].ed; ohci_ed_t* ed_pool = ohci_data.ed_pool; for(uint32_t i=0; idev_addr, - edpt_addr(p_ed->ep_number, p_ed->pid == OHCI_PID_IN), + tu_edpt_addr(p_ed->ep_number, p_ed->pid == OHCI_PID_IN), event, xferred_bytes); } diff --git a/src/host/usbh.c b/src/host/usbh.c index 962dc04dc..369ddd2a5 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -205,12 +205,12 @@ bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8 // Data stage : first data toggle is always 1 if ( request->wLength ) { - hcd_edpt_xfer(rhport, dev_addr, edpt_addr(0, request->bmRequestType_bit.direction), data, request->wLength); + hcd_edpt_xfer(rhport, dev_addr, tu_edpt_addr(0, request->bmRequestType_bit.direction), data, request->wLength); TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL)); } // Status : data toggle is always 1 - hcd_edpt_xfer(rhport, dev_addr, edpt_addr(0, 1-request->bmRequestType_bit.direction), NULL, 0); + hcd_edpt_xfer(rhport, dev_addr, tu_edpt_addr(0, 1-request->bmRequestType_bit.direction), NULL, 0); TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL)); osal_mutex_unlock(dev->control.mutex_hdl); @@ -249,7 +249,7 @@ void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t ev { usbh_device_t* dev = &_usbh_devices[ dev_addr ]; - if (0 == edpt_number(ep_addr)) + if (0 == tu_edpt_number(ep_addr)) { dev->control.pipe_status = event; // usbh_devices[ pipe_hdl.dev_addr ].control.xferred_bytes = xferred_bytes; not yet neccessary @@ -257,7 +257,7 @@ void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t ev } else { - uint8_t drv_id = dev->ep2drv[edpt_number(ep_addr)][edpt_dir(ep_addr)]; + uint8_t drv_id = dev->ep2drv[tu_edpt_number(ep_addr)][tu_edpt_dir(ep_addr)]; TU_ASSERT(drv_id < USBH_CLASS_DRIVER_COUNT, ); if (usbh_class_drivers[drv_id].isr) @@ -689,7 +689,7 @@ static void mark_interface_endpoint(uint8_t ep2drv[8][2], uint8_t const* p_desc, { uint8_t const ep_addr = ((tusb_desc_endpoint_t const*) p_desc)->bEndpointAddress; - ep2drv[ edpt_number(ep_addr) ][ edpt_dir(ep_addr) ] = driver_id; + ep2drv[ tu_edpt_number(ep_addr) ][ tu_edpt_dir(ep_addr) ] = driver_id; } len += descriptor_len(p_desc); diff --git a/src/portable/microchip/samd21/dcd_samd21.c b/src/portable/microchip/samd21/dcd_samd21.c index 57c4c4d9d..af0721ec3 100644 --- a/src/portable/microchip/samd21/dcd_samd21.c +++ b/src/portable/microchip/samd21/dcd_samd21.c @@ -132,8 +132,8 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) { (void) rhport; - uint8_t const epnum = edpt_number(desc_edpt->bEndpointAddress); - uint8_t const dir = edpt_dir(desc_edpt->bEndpointAddress); + uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress); + uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress); UsbDeviceDescBank* bank = &sram_registers[epnum][dir]; uint32_t size_value = 0; @@ -168,8 +168,8 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t { (void) rhport; - uint8_t const epnum = edpt_number(ep_addr); - uint8_t const dir = edpt_dir(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); UsbDeviceDescBank* bank = &sram_registers[epnum][dir]; UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum]; @@ -208,19 +208,19 @@ bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr) return false; } - uint8_t const epnum = edpt_number(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum]; - return (edpt_dir(ep_addr) == TUSB_DIR_IN ) ? ep->EPINTFLAG.bit.STALL1 : ep->EPINTFLAG.bit.STALL0; + return (tu_edpt_dir(ep_addr) == TUSB_DIR_IN ) ? ep->EPINTFLAG.bit.STALL1 : ep->EPINTFLAG.bit.STALL0; } void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; - uint8_t const epnum = edpt_number(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum]; - if (edpt_dir(ep_addr) == TUSB_DIR_IN) { + if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) { ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ1; } else { ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ0; @@ -236,10 +236,10 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; - uint8_t const epnum = edpt_number(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum]; - if (edpt_dir(ep_addr) == TUSB_DIR_IN) { + if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) { ep->EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_STALLRQ1; } else { ep->EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_STALLRQ0; @@ -253,10 +253,10 @@ bool dcd_edpt_busy (uint8_t rhport, uint8_t ep_addr) // USBD shouldn't check control endpoint state if ( 0 == ep_addr ) return false; - uint8_t const epnum = edpt_number(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum]; - if (edpt_dir(ep_addr) == TUSB_DIR_IN) { + if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) { return ep->EPINTFLAG.bit.TRCPT1 == 0 && ep->EPSTATUS.bit.BK1RDY == 1; } return ep->EPINTFLAG.bit.TRCPT0 == 0 && ep->EPSTATUS.bit.BK0RDY == 1; diff --git a/src/portable/microchip/samd51/dcd_samd51.c b/src/portable/microchip/samd51/dcd_samd51.c index ba53d5598..ce66b8245 100644 --- a/src/portable/microchip/samd51/dcd_samd51.c +++ b/src/portable/microchip/samd51/dcd_samd51.c @@ -137,8 +137,8 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) { (void) rhport; - uint8_t const epnum = edpt_number(desc_edpt->bEndpointAddress); - uint8_t const dir = edpt_dir(desc_edpt->bEndpointAddress); + uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress); + uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress); UsbDeviceDescBank* bank = &sram_registers[epnum][dir]; uint32_t size_value = 0; @@ -173,8 +173,8 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t { (void) rhport; - uint8_t const epnum = edpt_number(ep_addr); - uint8_t const dir = edpt_dir(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); UsbDeviceDescBank* bank = &sram_registers[epnum][dir]; UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum]; @@ -212,19 +212,19 @@ bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr) return false; } - uint8_t const epnum = edpt_number(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum]; - return (edpt_dir(ep_addr) == TUSB_DIR_IN ) ? ep->EPINTFLAG.bit.STALL1 : ep->EPINTFLAG.bit.STALL0; + return (tu_edpt_dir(ep_addr) == TUSB_DIR_IN ) ? ep->EPINTFLAG.bit.STALL1 : ep->EPINTFLAG.bit.STALL0; } void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; - uint8_t const epnum = edpt_number(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum]; - if (edpt_dir(ep_addr) == TUSB_DIR_IN) { + if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) { ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ1; } else { ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ0; @@ -240,10 +240,10 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; - uint8_t const epnum = edpt_number(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum]; - if (edpt_dir(ep_addr) == TUSB_DIR_IN) { + if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) { ep->EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_STALLRQ1; } else { ep->EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_STALLRQ0; @@ -257,10 +257,10 @@ bool dcd_edpt_busy (uint8_t rhport, uint8_t ep_addr) // USBD shouldn't check control endpoint state if ( 0 == ep_addr ) return false; - uint8_t const epnum = edpt_number(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum]; - if (edpt_dir(ep_addr) == TUSB_DIR_IN) { + if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) { return ep->EPINTFLAG.bit.TRCPT1 == 0 && ep->EPSTATUS.bit.BK1RDY == 1; } return ep->EPINTFLAG.bit.TRCPT0 == 0 && ep->EPSTATUS.bit.BK0RDY == 1; diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index c7a4f413f..ad5090eb0 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -225,8 +225,8 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) { (void) rhport; - uint8_t const epnum = edpt_number(desc_edpt->bEndpointAddress); - uint8_t const dir = edpt_dir(desc_edpt->bEndpointAddress); + uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress); + uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress); _dcd.xfer[epnum][dir].mps = desc_edpt->wMaxPacketSize.size; @@ -248,8 +248,8 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t { (void) rhport; - uint8_t const epnum = edpt_number(ep_addr); - uint8_t const dir = edpt_dir(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); xfer_td_t* xfer = get_td(epnum, dir); @@ -295,15 +295,15 @@ bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr) // control is never got halted if ( ep_addr == 0 ) return false; - uint8_t const epnum = edpt_number(ep_addr); - return (edpt_dir(ep_addr) == TUSB_DIR_IN ) ? NRF_USBD->HALTED.EPIN[epnum] : NRF_USBD->HALTED.EPOUT[epnum]; + uint8_t const epnum = tu_edpt_number(ep_addr); + return (tu_edpt_dir(ep_addr) == TUSB_DIR_IN ) ? NRF_USBD->HALTED.EPIN[epnum] : NRF_USBD->HALTED.EPOUT[epnum]; } void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; - if ( edpt_number(ep_addr) == 0 ) + if ( tu_edpt_number(ep_addr) == 0 ) { NRF_USBD->TASKS_EP0STALL = 1; }else @@ -318,7 +318,7 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; - if ( edpt_number(ep_addr) ) + if ( tu_edpt_number(ep_addr) ) { NRF_USBD->EPSTALL = (USBD_EPSTALL_STALL_UnStall << USBD_EPSTALL_STALL_Pos) | ep_addr; __ISB(); __DSB(); @@ -330,10 +330,10 @@ bool dcd_edpt_busy (uint8_t rhport, uint8_t ep_addr) (void) rhport; // USBD shouldn't check control endpoint state - if ( 0 == edpt_number(ep_addr) ) return false; + if ( 0 == tu_edpt_number(ep_addr) ) return false; - uint8_t const epnum = edpt_number(ep_addr); - uint8_t const dir = edpt_dir(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); xfer_td_t* xfer = get_td(epnum, dir); diff --git a/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c b/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c index aa7f5e7e6..c910bf1ec 100644 --- a/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c +++ b/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c @@ -189,7 +189,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) { (void) rhport; - if ( edpt_number(ep_addr) == 0 ) + if ( tu_edpt_number(ep_addr) == 0 ) { // TODO cannot able to STALL Control OUT endpoint !!!!! FIXME try some walk-around _dcd.ep[0][0].stall = _dcd.ep[1][0].stall = 1; @@ -209,11 +209,11 @@ bool dcd_edpt_stalled(uint8_t rhport, uint8_t ep_addr) return _dcd.ep[ep_id][0].stall; } -void dcd_edpt_clear_stall(uint8_t rhport, uint8_t edpt_addr) +void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { (void) rhport; - uint8_t const ep_id = ep_addr2id(edpt_addr); + uint8_t const ep_id = ep_addr2id(ep_addr); _dcd.ep[ep_id][0].stall = 0; _dcd.ep[ep_id][0].toggle_reset = 1; diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c index 84eb0c121..82d3c3cac 100644 --- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c +++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c @@ -285,7 +285,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) { (void) rhport; - uint8_t const epnum = edpt_number(p_endpoint_desc->bEndpointAddress); + uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress); uint8_t const ep_id = ep_addr2idx(p_endpoint_desc->bEndpointAddress); // Endpoint type is fixed to endpoint number @@ -336,7 +336,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) { (void) rhport; - if ( edpt_number(ep_addr) == 0 ) + if ( tu_edpt_number(ep_addr) == 0 ) { sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+0, 1, SIE_SET_ENDPOINT_STALLED_MASK | SIE_SET_ENDPOINT_CONDITION_STALLED_MASK); }else @@ -394,9 +394,9 @@ static bool control_xact(uint8_t rhport, uint8_t dir, uint8_t * buffer, uint8_t bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) { // Control transfer is not DMA support, and must be done in slave mode - if ( edpt_number(ep_addr) == 0 ) + if ( tu_edpt_number(ep_addr) == 0 ) { - return control_xact(rhport, edpt_dir(ep_addr), buffer, (uint8_t) total_bytes); + return control_xact(rhport, tu_edpt_dir(ep_addr), buffer, (uint8_t) total_bytes); } else { diff --git a/src/portable/nxp/lpc18_43/dcd_lpc18_43.c b/src/portable/nxp/lpc18_43/dcd_lpc18_43.c index d524d9dea..70b34d848 100644 --- a/src/portable/nxp/lpc18_43/dcd_lpc18_43.c +++ b/src/portable/nxp/lpc18_43/dcd_lpc18_43.c @@ -205,8 +205,8 @@ static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes) //--------------------------------------------------------------------+ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) { - uint8_t const epnum = edpt_number(ep_addr); - uint8_t const dir = edpt_dir(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); if ( epnum == 0) { @@ -220,16 +220,16 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr) { - uint8_t const epnum = edpt_number(ep_addr); - uint8_t const dir = edpt_dir(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); return LPC_USB[rhport]->ENDPTCTRL[epnum] & (ENDPTCTRL_MASK_STALL << (dir ? 16 : 0)); } void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { - uint8_t const epnum = edpt_number(ep_addr); - uint8_t const dir = edpt_dir(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); // data toggle also need to be reset LPC_USB[rhport]->ENDPTCTRL[epnum] |= ENDPTCTRL_MASK_TOGGLE_RESET << ( dir ? 16 : 0 ); @@ -241,8 +241,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) // TODO not support ISO yet TU_VERIFY ( p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS); - uint8_t const epnum = edpt_number(p_endpoint_desc->bEndpointAddress); - uint8_t const dir = edpt_dir(p_endpoint_desc->bEndpointAddress); + uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress); + uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress); uint8_t const ep_idx = 2*epnum + dir; // USB0 has 5, USB1 has 3 non-control endpoints @@ -264,8 +264,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) bool dcd_edpt_busy(uint8_t rhport, uint8_t ep_addr) { - uint8_t const epnum = edpt_number(ep_addr); - uint8_t const dir = edpt_dir(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); uint8_t const ep_idx = 2*epnum + dir; dcd_qtd_t * p_qtd = &dcd_data_ptr[rhport]->qtd[ep_idx]; @@ -276,8 +276,8 @@ bool dcd_edpt_busy(uint8_t rhport, uint8_t ep_addr) bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) { - uint8_t const epnum = edpt_number(ep_addr); - uint8_t const dir = edpt_dir(ep_addr); + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); uint8_t const ep_idx = 2*epnum + dir; if ( epnum == 0 ) diff --git a/src/portable/nxp/lpc18_43/hcd_lpc18_43.c b/src/portable/nxp/lpc18_43/hcd_lpc18_43.c index efdf8fea4..092030056 100644 --- a/src/portable/nxp/lpc18_43/hcd_lpc18_43.c +++ b/src/portable/nxp/lpc18_43/hcd_lpc18_43.c @@ -42,6 +42,8 @@ #include "chip.h" +// LPC18xx and 43xx use EHCI driver + void hcd_int_enable(uint8_t rhport) { NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn); @@ -52,4 +54,9 @@ void hcd_int_disable(uint8_t rhport) NVIC_DisableIRQ(rhport ? USB1_IRQn : USB0_IRQn); } +uint32_t hcd_ehci_register_addr(uint8_t rhport) +{ + return (uint32_t) (rhport ? &LPC_USB1->USBCMD_H : &LPC_USB0->USBCMD_H ); +} + #endif diff --git a/tests/support/tusb_config.h b/tests/support/tusb_config.h index 4ff3965e1..fe3d59ef1 100644 --- a/tests/support/tusb_config.h +++ b/tests/support/tusb_config.h @@ -55,7 +55,7 @@ #define CFG_TUSB_HOST_DEVICE_MAX 5 // TODO be a part of HUB config //------------- CLASS -------------// -#define CFG_TUH_HUB 0 +#define CFG_TUH_HUB 1 #define CFG_TUH_HID_KEYBOARD 1 #define CFG_TUH_HID_MOUSE 1 #define CFG_TUH_MSC 1 -- cgit v1.3.1 From 6c0b0917e15ca0acf7ce9bed0f3735a794abb807 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 12 Dec 2018 12:01:15 +0700 Subject: rename descriptor_* helper to tu_desc_* --- src/class/cdc/cdc_device.c | 18 +++++++++--------- src/class/cdc/cdc_host.c | 10 +++++----- src/class/custom/custom_device.c | 2 +- src/class/custom/custom_host.c | 4 ++-- src/class/msc/msc_device.c | 10 +++++----- src/class/msc/msc_host.c | 4 ++-- src/common/tusb_types.h | 13 +++++++------ src/device/usbd.c | 14 +++++++------- src/host/hub.c | 8 ++++---- src/host/usbh.c | 14 +++++++------- 10 files changed, 49 insertions(+), 48 deletions(-) (limited to 'src/host') diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c index d477a0d23..a865ba3c5 100644 --- a/src/class/cdc/cdc_device.c +++ b/src/class/cdc/cdc_device.c @@ -229,13 +229,13 @@ void cdcd_reset(uint8_t rhport) } } -tusb_error_t cdcd_open(uint8_t rhport, tusb_desc_interface_t const * p_interface_desc, uint16_t *p_length) +tusb_error_t cdcd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t *p_length) { - if ( CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL != p_interface_desc->bInterfaceSubClass) return TUSB_ERROR_CDC_UNSUPPORTED_SUBCLASS; + if ( CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL != itf_desc->bInterfaceSubClass) return TUSB_ERROR_CDC_UNSUPPORTED_SUBCLASS; // Only support AT commands, no protocol and vendor specific commands. - if ( !(tu_within(CDC_COMM_PROTOCOL_NONE, p_interface_desc->bInterfaceProtocol, CDC_COMM_PROTOCOL_ATCOMMAND_CDMA) || - p_interface_desc->bInterfaceProtocol == 0xff ) ) + if ( !(tu_within(CDC_COMM_PROTOCOL_NONE, itf_desc->bInterfaceProtocol, CDC_COMM_PROTOCOL_ATCOMMAND_CDMA) || + itf_desc->bInterfaceProtocol == 0xff ) ) { return TUSB_ERROR_CDC_UNSUPPORTED_PROTOCOL; } @@ -252,16 +252,16 @@ tusb_error_t cdcd_open(uint8_t rhport, tusb_desc_interface_t const * p_interface } //------------- Control Interface -------------// - p_cdc->itf_num = p_interface_desc->bInterfaceNumber; + p_cdc->itf_num = itf_desc->bInterfaceNumber; - uint8_t const * p_desc = descriptor_next ( (uint8_t const *) p_interface_desc ); + uint8_t const * p_desc = tu_desc_next( itf_desc ); (*p_length) = sizeof(tusb_desc_interface_t); // Communication Functional Descriptors while( TUSB_DESC_CLASS_SPECIFIC == p_desc[DESC_OFFSET_TYPE] ) { (*p_length) += p_desc[DESC_OFFSET_LEN]; - p_desc = descriptor_next(p_desc); + p_desc = tu_desc_next(p_desc); } if ( TUSB_DESC_ENDPOINT == p_desc[DESC_OFFSET_TYPE]) @@ -271,7 +271,7 @@ tusb_error_t cdcd_open(uint8_t rhport, tusb_desc_interface_t const * p_interface p_cdc->ep_notif = ((tusb_desc_endpoint_t const *) p_desc)->bEndpointAddress; (*p_length) += p_desc[DESC_OFFSET_LEN]; - p_desc = descriptor_next(p_desc); + p_desc = tu_desc_next(p_desc); } //------------- Data Interface (if any) -------------// @@ -280,7 +280,7 @@ tusb_error_t cdcd_open(uint8_t rhport, tusb_desc_interface_t const * p_interface { // next to endpoint descritpor (*p_length) += p_desc[DESC_OFFSET_LEN]; - p_desc = descriptor_next(p_desc); + p_desc = tu_desc_next(p_desc); // Open endpoint pair with usbd helper tusb_desc_endpoint_t const *p_desc_ep = (tusb_desc_endpoint_t const *) p_desc; diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index d660cc39f..d6767d0a7 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -146,7 +146,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it uint8_t const * p_desc; cdch_data_t * p_cdc; - p_desc = descriptor_next ( (uint8_t const *) itf_desc ); + p_desc = tu_desc_next(itf_desc); p_cdc = &cdch_data[dev_addr-1]; p_cdc->itf_num = itf_desc->bInterfaceNumber; @@ -165,7 +165,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it } (*p_length) += p_desc[DESC_OFFSET_LEN]; - p_desc = descriptor_next(p_desc); + p_desc = tu_desc_next(p_desc); } if ( TUSB_DESC_ENDPOINT == p_desc[DESC_OFFSET_TYPE]) @@ -177,7 +177,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it p_cdc->ep_notif = ep_desc->bEndpointAddress; (*p_length) += p_desc[DESC_OFFSET_LEN]; - p_desc = descriptor_next(p_desc); + p_desc = tu_desc_next(p_desc); } //------------- Data Interface (if any) -------------// @@ -185,7 +185,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it (TUSB_CLASS_CDC_DATA == ((tusb_desc_interface_t const *) p_desc)->bInterfaceClass) ) { (*p_length) += p_desc[DESC_OFFSET_LEN]; - p_desc = descriptor_next(p_desc); + p_desc = tu_desc_next(p_desc); // data endpoints expected to be in pairs for(uint32_t i=0; i<2; i++) @@ -205,7 +205,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it } (*p_length) += p_desc[DESC_OFFSET_LEN]; - p_desc = descriptor_next( p_desc ); + p_desc = tu_desc_next( p_desc ); } } diff --git a/src/class/custom/custom_device.c b/src/class/custom/custom_device.c index 5abffacf6..bec6f42d1 100644 --- a/src/class/custom/custom_device.c +++ b/src/class/custom/custom_device.c @@ -76,7 +76,7 @@ tusb_error_t cusd_open(uint8_t rhport, tusb_desc_interface_t const * p_desc_itf, cusd_interface_t* p_itf = &_cusd_itf; // Open endpoint pair with usbd helper - tusb_desc_endpoint_t const *p_desc_ep = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) p_desc_itf ); + tusb_desc_endpoint_t const *p_desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next( (uint8_t const*) p_desc_itf ); TU_ASSERT_ERR( usbd_open_edpt_pair(rhport, p_desc_ep, TUSB_XFER_BULK, &p_itf->ep_out, &p_itf->ep_in) ); p_itf->itf_num = p_desc_itf->bInterfaceNumber; diff --git a/src/class/custom/custom_host.c b/src/class/custom/custom_host.c index e840a2829..894e641e8 100644 --- a/src/class/custom/custom_host.c +++ b/src/class/custom/custom_host.c @@ -111,7 +111,7 @@ tusb_error_t cush_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_ { // FIXME quick hack to test lpc1k custom class with 2 bulk endpoints uint8_t const *p_desc = (uint8_t const *) p_interface_desc; - p_desc = descriptor_next(p_desc); + p_desc = tu_desc_next(p_desc); //------------- Bulk Endpoints Descriptor -------------// for(uint32_t i=0; i<2; i++) @@ -124,7 +124,7 @@ tusb_error_t cush_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_ *p_pipe_hdl = hcd_edpt_open(dev_addr, p_endpoint, TUSB_CLASS_VENDOR_SPECIFIC); TU_ASSERT ( pipehandle_is_valid(*p_pipe_hdl), TUSB_ERROR_HCD_OPEN_PIPE_FAILED ); - p_desc = descriptor_next(p_desc); + p_desc = tu_desc_next(p_desc); } (*p_length) = sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t); diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index 83c9990d8..48f23688d 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -150,19 +150,19 @@ void mscd_reset(uint8_t rhport) tu_memclr(&_mscd_itf, sizeof(mscd_interface_t)); } -tusb_error_t mscd_open(uint8_t rhport, tusb_desc_interface_t const * p_desc_itf, uint16_t *p_len) +tusb_error_t mscd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t *p_len) { // only support SCSI's BOT protocol - TU_VERIFY( ( MSC_SUBCLASS_SCSI == p_desc_itf->bInterfaceSubClass && - MSC_PROTOCOL_BOT == p_desc_itf->bInterfaceProtocol ), TUSB_ERROR_MSC_UNSUPPORTED_PROTOCOL ); + TU_VERIFY( ( MSC_SUBCLASS_SCSI == itf_desc->bInterfaceSubClass && + MSC_PROTOCOL_BOT == itf_desc->bInterfaceProtocol ), TUSB_ERROR_MSC_UNSUPPORTED_PROTOCOL ); mscd_interface_t * p_msc = &_mscd_itf; // Open endpoint pair with usbd helper - tusb_desc_endpoint_t const *p_desc_ep = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) p_desc_itf ); + tusb_desc_endpoint_t const *p_desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next( itf_desc ); TU_ASSERT_ERR( usbd_open_edpt_pair(rhport, p_desc_ep, TUSB_XFER_BULK, &p_msc->ep_out, &p_msc->ep_in) ); - p_msc->itf_num = p_desc_itf->bInterfaceNumber; + p_msc->itf_num = itf_desc->bInterfaceNumber; (*p_len) = sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t); //------------- Queue Endpoint OUT for Command Block Wrapper -------------// diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index dd771440d..86669b279 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -300,7 +300,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it msch_interface_t* p_msc = &msch_data[dev_addr-1]; //------------- Open Data Pipe -------------// - tusb_desc_endpoint_t const * ep_desc = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) itf_desc ); + tusb_desc_endpoint_t const * ep_desc = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc); for(uint32_t i=0; i<2; i++) { @@ -317,7 +317,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it p_msc->ep_out = ep_desc->bEndpointAddress; } - ep_desc = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) ep_desc ); + ep_desc = (tusb_desc_endpoint_t const *) tu_desc_next(ep_desc); } p_msc->itf_numr = itf_desc->bInterfaceNumber; diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index cbddd4156..cf02952ab 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -395,19 +395,20 @@ static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) //--------------------------------------------------------------------+ // Descriptor helper //--------------------------------------------------------------------+ -static inline uint8_t const * descriptor_next(uint8_t const p_desc[]) +static inline uint8_t const * tu_desc_next(void const* desc) { - return p_desc + p_desc[DESC_OFFSET_LEN]; + uint8_t const* desc8 = (uint8_t const*) desc; + return desc8 + desc8[DESC_OFFSET_LEN]; } -static inline uint8_t descriptor_type(uint8_t const p_desc[]) +static inline uint8_t tu_desc_type(void const* desc) { - return p_desc[DESC_OFFSET_TYPE]; + return ((uint8_t const*) desc)[DESC_OFFSET_TYPE]; } -static inline uint8_t descriptor_len(uint8_t const p_desc[]) +static inline uint8_t tu_desc_len(void const* desc) { - return p_desc[DESC_OFFSET_LEN]; + return ((uint8_t const*) desc)[DESC_OFFSET_LEN]; } // Length of the string descriptors in bytes with slen characters diff --git a/src/device/usbd.c b/src/device/usbd.c index b63dcb131..096437747 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -436,12 +436,12 @@ static bool process_set_config(uint8_t rhport) while( p_desc < desc_cfg + cfg_len ) { // Each interface always starts with Interface or Association descriptor - if ( TUSB_DESC_INTERFACE_ASSOCIATION == descriptor_type(p_desc) ) + if ( TUSB_DESC_INTERFACE_ASSOCIATION == tu_desc_type(p_desc) ) { - p_desc = descriptor_next(p_desc); // ignore Interface Association + p_desc = tu_desc_next(p_desc); // ignore Interface Association }else { - TU_ASSERT( TUSB_DESC_INTERFACE == descriptor_type(p_desc) ); + TU_ASSERT( TUSB_DESC_INTERFACE == tu_desc_type(p_desc) ); tusb_desc_interface_t* desc_itf = (tusb_desc_interface_t*) p_desc; @@ -480,15 +480,15 @@ static void mark_interface_endpoint(uint8_t ep2drv[8][2], uint8_t const* p_desc, while( len < desc_len ) { - if ( TUSB_DESC_ENDPOINT == descriptor_type(p_desc) ) + if ( TUSB_DESC_ENDPOINT == tu_desc_type(p_desc) ) { uint8_t const ep_addr = ((tusb_desc_endpoint_t const*) p_desc)->bEndpointAddress; ep2drv[tu_edpt_number(ep_addr)][tu_edpt_dir(ep_addr)] = driver_id; } - len += descriptor_len(p_desc); - p_desc = descriptor_next(p_desc); + len += tu_desc_len(p_desc); + p_desc = tu_desc_next(p_desc); } } @@ -641,7 +641,7 @@ tusb_error_t usbd_open_edpt_pair(uint8_t rhport, tusb_desc_endpoint_t const* ep_ (*ep_out) = ep_desc->bEndpointAddress; } - ep_desc = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) ep_desc ); + ep_desc = (tusb_desc_endpoint_t const *) tu_desc_next(ep_desc); } return TUSB_ERROR_NONE; diff --git a/src/host/hub.c b/src/host/hub.c index e2e91d73d..e9f9dc7de 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -156,21 +156,21 @@ void hub_init(void) // hub_enum_sem_hdl = osal_semaphore_create( OSAL_SEM_REF(hub_enum_semaphore) ); } -bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) +bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length) { // not support multiple TT yet - if ( p_interface_desc->bInterfaceProtocol > 1 ) return false; + if ( itf_desc->bInterfaceProtocol > 1 ) return false; //------------- Open Interrupt Status Pipe -------------// tusb_desc_endpoint_t const *ep_desc; - ep_desc = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) p_interface_desc ); + ep_desc = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc); TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType); TU_ASSERT(TUSB_XFER_INTERRUPT == ep_desc->bmAttributes.xfer); TU_ASSERT(hcd_edpt_open(rhport, dev_addr, ep_desc)); - hub_data[dev_addr-1].itf_num = p_interface_desc->bInterfaceNumber; + hub_data[dev_addr-1].itf_num = itf_desc->bInterfaceNumber; hub_data[dev_addr-1].ep_status = ep_desc->bEndpointAddress; (*p_length) = sizeof(tusb_desc_interface_t) + sizeof(tusb_desc_endpoint_t); diff --git a/src/host/usbh.c b/src/host/usbh.c index 369ddd2a5..bbe60362a 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -560,9 +560,9 @@ bool enum_task(hcd_event_t* event) while( p_desc < _usbh_ctrl_buf + ((tusb_desc_configuration_t*)_usbh_ctrl_buf)->wTotalLength ) { // skip until we see interface descriptor - if ( TUSB_DESC_INTERFACE != descriptor_type(p_desc) ) + if ( TUSB_DESC_INTERFACE != tu_desc_type(p_desc) ) { - p_desc = descriptor_next(p_desc); // skip the descriptor, increase by the descriptor's length + p_desc = tu_desc_next(p_desc); // skip the descriptor, increase by the descriptor's length }else { tusb_desc_interface_t* desc_itf = (tusb_desc_interface_t*) p_desc; @@ -577,7 +577,7 @@ bool enum_task(hcd_event_t* event) if( drv_id >= USBH_CLASS_DRIVER_COUNT ) { // skip unsupported class - p_desc = descriptor_next(p_desc); + p_desc = tu_desc_next(p_desc); } else { @@ -589,7 +589,7 @@ bool enum_task(hcd_event_t* event) { // TODO Attach hub to Hub is not currently supported // skip this interface - p_desc = descriptor_next(p_desc); + p_desc = tu_desc_next(p_desc); } else { @@ -685,15 +685,15 @@ static void mark_interface_endpoint(uint8_t ep2drv[8][2], uint8_t const* p_desc, while( len < desc_len ) { - if ( TUSB_DESC_ENDPOINT == descriptor_type(p_desc) ) + if ( TUSB_DESC_ENDPOINT == tu_desc_type(p_desc) ) { uint8_t const ep_addr = ((tusb_desc_endpoint_t const*) p_desc)->bEndpointAddress; ep2drv[ tu_edpt_number(ep_addr) ][ tu_edpt_dir(ep_addr) ] = driver_id; } - len += descriptor_len(p_desc); - p_desc = descriptor_next(p_desc); + len += tu_desc_len(p_desc); + p_desc = tu_desc_next(p_desc); } } -- cgit v1.3.1 From 5fd60e57617dab3afcb03d245c25b676ef4ab65f Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 12 Dec 2018 12:36:40 +0700 Subject: clean up --- src/common/tusb_types.h | 1 - src/host/usbh.c | 10 +++------- 2 files changed, 3 insertions(+), 8 deletions(-) (limited to 'src/host') diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index cf02952ab..6f0167898 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -181,7 +181,6 @@ enum { typedef enum { TUSB_DEVICE_STATE_UNPLUG = 0 , - TUSB_DEVICE_STATE_ADDRESSED , TUSB_DEVICE_STATE_CONFIGURED , TUSB_DEVICE_STATE_SUSPENDED , }tusb_device_state_t; diff --git a/src/host/usbh.c b/src/host/usbh.c index bbe60362a..39de4f7e7 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -438,7 +438,6 @@ bool enum_task(hcd_event_t* event) #endif TU_ASSERT_ERR( usbh_pipe_control_open(0, 8) ); - dev0->state = TUSB_DEVICE_STATE_ADDRESSED; //------------- Get first 8 bytes of device descriptor to get Control Endpoint Size -------------// request = (tusb_control_request_t ) { @@ -493,7 +492,6 @@ bool enum_task(hcd_event_t* event) new_dev->hub_addr = dev0->hub_addr; new_dev->hub_port = dev0->hub_port; new_dev->speed = dev0->speed; - new_dev->state = TUSB_DEVICE_STATE_ADDRESSED; hcd_device_close(dev0->rhport, 0); // close device 0 dev0->state = TUSB_DEVICE_STATE_UNPLUG; @@ -655,13 +653,11 @@ void usbh_task(void* param) //--------------------------------------------------------------------+ static inline uint8_t get_new_address(void) { - uint8_t addr; - for (addr=1; addr <= CFG_TUSB_HOST_DEVICE_MAX; addr++) + for (uint8_t addr=1; addr <= CFG_TUSB_HOST_DEVICE_MAX; addr++) { - if (_usbh_devices[addr].state == TUSB_DEVICE_STATE_UNPLUG) - break; + if (_usbh_devices[addr].state == TUSB_DEVICE_STATE_UNPLUG) return addr; } - return addr; + return CFG_TUSB_HOST_DEVICE_MAX; } static inline uint8_t get_configure_number_for_device(tusb_desc_device_t* dev_desc) -- cgit v1.3.1 From a76d3a872651be52f61a3f8db8936c93b3340e67 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 12 Dec 2018 14:46:28 +0700 Subject: clean up --- src/host/ehci/ehci.c | 20 ++++++++++---------- src/host/hcd.h | 2 +- src/host/hub.c | 2 +- 3 files changed, 12 insertions(+), 12 deletions(-) (limited to 'src/host') diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 278765585..b46c9bc64 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -109,7 +109,7 @@ static void qtd_init (ehci_qtd_t* p_qtd, void* buffer, uint16_t total_bytes); static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type); static inline ehci_link_t* list_next (ehci_link_t *p_link_pointer); -static bool ehci_init (uint8_t hostid); +static bool ehci_init (uint8_t rhport); //--------------------------------------------------------------------+ // HCD API @@ -192,9 +192,9 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) } // EHCI controller init -static bool ehci_init(uint8_t hostid) +static bool ehci_init(uint8_t rhport) { - ehci_data.regs = (ehci_registers_t* ) hcd_ehci_register_addr(hostid); + ehci_data.regs = (ehci_registers_t* ) hcd_ehci_register_addr(rhport); ehci_registers_t* regs = ehci_data.regs; @@ -207,7 +207,7 @@ static bool ehci_init(uint8_t hostid) EHCI_INT_MASK_NXP_PERIODIC | EHCI_INT_MASK_NXP_ASYNC ; //------------- Asynchronous List -------------// - ehci_qhd_t * const async_head = qhd_async_head(hostid); + ehci_qhd_t * const async_head = qhd_async_head(rhport); tu_memclr(async_head, sizeof(ehci_qhd_t)); async_head->next.address = (uint32_t) async_head; // circular list, next is itself @@ -227,7 +227,7 @@ static bool ehci_init(uint8_t hostid) } ehci_link_t * const framelist = ehci_data.period_framelist; - ehci_link_t * const period_1ms = get_period_head(hostid, 1); + ehci_link_t * const period_1ms = get_period_head(rhport, 1); // all links --> period_head_arr[0] (1ms) // 0, 2, 4, 6 etc --> period_head_arr[1] (2ms) // 1, 5 --> period_head_arr[2] (4ms) @@ -242,15 +242,15 @@ static bool ehci_init(uint8_t hostid) for(uint32_t i=0; iterminate = 1; @@ -376,11 +376,11 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const { case TUSB_XFER_CONTROL: case TUSB_XFER_BULK: - list_head = (ehci_link_t*) qhd_async_head(_usbh_devices[dev_addr].rhport); + list_head = (ehci_link_t*) qhd_async_head(rhport); break; case TUSB_XFER_INTERRUPT: - list_head = get_period_head(_usbh_devices[dev_addr].rhport, p_qhd->interval_ms); + list_head = get_period_head(rhport, p_qhd->interval_ms); break; case TUSB_XFER_ISOCHRONOUS: diff --git a/src/host/hcd.h b/src/host/hcd.h index f93cbd2c6..e117c20ff 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -135,7 +135,7 @@ bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr); bool hcd_edpt_stalled(uint8_t dev_addr, uint8_t ep_addr); bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr); - +// TODO merge with pipe_xfer bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen); //--------------------------------------------------------------------+ diff --git a/src/host/hub.c b/src/host/hub.c index e9f9dc7de..6b87e935e 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -245,7 +245,7 @@ void hub_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xf else { // TODO [HUB] check if hub is still plugged before polling status endpoint since failed usually mean hub unplugged -// TU_ASSERT ( TUSB_ERROR_NONE == hcd_pipe_xfer(pipe_hdl, &p_hub->status_change, 1, true) ); +// TU_ASSERT ( hub_status_pipe_queue(dev_addr) ); } } -- cgit v1.3.1 From bc46dc6edf3ff4bb72fb36e74b8a7d3da447d2d4 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 13 Dec 2018 13:49:09 +0700 Subject: osal clean up remove OSAL_TASK_DEF, osal_task_create. Applicaton should create a task and call tinyusb_task(). This make API consistent with NO OS. --- docs/configuration.txt | 1 - docs/getting_started.md | 2 +- examples/device/cdc_msc_hid/src/main.c | 39 ++----------- .../cdc_msc_hid_freertos/ses/nrf5x/nrf5x.emProject | 3 +- examples/device/cdc_msc_hid_freertos/src/main.c | 65 +++++++++++----------- .../device/cdc_msc_hid_freertos/src/tusb_config.h | 8 +-- examples/host/cdc_msc_hid/src/tusb_config.h | 16 +++--- examples/obsolete/device/src/tusb_config.h | 3 - lib/FreeRTOS/freertos_hook.c | 11 ++-- src/common/tusb_fifo.c | 4 +- src/device/usbd.c | 46 +++------------ src/host/usbh.c | 44 ++++----------- src/osal/osal.h | 2 - src/osal/osal_freertos.h | 21 ------- src/osal/osal_mynewt.h | 21 ------- src/osal/osal_none.h | 10 ---- src/tusb.c | 3 - src/tusb.h | 11 ++-- src/tusb_option.h | 5 -- 19 files changed, 76 insertions(+), 239 deletions(-) (limited to 'src/host') diff --git a/docs/configuration.txt b/docs/configuration.txt index 49061a4a0..7850827f6 100644 --- a/docs/configuration.txt +++ b/docs/configuration.txt @@ -20,7 +20,6 @@ #define CFG_TUSB_MCU ///< Select one of the supported MCU, the value must be from \ref group_mcu #define CFG_TUSB_OS ///< Select one of the supported RTOS, the value must be from \ref group_supported_os. -#define CFG_TUD_TASK_PRIO ///< If \ref CFG_TUSB_OS is configured to use a real RTOS (other than OPT_OS_NONE). This determines the priority of the usb stack task. //--------------------------------------------------------------------+ // HOST CONFIGURATION diff --git a/docs/getting_started.md b/docs/getting_started.md index 6d6091c03..268811ff4 100644 --- a/docs/getting_started.md +++ b/docs/getting_started.md @@ -37,7 +37,7 @@ It is relatively simple to incorporate tinyusb to your (existing) project 1. Copy or `git submodule` this repo into your project in a subfolder. Let's say it is *your_project/tinyusb* 2. Add all the .c in the src folder to your project settings (uvproj, ewp, makefile) 3. Add *your_project/tinysb* to your include path. Also make sure your current include path also contains the configuration file tusb_config.h. Or you could simply put the tusb_config.h into the tinyusb folder as well. -4. Make sure all required macros are all defined properly in tusb_config.h (configure file in demo application is sufficient, but you need to add a few more such as CFG_TUSB_MCU, CFG_TUSB_OS, CFG_TUD_TASK_PRIO since they are passed by IDE/compiler to maintain a unique configure for all demo projects). +4. Make sure all required macros are all defined properly in tusb_config.h (configure file in demo application is sufficient, but you need to add a few more such as CFG_TUSB_MCU, CFG_TUSB_OS since they are passed by IDE/compiler to maintain a unique configure for all demo projects). 5. If you use the device stack, make sure you have created/modified usb descriptors for your own need. Ultimately you need to fill out required pointers in tusbd_descriptor_pointers for that stack to work. 6. Add tusb_init() call to your reset initialization code. 7. Implement all enabled classes's callbacks. diff --git a/examples/device/cdc_msc_hid/src/main.c b/examples/device/cdc_msc_hid/src/main.c index bc260fdfa..178609e1e 100644 --- a/examples/device/cdc_msc_hid/src/main.c +++ b/examples/device/cdc_msc_hid/src/main.c @@ -46,7 +46,6 @@ //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF PROTYPES //--------------------------------------------------------------------+ -void print_greeting(void); void led_blinking_task(void); extern void virtual_com_task(void); @@ -56,7 +55,6 @@ extern void usb_hid_task(void); int main(void) { board_init(); - print_greeting(); tusb_init(); @@ -84,9 +82,9 @@ int main(void) #if CFG_TUD_CDC void virtual_com_task(void) { - // connected and there are data available if ( tud_cdc_connected() ) { + // connected and there are data available if ( tud_cdc_available() ) { uint8_t buf[64]; @@ -98,11 +96,7 @@ void virtual_com_task(void) { tud_cdc_write_char(buf[i]); - if ( buf[i] == '\r' ) - { - tud_cdc_write_char('\n'); - tud_cdc_write_str("tinyusb cdc: "); - } + if ( buf[i] == '\r' ) tud_cdc_write_char('\n'); } tud_cdc_write_flush(); @@ -117,8 +111,8 @@ void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts) // connected if ( dtr && rts ) { - // print greeting - tud_cdc_write_str("tinyusb cdc: "); + // print initial message when connected + tud_cdc_write_str("\r\nTinyUSB CDC MSC HID device example\r\n"); } } #endif @@ -213,28 +207,3 @@ void led_blinking_task(void) board_led_control(led_state); led_state = 1 - led_state; // toggle } - -//--------------------------------------------------------------------+ -// HELPER FUNCTION -//--------------------------------------------------------------------+ -void print_greeting(void) -{ - char const * const rtos_name[] = - { - [OPT_OS_NONE] = "None", - [OPT_OS_FREERTOS] = "FreeRTOS", - }; - - printf("\n--------------------------------------------------------------------\n"); - printf("- Device Demo (a tinyusb example)\n"); - printf("- if you find any bugs or get any questions, feel free to file an\n"); - printf("- issue at https://github.com/hathach/tinyusb\n"); - printf("--------------------------------------------------------------------\n\n"); - - printf("This DEVICE demo is configured to support:"); - printf(" - RTOS = %s\n", rtos_name[CFG_TUSB_OS]); - if (CFG_TUD_CDC ) puts(" - Communication Device Class"); - if (CFG_TUD_MSC ) puts(" - Mass Storage"); - if (CFG_TUD_HID_KEYBOARD ) puts(" - HID Keyboard"); - if (CFG_TUD_HID_MOUSE ) puts(" - HID Mouse"); -} diff --git a/examples/device/cdc_msc_hid_freertos/ses/nrf5x/nrf5x.emProject b/examples/device/cdc_msc_hid_freertos/ses/nrf5x/nrf5x.emProject index 76615bf5b..ea4950682 100644 --- a/examples/device/cdc_msc_hid_freertos/ses/nrf5x/nrf5x.emProject +++ b/examples/device/cdc_msc_hid_freertos/ses/nrf5x/nrf5x.emProject @@ -18,11 +18,12 @@ arm_target_debug_interface_type="ADIv5" arm_target_device_name="nRF52840_xxAA" arm_target_interface_type="SWD" - build_treat_warnings_as_errors="Yes" + build_treat_warnings_as_errors="No" c_preprocessor_definitions="NRF52840_XXAA;__nRF_FAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;BOARD_PCA10056;CFG_TUSB_MCU=OPT_MCU_NRF5X" c_user_include_directories="./;../../src;$(rootDir)/hw/cmsis/Include;$(rootDir)/hw;$(rootDir)/src;$(nrfxDir)/..;$(nrfxDir);$(nrfxDir)/mdk;$(nrfxDir)/hal;$(nrfxDir)/drivers/include;$(freertosDir)/Source/include;$(freertosDir)/Source/portable/GCC/ARM_CM4F" debug_register_definition_file="nrf52840_Registers.xml" debug_target_connection="J-Link" + gcc_enable_all_warnings="Yes" gcc_entry_point="Reset_Handler" link_use_linker_script_file="No" linker_memory_map_file="nRF52840_xxAA_MemoryMap.xml" diff --git a/examples/device/cdc_msc_hid_freertos/src/main.c b/examples/device/cdc_msc_hid_freertos/src/main.c index fbe1ec93e..843b2b077 100644 --- a/examples/device/cdc_msc_hid_freertos/src/main.c +++ b/examples/device/cdc_msc_hid_freertos/src/main.c @@ -59,14 +59,13 @@ //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -void print_greeting(void); void led_blinky_cb(TimerHandle_t xTimer); +void usb_device_task(void* param); /*------------- MAIN -------------*/ int main(void) { board_init(); - print_greeting(); // soft timer for blinky TimerHandle_t tm_hdl = xTimerCreate(NULL, pdMS_TO_TICKS(1000), true, NULL, led_blinky_cb); @@ -74,10 +73,13 @@ int main(void) tusb_init(); + // Create a task for tinyusb device stack + xTaskCreate( usb_device_task, "usbd", 150, NULL, configMAX_PRIORITIES-1, NULL); + // Create task #if CFG_TUD_CDC extern void cdc_task(void* params); - xTaskCreate( cdc_task, "cdc", 256, NULL, 2, NULL); + xTaskCreate( cdc_task, "cdc", 256, NULL, configMAX_PRIORITIES-2, NULL); #endif #if CFG_TUD_HID @@ -90,6 +92,19 @@ int main(void) return 0; } +// USB Device Driver task +// This top level thread process all usb events and invoke callbacks +void usb_device_task(void* param) +{ + (void) param; + + // RTOS forever loop + while (1) + { + tusb_task(); + } +} + //--------------------------------------------------------------------+ // USB CDC //--------------------------------------------------------------------+ @@ -98,11 +113,12 @@ void cdc_task(void* params) { (void) params; + // RTOS forever loop while ( 1 ) { - // connected and there are data available if ( tud_cdc_connected() ) { + // connected and there are data available if ( tud_cdc_available() ) { uint8_t buf[64]; @@ -110,10 +126,15 @@ void cdc_task(void* params) // read and echo back uint32_t count = tud_cdc_read(buf, sizeof(buf)); - tud_cdc_write(buf, count); - } + for(uint32_t i=0; imutex) { - uint32_t err; - (void) err; - osal_mutex_lock(f->mutex, OSAL_TIMEOUT_WAIT_FOREVER, &err); + osal_mutex_lock(f->mutex, OSAL_TIMEOUT_WAIT_FOREVER); } } diff --git a/src/device/usbd.c b/src/device/usbd.c index 8c685d5b3..a0ff96e8e 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -36,8 +36,6 @@ */ /**************************************************************************/ -// This top level class manages the bus state and delegates events to class-specific drivers. - #include "tusb_option.h" #if TUSB_OPT_DEVICE_ENABLED @@ -52,15 +50,6 @@ #define CFG_TUD_TASK_QUEUE_SZ 16 #endif -#ifndef CFG_TUD_TASK_STACK_SZ -#define CFG_TUD_TASK_STACK_SZ 150 -#endif - -#ifndef CFG_TUD_TASK_PRIO -#define CFG_TUD_TASK_PRIO 0 -#endif - - //--------------------------------------------------------------------+ // Device Data //--------------------------------------------------------------------+ @@ -153,16 +142,14 @@ static usbd_class_driver_t const usbd_class_drivers[] = #endif }; -enum { USBD_CLASS_DRIVER_COUNT = sizeof(usbd_class_drivers) / sizeof(usbd_class_driver_t) }; - +enum { USBD_CLASS_DRIVER_COUNT = TU_ARRAY_SZIE(usbd_class_drivers) }; //--------------------------------------------------------------------+ // DCD Event //--------------------------------------------------------------------+ -OSAL_TASK_DEF(_usbd_task_def, "usbd", usbd_task, CFG_TUD_TASK_PRIO, CFG_TUD_TASK_STACK_SZ); // Event queue -// role device/host is used by OS NONE for mutex (disable usb isr) only +// OPT_MODE_DEVICE is used by OS NONE for mutex (disable usb isr) OSAL_QUEUE_DEF(OPT_MODE_DEVICE, _usbd_qdef, CFG_TUD_TASK_QUEUE_SZ, dcd_event_t); static osal_queue_t _usbd_q; @@ -195,8 +182,6 @@ bool usbd_init (void) _usbd_q = osal_queue_create(&_usbd_qdef); TU_ASSERT(_usbd_q != NULL); - osal_task_create(&_usbd_task_def); - // Init class drivers for (uint8_t i = 0; i < USBD_CLASS_DRIVER_COUNT; i++) usbd_class_drivers[i].init(); @@ -221,9 +206,13 @@ static void usbd_reset(uint8_t rhport) } } -// Main device task implementation -static void usbd_task_body(void) +/* USB Device Driver task + * This top level thread manages all device controller event and delegates events to class-specific drivers. + */ +void usbd_task( void* param) { + (void) param; + // Loop until there is no more events in the queue while (1) { @@ -297,25 +286,6 @@ static void usbd_task_body(void) } } -/* USB device task - * Thread that handles all device events. With an real RTOS, the task must be a forever loop and never return. - * For coding convenience with no RTOS, we use wrapped sub-function for processing to easily return at any time. - */ -void usbd_task( void* param) -{ - (void) param; - -#if CFG_TUSB_OS != OPT_OS_NONE - while (1) { -#endif - - usbd_task_body(); - -#if CFG_TUSB_OS != OPT_OS_NONE - } -#endif -} - //--------------------------------------------------------------------+ // Control Request Parser & Handling //--------------------------------------------------------------------+ diff --git a/src/host/usbh.c b/src/host/usbh.c index 39de4f7e7..7bcf7aaaf 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -46,15 +46,6 @@ #define CFG_TUH_TASK_QUEUE_SZ 16 #endif -#ifndef CFG_TUH_TASK_STACK_SZ -#define CFG_TUH_TASK_STACK_SZ 200 -#endif - -#ifndef CFG_TUH_TASK_PRIO -#define CFG_TUH_TASK_PRIO 0 -#endif - - //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ @@ -123,9 +114,9 @@ enum { USBH_CLASS_DRIVER_COUNT = TU_ARRAY_SZIE(usbh_class_drivers) }; //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; // including zero-address -OSAL_TASK_DEF(_usbh_task_def, "usbh", usbh_task, CFG_TUH_TASK_PRIO, CFG_TUH_TASK_STACK_SZ); +// including zero-address +CFG_TUSB_MEM_SECTION usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1]; // Event queue // role device/host is used by OS NONE for mutex (disable usb isr) only @@ -161,8 +152,6 @@ bool usbh_init(void) _usbh_q = osal_queue_create( &_usbh_qdef ); TU_ASSERT(_usbh_q != NULL); - osal_task_create(&_usbh_task_def); - //------------- Semaphore, Mutex for Control Pipe -------------// for(uint8_t i=0; ifunc, taskdef->strname, taskdef->stack_sz, NULL, taskdef->prio, (StackType_t*) taskdef->buf, &taskdef->stask); -} - static inline void osal_task_delay(uint32_t msec) { vTaskDelay( pdMS_TO_TICKS(msec) ); diff --git a/src/osal/osal_mynewt.h b/src/osal/osal_mynewt.h index 62b5b45e8..d63ea731d 100644 --- a/src/osal/osal_mynewt.h +++ b/src/osal/osal_mynewt.h @@ -46,27 +46,6 @@ //--------------------------------------------------------------------+ // TASK API //--------------------------------------------------------------------+ -#define OSAL_TASK_DEF(_name, _str, _func, _prio, _stack_sz) \ - static os_stack_t _name##_##buf[_stack_sz]; \ - osal_task_def_t _name = { .func = _func, .prio = _prio, .stack_sz = _stack_sz, .buf = _name##_##buf, .strname = _str }; - -typedef struct -{ - struct os_task mynewt_task; - osal_task_func_t func; - - uint16_t prio; - uint16_t stack_sz; - void* buf; - const char* strname; -}osal_task_def_t; - -static inline bool osal_task_create(osal_task_def_t* taskdef) -{ - return OS_OK == os_task_init(&taskdef->mynewt_task, taskdef->strname, taskdef->func, NULL, taskdef->prio, OS_WAIT_FOREVER, - (os_stack_t*) taskdef->buf, taskdef->stack_sz); -} - static inline void osal_task_delay(uint32_t msec) { os_time_delay( os_time_ms_to_ticks32(msec) ); diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h index ff37113c6..55db674ce 100644 --- a/src/osal/osal_none.h +++ b/src/osal/osal_none.h @@ -51,17 +51,7 @@ //--------------------------------------------------------------------+ // TASK API -// Virtually do nothing in osal none //--------------------------------------------------------------------+ -#define OSAL_TASK_DEF(_name, _str, _func, _prio, _stack_sz) osal_task_def_t _name; -typedef uint8_t osal_task_def_t; - -static inline bool osal_task_create(osal_task_def_t* taskdef) -{ - (void) taskdef; - return true; -} - static inline void osal_task_delay(uint32_t msec) { uint32_t start = tusb_hal_millis(); diff --git a/src/tusb.c b/src/tusb.c index 4f7996664..fd390722b 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -68,7 +68,6 @@ bool tusb_init(void) return TUSB_ERROR_NONE; } -#if CFG_TUSB_OS == OPT_OS_NONE void tusb_task(void) { #if TUSB_OPT_HOST_ENABLED @@ -79,8 +78,6 @@ void tusb_task(void) usbd_task(NULL); #endif } -#endif - /*------------------------------------------------------------------*/ /* Debug diff --git a/src/tusb.h b/src/tusb.h index 4d65c80e1..e4393d067 100644 --- a/src/tusb.h +++ b/src/tusb.h @@ -105,11 +105,9 @@ // return true if success bool tusb_init(void); -#if CFG_TUSB_OS == OPT_OS_NONE -/** \brief Run all tinyusb's internal tasks (e.g host task, device task). - * \note This function is only required when using no RTOS (\ref CFG_TUSB_OS == OPT_OS_NONE). All the stack functions - * & callback are invoked within this function. This should be called periodically within the mainloop - * +/** Run all tinyusb's internal tasks (e.g host task, device task) and invoke callback + * This should be called periodically within the mainloop. + @code int main(void) { @@ -126,10 +124,9 @@ bool tusb_init(void); } } @endcode - * + */ void tusb_task(void); -#endif /** @} */ diff --git a/src/tusb_option.h b/src/tusb_option.h index 8b2e59b17..07d8387e3 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -224,11 +224,6 @@ //------------------------------------------------------------------ // Configuration Validation //------------------------------------------------------------------ - -#if (CFG_TUSB_OS != OPT_OS_NONE) && !defined (CFG_TUD_TASK_PRIO) - #error CFG_TUD_TASK_PRIO need to be defined (hint: use the highest if possible) -#endif - #if CFG_TUD_ENDOINT0_SIZE > 64 #error Control Endpoint Max Packet Size cannot be larger than 64 #endif -- cgit v1.3.1 From af1ffe4675ca9eeeebd47a82f3508eecdc1486c5 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 13 Dec 2018 13:53:43 +0700 Subject: remove task void* param --- src/device/usbd.c | 4 +--- src/device/usbd_pvt.h | 2 +- src/host/usbh.c | 4 +--- src/host/usbh.h | 2 +- src/tusb.c | 4 ++-- 5 files changed, 6 insertions(+), 10 deletions(-) (limited to 'src/host') diff --git a/src/device/usbd.c b/src/device/usbd.c index a0ff96e8e..aa81cb118 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -209,10 +209,8 @@ static void usbd_reset(uint8_t rhport) /* USB Device Driver task * This top level thread manages all device controller event and delegates events to class-specific drivers. */ -void usbd_task( void* param) +void usbd_task (void) { - (void) param; - // Loop until there is no more events in the queue while (1) { diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h index 798a871b1..d1fccd9e0 100644 --- a/src/device/usbd_pvt.h +++ b/src/device/usbd_pvt.h @@ -52,7 +52,7 @@ extern tud_desc_set_t const* usbd_desc_set; // INTERNAL API for stack management //--------------------------------------------------------------------+ bool usbd_init (void); -void usbd_task (void* param); +void usbd_task (void); // Carry out Data and Status stage of control transfer diff --git a/src/host/usbh.c b/src/host/usbh.c index 7bcf7aaaf..27d32330a 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -602,10 +602,8 @@ bool enum_task(hcd_event_t* event) /* USB Host Driver task * This top level thread manages all host controller event and delegates events to class-specific drivers. */ -void usbh_task(void* param) +void usbh_task(void) { - (void) param; - // Loop until there is no more events in the queue while (1) { diff --git a/src/host/usbh.h b/src/host/usbh.h index 3656b9a0d..8009c5080 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -103,7 +103,7 @@ ATTR_WEAK void tuh_umount_cb(uint8_t dev_addr); #ifdef _TINY_USB_SOURCE_FILE_ bool usbh_init(void); -void usbh_task(void* param); +void usbh_task(void); bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8_t* data); diff --git a/src/tusb.c b/src/tusb.c index fd390722b..253adc59c 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -71,11 +71,11 @@ bool tusb_init(void) void tusb_task(void) { #if TUSB_OPT_HOST_ENABLED - usbh_task(NULL); + usbh_task(); #endif #if TUSB_OPT_DEVICE_ENABLED - usbd_task(NULL); + usbd_task(); #endif } -- cgit v1.3.1 From 1c49c479cabf1be9b1c22017c42a8480b26cebcb Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 13 Dec 2018 14:51:37 +0700 Subject: seperate tusb_task() to tud_task() and tuh_task() tusb_task() still exists for backward compatible --- docs/getting_started.md | 5 ++-- docs/porting.md | 4 +-- examples/device/cdc_msc_hid/src/main.c | 3 ++- examples/device/cdc_msc_hid_freertos/src/main.c | 3 ++- examples/host/cdc_msc_hid/src/main.c | 3 ++- src/class/hid/hid_device.c | 2 +- src/device/usbd.c | 18 ++++++++++++- src/device/usbd.h | 1 + src/device/usbd_pvt.h | 2 -- src/host/usbh.c | 18 ++++++++++++- src/host/usbh.h | 9 +++---- src/tusb.c | 11 -------- src/tusb.h | 34 ++++++++++--------------- 13 files changed, 64 insertions(+), 49 deletions(-) (limited to 'src/host') diff --git a/docs/getting_started.md b/docs/getting_started.md index 268811ff4..723e6d862 100644 --- a/docs/getting_started.md +++ b/docs/getting_started.md @@ -41,7 +41,7 @@ It is relatively simple to incorporate tinyusb to your (existing) project 5. If you use the device stack, make sure you have created/modified usb descriptors for your own need. Ultimately you need to fill out required pointers in tusbd_descriptor_pointers for that stack to work. 6. Add tusb_init() call to your reset initialization code. 7. Implement all enabled classes's callbacks. -8. If you don't use any RTOSes at all, you need to continuously and/or periodically call tusb_task() function. Most of the callbacks and functionality are handled and invoke within the call of that task runner. +8. If you don't use any RTOSes at all, you need to continuously and/or periodically call tud_task()/tuh_task() function. Most of the callbacks and functionality are handled and invoke within the call of that task runner. ~~~{.c} int main(void) @@ -53,7 +53,8 @@ int main(void) { your_application_code(); - tusb_task(); // handle tinyusb event, task etc ... + tud_task(); // tinyusb device task + tuh_task(); // tinyusb host task } } ~~~ diff --git a/docs/porting.md b/docs/porting.md index 040112d9c..f5af82800 100644 --- a/docs/porting.md +++ b/docs/porting.md @@ -61,7 +61,7 @@ The OPT_OS_NONE option is the only option which requires an MCU specific functio ### Device API -After the USB device is setup, the USB device code works by processing events on the main thread (by calling `tusb_task`). These events are queued by the USB interrupt handler. So, there are three parts to the device low-level API: device setup, endpoint setup and interrupt processing. +After the USB device is setup, the USB device code works by processing events on the main thread (by calling `tud_task`). These events are queued by the USB interrupt handler. So, there are three parts to the device low-level API: device setup, endpoint setup and interrupt processing. All of the code for the low-level device API is in `src/portable///dcd_.c`. @@ -164,4 +164,4 @@ At this point you should have everything working! ;-) Of course, you may not wri Use [WireShark](https://www.wireshark.org/) or [a Beagle](https://www.totalphase.com/protocols/usb/) to sniff the USB traffic. When things aren't working its likely very early in the USB enumeration process. Figuring out where can help clue in where the issue is. For example: * If the host sends a SETUP packet and its not ACKed then your USB peripheral probably isn't started correctly. * If the peripheral is started correctly but it still didn't work, then verify your usb clock is correct. (You did output a PWM based on it right? ;-) ) -* If the SETUP packet is ACKed but nothing is sent back then you interrupt handler isn't queueing the setup packet correctly. (Also, if you are using your own code instead of an example `tusb_task` may not be called.) If thats OK, the `dcd_xfer_complete` may not be setting up the next transaction correctly. +* If the SETUP packet is ACKed but nothing is sent back then you interrupt handler isn't queueing the setup packet correctly. (Also, if you are using your own code instead of an example `tud_task` may not be called.) If thats OK, the `dcd_xfer_complete` may not be setting up the next transaction correctly. diff --git a/examples/device/cdc_msc_hid/src/main.c b/examples/device/cdc_msc_hid/src/main.c index 178609e1e..a9d1f1618 100644 --- a/examples/device/cdc_msc_hid/src/main.c +++ b/examples/device/cdc_msc_hid/src/main.c @@ -60,7 +60,8 @@ int main(void) while (1) { - tusb_task(); + // tinyusb device task + tud_task(); led_blinking_task(); diff --git a/examples/device/cdc_msc_hid_freertos/src/main.c b/examples/device/cdc_msc_hid_freertos/src/main.c index 843b2b077..946972c16 100644 --- a/examples/device/cdc_msc_hid_freertos/src/main.c +++ b/examples/device/cdc_msc_hid_freertos/src/main.c @@ -101,7 +101,8 @@ void usb_device_task(void* param) // RTOS forever loop while (1) { - tusb_task(); + // tinyusb device task + tud_task(); } } diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c index ebb540782..f1139974d 100644 --- a/examples/host/cdc_msc_hid/src/main.c +++ b/examples/host/cdc_msc_hid/src/main.c @@ -62,7 +62,8 @@ int main(void) while (1) { - tusb_task(); + // tinyusb host task + tuh_task(); led_blinking_task(); diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c index bd49c157a..70aa7370d 100644 --- a/src/class/hid/hid_device.c +++ b/src/class/hid/hid_device.c @@ -340,7 +340,7 @@ bool hidd_open(uint8_t rhport, tusb_desc_interface_t const * desc_itf, uint16_t /*------------- Boot protocol only keyboard & mouse -------------*/ if (desc_itf->bInterfaceSubClass == HID_SUBCLASS_BOOT) { - TU_ASSERT(desc_itf->bInterfaceProtocol == HID_PROTOCOL_KEYBOARD || desc_itf->bInterfaceProtocol == HID_PROTOCOL_MOUSE, ERR_TUD_INVALID_DESCRIPTOR); + TU_ASSERT(desc_itf->bInterfaceProtocol == HID_PROTOCOL_KEYBOARD || desc_itf->bInterfaceProtocol == HID_PROTOCOL_MOUSE); #if CFG_TUD_HID_KEYBOARD && CFG_TUD_HID_KEYBOARD_BOOT if (desc_itf->bInterfaceProtocol == HID_PROTOCOL_KEYBOARD) diff --git a/src/device/usbd.c b/src/device/usbd.c index aa81cb118..a3fbfdff9 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -208,8 +208,24 @@ static void usbd_reset(uint8_t rhport) /* USB Device Driver task * This top level thread manages all device controller event and delegates events to class-specific drivers. + * This should be called periodically within the mainloop or rtos thread. + * + @code + int main(void) + { + application_init(); + tusb_init(); + + while(1) // the mainloop + { + application_code(); + + tud_task(); // tinyusb device task + } + } + @endcode */ -void usbd_task (void) +void tud_task (void) { // Loop until there is no more events in the queue while (1) diff --git a/src/device/usbd.h b/src/device/usbd.h index f9e0d8f4d..f9e7368ce 100644 --- a/src/device/usbd.h +++ b/src/device/usbd.h @@ -81,6 +81,7 @@ extern tud_desc_set_t tud_desc_set; // APPLICATION API //--------------------------------------------------------------------+ bool tud_mounted(void); +void tud_task (void); //--------------------------------------------------------------------+ // APPLICATION CALLBACK (WEAK is optional) diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h index d1fccd9e0..06951673f 100644 --- a/src/device/usbd_pvt.h +++ b/src/device/usbd_pvt.h @@ -52,8 +52,6 @@ extern tud_desc_set_t const* usbd_desc_set; // INTERNAL API for stack management //--------------------------------------------------------------------+ bool usbd_init (void); -void usbd_task (void); - // Carry out Data and Status stage of control transfer // - If len = 0, it is equivalent to sending status only diff --git a/src/host/usbh.c b/src/host/usbh.c index 27d32330a..d0b5edb63 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -601,8 +601,24 @@ bool enum_task(hcd_event_t* event) /* USB Host Driver task * This top level thread manages all host controller event and delegates events to class-specific drivers. + * This should be called periodically within the mainloop or rtos thread. + * + @code + int main(void) + { + application_init(); + tusb_init(); + + while(1) // the mainloop + { + application_code(); + + tuh_task(); // tinyusb host task + } + } + @endcode */ -void usbh_task(void) +void tuh_task(void) { // Loop until there is no more events in the queue while (1) diff --git a/src/host/usbh.h b/src/host/usbh.h index 8009c5080..fee1235f4 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -78,9 +78,9 @@ typedef struct { //--------------------------------------------------------------------+ // APPLICATION API //--------------------------------------------------------------------+ -//tusb_error_t tusbh_configuration_set (uint8_t dev_addr, uint8_t configure_number) ATTR_WARN_UNUSED_RESULT; -tusb_device_state_t tuh_device_get_state (uint8_t dev_addr) ATTR_WARN_UNUSED_RESULT ATTR_PURE; -static inline bool tuh_device_is_configured(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT ATTR_PURE; +void tuh_task(void); + +tusb_device_state_t tuh_device_get_state (uint8_t dev_addr); static inline bool tuh_device_is_configured(uint8_t dev_addr) { return tuh_device_get_state(dev_addr) == TUSB_DEVICE_STATE_CONFIGURED; @@ -89,7 +89,7 @@ static inline bool tuh_device_is_configured(uint8_t dev_addr) //--------------------------------------------------------------------+ // APPLICATION CALLBACK //--------------------------------------------------------------------+ -ATTR_WEAK uint8_t tuh_device_attached_cb (tusb_desc_device_t const *p_desc_device) ATTR_WARN_UNUSED_RESULT; +ATTR_WEAK uint8_t tuh_device_attached_cb (tusb_desc_device_t const *p_desc_device); /** Callback invoked when device is mounted (configured) */ ATTR_WEAK void tuh_mount_cb (uint8_t dev_addr); @@ -103,7 +103,6 @@ ATTR_WEAK void tuh_umount_cb(uint8_t dev_addr); #ifdef _TINY_USB_SOURCE_FILE_ bool usbh_init(void); -void usbh_task(void); bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8_t* data); diff --git a/src/tusb.c b/src/tusb.c index 253adc59c..ad2dcbfd3 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -68,17 +68,6 @@ bool tusb_init(void) return TUSB_ERROR_NONE; } -void tusb_task(void) -{ - #if TUSB_OPT_HOST_ENABLED - usbh_task(); - #endif - - #if TUSB_OPT_DEVICE_ENABLED - usbd_task(); - #endif -} - /*------------------------------------------------------------------*/ /* Debug *------------------------------------------------------------------*/ diff --git a/src/tusb.h b/src/tusb.h index e4393d067..3a13bbecc 100644 --- a/src/tusb.h +++ b/src/tusb.h @@ -101,32 +101,24 @@ /** \ingroup group_application_api * @{ */ -// Initialize device/host stack according to tusb_config.h -// return true if success +// Initialize device/host stack bool tusb_init(void); -/** Run all tinyusb's internal tasks (e.g host task, device task) and invoke callback - * This should be called periodically within the mainloop. +// TODO +// bool tusb_teardown(void); - @code - int main(void) - { - your_init_code(); - tusb_init(); - // other config code - - while(1) // the mainloop - { - your_application_code(); - - tusb_task(); // handle tinyusb event, task etc ... - } - } - @endcode +// backward compatible only. TODO remove later +static inline void tusb_task(void) +{ + #if TUSB_OPT_HOST_ENABLED + tuh_task(); + #endif - */ -void tusb_task(void); + #if TUSB_OPT_DEVICE_ENABLED + tud_task(); + #endif +} /** @} */ -- cgit v1.3.1 From a3713f801d97b1903593a53c02da682acb3acee0 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 14 Dec 2018 13:08:21 +0700 Subject: clean up compiler attribute --- examples/obsolete/host/src/keyboard_host_app.c | 2 +- examples/obsolete/host/src/msc_cli.c | 2 - lib/fatfs/diskio.c | 2 - src/class/cdc/cdc_rndis_host.h | 2 +- src/class/custom/custom_host.h | 2 +- src/class/hid/hid_host.h | 24 ++++----- src/class/msc/msc_host.h | 12 ++--- src/common/binary.h | 8 +-- src/common/compiler/tusb_compiler_gcc.h | 68 ++++++-------------------- src/common/compiler/tusb_compiler_iar.h | 31 +++--------- src/host/hcd.h | 2 +- src/host/hub.h | 2 +- src/host/usbh.c | 4 +- src/tusb.h | 1 + tests/support/tusb_callback.h | 2 +- 15 files changed, 49 insertions(+), 115 deletions(-) (limited to 'src/host') diff --git a/examples/obsolete/host/src/keyboard_host_app.c b/examples/obsolete/host/src/keyboard_host_app.c index 77fa8e5d3..f6cd20fda 100644 --- a/examples/obsolete/host/src/keyboard_host_app.c +++ b/examples/obsolete/host/src/keyboard_host_app.c @@ -55,7 +55,7 @@ static osal_queue_t queue_kbd_hdl; CFG_TUSB_MEM_SECTION static hid_keyboard_report_t usb_keyboard_report; -static inline uint8_t keycode_to_ascii(uint8_t modifier, uint8_t keycode) ATTR_CONST ATTR_ALWAYS_INLINE; +static inline uint8_t keycode_to_ascii(uint8_t modifier, uint8_t keycode); static inline void process_kbd_report(hid_keyboard_report_t const * report); //--------------------------------------------------------------------+ diff --git a/examples/obsolete/host/src/msc_cli.c b/examples/obsolete/host/src/msc_cli.c index fa1f986a5..0ab42e3f1 100644 --- a/examples/obsolete/host/src/msc_cli.c +++ b/examples/obsolete/host/src/msc_cli.c @@ -145,7 +145,6 @@ CFG_TUSB_MEM_SECTION uint8_t fileread_buffer[CLI_FILE_READ_BUFFER]; static char cli_buffer[CLI_MAX_BUFFER]; static char volume_label[20]; -static inline void drive_number2letter(char * p_path) ATTR_ALWAYS_INLINE; static inline void drive_number2letter(char * p_path) { if (p_path[1] == ':') @@ -154,7 +153,6 @@ static inline void drive_number2letter(char * p_path) } } -static inline void drive_letter2number(char * p_path) ATTR_ALWAYS_INLINE; static inline void drive_letter2number(char * p_path) { if (p_path[1] == ':') diff --git a/lib/fatfs/diskio.c b/lib/fatfs/diskio.c index 939015c00..7d6b5afdd 100644 --- a/lib/fatfs/diskio.c +++ b/lib/fatfs/diskio.c @@ -132,7 +132,6 @@ DRESULT disk_ioctl (BYTE pdrv, BYTE cmd, void* buff) return RES_OK; } -static inline uint8_t month2number(char* p_ch) ATTR_PURE ATTR_ALWAYS_INLINE; static inline uint8_t month2number(char* p_ch) { char const * const month_str[] = { "Jan", "Feb", "Mar", "Apr", "May", "Jun", "Jul", "Aug", "Sep", "Oct", "Nov", "Dec" }; @@ -145,7 +144,6 @@ static inline uint8_t month2number(char* p_ch) return 1; } -static inline uint8_t c2i(char ch) ATTR_CONST ATTR_ALWAYS_INLINE; static inline uint8_t c2i(char ch) { return ch - '0'; diff --git a/src/class/cdc/cdc_rndis_host.h b/src/class/cdc/cdc_rndis_host.h index 3b92d3f23..730df2e23 100644 --- a/src/class/cdc/cdc_rndis_host.h +++ b/src/class/cdc/cdc_rndis_host.h @@ -64,7 +64,7 @@ typedef struct { }rndish_data_t; void rndish_init(void); -tusb_error_t rndish_open_subtask(uint8_t dev_addr, cdch_data_t *p_cdc) ATTR_WARN_UNUSED_RESULT; +tusb_error_t rndish_open_subtask(uint8_t dev_addr, cdch_data_t *p_cdc); void rndish_xfer_isr(cdch_data_t *p_cdc, pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); void rndish_close(uint8_t dev_addr); diff --git a/src/class/custom/custom_host.h b/src/class/custom/custom_host.h index 5f9c25dda..5522db58b 100644 --- a/src/class/custom/custom_host.h +++ b/src/class/custom/custom_host.h @@ -72,7 +72,7 @@ tusb_error_t tusbh_custom_write(uint8_t dev_addr, uint16_t vendor_id, uint16_t p #ifdef _TINY_USB_SOURCE_FILE_ void cush_init(void); -tusb_error_t cush_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; +tusb_error_t cush_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length); void cush_isr(pipe_handle_t pipe_hdl, xfer_result_t event); void cush_close(uint8_t dev_addr); diff --git a/src/class/hid/hid_host.h b/src/class/hid/hid_host.h index 7336f5ada..9d4b2b5b6 100644 --- a/src/class/hid/hid_host.h +++ b/src/class/hid/hid_host.h @@ -67,7 +67,7 @@ extern uint8_t const hid_keycode_to_ascii_tbl[2][128]; // TODO used weak attr if * \retval true if device supports Keyboard interface * \retval false if device does not support Keyboard interface or is not mounted */ -bool tuh_hid_keyboard_is_mounted(uint8_t dev_addr) ATTR_PURE ATTR_WARN_UNUSED_RESULT; +bool tuh_hid_keyboard_is_mounted(uint8_t dev_addr); /** \brief Check if the interface is currently busy or not * \param[in] dev_addr device address @@ -76,7 +76,7 @@ bool tuh_hid_keyboard_is_mounted(uint8_t dev_addr) ATTR_PURE ATTR_WARN_ * \note This function is primarily used for polling/waiting result after \ref tuh_hid_keyboard_get_report. * Alternatively, asynchronous event API can be used */ -bool tuh_hid_keyboard_is_busy(uint8_t dev_addr) ATTR_PURE ATTR_WARN_UNUSED_RESULT; +bool tuh_hid_keyboard_is_busy(uint8_t dev_addr); /** \brief Perform a get report from Keyboard interface * \param[in] dev_addr device address @@ -88,7 +88,7 @@ bool tuh_hid_keyboard_is_busy(uint8_t dev_addr) ATTR_PURE ATTR_WARN_UNU * \retval TUSB_ERROR_INVALID_PARA if input parameters are not correct * \note This function is non-blocking and returns immediately. The result of usb transfer will be reported by the interface's callback function */ -tusb_error_t tuh_hid_keyboard_get_report(uint8_t dev_addr, void * p_report) /*ATTR_WARN_UNUSED_RESULT*/; +tusb_error_t tuh_hid_keyboard_get_report(uint8_t dev_addr, void * p_report); //------------- Application Callback -------------// /** \brief Callback function that is invoked when an transferring event occurred @@ -132,7 +132,7 @@ void tuh_hid_keyboard_unmounted_cb(uint8_t dev_addr); * \retval true if device supports Mouse interface * \retval false if device does not support Mouse interface or is not mounted */ -bool tuh_hid_mouse_is_mounted(uint8_t dev_addr) ATTR_PURE ATTR_WARN_UNUSED_RESULT; +bool tuh_hid_mouse_is_mounted(uint8_t dev_addr); /** \brief Check if the interface is currently busy or not * \param[in] dev_addr device address @@ -141,7 +141,7 @@ bool tuh_hid_mouse_is_mounted(uint8_t dev_addr) ATTR_PURE ATTR_WARN_UNU * \note This function is primarily used for polling/waiting result after \ref tuh_hid_mouse_get_report. * Alternatively, asynchronous event API can be used */ -bool tuh_hid_mouse_is_busy(uint8_t dev_addr) ATTR_PURE ATTR_WARN_UNUSED_RESULT; +bool tuh_hid_mouse_is_busy(uint8_t dev_addr); /** \brief Perform a get report from Mouse interface * \param[in] dev_addr device address @@ -153,7 +153,7 @@ bool tuh_hid_mouse_is_busy(uint8_t dev_addr) ATTR_PURE ATTR_WARN_UNUSED * \retval TUSB_ERROR_INVALID_PARA if input parameters are not correct * \note This function is non-blocking and returns immediately. The result of usb transfer will be reported by the interface's callback function */ -tusb_error_t tuh_hid_mouse_get_report(uint8_t dev_addr, void* p_report) /*ATTR_WARN_UNUSED_RESULT*/; +tusb_error_t tuh_hid_mouse_get_report(uint8_t dev_addr, void* p_report); //------------- Application Callback -------------// /** \brief Callback function that is invoked when an transferring event occurred @@ -192,11 +192,11 @@ void tuh_hid_mouse_unmounted_cb(uint8_t dev_addr); * The interface API includes status checking function, data transferring function and callback functions * @{ */ -bool tuh_hid_generic_is_mounted(uint8_t dev_addr) ATTR_PURE ATTR_WARN_UNUSED_RESULT; -tusb_error_t tuh_hid_generic_get_report(uint8_t dev_addr, void* p_report, bool int_on_complete) ATTR_WARN_UNUSED_RESULT; -tusb_error_t tuh_hid_generic_set_report(uint8_t dev_addr, void* p_report, bool int_on_complete) ATTR_WARN_UNUSED_RESULT; -tusb_interface_status_t tuh_hid_generic_get_status(uint8_t dev_addr) ATTR_WARN_UNUSED_RESULT; -tusb_interface_status_t tuh_hid_generic_set_status(uint8_t dev_addr) ATTR_WARN_UNUSED_RESULT; +bool tuh_hid_generic_is_mounted(uint8_t dev_addr); +tusb_error_t tuh_hid_generic_get_report(uint8_t dev_addr, void* p_report, bool int_on_complete); +tusb_error_t tuh_hid_generic_set_report(uint8_t dev_addr, void* p_report, bool int_on_complete); +tusb_interface_status_t tuh_hid_generic_get_status(uint8_t dev_addr); +tusb_interface_status_t tuh_hid_generic_set_status(uint8_t dev_addr); //------------- Application Callback -------------// void tuh_hid_generic_isr(uint8_t dev_addr, xfer_result_t event); @@ -216,7 +216,7 @@ typedef struct { }hidh_interface_info_t; void hidh_init(void); -bool hidh_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; +bool hidh_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length); void hidh_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); void hidh_close(uint8_t dev_addr); diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index 968d221b4..9035cb845 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -60,7 +60,7 @@ * \retval true if device supports * \retval false if device does not support or is not mounted */ -bool tuh_msc_is_mounted(uint8_t dev_addr) ATTR_PURE ATTR_WARN_UNUSED_RESULT; +bool tuh_msc_is_mounted(uint8_t dev_addr); /** \brief Check if the interface is currently busy or not * \param[in] dev_addr device address @@ -70,7 +70,7 @@ bool tuh_msc_is_mounted(uint8_t dev_addr) ATTR_PURE ATTR_WARN_UNUSED_RE * can be scheduled. User needs to make sure the corresponding interface is mounted (by \ref tuh_msc_is_mounted) * before calling this function */ -bool tuh_msc_is_busy(uint8_t dev_addr) ATTR_PURE ATTR_WARN_UNUSED_RESULT; +bool tuh_msc_is_busy(uint8_t dev_addr); /** \brief Get SCSI vendor's name of MassStorage device * \param[in] dev_addr device address @@ -113,7 +113,7 @@ tusb_error_t tuh_msc_get_capacity(uint8_t dev_addr, uint32_t* p_last_lba, uint32 * \retval TUSB_ERROR_INVALID_PARA if input parameters are not correct * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by the interface's callback function */ -tusb_error_t tuh_msc_read10 (uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count) ATTR_WARN_UNUSED_RESULT; +tusb_error_t tuh_msc_read10 (uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count); /** \brief Perform SCSI WRITE 10 command to write data to MassStorage device * \param[in] dev_addr device address @@ -127,7 +127,7 @@ tusb_error_t tuh_msc_read10 (uint8_t dev_addr, uint8_t lun, void * p_buffer, uin * \retval TUSB_ERROR_INVALID_PARA if input parameters are not correct * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by the interface's callback function */ -tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffer, uint32_t lba, uint16_t block_count) ATTR_WARN_UNUSED_RESULT; +tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffer, uint32_t lba, uint16_t block_count); /** \brief Perform SCSI REQUEST SENSE command, used to retrieve sense data from MassStorage device * \param[in] dev_addr device address @@ -150,11 +150,11 @@ tusb_error_t tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, uint8_t *p_dat * \retval TUSB_ERROR_INVALID_PARA if input parameters are not correct * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by the interface's callback function */ -tusb_error_t tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, msc_csw_t * p_csw) ATTR_WARN_UNUSED_RESULT; // TODO to be refractor +tusb_error_t tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, msc_csw_t * p_csw); // TODO to be refractor //tusb_error_t tusbh_msc_scsi_send(uint8_t dev_addr, uint8_t lun, bool is_direction_in, // uint8_t const * p_command, uint8_t cmd_len, -// uint8_t * p_response, uint32_t resp_len) ATTR_WARN_UNUSED_RESULT; +// uint8_t * p_response, uint32_t resp_len); //------------- Application Callback -------------// /** \brief Callback function that will be invoked when a device with MassStorage interface is mounted diff --git a/src/common/binary.h b/src/common/binary.h index 3ab87e3f8..7a93ee709 100644 --- a/src/common/binary.h +++ b/src/common/binary.h @@ -57,41 +57,35 @@ #define BIT_CLR_(x, n) ( (x) & (~BIT_(n)) ) ///< clear n-th bit of x #define BIT_TEST_(x, n) ( ((x) & BIT_(n)) ? true : false ) ///< check if n-th bit of x is 1 -static inline uint32_t bit_set(uint32_t value, uint8_t n) ATTR_CONST ATTR_ALWAYS_INLINE; static inline uint32_t bit_set(uint32_t value, uint8_t n) { return value | BIT_(n); } -static inline uint32_t bit_clear(uint32_t value, uint8_t n) ATTR_CONST ATTR_ALWAYS_INLINE; static inline uint32_t bit_clear(uint32_t value, uint8_t n) { return value & (~BIT_(n)); } -static inline bool bit_test(uint32_t value, uint8_t n) ATTR_CONST ATTR_ALWAYS_INLINE; static inline bool bit_test(uint32_t value, uint8_t n) { return (value & BIT_(n)) ? true : false; } ///< create a mask with n-bit lsb set to 1 -static inline uint32_t bit_mask(uint8_t n) ATTR_CONST ATTR_ALWAYS_INLINE; static inline uint32_t bit_mask(uint8_t n) { return (n < 32) ? ( BIT_(n) - 1 ) : UINT32_MAX; } -static inline uint32_t bit_mask_range(uint8_t start, uint32_t end) ATTR_CONST ATTR_ALWAYS_INLINE; static inline uint32_t bit_mask_range(uint8_t start, uint32_t end) { return bit_mask(end+1) & ~ bit_mask(start); } -static inline uint32_t bit_set_range(uint32_t value, uint8_t start, uint8_t end, uint32_t pattern) ATTR_CONST ATTR_ALWAYS_INLINE; static inline uint32_t bit_set_range(uint32_t value, uint8_t start, uint8_t end, uint32_t pattern) { - return ( value & ~bit_mask_range(start, end) ) | (pattern << start); + return ( value & ~bit_mask_range(start, end) ) | (pattern << start); } diff --git a/src/common/compiler/tusb_compiler_gcc.h b/src/common/compiler/tusb_compiler_gcc.h index e40ad9c41..6ea89f24f 100644 --- a/src/common/compiler/tusb_compiler_gcc.h +++ b/src/common/compiler/tusb_compiler_gcc.h @@ -1,6 +1,6 @@ /**************************************************************************/ /*! - @file compiler_gcc.h + @file tusb_compiler_gcc.h @author hathach (tinyusb.org) @section LICENSE @@ -49,72 +49,34 @@ #define ALIGN_OF(x) __alignof__(x) -/// Normally, the compiler places the objects it generates in sections like data or bss & function in text. Sometimes, however, you need additional sections, or you need certain particular variables to appear in special sections, for example to map to special hardware. The section attribute specifies that a variable (or function) lives in a particular section -#define ATTR_SECTION(sec_name) __attribute__ (( section(#sec_name) )) - -/// If this attribute is used on a function declaration and a call to such a function is not eliminated through dead code elimination or other optimizations, an error that includes message is diagnosed. This is useful for compile-time checking -#define ATTR_ERROR(Message) __attribute__ ((error(Message))) - -/// If this attribute is used on a function declaration and a call to such a function is not eliminated through dead code elimination or other optimizations, a warning that includes message is diagnosed. This is useful for compile-time checking -#define ATTR_WARNING(Message) __attribute__ ((warning(Message))) - -/** \defgroup Group_VariableAttr Variable Attributes - * @{ */ - /// This attribute specifies a minimum alignment for the variable or structure field, measured in bytes #define ATTR_ALIGNED(Bytes) __attribute__ ((aligned(Bytes))) -/// The packed attribute specifies that a variable or structure field should have the smallest possible alignment—one byte for a variable, and one bit for a field, unless you specify a larger value with the aligned attribute +/// Place variable in a specific section +#define ATTR_SECTION(sec_name) __attribute__ (( section(#sec_name) )) + +/// The packed attribute specifies that a variable or structure field should have +/// the smallest possible alignment—one byte for a variable, and one bit for a field. #define ATTR_PACKED __attribute__ ((packed)) #define ATTR_PREPACKED -/** @} */ - -/** \defgroup Group_FuncAttr Function Attributes - * @{ */ - -/// Generally, functions are not inlined unless optimization is specified. For functions declared inline, this attribute inlines the function even if no optimization level is specified +/// This attribute inlines the function even if no optimization level is specified #define ATTR_ALWAYS_INLINE __attribute__ ((always_inline)) -/// The nonnull attribute specifies that some function parameters should be non-null pointers. f the compiler determines that a null pointer is passed in an argument slot marked as non-null, and the -Wnonnull option is enabled, a warning is issued. All pointer arguments are marked as non-null -#define ATTR_NON_NULL __attribute__ ((nonull)) +/// The deprecated attribute results in a warning if the function is used anywhere in the source file. +/// This is useful when identifying functions that are expected to be removed in a future version of a program. +#define ATTR_DEPRECATED(mess) __attribute__ ((deprecated(mess))) -/// Many functions have no effects except the return value and their return value depends only on the parameters and/or global variables. Such a function can be subject to common subexpression elimination and loop optimization just as an arithmetic operator would be. These functions should be declared with the attribute pure -#define ATTR_PURE __attribute__ ((pure)) - -/// \brief Many functions do not examine any values except their arguments, and have no effects except the return value. Basically this is just slightly more strict class than the pure attribute below, since function is not allowed to read global memory. -/// Note that a function that has pointer arguments and examines the data pointed to must not be declared const. Likewise, a function that calls a non-const function usually must not be const. It does not make sense for a const function to return void -#define ATTR_CONST __attribute__ ((const)) - -/// The deprecated attribute results in a warning if the function is used anywhere in the source file. This is useful when identifying functions that are expected to be removed in a future version of a program. The warning also includes the location of the declaration of the deprecated function, to enable users to easily find further information about why the function is deprecated, or what they should do instead. Note that the warnings only occurs for uses -#define ATTR_DEPRECATED __attribute__ ((deprecated)) - -/// Same as the deprecated attribute with optional message in the warning -#define ATTR_DEPRECATED_MESS(mess) __attribute__ ((deprecated(mess))) - -/// The weak attribute causes the declaration to be emitted as a weak symbol rather than a global. This is primarily useful in defining library functions that can be overridden in user code +/// The weak attribute causes the declaration to be emitted as a weak symbol rather than a global. +/// This is primarily useful in defining library functions that can be overridden in user code #define ATTR_WEAK __attribute__ ((weak)) -/// The alias attribute causes the declaration to be emitted as an alias for another symbol, which must be specified -#define ATTR_ALIAS(func) __attribute__ ((alias(#func))) - -/// The weakref attribute marks a declaration as a weak reference. It is equivalent with weak + alias attribute, but require function is static -#define ATTR_WEAKREF(func) __attribute__ ((weakref(#func))) - -/// The warn_unused_result attribute causes a warning to be emitted if a caller of the function with this attribute does not use its return value. This is useful for functions where not checking the result is either a security problem or always a bug +/// Warn if a caller of the function with this attribute does not use its return value. #define ATTR_WARN_UNUSED_RESULT __attribute__ ((warn_unused_result)) -/// This attribute, attached to a function, means that code must be emitted for the function even if it appears that the function is not referenced. This is useful, for example, when the function is referenced only in inline assembly. -#define ATTR_USED __attribute__ ((used)) - -/// This attribute, attached to a function, means that the function is meant to be possibly unused. GCC does not produce a warning for this function. +/// Function is meant to be possibly unused. GCC does not produce a warning for this function. #define ATTR_UNUSED __attribute__ ((unused)) -/** @} */ - -/** \defgroup Group_BuiltinFunc Built-in Functions -* @{ */ - // TODO mcu specific #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ #define __n2be(x) __builtin_bswap32(x) ///< built-in function to convert 32-bit from native to Big Endian @@ -124,8 +86,6 @@ #define __be2n_16(u16) __n2be_16(u16) #endif -/** @} */ - #ifdef __cplusplus } #endif diff --git a/src/common/compiler/tusb_compiler_iar.h b/src/common/compiler/tusb_compiler_iar.h index 1f8936859..d62a65e27 100644 --- a/src/common/compiler/tusb_compiler_iar.h +++ b/src/common/compiler/tusb_compiler_iar.h @@ -1,6 +1,6 @@ /**************************************************************************/ /*! - @file compiler_iar.h + @file tusb_compiler_iar.h @author hathach (tinyusb.org) @section LICENSE @@ -36,15 +36,6 @@ */ /**************************************************************************/ -/** \file - * \brief IAR Compiler - */ - -/** \ingroup Group_Compiler - * \defgroup Group_IAR IAR ARM - * @{ - */ - #ifndef _TUSB_COMPILER_IAR_H_ #define _TUSB_COMPILER_IAR_H_ @@ -52,24 +43,17 @@ extern "C" { #endif -#define ALIGN_OF(x) __ALIGNOF__(x) -#define ATTR_PREPACKED __packed -#define ATTR_PACKED +#define ALIGN_OF(x) __ALIGNOF__(x) +#define ATTR_ALIGNED(bytes) _Pragma(XSTRING_(data_alignment=##bytes)) //#define ATTR_SECTION(section) _Pragma((#section)) +#define ATTR_PREPACKED __packed +#define ATTR_PACKED -#define ATTR_ALIGNED(bytes) _Pragma(XSTRING_(data_alignment=##bytes)) - -#ifndef ATTR_ALWAYS_INLINE -/// Generally, functions are not inlined unless optimization is specified. For functions declared inline, this attribute inlines the function even if no optimization level is specified -#define ATTR_ALWAYS_INLINE error -#endif - -#define ATTR_PURE // TODO IAR pure function attribute -#define ATTR_CONST // TODO IAR const function attribute +#define ATTR_ALWAYS_INLINE +#define ATTR_DEPRECATED(mess) #define ATTR_WEAK __weak #define ATTR_WARN_UNUSED_RESULT -#define ATTR_USED #define ATTR_UNUSED // built-in function to convert 32-bit Big-Endian to Little-Endian @@ -86,4 +70,3 @@ #endif /* _TUSB_COMPILER_IAR_H_ */ -/** @} */ diff --git a/src/host/hcd.h b/src/host/hcd.h index e117c20ff..8753543d6 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -146,7 +146,7 @@ bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], ui bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete); #if 0 -tusb_error_t hcd_pipe_cancel()ATTR_WARN_UNUSED_RESULT; +tusb_error_t hcd_pipe_cancel(); #endif #ifdef __cplusplus diff --git a/src/host/hub.h b/src/host/hub.h index f8d8a4c6a..626cb4592 100644 --- a/src/host/hub.h +++ b/src/host/hub.h @@ -195,7 +195,7 @@ bool hub_status_pipe_queue(uint8_t dev_addr); #ifdef _TINY_USB_SOURCE_FILE_ void hub_init(void); -bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT; +bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length); void hub_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); void hub_close(uint8_t dev_addr); diff --git a/src/host/usbh.c b/src/host/usbh.c index d0b5edb63..4334729e9 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -128,8 +128,8 @@ CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4) static uint8_t _usbh_ctrl_buf[CFG_TUSB_HOST //------------- Reporter Task Data -------------// //------------- Helper Function Prototypes -------------// -static inline uint8_t get_new_address(void) ATTR_ALWAYS_INLINE; -static inline uint8_t get_configure_number_for_device(tusb_desc_device_t* dev_desc) ATTR_ALWAYS_INLINE; +static inline uint8_t get_new_address(void); +static inline uint8_t get_configure_number_for_device(tusb_desc_device_t* dev_desc); static void mark_interface_endpoint(uint8_t ep2drv[8][2], uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id); //--------------------------------------------------------------------+ diff --git a/src/tusb.h b/src/tusb.h index 3a13bbecc..389bf54d4 100644 --- a/src/tusb.h +++ b/src/tusb.h @@ -109,6 +109,7 @@ bool tusb_init(void); // backward compatible only. TODO remove later +ATTR_DEPRECATED("Please use either tud_task() or tuh_task()") static inline void tusb_task(void) { #if TUSB_OPT_HOST_ENABLED diff --git a/tests/support/tusb_callback.h b/tests/support/tusb_callback.h index 03fa60b5d..bd5a2dacf 100644 --- a/tests/support/tusb_callback.h +++ b/tests/support/tusb_callback.h @@ -60,7 +60,7 @@ #include "usbh.h" //------------- core -------------// -uint8_t tusbh_device_attached_cb (tusb_desc_device_t const *p_desc_device) ATTR_WEAK ATTR_WARN_UNUSED_RESULT; +uint8_t tusbh_device_attached_cb (tusb_desc_device_t const *p_desc_device) ATTR_WEAK; void tusbh_device_mount_succeed_cb (uint8_t dev_addr) ATTR_WEAK; void tusbh_device_mount_failed_cb(tusb_error_t error, tusb_desc_device_t const *p_desc_device) ATTR_WEAK; -- cgit v1.3.1 From 2a60427bdc7d23d7c1ab1e687f5a8d9555a69f15 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 14 Dec 2018 15:28:38 +0700 Subject: rename bit_* helper to tu_bit_*, BIT_* to TU_BIT_* for consistency --- hw/bsp/ea4088qs/board_ea4088qs.c | 6 +- hw/bsp/ea4357/board_ea4357.c | 6 +- hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c | 4 +- hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c | 6 +- hw/bsp/mcb1800/board_mcb1800.c | 6 +- src/class/cdc/cdc_device.c | 4 +- src/class/custom/custom_host.h | 2 +- src/class/hid/hid.h | 36 ++++----- src/class/msc/msc_device.c | 4 +- src/common/binary.h | 55 ++++++------- src/common/tusb_types.h | 6 +- src/host/ehci/ehci.c | 14 ++-- src/host/ehci/ehci.h | 24 +++--- src/host/hub.c | 4 +- src/host/ohci/ohci.c | 58 +++++++------- src/portable/nordic/nrf5x/dcd_nrf5x.c | 18 ++--- src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c | 32 ++++---- src/portable/nxp/lpc17_40/dcd_lpc17_40.c | 28 +++---- src/portable/nxp/lpc17_40/dcd_lpc17_40.h | 78 +++++++++---------- src/portable/nxp/lpc18_43/dcd_lpc18_43.c | 10 +-- src/portable/nxp/lpc18_43/dcd_lpc18_43.h | 36 ++++----- tests/lpc175x_6x/test/test_dcd_lpc175x_6x.c | 4 +- tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c | 6 +- tests/lpc18xx_43xx/test/host/ehci/test_ehci_init.c | 2 +- .../test/host/ehci/test_pipe_interrupt_open.c | 2 +- tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c | 2 +- tests/lpc18xx_43xx/test/host/usbh/test_usbh.c | 4 +- tests/lpc18xx_43xx/test/test_assertion.c | 14 ++-- tests/lpc18xx_43xx/test/test_binary.c | 89 +++++++++------------- 29 files changed, 266 insertions(+), 294 deletions(-) (limited to 'src/host') diff --git a/hw/bsp/ea4088qs/board_ea4088qs.c b/hw/bsp/ea4088qs/board_ea4088qs.c index 0875a8870..d2bf409aa 100644 --- a/hw/bsp/ea4088qs/board_ea4088qs.c +++ b/hw/bsp/ea4088qs/board_ea4088qs.c @@ -103,7 +103,7 @@ void board_init(void) Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN); //------------- BUTTON -------------// -// for(uint8_t i=0; iwValue, 0), BIT_TEST_(request->wValue, 1)); + if ( tud_cdc_line_state_cb) tud_cdc_line_state_cb(itf, TU_BIT_TEST(request->wValue, 0), TU_BIT_TEST(request->wValue, 1)); break; default: return false; // stall unsupported request diff --git a/src/class/custom/custom_host.h b/src/class/custom/custom_host.h index 5522db58b..a5fcb6fb4 100644 --- a/src/class/custom/custom_host.h +++ b/src/class/custom/custom_host.h @@ -62,7 +62,7 @@ static inline bool tusbh_custom_is_mounted(uint8_t dev_addr, uint16_t vendor_id, { (void) vendor_id; // TODO check this later (void) product_id; -// return (tusbh_device_get_mounted_class_flag(dev_addr) & BIT_(TUSB_CLASS_MAPPED_INDEX_END-1) ) != 0; +// return (tusbh_device_get_mounted_class_flag(dev_addr) & TU_BIT(TUSB_CLASS_MAPPED_INDEX_END-1) ) != 0; return false; } diff --git a/src/class/hid/hid.h b/src/class/hid/hid.h index 8bfede2da..2e2b45585 100644 --- a/src/class/hid/hid.h +++ b/src/class/hid/hid.h @@ -173,11 +173,11 @@ typedef struct ATTR_PACKED /// Standard Mouse Buttons Bitmap typedef enum { - MOUSE_BUTTON_LEFT = BIT_(0), ///< Left button - MOUSE_BUTTON_RIGHT = BIT_(1), ///< Right button - MOUSE_BUTTON_MIDDLE = BIT_(2), ///< Middle button - MOUSE_BUTTON_BACKWARD = BIT_(3), ///< Backward button, - MOUSE_BUTTON_FORWARD = BIT_(4), ///< Forward button, + MOUSE_BUTTON_LEFT = TU_BIT(0), ///< Left button + MOUSE_BUTTON_RIGHT = TU_BIT(1), ///< Right button + MOUSE_BUTTON_MIDDLE = TU_BIT(2), ///< Middle button + MOUSE_BUTTON_BACKWARD = TU_BIT(3), ///< Backward button, + MOUSE_BUTTON_FORWARD = TU_BIT(4), ///< Forward button, }hid_mouse_button_bm_t; /// @} @@ -199,23 +199,23 @@ typedef struct ATTR_PACKED /// Keyboard modifier codes bitmap typedef enum { - KEYBOARD_MODIFIER_LEFTCTRL = BIT_(0), ///< Left Control - KEYBOARD_MODIFIER_LEFTSHIFT = BIT_(1), ///< Left Shift - KEYBOARD_MODIFIER_LEFTALT = BIT_(2), ///< Left Alt - KEYBOARD_MODIFIER_LEFTGUI = BIT_(3), ///< Left Window - KEYBOARD_MODIFIER_RIGHTCTRL = BIT_(4), ///< Right Control - KEYBOARD_MODIFIER_RIGHTSHIFT = BIT_(5), ///< Right Shift - KEYBOARD_MODIFIER_RIGHTALT = BIT_(6), ///< Right Alt - KEYBOARD_MODIFIER_RIGHTGUI = BIT_(7) ///< Right Window + KEYBOARD_MODIFIER_LEFTCTRL = TU_BIT(0), ///< Left Control + KEYBOARD_MODIFIER_LEFTSHIFT = TU_BIT(1), ///< Left Shift + KEYBOARD_MODIFIER_LEFTALT = TU_BIT(2), ///< Left Alt + KEYBOARD_MODIFIER_LEFTGUI = TU_BIT(3), ///< Left Window + KEYBOARD_MODIFIER_RIGHTCTRL = TU_BIT(4), ///< Right Control + KEYBOARD_MODIFIER_RIGHTSHIFT = TU_BIT(5), ///< Right Shift + KEYBOARD_MODIFIER_RIGHTALT = TU_BIT(6), ///< Right Alt + KEYBOARD_MODIFIER_RIGHTGUI = TU_BIT(7) ///< Right Window }hid_keyboard_modifier_bm_t; typedef enum { - KEYBOARD_LED_NUMLOCK = BIT_(0), ///< Num Lock LED - KEYBOARD_LED_CAPSLOCK = BIT_(1), ///< Caps Lock LED - KEYBOARD_LED_SCROLLLOCK = BIT_(2), ///< Scroll Lock LED - KEYBOARD_LED_COMPOSE = BIT_(3), ///< Composition Mode - KEYBOARD_LED_KANA = BIT_(4) ///< Kana mode + KEYBOARD_LED_NUMLOCK = TU_BIT(0), ///< Num Lock LED + KEYBOARD_LED_CAPSLOCK = TU_BIT(1), ///< Caps Lock LED + KEYBOARD_LED_SCROLLLOCK = TU_BIT(2), ///< Scroll Lock LED + KEYBOARD_LED_COMPOSE = TU_BIT(3), ///< Composition Mode + KEYBOARD_LED_KANA = TU_BIT(4) ///< Kana mode }hid_keyboard_led_bm_t; /// @} diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index d4d115bce..5d2758414 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -385,7 +385,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t p_csw->status = MSC_CSW_STATUS_PASSED; } } - else if ( !BIT_TEST_(p_cbw->dir, 7) ) + else if ( !TU_BIT_TEST(p_cbw->dir, 7) ) { // OUT transfer TU_ASSERT( dcd_edpt_xfer(rhport, p_msc->ep_out, _mscd_buf, p_msc->total_len) ); @@ -426,7 +426,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t case MSC_STAGE_DATA: // OUT transfer, invoke callback if needed - if ( !BIT_TEST_(p_cbw->dir, 7) ) + if ( !TU_BIT_TEST(p_cbw->dir, 7) ) { if ( SCSI_CMD_WRITE_10 != p_cbw->command[0] ) { diff --git a/src/common/binary.h b/src/common/binary.h index 7a93ee709..5bc364f2f 100644 --- a/src/common/binary.h +++ b/src/common/binary.h @@ -52,49 +52,38 @@ #include "tusb_compiler.h" //------------- Bit manipulation -------------// -#define BIT_(n) (1U << (n)) ///< n-th Bit -#define BIT_SET_(x, n) ( (x) | BIT_(n) ) ///< set n-th bit of x to 1 -#define BIT_CLR_(x, n) ( (x) & (~BIT_(n)) ) ///< clear n-th bit of x -#define BIT_TEST_(x, n) ( ((x) & BIT_(n)) ? true : false ) ///< check if n-th bit of x is 1 +#define TU_BIT(n) (1U << (n)) ///< n-th Bit +#define TU_BIT_SET(x, n) ( (x) | TU_BIT(n) ) ///< set n-th bit of x to 1 +#define TU_BIT_CLEAR(x, n) ( (x) & (~TU_BIT(n)) ) ///< clear n-th bit of x +#define TU_BIT_TEST(x, n) ( ((x) & TU_BIT(n)) ? true : false ) ///< check if n-th bit of x is 1 -static inline uint32_t bit_set(uint32_t value, uint8_t n) +static inline uint32_t tu_bit_set(uint32_t value, uint8_t n) { - return value | BIT_(n); + return value | TU_BIT(n); } -static inline uint32_t bit_clear(uint32_t value, uint8_t n) +static inline uint32_t tu_bit_clear(uint32_t value, uint8_t n) { - return value & (~BIT_(n)); + return value & (~TU_BIT(n)); } -static inline bool bit_test(uint32_t value, uint8_t n) +static inline bool tu_bit_test(uint32_t value, uint8_t n) { - return (value & BIT_(n)) ? true : false; + return (value & TU_BIT(n)) ? true : false; } ///< create a mask with n-bit lsb set to 1 -static inline uint32_t bit_mask(uint8_t n) +static inline uint32_t tu_bit_mask(uint8_t n) { - return (n < 32) ? ( BIT_(n) - 1 ) : UINT32_MAX; + return (n < 32) ? ( TU_BIT(n) - 1 ) : UINT32_MAX; } -static inline uint32_t bit_mask_range(uint8_t start, uint32_t end) -{ - return bit_mask(end+1) & ~ bit_mask(start); -} - -static inline uint32_t bit_set_range(uint32_t value, uint8_t start, uint8_t end, uint32_t pattern) -{ - return ( value & ~bit_mask_range(start, end) ) | (pattern << start); -} - - //------------- Binary Constant -------------// #if defined(__GNUC__) && !defined(__CC_ARM) -#define BIN8(x) ((uint8_t) (0b##x)) -#define BIN16(b1, b2) ((uint16_t) (0b##b1##b2)) -#define BIN32(b1, b2, b3, b4) ((uint32_t) (0b##b1##b2##b3##b4)) +#define TU_BIN8(x) ((uint8_t) (0b##x)) +#define TU_BIN16(b1, b2) ((uint16_t) (0b##b1##b2)) +#define TU_BIN32(b1, b2, b3, b4) ((uint32_t) (0b##b1##b2##b3##b4)) #else @@ -108,13 +97,13 @@ static inline uint32_t bit_set_range(uint32_t value, uint8_t start, uint8_t end, +((x&0x0F000000UL)?64:0) \ +((x&0xF0000000UL)?128:0)) -#define BIN8(d) ((uint8_t) _B8__(0x##d##UL)) -#define BIN16(dmsb,dlsb) (((uint16_t)BIN8(dmsb)<<8) + BIN8(dlsb)) -#define BIN32(dmsb,db2,db3,dlsb) \ - (((uint32_t)BIN8(dmsb)<<24) \ - + ((uint32_t)BIN8(db2)<<16) \ - + ((uint32_t)BIN8(db3)<<8) \ - + BIN8(dlsb)) +#define TU_BIN8(d) ((uint8_t) _B8__(0x##d##UL)) +#define TU_BIN16(dmsb,dlsb) (((uint16_t)TU_BIN8(dmsb)<<8) + TU_BIN8(dlsb)) +#define TU_BIN32(dmsb,db2,db3,dlsb) \ + (((uint32_t)TU_BIN8(dmsb)<<24) \ + + ((uint32_t)TU_BIN8(db2)<<16) \ + + ((uint32_t)TU_BIN8(db3)<<8) \ + + TU_BIN8(dlsb)) #endif #ifdef __cplusplus diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 6f0167898..9a6d5a520 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -170,9 +170,9 @@ typedef enum }misc_protocol_type_t; enum { - TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP = BIT_(5), - TUSB_DESC_CONFIG_ATT_SELF_POWER = BIT_(6), - TUSB_DESC_CONFIG_ATT_BUS_POWER = BIT_(7) + TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP = TU_BIT(5), + TUSB_DESC_CONFIG_ATT_SELF_POWER = TU_BIT(6), + TUSB_DESC_CONFIG_ATT_BUS_POWER = TU_BIT(7) }; #define TUSB_DESC_CONFIG_POWER_MA(x) ((x)/2) diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index b46c9bc64..b8f724122 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -260,9 +260,9 @@ static bool ehci_init(uint8_t rhport) regs->nxp_tt_control = 0; //------------- USB CMD Register -------------// - regs->command |= BIT_(EHCI_USBCMD_POS_RUN_STOP) | BIT_(EHCI_USBCMD_POS_ASYNC_ENABLE) - | BIT_(EHCI_USBCMD_POS_PERIOD_ENABLE) // TODO enable period list only there is int/iso endpoint - | ((EHCI_CFG_FRAMELIST_SIZE_BITS & BIN8(011)) << EHCI_USBCMD_POS_FRAMELIST_SZIE) + regs->command |= TU_BIT(EHCI_USBCMD_POS_RUN_STOP) | TU_BIT(EHCI_USBCMD_POS_ASYNC_ENABLE) + | TU_BIT(EHCI_USBCMD_POS_PERIOD_ENABLE) // TODO enable period list only there is int/iso endpoint + | ((EHCI_CFG_FRAMELIST_SIZE_BITS & TU_BIN8(011)) << EHCI_USBCMD_POS_FRAMELIST_SZIE) | ((EHCI_CFG_FRAMELIST_SIZE_BITS >> 2) << EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB); //------------- ConfigFlag Register (skip) -------------// @@ -791,19 +791,19 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c if ( interval < 4) // sub milisecond interval { p_qhd->interval_ms = 0; - p_qhd->int_smask = (interval == 1) ? BIN8(11111111) : - (interval == 2) ? BIN8(10101010) : BIN8(01000100); + p_qhd->int_smask = (interval == 1) ? TU_BIN8(11111111) : + (interval == 2) ? TU_BIN8(10101010) : TU_BIN8(01000100); }else { p_qhd->interval_ms = (uint8_t) tu_min16( 1 << (interval-4), 255 ); - p_qhd->int_smask = BIT_(interval % 8); + p_qhd->int_smask = TU_BIT(interval % 8); } }else { TU_ASSERT( 0 != interval, ); // Full/Low: 4.12.2.1 (EHCI) case 1 schedule start split at 1 us & complete split at 2,3,4 uframes p_qhd->int_smask = 0x01; - p_qhd->fl_int_cmask = BIN8(11100); + p_qhd->fl_int_cmask = TU_BIN8(11100); p_qhd->interval_ms = interval; } }else diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index c1c274793..23bbb310a 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -294,17 +294,17 @@ TU_VERIFY_STATIC( sizeof(ehci_sitd_t) == 32, "size is not correct" ); // EHCI Operational Register //--------------------------------------------------------------------+ enum ehci_interrupt_mask_{ - EHCI_INT_MASK_USB = BIT_(0), - EHCI_INT_MASK_ERROR = BIT_(1), - EHCI_INT_MASK_PORT_CHANGE = BIT_(2), + EHCI_INT_MASK_USB = TU_BIT(0), + EHCI_INT_MASK_ERROR = TU_BIT(1), + EHCI_INT_MASK_PORT_CHANGE = TU_BIT(2), - EHCI_INT_MASK_FRAMELIST_ROLLOVER = BIT_(3), - EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR = BIT_(4), - EHCI_INT_MASK_ASYNC_ADVANCE = BIT_(5), - EHCI_INT_MASK_NXP_SOF = BIT_(7), + EHCI_INT_MASK_FRAMELIST_ROLLOVER = TU_BIT(3), + EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR = TU_BIT(4), + EHCI_INT_MASK_ASYNC_ADVANCE = TU_BIT(5), + EHCI_INT_MASK_NXP_SOF = TU_BIT(7), - EHCI_INT_MASK_NXP_ASYNC = BIT_(18), - EHCI_INT_MASK_NXP_PERIODIC = BIT_(19), + EHCI_INT_MASK_NXP_ASYNC = TU_BIT(18), + EHCI_INT_MASK_NXP_PERIODIC = TU_BIT(19), EHCI_INT_MASK_ALL = EHCI_INT_MASK_USB | EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | @@ -323,9 +323,9 @@ enum ehci_usbcmd_pos_ { }; enum ehci_portsc_change_mask_{ - EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE = BIT_(1), - EHCI_PORTSC_MASK_PORT_ENABLE_CHAGNE = BIT_(3), - EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE = BIT_(5), + EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE = TU_BIT(1), + EHCI_PORTSC_MASK_PORT_ENABLE_CHAGNE = TU_BIT(3), + EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE = TU_BIT(5), EHCI_PORTSC_MASK_ALL = EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE | diff --git a/src/host/hub.c b/src/host/hub.c index 6b87e935e..16560a812 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -97,7 +97,7 @@ bool hub_port_clear_feature_subtask(uint8_t hub_addr, uint8_t hub_port, uint8_t hub_port_status_response_t * p_port_status; p_port_status = (hub_port_status_response_t *) hub_enum_buffer; - TU_ASSERT( !BIT_TEST_(p_port_status->status_change.value, feature-16) ); + TU_ASSERT( !TU_BIT_TEST(p_port_status->status_change.value, feature-16) ); return true; } @@ -225,7 +225,7 @@ void hub_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xf for (uint8_t port=1; port <= p_hub->port_number; port++) { // TODO HUB ignore bit0 hub_status_change - if ( BIT_TEST_(p_hub->status_change, port) ) + if ( TU_BIT_TEST(p_hub->status_change, port) ) { hcd_event_t event = { diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index bebb8a2ef..887b3e561 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -65,10 +65,10 @@ enum { enum { OHCI_CONTROL_CONTROL_BULK_RATIO = 3, ///< This specifies the service ratio between Control and Bulk EDs. 0 = 1:1, 3 = 4:1 - OHCI_CONTROL_LIST_PERIODIC_ENABLE_MASK = BIT_(2), - OHCI_CONTROL_LIST_ISOCHRONOUS_ENABLE_MASK = BIT_(3), - OHCI_CONTROL_LIST_CONTROL_ENABLE_MASK = BIT_(4), - OHCI_CONTROL_LIST_BULK_ENABLE_MASK = BIT_(5), + OHCI_CONTROL_LIST_PERIODIC_ENABLE_MASK = TU_BIT(2), + OHCI_CONTROL_LIST_ISOCHRONOUS_ENABLE_MASK = TU_BIT(3), + OHCI_CONTROL_LIST_CONTROL_ENABLE_MASK = TU_BIT(4), + OHCI_CONTROL_LIST_BULK_ENABLE_MASK = TU_BIT(5), }; enum { @@ -81,33 +81,33 @@ enum { }; enum { - OHCI_INT_SCHEDULING_OVERUN_MASK = BIT_(0), - OHCI_INT_WRITEBACK_DONEHEAD_MASK = BIT_(1), - OHCI_INT_SOF_MASK = BIT_(2), - OHCI_INT_RESUME_DETECTED_MASK = BIT_(3), - OHCI_INT_UNRECOVERABLE_ERROR_MASK = BIT_(4), - OHCI_INT_FRAME_OVERFLOW_MASK = BIT_(5), - OHCI_INT_RHPORT_STATUS_CHANGE_MASK = BIT_(6), - - OHCI_INT_OWNERSHIP_CHANGE_MASK = BIT_(30), - OHCI_INT_MASTER_ENABLE_MASK = BIT_(31), + OHCI_INT_SCHEDULING_OVERUN_MASK = TU_BIT(0), + OHCI_INT_WRITEBACK_DONEHEAD_MASK = TU_BIT(1), + OHCI_INT_SOF_MASK = TU_BIT(2), + OHCI_INT_RESUME_DETECTED_MASK = TU_BIT(3), + OHCI_INT_UNRECOVERABLE_ERROR_MASK = TU_BIT(4), + OHCI_INT_FRAME_OVERFLOW_MASK = TU_BIT(5), + OHCI_INT_RHPORT_STATUS_CHANGE_MASK = TU_BIT(6), + + OHCI_INT_OWNERSHIP_CHANGE_MASK = TU_BIT(30), + OHCI_INT_MASTER_ENABLE_MASK = TU_BIT(31), }; enum { - OHCI_RHPORT_CURRENT_CONNECT_STATUS_MASK = BIT_(0), - OHCI_RHPORT_PORT_ENABLE_STATUS_MASK = BIT_(1), - OHCI_RHPORT_PORT_SUSPEND_STATUS_MASK = BIT_(2), - OHCI_RHPORT_PORT_OVER_CURRENT_INDICATOR_MASK = BIT_(3), - OHCI_RHPORT_PORT_RESET_STATUS_MASK = BIT_(4), ///< write '1' to reset port + OHCI_RHPORT_CURRENT_CONNECT_STATUS_MASK = TU_BIT(0), + OHCI_RHPORT_PORT_ENABLE_STATUS_MASK = TU_BIT(1), + OHCI_RHPORT_PORT_SUSPEND_STATUS_MASK = TU_BIT(2), + OHCI_RHPORT_PORT_OVER_CURRENT_INDICATOR_MASK = TU_BIT(3), + OHCI_RHPORT_PORT_RESET_STATUS_MASK = TU_BIT(4), ///< write '1' to reset port - OHCI_RHPORT_PORT_POWER_STATUS_MASK = BIT_(8), - OHCI_RHPORT_LOW_SPEED_DEVICE_ATTACHED_MASK = BIT_(9), + OHCI_RHPORT_PORT_POWER_STATUS_MASK = TU_BIT(8), + OHCI_RHPORT_LOW_SPEED_DEVICE_ATTACHED_MASK = TU_BIT(9), - OHCI_RHPORT_CONNECT_STATUS_CHANGE_MASK = BIT_(16), - OHCI_RHPORT_PORT_ENABLE_CHANGE_MASK = BIT_(17), - OHCI_RHPORT_PORT_SUSPEND_CHANGE_MASK = BIT_(18), - OHCI_RHPORT_OVER_CURRENT_CHANGE_MASK = BIT_(19), - OHCI_RHPORT_PORT_RESET_CHANGE_MASK = BIT_(20), + OHCI_RHPORT_CONNECT_STATUS_CHANGE_MASK = TU_BIT(16), + OHCI_RHPORT_PORT_ENABLE_CHANGE_MASK = TU_BIT(17), + OHCI_RHPORT_PORT_SUSPEND_CHANGE_MASK = TU_BIT(18), + OHCI_RHPORT_OVER_CURRENT_CHANGE_MASK = TU_BIT(19), + OHCI_RHPORT_PORT_RESET_CHANGE_MASK = TU_BIT(20), OHCI_RHPORT_ALL_CHANGE_MASK = OHCI_RHPORT_CONNECT_STATUS_CHANGE_MASK | OHCI_RHPORT_PORT_ENABLE_CHANGE_MASK | OHCI_RHPORT_PORT_SUSPEND_CHANGE_MASK | OHCI_RHPORT_OVER_CURRENT_CHANGE_MASK | OHCI_RHPORT_PORT_RESET_CHANGE_MASK @@ -131,7 +131,7 @@ enum { enum { OHCI_INT_ON_COMPLETE_YES = 0, - OHCI_INT_ON_COMPLETE_NO = BIN8(111) + OHCI_INT_ON_COMPLETE_NO = TU_BIN8(111) }; //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION @@ -300,7 +300,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet gtd_init(p_setup, (void*) setup_packet, 8); p_setup->index = dev_addr; p_setup->pid = OHCI_PID_SETUP; - p_setup->data_toggle = BIN8(10); // DATA0 + p_setup->data_toggle = TU_BIN8(10); // DATA0 p_setup->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; //------------- Attach TDs list to Control Endpoint -------------// @@ -328,7 +328,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * p_data->index = dev_addr; p_data->pid = dir ? OHCI_PID_IN : OHCI_PID_OUT; - p_data->data_toggle = BIN8(11); // DATA1 + p_data->data_toggle = TU_BIN8(11); // DATA1 p_data->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; p_ed->td_head.address = (uint32_t) p_data; diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index ad5090eb0..7d13ef8c3 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -232,12 +232,12 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) if ( dir == TUSB_DIR_OUT ) { - NRF_USBD->INTENSET = BIT_(USBD_INTEN_ENDEPOUT0_Pos + epnum); - NRF_USBD->EPOUTEN |= BIT_(epnum); + NRF_USBD->INTENSET = TU_BIT(USBD_INTEN_ENDEPOUT0_Pos + epnum); + NRF_USBD->EPOUTEN |= TU_BIT(epnum); }else { - NRF_USBD->INTENSET = BIT_(USBD_INTEN_ENDEPIN0_Pos + epnum); - NRF_USBD->EPINEN |= BIT_(epnum); + NRF_USBD->INTENSET = TU_BIT(USBD_INTEN_ENDEPIN0_Pos + epnum); + NRF_USBD->EPINEN |= TU_BIT(epnum); } __ISB(); __DSB(); @@ -368,9 +368,9 @@ void USBD_IRQHandler(void) for(uint8_t i=0; iEPOUT[epnum].AMOUNT; @@ -485,7 +485,7 @@ void USBD_IRQHandler(void) // CBI In: Endpoint -> Host (transaction complete) for(uint8_t epnum=0; epnum<8; epnum++) { - if ( BIT_TEST_(data_status, epnum ) || ( epnum == 0 && is_control_in) ) + if ( TU_BIT_TEST(data_status, epnum ) || ( epnum == 0 && is_control_in) ) { xfer_td_t* xfer = get_td(epnum, TUSB_DIR_IN); @@ -506,7 +506,7 @@ void USBD_IRQHandler(void) // CBI OUT: Host -> Endpoint for(uint8_t epnum=0; epnum<8; epnum++) { - if ( BIT_TEST_(data_status, 16+epnum ) || ( epnum == 0 && is_control_out) ) + if ( TU_BIT_TEST(data_status, 16+epnum ) || ( epnum == 0 && is_control_out) ) { xfer_td_t* xfer = get_td(epnum, TUSB_DIR_OUT); diff --git a/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c b/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c index c910bf1ec..26ecaf8be 100644 --- a/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c +++ b/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c @@ -64,20 +64,20 @@ enum { }; enum { - INT_SOF_MASK = BIT_(30), - INT_DEVICE_STATUS_MASK = BIT_(31) + INT_SOF_MASK = TU_BIT(30), + INT_DEVICE_STATUS_MASK = TU_BIT(31) }; enum { - CMDSTAT_DEVICE_ADDR_MASK = BIT_(7 )-1, - CMDSTAT_DEVICE_ENABLE_MASK = BIT_(7 ), - CMDSTAT_SETUP_RECEIVED_MASK = BIT_(8 ), - CMDSTAT_DEVICE_CONNECT_MASK = BIT_(16), ///< reflect the softconnect only, does not reflect the actual attached state - CMDSTAT_DEVICE_SUSPEND_MASK = BIT_(17), - CMDSTAT_CONNECT_CHANGE_MASK = BIT_(24), - CMDSTAT_SUSPEND_CHANGE_MASK = BIT_(25), - CMDSTAT_RESET_CHANGE_MASK = BIT_(26), - CMDSTAT_VBUS_DEBOUNCED_MASK = BIT_(28), + CMDSTAT_DEVICE_ADDR_MASK = TU_BIT(7 )-1, + CMDSTAT_DEVICE_ENABLE_MASK = TU_BIT(7 ), + CMDSTAT_SETUP_RECEIVED_MASK = TU_BIT(8 ), + CMDSTAT_DEVICE_CONNECT_MASK = TU_BIT(16), ///< reflect the softconnect only, does not reflect the actual attached state + CMDSTAT_DEVICE_SUSPEND_MASK = TU_BIT(17), + CMDSTAT_CONNECT_CHANGE_MASK = TU_BIT(24), + CMDSTAT_SUSPEND_CHANGE_MASK = TU_BIT(25), + CMDSTAT_RESET_CHANGE_MASK = TU_BIT(26), + CMDSTAT_VBUS_DEBOUNCED_MASK = TU_BIT(28), }; typedef struct ATTR_PACKED @@ -237,7 +237,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) _dcd.ep[ep_id][0].is_iso = (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS); // Enable EP interrupt - LPC_USB->INTEN |= BIT_(ep_id); + LPC_USB->INTEN |= TU_BIT(ep_id); return true; } @@ -296,14 +296,14 @@ static void bus_reset(void) LPC_USB->INTSTAT = LPC_USB->INTSTAT; // clear all pending interrupt LPC_USB->DEVCMDSTAT |= CMDSTAT_SETUP_RECEIVED_MASK; // clear setup received interrupt - LPC_USB->INTEN = INT_DEVICE_STATUS_MASK | BIT_(0) | BIT_(1); // enable device status & control endpoints + LPC_USB->INTEN = INT_DEVICE_STATUS_MASK | TU_BIT(0) | TU_BIT(1); // enable device status & control endpoints } static void process_xfer_isr(uint32_t int_status) { for(uint8_t ep_id = 0; ep_id < EP_COUNT; ep_id++ ) { - if ( BIT_TEST_(int_status, ep_id) ) + if ( TU_BIT_TEST(int_status, ep_id) ) { ep_cmd_sts_t * ep_cs = &_dcd.ep[ep_id][0]; xfer_dma_t* xfer_dma = &_dcd.dma[ep_id]; @@ -378,7 +378,7 @@ void USB_IRQHandler(void) } // Setup Receive - if ( BIT_TEST_(int_status, 0) && (dev_cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) ) + if ( TU_BIT_TEST(int_status, 0) && (dev_cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) ) { // Follow UM flowchart to clear Active & Stall on both Control IN/OUT endpoints _dcd.ep[0][0].active = _dcd.ep[1][0].active = 0; @@ -392,7 +392,7 @@ void USB_IRQHandler(void) _dcd.ep[0][1].buffer_offset = get_buf_offset(_dcd.setup_packet); // clear bit0 - int_status = BIT_CLR_(int_status, 0); + int_status = TU_BIT_CLEAR(int_status, 0); } // Endpoint transfer complete interrupt diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c index 82d3c3cac..fca2c355d 100644 --- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c +++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c @@ -148,7 +148,7 @@ static inline uint8_t ep_addr2idx(uint8_t ep_addr) static void set_ep_size(uint8_t ep_id, uint16_t max_packet_size) { // follows example in 11.10.4.2 - LPC_USB->ReEp |= BIT_(ep_id); + LPC_USB->ReEp |= TU_BIT(ep_id); LPC_USB->EpInd = ep_id; // select index before setting packet size LPC_USB->MaxPSize = max_packet_size; @@ -419,15 +419,15 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t t if ( ep_id % 2 ) { // Clear EP interrupt before Enable DMA - LPC_USB->EpIntEn &= ~BIT_(ep_id); - LPC_USB->EpDMAEn = BIT_(ep_id); + LPC_USB->EpIntEn &= ~TU_BIT(ep_id); + LPC_USB->EpDMAEn = TU_BIT(ep_id); // endpoint IN need to actively raise DMA request - LPC_USB->DMARSet = BIT_(ep_id); + LPC_USB->DMARSet = TU_BIT(ep_id); }else { // Enable DMA - LPC_USB->EpDMAEn = BIT_(ep_id); + LPC_USB->EpDMAEn = TU_BIT(ep_id); } return true; @@ -442,11 +442,11 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t t static void control_xfer_isr(uint8_t rhport, uint32_t ep_int_status) { // Control out complete - if ( ep_int_status & BIT_(0) ) + if ( ep_int_status & TU_BIT(0) ) { bool is_setup = sie_read(SIE_CMDCODE_ENDPOINT_SELECT+0) & SIE_SELECT_ENDPOINT_SETUP_RECEIVED_MASK; - LPC_USB->EpIntClr = BIT_(0); + LPC_USB->EpIntClr = TU_BIT(0); if (is_setup) { @@ -472,9 +472,9 @@ static void control_xfer_isr(uint8_t rhport, uint32_t ep_int_status) } // Control In complete - if ( ep_int_status & BIT_(1) ) + if ( ep_int_status & TU_BIT(1) ) { - LPC_USB->EpIntClr = BIT_(1); + LPC_USB->EpIntClr = TU_BIT(1); dcd_event_xfer_complete(rhport, TUSB_DIR_IN_MASK, _dcd.control.in_bytes, XFER_RESULT_SUCCESS, true); } } @@ -546,12 +546,12 @@ void hal_dcd_isr(uint8_t rhport) { for ( uint8_t ep_id = 3; ep_id < DCD_ENDPOINT_MAX; ep_id += 2 ) { - if ( BIT_TEST_(ep_int_status, ep_id) ) + if ( TU_BIT_TEST(ep_int_status, ep_id) ) { - LPC_USB->EpIntClr = BIT_(ep_id); + LPC_USB->EpIntClr = TU_BIT(ep_id); // Clear Ep interrupt for next DMA - LPC_USB->EpIntEn &= ~BIT_(ep_id); + LPC_USB->EpIntEn &= ~TU_BIT(ep_id); dd_complete_isr(rhport, ep_id); } @@ -569,12 +569,12 @@ void hal_dcd_isr(uint8_t rhport) for ( uint8_t ep_id = 2; ep_id < DCD_ENDPOINT_MAX; ep_id++ ) { - if ( BIT_TEST_(eot, ep_id) ) + if ( TU_BIT_TEST(eot, ep_id) ) { if ( ep_id & 0x01 ) { // IN enable EpInt for end of usb transfer - LPC_USB->EpIntEn |= BIT_(ep_id); + LPC_USB->EpIntEn |= TU_BIT(ep_id); }else { // OUT diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h index d6b76fcd1..eac8ec99b 100644 --- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h +++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h @@ -51,45 +51,45 @@ //------------- USB Interrupt USBIntSt -------------// //enum { -// DCD_USB_REQ_LOW_PRIO_MASK = BIT_(0), -// DCD_USB_REQ_HIGH_PRIO_MASK = BIT_(1), -// DCD_USB_REQ_DMA_MASK = BIT_(2), -// DCD_USB_REQ_NEED_CLOCK_MASK = BIT_(8), -// DCD_USB_REQ_ENABLE_MASK = BIT_(31) +// DCD_USB_REQ_LOW_PRIO_MASK = TU_BIT(0), +// DCD_USB_REQ_HIGH_PRIO_MASK = TU_BIT(1), +// DCD_USB_REQ_DMA_MASK = TU_BIT(2), +// DCD_USB_REQ_NEED_CLOCK_MASK = TU_BIT(8), +// DCD_USB_REQ_ENABLE_MASK = TU_BIT(31) //}; //------------- Device Interrupt USBDevInt -------------// enum { - DEV_INT_FRAME_MASK = BIT_(0), - DEV_INT_ENDPOINT_FAST_MASK = BIT_(1), - DEV_INT_ENDPOINT_SLOW_MASK = BIT_(2), - DEV_INT_DEVICE_STATUS_MASK = BIT_(3), - DEV_INT_COMMAND_CODE_EMPTY_MASK = BIT_(4), - DEV_INT_COMMAND_DATA_FULL_MASK = BIT_(5), - DEV_INT_RX_ENDPOINT_PACKET_MASK = BIT_(6), - DEV_INT_TX_ENDPOINT_PACKET_MASK = BIT_(7), - DEV_INT_ENDPOINT_REALIZED_MASK = BIT_(8), - DEV_INT_ERROR_MASK = BIT_(9) + DEV_INT_FRAME_MASK = TU_BIT(0), + DEV_INT_ENDPOINT_FAST_MASK = TU_BIT(1), + DEV_INT_ENDPOINT_SLOW_MASK = TU_BIT(2), + DEV_INT_DEVICE_STATUS_MASK = TU_BIT(3), + DEV_INT_COMMAND_CODE_EMPTY_MASK = TU_BIT(4), + DEV_INT_COMMAND_DATA_FULL_MASK = TU_BIT(5), + DEV_INT_RX_ENDPOINT_PACKET_MASK = TU_BIT(6), + DEV_INT_TX_ENDPOINT_PACKET_MASK = TU_BIT(7), + DEV_INT_ENDPOINT_REALIZED_MASK = TU_BIT(8), + DEV_INT_ERROR_MASK = TU_BIT(9) }; //------------- DMA Interrupt USBDMAInt-------------// enum { - DMA_INT_END_OF_XFER_MASK = BIT_(0), - DMA_INT_NEW_DD_REQUEST_MASK = BIT_(1), - DMA_INT_ERROR_MASK = BIT_(2) + DMA_INT_END_OF_XFER_MASK = TU_BIT(0), + DMA_INT_NEW_DD_REQUEST_MASK = TU_BIT(1), + DMA_INT_ERROR_MASK = TU_BIT(2) }; //------------- USBCtrl -------------// enum { - USBCTRL_READ_ENABLE_MASK = BIT_(0), - USBCTRL_WRITE_ENABLE_MASK = BIT_(1), + USBCTRL_READ_ENABLE_MASK = TU_BIT(0), + USBCTRL_WRITE_ENABLE_MASK = TU_BIT(1), }; //------------- USBRxPLen -------------// enum { - USBRXPLEN_PACKET_LENGTH_MASK = (BIT_(10)-1), - USBRXPLEN_DATA_VALID_MASK = BIT_(10), - USBRXPLEN_PACKET_READY_MASK = BIT_(11), + USBRXPLEN_PACKET_LENGTH_MASK = (TU_BIT(10)-1), + USBRXPLEN_DATA_VALID_MASK = TU_BIT(10), + USBRXPLEN_PACKET_READY_MASK = TU_BIT(11), }; //------------- SIE Command Code -------------// @@ -121,30 +121,30 @@ enum { //------------- SIE Device Status (get/set from SIE_CMDCODE_DEVICE_STATUS) -------------// enum { - SIE_DEV_STATUS_CONNECT_STATUS_MASK = BIT_(0), - SIE_DEV_STATUS_CONNECT_CHANGE_MASK = BIT_(1), - SIE_DEV_STATUS_SUSPEND_MASK = BIT_(2), - SIE_DEV_STATUS_SUSPEND_CHANGE_MASK = BIT_(3), - SIE_DEV_STATUS_RESET_MASK = BIT_(4) + SIE_DEV_STATUS_CONNECT_STATUS_MASK = TU_BIT(0), + SIE_DEV_STATUS_CONNECT_CHANGE_MASK = TU_BIT(1), + SIE_DEV_STATUS_SUSPEND_MASK = TU_BIT(2), + SIE_DEV_STATUS_SUSPEND_CHANGE_MASK = TU_BIT(3), + SIE_DEV_STATUS_RESET_MASK = TU_BIT(4) }; //------------- SIE Select Endpoint Command -------------// enum { - SIE_SELECT_ENDPOINT_FULL_EMPTY_MASK = BIT_(0), // 0: empty, 1 full. IN endpoint checks empty, OUT endpoint check full - SIE_SELECT_ENDPOINT_STALL_MASK = BIT_(1), - SIE_SELECT_ENDPOINT_SETUP_RECEIVED_MASK = BIT_(2), // clear by SIE_CMDCODE_ENDPOINT_SELECT_CLEAR_INTERRUPT - SIE_SELECT_ENDPOINT_PACKET_OVERWRITTEN_MASK = BIT_(3), // previous packet is overwritten by a SETUP packet - SIE_SELECT_ENDPOINT_NAK_MASK = BIT_(4), // last packet response is NAK (auto clear by an ACK) - SIE_SELECT_ENDPOINT_BUFFER1_FULL_MASK = BIT_(5), - SIE_SELECT_ENDPOINT_BUFFER2_FULL_MASK = BIT_(6) + SIE_SELECT_ENDPOINT_FULL_EMPTY_MASK = TU_BIT(0), // 0: empty, 1 full. IN endpoint checks empty, OUT endpoint check full + SIE_SELECT_ENDPOINT_STALL_MASK = TU_BIT(1), + SIE_SELECT_ENDPOINT_SETUP_RECEIVED_MASK = TU_BIT(2), // clear by SIE_CMDCODE_ENDPOINT_SELECT_CLEAR_INTERRUPT + SIE_SELECT_ENDPOINT_PACKET_OVERWRITTEN_MASK = TU_BIT(3), // previous packet is overwritten by a SETUP packet + SIE_SELECT_ENDPOINT_NAK_MASK = TU_BIT(4), // last packet response is NAK (auto clear by an ACK) + SIE_SELECT_ENDPOINT_BUFFER1_FULL_MASK = TU_BIT(5), + SIE_SELECT_ENDPOINT_BUFFER2_FULL_MASK = TU_BIT(6) }; typedef enum { - SIE_SET_ENDPOINT_STALLED_MASK = BIT_(0), - SIE_SET_ENDPOINT_DISABLED_MASK = BIT_(5), - SIE_SET_ENDPOINT_RATE_FEEDBACK_MASK = BIT_(6), - SIE_SET_ENDPOINT_CONDITION_STALLED_MASK = BIT_(7), + SIE_SET_ENDPOINT_STALLED_MASK = TU_BIT(0), + SIE_SET_ENDPOINT_DISABLED_MASK = TU_BIT(5), + SIE_SET_ENDPOINT_RATE_FEEDBACK_MASK = TU_BIT(6), + SIE_SET_ENDPOINT_CONDITION_STALLED_MASK = TU_BIT(7), }sie_endpoint_set_status_mask_t; //------------- DMA Descriptor Status -------------// diff --git a/src/portable/nxp/lpc18_43/dcd_lpc18_43.c b/src/portable/nxp/lpc18_43/dcd_lpc18_43.c index 70b34d848..7761d547f 100644 --- a/src/portable/nxp/lpc18_43/dcd_lpc18_43.c +++ b/src/portable/nxp/lpc18_43/dcd_lpc18_43.c @@ -94,7 +94,7 @@ static dcd_data_t* const dcd_data_ptr[2] = //--------------------------------------------------------------------+ void dcd_set_address(uint8_t rhport, uint8_t dev_addr) { - LPC_USB[rhport]->DEVICEADDR = (dev_addr << 25) | BIT_(24); + LPC_USB[rhport]->DEVICEADDR = (dev_addr << 25) | TU_BIT(24); } void dcd_set_config(uint8_t rhport, uint8_t config_num) @@ -158,7 +158,7 @@ bool dcd_init(uint8_t rhport) lpc_usb->USBINTR_D = INT_MASK_USB | INT_MASK_ERROR | INT_MASK_PORT_CHANGE | INT_MASK_RESET | INT_MASK_SUSPEND | INT_MASK_SOF; lpc_usb->USBCMD_D &= ~0x00FF0000; // Interrupt Threshold Interval = 0 - lpc_usb->USBCMD_D |= BIT_(0); // connect + lpc_usb->USBCMD_D |= TU_BIT(0); // connect return true; } @@ -284,7 +284,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t { // follows UM 24.10.8.1.1 Setup packet handling using setup lockout mechanism // wait until ENDPTSETUPSTAT before priming data/status in response TODO add time out - while(LPC_USB[rhport]->ENDPTSETUPSTAT & BIT_(0)) {} + while(LPC_USB[rhport]->ENDPTSETUPSTAT & TU_BIT(0)) {} } dcd_qhd_t * p_qhd = &dcd_data_ptr[rhport]->qhd[ep_idx]; @@ -296,7 +296,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t p_qhd->qtd_overlay.next = (uint32_t) p_qtd; // link qtd to qhd // start transfer - LPC_USB[rhport]->ENDPTPRIME = BIT_( ep_idx2bit(ep_idx) ) ; + LPC_USB[rhport]->ENDPTPRIME = TU_BIT( ep_idx2bit(ep_idx) ) ; return true; } @@ -363,7 +363,7 @@ void hal_dcd_isr(uint8_t rhport) { for(uint8_t ep_idx = 0; ep_idx < QHD_MAX; ep_idx++) { - if ( BIT_TEST_(edpt_complete, ep_idx2bit(ep_idx)) ) + if ( TU_BIT_TEST(edpt_complete, ep_idx2bit(ep_idx)) ) { // 23.10.12.3 Failed QTD also get ENDPTCOMPLETE set dcd_qtd_t * p_qtd = &dcd_data_ptr[rhport]->qtd[ep_idx]; diff --git a/src/portable/nxp/lpc18_43/dcd_lpc18_43.h b/src/portable/nxp/lpc18_43/dcd_lpc18_43.h index faf0e3b0f..c380be724 100644 --- a/src/portable/nxp/lpc18_43/dcd_lpc18_43.h +++ b/src/portable/nxp/lpc18_43/dcd_lpc18_43.h @@ -55,37 +55,37 @@ /*---------- ENDPTCTRL ----------*/ enum { - ENDPTCTRL_MASK_STALL = BIT_(0), - ENDPTCTRL_MASK_TOGGLE_INHIBIT = BIT_(5), ///< used for test only - ENDPTCTRL_MASK_TOGGLE_RESET = BIT_(6), - ENDPTCTRL_MASK_ENABLE = BIT_(7) + ENDPTCTRL_MASK_STALL = TU_BIT(0), + ENDPTCTRL_MASK_TOGGLE_INHIBIT = TU_BIT(5), ///< used for test only + ENDPTCTRL_MASK_TOGGLE_RESET = TU_BIT(6), + ENDPTCTRL_MASK_ENABLE = TU_BIT(7) }; /*---------- USBCMD ----------*/ enum { - USBCMD_MASK_RUN_STOP = BIT_(0), - USBCMD_MASK_RESET = BIT_(1), - USBCMD_MASK_SETUP_TRIPWIRE = BIT_(13), - USBCMD_MASK_ADD_QTD_TRIPWIRE = BIT_(14) ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD + USBCMD_MASK_RUN_STOP = TU_BIT(0), + USBCMD_MASK_RESET = TU_BIT(1), + USBCMD_MASK_SETUP_TRIPWIRE = TU_BIT(13), + USBCMD_MASK_ADD_QTD_TRIPWIRE = TU_BIT(14) ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD }; // Interrupt Threshold bit 23:16 /*---------- USBSTS, USBINTR ----------*/ enum { - INT_MASK_USB = BIT_(0), - INT_MASK_ERROR = BIT_(1), - INT_MASK_PORT_CHANGE = BIT_(2), - INT_MASK_RESET = BIT_(6), - INT_MASK_SOF = BIT_(7), - INT_MASK_SUSPEND = BIT_(8), - INT_MASK_NAK = BIT_(16) + INT_MASK_USB = TU_BIT(0), + INT_MASK_ERROR = TU_BIT(1), + INT_MASK_PORT_CHANGE = TU_BIT(2), + INT_MASK_RESET = TU_BIT(6), + INT_MASK_SOF = TU_BIT(7), + INT_MASK_SUSPEND = TU_BIT(8), + INT_MASK_NAK = TU_BIT(16) }; //------------- PORTSC -------------// enum { - PORTSC_CURRENT_CONNECT_STATUS_MASK = BIT_(0), - PORTSC_FORCE_PORT_RESUME_MASK = BIT_(6), - PORTSC_SUSPEND_MASK = BIT_(7) + PORTSC_CURRENT_CONNECT_STATUS_MASK = TU_BIT(0), + PORTSC_FORCE_PORT_RESUME_MASK = TU_BIT(6), + PORTSC_SUSPEND_MASK = TU_BIT(7) }; typedef struct diff --git a/tests/lpc175x_6x/test/test_dcd_lpc175x_6x.c b/tests/lpc175x_6x/test/test_dcd_lpc175x_6x.c index 31baa5f5c..f61556c22 100644 --- a/tests/lpc175x_6x/test/test_dcd_lpc175x_6x.c +++ b/tests/lpc175x_6x/test/test_dcd_lpc175x_6x.c @@ -99,7 +99,7 @@ void test_dcd_init(void) dcd_init(); //------------- slave check -------------// - TEST_ASSERT_EQUAL_HEX( BIN8(11), LPC_USB->USBEpIntEn ); + TEST_ASSERT_EQUAL_HEX( TU_BIN8(11), LPC_USB->USBEpIntEn ); TEST_ASSERT_EQUAL_HEX( DEV_INT_DEVICE_STATUS_MASK | DEV_INT_ENDPOINT_SLOW_MASK | DEV_INT_ERROR_MASK, LPC_USB->USBDevIntEn ); TEST_ASSERT_EQUAL_HEX( 0, LPC_USB->USBEpIntPri); @@ -135,7 +135,7 @@ void test_dcd_configure_endpoint_in(void) dcd_pipe_open(0, &desc_endpoint); uint8_t const phy_ep = 2*3 + 1; - TEST_ASSERT_EQUAL_HEX( BIT_(phy_ep), LPC_USB->USBReEp); + TEST_ASSERT_EQUAL_HEX( TU_BIT(phy_ep), LPC_USB->USBReEp); TEST_ASSERT_EQUAL_HEX( phy_ep, LPC_USB->USBEpInd); TEST_ASSERT_EQUAL( desc_endpoint.wMaxPacketSize.size, LPC_USB->USBMaxPSize); diff --git a/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c b/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c index 1f8410461..25d74d860 100644 --- a/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c +++ b/tests/lpc18xx_43xx/test/host/cdc/test_cdc_host.c @@ -216,7 +216,7 @@ void test_cdc_serial_is_mounted_not_configured(void) void test_cdc_serial_is_mounted_protocol_zero(void) { - tusbh_device_get_mounted_class_flag_ExpectAndReturn(dev_addr, BIT_(TUSB_CLASS_CDC) ); + tusbh_device_get_mounted_class_flag_ExpectAndReturn(dev_addr, TU_BIT(TUSB_CLASS_CDC) ); cdch_data[0].interface_protocol = 0; TEST_ASSERT_FALSE( tusbh_cdc_serial_is_mounted(dev_addr) ); @@ -224,7 +224,7 @@ void test_cdc_serial_is_mounted_protocol_zero(void) void test_cdc_serial_is_mounted_protocol_is_vendor(void) { - tusbh_device_get_mounted_class_flag_ExpectAndReturn(dev_addr, BIT_(TUSB_CLASS_CDC) ); + tusbh_device_get_mounted_class_flag_ExpectAndReturn(dev_addr, TU_BIT(TUSB_CLASS_CDC) ); cdch_data[0].interface_protocol = 0xff; TEST_ASSERT_FALSE( tusbh_cdc_serial_is_mounted(dev_addr) ); @@ -232,7 +232,7 @@ void test_cdc_serial_is_mounted_protocol_is_vendor(void) void test_cdc_serial_is_mounted_protocol_is_at_command(void) { - tusbh_device_get_mounted_class_flag_ExpectAndReturn(dev_addr, BIT_(TUSB_CLASS_CDC) ); + tusbh_device_get_mounted_class_flag_ExpectAndReturn(dev_addr, TU_BIT(TUSB_CLASS_CDC) ); cdch_data[0].interface_protocol = CDC_COMM_PROTOCOL_ATCOMMAND; TEST_ASSERT( tusbh_cdc_serial_is_mounted(dev_addr) ); diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_init.c b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_init.c index 8d552cb8a..5047e98c4 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_ehci_init.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_ehci_init.c @@ -167,7 +167,7 @@ void test_hcd_init_usbcmd(void) TEST_ASSERT(regs->usb_cmd_bit.periodic_enable); //------------- Framelist size (NXP specific) -------------// - TEST_ASSERT_BITS(BIN8(11), EHCI_CFG_FRAMELIST_SIZE_BITS, regs->usb_cmd_bit.framelist_size); + TEST_ASSERT_BITS(TU_BIN8(11), EHCI_CFG_FRAMELIST_SIZE_BITS, regs->usb_cmd_bit.framelist_size); TEST_ASSERT_EQUAL(EHCI_CFG_FRAMELIST_SIZE_BITS >> 2, regs->usb_cmd_bit.nxp_framelist_size_msb); } diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_open.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_open.c index ff6dfef8f..24fddf65e 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_open.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_open.c @@ -166,7 +166,7 @@ void test_open_interrupt_hs_interval_1(void) p_int_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ]; TEST_ASSERT_EQUAL(0 , p_int_qhd->interval_ms); - TEST_ASSERT_EQUAL(BIN8(11111111) , p_int_qhd->interrupt_smask); + TEST_ASSERT_EQUAL(TU_BIN8(11111111) , p_int_qhd->interrupt_smask); check_int_endpoint_link(period_head_arr, p_int_qhd); } diff --git a/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c b/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c index 096e10ac2..262dbe9ef 100644 --- a/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c +++ b/tests/lpc18xx_43xx/test/host/usbh/test_enum_task.c @@ -334,6 +334,6 @@ void test_enum_set_configure(void) usbh_enumeration_task(NULL); - TEST_ASSERT_EQUAL( BIT_(TUSB_CLASS_HID) | BIT_(TUSB_CLASS_MSC) | BIT_(TUSB_CLASS_CDC), + TEST_ASSERT_EQUAL( TU_BIT(TUSB_CLASS_HID) | TU_BIT(TUSB_CLASS_MSC) | TU_BIT(TUSB_CLASS_CDC), _usbh_devices[1].flag_supported_class); // TODO change later } diff --git a/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c b/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c index 5a673fb04..7b5d06c31 100644 --- a/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c +++ b/tests/lpc18xx_43xx/test/host/usbh/test_usbh.c @@ -162,7 +162,7 @@ void test_hcd_event_device_remove(void) _usbh_devices[dev_addr].core_id = 0; _usbh_devices[dev_addr].hub_addr = 0; _usbh_devices[dev_addr].hub_port = 0; - _usbh_devices[dev_addr].flag_supported_class = BIT_(TUSB_CLASS_HID); + _usbh_devices[dev_addr].flag_supported_class = TU_BIT(TUSB_CLASS_HID); hidh_close_Expect(dev_addr); hcd_pipe_control_close_ExpectAndReturn(dev_addr, TUSB_ERROR_NONE); @@ -181,7 +181,7 @@ void test_usbh_device_unplugged_multple_class(void) _usbh_devices[dev_addr].core_id = 0; _usbh_devices[dev_addr].hub_addr = 0; _usbh_devices[dev_addr].hub_port = 0; - _usbh_devices[dev_addr].flag_supported_class = BIT_(TUSB_CLASS_HID) | BIT_(TUSB_CLASS_MSC) | BIT_(TUSB_CLASS_CDC); + _usbh_devices[dev_addr].flag_supported_class = TU_BIT(TUSB_CLASS_HID) | TU_BIT(TUSB_CLASS_MSC) | TU_BIT(TUSB_CLASS_CDC); cdch_close_Expect(dev_addr); hidh_close_Expect(dev_addr); diff --git a/tests/lpc18xx_43xx/test/test_assertion.c b/tests/lpc18xx_43xx/test/test_assertion.c index 2b465d07d..a01c41d13 100644 --- a/tests/lpc18xx_43xx/test/test_assertion.c +++ b/tests/lpc18xx_43xx/test/test_assertion.c @@ -274,17 +274,17 @@ void test_assert_bin_equal(void) { Try { - ASSERT_BIN8 (BIN8(11110000), BIN8(11110000), __LINE__); - ASSERT_BIN8_EQUAL (BIN8(00001111), BIN8(00001111), __LINE__); + ASSERT_BIN8 (TU_BIN8(11110000), TU_BIN8(11110000), __LINE__); + ASSERT_BIN8_EQUAL (TU_BIN8(00001111), TU_BIN8(00001111), __LINE__); // test side effect - uint32_t x = BIN8(11001100); - uint32_t y = BIN8(11001100); + uint32_t x = TU_BIN8(11001100); + uint32_t y = TU_BIN8(11001100); ASSERT_BIN8 (x++, y++, __LINE__); - TEST_ASSERT_EQUAL(BIN8(11001101), x); - TEST_ASSERT_EQUAL(BIN8(11001101), y); + TEST_ASSERT_EQUAL(TU_BIN8(11001101), x); + TEST_ASSERT_EQUAL(TU_BIN8(11001101), y); - ASSERT_BIN8(BIN8(11001111), BIN8(11111100), 0); + ASSERT_BIN8(TU_BIN8(11001111), TU_BIN8(11111100), 0); } Catch(e) { diff --git a/tests/lpc18xx_43xx/test/test_binary.c b/tests/lpc18xx_43xx/test/test_binary.c index fb61df0fa..fbe2083b0 100644 --- a/tests/lpc18xx_43xx/test/test_binary.c +++ b/tests/lpc18xx_43xx/test/test_binary.c @@ -50,77 +50,60 @@ void tearDown(void) void test_binary_8(void) { - TEST_ASSERT_EQUAL_HEX8(0x00, BIN8(00000000)); - TEST_ASSERT_EQUAL_HEX8(0x01, BIN8(00000001)); - TEST_ASSERT_EQUAL_HEX8(0x02, BIN8(00000010)); - TEST_ASSERT_EQUAL_HEX8(0x04, BIN8(00000100)); - TEST_ASSERT_EQUAL_HEX8(0x08, BIN8(00001000)); - TEST_ASSERT_EQUAL_HEX8(0x10, BIN8(00010000)); - TEST_ASSERT_EQUAL_HEX8(0x20, BIN8(00100000)); - TEST_ASSERT_EQUAL_HEX8(0x40, BIN8(01000000)); - TEST_ASSERT_EQUAL_HEX8(0x80, BIN8(10000000)); - - TEST_ASSERT_EQUAL_HEX8(0x0f, BIN8(00001111)); - TEST_ASSERT_EQUAL_HEX8(0xf0, BIN8(11110000)); - TEST_ASSERT_EQUAL_HEX8(0xff, BIN8(11111111)); + TEST_ASSERT_EQUAL_HEX8(0x00, TU_BIN8(00000000)); + TEST_ASSERT_EQUAL_HEX8(0x01, TU_BIN8(00000001)); + TEST_ASSERT_EQUAL_HEX8(0x02, TU_BIN8(00000010)); + TEST_ASSERT_EQUAL_HEX8(0x04, TU_BIN8(00000100)); + TEST_ASSERT_EQUAL_HEX8(0x08, TU_BIN8(00001000)); + TEST_ASSERT_EQUAL_HEX8(0x10, TU_BIN8(00010000)); + TEST_ASSERT_EQUAL_HEX8(0x20, TU_BIN8(00100000)); + TEST_ASSERT_EQUAL_HEX8(0x40, TU_BIN8(01000000)); + TEST_ASSERT_EQUAL_HEX8(0x80, TU_BIN8(10000000)); + + TEST_ASSERT_EQUAL_HEX8(0x0f, TU_BIN8(00001111)); + TEST_ASSERT_EQUAL_HEX8(0xf0, TU_BIN8(11110000)); + TEST_ASSERT_EQUAL_HEX8(0xff, TU_BIN8(11111111)); } void test_binary_16(void) { - TEST_ASSERT_EQUAL_HEX16(0x0000, BIN16(00000000, 00000000)); - TEST_ASSERT_EQUAL_HEX16(0x000f, BIN16(00000000, 00001111)); - TEST_ASSERT_EQUAL_HEX16(0x00f0, BIN16(00000000, 11110000)); - TEST_ASSERT_EQUAL_HEX16(0x0f00, BIN16(00001111, 00000000)); - TEST_ASSERT_EQUAL_HEX16(0xf000, BIN16(11110000, 00000000)); - TEST_ASSERT_EQUAL_HEX16(0xffff, BIN16(11111111, 11111111)); + TEST_ASSERT_EQUAL_HEX16(0x0000, TU_BIN16(00000000, 00000000)); + TEST_ASSERT_EQUAL_HEX16(0x000f, TU_BIN16(00000000, 00001111)); + TEST_ASSERT_EQUAL_HEX16(0x00f0, TU_BIN16(00000000, 11110000)); + TEST_ASSERT_EQUAL_HEX16(0x0f00, TU_BIN16(00001111, 00000000)); + TEST_ASSERT_EQUAL_HEX16(0xf000, TU_BIN16(11110000, 00000000)); + TEST_ASSERT_EQUAL_HEX16(0xffff, TU_BIN16(11111111, 11111111)); } void test_binary_32(void) { - TEST_ASSERT_EQUAL_HEX32(0x00000000, BIN32(00000000, 00000000, 00000000, 00000000)); - TEST_ASSERT_EQUAL_HEX32(0x0000000f, BIN32(00000000, 00000000, 00000000, 00001111)); - TEST_ASSERT_EQUAL_HEX32(0x000000f0, BIN32(00000000, 00000000, 00000000, 11110000)); - TEST_ASSERT_EQUAL_HEX32(0x00000f00, BIN32(00000000, 00000000, 00001111, 00000000)); - TEST_ASSERT_EQUAL_HEX32(0x0000f000, BIN32(00000000, 00000000, 11110000, 00000000)); - TEST_ASSERT_EQUAL_HEX32(0x000f0000, BIN32(00000000, 00001111, 00000000, 00000000)); - TEST_ASSERT_EQUAL_HEX32(0x00f00000, BIN32(00000000, 11110000, 00000000, 00000000)); - TEST_ASSERT_EQUAL_HEX32(0x0f000000, BIN32(00001111, 00000000, 00000000, 00000000)); - TEST_ASSERT_EQUAL_HEX32(0xf0000000, BIN32(11110000, 00000000, 00000000, 00000000)); - TEST_ASSERT_EQUAL_HEX32(0xffffffff, BIN32(11111111, 11111111, 11111111, 11111111)); + TEST_ASSERT_EQUAL_HEX32(0x00000000, TU_BIN32(00000000, 00000000, 00000000, 00000000)); + TEST_ASSERT_EQUAL_HEX32(0x0000000f, TU_BIN32(00000000, 00000000, 00000000, 00001111)); + TEST_ASSERT_EQUAL_HEX32(0x000000f0, TU_BIN32(00000000, 00000000, 00000000, 11110000)); + TEST_ASSERT_EQUAL_HEX32(0x00000f00, TU_BIN32(00000000, 00000000, 00001111, 00000000)); + TEST_ASSERT_EQUAL_HEX32(0x0000f000, TU_BIN32(00000000, 00000000, 11110000, 00000000)); + TEST_ASSERT_EQUAL_HEX32(0x000f0000, TU_BIN32(00000000, 00001111, 00000000, 00000000)); + TEST_ASSERT_EQUAL_HEX32(0x00f00000, TU_BIN32(00000000, 11110000, 00000000, 00000000)); + TEST_ASSERT_EQUAL_HEX32(0x0f000000, TU_BIN32(00001111, 00000000, 00000000, 00000000)); + TEST_ASSERT_EQUAL_HEX32(0xf0000000, TU_BIN32(11110000, 00000000, 00000000, 00000000)); + TEST_ASSERT_EQUAL_HEX32(0xffffffff, TU_BIN32(11111111, 11111111, 11111111, 11111111)); } void test_bit_set(void) { - TEST_ASSERT_EQUAL_HEX32( BIN8(00001101), bit_set( BIN8(00001001), 2)); - TEST_ASSERT_EQUAL_HEX32( BIN8(10001101), bit_set( BIN8(00001101), 7)); + TEST_ASSERT_EQUAL_HEX32( TU_BIN8(00001101), tu_bit_set( TU_BIN8(00001001), 2)); + TEST_ASSERT_EQUAL_HEX32( TU_BIN8(10001101), tu_bit_set( TU_BIN8(00001101), 7)); } void test_bit_clear(void) { - TEST_ASSERT_EQUAL_HEX32( BIN8(00001001), bit_clear( BIN8(00001101), 2)); - TEST_ASSERT_EQUAL_HEX32( BIN8(00001101), bit_clear( BIN8(10001101), 7)); + TEST_ASSERT_EQUAL_HEX32( TU_BIN8(00001001), tu_bit_clear( TU_BIN8(00001101), 2)); + TEST_ASSERT_EQUAL_HEX32( TU_BIN8(00001101), tu_bit_clear( TU_BIN8(10001101), 7)); } void test_bit_mask(void) { - TEST_ASSERT_EQUAL_HEX32(0x0000ffff, bit_mask(16)); - TEST_ASSERT_EQUAL_HEX32(0x00ffffff, bit_mask(24)); - TEST_ASSERT_EQUAL_HEX32(0xffffffff, bit_mask(32)); -} - -void test_bit_range(void) -{ - TEST_ASSERT_EQUAL_HEX32(BIN8(00001111), bit_mask_range(0, 3)); - TEST_ASSERT_EQUAL_HEX32(BIN8(01100000), bit_mask_range(5, 6)); - - TEST_ASSERT_EQUAL_HEX32(BIN16(00001111, 00000000), bit_mask_range(8, 11)); - TEST_ASSERT_EQUAL_HEX32(0xf0000000, bit_mask_range(28, 31)); -} - -void test_bit_set_range(void) -{ - TEST_ASSERT_EQUAL_HEX32(BIN8(01011001), bit_set_range(BIN8(00001001), 4, 6, BIN8(101))); - - TEST_ASSERT_EQUAL_HEX32(BIN32(11001011, 10100000, 00000000, 00001001), - bit_set_range(BIN8(00001001), 21, 31, BIN16(110, 01011101))); + TEST_ASSERT_EQUAL_HEX32(0x0000ffff, tu_bit_mask(16)); + TEST_ASSERT_EQUAL_HEX32(0x00ffffff, tu_bit_mask(24)); + TEST_ASSERT_EQUAL_HEX32(0xffffffff, tu_bit_mask(32)); } -- cgit v1.3.1