From 94527951a0fef9c1383ff9a3bbc8167f21008f4e Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 27 Nov 2020 15:54:55 +0700 Subject: add bus suspend & resume support for esp32s2 --- src/portable/espressif/esp32s2/dcd_esp32s2.c | 18 +++++++++++++++++- src/portable/st/synopsys/dcd_synopsys.c | 8 ++++---- 2 files changed, 21 insertions(+), 5 deletions(-) (limited to 'src/portable') diff --git a/src/portable/espressif/esp32s2/dcd_esp32s2.c b/src/portable/espressif/esp32s2/dcd_esp32s2.c index 58d92e728..81e63816e 100644 --- a/src/portable/espressif/esp32s2/dcd_esp32s2.c +++ b/src/portable/espressif/esp32s2/dcd_esp32s2.c @@ -218,6 +218,9 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr) void dcd_remote_wakeup(uint8_t rhport) { (void)rhport; + + // TODO must manually clear this bit after 1-15 ms + // USB0.DCTL |= USB_RMTWKUPSIG_M; } // connect by enabling internal pull-up resistor on D+/D- @@ -670,6 +673,7 @@ static void handle_epin_ints(void) static void _dcd_int_handler(void* arg) { (void) arg; + uint8_t const rhport = 0; const uint32_t int_status = USB0.gintsts; //const uint32_t int_msk = USB0.gintmsk; @@ -695,7 +699,19 @@ static void _dcd_int_handler(void* arg) // the end of reset. USB0.gintsts = USB_ENUMDONE_M; enum_done_processing(); - dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true); + dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true); + } + + if(int_status & USB_USBSUSP_M) + { + USB0.gintsts = USB_USBSUSP_M; + dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); + } + + if(int_status & USB_WKUPINT_M) + { + USB0.gintsts = USB_WKUPINT_M; + dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); } if (int_status & USB_OTGINT_M) diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index 9aeec79e6..c18dcde51 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -507,21 +507,21 @@ void dcd_set_address (uint8_t rhport, uint8_t dev_addr) void dcd_remote_wakeup(uint8_t rhport) { (void) rhport; + + // TODO must manually clear this bit after 1-15 ms + // USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); + // dev->DCTL |= USB_OTG_DCTL_RWUSIG; } void dcd_connect(uint8_t rhport) { - (void) rhport; USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); - dev->DCTL &= ~USB_OTG_DCTL_SDIS; } void dcd_disconnect(uint8_t rhport) { - (void) rhport; USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); - dev->DCTL |= USB_OTG_DCTL_SDIS; } -- cgit v1.3.1 From 8b34f2fca8f57a615f66773329fd238a9e416855 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 27 Nov 2020 16:05:44 +0700 Subject: fix ci --- src/portable/espressif/esp32s2/dcd_esp32s2.c | 4 ++-- src/portable/st/synopsys/dcd_synopsys.c | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'src/portable') diff --git a/src/portable/espressif/esp32s2/dcd_esp32s2.c b/src/portable/espressif/esp32s2/dcd_esp32s2.c index 81e63816e..cd66af805 100644 --- a/src/portable/espressif/esp32s2/dcd_esp32s2.c +++ b/src/portable/espressif/esp32s2/dcd_esp32s2.c @@ -723,7 +723,7 @@ static void _dcd_int_handler(void* arg) if (otg_int & USB_SESENDDET_M) { - dcd_event_bus_signal(0, DCD_EVENT_UNPLUGGED, true); + dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true); } USB0.gotgint = otg_int; @@ -732,7 +732,7 @@ static void _dcd_int_handler(void* arg) #if USE_SOF if (int_status & USB_SOF_M) { USB0.gintsts = USB_SOF_M; - dcd_event_bus_signal(0, DCD_EVENT_SOF, true); // do nothing actually + dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); // do nothing actually } #endif diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index c18dcde51..35c814460 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -515,12 +515,14 @@ void dcd_remote_wakeup(uint8_t rhport) void dcd_connect(uint8_t rhport) { + (void) rhport; USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); dev->DCTL &= ~USB_OTG_DCTL_SDIS; } void dcd_disconnect(uint8_t rhport) { + (void) rhport; USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); dev->DCTL |= USB_OTG_DCTL_SDIS; } -- cgit v1.3.1 From 2bbfc56bd8b52c9d5f6cdcfb1ab76cd868ddacd7 Mon Sep 17 00:00:00 2001 From: kkitayam <45088311+kkitayam@users.noreply.github.com> Date: Fri, 27 Nov 2020 00:49:25 +0900 Subject: added support for frdm_kl25z --- hw/bsp/board_mcu.h | 2 +- hw/bsp/frdm_kl25z/board.mk | 46 ++++ hw/bsp/frdm_kl25z/frdm_kl25z.c | 148 +++++++++++++ src/portable/nxp/khci/dcd_khci.c | 459 +++++++++++++++++++++++++++++++++++++++ src/tusb_option.h | 4 + 5 files changed, 658 insertions(+), 1 deletion(-) create mode 100644 hw/bsp/frdm_kl25z/board.mk create mode 100644 hw/bsp/frdm_kl25z/frdm_kl25z.c create mode 100644 src/portable/nxp/khci/dcd_khci.c (limited to 'src/portable') diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index eedae43f7..1cf0ad03c 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -46,7 +46,7 @@ #include "chip.h" #elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX || CFG_TUSB_MCU == OPT_MCU_LPC54XXX || \ - CFG_TUSB_MCU == OPT_MCU_LPC55XX + CFG_TUSB_MCU == OPT_MCU_LPC55XX || CFG_TUSB_MCU == OPT_MCU_MKL25ZXX #include "fsl_device_registers.h" #elif CFG_TUSB_MCU == OPT_MCU_NRF5X diff --git a/hw/bsp/frdm_kl25z/board.mk b/hw/bsp/frdm_kl25z/board.mk new file mode 100644 index 000000000..9d86c4542 --- /dev/null +++ b/hw/bsp/frdm_kl25z/board.mk @@ -0,0 +1,46 @@ +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m0plus \ + -DCPU_MKL25Z128VLK4 \ + -DCFG_TUSB_MCU=OPT_MCU_MKL25ZXX + +# mcu driver cause following warnings +CFLAGS += -Wno-error=unused-parameter + +MCU_DIR = hw/mcu/nxp/sdk/devices/MKL25Z4 + +# All source paths should be relative to the top level. +LD_FILE = $(MCU_DIR)/gcc/MKL25Z128xxx4_flash.ld + +SRC_C += \ + $(MCU_DIR)/system_MKL25Z4.c \ + $(MCU_DIR)/project_template/clock_config.c \ + $(MCU_DIR)/drivers/fsl_clock.c \ + $(MCU_DIR)/drivers/fsl_gpio.c \ + $(MCU_DIR)/drivers/fsl_lpsci.c + +INC += \ + $(TOP)/hw/bsp/$(BOARD) \ + $(TOP)/$(MCU_DIR)/../../CMSIS/Include \ + $(TOP)/$(MCU_DIR) \ + $(TOP)/$(MCU_DIR)/drivers \ + $(TOP)/$(MCU_DIR)/project_template \ + +SRC_S += $(MCU_DIR)/gcc/startup_MKL25Z4.S + +# For TinyUSB port source +VENDOR = nxp +CHIP_FAMILY = khci + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM0 + +# For flash-jlink target +JLINK_DEVICE = MKL25Z128xxx4 + +# For flash-pyocd target +PYOCD_TARGET = mkl25zl128 + +# flash using pyocd +flash: flash-pyocd diff --git a/hw/bsp/frdm_kl25z/frdm_kl25z.c b/hw/bsp/frdm_kl25z/frdm_kl25z.c new file mode 100644 index 000000000..7d3a173ed --- /dev/null +++ b/hw/bsp/frdm_kl25z/frdm_kl25z.c @@ -0,0 +1,148 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * Copyright (c) 2020, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "../board.h" +#include "fsl_device_registers.h" +#include "fsl_gpio.h" +#include "fsl_port.h" +#include "fsl_clock.h" +#include "fsl_lpsci.h" + +#include "clock_config.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB0_IRQHandler(void) +{ + tud_int_handler(0); +} + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM DECLARATION +//--------------------------------------------------------------------+ +// LED +#define LED_PINMUX IOMUXC_GPIO_AD_B0_09_GPIO1_IO09 +#define LED_PORT GPIOB +#define LED_PIN_CLOCK kCLOCK_PortB +#define LED_PIN_PORT PORTB +#define LED_PIN 19U +#define LED_PIN_FUNCTION kPORT_MuxAsGpio +#define LED_STATE_ON 0 + +// UART +#define UART_PORT UART0 +#define UART_PIN_CLOCK kCLOCK_PortA +#define UART_PIN_PORT PORTA +#define UART_PIN_RX 1u +#define UART_PIN_TX 2u +#define UART_PIN_FUNCTION kPORT_MuxAlt2 +#define SOPT5_UART0RXSRC_UART_RX 0x00u /*!< UART0 receive data source select: UART0_RX pin */ +#define SOPT5_UART0TXSRC_UART_TX 0x00u /*!< UART0 transmit data source select: UART0_TX pin */ + +const uint8_t dcd_data[] = { 0x00 }; + +void board_init(void) +{ + BOARD_BootClockRUN(); + SystemCoreClockUpdate(); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + // LED + CLOCK_EnableClock(LED_PIN_CLOCK); + PORT_SetPinMux(LED_PIN_PORT, LED_PIN, LED_PIN_FUNCTION); + gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; + GPIO_PinInit(LED_PORT, LED_PIN, &led_config); + board_led_write(true); + + // UART + CLOCK_EnableClock(UART_PIN_CLOCK); + PORT_SetPinMux(UART_PIN_PORT, UART_PIN_RX, UART_PIN_FUNCTION); + PORT_SetPinMux(UART_PIN_PORT, UART_PIN_TX, UART_PIN_FUNCTION); + SIM->SOPT5 = ((SIM->SOPT5 & + (~(SIM_SOPT5_UART0TXSRC_MASK | SIM_SOPT5_UART0RXSRC_MASK))) + | SIM_SOPT5_UART0TXSRC(SOPT5_UART0TXSRC_UART_TX) + | SIM_SOPT5_UART0RXSRC(SOPT5_UART0RXSRC_UART_RX) + ); + + lpsci_config_t uart_config; + CLOCK_SetLpsci0Clock(1); + LPSCI_GetDefaultConfig(&uart_config); + uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; + uart_config.enableTx = true; + uart_config.enableRx = true; + LPSCI_Init(UART_PORT, &uart_config, CLOCK_GetPllFllSelClkFreq()); + + // USB + CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcPll0, CLOCK_GetFreq(kCLOCK_PllFllSelClk)); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + GPIO_WritePinOutput(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return 0; +} + +int board_uart_read(uint8_t* buf, int len) +{ + LPSCI_ReadBlocking(UART_PORT, buf, len); + return len; +} + +int board_uart_write(void const * buf, int len) +{ + LPSCI_WriteBlocking(UART_PORT, (uint8_t*)buf, len); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c new file mode 100644 index 000000000..aab847b82 --- /dev/null +++ b/src/portable/nxp/khci/dcd_khci.c @@ -0,0 +1,459 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020 Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "tusb_option.h" + +#if TUSB_OPT_DEVICE_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) + +#include "fsl_device_registers.h" +#define KHCI USB0 + +#include "device/dcd.h" + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM DECLARATION +//--------------------------------------------------------------------+ + +enum { + TOK_PID_OUT = 0x1u, + TOK_PID_IN = 0x9u, + TOK_PID_SETUP = 0xDu, +}; + +typedef struct TU_ATTR_PACKED +{ + union { + uint32_t head; + struct { + union { + uint16_t ctl; + struct { + uint16_t zeros : 2; + uint16_t tok_pid : 4; + uint16_t data : 1; + uint16_t own : 1; + uint16_t rsvd0 : 8; + }; + struct { + uint16_t dmy0 : 2; + uint16_t bdt_stall: 1; + uint16_t dts : 1; + uint16_t ninc : 1; + uint16_t keep : 1; + uint16_t dmy1 : 10; + }; + }; + uint16_t bc : 10; + uint16_t rsvd1 : 6; + }; + }; + uint8_t *addr; +}buffer_descriptor_t; + +TU_VERIFY_STATIC( sizeof(buffer_descriptor_t) == 8, "size is not correct" ); + +typedef struct TU_ATTR_PACKED +{ + union { + uint32_t state; + struct { + uint32_t max_packet_size: 11; + uint32_t reserved0 : 5; + uint32_t odd : 1; + uint32_t reserved1 :15; + }; + }; + uint16_t length; + uint16_t remaining; +}endpoint_state_t; + +TU_VERIFY_STATIC( sizeof(endpoint_state_t) == 8, "size is not correct" ); + +typedef struct +{ + union { + /* [#EP][OUT,IN][EVEN,ODD] */ + buffer_descriptor_t bdt[16][2][2]; + uint16_t bda[512]; + }; + TU_ATTR_ALIGNED(4) union { + endpoint_state_t endpoint[16][2]; + endpoint_state_t endpoint_unified[16 * 2]; + }; + uint8_t setup_packet[8]; + uint8_t addr; +}dcd_data_t; + +//--------------------------------------------------------------------+ +// INTERNAL OBJECT & FUNCTION DECLARATION +//--------------------------------------------------------------------+ +// BDT(Buffer Descriptor Table) must be 256-byte aligned +CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(512) static dcd_data_t _dcd; + +TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 512, "size is not correct" ); + +static void prepare_next_setup_packet(uint8_t rhport) +{ + const unsigned out_odd = _dcd.endpoint[0][0].odd; + const unsigned in_odd = _dcd.endpoint[0][1].odd; + if (_dcd.bdt[0][0][out_odd].own) { + TU_LOG1("DCD fail to prepare the next SETUP %d %d\r\n", out_odd, in_odd); + return; + } + _dcd.bdt[0][0][out_odd].data = 0; + _dcd.bdt[0][0][out_odd ^ 1].data = 1; + _dcd.bdt[0][1][in_odd].data = 1; + _dcd.bdt[0][1][in_odd ^ 1].data = 0; + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_OUT), + _dcd.setup_packet, sizeof(_dcd.setup_packet)); +} + +static void process_stall(uint8_t rhport) +{ + if (KHCI->ENDPOINT[0].ENDPT & USB_ENDPT_EPSTALL_MASK) { + /* clear stall condition of the control pipe */ + prepare_next_setup_packet(rhport); + KHCI->ENDPOINT[0].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; + KHCI->ENDPOINT[1].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; + } +} + +static void process_tokdne(uint8_t rhport) +{ + const unsigned s = KHCI->STAT; + KHCI->ISTAT = USB_ISTAT_TOKDNE_MASK; /* fetch the next token if received */ + buffer_descriptor_t *bd = (buffer_descriptor_t *)&_dcd.bda[s]; + endpoint_state_t *ep = &_dcd.endpoint_unified[s >> 3]; + unsigned odd = (s & USB_STAT_ODD_MASK) ? 1 : 0; + + /* fetch pid before discarded by the next steps */ + const unsigned pid = bd->tok_pid; + /* reset values for a next transfer */ + bd->bdt_stall = 0; + bd->dts = 1; + bd->ninc = 0; + bd->keep = 0; + /* update the odd variable to prepare for the next transfer */ + ep->odd = odd ^ 1; + if (pid == TOK_PID_SETUP) { + dcd_event_setup_received(rhport, bd->addr, true); + KHCI->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + return; + } + + const unsigned bc = bd->bc; + const unsigned remaining = ep->remaining - bc; + if (remaining && bc == ep->max_packet_size) { + /* continue the transferring consecutive data */ + ep->remaining = remaining; + const int next_remaining = remaining - ep->max_packet_size; + if (next_remaining > 0) { + /* prepare to the after next transfer */ + bd->addr += ep->max_packet_size * 2; + bd->bc = next_remaining > ep->max_packet_size ? ep->max_packet_size: next_remaining; + __DSB(); + bd->own = 1; /* the own bit must set after addr */ + } + return; + } + const unsigned length = ep->length; + dcd_event_xfer_complete(rhport, + ((s & USB_STAT_TX_MASK) << 4) | (s >> USB_STAT_ENDP_SHIFT), + length - remaining, XFER_RESULT_SUCCESS, true); + if (0 == (s & USB_STAT_ENDP_MASK) && 0 == length) { + /* After completion a ZLP of control transfer, + * it prepares for the next steup transfer. */ + if (_dcd.addr) { + /* When the transfer was the SetAddress, + * the device address should be updated here. */ + KHCI->ADDR = _dcd.addr; + _dcd.addr = 0; + } + prepare_next_setup_packet(rhport); + } +} + +static void process_bus_reset(uint8_t rhport) +{ + KHCI->USBCTRL &= ~USB_USBCTRL_SUSP_MASK; + KHCI->CTL |= USB_CTL_ODDRST_MASK; + KHCI->ADDR = 0; + KHCI->INTEN = (KHCI->INTEN & ~USB_INTEN_RESUMEEN_MASK) | USB_INTEN_SLEEPEN_MASK; + + KHCI->ENDPOINT[0].ENDPT = USB_ENDPT_EPHSHK_MASK | USB_ENDPT_EPRXEN_MASK | USB_ENDPT_EPTXEN_MASK; + for (unsigned i = 1; i < 16; ++i) { + KHCI->ENDPOINT[i].ENDPT = 0; + } + buffer_descriptor_t *bd = _dcd.bdt[0][0]; + for (unsigned i = 0; i < sizeof(_dcd.bdt)/sizeof(*bd); ++i, ++bd) { + bd->head = 0; + } + const endpoint_state_t ep0 = { + .max_packet_size = CFG_TUD_ENDPOINT0_SIZE, + .odd = 0, + .length = 0, + .remaining = 0, + }; + _dcd.endpoint[0][0] = ep0; + _dcd.endpoint[0][1] = ep0; + tu_memclr(_dcd.endpoint[1], sizeof(_dcd.endpoint) - sizeof(_dcd.endpoint[0])); + _dcd.addr = 0; + prepare_next_setup_packet(rhport); + KHCI->CTL &= ~USB_CTL_ODDRST_MASK; + dcd_event_bus_signal(rhport, DCD_EVENT_BUS_RESET, true); +} + +static void process_bus_inactive(uint8_t rhport) +{ + (void) rhport; + const unsigned inten = KHCI->INTEN; + KHCI->INTEN = (inten & ~USB_INTEN_SLEEPEN_MASK) | USB_INTEN_RESUMEEN_MASK; + KHCI->USBCTRL |= USB_USBCTRL_SUSP_MASK; + dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); +} + +static void process_bus_active(uint8_t rhport) +{ + (void) rhport; + KHCI->USBCTRL &= ~USB_USBCTRL_SUSP_MASK; + const unsigned inten = KHCI->INTEN; + KHCI->INTEN = (inten & ~USB_INTEN_RESUMEEN_MASK) | USB_INTEN_SLEEPEN_MASK; + dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); +} + +/*------------------------------------------------------------------*/ +/* Device API + *------------------------------------------------------------------*/ +void dcd_init(uint8_t rhport) +{ + (void) rhport; + + KHCI->USBTRC0 |= USB_USBTRC0_USBRESET_MASK; + while (KHCI->USBTRC0 & USB_USBTRC0_USBRESET_MASK); + tu_memclr(&_dcd, sizeof(_dcd)); + KHCI->USBTRC0 |= TU_BIT(6); /* software must set this bit to 1 */ + KHCI->BDTPAGE1 = (uint8_t)((uintptr_t)_dcd.bdt >> 8); + KHCI->BDTPAGE2 = (uint8_t)((uintptr_t)_dcd.bdt >> 16); + KHCI->BDTPAGE3 = (uint8_t)((uintptr_t)_dcd.bdt >> 24); + + dcd_connect(rhport); + NVIC_ClearPendingIRQ(USB0_IRQn); +} + +void dcd_int_enable(uint8_t rhport) +{ + (void) rhport; + KHCI->INTEN = USB_INTEN_USBRSTEN_MASK | USB_INTEN_TOKDNEEN_MASK | + USB_INTEN_SLEEPEN_MASK | USB_INTEN_ERROREN_MASK | USB_INTEN_STALLEN_MASK; + NVIC_EnableIRQ(USB0_IRQn); +} + +void dcd_int_disable(uint8_t rhport) +{ + (void) rhport; + NVIC_DisableIRQ(USB0_IRQn); + KHCI->INTEN = 0; +} + +void dcd_set_address(uint8_t rhport, uint8_t dev_addr) +{ + (void) rhport; + _dcd.addr = dev_addr & 0x7F; + /* Response with status first before changing device address */ + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); +} + +void dcd_remote_wakeup(uint8_t rhport) +{ + (void) rhport; + unsigned cnt = SystemCoreClock / 100; + KHCI->CTL |= USB_CTL_RESUME_MASK; + while (cnt--) __NOP(); + KHCI->CTL &= ~USB_CTL_RESUME_MASK; +} + +void dcd_connect(uint8_t rhport) +{ + (void) rhport; + KHCI->USBCTRL = 0; + KHCI->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK; + KHCI->CTL |= USB_CTL_USBENSOFEN_MASK; +} + +void dcd_disconnect(uint8_t rhport) +{ + (void) rhport; + KHCI->CTL = 0; + KHCI->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; +} + +//--------------------------------------------------------------------+ +// Endpoint API +//--------------------------------------------------------------------+ +bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) +{ + (void) rhport; + + const unsigned ep_addr = ep_desc->bEndpointAddress; + const unsigned epn = ep_addr & 0xFu; + const unsigned dir = ep_addr & TUSB_DIR_IN_MASK ? 1 : 0; + const unsigned xfer = ep_desc->bmAttributes.xfer; + endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; + const unsigned odd = ep->odd; + buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][0]; + + /* No support for control transfer */ + TU_ASSERT(epn && (xfer != TUSB_XFER_CONTROL)); + + ep->max_packet_size = ep_desc->wMaxPacketSize.size; + unsigned val = USB_ENDPT_EPCTLDIS_MASK; + val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK: 0; + val |= dir ? USB_ENDPT_EPRXEN_MASK : USB_ENDPT_EPTXEN_MASK; + KHCI->ENDPOINT[epn].ENDPT |= val; + + if (xfer != TUSB_XFER_ISOCHRONOUS) { + bd[odd].dts = 1; + bd[odd].data = 0; + bd[odd ^ 1].dts = 1; + bd[odd ^ 1].data = 1; + } + return true; +} + +void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) +{ + (void) rhport; + + const unsigned epn = ep_addr & 0xFu; + const unsigned dir = ep_addr & TUSB_DIR_IN_MASK ? 1 : 0; + endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; + buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][0]; + + KHCI->ENDPOINT[epn].ENDPT = 0; + ep->max_packet_size = 0; + ep->length = 0; + ep->remaining = 0; + bd->head = 0; +} + +bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) +{ + (void) rhport; + NVIC_DisableIRQ(USB0_IRQn); + const unsigned epn = ep_addr & 0xFu; + const unsigned dir = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT; + endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; + buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][ep->odd]; + + if (bd->own) { + TU_LOG1("DCD XFER fail %x %d %lx %lx\r\n", ep_addr, total_bytes, ep->state, bd->head); + return false; /* The last transfer has not completed */ + } + ep->length = total_bytes; + ep->remaining = total_bytes; + + const unsigned mps = ep->max_packet_size; + if (total_bytes > mps) { + buffer_descriptor_t *next = ep->odd ? bd - 1: bd + 1; + /* When total_bytes is greater than the max packet size, + * it prepares to the next transfer to avoid NAK in advance. */ + next->bc = total_bytes >= 2 * mps ? mps: total_bytes - mps; + next->addr = buffer + mps; + next->own = 1; + } + bd->bc = total_bytes >= mps ? mps: total_bytes; + bd->addr = buffer; + __DSB(); + bd->own = 1; /* the own bit must set after addr */ + NVIC_EnableIRQ(USB0_IRQn); + return true; +} + +void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) +{ + (void) rhport; + const unsigned epn = ep_addr & 0xFu; + KHCI->ENDPOINT[epn].ENDPT |= USB_ENDPT_EPSTALL_MASK; +} + +void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) +{ + (void) rhport; + const unsigned epn = ep_addr & 0xFu; + KHCI->ENDPOINT[epn].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; +} + +//--------------------------------------------------------------------+ +// ISR +//--------------------------------------------------------------------+ +void dcd_int_handler(uint8_t rhport) +{ + (void) rhport; + + uint32_t is = KHCI->ISTAT; + uint32_t msk = KHCI->INTEN; + KHCI->ISTAT = is & ~msk; + is &= msk; + if (is & USB_ISTAT_ERROR_MASK) { + /* TODO: */ + uint32_t es = KHCI->ERRSTAT; + KHCI->ERRSTAT = es; + KHCI->ISTAT = is; /* discard any pending events */ + return; + } + + if (is & USB_ISTAT_USBRST_MASK) { + KHCI->ISTAT = is; /* discard any pending events */ + process_bus_reset(rhport); + return; + } + if (is & USB_ISTAT_SLEEP_MASK) { + KHCI->ISTAT = USB_ISTAT_SLEEP_MASK; + process_bus_inactive(rhport); + return; + } + if (is & USB_ISTAT_RESUME_MASK) { + KHCI->ISTAT = USB_ISTAT_RESUME_MASK; + process_bus_active(rhport); + return; + } + if (is & USB_ISTAT_SOFTOK_MASK) { + KHCI->ISTAT = USB_ISTAT_SOFTOK_MASK; + dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); + return; + } + if (is & USB_ISTAT_STALL_MASK) { + KHCI->ISTAT = USB_ISTAT_STALL_MASK; + process_stall(rhport); + return; + } + if (is & USB_ISTAT_TOKDNE_MASK) { + process_tokdne(rhport); + return; + } +} + +#endif diff --git a/src/tusb_option.h b/src/tusb_option.h index 2dd2b5841..71ea7692b 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -97,6 +97,10 @@ // Dialog #define OPT_MCU_DA1469X 1000 ///< Dialog Semiconductor DA1469x +// NXP Kinetis +#define OPT_MCU_MKL25ZXX 1100 ///< NXP MKL25Zxx + + /** @} */ /** \defgroup group_supported_os Supported RTOS -- cgit v1.3.1 From 2737166d2be7988dc3d52d34ceb7fcc6a177bd47 Mon Sep 17 00:00:00 2001 From: kkitayam <45088311+kkitayam@users.noreply.github.com> Date: Wed, 23 Dec 2020 20:32:29 +0900 Subject: fixed wrong direction to enable EP in dcd_edpt_open. fixed incorrect handling of STALL other than EP0 convert tabs to spaces removed unused symbols --- src/portable/nxp/khci/dcd_khci.c | 84 ++++++++++++++++++++++++---------------- 1 file changed, 51 insertions(+), 33 deletions(-) (limited to 'src/portable') diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c index aab847b82..8357bf2b8 100644 --- a/src/portable/nxp/khci/dcd_khci.c +++ b/src/portable/nxp/khci/dcd_khci.c @@ -49,25 +49,24 @@ typedef struct TU_ATTR_PACKED uint32_t head; struct { union { - uint16_t ctl; - struct { - uint16_t zeros : 2; - uint16_t tok_pid : 4; - uint16_t data : 1; - uint16_t own : 1; - uint16_t rsvd0 : 8; - }; - struct { - uint16_t dmy0 : 2; - uint16_t bdt_stall: 1; - uint16_t dts : 1; - uint16_t ninc : 1; - uint16_t keep : 1; - uint16_t dmy1 : 10; - }; + struct { + uint16_t : 2; + uint16_t tok_pid : 4; + uint16_t data : 1; + uint16_t own : 1; + uint16_t : 8; + }; + struct { + uint16_t : 2; + uint16_t bdt_stall: 1; + uint16_t dts : 1; + uint16_t ninc : 1; + uint16_t keep : 1; + uint16_t : 10; + }; }; uint16_t bc : 10; - uint16_t rsvd1 : 6; + uint16_t : 6; }; }; uint8_t *addr; @@ -80,10 +79,10 @@ typedef struct TU_ATTR_PACKED union { uint32_t state; struct { - uint32_t max_packet_size: 11; - uint32_t reserved0 : 5; + uint32_t max_packet_size :11; + uint32_t : 5; uint32_t odd : 1; - uint32_t reserved1 :15; + uint32_t :15; }; }; uint16_t length; @@ -128,7 +127,7 @@ static void prepare_next_setup_packet(uint8_t rhport) _dcd.bdt[0][1][in_odd].data = 1; _dcd.bdt[0][1][in_odd ^ 1].data = 0; dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_OUT), - _dcd.setup_packet, sizeof(_dcd.setup_packet)); + _dcd.setup_packet, sizeof(_dcd.setup_packet)); } static void process_stall(uint8_t rhport) @@ -137,7 +136,6 @@ static void process_stall(uint8_t rhport) /* clear stall condition of the control pipe */ prepare_next_setup_packet(rhport); KHCI->ENDPOINT[0].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; - KHCI->ENDPOINT[1].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; } } @@ -163,6 +161,9 @@ static void process_tokdne(uint8_t rhport) KHCI->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; return; } + if (s >> 4) { + TU_LOG1("TKDNE %x\r\n", s); + } const unsigned bc = bd->bc; const unsigned remaining = ep->remaining - bc; @@ -181,13 +182,13 @@ static void process_tokdne(uint8_t rhport) } const unsigned length = ep->length; dcd_event_xfer_complete(rhport, - ((s & USB_STAT_TX_MASK) << 4) | (s >> USB_STAT_ENDP_SHIFT), - length - remaining, XFER_RESULT_SUCCESS, true); + ((s & USB_STAT_TX_MASK) << 4) | (s >> USB_STAT_ENDP_SHIFT), + length - remaining, XFER_RESULT_SUCCESS, true); if (0 == (s & USB_STAT_ENDP_MASK) && 0 == length) { /* After completion a ZLP of control transfer, * it prepares for the next steup transfer. */ if (_dcd.addr) { - /* When the transfer was the SetAddress, + /* When the transfer was the SetAddress, * the device address should be updated here. */ KHCI->ADDR = _dcd.addr; _dcd.addr = 0; @@ -319,7 +320,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) const unsigned ep_addr = ep_desc->bEndpointAddress; const unsigned epn = ep_addr & 0xFu; - const unsigned dir = ep_addr & TUSB_DIR_IN_MASK ? 1 : 0; + const unsigned dir = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT; const unsigned xfer = ep_desc->bmAttributes.xfer; endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; const unsigned odd = ep->odd; @@ -331,7 +332,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) ep->max_packet_size = ep_desc->wMaxPacketSize.size; unsigned val = USB_ENDPT_EPCTLDIS_MASK; val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK: 0; - val |= dir ? USB_ENDPT_EPRXEN_MASK : USB_ENDPT_EPTXEN_MASK; + val |= dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK; KHCI->ENDPOINT[epn].ENDPT |= val; if (xfer != TUSB_XFER_ISOCHRONOUS) { @@ -340,6 +341,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) bd[odd ^ 1].dts = 1; bd[odd ^ 1].data = 1; } + return true; } @@ -348,11 +350,11 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) (void) rhport; const unsigned epn = ep_addr & 0xFu; - const unsigned dir = ep_addr & TUSB_DIR_IN_MASK ? 1 : 0; + const unsigned dir = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT; endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][0]; - - KHCI->ENDPOINT[epn].ENDPT = 0; + const unsigned msk = dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK; + KHCI->ENDPOINT[epn].ENDPT &= ~msk; ep->max_packet_size = 0; ep->length = 0; ep->remaining = 0; @@ -396,14 +398,30 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) { (void) rhport; const unsigned epn = ep_addr & 0xFu; - KHCI->ENDPOINT[epn].ENDPT |= USB_ENDPT_EPSTALL_MASK; + if (0 == epn) { + KHCI->ENDPOINT[epn].ENDPT |= USB_ENDPT_EPSTALL_MASK; + } else { + const unsigned dir = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT; + buffer_descriptor_t *bd = _dcd.bdt[epn][dir]; + bd[0].bdt_stall = 1; + bd[1].bdt_stall = 1; + } } void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { (void) rhport; - const unsigned epn = ep_addr & 0xFu; - KHCI->ENDPOINT[epn].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; + const unsigned epn = ep_addr & 0xFu; + const unsigned dir = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT; + const unsigned odd = _dcd.endpoint[epn][dir].odd; + buffer_descriptor_t *bd = _dcd.bdt[epn][dir]; + + bd[odd ^ 1].own = 0; + bd[odd ^ 1].data = 1; + bd[odd ^ 1].bdt_stall = 0; + bd[odd].own = 0; + bd[odd].data = 0; + bd[odd].bdt_stall = 0; } //--------------------------------------------------------------------+ -- cgit v1.3.1 From 56c47188d8955686f994e2809b8986bf45efd060 Mon Sep 17 00:00:00 2001 From: Reinhard Panhuber Date: Sun, 3 Jan 2021 16:11:56 +0100 Subject: Rework USB FIFO allocation scheme and allow RX FIFO size reduction --- src/portable/st/synopsys/dcd_synopsys.c | 160 ++++++++++++++++++++------------ 1 file changed, 99 insertions(+), 61 deletions(-) (limited to 'src/portable') diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index 35c814460..63b1dffa5 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -139,15 +139,6 @@ typedef struct { uint8_t interval; } xfer_ctl_t; -// EP size and transfer type report -typedef struct TU_ATTR_PACKED { - // The following format may look complicated but it is the most elegant way of addressing the required fields: EP number, EP direction, and EP transfer type. - // The codes assigned to those fields, according to the USB specification, can be neatly used as indices. - uint16_t ep_size[EP_MAX][2]; ///< dim 1: EP number, dim 2: EP direction denoted by TUSB_DIR_OUT (= 0) and TUSB_DIR_IN (= 1) - bool ep_transfer_type[EP_MAX][2][4]; ///< dim 1: EP number, dim 2: EP direction, dim 3: transfer type, where 0 = Control, 1 = Isochronous, 2 = Bulk, and 3 = Interrupt - ///< I know very well that EP0 can only be used as control EP and we waste space here but for the sake of simplicity we accept that. It is used in a non-persistent way anyway! -} ep_sz_tt_report_t; - typedef volatile uint32_t * usb_fifo_t; xfer_ctl_t xfer_status[EP_MAX][2]; @@ -156,8 +147,9 @@ xfer_ctl_t xfer_status[EP_MAX][2]; // EP0 transfers are limited to 1 packet - larger sizes has to be split static uint16_t ep0_pending[2]; // Index determines direction as tusb_dir_t type -// FIFO RAM allocation so far in words -static uint16_t _allocated_fifo_words; +// TX FIFO RAM allocation so far in words - RX FIFO size is readily available from usb_otg->GRXFSIZ +static uint16_t _allocated_fifo_words_tx; // TX FIFO size in words (IN EPs) +static bool _rx_ep_closed; // Setup the control endpoint 0. static void bus_reset(uint8_t rhport) @@ -170,6 +162,7 @@ static void bus_reset(uint8_t rhport) USB_OTG_INEndpointTypeDef * in_ep = IN_EP_BASE(rhport); tu_memclr(xfer_status, sizeof(xfer_status)); + _rx_ep_closed = false; for(uint8_t n = 0; n < EP_MAX; n++) { out_ep[n].DOEPCTL |= USB_OTG_DOEPCTL_SNAK; @@ -182,16 +175,28 @@ static void bus_reset(uint8_t rhport) // "USB Data FIFOs" section in reference manual // Peripheral FIFO architecture // + // The FIFO is split up in a lower part where the RX FIFO is located and an upper part where the TX FIFOs start. + // We do this to allow the RX FIFO to grow dynamically which is possible since the free space is located + // between the RX and TX FIFOs. This is required by ISO OUT EPs which need a bigger FIFO than the standard + // configuration done below. + // + // Dynamically FIFO sizes are of interest only for ISO EPs since all others are usually not opened and closed. + // All EPs other than ISO are opened as soon as the driver starts up i.e. when the host sends a + // configure interface command. Hence, all IN EPs other the ISO will be located at the top. IN ISO EPs are usually + // opened when the host sends an additional command: setInterface. At this point in time + // the ISO EP will be located next to the free space and can change its size. In case more IN EPs change its size + // an additional memory + // // --------------- 320 or 1024 ( 1280 or 4096 bytes ) + // | IN FIFO 0 | + // --------------- (320 or 1024) - 16 + // | IN FIFO 1 | + // --------------- (320 or 1024) - 16 - x + // | . . . . | + // --------------- (320 or 1024) - 16 - x - y - ... - z // | IN FIFO MAX | // --------------- - // | ... | - // --------------- y + x + 16 + GRXFSIZ - // | IN FIFO 2 | - // --------------- x + 16 + GRXFSIZ - // | IN FIFO 1 | - // --------------- 16 + GRXFSIZ - // | IN FIFO 0 | + // | FREE | // --------------- GRXFSIZ // | OUT FIFO | // | ( Shared ) | @@ -213,24 +218,20 @@ static void bus_reset(uint8_t rhport) // NOTE: Largest-EPsize & EPOUTnum is actual used endpoints in configuration. Since DCD has no knowledge // of the overall picture yet. We will use the worst scenario: largest possible + EP_MAX // - // FIXME: for Isochronous, largest EP size can be 1023/1024 for FS/HS respectively. In addition if multiple ISO + // For Isochronous, largest EP size can be 1023/1024 for FS/HS respectively. In addition if multiple ISO // are enabled at least "2 x (Largest-EPsize/4) + 1" are recommended. Maybe provide a macro for application to // overwrite this. #if TUD_OPT_HIGH_SPEED - _allocated_fifo_words = 271 + 2*EP_MAX; + usb_otg->GRXFSIZ = 271 + 2*EP_MAX; #else - _allocated_fifo_words = 47 + 2*EP_MAX; + usb_otg->GRXFSIZ = 47 + 2*EP_MAX; #endif - usb_otg->GRXFSIZ = _allocated_fifo_words; + _allocated_fifo_words_tx += 16; // Control IN uses FIFO 0 with 64 bytes ( 16 32-bit word ) - usb_otg->DIEPTXF0_HNPTXFSIZ = (16 << USB_OTG_TX0FD_Pos) | _allocated_fifo_words; - - _allocated_fifo_words += 16; - - // TU_LOG2_INT(_allocated_fifo_words); + usb_otg->DIEPTXF0_HNPTXFSIZ = (16 << USB_OTG_TX0FD_Pos) | (EP_FIFO_SIZE/4 - _allocated_fifo_words_tx); // Fixed control EP0 size to 64 bytes in_ep[0].DIEPCTL &= ~(0x03 << USB_OTG_DIEPCTL_MPSIZ_Pos); @@ -557,8 +558,22 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) xfer->max_size = desc_edpt->wMaxPacketSize.size; xfer->interval = desc_edpt->bInterval; + uint16_t const fifo_size = tu_max16((desc_edpt->wMaxPacketSize.size + 3) / 4, 16); // Round up to next full word, minimum value must be 16 + if(dir == TUSB_DIR_OUT) { + // Calculate required size of RX FIFO + uint16_t size_rx = 15 + 2*fifo_size + 2*EP_MAX; + + // If size_rx needs to be extended check if possible and if so enlarge it + if (usb_otg->GRXFSIZ < size_rx) + { + TU_ASSERT(size_rx + _allocated_fifo_words_tx <= EP_FIFO_SIZE/4); + + // Enlarge RX FIFO + usb_otg->GRXFSIZ = size_rx; + } + out_ep[epnum].DOEPCTL |= (1 << USB_OTG_DOEPCTL_USBAEP_Pos) | (desc_edpt->bmAttributes.xfer << USB_OTG_DOEPCTL_EPTYP_Pos) | (desc_edpt->wMaxPacketSize.size << USB_OTG_DOEPCTL_MPSIZ_Pos); @@ -570,16 +585,28 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) // "USB Data FIFOs" section in reference manual // Peripheral FIFO architecture // + // The FIFO is split up in a lower part where the RX FIFO is located and an upper part where the TX FIFOs start. + // We do this to allow the RX FIFO to grow dynamically which is possible since the free space is located + // between the RX and TX FIFOs. This is required by ISO OUT EPs which need a bigger FIFO than the standard + // configuration done below. + // + // Dynamically FIFO sizes are of interest only for ISO EPs since all others are usually not opened and closed. + // All EPs other than ISO are opened as soon as the driver starts up i.e. when the host sends a + // configure interface command. Hence, all IN EPs other the ISO will be located at the top. IN ISO EPs are usually + // opened when the host sends an additional command: setInterface. At this point in time + // the ISO EP will be located next to the free space and can change its size. In case more IN EPs change its size + // an additional memory + // // --------------- 320 or 1024 ( 1280 or 4096 bytes ) + // | IN FIFO 0 | + // --------------- (320 or 1024) - 16 + // | IN FIFO 1 | + // --------------- (320 or 1024) - 16 - x + // | . . . . | + // --------------- (320 or 1024) - 16 - x - y - ... - z // | IN FIFO MAX | // --------------- - // | ... | - // --------------- y + x + 16 + GRXFSIZ - // | IN FIFO 2 | - // --------------- x + 16 + GRXFSIZ - // | IN FIFO 1 | - // --------------- 16 + GRXFSIZ - // | IN FIFO 0 | + // | FREE | // --------------- GRXFSIZ // | OUT FIFO | // | ( Shared ) | @@ -592,29 +619,14 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) // - Interrupt is EPSize // - Bulk/ISO is max(EPSize, remaining-fifo / non-opened-EPIN) - uint16_t const fifo_remaining = EP_FIFO_SIZE/4 - _allocated_fifo_words; - uint16_t fifo_size = (desc_edpt->wMaxPacketSize.size + 3) / 4; // +3 for rounding up to next full word - - if ( desc_edpt->bmAttributes.xfer != TUSB_XFER_INTERRUPT ) - { - uint8_t opened = 0; - for(uint8_t i = 0; i < EP_MAX; i++) - { - if ( (i != epnum) && (xfer_status[i][TUSB_DIR_IN].max_size > 0) ) opened++; - } - - // EP Size or equally divided of remaining whichever is larger - fifo_size = tu_max16(fifo_size, fifo_remaining / (EP_MAX - opened)); - } + // Check if free space is available + TU_ASSERT(_allocated_fifo_words_tx + fifo_size + usb_otg->GRXFSIZ <= EP_FIFO_SIZE/4); - // FIFO overflows, we probably need a better allocating scheme - TU_ASSERT(fifo_size <= fifo_remaining); + _allocated_fifo_words_tx += fifo_size; // DIEPTXF starts at FIFO #1. // Both TXFD and TXSA are in unit of 32-bit words. - usb_otg->DIEPTXF[epnum - 1] = (fifo_size << USB_OTG_DIEPTXF_INEPTXFD_Pos) | _allocated_fifo_words; - - _allocated_fifo_words += fifo_size; + usb_otg->DIEPTXF[epnum - 1] = (fifo_size << USB_OTG_DIEPTXF_INEPTXFD_Pos) | (EP_FIFO_SIZE/4 - _allocated_fifo_words_tx); in_ep[epnum].DIEPCTL |= (1 << USB_OTG_DIEPCTL_USBAEP_Pos) | (epnum << USB_OTG_DIEPCTL_TXFNUM_Pos) | @@ -728,9 +740,17 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) { uint16_t const fifo_size = (usb_otg->DIEPTXF[epnum - 1] & USB_OTG_DIEPTXF_INEPTXFD_Msk) >> USB_OTG_DIEPTXF_INEPTXFD_Pos; uint16_t const fifo_start = (usb_otg->DIEPTXF[epnum - 1] & USB_OTG_DIEPTXF_INEPTXSA_Msk) >> USB_OTG_DIEPTXF_INEPTXSA_Pos; - // For now only endpoint that has FIFO at the end of FIFO memory can be closed without fuss. - TU_ASSERT(fifo_start + fifo_size == _allocated_fifo_words,); - _allocated_fifo_words -= fifo_size; + // For now only the last opened endpoint can be closed without fuss. + TU_ASSERT(fifo_start == EP_FIFO_SIZE/4 - _allocated_fifo_words_tx,); + _allocated_fifo_words_tx -= fifo_size; + } + else + { + // Update max_size + xfer_status[epnum][TUSB_DIR_OUT].max_size = 0; + + // Set flag such that RX FIFO gets reduced in size one RX FIFO is empty + _rx_ep_closed = true; } } @@ -884,6 +904,24 @@ static void handle_rxflvl_ints(uint8_t rhport, USB_OTG_OUTEndpointTypeDef * out_ TU_BREAKPOINT(); break; } + + // If an OUT EP was closed update (reduce) the RX FIFO size if RX FIFO is empty - since this function handle_rxflvl_ints() gets looped from dcd_int_handler() until RX FIFO is empty it is guaranteed to be entered + if (_rx_ep_closed && (usb_otg->GINTSTS & USB_OTG_GINTSTS_RXFLVL)) + { + // Determine largest EP size for RX FIFO + uint16_t sz = xfer_status[0][TUSB_DIR_OUT].max_size; + + for (uint8_t cnt = 1; cnt < EP_MAX; cnt++) + { + if (sz < xfer_status[cnt][TUSB_DIR_OUT].max_size) sz = xfer_status[cnt][TUSB_DIR_OUT].max_size; + } + + // Update size of RX FIFO + usb_otg->GRXFSIZ = 15 + 2*sz/4 + 2*EP_MAX; // sz was in bytes and is now needed in words + + // Disable flag + _rx_ep_closed = false; + } } static void handle_epout_ints(uint8_t rhport, USB_OTG_DeviceTypeDef * dev, USB_OTG_OUTEndpointTypeDef * out_ep) { @@ -1063,11 +1101,11 @@ void dcd_int_handler(uint8_t rhport) handle_epin_ints(rhport, dev, in_ep); } -// // Check for Incomplete isochronous IN transfer -// if(int_status & USB_OTG_GINTSTS_IISOIXFR) { -// printf(" IISOIXFR!\r\n"); -//// TU_LOG2(" IISOIXFR!\r\n"); -// } + // // Check for Incomplete isochronous IN transfer + // if(int_status & USB_OTG_GINTSTS_IISOIXFR) { + // printf(" IISOIXFR!\r\n"); + //// TU_LOG2(" IISOIXFR!\r\n"); + // } } #endif -- cgit v1.3.1 From 13b499f910d3a80886a4fd4cb20fb0b0bd46d3da Mon Sep 17 00:00:00 2001 From: Reinhard Panhuber Date: Sun, 3 Jan 2021 17:59:50 +0100 Subject: Clean up --- src/portable/st/synopsys/dcd_synopsys.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) (limited to 'src/portable') diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index 63b1dffa5..2ff1c2688 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -145,11 +145,11 @@ xfer_ctl_t xfer_status[EP_MAX][2]; #define XFER_CTL_BASE(_ep, _dir) &xfer_status[_ep][_dir] // EP0 transfers are limited to 1 packet - larger sizes has to be split -static uint16_t ep0_pending[2]; // Index determines direction as tusb_dir_t type +static uint16_t ep0_pending[2]; // Index determines direction as tusb_dir_t type // TX FIFO RAM allocation so far in words - RX FIFO size is readily available from usb_otg->GRXFSIZ static uint16_t _allocated_fifo_words_tx; // TX FIFO size in words (IN EPs) -static bool _rx_ep_closed; +static bool _rx_ep_closed; // Flag to check if RX FIFO size needs an update (reduce its size) // Setup the control endpoint 0. static void bus_reset(uint8_t rhport) @@ -563,15 +563,15 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) if(dir == TUSB_DIR_OUT) { // Calculate required size of RX FIFO - uint16_t size_rx = 15 + 2*fifo_size + 2*EP_MAX; + uint16_t const sz = 15 + 2*fifo_size + 2*EP_MAX; // If size_rx needs to be extended check if possible and if so enlarge it - if (usb_otg->GRXFSIZ < size_rx) + if (usb_otg->GRXFSIZ < sz) { - TU_ASSERT(size_rx + _allocated_fifo_words_tx <= EP_FIFO_SIZE/4); + TU_ASSERT(sz + _allocated_fifo_words_tx <= EP_FIFO_SIZE/4); // Enlarge RX FIFO - usb_otg->GRXFSIZ = size_rx; + usb_otg->GRXFSIZ = sz; } out_ep[epnum].DOEPCTL |= (1 << USB_OTG_DOEPCTL_USBAEP_Pos) | @@ -736,6 +736,10 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) uint8_t const dir = tu_edpt_dir(ep_addr); dcd_edpt_disable(rhport, ep_addr, false); + + // Update max_size + xfer_status[epnum][dir].max_size = 0; // max_size = 0 marks a disabled EP - required for changing FIFO allocation + if (dir == TUSB_DIR_IN) { uint16_t const fifo_size = (usb_otg->DIEPTXF[epnum - 1] & USB_OTG_DIEPTXF_INEPTXFD_Msk) >> USB_OTG_DIEPTXF_INEPTXFD_Pos; @@ -746,11 +750,7 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) } else { - // Update max_size - xfer_status[epnum][TUSB_DIR_OUT].max_size = 0; - - // Set flag such that RX FIFO gets reduced in size one RX FIFO is empty - _rx_ep_closed = true; + _rx_ep_closed = true; // Set flag such that RX FIFO gets reduced in size once RX FIFO is empty } } -- cgit v1.3.1 From 37bb14678a2d3fc03b75527f223f3b16b8756fc3 Mon Sep 17 00:00:00 2001 From: Reinhard Panhuber Date: Mon, 4 Jan 2021 12:06:16 +0100 Subject: Remove too verbose comment --- src/portable/st/synopsys/dcd_synopsys.c | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'src/portable') diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index 2ff1c2688..60d2fd604 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -585,18 +585,6 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) // "USB Data FIFOs" section in reference manual // Peripheral FIFO architecture // - // The FIFO is split up in a lower part where the RX FIFO is located and an upper part where the TX FIFOs start. - // We do this to allow the RX FIFO to grow dynamically which is possible since the free space is located - // between the RX and TX FIFOs. This is required by ISO OUT EPs which need a bigger FIFO than the standard - // configuration done below. - // - // Dynamically FIFO sizes are of interest only for ISO EPs since all others are usually not opened and closed. - // All EPs other than ISO are opened as soon as the driver starts up i.e. when the host sends a - // configure interface command. Hence, all IN EPs other the ISO will be located at the top. IN ISO EPs are usually - // opened when the host sends an additional command: setInterface. At this point in time - // the ISO EP will be located next to the free space and can change its size. In case more IN EPs change its size - // an additional memory - // // --------------- 320 or 1024 ( 1280 or 4096 bytes ) // | IN FIFO 0 | // --------------- (320 or 1024) - 16 -- cgit v1.3.1 From 2fa500af1822e4d2d882b7b5455cfd0860aa42a5 Mon Sep 17 00:00:00 2001 From: Reinhard Panhuber Date: Mon, 4 Jan 2021 17:00:23 +0100 Subject: Minor corrections for PR - externerlize code into functions - correct comments --- src/portable/st/synopsys/dcd_synopsys.c | 63 +++++++++++++++++++-------------- 1 file changed, 37 insertions(+), 26 deletions(-) (limited to 'src/portable') diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index 60d2fd604..7250cf188 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -151,6 +151,36 @@ static uint16_t ep0_pending[2]; // Index determines direction static uint16_t _allocated_fifo_words_tx; // TX FIFO size in words (IN EPs) static bool _rx_ep_closed; // Flag to check if RX FIFO size needs an update (reduce its size) +// Calculate the RX FIFO size according to recommendations from reference manual +// ep_size in words +static inline uint16_t calc_rx_ff_size(uint16_t ep_size) +{ + return 15 + 2*ep_size + 2*EP_MAX; +} + +static inline void update_grxfsiz() +{ + // If an OUT EP was closed update (reduce) the RX FIFO size if RX FIFO is empty - since this function handle_rxflvl_ints() gets looped from dcd_int_handler() until RX FIFO is empty it is guaranteed to be entered + if (_rx_ep_closed) + { + USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); + + // Determine largest EP size for RX FIFO + uint16_t sz = xfer_status[0][TUSB_DIR_OUT].max_size; + + for (uint8_t cnt = 1; cnt < EP_MAX; cnt++) + { + if (sz < xfer_status[cnt][TUSB_DIR_OUT].max_size) sz = xfer_status[cnt][TUSB_DIR_OUT].max_size; + } + + // Update size of RX FIFO + usb_otg->GRXFSIZ = calc_rx_ff_size(sz/4); // sz was in bytes and is now needed in words + + // Disable flag + _rx_ep_closed = false; + } +} + // Setup the control endpoint 0. static void bus_reset(uint8_t rhport) { @@ -223,12 +253,12 @@ static void bus_reset(uint8_t rhport) // overwrite this. #if TUD_OPT_HIGH_SPEED - usb_otg->GRXFSIZ = 271 + 2*EP_MAX; + usb_otg->GRXFSIZ = calc_rx_ff_size(128); #else - usb_otg->GRXFSIZ = 47 + 2*EP_MAX; + usb_otg->GRXFSIZ = calc_rx_ff_size(16); #endif - _allocated_fifo_words_tx += 16; + _allocated_fifo_words_tx = 16; // Control IN uses FIFO 0 with 64 bytes ( 16 32-bit word ) usb_otg->DIEPTXF0_HNPTXFSIZ = (16 << USB_OTG_TX0FD_Pos) | (EP_FIFO_SIZE/4 - _allocated_fifo_words_tx); @@ -563,7 +593,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) if(dir == TUSB_DIR_OUT) { // Calculate required size of RX FIFO - uint16_t const sz = 15 + 2*fifo_size + 2*EP_MAX; + uint16_t const sz = calc_rx_ff_size(fifo_size); // If size_rx needs to be extended check if possible and if so enlarge it if (usb_otg->GRXFSIZ < sz) @@ -602,10 +632,6 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) // // In FIFO is allocated by following rules: // - IN EP 1 gets FIFO 1, IN EP "n" gets FIFO "n". - // - Offset: allocated so far - // - Size - // - Interrupt is EPSize - // - Bulk/ISO is max(EPSize, remaining-fifo / non-opened-EPIN) // Check if free space is available TU_ASSERT(_allocated_fifo_words_tx + fifo_size + usb_otg->GRXFSIZ <= EP_FIFO_SIZE/4); @@ -892,24 +918,6 @@ static void handle_rxflvl_ints(uint8_t rhport, USB_OTG_OUTEndpointTypeDef * out_ TU_BREAKPOINT(); break; } - - // If an OUT EP was closed update (reduce) the RX FIFO size if RX FIFO is empty - since this function handle_rxflvl_ints() gets looped from dcd_int_handler() until RX FIFO is empty it is guaranteed to be entered - if (_rx_ep_closed && (usb_otg->GINTSTS & USB_OTG_GINTSTS_RXFLVL)) - { - // Determine largest EP size for RX FIFO - uint16_t sz = xfer_status[0][TUSB_DIR_OUT].max_size; - - for (uint8_t cnt = 1; cnt < EP_MAX; cnt++) - { - if (sz < xfer_status[cnt][TUSB_DIR_OUT].max_size) sz = xfer_status[cnt][TUSB_DIR_OUT].max_size; - } - - // Update size of RX FIFO - usb_otg->GRXFSIZ = 15 + 2*sz/4 + 2*EP_MAX; // sz was in bytes and is now needed in words - - // Disable flag - _rx_ep_closed = false; - } } static void handle_epout_ints(uint8_t rhport, USB_OTG_DeviceTypeDef * dev, USB_OTG_OUTEndpointTypeDef * out_ep) { @@ -1074,6 +1082,9 @@ void dcd_int_handler(uint8_t rhport) int_status = usb_otg->GINTSTS; } while(int_status & USB_OTG_GINTSTS_RXFLVL); + // Manage RX FIFO size + update_grxfsiz(); + usb_otg->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM; } -- cgit v1.3.1 From f2b4567a2b16c9e8f1af8278a9db8675d58947e2 Mon Sep 17 00:00:00 2001 From: Reinhard Panhuber Date: Mon, 4 Jan 2021 17:15:42 +0100 Subject: Correct function declaration --- src/portable/st/synopsys/dcd_synopsys.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/portable') diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index 7250cf188..32be1f2df 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -158,7 +158,7 @@ static inline uint16_t calc_rx_ff_size(uint16_t ep_size) return 15 + 2*ep_size + 2*EP_MAX; } -static inline void update_grxfsiz() +static inline void update_grxfsiz(void) { // If an OUT EP was closed update (reduce) the RX FIFO size if RX FIFO is empty - since this function handle_rxflvl_ints() gets looped from dcd_int_handler() until RX FIFO is empty it is guaranteed to be entered if (_rx_ep_closed) -- cgit v1.3.1 From 60620dca4286fc9ce9ddf4c2f2e6a39c062a5056 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 8 Jan 2021 01:21:03 +0700 Subject: walkround for samd21 setup_packet overflow increase setup packet size from 8 to 12, since USB DMA controller is suspected to overflow the buffer with 2 extra bytes --- src/portable/microchip/samd/dcd_samd.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'src/portable') diff --git a/src/portable/microchip/samd/dcd_samd.c b/src/portable/microchip/samd/dcd_samd.c index f1dca88a5..35fac23a8 100644 --- a/src/portable/microchip/samd/dcd_samd.c +++ b/src/portable/microchip/samd/dcd_samd.c @@ -37,14 +37,20 @@ /* MACRO TYPEDEF CONSTANT ENUM *------------------------------------------------------------------*/ static TU_ATTR_ALIGNED(4) UsbDeviceDescBank sram_registers[8][2]; -static TU_ATTR_ALIGNED(4) uint8_t _setup_packet[8]; + +// Setup packet is only 8 bytes in length. However under certain scenario, +// SAMD21 USB DMA controller is "suspected" to overwrite/overflow the setup_packet with 2 extra bytes. +// Which corrupt other variable and cause issue such as +// https://github.com/adafruit/circuitpython/issues/3912 (on macOS) +// Therefore we increase it to 12 bytes as walk-around until figuring out the root cause +static TU_ATTR_ALIGNED(4) uint8_t _setup_packet[8+4]; // ready for receiving SETUP packet static inline void prepare_setup(void) { // Only make sure the EP0 OUT buffer is ready sram_registers[0][0].ADDR.reg = (uint32_t) _setup_packet; - sram_registers[0][0].PCKSIZE.bit.MULTI_PACKET_SIZE = sizeof(_setup_packet); + sram_registers[0][0].PCKSIZE.bit.MULTI_PACKET_SIZE = sizeof(tusb_control_request_t); sram_registers[0][0].PCKSIZE.bit.BYTE_COUNT = 0; } -- cgit v1.3.1 From cc5dfd03cd64b1faad7374f6207cb80837134c89 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 8 Jan 2021 11:21:26 +0700 Subject: update comment and correct the size to 8+2 --- src/portable/microchip/samd/dcd_samd.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'src/portable') diff --git a/src/portable/microchip/samd/dcd_samd.c b/src/portable/microchip/samd/dcd_samd.c index 35fac23a8..4806342cc 100644 --- a/src/portable/microchip/samd/dcd_samd.c +++ b/src/portable/microchip/samd/dcd_samd.c @@ -39,11 +39,14 @@ static TU_ATTR_ALIGNED(4) UsbDeviceDescBank sram_registers[8][2]; // Setup packet is only 8 bytes in length. However under certain scenario, -// SAMD21 USB DMA controller is "suspected" to overwrite/overflow the setup_packet with 2 extra bytes. -// Which corrupt other variable and cause issue such as -// https://github.com/adafruit/circuitpython/issues/3912 (on macOS) -// Therefore we increase it to 12 bytes as walk-around until figuring out the root cause -static TU_ATTR_ALIGNED(4) uint8_t _setup_packet[8+4]; +// USB DMA controller may decide to overwrite/overflow the buffer with +// 2 extra bytes of CRC. From datasheet's "Management of SETUP Transactions" section +// If the number of received data bytes is the maximum data payload specified by +// PCKSIZE.SIZE minus one, only the first CRC data is written to the data buffer. +// If the number of received data is equal or less than the data payload specified +// by PCKSIZE.SIZE minus two, both CRC data bytes are written to the data buffer. +// Therefore we will increase it to 10 bytes just to be safe +static TU_ATTR_ALIGNED(4) uint8_t _setup_packet[8+2]; // ready for receiving SETUP packet static inline void prepare_setup(void) -- cgit v1.3.1 From 3e1d85eed25c384cc9fe6e7e16fbfbdc491c5536 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 8 Jan 2021 11:43:26 +0700 Subject: comment clean up --- src/portable/microchip/samd/dcd_samd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/portable') diff --git a/src/portable/microchip/samd/dcd_samd.c b/src/portable/microchip/samd/dcd_samd.c index 4806342cc..68a15672a 100644 --- a/src/portable/microchip/samd/dcd_samd.c +++ b/src/portable/microchip/samd/dcd_samd.c @@ -45,7 +45,7 @@ static TU_ATTR_ALIGNED(4) UsbDeviceDescBank sram_registers[8][2]; // PCKSIZE.SIZE minus one, only the first CRC data is written to the data buffer. // If the number of received data is equal or less than the data payload specified // by PCKSIZE.SIZE minus two, both CRC data bytes are written to the data buffer. -// Therefore we will increase it to 10 bytes just to be safe +// Therefore we will need to increase it to 10 bytes here. static TU_ATTR_ALIGNED(4) uint8_t _setup_packet[8+2]; // ready for receiving SETUP packet -- cgit v1.3.1 From 86c34a9a33d84eca95363f36f9ee9269d6586e3e Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 8 Jan 2021 16:25:30 +0700 Subject: minor clean up following pr581 --- src/portable/st/synopsys/dcd_synopsys.c | 82 +++++++++++++++++---------------- src/tusb_option.h | 12 ++--- 2 files changed, 49 insertions(+), 45 deletions(-) (limited to 'src/portable') diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index 32be1f2df..a054621a9 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -45,13 +45,13 @@ #define STM32L4_SYNOPSYS #endif -#if TUSB_OPT_DEVICE_ENABLED && \ +#if TUSB_OPT_DEVICE_ENABLED && \ ( (CFG_TUSB_MCU == OPT_MCU_STM32F1 && defined(STM32F1_SYNOPSYS)) || \ - CFG_TUSB_MCU == OPT_MCU_STM32F2 || \ - CFG_TUSB_MCU == OPT_MCU_STM32F4 || \ - CFG_TUSB_MCU == OPT_MCU_STM32F7 || \ - CFG_TUSB_MCU == OPT_MCU_STM32H7 || \ - (CFG_TUSB_MCU == OPT_MCU_STM32L4 && defined(STM32L4_SYNOPSYS)) \ + CFG_TUSB_MCU == OPT_MCU_STM32F2 || \ + CFG_TUSB_MCU == OPT_MCU_STM32F4 || \ + CFG_TUSB_MCU == OPT_MCU_STM32F7 || \ + CFG_TUSB_MCU == OPT_MCU_STM32H7 || \ + (CFG_TUSB_MCU == OPT_MCU_STM32L4 && defined(STM32L4_SYNOPSYS)) \ ) // EP_MAX : Max number of bi-directional endpoints including EP0 @@ -115,6 +115,7 @@ #define EP_FIFO_SIZE EP_FIFO_SIZE_HS #define RHPORT_REGS_BASE USB_OTG_HS_PERIPH_BASE #define RHPORT_IRQn OTG_HS_IRQn + #endif #define GLOBAL_BASE(_port) ((USB_OTG_GlobalTypeDef*) RHPORT_REGS_BASE) @@ -152,33 +153,27 @@ static uint16_t _allocated_fifo_words_tx; // TX FIFO size in words (IN E static bool _rx_ep_closed; // Flag to check if RX FIFO size needs an update (reduce its size) // Calculate the RX FIFO size according to recommendations from reference manual -// ep_size in words static inline uint16_t calc_rx_ff_size(uint16_t ep_size) { - return 15 + 2*ep_size + 2*EP_MAX; + return 15 + 2*(ep_size/4) + 2*EP_MAX; } -static inline void update_grxfsiz(void) +static inline void update_grxfsiz(uint8_t rhport) { - // If an OUT EP was closed update (reduce) the RX FIFO size if RX FIFO is empty - since this function handle_rxflvl_ints() gets looped from dcd_int_handler() until RX FIFO is empty it is guaranteed to be entered - if (_rx_ep_closed) - { - USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); - - // Determine largest EP size for RX FIFO - uint16_t sz = xfer_status[0][TUSB_DIR_OUT].max_size; + (void) rhport; - for (uint8_t cnt = 1; cnt < EP_MAX; cnt++) - { - if (sz < xfer_status[cnt][TUSB_DIR_OUT].max_size) sz = xfer_status[cnt][TUSB_DIR_OUT].max_size; - } + USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); - // Update size of RX FIFO - usb_otg->GRXFSIZ = calc_rx_ff_size(sz/4); // sz was in bytes and is now needed in words + // Determine largest EP size for RX FIFO + uint16_t sz = xfer_status[0][TUSB_DIR_OUT].max_size; - // Disable flag - _rx_ep_closed = false; + for (uint8_t cnt = 1; cnt < EP_MAX; cnt++) + { + if (sz < xfer_status[cnt][TUSB_DIR_OUT].max_size) sz = xfer_status[cnt][TUSB_DIR_OUT].max_size; } + + // Update size of RX FIFO + usb_otg->GRXFSIZ = calc_rx_ff_size(sz); } // Setup the control endpoint 0. @@ -252,11 +247,7 @@ static void bus_reset(uint8_t rhport) // are enabled at least "2 x (Largest-EPsize/4) + 1" are recommended. Maybe provide a macro for application to // overwrite this. -#if TUD_OPT_HIGH_SPEED - usb_otg->GRXFSIZ = calc_rx_ff_size(128); -#else - usb_otg->GRXFSIZ = calc_rx_ff_size(16); -#endif + usb_otg->GRXFSIZ = calc_rx_ff_size(TUD_OPT_HIGH_SPEED ? 512 : 64); _allocated_fifo_words_tx = 16; @@ -588,12 +579,12 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) xfer->max_size = desc_edpt->wMaxPacketSize.size; xfer->interval = desc_edpt->bInterval; - uint16_t const fifo_size = tu_max16((desc_edpt->wMaxPacketSize.size + 3) / 4, 16); // Round up to next full word, minimum value must be 16 + uint16_t const fifo_size = (desc_edpt->wMaxPacketSize.size + 3) / 4; // Round up to next full word if(dir == TUSB_DIR_OUT) { // Calculate required size of RX FIFO - uint16_t const sz = calc_rx_ff_size(fifo_size); + uint16_t const sz = calc_rx_ff_size(4*fifo_size); // If size_rx needs to be extended check if possible and if so enlarge it if (usb_otg->GRXFSIZ < sz) @@ -1020,13 +1011,15 @@ void dcd_int_handler(uint8_t rhport) uint32_t int_status = usb_otg->GINTSTS; - if(int_status & USB_OTG_GINTSTS_USBRST) { + if(int_status & USB_OTG_GINTSTS_USBRST) + { // USBRST is start of reset. usb_otg->GINTSTS = USB_OTG_GINTSTS_USBRST; bus_reset(rhport); } - if(int_status & USB_OTG_GINTSTS_ENUMDNE) { + if(int_status & USB_OTG_GINTSTS_ENUMDNE) + { // ENUMDNE is the end of reset where speed of the link is detected usb_otg->GINTSTS = USB_OTG_GINTSTS_ENUMDNE; @@ -1063,39 +1056,50 @@ void dcd_int_handler(uint8_t rhport) } #if USE_SOF - if(int_status & USB_OTG_GINTSTS_SOF) { + if(int_status & USB_OTG_GINTSTS_SOF) + { usb_otg->GINTSTS = USB_OTG_GINTSTS_SOF; dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); } #endif // RxFIFO non-empty interrupt handling. - if(int_status & USB_OTG_GINTSTS_RXFLVL) { + if(int_status & USB_OTG_GINTSTS_RXFLVL) + { // RXFLVL bit is read-only // Mask out RXFLVL while reading data from FIFO usb_otg->GINTMSK &= ~USB_OTG_GINTMSK_RXFLVLM; // Loop until all available packets were handled - do { + do + { handle_rxflvl_ints(rhport, out_ep); int_status = usb_otg->GINTSTS; } while(int_status & USB_OTG_GINTSTS_RXFLVL); // Manage RX FIFO size - update_grxfsiz(); + if (_rx_ep_closed) + { + update_grxfsiz(rhport); + + // Disable flag + _rx_ep_closed = false; + } usb_otg->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM; } // OUT endpoint interrupt handling. - if(int_status & USB_OTG_GINTSTS_OEPINT) { + if(int_status & USB_OTG_GINTSTS_OEPINT) + { // OEPINT is read-only handle_epout_ints(rhport, dev, out_ep); } // IN endpoint interrupt handling. - if(int_status & USB_OTG_GINTSTS_IEPINT) { + if(int_status & USB_OTG_GINTSTS_IEPINT) + { // IEPINT bit read-only handle_epin_ints(rhport, dev, in_ep); } diff --git a/src/tusb_option.h b/src/tusb_option.h index 71ea7692b..65a06bfa7 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -151,22 +151,22 @@ #define CFG_TUSB_RHPORT1_MODE OPT_MODE_NONE #endif -#if ((CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST ) && (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST )) || \ - ((CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE) && (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)) +#if (((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST ) && ((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST )) || \ + (((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_DEVICE) && ((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_DEVICE)) #error "TinyUSB currently does not support same modes on more than 1 roothub port" #endif // Which roothub port is configured as host -#define TUH_OPT_RHPORT ( (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST) ? 0 : ((CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST) ? 1 : -1) ) +#define TUH_OPT_RHPORT ( ((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST) ? 0 : (((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HOST) ? 1 : -1) ) #define TUSB_OPT_HOST_ENABLED ( TUH_OPT_RHPORT >= 0 ) // Which roothub port is configured as device -#define TUD_OPT_RHPORT ( (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE) ? 0 : ((CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE) ? 1 : -1) ) +#define TUD_OPT_RHPORT ( ((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_DEVICE) ? 0 : (((CFG_TUSB_RHPORT1_MODE) & OPT_MODE_DEVICE) ? 1 : -1) ) #if TUD_OPT_RHPORT == 0 -#define TUD_OPT_HIGH_SPEED ( CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED ) +#define TUD_OPT_HIGH_SPEED ( (CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HIGH_SPEED ) #else -#define TUD_OPT_HIGH_SPEED ( CFG_TUSB_RHPORT1_MODE & OPT_MODE_HIGH_SPEED ) +#define TUD_OPT_HIGH_SPEED ( (CFG_TUSB_RHPORT1_MODE) & OPT_MODE_HIGH_SPEED ) #endif #define TUSB_OPT_DEVICE_ENABLED ( TUD_OPT_RHPORT >= 0 ) -- cgit v1.3.1 From 9998e8a665cb3b14901ec9993a486f74c95d5475 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 8 Jan 2021 16:34:36 +0700 Subject: more minor work --- src/portable/st/synopsys/dcd_synopsys.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) (limited to 'src/portable') diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index a054621a9..fd845c8f4 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -150,7 +150,7 @@ static uint16_t ep0_pending[2]; // Index determines direction // TX FIFO RAM allocation so far in words - RX FIFO size is readily available from usb_otg->GRXFSIZ static uint16_t _allocated_fifo_words_tx; // TX FIFO size in words (IN EPs) -static bool _rx_ep_closed; // Flag to check if RX FIFO size needs an update (reduce its size) +static bool _out_ep_closed; // Flag to check if RX FIFO size needs an update (reduce its size) // Calculate the RX FIFO size according to recommendations from reference manual static inline uint16_t calc_rx_ff_size(uint16_t ep_size) @@ -165,11 +165,10 @@ static inline void update_grxfsiz(uint8_t rhport) USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); // Determine largest EP size for RX FIFO - uint16_t sz = xfer_status[0][TUSB_DIR_OUT].max_size; - - for (uint8_t cnt = 1; cnt < EP_MAX; cnt++) + uint16_t sz = 0; + for (uint8_t epnum = 0; epnum < EP_MAX; epnum++) { - if (sz < xfer_status[cnt][TUSB_DIR_OUT].max_size) sz = xfer_status[cnt][TUSB_DIR_OUT].max_size; + sz = tu_max16(sz, xfer_status[epnum][TUSB_DIR_OUT].max_size); } // Update size of RX FIFO @@ -187,7 +186,7 @@ static void bus_reset(uint8_t rhport) USB_OTG_INEndpointTypeDef * in_ep = IN_EP_BASE(rhport); tu_memclr(xfer_status, sizeof(xfer_status)); - _rx_ep_closed = false; + _out_ep_closed = false; for(uint8_t n = 0; n < EP_MAX; n++) { out_ep[n].DOEPCTL |= USB_OTG_DOEPCTL_SNAK; @@ -755,7 +754,7 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) } else { - _rx_ep_closed = true; // Set flag such that RX FIFO gets reduced in size once RX FIFO is empty + _out_ep_closed = true; // Set flag such that RX FIFO gets reduced in size once RX FIFO is empty } } @@ -1079,12 +1078,12 @@ void dcd_int_handler(uint8_t rhport) } while(int_status & USB_OTG_GINTSTS_RXFLVL); // Manage RX FIFO size - if (_rx_ep_closed) + if (_out_ep_closed) { update_grxfsiz(rhport); // Disable flag - _rx_ep_closed = false; + _out_ep_closed = false; } usb_otg->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM; -- cgit v1.3.1 From 201ea7ca6d9634c8187c5f58938f27c4dbe33564 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 8 Jan 2021 16:38:41 +0700 Subject: remove inline for update_grxfsiz --- src/portable/st/synopsys/dcd_synopsys.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/portable') diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index fd845c8f4..f00df5d55 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -158,7 +158,7 @@ static inline uint16_t calc_rx_ff_size(uint16_t ep_size) return 15 + 2*(ep_size/4) + 2*EP_MAX; } -static inline void update_grxfsiz(uint8_t rhport) +static void update_grxfsiz(uint8_t rhport) { (void) rhport; -- cgit v1.3.1 From cca27fc383a1caebf4f50c2aa27076422249aa3f Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 8 Jan 2021 16:54:50 +0700 Subject: another rename --- src/portable/st/synopsys/dcd_synopsys.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/portable') diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index f00df5d55..227c9ee61 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -165,14 +165,14 @@ static void update_grxfsiz(uint8_t rhport) USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); // Determine largest EP size for RX FIFO - uint16_t sz = 0; + uint16_t max_epsize = 0; for (uint8_t epnum = 0; epnum < EP_MAX; epnum++) { - sz = tu_max16(sz, xfer_status[epnum][TUSB_DIR_OUT].max_size); + max_epsize = tu_max16(max_epsize, xfer_status[epnum][TUSB_DIR_OUT].max_size); } // Update size of RX FIFO - usb_otg->GRXFSIZ = calc_rx_ff_size(sz); + usb_otg->GRXFSIZ = calc_rx_ff_size(max_epsize); } // Setup the control endpoint 0. -- cgit v1.3.1 From 6e6e6265e4feb797ddbd835dc1bee865d04219e6 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 8 Jan 2021 22:34:36 +0700 Subject: use dcd_event_bus_reset() with speed to replace bus_signal --- src/device/usbd.c | 18 ++++++++++++++++++ src/portable/dialog/da146xx/dcd_da146xx.c | 7 +++---- src/portable/espressif/esp32s2/dcd_esp32s2.c | 1 - src/portable/microchip/samd/dcd_samd.c | 2 +- src/portable/microchip/samg/dcd_samg.c | 2 +- src/portable/nordic/nrf5x/dcd_nrf5x.c | 2 +- src/portable/nuvoton/nuc120/dcd_nuc120.c | 3 +-- src/portable/nuvoton/nuc121/dcd_nuc121.c | 2 +- src/portable/nxp/khci/dcd_khci.c | 2 +- src/portable/nxp/lpc17_40/dcd_lpc17_40.c | 2 +- src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 4 ++-- src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 2 +- src/portable/st/synopsys/dcd_synopsys.c | 9 --------- src/portable/ti/msp430x5xx/dcd_msp430x5xx.c | 6 +++--- src/portable/valentyusb/eptri/dcd_eptri.c | 2 +- test/test/device/msc/test_msc_device.c | 2 +- test/test/support/tusb_config.h | 6 +++--- 17 files changed, 39 insertions(+), 33 deletions(-) (limited to 'src/portable') diff --git a/src/device/usbd.c b/src/device/usbd.c index 791d533ae..f6b00563d 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -1103,6 +1103,24 @@ bool usbd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep) { TU_LOG2(" Open EP %02X with Size = %u\r\n", desc_ep->bEndpointAddress, desc_ep->wMaxPacketSize.size); + if (TUSB_XFER_ISOCHRONOUS == desc_ep->bmAttributes.xfer) + { + TU_ASSERT(desc_ep->wMaxPacketSize.size <= (_usbd_dev.speed == TUSB_SPEED_HIGH ? 1024 : 1023)); + } + else + { + uint16_t const max_epsize = (_usbd_dev.speed == TUSB_SPEED_HIGH ? 512 : 64); + + if (TUSB_XFER_BULK == desc_ep->bmAttributes.xfer) + { + // Bulk must be EXACTLY 512/64 bytes + TU_ASSERT(desc_ep->wMaxPacketSize.size == max_epsize); + }else + { + TU_ASSERT(desc_ep->wMaxPacketSize.size <= max_epsize); + } + } + return dcd_edpt_open(rhport, desc_ep); } diff --git a/src/portable/dialog/da146xx/dcd_da146xx.c b/src/portable/dialog/da146xx/dcd_da146xx.c index 42ba867d7..59f728d08 100644 --- a/src/portable/dialog/da146xx/dcd_da146xx.c +++ b/src/portable/dialog/da146xx/dcd_da146xx.c @@ -664,7 +664,7 @@ static void handle_bus_reset(void) (void)USB->USB_ALTEV_REG; _dcd.in_reset = true; - dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true); + dcd_event_bus_reset(0, TUSB_SPEED_FULL, true); USB->USB_DMA_CTRL_REG = 0; USB->USB_MAMSK_REG = USB_USB_MAMSK_REG_USB_M_INTR_Msk | @@ -821,14 +821,13 @@ void dcd_disconnect(uint8_t rhport) bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) { + (void)rhport; + uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress); uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress); xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir); uint8_t iso_mask = 0; - - (void)rhport; - TU_ASSERT(desc_edpt->wMaxPacketSize.size <= 1023); TU_ASSERT(epnum < EP_MAX); xfer->max_packet_size = desc_edpt->wMaxPacketSize.size; diff --git a/src/portable/espressif/esp32s2/dcd_esp32s2.c b/src/portable/espressif/esp32s2/dcd_esp32s2.c index cd66af805..703841759 100644 --- a/src/portable/espressif/esp32s2/dcd_esp32s2.c +++ b/src/portable/espressif/esp32s2/dcd_esp32s2.c @@ -252,7 +252,6 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_edpt) uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress); uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress); - TU_ASSERT(desc_edpt->wMaxPacketSize.size <= 64); TU_ASSERT(epnum < EP_MAX); xfer_ctl_t *xfer = XFER_CTL_BASE(epnum, dir); diff --git a/src/portable/microchip/samd/dcd_samd.c b/src/portable/microchip/samd/dcd_samd.c index 68a15672a..3cff92fcd 100644 --- a/src/portable/microchip/samd/dcd_samd.c +++ b/src/portable/microchip/samd/dcd_samd.c @@ -387,7 +387,7 @@ void dcd_int_handler (uint8_t rhport) USB->DEVICE.INTENCLR.reg = USB_DEVICE_INTFLAG_WAKEUP | USB_DEVICE_INTFLAG_SUSPEND; bus_reset(); - dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true); + dcd_event_bus_reset(0, TUSB_SPEED_FULL, true); } // Handle SETUP packet diff --git a/src/portable/microchip/samg/dcd_samg.c b/src/portable/microchip/samg/dcd_samg.c index 2b64df50b..2f9f1097f 100644 --- a/src/portable/microchip/samg/dcd_samg.c +++ b/src/portable/microchip/samg/dcd_samg.c @@ -338,7 +338,7 @@ void dcd_int_handler(uint8_t rhport) if (intr_status & UDP_ISR_ENDBUSRES_Msk) { bus_reset(); - dcd_event_bus_signal(rhport, DCD_EVENT_BUS_RESET, true); + dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true); } // SOF diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index b85d3776f..d9fe2b6ae 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -533,7 +533,7 @@ void dcd_int_handler(uint8_t rhport) if ( int_status & USBD_INTEN_USBRESET_Msk ) { bus_reset(); - dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true); + dcd_event_bus_reset(0, TUSB_SPEED_FULL, true); } // ISOIN: Data was moved to endpoint buffer, client will be notified in SOF diff --git a/src/portable/nuvoton/nuc120/dcd_nuc120.c b/src/portable/nuvoton/nuc120/dcd_nuc120.c index 1a0007d8a..dc48e54cc 100644 --- a/src/portable/nuvoton/nuc120/dcd_nuc120.c +++ b/src/portable/nuvoton/nuc120/dcd_nuc120.c @@ -329,8 +329,7 @@ void dcd_int_handler(uint8_t rhport) USBD->ATTR |= USBD_ATTR_USB_EN_Msk | USBD_ATTR_PHY_EN_Msk; bus_reset(); - - dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true); + dcd_event_bus_reset(0, TUSB_SPEED_FULL, true); } if(state & USBD_STATE_SUSPEND) diff --git a/src/portable/nuvoton/nuc121/dcd_nuc121.c b/src/portable/nuvoton/nuc121/dcd_nuc121.c index af7fee8b0..c9ead6de0 100644 --- a/src/portable/nuvoton/nuc121/dcd_nuc121.c +++ b/src/portable/nuvoton/nuc121/dcd_nuc121.c @@ -340,7 +340,7 @@ void dcd_int_handler(uint8_t rhport) bus_reset(); - dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true); + dcd_event_bus_reset(0, TUSB_SPEED_FULL, true); } if(state & USBD_ATTR_SUSPEND_Msk) diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c index 8357bf2b8..519b8fb7b 100644 --- a/src/portable/nxp/khci/dcd_khci.c +++ b/src/portable/nxp/khci/dcd_khci.c @@ -224,7 +224,7 @@ static void process_bus_reset(uint8_t rhport) _dcd.addr = 0; prepare_next_setup_packet(rhport); KHCI->CTL &= ~USB_CTL_ODDRST_MASK; - dcd_event_bus_signal(rhport, DCD_EVENT_BUS_RESET, true); + dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true); } static void process_bus_inactive(uint8_t rhport) diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c index 39c5e6638..7d867aaba 100644 --- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c +++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c @@ -471,7 +471,7 @@ static void bus_event_isr(uint8_t rhport) if (dev_status & SIE_DEV_STATUS_RESET_MASK) { bus_reset(); - dcd_event_bus_signal(rhport, DCD_EVENT_BUS_RESET, true); + dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true); } if (dev_status & SIE_DEV_STATUS_CONNECT_CHANGE_MASK) diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index 3d1420c65..e4d92458c 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -243,7 +243,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) (void) rhport; // TODO not support ISO yet - if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) return false; + TU_VERIFY(p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS); //------------- Prepare Queue Head -------------// uint8_t ep_id = ep_addr2id(p_endpoint_desc->bEndpointAddress); @@ -357,7 +357,7 @@ void dcd_int_handler(uint8_t rhport) if ( cmd_stat & CMDSTAT_RESET_CHANGE_MASK) // bus reset { bus_reset(); - dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true); + dcd_event_bus_reset(0, TUSB_SPEED_FULL, true); } if (cmd_stat & CMDSTAT_CONNECT_CHANGE_MASK) diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index dc125a758..18f0bc8e1 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -547,7 +547,7 @@ void dcd_int_handler(uint8_t rhport) { // USBRST is start of reset. clear_istr_bits(USB_ISTR_RESET); dcd_handle_bus_reset(); - dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true); + dcd_event_bus_reset(0, TUSB_SPEED_FULL, true); return; // Don't do the rest of the things here; perhaps they've been cleared? } diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index 227c9ee61..4e385f691 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -565,15 +565,6 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) TU_ASSERT(epnum < EP_MAX); - if (desc_edpt->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) - { - TU_ASSERT(desc_edpt->wMaxPacketSize.size <= (get_speed(rhport) == TUSB_SPEED_HIGH ? 1024 : 1023)); - } - else - { - TU_ASSERT(desc_edpt->wMaxPacketSize.size <= (get_speed(rhport) == TUSB_SPEED_HIGH ? 512 : 64)); - } - xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir); xfer->max_size = desc_edpt->wMaxPacketSize.size; xfer->interval = desc_edpt->bInterval; diff --git a/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c b/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c index ad71e1168..e08c3536a 100644 --- a/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c +++ b/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c @@ -232,9 +232,9 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress); uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress); - // Unsupported endpoint numbers/size or type (Iso not supported. Control + // Unsupported endpoint numbers or type (Iso not supported. Control // not supported on nonzero endpoints). - if((desc_edpt->wMaxPacketSize.size > 64) || (epnum > 7) || \ + if( (epnum > 7) || \ (desc_edpt->bmAttributes.xfer == 0) || \ (desc_edpt->bmAttributes.xfer == 1)) { return false; @@ -572,7 +572,7 @@ void dcd_int_handler(uint8_t rhport) { case USBVECINT_RSTR: bus_reset(); - dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true); + dcd_event_bus_reset(0, TUSB_SPEED_FULL, true); break; // Clear the (hardware-enforced) NAK on EP 0 after a SETUP packet diff --git a/src/portable/valentyusb/eptri/dcd_eptri.c b/src/portable/valentyusb/eptri/dcd_eptri.c index d670dd38e..b68f04faa 100644 --- a/src/portable/valentyusb/eptri/dcd_eptri.c +++ b/src/portable/valentyusb/eptri/dcd_eptri.c @@ -332,7 +332,7 @@ static void dcd_reset(void) usb_out_ev_enable_write(1); usb_setup_ev_enable_write(3); - dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true); + dcd_event_bus_reset(0, TUSB_SPEED_FULL, true); } // Initializes the USB peripheral for device mode and enables it. diff --git a/test/test/device/msc/test_msc_device.c b/test/test/device/msc/test_msc_device.c index a01ef153a..00bb86ccf 100644 --- a/test/test/device/msc/test_msc_device.c +++ b/test/test/device/msc/test_msc_device.c @@ -202,7 +202,7 @@ void setUp(void) tusb_init(); } - dcd_event_bus_signal(rhport, DCD_EVENT_BUS_RESET, false); + dcd_event_bus_reset(rhport, TUSB_SPEED_HIGH, false); tud_task(); } diff --git a/test/test/support/tusb_config.h b/test/test/support/tusb_config.h index 8cd99eaae..d80e144da 100644 --- a/test/test/support/tusb_config.h +++ b/test/test/support/tusb_config.h @@ -86,8 +86,8 @@ //------------- CDC -------------// // FIFO size of CDC TX and RX -#define CFG_TUD_CDC_RX_BUFSIZE 64 -#define CFG_TUD_CDC_TX_BUFSIZE 64 +#define CFG_TUD_CDC_RX_BUFSIZE 512 +#define CFG_TUD_CDC_TX_BUFSIZE 512 //------------- MSC -------------// @@ -97,7 +97,7 @@ //------------- HID -------------// // Should be sufficient to hold ID (if any) + Data -#define CFG_TUD_HID_EP_BUFSIZE 16 +#define CFG_TUD_HID_EP_BUFSIZE 64 #ifdef __cplusplus } -- cgit v1.3.1 From d33b22d1275683cd352f3d8b729e20e6836c1ea4 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 8 Jan 2021 22:48:52 +0700 Subject: fix ci --- src/portable/st/synopsys/dcd_synopsys.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/portable') diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index 4e385f691..548438b68 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -555,6 +555,8 @@ void dcd_disconnect(uint8_t rhport) bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) { + (void) rhport; + USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); USB_OTG_OUTEndpointTypeDef * out_ep = OUT_EP_BASE(rhport); -- cgit v1.3.1