From 1d29817139c473971ce239bbc2cb5924de4a644e Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 1 Mar 2022 23:55:53 +0700 Subject: start to add pio usb (host) support run as proof of concept --- src/portable/raspberrypi/pio/hcd_pio.c | 237 +++++++++++++++++++++++++++ src/portable/raspberrypi/rp2040/hcd_rp2040.c | 9 +- 2 files changed, 242 insertions(+), 4 deletions(-) create mode 100644 src/portable/raspberrypi/pio/hcd_pio.c (limited to 'src/portable') diff --git a/src/portable/raspberrypi/pio/hcd_pio.c b/src/portable/raspberrypi/pio/hcd_pio.c new file mode 100644 index 000000000..74df49e0d --- /dev/null +++ b/src/portable/raspberrypi/pio/hcd_pio.c @@ -0,0 +1,237 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "tusb_option.h" + +#if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RP2040) && CFG_TUH_RPI_PIO + +#include "pico.h" +#include "hardware/pio.h" +#include "pio_usb.h" + +//--------------------------------------------------------------------+ +// INCLUDE +//--------------------------------------------------------------------+ +#include "osal/osal.h" + +#include "host/hcd.h" +#include "host/usbh.h" + +#define RHPORT_OFFSET 1 +#define RHPORT_PIO(_x) ((_x)-RHPORT_OFFSET) + + +static usb_device_t *_test_usb_device = NULL; +static pio_usb_configuration_t pio_host_config = PIO_USB_DEFAULT_CONFIG; + +extern root_port_t root_port[PIO_USB_ROOT_PORT_CNT]; +extern usb_device_t usb_device[PIO_USB_DEVICE_CNT]; +extern pio_port_t pio_port[1]; +extern root_port_t root_port[PIO_USB_ROOT_PORT_CNT]; +extern endpoint_t ep_pool[PIO_USB_EP_POOL_CNT]; + + +extern port_pin_status_t get_port_pin_status( root_port_t *port); +extern void configure_fullspeed_host( pio_port_t *pp, const pio_usb_configuration_t *c, root_port_t *port); +extern void configure_lowspeed_host( pio_port_t *pp, const pio_usb_configuration_t *c, root_port_t *port); + +extern void control_setup_transfer( const pio_port_t *pp, uint8_t device_address, uint8_t *tx_data_address, uint8_t tx_data_len); +extern int control_in_protocol( usb_device_t *device, uint8_t *tx_data, uint16_t tx_length, uint8_t *rx_buffer, uint16_t request_length); +extern int control_out_protocol( usb_device_t *device, uint8_t *setup_data, uint16_t setup_length, uint8_t *out_data, uint16_t out_length); + +extern void update_packet_crc16(usb_setup_packet_t * packet); + +//--------------------------------------------------------------------+ +// HCD API +//--------------------------------------------------------------------+ +bool hcd_init(uint8_t rhport) +{ + // To run USB SOF interrupt in core1, create alarm pool in core1. + pio_host_config.alarm_pool = (void*)alarm_pool_create(2, 1); + _test_usb_device = pio_usb_host_init(&pio_host_config); + + return true; +} + +void hcd_port_reset(uint8_t rhport) +{ + rhport = RHPORT_PIO(rhport); + + pio_port_t *pp = &pio_port[0]; + root_port_t *root = &root_port[rhport]; + + pio_sm_set_pins_with_mask(pp->pio_usb_tx, pp->sm_tx, (0b00 << root->pin_dp), + (0b11u << root->pin_dp)); + pio_sm_set_pindirs_with_mask(pp->pio_usb_tx, pp->sm_tx, (0b11u << root->pin_dp), + (0b11u << root->pin_dp)); +} + +void hcd_port_reset_end(uint8_t rhport) +{ + rhport = RHPORT_PIO(rhport); + + pio_port_t *pp = &pio_port[0]; + root_port_t *root = &root_port[rhport]; + + pio_sm_set_pindirs_with_mask(pp->pio_usb_tx, pp->sm_tx, (0b00u << root->pin_dp), + (0b11u << root->pin_dp)); + + busy_wait_us(100); + + // TODO slow speed + bool fullspeed_flag = true; + + if (fullspeed_flag && get_port_pin_status(root) == PORT_PIN_FS_IDLE) { + root->root_device = &usb_device[0]; + if (!root->root_device->connected) { + configure_fullspeed_host(pp, &pio_host_config, root); + root->root_device->is_fullspeed = true; + root->root_device->is_root = true; + root->root_device->connected = true; + root->root_device->root = root; + root->root_device->event = EVENT_CONNECT; + } + } else if (!fullspeed_flag && get_port_pin_status(root) == PORT_PIN_LS_IDLE) { + root->root_device = &usb_device[0]; + if (!root->root_device->connected) { + configure_lowspeed_host(pp, &pio_host_config, root); + root->root_device->is_fullspeed = false; + root->root_device->is_root = true; + root->root_device->connected = true; + root->root_device->root = root; + root->root_device->event = EVENT_CONNECT; + } + } +} + +bool hcd_port_connect_status(uint8_t rhport) +{ + root_port_t* port = &root_port[0]; + bool dp = gpio_get(port->pin_dp); + bool dm = gpio_get(port->pin_dm); + return dp || dm; +} + +tusb_speed_t hcd_port_speed_get(uint8_t rhport) +{ + // TODO determine link speed + return TUSB_SPEED_FULL; +} + +// Close all opened endpoint belong to this device +void hcd_device_close(uint8_t rhport, uint8_t dev_addr) +{ +} + +uint32_t hcd_frame_number(uint8_t rhport) +{ + return 0; +} + +void hcd_int_enable(uint8_t rhport) +{ +} + +void hcd_int_disable(uint8_t rhport) +{ +} + +//--------------------------------------------------------------------+ +// Endpoint API +//--------------------------------------------------------------------+ + +bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) +{ + rhport = RHPORT_PIO(rhport); + + usb_device[0].event = EVENT_NONE; + usb_device[0].address = dev_addr; + + return true; +} + +bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) +{ + (void) rhport; + + return true; +} + +bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) +{ + (void) rhport; + return false; +} + +bool hcd_edpt_control_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8], uint8_t* data) +{ + int ret; + rhport = RHPORT_PIO(rhport); + + uint16_t const len = ((tusb_control_request_t const*) setup_packet)->wLength; + + usb_setup_packet_t pio_setup = { USB_SYNC, USB_PID_DATA0 }; + memcpy(&pio_setup.request_type, setup_packet, 8); + update_packet_crc16(&pio_setup); + + if (setup_packet[0] & TUSB_DIR_IN_MASK) + { + ret = control_in_protocol(&usb_device[0], (uint8_t*) &pio_setup, sizeof(pio_setup), data, len); + }else + { + ret = control_out_protocol(&usb_device[0], (uint8_t*) &pio_setup, sizeof(pio_setup), data, len); + } + + // TODO current pio is blocking + hcd_event_xfer_complete(dev_addr, 0, 0, ret ? XFER_RESULT_FAILED : XFER_RESULT_SUCCESS, false); + + return ret == 0; +} + + +//bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) +//{ +// // EPX is shared, so multiple device addresses and endpoint addresses share that +// // so if any transfer is active on epx, we are busy. Interrupt endpoints have their own +// // EPX so ep->active will only be busy if there is a pending transfer on that interrupt endpoint +// // on that device +// pico_trace("hcd_edpt_busy dev addr %d ep_addr 0x%x\n", dev_addr, ep_addr); +// struct hw_endpoint *ep = get_dev_ep(dev_addr, ep_addr); +// assert(ep); +// bool busy = ep->active; +// pico_trace("busy == %d\n", busy); +// return busy; +//} + +bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) +{ + (void) dev_addr; + (void) ep_addr; + + return true; +} + +#endif diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index b6fbdb200..75acefb65 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -27,7 +27,7 @@ #include "tusb_option.h" -#if CFG_TUH_ENABLED && CFG_TUSB_MCU == OPT_MCU_RP2040 +#if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RP2040) && !CFG_TUH_RPI_PIO #include "pico.h" #include "rp2040_usb.h" @@ -40,7 +40,8 @@ #include "host/hcd.h" #include "host/usbh.h" -#define ROOT_PORT 0 +// port 0 is native USB port, other is counted as software PIO +#define RHPORT_NATIVE 0 //--------------------------------------------------------------------+ // Low level rp2040 controller functions @@ -185,11 +186,11 @@ static void hcd_rp2040_irq(void) if (dev_speed()) { - hcd_event_device_attach(ROOT_PORT, true); + hcd_event_device_attach(RHPORT_NATIVE, true); } else { - hcd_event_device_remove(ROOT_PORT, true); + hcd_event_device_remove(RHPORT_NATIVE, true); } // Clear speed change interrupt -- cgit v1.3.1 From 918f3e9caec1e5566feac9214b7142b950a3d27c Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 2 Mar 2022 12:22:20 +0700 Subject: minor rename --- examples/host/cdc_msc_hid/src/tusb_config.h | 4 ++-- src/host/usbh.c | 2 +- src/portable/raspberrypi/pio/hcd_pio.c | 2 +- src/portable/raspberrypi/rp2040/hcd_rp2040.c | 2 +- src/tusb_option.h | 11 ++++++++--- 5 files changed, 13 insertions(+), 8 deletions(-) (limited to 'src/portable') diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index e957b2cde..80ee8cb01 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -39,13 +39,13 @@ #error CFG_TUSB_MCU must be defined #endif -#define CFG_TUH_RPI_PIO 1 +#define CFG_TUH_RPI_PIO_USB 1 //#define CFG_TUSB_RPI_PIO_INC_PATH 1 #if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST | OPT_MODE_HIGH_SPEED) -#elif CFG_TUH_RPI_PIO +#elif CFG_TUH_RPI_PIO_USB // rp2040: port0 is native, port 1 for PIO-USB #define CFG_TUSB_RHPORT1_MODE OPT_MODE_HOST #else diff --git a/src/host/usbh.c b/src/host/usbh.c index ea0a0809d..1f2a19527 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -779,7 +779,7 @@ static bool enum_get_addr0_device_desc_complete(uint8_t dev_addr, tusb_control_r if (_dev0.hub_addr == 0) { -#if !CFG_TUH_RPI_PIO // skip this reset for pio-usb +#if !CFG_TUH_RPI_PIO_USB // skip this reset for pio-usb // connected directly to roothub hcd_port_reset(_dev0.rhport); osal_task_delay(RESET_DELAY); diff --git a/src/portable/raspberrypi/pio/hcd_pio.c b/src/portable/raspberrypi/pio/hcd_pio.c index 74df49e0d..71645bd45 100644 --- a/src/portable/raspberrypi/pio/hcd_pio.c +++ b/src/portable/raspberrypi/pio/hcd_pio.c @@ -26,7 +26,7 @@ #include "tusb_option.h" -#if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RP2040) && CFG_TUH_RPI_PIO +#if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RP2040) && CFG_TUH_RPI_PIO_USB #include "pico.h" #include "hardware/pio.h" diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index 75acefb65..53b372fcb 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -27,7 +27,7 @@ #include "tusb_option.h" -#if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RP2040) && !CFG_TUH_RPI_PIO +#if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RP2040) && !CFG_TUH_RPI_PIO_USB #include "pico.h" #include "rp2040_usb.h" diff --git a/src/tusb_option.h b/src/tusb_option.h index 25e536787..44cdaa3a6 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -252,7 +252,7 @@ //--------------------------------------------------------------------+ -// COMMON OPTIONS +// Common Options (Default) //--------------------------------------------------------------------+ // Debug enable to print out error message @@ -280,7 +280,7 @@ #endif //-------------------------------------------------------------------- -// DEVICE OPTIONS +// Device Options (Default) //-------------------------------------------------------------------- #ifndef CFG_TUD_ENDPOINT0_SIZE @@ -345,7 +345,7 @@ #endif //-------------------------------------------------------------------- -// HOST OPTIONS +// Host Options (Default) //-------------------------------------------------------------------- #if CFG_TUH_ENABLED #ifndef CFG_TUH_DEVICE_MAX @@ -383,6 +383,11 @@ #define CFG_TUH_VENDOR 0 #endif +// Enable PIO-USB software host controller +#ifndef CFG_TUH_RPI_PIO_USB +#define CFG_TUH_RPI_PIO_USB 0 +#endif + //------------------------------------------------------------------ // Configuration Validation //------------------------------------------------------------------ -- cgit v1.3.1 From 635fb9dcdd08c736a4b0161381068b51ef4c140e Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 2 Mar 2022 12:33:47 +0700 Subject: try to fix ci --- src/portable/ehci/ehci.c | 4 ++-- src/portable/mentor/musb/hcd_musb.c | 5 +++++ src/portable/ohci/ohci.c | 5 +++++ src/portable/raspberrypi/rp2040/hcd_rp2040.c | 5 +++++ src/portable/renesas/usba/hcd_usba.c | 5 +++++ 5 files changed, 22 insertions(+), 2 deletions(-) (limited to 'src/portable') diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index e2d51dc4b..31e348360 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -160,15 +160,15 @@ void hcd_port_reset(uint8_t rhport) regs->portsc = portsc; } -#if 0 void hcd_port_reset_end(uint8_t rhport) { (void) rhport; +#if 0 ehci_registers_t* regs = ehci_data.regs; regs->portsc_bm.port_reset = 0; -} #endif +} bool hcd_port_connect_status(uint8_t rhport) { diff --git a/src/portable/mentor/musb/hcd_musb.c b/src/portable/mentor/musb/hcd_musb.c index 3bfd65b45..85e18e3aa 100644 --- a/src/portable/mentor/musb/hcd_musb.c +++ b/src/portable/mentor/musb/hcd_musb.c @@ -617,6 +617,11 @@ void hcd_port_reset(uint8_t rhport) _hcd.need_reset = false; } +void hcd_port_reset_end(uint8_t rhport) +{ + (void) rhport; +} + tusb_speed_t hcd_port_speed_get(uint8_t rhport) { (void)rhport; diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c index cb4e6dc4a..db087716f 100644 --- a/src/portable/ohci/ohci.c +++ b/src/portable/ohci/ohci.c @@ -216,6 +216,11 @@ void hcd_port_reset(uint8_t hostid) OHCI_REG->rhport_status[0] = RHPORT_PORT_RESET_STATUS_MASK; } +void hcd_port_reset_end(uint8_t rhport) +{ + (void) rhport; +} + bool hcd_port_connect_status(uint8_t hostid) { (void) hostid; diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index 53b372fcb..7bbf00efe 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -387,6 +387,11 @@ void hcd_port_reset(uint8_t rhport) // TODO: Nothing to do here yet. Perhaps need to reset some state? } +void hcd_port_reset_end(uint8_t rhport) +{ + (void) rhport; +} + bool hcd_port_connect_status(uint8_t rhport) { pico_trace("hcd_port_connect_status\n"); diff --git a/src/portable/renesas/usba/hcd_usba.c b/src/portable/renesas/usba/hcd_usba.c index ebb682342..5246ecb94 100644 --- a/src/portable/renesas/usba/hcd_usba.c +++ b/src/portable/renesas/usba/hcd_usba.c @@ -620,6 +620,11 @@ void hcd_port_reset(uint8_t rhport) _hcd.need_reset = false; } +void hcd_port_reset_end(uint8_t rhport) +{ + (void) rhport; +} + tusb_speed_t hcd_port_speed_get(uint8_t rhport) { (void)rhport; -- cgit v1.3.1 From fa62d5abc9b1cede44a8e0630d8a28c90cdcdd00 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 3 Mar 2022 21:57:29 +0700 Subject: got interrupt endpoint working --- lib/Pico-PIO-USB | 2 +- src/portable/raspberrypi/pio/hcd_pio.c | 41 ++++++++++++++++++++++++++++++++-- 2 files changed, 40 insertions(+), 3 deletions(-) (limited to 'src/portable') diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index ee20881ac..92268187f 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit ee20881ac8abc515df5e0cfe8851c7c21c47a0ef +Subproject commit 92268187f3b0490a43d139ed2cb598b06258011f diff --git a/src/portable/raspberrypi/pio/hcd_pio.c b/src/portable/raspberrypi/pio/hcd_pio.c index 71645bd45..8d1903f85 100644 --- a/src/portable/raspberrypi/pio/hcd_pio.c +++ b/src/portable/raspberrypi/pio/hcd_pio.c @@ -167,8 +167,45 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const { rhport = RHPORT_PIO(rhport); - usb_device[0].event = EVENT_NONE; - usb_device[0].address = dev_addr; + usb_device_t *device = &usb_device[0]; + + static uint8_t ep_id_idx; // TODO remove later + + if (ep_desc->bEndpointAddress == 0) + { + device->event = EVENT_NONE; + device->address = dev_addr; + + ep_id_idx = 0; + }else if (ep_desc->bmAttributes.xfer == TUSB_XFER_INTERRUPT) // only support interrupt endpoint + { + endpoint_t *ep = NULL; + for ( int ep_pool_idx = 0; ep_pool_idx < PIO_USB_EP_POOL_CNT; ep_pool_idx++ ) + { + if ( ep_pool[ep_pool_idx].ep_num == 0 ) + { + ep = &ep_pool[ep_pool_idx]; + device->endpoint_id[ep_id_idx] = ep_pool_idx + 1; + ep_id_idx++; + + ep->data_id = 0; + ep->ep_num = ep_desc->bEndpointAddress; + ep->interval = ep_desc->bInterval; + ep->interval_counter = 0; + ep->size = (uint8_t) tu_edpt_packet_size(ep_desc); + ep->attr = EP_ATTR_INTERRUPT; + + break; + } + } + +// TU_LOG1_INT(device->connected); +// TU_LOG1_INT(device->root); +// TU_LOG1_INT(device->is_root); +// TU_LOG1_INT(device->is_fullspeed); +// +// TU_LOG1_INT(ep_id_idx); + } return true; } -- cgit v1.3.1 From ce60e98f6da2030f8fe8c8b6c63a7a33019e6c74 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 7 Mar 2022 23:00:11 +0700 Subject: remove broadcom/synopssy (repalced by synopsys/dwc2) --- src/portable/broadcom/synopsys/dcd_synopsys.c | 1267 ------------------- src/portable/broadcom/synopsys/synopsys_common.h | 1476 ---------------------- 2 files changed, 2743 deletions(-) delete mode 100644 src/portable/broadcom/synopsys/dcd_synopsys.c delete mode 100644 src/portable/broadcom/synopsys/synopsys_common.h (limited to 'src/portable') diff --git a/src/portable/broadcom/synopsys/dcd_synopsys.c b/src/portable/broadcom/synopsys/dcd_synopsys.c deleted file mode 100644 index c4881ee50..000000000 --- a/src/portable/broadcom/synopsys/dcd_synopsys.c +++ /dev/null @@ -1,1267 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018 Scott Shawcroft, 2019 William D. Jones for Adafruit Industries - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * Copyright (c) 2020 Jan Duempelmann - * Copyright (c) 2020 Reinhard Panhuber - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "tusb_option.h" - -#if CFG_TUD_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_BCM2711 ) \ - - -#include "synopsys_common.h" - -#include "broadcom/interrupts.h" - -// Since TinyUSB doesn't use SOF for now, and this interrupt too often (1ms interval) -// We disable SOF for now until needed later on -#define USE_SOF 0 - -// EP_MAX : Max number of bi-directional endpoints including EP0 -// EP_FIFO_SIZE : Size of dedicated USB SRAM -#if CFG_TUSB_MCU == OPT_MCU_BCM2711 -// #include "bcm2711.h" -#define EP_MAX_FS 8 -#define EP_FIFO_SIZE_FS 4096 -#define EP_MAX_HS 8 -#define EP_FIFO_SIZE_HS 4096 -#else -#error "Unsupported MCUs" -#endif - -#define EP_MAX 8 -#define EP_FIFO_SIZE 4096 - -// Info on values here: https://github.com/torvalds/linux/blob/79160a603bdb51916226caf4a6616cc4e1c58a58/Documentation/devicetree/bindings/usb/dwc2.yaml - -// From: https://github.com/raspberrypi/linux/blob/rpi-5.10.y/arch/arm/boot/dts/bcm283x.dtsi -// usb: usb@7e980000 { -// compatible = "brcm,bcm2835-usb"; -// reg = <0x7e980000 0x10000>; -// interrupts = <1 9>; -// #address-cells = <1>; -// #size-cells = <0>; -// clocks = <&clk_usb>; -// clock-names = "otg"; -// phys = <&usbphy>; -// phy-names = "usb2-phy"; -// }; - -// From: https://github.com/raspberrypi/linux/blob/rpi-5.10.y/arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi -// SPDX-License-Identifier: GPL-2.0 -// &usb { -// dr_mode = "otg"; -// g-rx-fifo-size = <256>; -// g-np-tx-fifo-size = <32>; - -// * According to dwc2 the sum of all device EP -// * fifo sizes shouldn't exceed 3776 bytes. - -// g-tx-fifo-size = <256 256 512 512 512 768 768>; -// }; - -// From: https://github.com/raspberrypi/linux/blob/rpi-5.10.y/arch/arm/boot/dts/bcm2711-rpi.dtsi -// &usb { -// /* Enable the FIQ support */ -// reg = <0x7e980000 0x10000>, -// <0x7e00b200 0x200>; -// interrupts = , -// ; -// status = "disabled"; -// }; - -// From: https://github.com/raspberrypi/linux/blob/rpi-5.10.y/arch/arm/boot/dts/bcm2711.dtsi -// &usb { -// interrupts = ; -// }; - -// From: https://github.com/torvalds/linux/blob/1d597682d3e669ec7021aa33d088ed3d136a5149/drivers/usb/dwc2/params.c -// static void dwc2_set_bcm_params(struct dwc2_hsotg *hsotg) -// { -// struct dwc2_core_params *p = &hsotg->params; - -// p->host_rx_fifo_size = 774; -// p->max_transfer_size = 65535; -// p->max_packet_count = 511; -// p->ahbcfg = 0x10; -// } - -#include "device/dcd.h" - -TU_VERIFY_STATIC(sizeof(USB_OTG_GlobalTypeDef) == 0x140, "size is incorrect"); - -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM -//--------------------------------------------------------------------+ - -#define RHPORT_REGS_BASE USB_OTG_GLOBAL_BASE - -#define GLOBAL_BASE(_port) ((USB_OTG_GlobalTypeDef*) RHPORT_REGS_BASE) -#define DEVICE_BASE(_port) (USB_OTG_DeviceTypeDef *) (USB_OTG_DEVICE_BASE) -#define OUT_EP_BASE(_port) (USB_OTG_OUTEndpointTypeDef *) (RHPORT_REGS_BASE + USB_OTG_OUT_ENDPOINT_BASE) -#define IN_EP_BASE(_port) (USB_OTG_INEndpointTypeDef *) (RHPORT_REGS_BASE + USB_OTG_IN_ENDPOINT_BASE) -#define FIFO_BASE(_port, _x) ((volatile uint32_t *) (RHPORT_REGS_BASE + USB_OTG_FIFO_BASE + (_x) * USB_OTG_FIFO_SIZE)) - -enum -{ - DCD_HIGH_SPEED = 0, // Highspeed mode - DCD_FULL_SPEED_USE_HS = 1, // Full speed in Highspeed port (probably with internal PHY) - DCD_FULL_SPEED = 3, // Full speed with internal PHY -}; - -static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[2]; - -typedef struct { - uint8_t * buffer; - tu_fifo_t * ff; - uint16_t total_len; - uint16_t max_size; - uint8_t interval; -} xfer_ctl_t; - -typedef volatile uint32_t * usb_fifo_t; - -xfer_ctl_t xfer_status[EP_MAX][2]; -#define XFER_CTL_BASE(_ep, _dir) &xfer_status[_ep][_dir] - -// EP0 transfers are limited to 1 packet - larger sizes has to be split -static uint16_t ep0_pending[2]; // Index determines direction as tusb_dir_t type - -// TX FIFO RAM allocation so far in words - RX FIFO size is readily available from usb_otg->GRXFSIZ -static uint16_t _allocated_fifo_words_tx; // TX FIFO size in words (IN EPs) -static bool _out_ep_closed; // Flag to check if RX FIFO size needs an update (reduce its size) - -// Calculate the RX FIFO size according to recommendations from reference manual -static inline uint16_t calc_rx_ff_size(uint16_t ep_size) -{ - return 15 + 2*(ep_size/4) + 2*EP_MAX; -} - -static void update_grxfsiz(uint8_t rhport) -{ - (void) rhport; - - USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); - - // Determine largest EP size for RX FIFO - uint16_t max_epsize = 0; - for (uint8_t epnum = 0; epnum < EP_MAX; epnum++) - { - max_epsize = tu_max16(max_epsize, xfer_status[epnum][TUSB_DIR_OUT].max_size); - } - - // Update size of RX FIFO - usb_otg->GRXFSIZ = calc_rx_ff_size(max_epsize); -} - -// Setup the control endpoint 0. -static void bus_reset(uint8_t rhport) -{ - (void) rhport; - - USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); - USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); - USB_OTG_OUTEndpointTypeDef * out_ep = OUT_EP_BASE(rhport); - USB_OTG_INEndpointTypeDef * in_ep = IN_EP_BASE(rhport); - - tu_memclr(xfer_status, sizeof(xfer_status)); - _out_ep_closed = false; - - // clear device address - dev->DCFG &= ~USB_OTG_DCFG_DAD_Msk; - - // 1. NAK for all OUT endpoints - for(uint8_t n = 0; n < EP_MAX; n++) { - out_ep[n].DOEPCTL |= USB_OTG_DOEPCTL_SNAK; - } - - // 2. Un-mask interrupt bits - dev->DAINTMSK = (1 << USB_OTG_DAINTMSK_OEPM_Pos) | (1 << USB_OTG_DAINTMSK_IEPM_Pos); - dev->DOEPMSK = USB_OTG_DOEPMSK_STUPM | USB_OTG_DOEPMSK_XFRCM; - dev->DIEPMSK = USB_OTG_DIEPMSK_TOM | USB_OTG_DIEPMSK_XFRCM; - - // "USB Data FIFOs" section in reference manual - // Peripheral FIFO architecture - // - // The FIFO is split up in a lower part where the RX FIFO is located and an upper part where the TX FIFOs start. - // We do this to allow the RX FIFO to grow dynamically which is possible since the free space is located - // between the RX and TX FIFOs. This is required by ISO OUT EPs which need a bigger FIFO than the standard - // configuration done below. - // - // Dynamically FIFO sizes are of interest only for ISO EPs since all others are usually not opened and closed. - // All EPs other than ISO are opened as soon as the driver starts up i.e. when the host sends a - // configure interface command. Hence, all IN EPs other the ISO will be located at the top. IN ISO EPs are usually - // opened when the host sends an additional command: setInterface. At this point in time - // the ISO EP will be located next to the free space and can change its size. In case more IN EPs change its size - // an additional memory - // - // --------------- 320 or 1024 ( 1280 or 4096 bytes ) - // | IN FIFO 0 | - // --------------- (320 or 1024) - 16 - // | IN FIFO 1 | - // --------------- (320 or 1024) - 16 - x - // | . . . . | - // --------------- (320 or 1024) - 16 - x - y - ... - z - // | IN FIFO MAX | - // --------------- - // | FREE | - // --------------- GRXFSIZ - // | OUT FIFO | - // | ( Shared ) | - // --------------- 0 - // - // According to "FIFO RAM allocation" section in RM, FIFO RAM are allocated as follows (each word 32-bits): - // - Each EP IN needs at least max packet size, 16 words is sufficient for EP0 IN - // - // - All EP OUT shared a unique OUT FIFO which uses - // - 13 for setup packets + control words (up to 3 setup packets). - // - 1 for global NAK (not required/used here). - // - Largest-EPsize / 4 + 1. ( FS: 64 bytes, HS: 512 bytes). Recommended is "2 x (Largest-EPsize/4) + 1" - // - 2 for each used OUT endpoint - // - // Therefore GRXFSIZ = 13 + 1 + 1 + 2 x (Largest-EPsize/4) + 2 x EPOUTnum - // - FullSpeed (64 Bytes ): GRXFSIZ = 15 + 2 x 16 + 2 x EP_MAX = 47 + 2 x EP_MAX - // - Highspeed (512 bytes): GRXFSIZ = 15 + 2 x 128 + 2 x EP_MAX = 271 + 2 x EP_MAX - // - // NOTE: Largest-EPsize & EPOUTnum is actual used endpoints in configuration. Since DCD has no knowledge - // of the overall picture yet. We will use the worst scenario: largest possible + EP_MAX - // - // For Isochronous, largest EP size can be 1023/1024 for FS/HS respectively. In addition if multiple ISO - // are enabled at least "2 x (Largest-EPsize/4) + 1" are recommended. Maybe provide a macro for application to - // overwrite this. - - #if TUD_OPT_HIGH_SPEED - usb_otg->GRXFSIZ = calc_rx_ff_size(512); - #else - usb_otg->GRXFSIZ = calc_rx_ff_size(64); - #endif - - _allocated_fifo_words_tx = 16; - - // Control IN uses FIFO 0 with 64 bytes ( 16 32-bit word ) - usb_otg->DIEPTXF0_HNPTXFSIZ = (16 << USB_OTG_TX0FD_Pos) | (EP_FIFO_SIZE/4 - _allocated_fifo_words_tx); - - // Fixed control EP0 size to 64 bytes - in_ep[0].DIEPCTL &= ~(0x03 << USB_OTG_DIEPCTL_MPSIZ_Pos); - xfer_status[0][TUSB_DIR_OUT].max_size = xfer_status[0][TUSB_DIR_IN].max_size = 64; - - out_ep[0].DOEPTSIZ |= (3 << USB_OTG_DOEPTSIZ_STUPCNT_Pos); - - usb_otg->GINTMSK |= USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IEPINT; -} - -// Set turn-around timeout according to link speed -extern uint32_t SystemCoreClock; -static void set_turnaround(USB_OTG_GlobalTypeDef * usb_otg, tusb_speed_t speed) -{ - usb_otg->GUSBCFG &= ~USB_OTG_GUSBCFG_TRDT; - - if ( speed == TUSB_SPEED_HIGH ) - { - // Use fixed 0x09 for Highspeed - usb_otg->GUSBCFG |= (0x09 << USB_OTG_GUSBCFG_TRDT_Pos); - } - else - { - // Turnaround timeout depends on the MCU clock - uint32_t turnaround; - - if ( SystemCoreClock >= 32000000U ) - turnaround = 0x6U; - else if ( SystemCoreClock >= 27500000U ) - turnaround = 0x7U; - else if ( SystemCoreClock >= 24000000U ) - turnaround = 0x8U; - else if ( SystemCoreClock >= 21800000U ) - turnaround = 0x9U; - else if ( SystemCoreClock >= 20000000U ) - turnaround = 0xAU; - else if ( SystemCoreClock >= 18500000U ) - turnaround = 0xBU; - else if ( SystemCoreClock >= 17200000U ) - turnaround = 0xCU; - else if ( SystemCoreClock >= 16000000U ) - turnaround = 0xDU; - else if ( SystemCoreClock >= 15000000U ) - turnaround = 0xEU; - else - turnaround = 0xFU; - - // Fullspeed depends on MCU clocks, but we will use 0x06 for 32+ Mhz - usb_otg->GUSBCFG |= (turnaround << USB_OTG_GUSBCFG_TRDT_Pos); - } -} - -static tusb_speed_t get_speed(uint8_t rhport) -{ - (void) rhport; - USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); - uint32_t const enum_spd = (dev->DSTS & USB_OTG_DSTS_ENUMSPD_Msk) >> USB_OTG_DSTS_ENUMSPD_Pos; - return (enum_spd == DCD_HIGH_SPEED) ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL; -} - -static void set_speed(uint8_t rhport, tusb_speed_t speed) -{ - uint32_t bitvalue; - - if ( rhport == 1 ) - { - bitvalue = ((TUSB_SPEED_HIGH == speed) ? DCD_HIGH_SPEED : DCD_FULL_SPEED_USE_HS); - } - else - { - bitvalue = DCD_FULL_SPEED; - } - - USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); - - // Clear and set speed bits - dev->DCFG &= ~(3 << USB_OTG_DCFG_DSPD_Pos); - dev->DCFG |= (bitvalue << USB_OTG_DCFG_DSPD_Pos); -} - -#if 0 -// From CM4IO xtal to usb hub, may not be correct -#define HSE_VALUE 24000000 - -static bool USB_HS_PHYCInit(void) -{ - USB_HS_PHYC_GlobalTypeDef *usb_hs_phyc = (USB_HS_PHYC_GlobalTypeDef*) USB_HS_PHYC_CONTROLLER_BASE; - - // Enable LDO - usb_hs_phyc->USB_HS_PHYC_LDO |= USB_HS_PHYC_LDO_ENABLE; - - // Wait until LDO ready - while ( 0 == (usb_hs_phyc->USB_HS_PHYC_LDO & USB_HS_PHYC_LDO_STATUS) ) {} - - uint32_t phyc_pll = 0; - - // TODO Try to get HSE_VALUE from registers instead of depending CFLAGS - switch ( HSE_VALUE ) - { - case 12000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_12MHZ ; break; - case 12500000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_12_5MHZ ; break; - case 16000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_16MHZ ; break; - case 24000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_24MHZ ; break; - case 25000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_25MHZ ; break; - case 32000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_Msk ; break; // Value not defined in header - default: - TU_ASSERT(0); - } - usb_hs_phyc->USB_HS_PHYC_PLL = phyc_pll; - - // Control the tuning interface of the High Speed PHY - // Use magic value (USB_HS_PHYC_TUNE_VALUE) from ST driver - usb_hs_phyc->USB_HS_PHYC_TUNE |= 0x00000F13U; - - // Enable PLL internal PHY - usb_hs_phyc->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL_PLLEN; - - // Original ST code has 2 ms delay for PLL stabilization. - // Primitive test shows that more than 10 USB un/replug cycle showed no error with enumeration - - return true; -} -#endif - -static void edpt_schedule_packets(uint8_t rhport, uint8_t const epnum, uint8_t const dir, uint16_t const num_packets, uint16_t total_bytes) -{ - (void) rhport; - - USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); - USB_OTG_OUTEndpointTypeDef * out_ep = OUT_EP_BASE(rhport); - USB_OTG_INEndpointTypeDef * in_ep = IN_EP_BASE(rhport); - - // EP0 is limited to one packet each xfer - // We use multiple transaction of xfer->max_size length to get a whole transfer done - if(epnum == 0) { - xfer_ctl_t * const xfer = XFER_CTL_BASE(epnum, dir); - total_bytes = tu_min16(ep0_pending[dir], xfer->max_size); - ep0_pending[dir] -= total_bytes; - } - - // IN and OUT endpoint xfers are interrupt-driven, we just schedule them here. - if(dir == TUSB_DIR_IN) { - // A full IN transfer (multiple packets, possibly) triggers XFRC. - in_ep[epnum].DIEPTSIZ = (num_packets << USB_OTG_DIEPTSIZ_PKTCNT_Pos) | - ((total_bytes << USB_OTG_DIEPTSIZ_XFRSIZ_Pos) & USB_OTG_DIEPTSIZ_XFRSIZ_Msk); - - in_ep[epnum].DIEPCTL |= USB_OTG_DIEPCTL_EPENA | USB_OTG_DIEPCTL_CNAK; - // For ISO endpoint set correct odd/even bit for next frame. - if ((in_ep[epnum].DIEPCTL & USB_OTG_DIEPCTL_EPTYP) == USB_OTG_DIEPCTL_EPTYP_0 && (XFER_CTL_BASE(epnum, dir))->interval == 1) - { - // Take odd/even bit from frame counter. - uint32_t const odd_frame_now = (dev->DSTS & (1u << USB_OTG_DSTS_FNSOF_Pos)); - in_ep[epnum].DIEPCTL |= (odd_frame_now ? USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk : USB_OTG_DIEPCTL_SODDFRM_Msk); - } - // Enable fifo empty interrupt only if there are something to put in the fifo. - if(total_bytes != 0) { - dev->DIEPEMPMSK |= (1 << epnum); - } - } else { - // A full OUT transfer (multiple packets, possibly) triggers XFRC. - out_ep[epnum].DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT_Msk | USB_OTG_DOEPTSIZ_XFRSIZ); - out_ep[epnum].DOEPTSIZ |= (num_packets << USB_OTG_DOEPTSIZ_PKTCNT_Pos) | - ((total_bytes << USB_OTG_DOEPTSIZ_XFRSIZ_Pos) & USB_OTG_DOEPTSIZ_XFRSIZ_Msk); - - out_ep[epnum].DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_CNAK; - if ((out_ep[epnum].DOEPCTL & USB_OTG_DOEPCTL_EPTYP) == USB_OTG_DOEPCTL_EPTYP_0 && (XFER_CTL_BASE(epnum, dir))->interval == 1) - { - // Take odd/even bit from frame counter. - uint32_t const odd_frame_now = (dev->DSTS & (1u << USB_OTG_DSTS_FNSOF_Pos)); - out_ep[epnum].DOEPCTL |= (odd_frame_now ? USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Msk : USB_OTG_DOEPCTL_SODDFRM_Msk); - } - } -} - -/*------------------------------------------------------------------*/ -/* Controller API - *------------------------------------------------------------------*/ - -TU_ATTR_UNUSED -static void reset_core(USB_OTG_GlobalTypeDef * usb_otg) { - while ((usb_otg->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0) {} - - TU_LOG(2, " resetting\r\n"); - usb_otg->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; - TU_LOG(2, " waiting\r\n"); - while ((usb_otg->GRSTCTL & (USB_OTG_GRSTCTL_AHBIDL | USB_OTG_GRSTCTL_CSRST)) != USB_OTG_GRSTCTL_AHBIDL) {} - TU_LOG(2, " reset done\r\n"); -} - -void dcd_init (uint8_t rhport) -{ - printf("test done\r\n"); - // Programming model begins in the last section of the chapter on the USB - // peripheral in each Reference Manual. - TU_LOG(2, " dcd_init\r\n"); - - TU_LOG2("Test 123\r\n"); - - USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); - -#if 1 - // No VBUS sense - usb_otg->GCCFG &= ~(1UL << 21); // USB_OTG_GCCFG_VBDEN - - // B-peripheral session valid override enable - usb_otg->GOTGCTL |= (1UL << 6); // USB_OTG_GOTGCTL_BVALOEN - usb_otg->GOTGCTL |= (1UL << 7); // USB_OTG_GOTGCTL_BVALOVAL - - // Force device mode - usb_otg->GUSBCFG &= ~USB_OTG_GUSBCFG_FHMOD; - usb_otg->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD; - - // deactivate internal PHY - usb_otg->GCCFG &= ~USB_OTG_GCCFG_PWRDWN; - - // Init The UTMI Interface - usb_otg->GUSBCFG &= ~(USB_OTG_GUSBCFG_TSDPS | USB_OTG_GUSBCFG_ULPIFSLS | USB_OTG_GUSBCFG_PHYSEL); - - // Select default internal VBUS Indicator and Drive for ULPI - usb_otg->GUSBCFG &= ~(USB_OTG_GUSBCFG_ULPIEVBUSD | USB_OTG_GUSBCFG_ULPIEVBUSI); - - // Select UTMI Interface - usb_otg->GUSBCFG &= ~(1UL << 4); // USB_OTG_GUSBCFG_ULPI_UTMI_SEL - usb_otg->GCCFG |= (1UL << 32); // USB_OTG_GCCFG_PHYHSEN - - // Enables control of a High Speed USB PHY - //USB_HS_PHYCInit(); - - // Reset core after selecting PHY - // Wait AHB IDLE, reset then wait until it is cleared -// while ((usb_otg->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U) {} -// usb_otg->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; -// while ((usb_otg->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST) {} - - reset_core(usb_otg); - - // Restart PHY clock - *((volatile uint32_t *)(RHPORT_REGS_BASE + USB_OTG_PCGCCTL_BASE)) = 0; - -#else - - // ReadBackReg(&Core->Usb); - // Core->Usb.UlpiDriveExternalVbus = 0; - // Core->Usb.TsDlinePulseEnable = 0; - // WriteThroughReg(&Core->Usb); - - // This sequence is modeled after: https://github.com/Chadderz121/csud/blob/e13b9355d043a9cdd384b335060f1bc0416df61e/source/hcd/dwc/designware20.c#L689 - usb_otg->GUSBCFG &= ~(USB_OTG_GUSBCFG_TSDPS | USB_OTG_GUSBCFG_ULPIEVBUSD); - reset_core(usb_otg); - - // Core->Usb.ModeSelect = UTMI; - // LOG_DEBUG("HCD: Interface: UTMI+.\n"); - // Core->Usb.PhyInterface = false; - - // HcdReset(); - TU_LOG2("init phy\r\n"); - usb_otg->GUSBCFG |= (1 << 4); // bit four sets UTMI+ mode - usb_otg->GUSBCFG &= ~(1 << 3); // bit three disables phy interface - reset_core(usb_otg); - - // LOG_DEBUG("HCD: ULPI FSLS configuration: disabled.\n"); - // Core->Usb.UlpiFsls = false; - // Core->Usb.ulpi_clk_sus_m = false; - usb_otg->GUSBCFG &= ~(USB_OTG_GUSBCFG_ULPIFSLS | USB_OTG_GUSBCFG_ULPICSM); - - // LOG_DEBUG("HCD: DMA configuration: enabled.\n"); - // Core->Ahb.DmaEnable = true; - // Core->Ahb.DmaRemainderMode = Incremental; - usb_otg->GAHBCFG &= ~(1 << 23); // Remainder mode - usb_otg->GAHBCFG |= USB_OTG_GAHBCFG_DMAEN; - - // LOG_DEBUG("HCD: HNP/SRP configuration: HNP, SRP.\n"); - // Core->Usb.HnpCapable = true; - // Core->Usb.SrpCapable = true; - usb_otg->GUSBCFG |= USB_OTG_GUSBCFG_SRPCAP | USB_OTG_GUSBCFG_HNPCAP; - -#endif - - // Clear all interrupts - usb_otg->GINTSTS |= usb_otg->GINTSTS; - - // Required as part of core initialization. - // TODO: How should mode mismatch be handled? It will cause - // the core to stop working/require reset. - usb_otg->GINTMSK |= USB_OTG_GINTMSK_OTGINT | USB_OTG_GINTMSK_MMISM; - - USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); - - // If USB host misbehaves during status portion of control xfer - // (non zero-length packet), send STALL back and discard. - dev->DCFG |= USB_OTG_DCFG_NZLSOHSK; - - set_speed(rhport, TUSB_SPEED_HIGH); - - // TODO internal phy (full speed) - usb_otg->GCCFG |= USB_OTG_GCCFG_PWRDWN; - - usb_otg->GINTMSK |= USB_OTG_GINTMSK_USBRST | USB_OTG_GINTMSK_ENUMDNEM | - USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_WUIM | - USB_OTG_GINTMSK_RXFLVLM | (USE_SOF ? USB_OTG_GINTMSK_SOFM : 0); - - // Enable global interrupt - usb_otg->GAHBCFG |= USB_OTG_GAHBCFG_GINT; - - dcd_connect(rhport); -} - -void dcd_int_enable (uint8_t rhport) -{ - (void) rhport; - BP_EnableIRQ(USB_IRQn); -} - -void dcd_int_disable (uint8_t rhport) -{ - (void) rhport; - BP_DisableIRQ(USB_IRQn); -} - -void dcd_set_address (uint8_t rhport, uint8_t dev_addr) -{ - USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); - dev->DCFG = (dev->DCFG & ~USB_OTG_DCFG_DAD_Msk) | (dev_addr << USB_OTG_DCFG_DAD_Pos); - - // Response with status after changing device address - dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); -} - -static void remote_wakeup_delay(void) -{ - // try to delay for 1 ms - uint32_t count = SystemCoreClock / 1000; - while ( count-- ) - { - // __NOP(); - } -} - -void dcd_remote_wakeup(uint8_t rhport) -{ - (void) rhport; - - USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); - USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); - - // set remote wakeup - dev->DCTL |= USB_OTG_DCTL_RWUSIG; - - // enable SOF to detect bus resume - usb_otg->GINTSTS = USB_OTG_GINTSTS_SOF; - usb_otg->GINTMSK |= USB_OTG_GINTMSK_SOFM; - - // Per specs: remote wakeup signal bit must be clear within 1-15ms - remote_wakeup_delay(); - - dev->DCTL &= ~USB_OTG_DCTL_RWUSIG; -} - -void dcd_connect(uint8_t rhport) -{ - (void) rhport; - USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); - dev->DCTL &= ~USB_OTG_DCTL_SDIS; -} - -void dcd_disconnect(uint8_t rhport) -{ - (void) rhport; - USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); - dev->DCTL |= USB_OTG_DCTL_SDIS; -} - - -/*------------------------------------------------------------------*/ -/* DCD Endpoint port - *------------------------------------------------------------------*/ - -bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) -{ - (void) rhport; - - USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); - USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); - USB_OTG_OUTEndpointTypeDef * out_ep = OUT_EP_BASE(rhport); - USB_OTG_INEndpointTypeDef * in_ep = IN_EP_BASE(rhport); - - uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress); - uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress); - - TU_ASSERT(epnum < EP_MAX); - - xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir); - xfer->max_size = tu_edpt_packet_size(desc_edpt); - xfer->interval = desc_edpt->bInterval; - - uint16_t const fifo_size = (xfer->max_size + 3) / 4; // Round up to next full word - - if(dir == TUSB_DIR_OUT) - { - // Calculate required size of RX FIFO - uint16_t const sz = calc_rx_ff_size(4*fifo_size); - - // If size_rx needs to be extended check if possible and if so enlarge it - if (usb_otg->GRXFSIZ < sz) - { - TU_ASSERT(sz + _allocated_fifo_words_tx <= EP_FIFO_SIZE/4); - - // Enlarge RX FIFO - usb_otg->GRXFSIZ = sz; - } - - out_ep[epnum].DOEPCTL |= (1 << USB_OTG_DOEPCTL_USBAEP_Pos) | - (desc_edpt->bmAttributes.xfer << USB_OTG_DOEPCTL_EPTYP_Pos) | - (desc_edpt->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS ? USB_OTG_DOEPCTL_SD0PID_SEVNFRM : 0) | - (xfer->max_size << USB_OTG_DOEPCTL_MPSIZ_Pos); - - dev->DAINTMSK |= (1 << (USB_OTG_DAINTMSK_OEPM_Pos + epnum)); - } - else - { - // "USB Data FIFOs" section in reference manual - // Peripheral FIFO architecture - // - // --------------- 320 or 1024 ( 1280 or 4096 bytes ) - // | IN FIFO 0 | - // --------------- (320 or 1024) - 16 - // | IN FIFO 1 | - // --------------- (320 or 1024) - 16 - x - // | . . . . | - // --------------- (320 or 1024) - 16 - x - y - ... - z - // | IN FIFO MAX | - // --------------- - // | FREE | - // --------------- GRXFSIZ - // | OUT FIFO | - // | ( Shared ) | - // --------------- 0 - // - // In FIFO is allocated by following rules: - // - IN EP 1 gets FIFO 1, IN EP "n" gets FIFO "n". - - // Check if free space is available - TU_ASSERT(_allocated_fifo_words_tx + fifo_size + usb_otg->GRXFSIZ <= EP_FIFO_SIZE/4); - - _allocated_fifo_words_tx += fifo_size; - - TU_LOG(2, " Allocated %u bytes at offset %u", fifo_size*4, EP_FIFO_SIZE-_allocated_fifo_words_tx*4); - - // DIEPTXF starts at FIFO #1. - // Both TXFD and TXSA are in unit of 32-bit words. - usb_otg->DIEPTXF[epnum - 1] = (fifo_size << USB_OTG_DIEPTXF_INEPTXFD_Pos) | (EP_FIFO_SIZE/4 - _allocated_fifo_words_tx); - - in_ep[epnum].DIEPCTL |= (1 << USB_OTG_DIEPCTL_USBAEP_Pos) | - (epnum << USB_OTG_DIEPCTL_TXFNUM_Pos) | - (desc_edpt->bmAttributes.xfer << USB_OTG_DIEPCTL_EPTYP_Pos) | - (desc_edpt->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS ? USB_OTG_DIEPCTL_SD0PID_SEVNFRM : 0) | - (xfer->max_size << USB_OTG_DIEPCTL_MPSIZ_Pos); - - dev->DAINTMSK |= (1 << (USB_OTG_DAINTMSK_IEPM_Pos + epnum)); - } - - return true; -} - -// Close all non-control endpoints, cancel all pending transfers if any. -void dcd_edpt_close_all (uint8_t rhport) -{ - (void) rhport; - -// USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); - USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); - USB_OTG_OUTEndpointTypeDef * out_ep = OUT_EP_BASE(rhport); - USB_OTG_INEndpointTypeDef * in_ep = IN_EP_BASE(rhport); - - // Disable non-control interrupt - dev->DAINTMSK = (1 << USB_OTG_DAINTMSK_OEPM_Pos) | (1 << USB_OTG_DAINTMSK_IEPM_Pos); - - for(uint8_t n = 1; n < EP_MAX; n++) - { - // disable OUT endpoint - out_ep[n].DOEPCTL = 0; - xfer_status[n][TUSB_DIR_OUT].max_size = 0; - - // disable IN endpoint - in_ep[n].DIEPCTL = 0; - xfer_status[n][TUSB_DIR_IN].max_size = 0; - } - - // reset allocated fifo IN - _allocated_fifo_words_tx = 16; -} - -bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) -{ - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir); - xfer->buffer = buffer; - xfer->ff = NULL; - xfer->total_len = total_bytes; - - // EP0 can only handle one packet - if(epnum == 0) { - ep0_pending[dir] = total_bytes; - // Schedule the first transaction for EP0 transfer - edpt_schedule_packets(rhport, epnum, dir, 1, ep0_pending[dir]); - return true; - } - - uint16_t num_packets = (total_bytes / xfer->max_size); - uint16_t const short_packet_size = total_bytes % xfer->max_size; - - // Zero-size packet is special case. - if(short_packet_size > 0 || (total_bytes == 0)) { - num_packets++; - } - - // Schedule packets to be sent within interrupt - edpt_schedule_packets(rhport, epnum, dir, num_packets, total_bytes); - - return true; -} - -// The number of bytes has to be given explicitly to allow more flexible control of how many -// bytes should be written and second to keep the return value free to give back a boolean -// success message. If total_bytes is too big, the FIFO will copy only what is available -// into the USB buffer! -bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes) -{ - // USB buffers always work in bytes so to avoid unnecessary divisions we demand item_size = 1 - TU_ASSERT(ff->item_size == 1); - - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir); - xfer->buffer = NULL; - xfer->ff = ff; - xfer->total_len = total_bytes; - - uint16_t num_packets = (total_bytes / xfer->max_size); - uint16_t const short_packet_size = total_bytes % xfer->max_size; - - // Zero-size packet is special case. - if(short_packet_size > 0 || (total_bytes == 0)) num_packets++; - - // Schedule packets to be sent within interrupt - edpt_schedule_packets(rhport, epnum, dir, num_packets, total_bytes); - - return true; -} - -static void dcd_edpt_disable (uint8_t rhport, uint8_t ep_addr, bool stall) -{ - (void) rhport; - - USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); - USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); - USB_OTG_OUTEndpointTypeDef * out_ep = OUT_EP_BASE(rhport); - USB_OTG_INEndpointTypeDef * in_ep = IN_EP_BASE(rhport); - - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - if(dir == TUSB_DIR_IN) { - // Only disable currently enabled non-control endpoint - if ( (epnum == 0) || !(in_ep[epnum].DIEPCTL & USB_OTG_DIEPCTL_EPENA) ){ - in_ep[epnum].DIEPCTL |= USB_OTG_DIEPCTL_SNAK | (stall ? USB_OTG_DIEPCTL_STALL : 0); - } else { - // Stop transmitting packets and NAK IN xfers. - in_ep[epnum].DIEPCTL |= USB_OTG_DIEPCTL_SNAK; - while((in_ep[epnum].DIEPINT & USB_OTG_DIEPINT_INEPNE) == 0); - - // Disable the endpoint. - in_ep[epnum].DIEPCTL |= USB_OTG_DIEPCTL_EPDIS | (stall ? USB_OTG_DIEPCTL_STALL : 0); - while((in_ep[epnum].DIEPINT & USB_OTG_DIEPINT_EPDISD_Msk) == 0); - in_ep[epnum].DIEPINT = USB_OTG_DIEPINT_EPDISD; - } - - // Flush the FIFO, and wait until we have confirmed it cleared. - usb_otg->GRSTCTL |= (epnum << USB_OTG_GRSTCTL_TXFNUM_Pos); - usb_otg->GRSTCTL |= USB_OTG_GRSTCTL_TXFFLSH; - while((usb_otg->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH_Msk) != 0); - } else { - // Only disable currently enabled non-control endpoint - if ( (epnum == 0) || !(out_ep[epnum].DOEPCTL & USB_OTG_DOEPCTL_EPENA) ){ - out_ep[epnum].DOEPCTL |= stall ? USB_OTG_DOEPCTL_STALL : 0; - } else { - // Asserting GONAK is required to STALL an OUT endpoint. - // Simpler to use polling here, we don't use the "B"OUTNAKEFF interrupt - // anyway, and it can't be cleared by user code. If this while loop never - // finishes, we have bigger problems than just the stack. - dev->DCTL |= USB_OTG_DCTL_SGONAK; - while((usb_otg->GINTSTS & USB_OTG_GINTSTS_BOUTNAKEFF_Msk) == 0); - - // Ditto here- disable the endpoint. - out_ep[epnum].DOEPCTL |= USB_OTG_DOEPCTL_EPDIS | (stall ? USB_OTG_DOEPCTL_STALL : 0); - while((out_ep[epnum].DOEPINT & USB_OTG_DOEPINT_EPDISD_Msk) == 0); - out_ep[epnum].DOEPINT = USB_OTG_DOEPINT_EPDISD; - - // Allow other OUT endpoints to keep receiving. - dev->DCTL |= USB_OTG_DCTL_CGONAK; - } - } -} - -/** - * Close an endpoint. - */ -void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) -{ - USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); - - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - dcd_edpt_disable(rhport, ep_addr, false); - - // Update max_size - xfer_status[epnum][dir].max_size = 0; // max_size = 0 marks a disabled EP - required for changing FIFO allocation - - if (dir == TUSB_DIR_IN) - { - uint16_t const fifo_size = (usb_otg->DIEPTXF[epnum - 1] & USB_OTG_DIEPTXF_INEPTXFD_Msk) >> USB_OTG_DIEPTXF_INEPTXFD_Pos; - uint16_t const fifo_start = (usb_otg->DIEPTXF[epnum - 1] & USB_OTG_DIEPTXF_INEPTXSA_Msk) >> USB_OTG_DIEPTXF_INEPTXSA_Pos; - // For now only the last opened endpoint can be closed without fuss. - TU_ASSERT(fifo_start == EP_FIFO_SIZE/4 - _allocated_fifo_words_tx,); - _allocated_fifo_words_tx -= fifo_size; - } - else - { - _out_ep_closed = true; // Set flag such that RX FIFO gets reduced in size once RX FIFO is empty - } -} - -void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) -{ - dcd_edpt_disable(rhport, ep_addr, true); -} - -void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - - USB_OTG_OUTEndpointTypeDef * out_ep = OUT_EP_BASE(rhport); - USB_OTG_INEndpointTypeDef * in_ep = IN_EP_BASE(rhport); - - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - // Clear stall and reset data toggle - if(dir == TUSB_DIR_IN) { - in_ep[epnum].DIEPCTL &= ~USB_OTG_DIEPCTL_STALL; - in_ep[epnum].DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; - } else { - out_ep[epnum].DOEPCTL &= ~USB_OTG_DOEPCTL_STALL; - out_ep[epnum].DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; - } -} - -/*------------------------------------------------------------------*/ - -// Read a single data packet from receive FIFO -static void read_fifo_packet(uint8_t rhport, uint8_t * dst, uint16_t len) -{ - (void) rhport; - - usb_fifo_t rx_fifo = FIFO_BASE(rhport, 0); - - // Reading full available 32 bit words from fifo - uint16_t full_words = len >> 2; - for(uint16_t i = 0; i < full_words; i++) { - uint32_t tmp = *rx_fifo; - dst[0] = tmp & 0x000000FF; - dst[1] = (tmp & 0x0000FF00) >> 8; - dst[2] = (tmp & 0x00FF0000) >> 16; - dst[3] = (tmp & 0xFF000000) >> 24; - dst += 4; - } - - // Read the remaining 1-3 bytes from fifo - uint8_t bytes_rem = len & 0x03; - if(bytes_rem != 0) { - uint32_t tmp = *rx_fifo; - dst[0] = tmp & 0x000000FF; - if(bytes_rem > 1) { - dst[1] = (tmp & 0x0000FF00) >> 8; - } - if(bytes_rem > 2) { - dst[2] = (tmp & 0x00FF0000) >> 16; - } - } -} - -// Write a single data packet to EPIN FIFO -static void write_fifo_packet(uint8_t rhport, uint8_t fifo_num, uint8_t * src, uint16_t len) -{ - (void) rhport; - - usb_fifo_t tx_fifo = FIFO_BASE(rhport, fifo_num); - - // Pushing full available 32 bit words to fifo - uint16_t full_words = len >> 2; - for(uint16_t i = 0; i < full_words; i++){ - *tx_fifo = (src[3] << 24) | (src[2] << 16) | (src[1] << 8) | src[0]; - src += 4; - } - - // Write the remaining 1-3 bytes into fifo - uint8_t bytes_rem = len & 0x03; - if(bytes_rem){ - uint32_t tmp_word = 0; - tmp_word |= src[0]; - if(bytes_rem > 1){ - tmp_word |= src[1] << 8; - } - if(bytes_rem > 2){ - tmp_word |= src[2] << 16; - } - *tx_fifo = tmp_word; - } -} - -static void handle_rxflvl_ints(uint8_t rhport, USB_OTG_OUTEndpointTypeDef * out_ep) { - USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); - usb_fifo_t rx_fifo = FIFO_BASE(rhport, 0); - - // Pop control word off FIFO - uint32_t ctl_word = usb_otg->GRXSTSP; - uint8_t pktsts = (ctl_word & USB_OTG_GRXSTSP_PKTSTS_Msk) >> USB_OTG_GRXSTSP_PKTSTS_Pos; - uint8_t epnum = (ctl_word & USB_OTG_GRXSTSP_EPNUM_Msk) >> USB_OTG_GRXSTSP_EPNUM_Pos; - uint16_t bcnt = (ctl_word & USB_OTG_GRXSTSP_BCNT_Msk) >> USB_OTG_GRXSTSP_BCNT_Pos; - - switch(pktsts) { - case 0x01: // Global OUT NAK (Interrupt) - break; - - case 0x02: // Out packet recvd - { - xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, TUSB_DIR_OUT); - - // Read packet off RxFIFO - if (xfer->ff) - { - // Ring buffer - tu_fifo_write_n_const_addr_full_words(xfer->ff, (const void *)(uintptr_t) rx_fifo, bcnt); - } - else - { - // Linear buffer - read_fifo_packet(rhport, xfer->buffer, bcnt); - - // Increment pointer to xfer data - xfer->buffer += bcnt; - } - - // Truncate transfer length in case of short packet - if(bcnt < xfer->max_size) { - xfer->total_len -= (out_ep[epnum].DOEPTSIZ & USB_OTG_DOEPTSIZ_XFRSIZ_Msk) >> USB_OTG_DOEPTSIZ_XFRSIZ_Pos; - if(epnum == 0) { - xfer->total_len -= ep0_pending[TUSB_DIR_OUT]; - ep0_pending[TUSB_DIR_OUT] = 0; - } - } - } - break; - - case 0x03: // Out packet done (Interrupt) - break; - - case 0x04: // Setup packet done (Interrupt) - out_ep[epnum].DOEPTSIZ |= (3 << USB_OTG_DOEPTSIZ_STUPCNT_Pos); - break; - - case 0x06: // Setup packet recvd - // We can receive up to three setup packets in succession, but - // only the last one is valid. - _setup_packet[0] = (* rx_fifo); - _setup_packet[1] = (* rx_fifo); - break; - - default: // Invalid - TU_BREAKPOINT(); - break; - } -} - -static void handle_epout_ints(uint8_t rhport, USB_OTG_DeviceTypeDef * dev, USB_OTG_OUTEndpointTypeDef * out_ep) { - // DAINT for a given EP clears when DOEPINTx is cleared. - // OEPINT will be cleared when DAINT's out bits are cleared. - for(uint8_t n = 0; n < EP_MAX; n++) { - xfer_ctl_t * xfer = XFER_CTL_BASE(n, TUSB_DIR_OUT); - - if(dev->DAINT & (1 << (USB_OTG_DAINT_OEPINT_Pos + n))) { - // SETUP packet Setup Phase done. - if(out_ep[n].DOEPINT & USB_OTG_DOEPINT_STUP) { - out_ep[n].DOEPINT = USB_OTG_DOEPINT_STUP; - dcd_event_setup_received(rhport, (uint8_t*) &_setup_packet[0], true); - } - - // OUT XFER complete - if(out_ep[n].DOEPINT & USB_OTG_DOEPINT_XFRC) { - out_ep[n].DOEPINT = USB_OTG_DOEPINT_XFRC; - - // EP0 can only handle one packet - if((n == 0) && ep0_pending[TUSB_DIR_OUT]) { - // Schedule another packet to be received. - edpt_schedule_packets(rhport, n, TUSB_DIR_OUT, 1, ep0_pending[TUSB_DIR_OUT]); - } else { - dcd_event_xfer_complete(rhport, n, xfer->total_len, XFER_RESULT_SUCCESS, true); - } - } - } - } -} - -static void handle_epin_ints(uint8_t rhport, USB_OTG_DeviceTypeDef * dev, USB_OTG_INEndpointTypeDef * in_ep) { - // DAINT for a given EP clears when DIEPINTx is cleared. - // IEPINT will be cleared when DAINT's out bits are cleared. - for ( uint8_t n = 0; n < EP_MAX; n++ ) - { - xfer_ctl_t *xfer = XFER_CTL_BASE(n, TUSB_DIR_IN); - - if ( dev->DAINT & (1 << (USB_OTG_DAINT_IEPINT_Pos + n)) ) - { - // IN XFER complete (entire xfer). - if ( in_ep[n].DIEPINT & USB_OTG_DIEPINT_XFRC ) - { - in_ep[n].DIEPINT = USB_OTG_DIEPINT_XFRC; - - // EP0 can only handle one packet - if((n == 0) && ep0_pending[TUSB_DIR_IN]) { - // Schedule another packet to be transmitted. - edpt_schedule_packets(rhport, n, TUSB_DIR_IN, 1, ep0_pending[TUSB_DIR_IN]); - } else { - dcd_event_xfer_complete(rhport, n | TUSB_DIR_IN_MASK, xfer->total_len, XFER_RESULT_SUCCESS, true); - } - } - - // XFER FIFO empty - if ( (in_ep[n].DIEPINT & USB_OTG_DIEPINT_TXFE) && (dev->DIEPEMPMSK & (1 << n)) ) - { - // DIEPINT's TXFE bit is read-only, software cannot clear it. - // It will only be cleared by hardware when written bytes is more than - // - 64 bytes or - // - Half of TX FIFO size (configured by DIEPTXF) - - uint16_t remaining_packets = (in_ep[n].DIEPTSIZ & USB_OTG_DIEPTSIZ_PKTCNT_Msk) >> USB_OTG_DIEPTSIZ_PKTCNT_Pos; - - // Process every single packet (only whole packets can be written to fifo) - for(uint16_t i = 0; i < remaining_packets; i++) - { - uint16_t const remaining_bytes = (in_ep[n].DIEPTSIZ & USB_OTG_DIEPTSIZ_XFRSIZ_Msk) >> USB_OTG_DIEPTSIZ_XFRSIZ_Pos; - - // Packet can not be larger than ep max size - uint16_t const packet_size = tu_min16(remaining_bytes, xfer->max_size); - - // It's only possible to write full packets into FIFO. Therefore DTXFSTS register of current - // EP has to be checked if the buffer can take another WHOLE packet - if(packet_size > ((in_ep[n].DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV_Msk) << 2)) break; - - // Push packet to Tx-FIFO - if (xfer->ff) - { - usb_fifo_t tx_fifo = FIFO_BASE(rhport, n); - tu_fifo_read_n_const_addr_full_words(xfer->ff, (void *)(uintptr_t) tx_fifo, packet_size); - } - else - { - write_fifo_packet(rhport, n, xfer->buffer, packet_size); - - // Increment pointer to xfer data - xfer->buffer += packet_size; - } - } - - // Turn off TXFE if all bytes are written. - if (((in_ep[n].DIEPTSIZ & USB_OTG_DIEPTSIZ_XFRSIZ_Msk) >> USB_OTG_DIEPTSIZ_XFRSIZ_Pos) == 0) - { - dev->DIEPEMPMSK &= ~(1 << n); - } - } - } - } -} - -void dcd_int_handler(uint8_t rhport) -{ - USB_OTG_GlobalTypeDef * usb_otg = GLOBAL_BASE(rhport); - USB_OTG_DeviceTypeDef * dev = DEVICE_BASE(rhport); - USB_OTG_OUTEndpointTypeDef * out_ep = OUT_EP_BASE(rhport); - USB_OTG_INEndpointTypeDef * in_ep = IN_EP_BASE(rhport); - - uint32_t const int_status = usb_otg->GINTSTS & usb_otg->GINTMSK; - - if(int_status & USB_OTG_GINTSTS_USBRST) - { - // USBRST is start of reset. - usb_otg->GINTSTS = USB_OTG_GINTSTS_USBRST; - bus_reset(rhport); - } - - if(int_status & USB_OTG_GINTSTS_ENUMDNE) - { - // ENUMDNE is the end of reset where speed of the link is detected - - usb_otg->GINTSTS = USB_OTG_GINTSTS_ENUMDNE; - - tusb_speed_t const speed = get_speed(rhport); - - set_turnaround(usb_otg, speed); - dcd_event_bus_reset(rhport, speed, true); - } - - if(int_status & USB_OTG_GINTSTS_USBSUSP) - { - usb_otg->GINTSTS = USB_OTG_GINTSTS_USBSUSP; - dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); - } - - if(int_status & USB_OTG_GINTSTS_WKUINT) - { - usb_otg->GINTSTS = USB_OTG_GINTSTS_WKUINT; - dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); - } - - // TODO check USB_OTG_GINTSTS_DISCINT for disconnect detection - // if(int_status & USB_OTG_GINTSTS_DISCINT) - - if(int_status & USB_OTG_GINTSTS_OTGINT) - { - // OTG INT bit is read-only - uint32_t const otg_int = usb_otg->GOTGINT; - - if (otg_int & USB_OTG_GOTGINT_SEDET) - { - dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true); - } - - usb_otg->GOTGINT = otg_int; - } - - if(int_status & USB_OTG_GINTSTS_SOF) - { - usb_otg->GINTSTS = USB_OTG_GINTSTS_SOF; - - // Disable SOF interrupt since currently only used for remote wakeup detection - usb_otg->GINTMSK &= ~USB_OTG_GINTMSK_SOFM; - - dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); - } - - // RxFIFO non-empty interrupt handling. - if(int_status & USB_OTG_GINTSTS_RXFLVL) - { - // RXFLVL bit is read-only - - // Mask out RXFLVL while reading data from FIFO - usb_otg->GINTMSK &= ~USB_OTG_GINTMSK_RXFLVLM; - - // Loop until all available packets were handled - do - { - handle_rxflvl_ints(rhport, out_ep); - } while(usb_otg->GINTSTS & USB_OTG_GINTSTS_RXFLVL); - - // Manage RX FIFO size - if (_out_ep_closed) - { - update_grxfsiz(rhport); - - // Disable flag - _out_ep_closed = false; - } - - usb_otg->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM; - } - - // OUT endpoint interrupt handling. - if(int_status & USB_OTG_GINTSTS_OEPINT) - { - // OEPINT is read-only - handle_epout_ints(rhport, dev, out_ep); - } - - // IN endpoint interrupt handling. - if(int_status & USB_OTG_GINTSTS_IEPINT) - { - // IEPINT bit read-only - handle_epin_ints(rhport, dev, in_ep); - } - - // // Check for Incomplete isochronous IN transfer - // if(int_status & USB_OTG_GINTSTS_IISOIXFR) { - // printf(" IISOIXFR!\r\n"); - //// TU_LOG2(" IISOIXFR!\r\n"); - // } -} - -#endif diff --git a/src/portable/broadcom/synopsys/synopsys_common.h b/src/portable/broadcom/synopsys/synopsys_common.h deleted file mode 100644 index 81ce3b4a9..000000000 --- a/src/portable/broadcom/synopsys/synopsys_common.h +++ /dev/null @@ -1,1476 +0,0 @@ -/** - ****************************************************************************** - * @file synopsys_common.h - * @author MCD Application Team - * @brief CMSIS Cortex-M3 Device USB OTG peripheral Header File. - * This file contains the USB OTG peripheral register's definitions, bits - * definitions and memory mapping for STM32F1xx devices. - * - * This file contains: - * - Data structures and the address mapping for the USB OTG peripheral - * - The Peripheral's registers declarations and bits definition - * - Macros to access the peripheral's registers hardware - * - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2017 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -#include "stdint.h" - -#pragma once - -#ifdef __cplusplus - #define __I volatile -#else - #define __I volatile const -#endif -#define __O volatile -#define __IO volatile -#define __IM volatile const -#define __OM volatile -#define __IOM volatile - -/** - * @brief __USB_OTG_Core_register - */ - -typedef struct -{ - __IO uint32_t GOTGCTL; /*!< USB_OTG Control and Status Register Address offset: 000h */ - __IO uint32_t GOTGINT; /*!< USB_OTG Interrupt Register Address offset: 004h */ - __IO uint32_t GAHBCFG; /*!< Core AHB Configuration Register Address offset: 008h */ - __IO uint32_t GUSBCFG; /*!< Core USB Configuration Register Address offset: 00Ch */ - __IO uint32_t GRSTCTL; /*!< Core Reset Register Address offset: 010h */ - __IO uint32_t GINTSTS; /*!< Core Interrupt Register Address offset: 014h */ - __IO uint32_t GINTMSK; /*!< Core Interrupt Mask Register Address offset: 018h */ - __IO uint32_t GRXSTSR; /*!< Receive Sts Q Read Register Address offset: 01Ch */ - __IO uint32_t GRXSTSP; /*!< Receive Sts Q Read & POP Register Address offset: 020h */ - __IO uint32_t GRXFSIZ; /*!< Receive FIFO Size Register Address offset: 024h */ - __IO uint32_t DIEPTXF0_HNPTXFSIZ; /*!< EP0 / Non Periodic Tx FIFO Size Register Address offset: 028h */ - __IO uint32_t HNPTXSTS; /*!< Non Periodic Tx FIFO/Queue Sts reg Address offset: 02Ch */ - uint32_t Reserved30[2]; /*!< Reserved 030h*/ - __IO uint32_t GCCFG; /*!< General Purpose IO Register Address offset: 038h */ - __IO uint32_t CID; /*!< User ID Register 03Ch */ - __IO uint32_t GSNPSID; /* USB_OTG core ID 040h*/ - __IO uint32_t GHWCFG1; /* User HW config1 044h*/ - __IO uint32_t GHWCFG2; /* User HW config2 048h*/ - __IO uint32_t GHWCFG3; /*!< User HW config3 04Ch */ - uint32_t Reserved6; /*!< Reserved 050h */ - __IO uint32_t GLPMCFG; /*!< LPM Register 054h */ - __IO uint32_t GPWRDN; /*!< Power Down Register 058h */ - __IO uint32_t GDFIFOCFG; /*!< DFIFO Software Config Register 05Ch */ - __IO uint32_t GADPCTL; /*!< ADP Timer, Control and Status Register 60Ch */ - uint32_t Reserved43[39]; /*!< Reserved 058h-0FFh */ - __IO uint32_t HPTXFSIZ; /*!< Host Periodic Tx FIFO Size Reg Address offset: 100h */ - __IO uint32_t DIEPTXF[0x0F]; /*!< dev Periodic Transmit FIFO Address offset: 0x104 */ -} USB_OTG_GlobalTypeDef; - - - -/** - * @brief __device_Registers - */ - -typedef struct -{ - __IO uint32_t DCFG; /*!< dev Configuration Register Address offset: 800h*/ - __IO uint32_t DCTL; /*!< dev Control Register Address offset: 804h*/ - __IO uint32_t DSTS; /*!< dev Status Register (RO) Address offset: 808h*/ - uint32_t Reserved0C; /*!< Reserved 80Ch*/ - __IO uint32_t DIEPMSK; /*!< dev IN Endpoint Mask Address offset: 810h*/ - __IO uint32_t DOEPMSK; /*!< dev OUT Endpoint Mask Address offset: 814h*/ - __IO uint32_t DAINT; /*!< dev All Endpoints Itr Reg Address offset: 818h*/ - __IO uint32_t DAINTMSK; /*!< dev All Endpoints Itr Mask Address offset: 81Ch*/ - uint32_t Reserved20; /*!< Reserved 820h*/ - uint32_t Reserved9; /*!< Reserved 824h*/ - __IO uint32_t DVBUSDIS; /*!< dev VBUS discharge Register Address offset: 828h*/ - __IO uint32_t DVBUSPULSE; /*!< dev VBUS Pulse Register Address offset: 82Ch*/ - __IO uint32_t DTHRCTL; /*!< dev thr Address offset: 830h*/ - __IO uint32_t DIEPEMPMSK; /*!< dev empty msk Address offset: 834h*/ - __IO uint32_t DEACHINT; /*!< dedicated EP interrupt Address offset: 838h*/ - __IO uint32_t DEACHMSK; /*!< dedicated EP msk Address offset: 83Ch*/ - uint32_t Reserved40; /*!< dedicated EP mask Address offset: 840h*/ - __IO uint32_t DINEP1MSK; /*!< dedicated EP mask Address offset: 844h*/ - uint32_t Reserved44[15]; /*!< Reserved 844-87Ch*/ - __IO uint32_t DOUTEP1MSK; /*!< dedicated EP msk Address offset: 884h*/ -} USB_OTG_DeviceTypeDef; - -/** - * @brief __IN_Endpoint-Specific_Register - */ - -typedef struct -{ - __IO uint32_t DIEPCTL; /*!< dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h*/ - uint32_t Reserved04; /*!< Reserved 900h + (ep_num * 20h) + 04h*/ - __IO uint32_t DIEPINT; /*!< dev IN Endpoint Itr Reg 900h + (ep_num * 20h) + 08h*/ - uint32_t Reserved0C; /*!< Reserved 900h + (ep_num * 20h) + 0Ch*/ - __IO uint32_t DIEPTSIZ; /*!< IN Endpoint Txfer Size 900h + (ep_num * 20h) + 10h*/ - __IO uint32_t DIEPDMA; /*!< IN Endpoint DMA Address Reg 900h + (ep_num * 20h) + 14h*/ - __IO uint32_t DTXFSTS; /*!< IN Endpoint Tx FIFO Status Reg 900h + (ep_num * 20h) + 18h*/ - uint32_t Reserved18; /*!< Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/ -} USB_OTG_INEndpointTypeDef; - -/** - * @brief __OUT_Endpoint-Specific_Registers - */ - -typedef struct -{ - __IO uint32_t DOEPCTL; /*!< dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h*/ - uint32_t Reserved04; /*!< Reserved B00h + (ep_num * 20h) + 04h*/ - __IO uint32_t DOEPINT; /*!< dev OUT Endpoint Itr Reg B00h + (ep_num * 20h) + 08h*/ - uint32_t Reserved0C; /*!< Reserved B00h + (ep_num * 20h) + 0Ch*/ - __IO uint32_t DOEPTSIZ; /*!< dev OUT Endpoint Txfer Size B00h + (ep_num * 20h) + 10h*/ - __IO uint32_t DOEPDMA; /*!< dev OUT Endpoint DMA Address B00h + (ep_num * 20h) + 14h*/ - uint32_t Reserved18[2]; /*!< Reserved B00h + (ep_num * 20h) + 18h - B00h + (ep_num * 20h) + 1Ch*/ -} USB_OTG_OUTEndpointTypeDef; - -/** - * @brief __Host_Mode_Register_Structures - */ - -typedef struct -{ - __IO uint32_t HCFG; /*!< Host Configuration Register 400h*/ - __IO uint32_t HFIR; /*!< Host Frame Interval Register 404h*/ - __IO uint32_t HFNUM; /*!< Host Frame Nbr/Frame Remaining 408h*/ - uint32_t Reserved40C; /*!< Reserved 40Ch*/ - __IO uint32_t HPTXSTS; /*!< Host Periodic Tx FIFO/ Queue Status 410h*/ - __IO uint32_t HAINT; /*!< Host All Channels Interrupt Register 414h*/ - __IO uint32_t HAINTMSK; /*!< Host All Channels Interrupt Mask 418h*/ -} USB_OTG_HostTypeDef; - -/** - * @brief __Host_Channel_Specific_Registers - */ - -typedef struct -{ - __IO uint32_t HCCHAR; - __IO uint32_t HCSPLT; - __IO uint32_t HCINT; - __IO uint32_t HCINTMSK; - __IO uint32_t HCTSIZ; - __IO uint32_t HCDMA; - uint32_t Reserved[2]; -} USB_OTG_HostChannelTypeDef; - -/*!< USB registers base address */ -#define USB_OTG_FS_PERIPH_BASE 0x50000000UL - -// #define USB_OTG_GLOBAL_BASE 0x00000000UL -// #define USB_OTG_DEVICE_BASE 0x00000800UL -#define USB_OTG_IN_ENDPOINT_BASE 0x00000900UL -#define USB_OTG_OUT_ENDPOINT_BASE 0x00000B00UL -#define USB_OTG_EP_REG_SIZE 0x00000020UL -// #define USB_OTG_HOST_BASE 0x00000400UL -#define USB_OTG_HOST_PORT_BASE 0x00000440UL -#define USB_OTG_HOST_CHANNEL_BASE 0x00000500UL -#define USB_OTG_HOST_CHANNEL_SIZE 0x00000020UL -#define USB_OTG_PCGCCTL_BASE 0x00000E00UL -#define USB_OTG_FIFO_BASE 0x00001000UL -#define USB_OTG_FIFO_SIZE 0x00001000UL - -/******************************************************************************/ -/* */ -/* USB_OTG */ -/* */ -/******************************************************************************/ -/******************** Bit definition for USB_OTG_GOTGCTL register ***********/ -#define USB_OTG_GOTGCTL_SRQSCS_Pos (0U) -#define USB_OTG_GOTGCTL_SRQSCS_Msk (0x1UL << USB_OTG_GOTGCTL_SRQSCS_Pos) /*!< 0x00000001 */ -#define USB_OTG_GOTGCTL_SRQSCS USB_OTG_GOTGCTL_SRQSCS_Msk /*!< Session request success */ -#define USB_OTG_GOTGCTL_SRQ_Pos (1U) -#define USB_OTG_GOTGCTL_SRQ_Msk (0x1UL << USB_OTG_GOTGCTL_SRQ_Pos) /*!< 0x00000002 */ -#define USB_OTG_GOTGCTL_SRQ USB_OTG_GOTGCTL_SRQ_Msk /*!< Session request */ -#define USB_OTG_GOTGCTL_HNGSCS_Pos (8U) -#define USB_OTG_GOTGCTL_HNGSCS_Msk (0x1UL << USB_OTG_GOTGCTL_HNGSCS_Pos) /*!< 0x00000100 */ -#define USB_OTG_GOTGCTL_HNGSCS USB_OTG_GOTGCTL_HNGSCS_Msk /*!< Host set HNP enable */ -#define USB_OTG_GOTGCTL_HNPRQ_Pos (9U) -#define USB_OTG_GOTGCTL_HNPRQ_Msk (0x1UL << USB_OTG_GOTGCTL_HNPRQ_Pos) /*!< 0x00000200 */ -#define USB_OTG_GOTGCTL_HNPRQ USB_OTG_GOTGCTL_HNPRQ_Msk /*!< HNP request */ -#define USB_OTG_GOTGCTL_HSHNPEN_Pos (10U) -#define USB_OTG_GOTGCTL_HSHNPEN_Msk (0x1UL << USB_OTG_GOTGCTL_HSHNPEN_Pos) /*!< 0x00000400 */ -#define USB_OTG_GOTGCTL_HSHNPEN USB_OTG_GOTGCTL_HSHNPEN_Msk /*!< Host set HNP enable */ -#define USB_OTG_GOTGCTL_DHNPEN_Pos (11U) -#define USB_OTG_GOTGCTL_DHNPEN_Msk (0x1UL << USB_OTG_GOTGCTL_DHNPEN_Pos) /*!< 0x00000800 */ -#define USB_OTG_GOTGCTL_DHNPEN USB_OTG_GOTGCTL_DHNPEN_Msk /*!< Device HNP enabled */ -#define USB_OTG_GOTGCTL_CIDSTS_Pos (16U) -#define USB_OTG_GOTGCTL_CIDSTS_Msk (0x1UL << USB_OTG_GOTGCTL_CIDSTS_Pos) /*!< 0x00010000 */ -#define USB_OTG_GOTGCTL_CIDSTS USB_OTG_GOTGCTL_CIDSTS_Msk /*!< Connector ID status */ -#define USB_OTG_GOTGCTL_DBCT_Pos (17U) -#define USB_OTG_GOTGCTL_DBCT_Msk (0x1UL << USB_OTG_GOTGCTL_DBCT_Pos) /*!< 0x00020000 */ -#define USB_OTG_GOTGCTL_DBCT USB_OTG_GOTGCTL_DBCT_Msk /*!< Long/short debounce time */ -#define USB_OTG_GOTGCTL_ASVLD_Pos (18U) -#define USB_OTG_GOTGCTL_ASVLD_Msk (0x1UL << USB_OTG_GOTGCTL_ASVLD_Pos) /*!< 0x00040000 */ -#define USB_OTG_GOTGCTL_ASVLD USB_OTG_GOTGCTL_ASVLD_Msk /*!< A-session valid */ -#define USB_OTG_GOTGCTL_BSVLD_Pos (19U) -#define USB_OTG_GOTGCTL_BSVLD_Msk (0x1UL << USB_OTG_GOTGCTL_BSVLD_Pos) /*!< 0x00080000 */ -#define USB_OTG_GOTGCTL_BSVLD USB_OTG_GOTGCTL_BSVLD_Msk /*!< B-session valid */ - -/******************** Bit definition for USB_OTG_HCFG register ********************/ - -#define USB_OTG_HCFG_FSLSPCS_Pos (0U) -#define USB_OTG_HCFG_FSLSPCS_Msk (0x3UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000003 */ -#define USB_OTG_HCFG_FSLSPCS USB_OTG_HCFG_FSLSPCS_Msk /*!< FS/LS PHY clock select */ -#define USB_OTG_HCFG_FSLSPCS_0 (0x1UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000001 */ -#define USB_OTG_HCFG_FSLSPCS_1 (0x2UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000002 */ -#define USB_OTG_HCFG_FSLSS_Pos (2U) -#define USB_OTG_HCFG_FSLSS_Msk (0x1UL << USB_OTG_HCFG_FSLSS_Pos) /*!< 0x00000004 */ -#define USB_OTG_HCFG_FSLSS USB_OTG_HCFG_FSLSS_Msk /*!< FS- and LS-only support */ - -/******************** Bit definition for USB_OTG_DCFG register ********************/ - -#define USB_OTG_DCFG_DSPD_Pos (0U) -#define USB_OTG_DCFG_DSPD_Msk (0x3UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000003 */ -#define USB_OTG_DCFG_DSPD USB_OTG_DCFG_DSPD_Msk /*!< Device speed */ -#define USB_OTG_DCFG_DSPD_0 (0x1UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000001 */ -#define USB_OTG_DCFG_DSPD_1 (0x2UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000002 */ -#define USB_OTG_DCFG_NZLSOHSK_Pos (2U) -#define USB_OTG_DCFG_NZLSOHSK_Msk (0x1UL << USB_OTG_DCFG_NZLSOHSK_Pos) /*!< 0x00000004 */ -#define USB_OTG_DCFG_NZLSOHSK USB_OTG_DCFG_NZLSOHSK_Msk /*!< Nonzero-length status OUT handshake */ - -#define USB_OTG_DCFG_DAD_Pos (4U) -#define USB_OTG_DCFG_DAD_Msk (0x7FUL << USB_OTG_DCFG_DAD_Pos) /*!< 0x000007F0 */ -#define USB_OTG_DCFG_DAD USB_OTG_DCFG_DAD_Msk /*!< Device address */ -#define USB_OTG_DCFG_DAD_0 (0x01UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000010 */ -#define USB_OTG_DCFG_DAD_1 (0x02UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000020 */ -#define USB_OTG_DCFG_DAD_2 (0x04UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000040 */ -#define USB_OTG_DCFG_DAD_3 (0x08UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000080 */ -#define USB_OTG_DCFG_DAD_4 (0x10UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000100 */ -#define USB_OTG_DCFG_DAD_5 (0x20UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000200 */ -#define USB_OTG_DCFG_DAD_6 (0x40UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000400 */ - -#define USB_OTG_DCFG_PFIVL_Pos (11U) -#define USB_OTG_DCFG_PFIVL_Msk (0x3UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00001800 */ -#define USB_OTG_DCFG_PFIVL USB_OTG_DCFG_PFIVL_Msk /*!< Periodic (micro)frame interval */ -#define USB_OTG_DCFG_PFIVL_0 (0x1UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00000800 */ -#define USB_OTG_DCFG_PFIVL_1 (0x2UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00001000 */ - -#define USB_OTG_DCFG_PERSCHIVL_Pos (24U) -#define USB_OTG_DCFG_PERSCHIVL_Msk (0x3UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x03000000 */ -#define USB_OTG_DCFG_PERSCHIVL USB_OTG_DCFG_PERSCHIVL_Msk /*!< Periodic scheduling interval */ -#define USB_OTG_DCFG_PERSCHIVL_0 (0x1UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x01000000 */ -#define USB_OTG_DCFG_PERSCHIVL_1 (0x2UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x02000000 */ - -/******************** Bit definition for USB_OTG_PCGCR register ********************/ -#define USB_OTG_PCGCR_STPPCLK_Pos (0U) -#define USB_OTG_PCGCR_STPPCLK_Msk (0x1UL << USB_OTG_PCGCR_STPPCLK_Pos) /*!< 0x00000001 */ -#define USB_OTG_PCGCR_STPPCLK USB_OTG_PCGCR_STPPCLK_Msk /*!< Stop PHY clock */ -#define USB_OTG_PCGCR_GATEHCLK_Pos (1U) -#define USB_OTG_PCGCR_GATEHCLK_Msk (0x1UL << USB_OTG_PCGCR_GATEHCLK_Pos) /*!< 0x00000002 */ -#define USB_OTG_PCGCR_GATEHCLK USB_OTG_PCGCR_GATEHCLK_Msk /*!< Gate HCLK */ -#define USB_OTG_PCGCR_PHYSUSP_Pos (4U) -#define USB_OTG_PCGCR_PHYSUSP_Msk (0x1UL << USB_OTG_PCGCR_PHYSUSP_Pos) /*!< 0x00000010 */ -#define USB_OTG_PCGCR_PHYSUSP USB_OTG_PCGCR_PHYSUSP_Msk /*!< PHY suspended */ - -/******************** Bit definition for USB_OTG_GOTGINT register ********************/ -#define USB_OTG_GOTGINT_SEDET_Pos (2U) -#define USB_OTG_GOTGINT_SEDET_Msk (0x1UL << USB_OTG_GOTGINT_SEDET_Pos) /*!< 0x00000004 */ -#define USB_OTG_GOTGINT_SEDET USB_OTG_GOTGINT_SEDET_Msk /*!< Session end detected */ -#define USB_OTG_GOTGINT_SRSSCHG_Pos (8U) -#define USB_OTG_GOTGINT_SRSSCHG_Msk (0x1UL << USB_OTG_GOTGINT_SRSSCHG_Pos) /*!< 0x00000100 */ -#define USB_OTG_GOTGINT_SRSSCHG USB_OTG_GOTGINT_SRSSCHG_Msk /*!< Session request success status change */ -#define USB_OTG_GOTGINT_HNSSCHG_Pos (9U) -#define USB_OTG_GOTGINT_HNSSCHG_Msk (0x1UL << USB_OTG_GOTGINT_HNSSCHG_Pos) /*!< 0x00000200 */ -#define USB_OTG_GOTGINT_HNSSCHG USB_OTG_GOTGINT_HNSSCHG_Msk /*!< Host negotiation success status change */ -#define USB_OTG_GOTGINT_HNGDET_Pos (17U) -#define USB_OTG_GOTGINT_HNGDET_Msk (0x1UL << USB_OTG_GOTGINT_HNGDET_Pos) /*!< 0x00020000 */ -#define USB_OTG_GOTGINT_HNGDET USB_OTG_GOTGINT_HNGDET_Msk /*!< Host negotiation detected */ -#define USB_OTG_GOTGINT_ADTOCHG_Pos (18U) -#define USB_OTG_GOTGINT_ADTOCHG_Msk (0x1UL << USB_OTG_GOTGINT_ADTOCHG_Pos) /*!< 0x00040000 */ -#define USB_OTG_GOTGINT_ADTOCHG USB_OTG_GOTGINT_ADTOCHG_Msk /*!< A-device timeout change */ -#define USB_OTG_GOTGINT_DBCDNE_Pos (19U) -#define USB_OTG_GOTGINT_DBCDNE_Msk (0x1UL << USB_OTG_GOTGINT_DBCDNE_Pos) /*!< 0x00080000 */ -#define USB_OTG_GOTGINT_DBCDNE USB_OTG_GOTGINT_DBCDNE_Msk /*!< Debounce done */ - -/******************** Bit definition for USB_OTG_DCTL register ********************/ -#define USB_OTG_DCTL_RWUSIG_Pos (0U) -#define USB_OTG_DCTL_RWUSIG_Msk (0x1UL << USB_OTG_DCTL_RWUSIG_Pos) /*!< 0x00000001 */ -#define USB_OTG_DCTL_RWUSIG USB_OTG_DCTL_RWUSIG_Msk /*!< Remote wakeup signaling */ -#define USB_OTG_DCTL_SDIS_Pos (1U) -#define USB_OTG_DCTL_SDIS_Msk (0x1UL << USB_OTG_DCTL_SDIS_Pos) /*!< 0x00000002 */ -#define USB_OTG_DCTL_SDIS USB_OTG_DCTL_SDIS_Msk /*!< Soft disconnect */ -#define USB_OTG_DCTL_GINSTS_Pos (2U) -#define USB_OTG_DCTL_GINSTS_Msk (0x1UL << USB_OTG_DCTL_GINSTS_Pos) /*!< 0x00000004 */ -#define USB_OTG_DCTL_GINSTS USB_OTG_DCTL_GINSTS_Msk /*!< Global IN NAK status */ -#define USB_OTG_DCTL_GONSTS_Pos (3U) -#define USB_OTG_DCTL_GONSTS_Msk (0x1UL << USB_OTG_DCTL_GONSTS_Pos) /*!< 0x00000008 */ -#define USB_OTG_DCTL_GONSTS USB_OTG_DCTL_GONSTS_Msk /*!< Global OUT NAK status */ - -#define USB_OTG_DCTL_TCTL_Pos (4U) -#define USB_OTG_DCTL_TCTL_Msk (0x7UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000070 */ -#define USB_OTG_DCTL_TCTL USB_OTG_DCTL_TCTL_Msk /*!< Test control */ -#define USB_OTG_DCTL_TCTL_0 (0x1UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000010 */ -#define USB_OTG_DCTL_TCTL_1 (0x2UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000020 */ -#define USB_OTG_DCTL_TCTL_2 (0x4UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000040 */ -#define USB_OTG_DCTL_SGINAK_Pos (7U) -#define USB_OTG_DCTL_SGINAK_Msk (0x1UL << USB_OTG_DCTL_SGINAK_Pos) /*!< 0x00000080 */ -#define USB_OTG_DCTL_SGINAK USB_OTG_DCTL_SGINAK_Msk /*!< Set global IN NAK */ -#define USB_OTG_DCTL_CGINAK_Pos (8U) -#define USB_OTG_DCTL_CGINAK_Msk (0x1UL << USB_OTG_DCTL_CGINAK_Pos) /*!< 0x00000100 */ -#define USB_OTG_DCTL_CGINAK USB_OTG_DCTL_CGINAK_Msk /*!< Clear global IN NAK */ -#define USB_OTG_DCTL_SGONAK_Pos (9U) -#define USB_OTG_DCTL_SGONAK_Msk (0x1UL << USB_OTG_DCTL_SGONAK_Pos) /*!< 0x00000200 */ -#define USB_OTG_DCTL_SGONAK USB_OTG_DCTL_SGONAK_Msk /*!< Set global OUT NAK */ -#define USB_OTG_DCTL_CGONAK_Pos (10U) -#define USB_OTG_DCTL_CGONAK_Msk (0x1UL << USB_OTG_DCTL_CGONAK_Pos) /*!< 0x00000400 */ -#define USB_OTG_DCTL_CGONAK USB_OTG_DCTL_CGONAK_Msk /*!< Clear global OUT NAK */ -#define USB_OTG_DCTL_POPRGDNE_Pos (11U) -#define USB_OTG_DCTL_POPRGDNE_Msk (0x1UL << USB_OTG_DCTL_POPRGDNE_Pos) /*!< 0x00000800 */ -#define USB_OTG_DCTL_POPRGDNE USB_OTG_DCTL_POPRGDNE_Msk /*!< Power-on programming done */ - -/******************** Bit definition for USB_OTG_HFIR register ********************/ -#define USB_OTG_HFIR_FRIVL_Pos (0U) -#define USB_OTG_HFIR_FRIVL_Msk (0xFFFFUL << USB_OTG_HFIR_FRIVL_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_HFIR_FRIVL USB_OTG_HFIR_FRIVL_Msk /*!< Frame interval */ - -/******************** Bit definition for USB_OTG_HFNUM register ********************/ -#define USB_OTG_HFNUM_FRNUM_Pos (0U) -#define USB_OTG_HFNUM_FRNUM_Msk (0xFFFFUL << USB_OTG_HFNUM_FRNUM_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_HFNUM_FRNUM USB_OTG_HFNUM_FRNUM_Msk /*!< Frame number */ -#define USB_OTG_HFNUM_FTREM_Pos (16U) -#define USB_OTG_HFNUM_FTREM_Msk (0xFFFFUL << USB_OTG_HFNUM_FTREM_Pos) /*!< 0xFFFF0000 */ -#define USB_OTG_HFNUM_FTREM USB_OTG_HFNUM_FTREM_Msk /*!< Frame time remaining */ - -/******************** Bit definition for USB_OTG_DSTS register ********************/ -#define USB_OTG_DSTS_SUSPSTS_Pos (0U) -#define USB_OTG_DSTS_SUSPSTS_Msk (0x1UL << USB_OTG_DSTS_SUSPSTS_Pos) /*!< 0x00000001 */ -#define USB_OTG_DSTS_SUSPSTS USB_OTG_DSTS_SUSPSTS_Msk /*!< Suspend status */ - -#define USB_OTG_DSTS_ENUMSPD_Pos (1U) -#define USB_OTG_DSTS_ENUMSPD_Msk (0x3UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000006 */ -#define USB_OTG_DSTS_ENUMSPD USB_OTG_DSTS_ENUMSPD_Msk /*!< Enumerated speed */ -#define USB_OTG_DSTS_ENUMSPD_0 (0x1UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000002 */ -#define USB_OTG_DSTS_ENUMSPD_1 (0x2UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000004 */ -#define USB_OTG_DSTS_EERR_Pos (3U) -#define USB_OTG_DSTS_EERR_Msk (0x1UL << USB_OTG_DSTS_EERR_Pos) /*!< 0x00000008 */ -#define USB_OTG_DSTS_EERR USB_OTG_DSTS_EERR_Msk /*!< Erratic error */ -#define USB_OTG_DSTS_FNSOF_Pos (8U) -#define USB_OTG_DSTS_FNSOF_Msk (0x3FFFUL << USB_OTG_DSTS_FNSOF_Pos) /*!< 0x003FFF00 */ -#define USB_OTG_DSTS_FNSOF USB_OTG_DSTS_FNSOF_Msk /*!< Frame number of the received SOF */ - -/******************** Bit definition for USB_OTG_GAHBCFG register ********************/ -#define USB_OTG_GAHBCFG_GINT_Pos (0U) -#define USB_OTG_GAHBCFG_GINT_Msk (0x1UL << USB_OTG_GAHBCFG_GINT_Pos) /*!< 0x00000001 */ -#define USB_OTG_GAHBCFG_GINT USB_OTG_GAHBCFG_GINT_Msk /*!< Global interrupt mask */ -#define USB_OTG_GAHBCFG_HBSTLEN_Pos (1U) -#define USB_OTG_GAHBCFG_HBSTLEN_Msk (0xFUL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< 0x0000001E */ -#define USB_OTG_GAHBCFG_HBSTLEN USB_OTG_GAHBCFG_HBSTLEN_Msk /*!< Burst length/type */ -#define USB_OTG_GAHBCFG_HBSTLEN_0 (0x0UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< Single */ -#define USB_OTG_GAHBCFG_HBSTLEN_1 (0x1UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR */ -#define USB_OTG_GAHBCFG_HBSTLEN_2 (0x3UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR4 */ -#define USB_OTG_GAHBCFG_HBSTLEN_3 (0x5UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR8 */ -#define USB_OTG_GAHBCFG_HBSTLEN_4 (0x7UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR16 */ -#define USB_OTG_GAHBCFG_DMAEN_Pos (5U) -#define USB_OTG_GAHBCFG_DMAEN_Msk (0x1UL << USB_OTG_GAHBCFG_DMAEN_Pos) /*!< 0x00000020 */ -#define USB_OTG_GAHBCFG_DMAEN USB_OTG_GAHBCFG_DMAEN_Msk /*!< DMA enable */ -#define USB_OTG_GAHBCFG_TXFELVL_Pos (7U) -#define USB_OTG_GAHBCFG_TXFELVL_Msk (0x1UL << USB_OTG_GAHBCFG_TXFELVL_Pos) /*!< 0x00000080 */ -#define USB_OTG_GAHBCFG_TXFELVL USB_OTG_GAHBCFG_TXFELVL_Msk /*!< TxFIFO empty level */ -#define USB_OTG_GAHBCFG_PTXFELVL_Pos (8U) -#define USB_OTG_GAHBCFG_PTXFELVL_Msk (0x1UL << USB_OTG_GAHBCFG_PTXFELVL_Pos) /*!< 0x00000100 */ -#define USB_OTG_GAHBCFG_PTXFELVL USB_OTG_GAHBCFG_PTXFELVL_Msk /*!< Periodic TxFIFO empty level */ - -/******************** Bit definition for USB_OTG_GUSBCFG register ********************/ - -#define USB_OTG_GUSBCFG_TOCAL_Pos (0U) -#define USB_OTG_GUSBCFG_TOCAL_Msk (0x7UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000007 */ -#define USB_OTG_GUSBCFG_TOCAL USB_OTG_GUSBCFG_TOCAL_Msk /*!< FS timeout calibration */ -#define USB_OTG_GUSBCFG_TOCAL_0 (0x1UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000001 */ -#define USB_OTG_GUSBCFG_TOCAL_1 (0x2UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000002 */ -#define USB_OTG_GUSBCFG_TOCAL_2 (0x4UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000004 */ -#define USB_OTG_GUSBCFG_PHYSEL_Pos (6U) -#define USB_OTG_GUSBCFG_PHYSEL_Msk (0x1UL << USB_OTG_GUSBCFG_PHYSEL_Pos) /*!< 0x00000040 */ -#define USB_OTG_GUSBCFG_PHYSEL USB_OTG_GUSBCFG_PHYSEL_Msk /*!< USB 2.0 high-speed ULPI PHY or USB 1.1 full-speed serial transceiver select */ -#define USB_OTG_GUSBCFG_SRPCAP_Pos (8U) -#define USB_OTG_GUSBCFG_SRPCAP_Msk (0x1UL << USB_OTG_GUSBCFG_SRPCAP_Pos) /*!< 0x00000100 */ -#define USB_OTG_GUSBCFG_SRPCAP USB_OTG_GUSBCFG_SRPCAP_Msk /*!< SRP-capable */ -#define USB_OTG_GUSBCFG_HNPCAP_Pos (9U) -#define USB_OTG_GUSBCFG_HNPCAP_Msk (0x1UL << USB_OTG_GUSBCFG_HNPCAP_Pos) /*!< 0x00000200 */ -#define USB_OTG_GUSBCFG_HNPCAP USB_OTG_GUSBCFG_HNPCAP_Msk /*!< HNP-capable */ -#define USB_OTG_GUSBCFG_TRDT_Pos (10U) -#define USB_OTG_GUSBCFG_TRDT_Msk (0xFUL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00003C00 */ -#define USB_OTG_GUSBCFG_TRDT USB_OTG_GUSBCFG_TRDT_Msk /*!< USB turnaround time */ -#define USB_OTG_GUSBCFG_TRDT_0 (0x1UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00000400 */ -#define USB_OTG_GUSBCFG_TRDT_1 (0x2UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00000800 */ -#define USB_OTG_GUSBCFG_TRDT_2 (0x4UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00001000 */ -#define USB_OTG_GUSBCFG_TRDT_3 (0x8UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00002000 */ -#define USB_OTG_GUSBCFG_PHYLPCS_Pos (15U) -#define USB_OTG_GUSBCFG_PHYLPCS_Msk (0x1UL << USB_OTG_GUSBCFG_PHYLPCS_Pos) /*!< 0x00008000 */ -#define USB_OTG_GUSBCFG_PHYLPCS USB_OTG_GUSBCFG_PHYLPCS_Msk /*!< PHY Low-power clock select */ -#define USB_OTG_GUSBCFG_ULPIFSLS_Pos (17U) -#define USB_OTG_GUSBCFG_ULPIFSLS_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIFSLS_Pos) /*!< 0x00020000 */ -#define USB_OTG_GUSBCFG_ULPIFSLS USB_OTG_GUSBCFG_ULPIFSLS_Msk /*!< ULPI FS/LS select */ -#define USB_OTG_GUSBCFG_ULPIAR_Pos (18U) -#define USB_OTG_GUSBCFG_ULPIAR_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIAR_Pos) /*!< 0x00040000 */ -#define USB_OTG_GUSBCFG_ULPIAR USB_OTG_GUSBCFG_ULPIAR_Msk /*!< ULPI Auto-resume */ -#define USB_OTG_GUSBCFG_ULPICSM_Pos (19U) -#define USB_OTG_GUSBCFG_ULPICSM_Msk (0x1UL << USB_OTG_GUSBCFG_ULPICSM_Pos) /*!< 0x00080000 */ -#define USB_OTG_GUSBCFG_ULPICSM USB_OTG_GUSBCFG_ULPICSM_Msk /*!< ULPI Clock SuspendM */ -#define USB_OTG_GUSBCFG_ULPIEVBUSD_Pos (20U) -#define USB_OTG_GUSBCFG_ULPIEVBUSD_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIEVBUSD_Pos) /*!< 0x00100000 */ -#define USB_OTG_GUSBCFG_ULPIEVBUSD USB_OTG_GUSBCFG_ULPIEVBUSD_Msk /*!< ULPI External VBUS Drive */ -#define USB_OTG_GUSBCFG_ULPIEVBUSI_Pos (21U) -#define USB_OTG_GUSBCFG_ULPIEVBUSI_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIEVBUSI_Pos) /*!< 0x00200000 */ -#define USB_OTG_GUSBCFG_ULPIEVBUSI USB_OTG_GUSBCFG_ULPIEVBUSI_Msk /*!< ULPI external VBUS indicator */ -#define USB_OTG_GUSBCFG_TSDPS_Pos (22U) -#define USB_OTG_GUSBCFG_TSDPS_Msk (0x1UL << USB_OTG_GUSBCFG_TSDPS_Pos) /*!< 0x00400000 */ -#define USB_OTG_GUSBCFG_TSDPS USB_OTG_GUSBCFG_TSDPS_Msk /*!< TermSel DLine pulsing selection */ -#define USB_OTG_GUSBCFG_PCCI_Pos (23U) -#define USB_OTG_GUSBCFG_PCCI_Msk (0x1UL << USB_OTG_GUSBCFG_PCCI_Pos) /*!< 0x00800000 */ -#define USB_OTG_GUSBCFG_PCCI USB_OTG_GUSBCFG_PCCI_Msk /*!< Indicator complement */ -#define USB_OTG_GUSBCFG_PTCI_Pos (24U) -#define USB_OTG_GUSBCFG_PTCI_Msk (0x1UL << USB_OTG_GUSBCFG_PTCI_Pos) /*!< 0x01000000 */ -#define USB_OTG_GUSBCFG_PTCI USB_OTG_GUSBCFG_PTCI_Msk /*!< Indicator pass through */ -#define USB_OTG_GUSBCFG_ULPIIPD_Pos (25U) -#define USB_OTG_GUSBCFG_ULPIIPD_Msk (0x1UL << USB_OTG_GUSBCFG_ULPIIPD_Pos) /*!< 0x02000000 */ -#define USB_OTG_GUSBCFG_ULPIIPD USB_OTG_GUSBCFG_ULPIIPD_Msk /*!< ULPI interface protect disable */ -#define USB_OTG_GUSBCFG_FHMOD_Pos (29U) -#define USB_OTG_GUSBCFG_FHMOD_Msk (0x1UL << USB_OTG_GUSBCFG_FHMOD_Pos) /*!< 0x20000000 */ -#define USB_OTG_GUSBCFG_FHMOD USB_OTG_GUSBCFG_FHMOD_Msk /*!< Forced host mode */ -#define USB_OTG_GUSBCFG_FDMOD_Pos (30U) -#define USB_OTG_GUSBCFG_FDMOD_Msk (0x1UL << USB_OTG_GUSBCFG_FDMOD_Pos) /*!< 0x40000000 */ -#define USB_OTG_GUSBCFG_FDMOD USB_OTG_GUSBCFG_FDMOD_Msk /*!< Forced peripheral mode */ -#define USB_OTG_GUSBCFG_CTXPKT_Pos (31U) -#define USB_OTG_GUSBCFG_CTXPKT_Msk (0x1UL << USB_OTG_GUSBCFG_CTXPKT_Pos) /*!< 0x80000000 */ -#define USB_OTG_GUSBCFG_CTXPKT USB_OTG_GUSBCFG_CTXPKT_Msk /*!< Corrupt Tx packet */ - -/******************** Bit definition for USB_OTG_GRSTCTL register ********************/ -#define USB_OTG_GRSTCTL_CSRST_Pos (0U) -#define USB_OTG_GRSTCTL_CSRST_Msk (0x1UL << USB_OTG_GRSTCTL_CSRST_Pos) /*!< 0x00000001 */ -#define USB_OTG_GRSTCTL_CSRST USB_OTG_GRSTCTL_CSRST_Msk /*!< Core soft reset */ -#define USB_OTG_GRSTCTL_HSRST_Pos (1U) -#define USB_OTG_GRSTCTL_HSRST_Msk (0x1UL << USB_OTG_GRSTCTL_HSRST_Pos) /*!< 0x00000002 */ -#define USB_OTG_GRSTCTL_HSRST USB_OTG_GRSTCTL_HSRST_Msk /*!< HCLK soft reset */ -#define USB_OTG_GRSTCTL_FCRST_Pos (2U) -#define USB_OTG_GRSTCTL_FCRST_Msk (0x1UL << USB_OTG_GRSTCTL_FCRST_Pos) /*!< 0x00000004 */ -#define USB_OTG_GRSTCTL_FCRST USB_OTG_GRSTCTL_FCRST_Msk /*!< Host frame counter reset */ -#define USB_OTG_GRSTCTL_RXFFLSH_Pos (4U) -#define USB_OTG_GRSTCTL_RXFFLSH_Msk (0x1UL << USB_OTG_GRSTCTL_RXFFLSH_Pos) /*!< 0x00000010 */ -#define USB_OTG_GRSTCTL_RXFFLSH USB_OTG_GRSTCTL_RXFFLSH_Msk /*!< RxFIFO flush */ -#define USB_OTG_GRSTCTL_TXFFLSH_Pos (5U) -#define USB_OTG_GRSTCTL_TXFFLSH_Msk (0x1UL << USB_OTG_GRSTCTL_TXFFLSH_Pos) /*!< 0x00000020 */ -#define USB_OTG_GRSTCTL_TXFFLSH USB_OTG_GRSTCTL_TXFFLSH_Msk /*!< TxFIFO flush */ - - -#define USB_OTG_GRSTCTL_TXFNUM_Pos (6U) -#define USB_OTG_GRSTCTL_TXFNUM_Msk (0x1FUL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x000007C0 */ -#define USB_OTG_GRSTCTL_TXFNUM USB_OTG_GRSTCTL_TXFNUM_Msk /*!< TxFIFO number */ -#define USB_OTG_GRSTCTL_TXFNUM_0 (0x01UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000040 */ -#define USB_OTG_GRSTCTL_TXFNUM_1 (0x02UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000080 */ -#define USB_OTG_GRSTCTL_TXFNUM_2 (0x04UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000100 */ -#define USB_OTG_GRSTCTL_TXFNUM_3 (0x08UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000200 */ -#define USB_OTG_GRSTCTL_TXFNUM_4 (0x10UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000400 */ -#define USB_OTG_GRSTCTL_DMAREQ_Pos (30U) -#define USB_OTG_GRSTCTL_DMAREQ_Msk (0x1UL << USB_OTG_GRSTCTL_DMAREQ_Pos) /*!< 0x40000000 */ -#define USB_OTG_GRSTCTL_DMAREQ USB_OTG_GRSTCTL_DMAREQ_Msk /*!< DMA request signal */ -#define USB_OTG_GRSTCTL_AHBIDL_Pos (31U) -#define USB_OTG_GRSTCTL_AHBIDL_Msk (0x1UL << USB_OTG_GRSTCTL_AHBIDL_Pos) /*!< 0x80000000 */ -#define USB_OTG_GRSTCTL_AHBIDL USB_OTG_GRSTCTL_AHBIDL_Msk /*!< AHB master idle */ - -/******************** Bit definition for USB_OTG_DIEPMSK register ********************/ -#define USB_OTG_DIEPMSK_XFRCM_Pos (0U) -#define USB_OTG_DIEPMSK_XFRCM_Msk (0x1UL << USB_OTG_DIEPMSK_XFRCM_Pos) /*!< 0x00000001 */ -#define USB_OTG_DIEPMSK_XFRCM USB_OTG_DIEPMSK_XFRCM_Msk /*!< Transfer completed interrupt mask */ -#define USB_OTG_DIEPMSK_EPDM_Pos (1U) -#define USB_OTG_DIEPMSK_EPDM_Msk (0x1UL << USB_OTG_DIEPMSK_EPDM_Pos) /*!< 0x00000002 */ -#define USB_OTG_DIEPMSK_EPDM USB_OTG_DIEPMSK_EPDM_Msk /*!< Endpoint disabled interrupt mask */ -#define USB_OTG_DIEPMSK_TOM_Pos (3U) -#define USB_OTG_DIEPMSK_TOM_Msk (0x1UL << USB_OTG_DIEPMSK_TOM_Pos) /*!< 0x00000008 */ -#define USB_OTG_DIEPMSK_TOM USB_OTG_DIEPMSK_TOM_Msk /*!< Timeout condition mask (nonisochronous endpoints) */ -#define USB_OTG_DIEPMSK_ITTXFEMSK_Pos (4U) -#define USB_OTG_DIEPMSK_ITTXFEMSK_Msk (0x1UL << USB_OTG_DIEPMSK_ITTXFEMSK_Pos) /*!< 0x00000010 */ -#define USB_OTG_DIEPMSK_ITTXFEMSK USB_OTG_DIEPMSK_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */ -#define USB_OTG_DIEPMSK_INEPNMM_Pos (5U) -#define USB_OTG_DIEPMSK_INEPNMM_Msk (0x1UL << USB_OTG_DIEPMSK_INEPNMM_Pos) /*!< 0x00000020 */ -#define USB_OTG_DIEPMSK_INEPNMM USB_OTG_DIEPMSK_INEPNMM_Msk /*!< IN token received with EP mismatch mask */ -#define USB_OTG_DIEPMSK_INEPNEM_Pos (6U) -#define USB_OTG_DIEPMSK_INEPNEM_Msk (0x1UL << USB_OTG_DIEPMSK_INEPNEM_Pos) /*!< 0x00000040 */ -#define USB_OTG_DIEPMSK_INEPNEM USB_OTG_DIEPMSK_INEPNEM_Msk /*!< IN endpoint NAK effective mask */ -#define USB_OTG_DIEPMSK_TXFURM_Pos (8U) -#define USB_OTG_DIEPMSK_TXFURM_Msk (0x1UL << USB_OTG_DIEPMSK_TXFURM_Pos) /*!< 0x00000100 */ -#define USB_OTG_DIEPMSK_TXFURM USB_OTG_DIEPMSK_TXFURM_Msk /*!< FIFO underrun mask */ -#define USB_OTG_DIEPMSK_BIM_Pos (9U) -#define USB_OTG_DIEPMSK_BIM_Msk (0x1UL << USB_OTG_DIEPMSK_BIM_Pos) /*!< 0x00000200 */ -#define USB_OTG_DIEPMSK_BIM USB_OTG_DIEPMSK_BIM_Msk /*!< BNA interrupt mask */ - -/******************** Bit definition for USB_OTG_HPTXSTS register ********************/ -#define USB_OTG_HPTXSTS_PTXFSAVL_Pos (0U) -#define USB_OTG_HPTXSTS_PTXFSAVL_Msk (0xFFFFUL << USB_OTG_HPTXSTS_PTXFSAVL_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_HPTXSTS_PTXFSAVL USB_OTG_HPTXSTS_PTXFSAVL_Msk /*!< Periodic transmit data FIFO space available */ -#define USB_OTG_HPTXSTS_PTXQSAV_Pos (16U) -#define USB_OTG_HPTXSTS_PTXQSAV_Msk (0xFFUL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00FF0000 */ -#define USB_OTG_HPTXSTS_PTXQSAV USB_OTG_HPTXSTS_PTXQSAV_Msk /*!< Periodic transmit request queue space available */ -#define USB_OTG_HPTXSTS_PTXQSAV_0 (0x01UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00010000 */ -#define USB_OTG_HPTXSTS_PTXQSAV_1 (0x02UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00020000 */ -#define USB_OTG_HPTXSTS_PTXQSAV_2 (0x04UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00040000 */ -#define USB_OTG_HPTXSTS_PTXQSAV_3 (0x08UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00080000 */ -#define USB_OTG_HPTXSTS_PTXQSAV_4 (0x10UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00100000 */ -#define USB_OTG_HPTXSTS_PTXQSAV_5 (0x20UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00200000 */ -#define USB_OTG_HPTXSTS_PTXQSAV_6 (0x40UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00400000 */ -#define USB_OTG_HPTXSTS_PTXQSAV_7 (0x80UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00800000 */ - -#define USB_OTG_HPTXSTS_PTXQTOP_Pos (24U) -#define USB_OTG_HPTXSTS_PTXQTOP_Msk (0xFFUL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0xFF000000 */ -#define USB_OTG_HPTXSTS_PTXQTOP USB_OTG_HPTXSTS_PTXQTOP_Msk /*!< Top of the periodic transmit request queue */ -#define USB_OTG_HPTXSTS_PTXQTOP_0 (0x01UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x01000000 */ -#define USB_OTG_HPTXSTS_PTXQTOP_1 (0x02UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x02000000 */ -#define USB_OTG_HPTXSTS_PTXQTOP_2 (0x04UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x04000000 */ -#define USB_OTG_HPTXSTS_PTXQTOP_3 (0x08UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x08000000 */ -#define USB_OTG_HPTXSTS_PTXQTOP_4 (0x10UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x10000000 */ -#define USB_OTG_HPTXSTS_PTXQTOP_5 (0x20UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x20000000 */ -#define USB_OTG_HPTXSTS_PTXQTOP_6 (0x40UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x40000000 */ -#define USB_OTG_HPTXSTS_PTXQTOP_7 (0x80UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x80000000 */ - -/******************** Bit definition for USB_OTG_HAINT register ********************/ -#define USB_OTG_HAINT_HAINT_Pos (0U) -#define USB_OTG_HAINT_HAINT_Msk (0xFFFFUL << USB_OTG_HAINT_HAINT_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_HAINT_HAINT USB_OTG_HAINT_HAINT_Msk /*!< Channel interrupts */ - -/******************** Bit definition for USB_OTG_DOEPMSK register ********************/ -#define USB_OTG_DOEPMSK_XFRCM_Pos (0U) -#define USB_OTG_DOEPMSK_XFRCM_Msk (0x1UL << USB_OTG_DOEPMSK_XFRCM_Pos) /*!< 0x00000001 */ -#define USB_OTG_DOEPMSK_XFRCM USB_OTG_DOEPMSK_XFRCM_Msk /*!< Transfer completed interrupt mask */ -#define USB_OTG_DOEPMSK_EPDM_Pos (1U) -#define USB_OTG_DOEPMSK_EPDM_Msk (0x1UL << USB_OTG_DOEPMSK_EPDM_Pos) /*!< 0x00000002 */ -#define USB_OTG_DOEPMSK_EPDM USB_OTG_DOEPMSK_EPDM_Msk /*!< Endpoint disabled interrupt mask */ -#define USB_OTG_DOEPMSK_AHBERRM_Pos (2U) -#define USB_OTG_DOEPMSK_AHBERRM_Msk (0x1UL << USB_OTG_DOEPMSK_AHBERRM_Pos) /*!< 0x00000004 */ -#define USB_OTG_DOEPMSK_AHBERRM USB_OTG_DOEPMSK_AHBERRM_Msk /*!< OUT transaction AHB Error interrupt mask */ -#define USB_OTG_DOEPMSK_STUPM_Pos (3U) -#define USB_OTG_DOEPMSK_STUPM_Msk (0x1UL << USB_OTG_DOEPMSK_STUPM_Pos) /*!< 0x00000008 */ -#define USB_OTG_DOEPMSK_STUPM USB_OTG_DOEPMSK_STUPM_Msk /*!< SETUP phase done mask */ -#define USB_OTG_DOEPMSK_OTEPDM_Pos (4U) -#define USB_OTG_DOEPMSK_OTEPDM_Msk (0x1UL << USB_OTG_DOEPMSK_OTEPDM_Pos) /*!< 0x00000010 */ -#define USB_OTG_DOEPMSK_OTEPDM USB_OTG_DOEPMSK_OTEPDM_Msk /*!< OUT token received when endpoint disabled mask */ -#define USB_OTG_DOEPMSK_OTEPSPRM_Pos (5U) -#define USB_OTG_DOEPMSK_OTEPSPRM_Msk (0x1UL << USB_OTG_DOEPMSK_OTEPSPRM_Pos) /*!< 0x00000020 */ -#define USB_OTG_DOEPMSK_OTEPSPRM USB_OTG_DOEPMSK_OTEPSPRM_Msk /*!< Status Phase Received mask */ -#define USB_OTG_DOEPMSK_B2BSTUP_Pos (6U) -#define USB_OTG_DOEPMSK_B2BSTUP_Msk (0x1UL << USB_OTG_DOEPMSK_B2BSTUP_Pos) /*!< 0x00000040 */ -#define USB_OTG_DOEPMSK_B2BSTUP USB_OTG_DOEPMSK_B2BSTUP_Msk /*!< Back-to-back SETUP packets received mask */ -#define USB_OTG_DOEPMSK_OPEM_Pos (8U) -#define USB_OTG_DOEPMSK_OPEM_Msk (0x1UL << USB_OTG_DOEPMSK_OPEM_Pos) /*!< 0x00000100 */ -#define USB_OTG_DOEPMSK_OPEM USB_OTG_DOEPMSK_OPEM_Msk /*!< OUT packet error mask */ -#define USB_OTG_DOEPMSK_BOIM_Pos (9U) -#define USB_OTG_DOEPMSK_BOIM_Msk (0x1UL << USB_OTG_DOEPMSK_BOIM_Pos) /*!< 0x00000200 */ -#define USB_OTG_DOEPMSK_BOIM USB_OTG_DOEPMSK_BOIM_Msk /*!< BNA interrupt mask */ -#define USB_OTG_DOEPMSK_BERRM_Pos (12U) -#define USB_OTG_DOEPMSK_BERRM_Msk (0x1UL << USB_OTG_DOEPMSK_BERRM_Pos) /*!< 0x00001000 */ -#define USB_OTG_DOEPMSK_BERRM USB_OTG_DOEPMSK_BERRM_Msk /*!< Babble error interrupt mask */ -#define USB_OTG_DOEPMSK_NAKM_Pos (13U) -#define USB_OTG_DOEPMSK_NAKM_Msk (0x1UL << USB_OTG_DOEPMSK_NAKM_Pos) /*!< 0x00002000 */ -#define USB_OTG_DOEPMSK_NAKM USB_OTG_DOEPMSK_NAKM_Msk /*!< OUT Packet NAK interrupt mask */ -#define USB_OTG_DOEPMSK_NYETM_Pos (14U) -#define USB_OTG_DOEPMSK_NYETM_Msk (0x1UL << USB_OTG_DOEPMSK_NYETM_Pos) /*!< 0x00004000 */ -#define USB_OTG_DOEPMSK_NYETM USB_OTG_DOEPMSK_NYETM_Msk /*!< NYET interrupt mask */ -/******************** Bit definition for USB_OTG_GINTSTS register ********************/ -#define USB_OTG_GINTSTS_CMOD_Pos (0U) -#define USB_OTG_GINTSTS_CMOD_Msk (0x1UL << USB_OTG_GINTSTS_CMOD_Pos) /*!< 0x00000001 */ -#define USB_OTG_GINTSTS_CMOD USB_OTG_GINTSTS_CMOD_Msk /*!< Current mode of operation */ -#define USB_OTG_GINTSTS_MMIS_Pos (1U) -#define USB_OTG_GINTSTS_MMIS_Msk (0x1UL << USB_OTG_GINTSTS_MMIS_Pos) /*!< 0x00000002 */ -#define USB_OTG_GINTSTS_MMIS USB_OTG_GINTSTS_MMIS_Msk /*!< Mode mismatch interrupt */ -#define USB_OTG_GINTSTS_OTGINT_Pos (2U) -#define USB_OTG_GINTSTS_OTGINT_Msk (0x1UL << USB_OTG_GINTSTS_OTGINT_Pos) /*!< 0x00000004 */ -#define USB_OTG_GINTSTS_OTGINT USB_OTG_GINTSTS_OTGINT_Msk /*!< OTG interrupt */ -#define USB_OTG_GINTSTS_SOF_Pos (3U) -#define USB_OTG_GINTSTS_SOF_Msk (0x1UL << USB_OTG_GINTSTS_SOF_Pos) /*!< 0x00000008 */ -#define USB_OTG_GINTSTS_SOF USB_OTG_GINTSTS_SOF_Msk /*!< Start of frame */ -#define USB_OTG_GINTSTS_RXFLVL_Pos (4U) -#define USB_OTG_GINTSTS_RXFLVL_Msk (0x1UL << USB_OTG_GINTSTS_RXFLVL_Pos) /*!< 0x00000010 */ -#define USB_OTG_GINTSTS_RXFLVL USB_OTG_GINTSTS_RXFLVL_Msk /*!< RxFIFO nonempty */ -#define USB_OTG_GINTSTS_NPTXFE_Pos (5U) -#define USB_OTG_GINTSTS_NPTXFE_Msk (0x1UL << USB_OTG_GINTSTS_NPTXFE_Pos) /*!< 0x00000020 */ -#define USB_OTG_GINTSTS_NPTXFE USB_OTG_GINTSTS_NPTXFE_Msk /*!< Nonperiodic TxFIFO empty */ -#define USB_OTG_GINTSTS_GINAKEFF_Pos (6U) -#define USB_OTG_GINTSTS_GINAKEFF_Msk (0x1UL << USB_OTG_GINTSTS_GINAKEFF_Pos) /*!< 0x00000040 */ -#define USB_OTG_GINTSTS_GINAKEFF USB_OTG_GINTSTS_GINAKEFF_Msk /*!< Global IN nonperiodic NAK effective */ -#define USB_OTG_GINTSTS_BOUTNAKEFF_Pos (7U) -#define USB_OTG_GINTSTS_BOUTNAKEFF_Msk (0x1UL << USB_OTG_GINTSTS_BOUTNAKEFF_Pos) /*!< 0x00000080 */ -#define USB_OTG_GINTSTS_BOUTNAKEFF USB_OTG_GINTSTS_BOUTNAKEFF_Msk /*!< Global OUT NAK effective */ -#define USB_OTG_GINTSTS_ESUSP_Pos (10U) -#define USB_OTG_GINTSTS_ESUSP_Msk (0x1UL << USB_OTG_GINTSTS_ESUSP_Pos) /*!< 0x00000400 */ -#define USB_OTG_GINTSTS_ESUSP USB_OTG_GINTSTS_ESUSP_Msk /*!< Early suspend */ -#define USB_OTG_GINTSTS_USBSUSP_Pos (11U) -#define USB_OTG_GINTSTS_USBSUSP_Msk (0x1UL << USB_OTG_GINTSTS_USBSUSP_Pos) /*!< 0x00000800 */ -#define USB_OTG_GINTSTS_USBSUSP USB_OTG_GINTSTS_USBSUSP_Msk /*!< USB suspend */ -#define USB_OTG_GINTSTS_USBRST_Pos (12U) -#define USB_OTG_GINTSTS_USBRST_Msk (0x1UL << USB_OTG_GINTSTS_USBRST_Pos) /*!< 0x00001000 */ -#define USB_OTG_GINTSTS_USBRST USB_OTG_GINTSTS_USBRST_Msk /*!< USB reset */ -#define USB_OTG_GINTSTS_ENUMDNE_Pos (13U) -#define USB_OTG_GINTSTS_ENUMDNE_Msk (0x1UL << USB_OTG_GINTSTS_ENUMDNE_Pos) /*!< 0x00002000 */ -#define USB_OTG_GINTSTS_ENUMDNE USB_OTG_GINTSTS_ENUMDNE_Msk /*!< Enumeration done */ -#define USB_OTG_GINTSTS_ISOODRP_Pos (14U) -#define USB_OTG_GINTSTS_ISOODRP_Msk (0x1UL << USB_OTG_GINTSTS_ISOODRP_Pos) /*!< 0x00004000 */ -#define USB_OTG_GINTSTS_ISOODRP USB_OTG_GINTSTS_ISOODRP_Msk /*!< Isochronous OUT packet dropped interrupt */ -#define USB_OTG_GINTSTS_EOPF_Pos (15U) -#define USB_OTG_GINTSTS_EOPF_Msk (0x1UL << USB_OTG_GINTSTS_EOPF_Pos) /*!< 0x00008000 */ -#define USB_OTG_GINTSTS_EOPF USB_OTG_GINTSTS_EOPF_Msk /*!< End of periodic frame interrupt */ -#define USB_OTG_GINTSTS_IEPINT_Pos (18U) -#define USB_OTG_GINTSTS_IEPINT_Msk (0x1UL << USB_OTG_GINTSTS_IEPINT_Pos) /*!< 0x00040000 */ -#define USB_OTG_GINTSTS_IEPINT USB_OTG_GINTSTS_IEPINT_Msk /*!< IN endpoint interrupt */ -#define USB_OTG_GINTSTS_OEPINT_Pos (19U) -#define USB_OTG_GINTSTS_OEPINT_Msk (0x1UL << USB_OTG_GINTSTS_OEPINT_Pos) /*!< 0x00080000 */ -#define USB_OTG_GINTSTS_OEPINT USB_OTG_GINTSTS_OEPINT_Msk /*!< OUT endpoint interrupt */ -#define USB_OTG_GINTSTS_IISOIXFR_Pos (20U) -#define USB_OTG_GINTSTS_IISOIXFR_Msk (0x1UL << USB_OTG_GINTSTS_IISOIXFR_Pos) /*!< 0x00100000 */ -#define USB_OTG_GINTSTS_IISOIXFR USB_OTG_GINTSTS_IISOIXFR_Msk /*!< Incomplete isochronous IN transfer */ -#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos (21U) -#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk (0x1UL << USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos) /*!< 0x00200000 */ -#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk /*!< Incomplete periodic transfer */ -#define USB_OTG_GINTSTS_DATAFSUSP_Pos (22U) -#define USB_OTG_GINTSTS_DATAFSUSP_Msk (0x1UL << USB_OTG_GINTSTS_DATAFSUSP_Pos) /*!< 0x00400000 */ -#define USB_OTG_GINTSTS_DATAFSUSP USB_OTG_GINTSTS_DATAFSUSP_Msk /*!< Data fetch suspended */ -#define USB_OTG_GINTSTS_HPRTINT_Pos (24U) -#define USB_OTG_GINTSTS_HPRTINT_Msk (0x1UL << USB_OTG_GINTSTS_HPRTINT_Pos) /*!< 0x01000000 */ -#define USB_OTG_GINTSTS_HPRTINT USB_OTG_GINTSTS_HPRTINT_Msk /*!< Host port interrupt */ -#define USB_OTG_GINTSTS_HCINT_Pos (25U) -#define USB_OTG_GINTSTS_HCINT_Msk (0x1UL << USB_OTG_GINTSTS_HCINT_Pos) /*!< 0x02000000 */ -#define USB_OTG_GINTSTS_HCINT USB_OTG_GINTSTS_HCINT_Msk /*!< Host channels interrupt */ -#define USB_OTG_GINTSTS_PTXFE_Pos (26U) -#define USB_OTG_GINTSTS_PTXFE_Msk (0x1UL << USB_OTG_GINTSTS_PTXFE_Pos) /*!< 0x04000000 */ -#define USB_OTG_GINTSTS_PTXFE USB_OTG_GINTSTS_PTXFE_Msk /*!< Periodic TxFIFO empty */ -#define USB_OTG_GINTSTS_CIDSCHG_Pos (28U) -#define USB_OTG_GINTSTS_CIDSCHG_Msk (0x1UL << USB_OTG_GINTSTS_CIDSCHG_Pos) /*!< 0x10000000 */ -#define USB_OTG_GINTSTS_CIDSCHG USB_OTG_GINTSTS_CIDSCHG_Msk /*!< Connector ID status change */ -#define USB_OTG_GINTSTS_DISCINT_Pos (29U) -#define USB_OTG_GINTSTS_DISCINT_Msk (0x1UL << USB_OTG_GINTSTS_DISCINT_Pos) /*!< 0x20000000 */ -#define USB_OTG_GINTSTS_DISCINT USB_OTG_GINTSTS_DISCINT_Msk /*!< Disconnect detected interrupt */ -#define USB_OTG_GINTSTS_SRQINT_Pos (30U) -#define USB_OTG_GINTSTS_SRQINT_Msk (0x1UL << USB_OTG_GINTSTS_SRQINT_Pos) /*!< 0x40000000 */ -#define USB_OTG_GINTSTS_SRQINT USB_OTG_GINTSTS_SRQINT_Msk /*!< Session request/new session detected interrupt */ -#define USB_OTG_GINTSTS_WKUINT_Pos (31U) -#define USB_OTG_GINTSTS_WKUINT_Msk (0x1UL << USB_OTG_GINTSTS_WKUINT_Pos) /*!< 0x80000000 */ -#define USB_OTG_GINTSTS_WKUINT USB_OTG_GINTSTS_WKUINT_Msk /*!< Resume/remote wakeup detected interrupt */ - -/******************** Bit definition for USB_OTG_GINTMSK register ********************/ -#define USB_OTG_GINTMSK_MMISM_Pos (1U) -#define USB_OTG_GINTMSK_MMISM_Msk (0x1UL << USB_OTG_GINTMSK_MMISM_Pos) /*!< 0x00000002 */ -#define USB_OTG_GINTMSK_MMISM USB_OTG_GINTMSK_MMISM_Msk /*!< Mode mismatch interrupt mask */ -#define USB_OTG_GINTMSK_OTGINT_Pos (2U) -#define USB_OTG_GINTMSK_OTGINT_Msk (0x1UL << USB_OTG_GINTMSK_OTGINT_Pos) /*!< 0x00000004 */ -#define USB_OTG_GINTMSK_OTGINT USB_OTG_GINTMSK_OTGINT_Msk /*!< OTG interrupt mask */ -#define USB_OTG_GINTMSK_SOFM_Pos (3U) -#define USB_OTG_GINTMSK_SOFM_Msk (0x1UL << USB_OTG_GINTMSK_SOFM_Pos) /*!< 0x00000008 */ -#define USB_OTG_GINTMSK_SOFM USB_OTG_GINTMSK_SOFM_Msk /*!< Start of frame mask */ -#define USB_OTG_GINTMSK_RXFLVLM_Pos (4U) -#define USB_OTG_GINTMSK_RXFLVLM_Msk (0x1UL << USB_OTG_GINTMSK_RXFLVLM_Pos) /*!< 0x00000010 */ -#define USB_OTG_GINTMSK_RXFLVLM USB_OTG_GINTMSK_RXFLVLM_Msk /*!< Receive FIFO nonempty mask */ -#define USB_OTG_GINTMSK_NPTXFEM_Pos (5U) -#define USB_OTG_GINTMSK_NPTXFEM_Msk (0x1UL << USB_OTG_GINTMSK_NPTXFEM_Pos) /*!< 0x00000020 */ -#define USB_OTG_GINTMSK_NPTXFEM USB_OTG_GINTMSK_NPTXFEM_Msk /*!< Nonperiodic TxFIFO empty mask */ -#define USB_OTG_GINTMSK_GINAKEFFM_Pos (6U) -#define USB_OTG_GINTMSK_GINAKEFFM_Msk (0x1UL << USB_OTG_GINTMSK_GINAKEFFM_Pos) /*!< 0x00000040 */ -#define USB_OTG_GINTMSK_GINAKEFFM USB_OTG_GINTMSK_GINAKEFFM_Msk /*!< Global nonperiodic IN NAK effective mask */ -#define USB_OTG_GINTMSK_GONAKEFFM_Pos (7U) -#define USB_OTG_GINTMSK_GONAKEFFM_Msk (0x1UL << USB_OTG_GINTMSK_GONAKEFFM_Pos) /*!< 0x00000080 */ -#define USB_OTG_GINTMSK_GONAKEFFM USB_OTG_GINTMSK_GONAKEFFM_Msk /*!< Global OUT NAK effective mask */ -#define USB_OTG_GINTMSK_ESUSPM_Pos (10U) -#define USB_OTG_GINTMSK_ESUSPM_Msk (0x1UL << USB_OTG_GINTMSK_ESUSPM_Pos) /*!< 0x00000400 */ -#define USB_OTG_GINTMSK_ESUSPM USB_OTG_GINTMSK_ESUSPM_Msk /*!< Early suspend mask */ -#define USB_OTG_GINTMSK_USBSUSPM_Pos (11U) -#define USB_OTG_GINTMSK_USBSUSPM_Msk (0x1UL << USB_OTG_GINTMSK_USBSUSPM_Pos) /*!< 0x00000800 */ -#define USB_OTG_GINTMSK_USBSUSPM USB_OTG_GINTMSK_USBSUSPM_Msk /*!< USB suspend mask */ -#define USB_OTG_GINTMSK_USBRST_Pos (12U) -#define USB_OTG_GINTMSK_USBRST_Msk (0x1UL << USB_OTG_GINTMSK_USBRST_Pos) /*!< 0x00001000 */ -#define USB_OTG_GINTMSK_USBRST USB_OTG_GINTMSK_USBRST_Msk /*!< USB reset mask */ -#define USB_OTG_GINTMSK_ENUMDNEM_Pos (13U) -#define USB_OTG_GINTMSK_ENUMDNEM_Msk (0x1UL << USB_OTG_GINTMSK_ENUMDNEM_Pos) /*!< 0x00002000 */ -#define USB_OTG_GINTMSK_ENUMDNEM USB_OTG_GINTMSK_ENUMDNEM_Msk /*!< Enumeration done mask */ -#define USB_OTG_GINTMSK_ISOODRPM_Pos (14U) -#define USB_OTG_GINTMSK_ISOODRPM_Msk (0x1UL << USB_OTG_GINTMSK_ISOODRPM_Pos) /*!< 0x00004000 */ -#define USB_OTG_GINTMSK_ISOODRPM USB_OTG_GINTMSK_ISOODRPM_Msk /*!< Isochronous OUT packet dropped interrupt mask */ -#define USB_OTG_GINTMSK_EOPFM_Pos (15U) -#define USB_OTG_GINTMSK_EOPFM_Msk (0x1UL << USB_OTG_GINTMSK_EOPFM_Pos) /*!< 0x00008000 */ -#define USB_OTG_GINTMSK_EOPFM USB_OTG_GINTMSK_EOPFM_Msk /*!< End of periodic frame interrupt mask */ -#define USB_OTG_GINTMSK_EPMISM_Pos (17U) -#define USB_OTG_GINTMSK_EPMISM_Msk (0x1UL << USB_OTG_GINTMSK_EPMISM_Pos) /*!< 0x00020000 */ -#define USB_OTG_GINTMSK_EPMISM USB_OTG_GINTMSK_EPMISM_Msk /*!< Endpoint mismatch interrupt mask */ -#define USB_OTG_GINTMSK_IEPINT_Pos (18U) -#define USB_OTG_GINTMSK_IEPINT_Msk (0x1UL << USB_OTG_GINTMSK_IEPINT_Pos) /*!< 0x00040000 */ -#define USB_OTG_GINTMSK_IEPINT USB_OTG_GINTMSK_IEPINT_Msk /*!< IN endpoints interrupt mask */ -#define USB_OTG_GINTMSK_OEPINT_Pos (19U) -#define USB_OTG_GINTMSK_OEPINT_Msk (0x1UL << USB_OTG_GINTMSK_OEPINT_Pos) /*!< 0x00080000 */ -#define USB_OTG_GINTMSK_OEPINT USB_OTG_GINTMSK_OEPINT_Msk /*!< OUT endpoints interrupt mask */ -#define USB_OTG_GINTMSK_IISOIXFRM_Pos (20U) -#define USB_OTG_GINTMSK_IISOIXFRM_Msk (0x1UL << USB_OTG_GINTMSK_IISOIXFRM_Pos) /*!< 0x00100000 */ -#define USB_OTG_GINTMSK_IISOIXFRM USB_OTG_GINTMSK_IISOIXFRM_Msk /*!< Incomplete isochronous IN transfer mask */ -#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos (21U) -#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk (0x1UL << USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos) /*!< 0x00200000 */ -#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk /*!< Incomplete periodic transfer mask */ -#define USB_OTG_GINTMSK_FSUSPM_Pos (22U) -#define USB_OTG_GINTMSK_FSUSPM_Msk (0x1UL << USB_OTG_GINTMSK_FSUSPM_Pos) /*!< 0x00400000 */ -#define USB_OTG_GINTMSK_FSUSPM USB_OTG_GINTMSK_FSUSPM_Msk /*!< Data fetch suspended mask */ -#define USB_OTG_GINTMSK_PRTIM_Pos (24U) -#define USB_OTG_GINTMSK_PRTIM_Msk (0x1UL << USB_OTG_GINTMSK_PRTIM_Pos) /*!< 0x01000000 */ -#define USB_OTG_GINTMSK_PRTIM USB_OTG_GINTMSK_PRTIM_Msk /*!< Host port interrupt mask */ -#define USB_OTG_GINTMSK_HCIM_Pos (25U) -#define USB_OTG_GINTMSK_HCIM_Msk (0x1UL << USB_OTG_GINTMSK_HCIM_Pos) /*!< 0x02000000 */ -#define USB_OTG_GINTMSK_HCIM USB_OTG_GINTMSK_HCIM_Msk /*!< Host channels interrupt mask */ -#define USB_OTG_GINTMSK_PTXFEM_Pos (26U) -#define USB_OTG_GINTMSK_PTXFEM_Msk (0x1UL << USB_OTG_GINTMSK_PTXFEM_Pos) /*!< 0x04000000 */ -#define USB_OTG_GINTMSK_PTXFEM USB_OTG_GINTMSK_PTXFEM_Msk /*!< Periodic TxFIFO empty mask */ -#define USB_OTG_GINTMSK_CIDSCHGM_Pos (28U) -#define USB_OTG_GINTMSK_CIDSCHGM_Msk (0x1UL << USB_OTG_GINTMSK_CIDSCHGM_Pos) /*!< 0x10000000 */ -#define USB_OTG_GINTMSK_CIDSCHGM USB_OTG_GINTMSK_CIDSCHGM_Msk /*!< Connector ID status change mask */ -#define USB_OTG_GINTMSK_DISCINT_Pos (29U) -#define USB_OTG_GINTMSK_DISCINT_Msk (0x1UL << USB_OTG_GINTMSK_DISCINT_Pos) /*!< 0x20000000 */ -#define USB_OTG_GINTMSK_DISCINT USB_OTG_GINTMSK_DISCINT_Msk /*!< Disconnect detected interrupt mask */ -#define USB_OTG_GINTMSK_SRQIM_Pos (30U) -#define USB_OTG_GINTMSK_SRQIM_Msk (0x1UL << USB_OTG_GINTMSK_SRQIM_Pos) /*!< 0x40000000 */ -#define USB_OTG_GINTMSK_SRQIM USB_OTG_GINTMSK_SRQIM_Msk /*!< Session request/new session detected interrupt mask */ -#define USB_OTG_GINTMSK_WUIM_Pos (31U) -#define USB_OTG_GINTMSK_WUIM_Msk (0x1UL << USB_OTG_GINTMSK_WUIM_Pos) /*!< 0x80000000 */ -#define USB_OTG_GINTMSK_WUIM USB_OTG_GINTMSK_WUIM_Msk /*!< Resume/remote wakeup detected interrupt mask */ - -/******************** Bit definition for USB_OTG_DAINT register ********************/ -#define USB_OTG_DAINT_IEPINT_Pos (0U) -#define USB_OTG_DAINT_IEPINT_Msk (0xFFFFUL << USB_OTG_DAINT_IEPINT_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_DAINT_IEPINT USB_OTG_DAINT_IEPINT_Msk /*!< IN endpoint interrupt bits */ -#define USB_OTG_DAINT_OEPINT_Pos (16U) -#define USB_OTG_DAINT_OEPINT_Msk (0xFFFFUL << USB_OTG_DAINT_OEPINT_Pos) /*!< 0xFFFF0000 */ -#define USB_OTG_DAINT_OEPINT USB_OTG_DAINT_OEPINT_Msk /*!< OUT endpoint interrupt bits */ - -/******************** Bit definition for USB_OTG_HAINTMSK register ********************/ -#define USB_OTG_HAINTMSK_HAINTM_Pos (0U) -#define USB_OTG_HAINTMSK_HAINTM_Msk (0xFFFFUL << USB_OTG_HAINTMSK_HAINTM_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_HAINTMSK_HAINTM USB_OTG_HAINTMSK_HAINTM_Msk /*!< Channel interrupt mask */ - -/******************** Bit definition for USB_OTG_GRXSTSP register ********************/ -#define USB_OTG_GRXSTSP_EPNUM_Pos (0U) -#define USB_OTG_GRXSTSP_EPNUM_Msk (0xFUL << USB_OTG_GRXSTSP_EPNUM_Pos) /*!< 0x0000000F */ -#define USB_OTG_GRXSTSP_EPNUM USB_OTG_GRXSTSP_EPNUM_Msk /*!< IN EP interrupt mask bits */ -#define USB_OTG_GRXSTSP_BCNT_Pos (4U) -#define USB_OTG_GRXSTSP_BCNT_Msk (0x7FFUL << USB_OTG_GRXSTSP_BCNT_Pos) /*!< 0x00007FF0 */ -#define USB_OTG_GRXSTSP_BCNT USB_OTG_GRXSTSP_BCNT_Msk /*!< OUT EP interrupt mask bits */ -#define USB_OTG_GRXSTSP_DPID_Pos (15U) -#define USB_OTG_GRXSTSP_DPID_Msk (0x3UL << USB_OTG_GRXSTSP_DPID_Pos) /*!< 0x00018000 */ -#define USB_OTG_GRXSTSP_DPID USB_OTG_GRXSTSP_DPID_Msk /*!< OUT EP interrupt mask bits */ -#define USB_OTG_GRXSTSP_PKTSTS_Pos (17U) -#define USB_OTG_GRXSTSP_PKTSTS_Msk (0xFUL << USB_OTG_GRXSTSP_PKTSTS_Pos) /*!< 0x001E0000 */ -#define USB_OTG_GRXSTSP_PKTSTS USB_OTG_GRXSTSP_PKTSTS_Msk /*!< OUT EP interrupt mask bits */ - -/******************** Bit definition for USB_OTG_DAINTMSK register ********************/ -#define USB_OTG_DAINTMSK_IEPM_Pos (0U) -#define USB_OTG_DAINTMSK_IEPM_Msk (0xFFFFUL << USB_OTG_DAINTMSK_IEPM_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_DAINTMSK_IEPM USB_OTG_DAINTMSK_IEPM_Msk /*!< IN EP interrupt mask bits */ -#define USB_OTG_DAINTMSK_OEPM_Pos (16U) -#define USB_OTG_DAINTMSK_OEPM_Msk (0xFFFFUL << USB_OTG_DAINTMSK_OEPM_Pos) /*!< 0xFFFF0000 */ -#define USB_OTG_DAINTMSK_OEPM USB_OTG_DAINTMSK_OEPM_Msk /*!< OUT EP interrupt mask bits */ - -/******************** Bit definition for USB_OTG_GRXFSIZ register ********************/ -#define USB_OTG_GRXFSIZ_RXFD_Pos (0U) -#define USB_OTG_GRXFSIZ_RXFD_Msk (0xFFFFUL << USB_OTG_GRXFSIZ_RXFD_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_GRXFSIZ_RXFD USB_OTG_GRXFSIZ_RXFD_Msk /*!< RxFIFO depth */ - -/******************** Bit definition for USB_OTG_DVBUSDIS register ********************/ -#define USB_OTG_DVBUSDIS_VBUSDT_Pos (0U) -#define USB_OTG_DVBUSDIS_VBUSDT_Msk (0xFFFFUL << USB_OTG_DVBUSDIS_VBUSDT_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_DVBUSDIS_VBUSDT USB_OTG_DVBUSDIS_VBUSDT_Msk /*!< Device VBUS discharge time */ - -/******************** Bit definition for OTG register ********************/ -#define USB_OTG_NPTXFSA_Pos (0U) -#define USB_OTG_NPTXFSA_Msk (0xFFFFUL << USB_OTG_NPTXFSA_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_NPTXFSA USB_OTG_NPTXFSA_Msk /*!< Nonperiodic transmit RAM start address */ -#define USB_OTG_NPTXFD_Pos (16U) -#define USB_OTG_NPTXFD_Msk (0xFFFFUL << USB_OTG_NPTXFD_Pos) /*!< 0xFFFF0000 */ -#define USB_OTG_NPTXFD USB_OTG_NPTXFD_Msk /*!< Nonperiodic TxFIFO depth */ -#define USB_OTG_TX0FSA_Pos (0U) -#define USB_OTG_TX0FSA_Msk (0xFFFFUL << USB_OTG_TX0FSA_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_TX0FSA USB_OTG_TX0FSA_Msk /*!< Endpoint 0 transmit RAM start address */ -#define USB_OTG_TX0FD_Pos (16U) -#define USB_OTG_TX0FD_Msk (0xFFFFUL << USB_OTG_TX0FD_Pos) /*!< 0xFFFF0000 */ -#define USB_OTG_TX0FD USB_OTG_TX0FD_Msk /*!< Endpoint 0 TxFIFO depth */ - -/******************** Bit definition for USB_OTG_DVBUSPULSE register ********************/ -#define USB_OTG_DVBUSPULSE_DVBUSP_Pos (0U) -#define USB_OTG_DVBUSPULSE_DVBUSP_Msk (0xFFFUL << USB_OTG_DVBUSPULSE_DVBUSP_Pos) /*!< 0x00000FFF */ -#define USB_OTG_DVBUSPULSE_DVBUSP USB_OTG_DVBUSPULSE_DVBUSP_Msk /*!< Device VBUS pulsing time */ - -/******************** Bit definition for USB_OTG_GNPTXSTS register ********************/ -#define USB_OTG_GNPTXSTS_NPTXFSAV_Pos (0U) -#define USB_OTG_GNPTXSTS_NPTXFSAV_Msk (0xFFFFUL << USB_OTG_GNPTXSTS_NPTXFSAV_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_GNPTXSTS_NPTXFSAV USB_OTG_GNPTXSTS_NPTXFSAV_Msk /*!< Nonperiodic TxFIFO space available */ - -#define USB_OTG_GNPTXSTS_NPTQXSAV_Pos (16U) -#define USB_OTG_GNPTXSTS_NPTQXSAV_Msk (0xFFUL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00FF0000 */ -#define USB_OTG_GNPTXSTS_NPTQXSAV USB_OTG_GNPTXSTS_NPTQXSAV_Msk /*!< Nonperiodic transmit request queue space available */ -#define USB_OTG_GNPTXSTS_NPTQXSAV_0 (0x01UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00010000 */ -#define USB_OTG_GNPTXSTS_NPTQXSAV_1 (0x02UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00020000 */ -#define USB_OTG_GNPTXSTS_NPTQXSAV_2 (0x04UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00040000 */ -#define USB_OTG_GNPTXSTS_NPTQXSAV_3 (0x08UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00080000 */ -#define USB_OTG_GNPTXSTS_NPTQXSAV_4 (0x10UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00100000 */ -#define USB_OTG_GNPTXSTS_NPTQXSAV_5 (0x20UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00200000 */ -#define USB_OTG_GNPTXSTS_NPTQXSAV_6 (0x40UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00400000 */ -#define USB_OTG_GNPTXSTS_NPTQXSAV_7 (0x80UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00800000 */ - -#define USB_OTG_GNPTXSTS_NPTXQTOP_Pos (24U) -#define USB_OTG_GNPTXSTS_NPTXQTOP_Msk (0x7FUL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x7F000000 */ -#define USB_OTG_GNPTXSTS_NPTXQTOP USB_OTG_GNPTXSTS_NPTXQTOP_Msk /*!< Top of the nonperiodic transmit request queue */ -#define USB_OTG_GNPTXSTS_NPTXQTOP_0 (0x01UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x01000000 */ -#define USB_OTG_GNPTXSTS_NPTXQTOP_1 (0x02UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x02000000 */ -#define USB_OTG_GNPTXSTS_NPTXQTOP_2 (0x04UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x04000000 */ -#define USB_OTG_GNPTXSTS_NPTXQTOP_3 (0x08UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x08000000 */ -#define USB_OTG_GNPTXSTS_NPTXQTOP_4 (0x10UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x10000000 */ -#define USB_OTG_GNPTXSTS_NPTXQTOP_5 (0x20UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x20000000 */ -#define USB_OTG_GNPTXSTS_NPTXQTOP_6 (0x40UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x40000000 */ - -/******************** Bit definition for USB_OTG_DTHRCTL register ********************/ -#define USB_OTG_DTHRCTL_NONISOTHREN_Pos (0U) -#define USB_OTG_DTHRCTL_NONISOTHREN_Msk (0x1UL << USB_OTG_DTHRCTL_NONISOTHREN_Pos) /*!< 0x00000001 */ -#define USB_OTG_DTHRCTL_NONISOTHREN USB_OTG_DTHRCTL_NONISOTHREN_Msk /*!< Nonisochronous IN endpoints threshold enable */ -#define USB_OTG_DTHRCTL_ISOTHREN_Pos (1U) -#define USB_OTG_DTHRCTL_ISOTHREN_Msk (0x1UL << USB_OTG_DTHRCTL_ISOTHREN_Pos) /*!< 0x00000002 */ -#define USB_OTG_DTHRCTL_ISOTHREN USB_OTG_DTHRCTL_ISOTHREN_Msk /*!< ISO IN endpoint threshold enable */ - -#define USB_OTG_DTHRCTL_TXTHRLEN_Pos (2U) -#define USB_OTG_DTHRCTL_TXTHRLEN_Msk (0x1FFUL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x000007FC */ -#define USB_OTG_DTHRCTL_TXTHRLEN USB_OTG_DTHRCTL_TXTHRLEN_Msk /*!< Transmit threshold length */ -#define USB_OTG_DTHRCTL_TXTHRLEN_0 (0x001UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000004 */ -#define USB_OTG_DTHRCTL_TXTHRLEN_1 (0x002UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000008 */ -#define USB_OTG_DTHRCTL_TXTHRLEN_2 (0x004UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000010 */ -#define USB_OTG_DTHRCTL_TXTHRLEN_3 (0x008UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000020 */ -#define USB_OTG_DTHRCTL_TXTHRLEN_4 (0x010UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000040 */ -#define USB_OTG_DTHRCTL_TXTHRLEN_5 (0x020UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000080 */ -#define USB_OTG_DTHRCTL_TXTHRLEN_6 (0x040UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000100 */ -#define USB_OTG_DTHRCTL_TXTHRLEN_7 (0x080UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000200 */ -#define USB_OTG_DTHRCTL_TXTHRLEN_8 (0x100UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000400 */ -#define USB_OTG_DTHRCTL_RXTHREN_Pos (16U) -#define USB_OTG_DTHRCTL_RXTHREN_Msk (0x1UL << USB_OTG_DTHRCTL_RXTHREN_Pos) /*!< 0x00010000 */ -#define USB_OTG_DTHRCTL_RXTHREN USB_OTG_DTHRCTL_RXTHREN_Msk /*!< Receive threshold enable */ - -#define USB_OTG_DTHRCTL_RXTHRLEN_Pos (17U) -#define USB_OTG_DTHRCTL_RXTHRLEN_Msk (0x1FFUL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x03FE0000 */ -#define USB_OTG_DTHRCTL_RXTHRLEN USB_OTG_DTHRCTL_RXTHRLEN_Msk /*!< Receive threshold length */ -#define USB_OTG_DTHRCTL_RXTHRLEN_0 (0x001UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00020000 */ -#define USB_OTG_DTHRCTL_RXTHRLEN_1 (0x002UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00040000 */ -#define USB_OTG_DTHRCTL_RXTHRLEN_2 (0x004UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00080000 */ -#define USB_OTG_DTHRCTL_RXTHRLEN_3 (0x008UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00100000 */ -#define USB_OTG_DTHRCTL_RXTHRLEN_4 (0x010UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00200000 */ -#define USB_OTG_DTHRCTL_RXTHRLEN_5 (0x020UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00400000 */ -#define USB_OTG_DTHRCTL_RXTHRLEN_6 (0x040UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00800000 */ -#define USB_OTG_DTHRCTL_RXTHRLEN_7 (0x080UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x01000000 */ -#define USB_OTG_DTHRCTL_RXTHRLEN_8 (0x100UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x02000000 */ -#define USB_OTG_DTHRCTL_ARPEN_Pos (27U) -#define USB_OTG_DTHRCTL_ARPEN_Msk (0x1UL << USB_OTG_DTHRCTL_ARPEN_Pos) /*!< 0x08000000 */ -#define USB_OTG_DTHRCTL_ARPEN USB_OTG_DTHRCTL_ARPEN_Msk /*!< Arbiter parking enable */ - -/******************** Bit definition for USB_OTG_DIEPEMPMSK register ********************/ -#define USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos (0U) -#define USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk (0xFFFFUL << USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_DIEPEMPMSK_INEPTXFEM USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk /*!< IN EP Tx FIFO empty interrupt mask bits */ - -/******************** Bit definition for USB_OTG_DEACHINT register ********************/ -#define USB_OTG_DEACHINT_IEP1INT_Pos (1U) -#define USB_OTG_DEACHINT_IEP1INT_Msk (0x1UL << USB_OTG_DEACHINT_IEP1INT_Pos) /*!< 0x00000002 */ -#define USB_OTG_DEACHINT_IEP1INT USB_OTG_DEACHINT_IEP1INT_Msk /*!< IN endpoint 1interrupt bit */ -#define USB_OTG_DEACHINT_OEP1INT_Pos (17U) -#define USB_OTG_DEACHINT_OEP1INT_Msk (0x1UL << USB_OTG_DEACHINT_OEP1INT_Pos) /*!< 0x00020000 */ -#define USB_OTG_DEACHINT_OEP1INT USB_OTG_DEACHINT_OEP1INT_Msk /*!< OUT endpoint 1 interrupt bit */ - -/******************** Bit definition for USB_OTG_GCCFG register ********************/ -#define USB_OTG_GCCFG_PWRDWN_Pos (16U) -#define USB_OTG_GCCFG_PWRDWN_Msk (0x1UL << USB_OTG_GCCFG_PWRDWN_Pos) /*!< 0x00010000 */ -#define USB_OTG_GCCFG_PWRDWN USB_OTG_GCCFG_PWRDWN_Msk /*!< Power down */ -#define USB_OTG_GCCFG_VBUSASEN_Pos (18U) -#define USB_OTG_GCCFG_VBUSASEN_Msk (0x1UL << USB_OTG_GCCFG_VBUSASEN_Pos) /*!< 0x00040000 */ -#define USB_OTG_GCCFG_VBUSASEN USB_OTG_GCCFG_VBUSASEN_Msk /*!< Enable the VBUS sensing device */ -#define USB_OTG_GCCFG_VBUSBSEN_Pos (19U) -#define USB_OTG_GCCFG_VBUSBSEN_Msk (0x1UL << USB_OTG_GCCFG_VBUSBSEN_Pos) /*!< 0x00080000 */ -#define USB_OTG_GCCFG_VBUSBSEN USB_OTG_GCCFG_VBUSBSEN_Msk /*!< Enable the VBUS sensing device */ -#define USB_OTG_GCCFG_SOFOUTEN_Pos (20U) -#define USB_OTG_GCCFG_SOFOUTEN_Msk (0x1UL << USB_OTG_GCCFG_SOFOUTEN_Pos) /*!< 0x00100000 */ -#define USB_OTG_GCCFG_SOFOUTEN USB_OTG_GCCFG_SOFOUTEN_Msk /*!< SOF output enable */ - -/******************** Bit definition for USB_OTG_DEACHINTMSK register ********************/ -#define USB_OTG_DEACHINTMSK_IEP1INTM_Pos (1U) -#define USB_OTG_DEACHINTMSK_IEP1INTM_Msk (0x1UL << USB_OTG_DEACHINTMSK_IEP1INTM_Pos) /*!< 0x00000002 */ -#define USB_OTG_DEACHINTMSK_IEP1INTM USB_OTG_DEACHINTMSK_IEP1INTM_Msk /*!< IN Endpoint 1 interrupt mask bit */ -#define USB_OTG_DEACHINTMSK_OEP1INTM_Pos (17U) -#define USB_OTG_DEACHINTMSK_OEP1INTM_Msk (0x1UL << USB_OTG_DEACHINTMSK_OEP1INTM_Pos) /*!< 0x00020000 */ -#define USB_OTG_DEACHINTMSK_OEP1INTM USB_OTG_DEACHINTMSK_OEP1INTM_Msk /*!< OUT Endpoint 1 interrupt mask bit */ - -/******************** Bit definition for USB_OTG_CID register ********************/ -#define USB_OTG_CID_PRODUCT_ID_Pos (0U) -#define USB_OTG_CID_PRODUCT_ID_Msk (0xFFFFFFFFUL << USB_OTG_CID_PRODUCT_ID_Pos) /*!< 0xFFFFFFFF */ -#define USB_OTG_CID_PRODUCT_ID USB_OTG_CID_PRODUCT_ID_Msk /*!< Product ID field */ - -/******************** Bit definition for USB_OTG_DIEPEACHMSK1 register ********************/ -#define USB_OTG_DIEPEACHMSK1_XFRCM_Pos (0U) -#define USB_OTG_DIEPEACHMSK1_XFRCM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_XFRCM_Pos) /*!< 0x00000001 */ -#define USB_OTG_DIEPEACHMSK1_XFRCM USB_OTG_DIEPEACHMSK1_XFRCM_Msk /*!< Transfer completed interrupt mask */ -#define USB_OTG_DIEPEACHMSK1_EPDM_Pos (1U) -#define USB_OTG_DIEPEACHMSK1_EPDM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_EPDM_Pos) /*!< 0x00000002 */ -#define USB_OTG_DIEPEACHMSK1_EPDM USB_OTG_DIEPEACHMSK1_EPDM_Msk /*!< Endpoint disabled interrupt mask */ -#define USB_OTG_DIEPEACHMSK1_TOM_Pos (3U) -#define USB_OTG_DIEPEACHMSK1_TOM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_TOM_Pos) /*!< 0x00000008 */ -#define USB_OTG_DIEPEACHMSK1_TOM USB_OTG_DIEPEACHMSK1_TOM_Msk /*!< Timeout condition mask (nonisochronous endpoints) */ -#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos (4U) -#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos) /*!< 0x00000010 */ -#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */ -#define USB_OTG_DIEPEACHMSK1_INEPNMM_Pos (5U) -#define USB_OTG_DIEPEACHMSK1_INEPNMM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_INEPNMM_Pos) /*!< 0x00000020 */ -#define USB_OTG_DIEPEACHMSK1_INEPNMM USB_OTG_DIEPEACHMSK1_INEPNMM_Msk /*!< IN token received with EP mismatch mask */ -#define USB_OTG_DIEPEACHMSK1_INEPNEM_Pos (6U) -#define USB_OTG_DIEPEACHMSK1_INEPNEM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_INEPNEM_Pos) /*!< 0x00000040 */ -#define USB_OTG_DIEPEACHMSK1_INEPNEM USB_OTG_DIEPEACHMSK1_INEPNEM_Msk /*!< IN endpoint NAK effective mask */ -#define USB_OTG_DIEPEACHMSK1_TXFURM_Pos (8U) -#define USB_OTG_DIEPEACHMSK1_TXFURM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_TXFURM_Pos) /*!< 0x00000100 */ -#define USB_OTG_DIEPEACHMSK1_TXFURM USB_OTG_DIEPEACHMSK1_TXFURM_Msk /*!< FIFO underrun mask */ -#define USB_OTG_DIEPEACHMSK1_BIM_Pos (9U) -#define USB_OTG_DIEPEACHMSK1_BIM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_BIM_Pos) /*!< 0x00000200 */ -#define USB_OTG_DIEPEACHMSK1_BIM USB_OTG_DIEPEACHMSK1_BIM_Msk /*!< BNA interrupt mask */ -#define USB_OTG_DIEPEACHMSK1_NAKM_Pos (13U) -#define USB_OTG_DIEPEACHMSK1_NAKM_Msk (0x1UL << USB_OTG_DIEPEACHMSK1_NAKM_Pos) /*!< 0x00002000 */ -#define USB_OTG_DIEPEACHMSK1_NAKM USB_OTG_DIEPEACHMSK1_NAKM_Msk /*!< NAK interrupt mask */ - -/******************** Bit definition for USB_OTG_HPRT register ********************/ -#define USB_OTG_HPRT_PCSTS_Pos (0U) -#define USB_OTG_HPRT_PCSTS_Msk (0x1UL << USB_OTG_HPRT_PCSTS_Pos) /*!< 0x00000001 */ -#define USB_OTG_HPRT_PCSTS USB_OTG_HPRT_PCSTS_Msk /*!< Port connect status */ -#define USB_OTG_HPRT_PCDET_Pos (1U) -#define USB_OTG_HPRT_PCDET_Msk (0x1UL << USB_OTG_HPRT_PCDET_Pos) /*!< 0x00000002 */ -#define USB_OTG_HPRT_PCDET USB_OTG_HPRT_PCDET_Msk /*!< Port connect detected */ -#define USB_OTG_HPRT_PENA_Pos (2U) -#define USB_OTG_HPRT_PENA_Msk (0x1UL << USB_OTG_HPRT_PENA_Pos) /*!< 0x00000004 */ -#define USB_OTG_HPRT_PENA USB_OTG_HPRT_PENA_Msk /*!< Port enable */ -#define USB_OTG_HPRT_PENCHNG_Pos (3U) -#define USB_OTG_HPRT_PENCHNG_Msk (0x1UL << USB_OTG_HPRT_PENCHNG_Pos) /*!< 0x00000008 */ -#define USB_OTG_HPRT_PENCHNG USB_OTG_HPRT_PENCHNG_Msk /*!< Port enable/disable change */ -#define USB_OTG_HPRT_POCA_Pos (4U) -#define USB_OTG_HPRT_POCA_Msk (0x1UL << USB_OTG_HPRT_POCA_Pos) /*!< 0x00000010 */ -#define USB_OTG_HPRT_POCA USB_OTG_HPRT_POCA_Msk /*!< Port overcurrent active */ -#define USB_OTG_HPRT_POCCHNG_Pos (5U) -#define USB_OTG_HPRT_POCCHNG_Msk (0x1UL << USB_OTG_HPRT_POCCHNG_Pos) /*!< 0x00000020 */ -#define USB_OTG_HPRT_POCCHNG USB_OTG_HPRT_POCCHNG_Msk /*!< Port overcurrent change */ -#define USB_OTG_HPRT_PRES_Pos (6U) -#define USB_OTG_HPRT_PRES_Msk (0x1UL << USB_OTG_HPRT_PRES_Pos) /*!< 0x00000040 */ -#define USB_OTG_HPRT_PRES USB_OTG_HPRT_PRES_Msk /*!< Port resume */ -#define USB_OTG_HPRT_PSUSP_Pos (7U) -#define USB_OTG_HPRT_PSUSP_Msk (0x1UL << USB_OTG_HPRT_PSUSP_Pos) /*!< 0x00000080 */ -#define USB_OTG_HPRT_PSUSP USB_OTG_HPRT_PSUSP_Msk /*!< Port suspend */ -#define USB_OTG_HPRT_PRST_Pos (8U) -#define USB_OTG_HPRT_PRST_Msk (0x1UL << USB_OTG_HPRT_PRST_Pos) /*!< 0x00000100 */ -#define USB_OTG_HPRT_PRST USB_OTG_HPRT_PRST_Msk /*!< Port reset */ - -#define USB_OTG_HPRT_PLSTS_Pos (10U) -#define USB_OTG_HPRT_PLSTS_Msk (0x3UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000C00 */ -#define USB_OTG_HPRT_PLSTS USB_OTG_HPRT_PLSTS_Msk /*!< Port line status */ -#define USB_OTG_HPRT_PLSTS_0 (0x1UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000400 */ -#define USB_OTG_HPRT_PLSTS_1 (0x2UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000800 */ -#define USB_OTG_HPRT_PPWR_Pos (12U) -#define USB_OTG_HPRT_PPWR_Msk (0x1UL << USB_OTG_HPRT_PPWR_Pos) /*!< 0x00001000 */ -#define USB_OTG_HPRT_PPWR USB_OTG_HPRT_PPWR_Msk /*!< Port power */ - -#define USB_OTG_HPRT_PTCTL_Pos (13U) -#define USB_OTG_HPRT_PTCTL_Msk (0xFUL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x0001E000 */ -#define USB_OTG_HPRT_PTCTL USB_OTG_HPRT_PTCTL_Msk /*!< Port test control */ -#define USB_OTG_HPRT_PTCTL_0 (0x1UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00002000 */ -#define USB_OTG_HPRT_PTCTL_1 (0x2UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00004000 */ -#define USB_OTG_HPRT_PTCTL_2 (0x4UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00008000 */ -#define USB_OTG_HPRT_PTCTL_3 (0x8UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00010000 */ - -#define USB_OTG_HPRT_PSPD_Pos (17U) -#define USB_OTG_HPRT_PSPD_Msk (0x3UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00060000 */ -#define USB_OTG_HPRT_PSPD USB_OTG_HPRT_PSPD_Msk /*!< Port speed */ -#define USB_OTG_HPRT_PSPD_0 (0x1UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00020000 */ -#define USB_OTG_HPRT_PSPD_1 (0x2UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00040000 */ - -/******************** Bit definition for USB_OTG_DOEPEACHMSK1 register ********************/ -#define USB_OTG_DOEPEACHMSK1_XFRCM_Pos (0U) -#define USB_OTG_DOEPEACHMSK1_XFRCM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_XFRCM_Pos) /*!< 0x00000001 */ -#define USB_OTG_DOEPEACHMSK1_XFRCM USB_OTG_DOEPEACHMSK1_XFRCM_Msk /*!< Transfer completed interrupt mask */ -#define USB_OTG_DOEPEACHMSK1_EPDM_Pos (1U) -#define USB_OTG_DOEPEACHMSK1_EPDM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_EPDM_Pos) /*!< 0x00000002 */ -#define USB_OTG_DOEPEACHMSK1_EPDM USB_OTG_DOEPEACHMSK1_EPDM_Msk /*!< Endpoint disabled interrupt mask */ -#define USB_OTG_DOEPEACHMSK1_TOM_Pos (3U) -#define USB_OTG_DOEPEACHMSK1_TOM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_TOM_Pos) /*!< 0x00000008 */ -#define USB_OTG_DOEPEACHMSK1_TOM USB_OTG_DOEPEACHMSK1_TOM_Msk /*!< Timeout condition mask */ -#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos (4U) -#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos) /*!< 0x00000010 */ -#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */ -#define USB_OTG_DOEPEACHMSK1_INEPNMM_Pos (5U) -#define USB_OTG_DOEPEACHMSK1_INEPNMM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_INEPNMM_Pos) /*!< 0x00000020 */ -#define USB_OTG_DOEPEACHMSK1_INEPNMM USB_OTG_DOEPEACHMSK1_INEPNMM_Msk /*!< IN token received with EP mismatch mask */ -#define USB_OTG_DOEPEACHMSK1_INEPNEM_Pos (6U) -#define USB_OTG_DOEPEACHMSK1_INEPNEM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_INEPNEM_Pos) /*!< 0x00000040 */ -#define USB_OTG_DOEPEACHMSK1_INEPNEM USB_OTG_DOEPEACHMSK1_INEPNEM_Msk /*!< IN endpoint NAK effective mask */ -#define USB_OTG_DOEPEACHMSK1_TXFURM_Pos (8U) -#define USB_OTG_DOEPEACHMSK1_TXFURM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_TXFURM_Pos) /*!< 0x00000100 */ -#define USB_OTG_DOEPEACHMSK1_TXFURM USB_OTG_DOEPEACHMSK1_TXFURM_Msk /*!< OUT packet error mask */ -#define USB_OTG_DOEPEACHMSK1_BIM_Pos (9U) -#define USB_OTG_DOEPEACHMSK1_BIM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_BIM_Pos) /*!< 0x00000200 */ -#define USB_OTG_DOEPEACHMSK1_BIM USB_OTG_DOEPEACHMSK1_BIM_Msk /*!< BNA interrupt mask */ -#define USB_OTG_DOEPEACHMSK1_BERRM_Pos (12U) -#define USB_OTG_DOEPEACHMSK1_BERRM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_BERRM_Pos) /*!< 0x00001000 */ -#define USB_OTG_DOEPEACHMSK1_BERRM USB_OTG_DOEPEACHMSK1_BERRM_Msk /*!< Bubble error interrupt mask */ -#define USB_OTG_DOEPEACHMSK1_NAKM_Pos (13U) -#define USB_OTG_DOEPEACHMSK1_NAKM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_NAKM_Pos) /*!< 0x00002000 */ -#define USB_OTG_DOEPEACHMSK1_NAKM USB_OTG_DOEPEACHMSK1_NAKM_Msk /*!< NAK interrupt mask */ -#define USB_OTG_DOEPEACHMSK1_NYETM_Pos (14U) -#define USB_OTG_DOEPEACHMSK1_NYETM_Msk (0x1UL << USB_OTG_DOEPEACHMSK1_NYETM_Pos) /*!< 0x00004000 */ -#define USB_OTG_DOEPEACHMSK1_NYETM USB_OTG_DOEPEACHMSK1_NYETM_Msk /*!< NYET interrupt mask */ - -/******************** Bit definition for USB_OTG_HPTXFSIZ register ********************/ -#define USB_OTG_HPTXFSIZ_PTXSA_Pos (0U) -#define USB_OTG_HPTXFSIZ_PTXSA_Msk (0xFFFFUL << USB_OTG_HPTXFSIZ_PTXSA_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_HPTXFSIZ_PTXSA USB_OTG_HPTXFSIZ_PTXSA_Msk /*!< Host periodic TxFIFO start address */ -#define USB_OTG_HPTXFSIZ_PTXFD_Pos (16U) -#define USB_OTG_HPTXFSIZ_PTXFD_Msk (0xFFFFUL << USB_OTG_HPTXFSIZ_PTXFD_Pos) /*!< 0xFFFF0000 */ -#define USB_OTG_HPTXFSIZ_PTXFD USB_OTG_HPTXFSIZ_PTXFD_Msk /*!< Host periodic TxFIFO depth */ - -/******************** Bit definition for USB_OTG_DIEPCTL register ********************/ -#define USB_OTG_DIEPCTL_MPSIZ_Pos (0U) -#define USB_OTG_DIEPCTL_MPSIZ_Msk (0x7FFUL << USB_OTG_DIEPCTL_MPSIZ_Pos) /*!< 0x000007FF */ -#define USB_OTG_DIEPCTL_MPSIZ USB_OTG_DIEPCTL_MPSIZ_Msk /*!< Maximum packet size */ -#define USB_OTG_DIEPCTL_USBAEP_Pos (15U) -#define USB_OTG_DIEPCTL_USBAEP_Msk (0x1UL << USB_OTG_DIEPCTL_USBAEP_Pos) /*!< 0x00008000 */ -#define USB_OTG_DIEPCTL_USBAEP USB_OTG_DIEPCTL_USBAEP_Msk /*!< USB active endpoint */ -#define USB_OTG_DIEPCTL_EONUM_DPID_Pos (16U) -#define USB_OTG_DIEPCTL_EONUM_DPID_Msk (0x1UL << USB_OTG_DIEPCTL_EONUM_DPID_Pos) /*!< 0x00010000 */ -#define USB_OTG_DIEPCTL_EONUM_DPID USB_OTG_DIEPCTL_EONUM_DPID_Msk /*!< Even/odd frame */ -#define USB_OTG_DIEPCTL_NAKSTS_Pos (17U) -#define USB_OTG_DIEPCTL_NAKSTS_Msk (0x1UL << USB_OTG_DIEPCTL_NAKSTS_Pos) /*!< 0x00020000 */ -#define USB_OTG_DIEPCTL_NAKSTS USB_OTG_DIEPCTL_NAKSTS_Msk /*!< NAK status */ - -#define USB_OTG_DIEPCTL_EPTYP_Pos (18U) -#define USB_OTG_DIEPCTL_EPTYP_Msk (0x3UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x000C0000 */ -#define USB_OTG_DIEPCTL_EPTYP USB_OTG_DIEPCTL_EPTYP_Msk /*!< Endpoint type */ -#define USB_OTG_DIEPCTL_EPTYP_0 (0x1UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x00040000 */ -#define USB_OTG_DIEPCTL_EPTYP_1 (0x2UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x00080000 */ -#define USB_OTG_DIEPCTL_STALL_Pos (21U) -#define USB_OTG_DIEPCTL_STALL_Msk (0x1UL << USB_OTG_DIEPCTL_STALL_Pos) /*!< 0x00200000 */ -#define USB_OTG_DIEPCTL_STALL USB_OTG_DIEPCTL_STALL_Msk /*!< STALL handshake */ - -#define USB_OTG_DIEPCTL_TXFNUM_Pos (22U) -#define USB_OTG_DIEPCTL_TXFNUM_Msk (0xFUL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x03C00000 */ -#define USB_OTG_DIEPCTL_TXFNUM USB_OTG_DIEPCTL_TXFNUM_Msk /*!< TxFIFO number */ -#define USB_OTG_DIEPCTL_TXFNUM_0 (0x1UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x00400000 */ -#define USB_OTG_DIEPCTL_TXFNUM_1 (0x2UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x00800000 */ -#define USB_OTG_DIEPCTL_TXFNUM_2 (0x4UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x01000000 */ -#define USB_OTG_DIEPCTL_TXFNUM_3 (0x8UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x02000000 */ -#define USB_OTG_DIEPCTL_CNAK_Pos (26U) -#define USB_OTG_DIEPCTL_CNAK_Msk (0x1UL << USB_OTG_DIEPCTL_CNAK_Pos) /*!< 0x04000000 */ -#define USB_OTG_DIEPCTL_CNAK USB_OTG_DIEPCTL_CNAK_Msk /*!< Clear NAK */ -#define USB_OTG_DIEPCTL_SNAK_Pos (27U) -#define USB_OTG_DIEPCTL_SNAK_Msk (0x1UL << USB_OTG_DIEPCTL_SNAK_Pos) /*!< 0x08000000 */ -#define USB_OTG_DIEPCTL_SNAK USB_OTG_DIEPCTL_SNAK_Msk /*!< Set NAK */ -#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos (28U) -#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk (0x1UL << USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos) /*!< 0x10000000 */ -#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk /*!< Set DATA0 PID */ -#define USB_OTG_DIEPCTL_SODDFRM_Pos (29U) -#define USB_OTG_DIEPCTL_SODDFRM_Msk (0x1UL << USB_OTG_DIEPCTL_SODDFRM_Pos) /*!< 0x20000000 */ -#define USB_OTG_DIEPCTL_SODDFRM USB_OTG_DIEPCTL_SODDFRM_Msk /*!< Set odd frame */ -#define USB_OTG_DIEPCTL_EPDIS_Pos (30U) -#define USB_OTG_DIEPCTL_EPDIS_Msk (0x1UL << USB_OTG_DIEPCTL_EPDIS_Pos) /*!< 0x40000000 */ -#define USB_OTG_DIEPCTL_EPDIS USB_OTG_DIEPCTL_EPDIS_Msk /*!< Endpoint disable */ -#define USB_OTG_DIEPCTL_EPENA_Pos (31U) -#define USB_OTG_DIEPCTL_EPENA_Msk (0x1UL << USB_OTG_DIEPCTL_EPENA_Pos) /*!< 0x80000000 */ -#define USB_OTG_DIEPCTL_EPENA USB_OTG_DIEPCTL_EPENA_Msk /*!< Endpoint enable */ - -/******************** Bit definition for USB_OTG_HCCHAR register ********************/ -#define USB_OTG_HCCHAR_MPSIZ_Pos (0U) -#define USB_OTG_HCCHAR_MPSIZ_Msk (0x7FFUL << USB_OTG_HCCHAR_MPSIZ_Pos) /*!< 0x000007FF */ -#define USB_OTG_HCCHAR_MPSIZ USB_OTG_HCCHAR_MPSIZ_Msk /*!< Maximum packet size */ - -#define USB_OTG_HCCHAR_EPNUM_Pos (11U) -#define USB_OTG_HCCHAR_EPNUM_Msk (0xFUL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00007800 */ -#define USB_OTG_HCCHAR_EPNUM USB_OTG_HCCHAR_EPNUM_Msk /*!< Endpoint number */ -#define USB_OTG_HCCHAR_EPNUM_0 (0x1UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00000800 */ -#define USB_OTG_HCCHAR_EPNUM_1 (0x2UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00001000 */ -#define USB_OTG_HCCHAR_EPNUM_2 (0x4UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00002000 */ -#define USB_OTG_HCCHAR_EPNUM_3 (0x8UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00004000 */ -#define USB_OTG_HCCHAR_EPDIR_Pos (15U) -#define USB_OTG_HCCHAR_EPDIR_Msk (0x1UL << USB_OTG_HCCHAR_EPDIR_Pos) /*!< 0x00008000 */ -#define USB_OTG_HCCHAR_EPDIR USB_OTG_HCCHAR_EPDIR_Msk /*!< Endpoint direction */ -#define USB_OTG_HCCHAR_LSDEV_Pos (17U) -#define USB_OTG_HCCHAR_LSDEV_Msk (0x1UL << USB_OTG_HCCHAR_LSDEV_Pos) /*!< 0x00020000 */ -#define USB_OTG_HCCHAR_LSDEV USB_OTG_HCCHAR_LSDEV_Msk /*!< Low-speed device */ - -#define USB_OTG_HCCHAR_EPTYP_Pos (18U) -#define USB_OTG_HCCHAR_EPTYP_Msk (0x3UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x000C0000 */ -#define USB_OTG_HCCHAR_EPTYP USB_OTG_HCCHAR_EPTYP_Msk /*!< Endpoint type */ -#define USB_OTG_HCCHAR_EPTYP_0 (0x1UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x00040000 */ -#define USB_OTG_HCCHAR_EPTYP_1 (0x2UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x00080000 */ - -#define USB_OTG_HCCHAR_MC_Pos (20U) -#define USB_OTG_HCCHAR_MC_Msk (0x3UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00300000 */ -#define USB_OTG_HCCHAR_MC USB_OTG_HCCHAR_MC_Msk /*!< Multi Count (MC) / Error Count (EC) */ -#define USB_OTG_HCCHAR_MC_0 (0x1UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00100000 */ -#define USB_OTG_HCCHAR_MC_1 (0x2UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00200000 */ - -#define USB_OTG_HCCHAR_DAD_Pos (22U) -#define USB_OTG_HCCHAR_DAD_Msk (0x7FUL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x1FC00000 */ -#define USB_OTG_HCCHAR_DAD USB_OTG_HCCHAR_DAD_Msk /*!< Device address */ -#define USB_OTG_HCCHAR_DAD_0 (0x01UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x00400000 */ -#define USB_OTG_HCCHAR_DAD_1 (0x02UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x00800000 */ -#define USB_OTG_HCCHAR_DAD_2 (0x04UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x01000000 */ -#define USB_OTG_HCCHAR_DAD_3 (0x08UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x02000000 */ -#define USB_OTG_HCCHAR_DAD_4 (0x10UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x04000000 */ -#define USB_OTG_HCCHAR_DAD_5 (0x20UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x08000000 */ -#define USB_OTG_HCCHAR_DAD_6 (0x40UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x10000000 */ -#define USB_OTG_HCCHAR_ODDFRM_Pos (29U) -#define USB_OTG_HCCHAR_ODDFRM_Msk (0x1UL << USB_OTG_HCCHAR_ODDFRM_Pos) /*!< 0x20000000 */ -#define USB_OTG_HCCHAR_ODDFRM USB_OTG_HCCHAR_ODDFRM_Msk /*!< Odd frame */ -#define USB_OTG_HCCHAR_CHDIS_Pos (30U) -#define USB_OTG_HCCHAR_CHDIS_Msk (0x1UL << USB_OTG_HCCHAR_CHDIS_Pos) /*!< 0x40000000 */ -#define USB_OTG_HCCHAR_CHDIS USB_OTG_HCCHAR_CHDIS_Msk /*!< Channel disable */ -#define USB_OTG_HCCHAR_CHENA_Pos (31U) -#define USB_OTG_HCCHAR_CHENA_Msk (0x1UL << USB_OTG_HCCHAR_CHENA_Pos) /*!< 0x80000000 */ -#define USB_OTG_HCCHAR_CHENA USB_OTG_HCCHAR_CHENA_Msk /*!< Channel enable */ - -/******************** Bit definition for USB_OTG_HCSPLT register ********************/ - -#define USB_OTG_HCSPLT_PRTADDR_Pos (0U) -#define USB_OTG_HCSPLT_PRTADDR_Msk (0x7FUL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x0000007F */ -#define USB_OTG_HCSPLT_PRTADDR USB_OTG_HCSPLT_PRTADDR_Msk /*!< Port address */ -#define USB_OTG_HCSPLT_PRTADDR_0 (0x01UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000001 */ -#define USB_OTG_HCSPLT_PRTADDR_1 (0x02UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000002 */ -#define USB_OTG_HCSPLT_PRTADDR_2 (0x04UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000004 */ -#define USB_OTG_HCSPLT_PRTADDR_3 (0x08UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000008 */ -#define USB_OTG_HCSPLT_PRTADDR_4 (0x10UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000010 */ -#define USB_OTG_HCSPLT_PRTADDR_5 (0x20UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000020 */ -#define USB_OTG_HCSPLT_PRTADDR_6 (0x40UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000040 */ - -#define USB_OTG_HCSPLT_HUBADDR_Pos (7U) -#define USB_OTG_HCSPLT_HUBADDR_Msk (0x7FUL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00003F80 */ -#define USB_OTG_HCSPLT_HUBADDR USB_OTG_HCSPLT_HUBADDR_Msk /*!< Hub address */ -#define USB_OTG_HCSPLT_HUBADDR_0 (0x01UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000080 */ -#define USB_OTG_HCSPLT_HUBADDR_1 (0x02UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000100 */ -#define USB_OTG_HCSPLT_HUBADDR_2 (0x04UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000200 */ -#define USB_OTG_HCSPLT_HUBADDR_3 (0x08UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000400 */ -#define USB_OTG_HCSPLT_HUBADDR_4 (0x10UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000800 */ -#define USB_OTG_HCSPLT_HUBADDR_5 (0x20UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00001000 */ -#define USB_OTG_HCSPLT_HUBADDR_6 (0x40UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00002000 */ - -#define USB_OTG_HCSPLT_XACTPOS_Pos (14U) -#define USB_OTG_HCSPLT_XACTPOS_Msk (0x3UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x0000C000 */ -#define USB_OTG_HCSPLT_XACTPOS USB_OTG_HCSPLT_XACTPOS_Msk /*!< XACTPOS */ -#define USB_OTG_HCSPLT_XACTPOS_0 (0x1UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x00004000 */ -#define USB_OTG_HCSPLT_XACTPOS_1 (0x2UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x00008000 */ -#define USB_OTG_HCSPLT_COMPLSPLT_Pos (16U) -#define USB_OTG_HCSPLT_COMPLSPLT_Msk (0x1UL << USB_OTG_HCSPLT_COMPLSPLT_Pos) /*!< 0x00010000 */ -#define USB_OTG_HCSPLT_COMPLSPLT USB_OTG_HCSPLT_COMPLSPLT_Msk /*!< Do complete split */ -#define USB_OTG_HCSPLT_SPLITEN_Pos (31U) -#define USB_OTG_HCSPLT_SPLITEN_Msk (0x1UL << USB_OTG_HCSPLT_SPLITEN_Pos) /*!< 0x80000000 */ -#define USB_OTG_HCSPLT_SPLITEN USB_OTG_HCSPLT_SPLITEN_Msk /*!< Split enable */ - -/******************** Bit definition for USB_OTG_HCINT register ********************/ -#define USB_OTG_HCINT_XFRC_Pos (0U) -#define USB_OTG_HCINT_XFRC_Msk (0x1UL << USB_OTG_HCINT_XFRC_Pos) /*!< 0x00000001 */ -#define USB_OTG_HCINT_XFRC USB_OTG_HCINT_XFRC_Msk /*!< Transfer completed */ -#define USB_OTG_HCINT_CHH_Pos (1U) -#define USB_OTG_HCINT_CHH_Msk (0x1UL << USB_OTG_HCINT_CHH_Pos) /*!< 0x00000002 */ -#define USB_OTG_HCINT_CHH USB_OTG_HCINT_CHH_Msk /*!< Channel halted */ -#define USB_OTG_HCINT_AHBERR_Pos (2U) -#define USB_OTG_HCINT_AHBERR_Msk (0x1UL << USB_OTG_HCINT_AHBERR_Pos) /*!< 0x00000004 */ -#define USB_OTG_HCINT_AHBERR USB_OTG_HCINT_AHBERR_Msk /*!< AHB error */ -#define USB_OTG_HCINT_STALL_Pos (3U) -#define USB_OTG_HCINT_STALL_Msk (0x1UL << USB_OTG_HCINT_STALL_Pos) /*!< 0x00000008 */ -#define USB_OTG_HCINT_STALL USB_OTG_HCINT_STALL_Msk /*!< STALL response received interrupt */ -#define USB_OTG_HCINT_NAK_Pos (4U) -#define USB_OTG_HCINT_NAK_Msk (0x1UL << USB_OTG_HCINT_NAK_Pos) /*!< 0x00000010 */ -#define USB_OTG_HCINT_NAK USB_OTG_HCINT_NAK_Msk /*!< NAK response received interrupt */ -#define USB_OTG_HCINT_ACK_Pos (5U) -#define USB_OTG_HCINT_ACK_Msk (0x1UL << USB_OTG_HCINT_ACK_Pos) /*!< 0x00000020 */ -#define USB_OTG_HCINT_ACK USB_OTG_HCINT_ACK_Msk /*!< ACK response received/transmitted interrupt */ -#define USB_OTG_HCINT_NYET_Pos (6U) -#define USB_OTG_HCINT_NYET_Msk (0x1UL << USB_OTG_HCINT_NYET_Pos) /*!< 0x00000040 */ -#define USB_OTG_HCINT_NYET USB_OTG_HCINT_NYET_Msk /*!< Response received interrupt */ -#define USB_OTG_HCINT_TXERR_Pos (7U) -#define USB_OTG_HCINT_TXERR_Msk (0x1UL << USB_OTG_HCINT_TXERR_Pos) /*!< 0x00000080 */ -#define USB_OTG_HCINT_TXERR USB_OTG_HCINT_TXERR_Msk /*!< Transaction error */ -#define USB_OTG_HCINT_BBERR_Pos (8U) -#define USB_OTG_HCINT_BBERR_Msk (0x1UL << USB_OTG_HCINT_BBERR_Pos) /*!< 0x00000100 */ -#define USB_OTG_HCINT_BBERR USB_OTG_HCINT_BBERR_Msk /*!< Babble error */ -#define USB_OTG_HCINT_FRMOR_Pos (9U) -#define USB_OTG_HCINT_FRMOR_Msk (0x1UL << USB_OTG_HCINT_FRMOR_Pos) /*!< 0x00000200 */ -#define USB_OTG_HCINT_FRMOR USB_OTG_HCINT_FRMOR_Msk /*!< Frame overrun */ -#define USB_OTG_HCINT_DTERR_Pos (10U) -#define USB_OTG_HCINT_DTERR_Msk (0x1UL << USB_OTG_HCINT_DTERR_Pos) /*!< 0x00000400 */ -#define USB_OTG_HCINT_DTERR USB_OTG_HCINT_DTERR_Msk /*!< Data toggle error */ - -/******************** Bit definition for USB_OTG_DIEPINT register ********************/ -#define USB_OTG_DIEPINT_XFRC_Pos (0U) -#define USB_OTG_DIEPINT_XFRC_Msk (0x1UL << USB_OTG_DIEPINT_XFRC_Pos) /*!< 0x00000001 */ -#define USB_OTG_DIEPINT_XFRC USB_OTG_DIEPINT_XFRC_Msk /*!< Transfer completed interrupt */ -#define USB_OTG_DIEPINT_EPDISD_Pos (1U) -#define USB_OTG_DIEPINT_EPDISD_Msk (0x1UL << USB_OTG_DIEPINT_EPDISD_Pos) /*!< 0x00000002 */ -#define USB_OTG_DIEPINT_EPDISD USB_OTG_DIEPINT_EPDISD_Msk /*!< Endpoint disabled interrupt */ -#define USB_OTG_DIEPINT_AHBERR_Pos (2U) -#define USB_OTG_DIEPINT_AHBERR_Msk (0x1UL << USB_OTG_DIEPINT_AHBERR_Pos) /*!< 0x00000004 */ -#define USB_OTG_DIEPINT_AHBERR USB_OTG_DIEPINT_AHBERR_Msk /*!< AHB Error (AHBErr) during an IN transaction */ -#define USB_OTG_DIEPINT_TOC_Pos (3U) -#define USB_OTG_DIEPINT_TOC_Msk (0x1UL << USB_OTG_DIEPINT_TOC_Pos) /*!< 0x00000008 */ -#define USB_OTG_DIEPINT_TOC USB_OTG_DIEPINT_TOC_Msk /*!< Timeout condition */ -#define USB_OTG_DIEPINT_ITTXFE_Pos (4U) -#define USB_OTG_DIEPINT_ITTXFE_Msk (0x1UL << USB_OTG_DIEPINT_ITTXFE_Pos) /*!< 0x00000010 */ -#define USB_OTG_DIEPINT_ITTXFE USB_OTG_DIEPINT_ITTXFE_Msk /*!< IN token received when TxFIFO is empty */ -#define USB_OTG_DIEPINT_INEPNM_Pos (5U) -#define USB_OTG_DIEPINT_INEPNM_Msk (0x1UL << USB_OTG_DIEPINT_INEPNM_Pos) /*!< 0x00000004 */ -#define USB_OTG_DIEPINT_INEPNM USB_OTG_DIEPINT_INEPNM_Msk /*!< IN token received with EP mismatch */ -#define USB_OTG_DIEPINT_INEPNE_Pos (6U) -#define USB_OTG_DIEPINT_INEPNE_Msk (0x1UL << USB_OTG_DIEPINT_INEPNE_Pos) /*!< 0x00000040 */ -#define USB_OTG_DIEPINT_INEPNE USB_OTG_DIEPINT_INEPNE_Msk /*!< IN endpoint NAK effective */ -#define USB_OTG_DIEPINT_TXFE_Pos (7U) -#define USB_OTG_DIEPINT_TXFE_Msk (0x1UL << USB_OTG_DIEPINT_TXFE_Pos) /*!< 0x00000080 */ -#define USB_OTG_DIEPINT_TXFE USB_OTG_DIEPINT_TXFE_Msk /*!< Transmit FIFO empty */ -#define USB_OTG_DIEPINT_TXFIFOUDRN_Pos (8U) -#define USB_OTG_DIEPINT_TXFIFOUDRN_Msk (0x1UL << USB_OTG_DIEPINT_TXFIFOUDRN_Pos) /*!< 0x00000100 */ -#define USB_OTG_DIEPINT_TXFIFOUDRN USB_OTG_DIEPINT_TXFIFOUDRN_Msk /*!< Transmit Fifo Underrun */ -#define USB_OTG_DIEPINT_BNA_Pos (9U) -#define USB_OTG_DIEPINT_BNA_Msk (0x1UL << USB_OTG_DIEPINT_BNA_Pos) /*!< 0x00000200 */ -#define USB_OTG_DIEPINT_BNA USB_OTG_DIEPINT_BNA_Msk /*!< Buffer not available interrupt */ -#define USB_OTG_DIEPINT_PKTDRPSTS_Pos (11U) -#define USB_OTG_DIEPINT_PKTDRPSTS_Msk (0x1UL << USB_OTG_DIEPINT_PKTDRPSTS_Pos) /*!< 0x00000800 */ -#define USB_OTG_DIEPINT_PKTDRPSTS USB_OTG_DIEPINT_PKTDRPSTS_Msk /*!< Packet dropped status */ -#define USB_OTG_DIEPINT_BERR_Pos (12U) -#define USB_OTG_DIEPINT_BERR_Msk (0x1UL << USB_OTG_DIEPINT_BERR_Pos) /*!< 0x00001000 */ -#define USB_OTG_DIEPINT_BERR USB_OTG_DIEPINT_BERR_Msk /*!< Babble error interrupt */ -#define USB_OTG_DIEPINT_NAK_Pos (13U) -#define USB_OTG_DIEPINT_NAK_Msk (0x1UL << USB_OTG_DIEPINT_NAK_Pos) /*!< 0x00002000 */ -#define USB_OTG_DIEPINT_NAK USB_OTG_DIEPINT_NAK_Msk /*!< NAK interrupt */ - -/******************** Bit definition for USB_OTG_HCINTMSK register ********************/ -#define USB_OTG_HCINTMSK_XFRCM_Pos (0U) -#define USB_OTG_HCINTMSK_XFRCM_Msk (0x1UL << USB_OTG_HCINTMSK_XFRCM_Pos) /*!< 0x00000001 */ -#define USB_OTG_HCINTMSK_XFRCM USB_OTG_HCINTMSK_XFRCM_Msk /*!< Transfer completed mask */ -#define USB_OTG_HCINTMSK_CHHM_Pos (1U) -#define USB_OTG_HCINTMSK_CHHM_Msk (0x1UL << USB_OTG_HCINTMSK_CHHM_Pos) /*!< 0x00000002 */ -#define USB_OTG_HCINTMSK_CHHM USB_OTG_HCINTMSK_CHHM_Msk /*!< Channel halted mask */ -#define USB_OTG_HCINTMSK_AHBERR_Pos (2U) -#define USB_OTG_HCINTMSK_AHBERR_Msk (0x1UL << USB_OTG_HCINTMSK_AHBERR_Pos) /*!< 0x00000004 */ -#define USB_OTG_HCINTMSK_AHBERR USB_OTG_HCINTMSK_AHBERR_Msk /*!< AHB error */ -#define USB_OTG_HCINTMSK_STALLM_Pos (3U) -#define USB_OTG_HCINTMSK_STALLM_Msk (0x1UL << USB_OTG_HCINTMSK_STALLM_Pos) /*!< 0x00000008 */ -#define USB_OTG_HCINTMSK_STALLM USB_OTG_HCINTMSK_STALLM_Msk /*!< STALL response received interrupt mask */ -#define USB_OTG_HCINTMSK_NAKM_Pos (4U) -#define USB_OTG_HCINTMSK_NAKM_Msk (0x1UL << USB_OTG_HCINTMSK_NAKM_Pos) /*!< 0x00000010 */ -#define USB_OTG_HCINTMSK_NAKM USB_OTG_HCINTMSK_NAKM_Msk /*!< NAK response received interrupt mask */ -#define USB_OTG_HCINTMSK_ACKM_Pos (5U) -#define USB_OTG_HCINTMSK_ACKM_Msk (0x1UL << USB_OTG_HCINTMSK_ACKM_Pos) /*!< 0x00000020 */ -#define USB_OTG_HCINTMSK_ACKM USB_OTG_HCINTMSK_ACKM_Msk /*!< ACK response received/transmitted interrupt mask */ -#define USB_OTG_HCINTMSK_NYET_Pos (6U) -#define USB_OTG_HCINTMSK_NYET_Msk (0x1UL << USB_OTG_HCINTMSK_NYET_Pos) /*!< 0x00000040 */ -#define USB_OTG_HCINTMSK_NYET USB_OTG_HCINTMSK_NYET_Msk /*!< response received interrupt mask */ -#define USB_OTG_HCINTMSK_TXERRM_Pos (7U) -#define USB_OTG_HCINTMSK_TXERRM_Msk (0x1UL << USB_OTG_HCINTMSK_TXERRM_Pos) /*!< 0x00000080 */ -#define USB_OTG_HCINTMSK_TXERRM USB_OTG_HCINTMSK_TXERRM_Msk /*!< Transaction error mask */ -#define USB_OTG_HCINTMSK_BBERRM_Pos (8U) -#define USB_OTG_HCINTMSK_BBERRM_Msk (0x1UL << USB_OTG_HCINTMSK_BBERRM_Pos) /*!< 0x00000100 */ -#define USB_OTG_HCINTMSK_BBERRM USB_OTG_HCINTMSK_BBERRM_Msk /*!< Babble error mask */ -#define USB_OTG_HCINTMSK_FRMORM_Pos (9U) -#define USB_OTG_HCINTMSK_FRMORM_Msk (0x1UL << USB_OTG_HCINTMSK_FRMORM_Pos) /*!< 0x00000200 */ -#define USB_OTG_HCINTMSK_FRMORM USB_OTG_HCINTMSK_FRMORM_Msk /*!< Frame overrun mask */ -#define USB_OTG_HCINTMSK_DTERRM_Pos (10U) -#define USB_OTG_HCINTMSK_DTERRM_Msk (0x1UL << USB_OTG_HCINTMSK_DTERRM_Pos) /*!< 0x00000400 */ -#define USB_OTG_HCINTMSK_DTERRM USB_OTG_HCINTMSK_DTERRM_Msk /*!< Data toggle error mask */ - -/******************** Bit definition for USB_OTG_DIEPTSIZ register ********************/ - -#define USB_OTG_DIEPTSIZ_XFRSIZ_Pos (0U) -#define USB_OTG_DIEPTSIZ_XFRSIZ_Msk (0x7FFFFUL << USB_OTG_DIEPTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */ -#define USB_OTG_DIEPTSIZ_XFRSIZ USB_OTG_DIEPTSIZ_XFRSIZ_Msk /*!< Transfer size */ -#define USB_OTG_DIEPTSIZ_PKTCNT_Pos (19U) -#define USB_OTG_DIEPTSIZ_PKTCNT_Msk (0x3FFUL << USB_OTG_DIEPTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */ -#define USB_OTG_DIEPTSIZ_PKTCNT USB_OTG_DIEPTSIZ_PKTCNT_Msk /*!< Packet count */ -#define USB_OTG_DIEPTSIZ_MULCNT_Pos (29U) -#define USB_OTG_DIEPTSIZ_MULCNT_Msk (0x3UL << USB_OTG_DIEPTSIZ_MULCNT_Pos) /*!< 0x60000000 */ -#define USB_OTG_DIEPTSIZ_MULCNT USB_OTG_DIEPTSIZ_MULCNT_Msk /*!< Packet count */ -/******************** Bit definition for USB_OTG_HCTSIZ register ********************/ -#define USB_OTG_HCTSIZ_XFRSIZ_Pos (0U) -#define USB_OTG_HCTSIZ_XFRSIZ_Msk (0x7FFFFUL << USB_OTG_HCTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */ -#define USB_OTG_HCTSIZ_XFRSIZ USB_OTG_HCTSIZ_XFRSIZ_Msk /*!< Transfer size */ -#define USB_OTG_HCTSIZ_PKTCNT_Pos (19U) -#define USB_OTG_HCTSIZ_PKTCNT_Msk (0x3FFUL << USB_OTG_HCTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */ -#define USB_OTG_HCTSIZ_PKTCNT USB_OTG_HCTSIZ_PKTCNT_Msk /*!< Packet count */ -#define USB_OTG_HCTSIZ_DOPING_Pos (31U) -#define USB_OTG_HCTSIZ_DOPING_Msk (0x1UL << USB_OTG_HCTSIZ_DOPING_Pos) /*!< 0x80000000 */ -#define USB_OTG_HCTSIZ_DOPING USB_OTG_HCTSIZ_DOPING_Msk /*!< Do PING */ -#define USB_OTG_HCTSIZ_DPID_Pos (29U) -#define USB_OTG_HCTSIZ_DPID_Msk (0x3UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x60000000 */ -#define USB_OTG_HCTSIZ_DPID USB_OTG_HCTSIZ_DPID_Msk /*!< Data PID */ -#define USB_OTG_HCTSIZ_DPID_0 (0x1UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x20000000 */ -#define USB_OTG_HCTSIZ_DPID_1 (0x2UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x40000000 */ - -/******************** Bit definition for USB_OTG_DIEPDMA register ********************/ -#define USB_OTG_DIEPDMA_DMAADDR_Pos (0U) -#define USB_OTG_DIEPDMA_DMAADDR_Msk (0xFFFFFFFFUL << USB_OTG_DIEPDMA_DMAADDR_Pos) /*!< 0xFFFFFFFF */ -#define USB_OTG_DIEPDMA_DMAADDR USB_OTG_DIEPDMA_DMAADDR_Msk /*!< DMA address */ - -/******************** Bit definition for USB_OTG_HCDMA register ********************/ -#define USB_OTG_HCDMA_DMAADDR_Pos (0U) -#define USB_OTG_HCDMA_DMAADDR_Msk (0xFFFFFFFFUL << USB_OTG_HCDMA_DMAADDR_Pos) /*!< 0xFFFFFFFF */ -#define USB_OTG_HCDMA_DMAADDR USB_OTG_HCDMA_DMAADDR_Msk /*!< DMA address */ - -/******************** Bit definition for USB_OTG_DTXFSTS register ********************/ -#define USB_OTG_DTXFSTS_INEPTFSAV_Pos (0U) -#define USB_OTG_DTXFSTS_INEPTFSAV_Msk (0xFFFFUL << USB_OTG_DTXFSTS_INEPTFSAV_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_DTXFSTS_INEPTFSAV USB_OTG_DTXFSTS_INEPTFSAV_Msk /*!< IN endpoint TxFIFO space available */ - -/******************** Bit definition for USB_OTG_DIEPTXF register ********************/ -#define USB_OTG_DIEPTXF_INEPTXSA_Pos (0U) -#define USB_OTG_DIEPTXF_INEPTXSA_Msk (0xFFFFUL << USB_OTG_DIEPTXF_INEPTXSA_Pos) /*!< 0x0000FFFF */ -#define USB_OTG_DIEPTXF_INEPTXSA USB_OTG_DIEPTXF_INEPTXSA_Msk /*!< IN endpoint FIFOx transmit RAM start address */ -#define USB_OTG_DIEPTXF_INEPTXFD_Pos (16U) -#define USB_OTG_DIEPTXF_INEPTXFD_Msk (0xFFFFUL << USB_OTG_DIEPTXF_INEPTXFD_Pos) /*!< 0xFFFF0000 */ -#define USB_OTG_DIEPTXF_INEPTXFD USB_OTG_DIEPTXF_INEPTXFD_Msk /*!< IN endpoint TxFIFO depth */ - -/******************** Bit definition for USB_OTG_DOEPCTL register ********************/ - -#define USB_OTG_DOEPCTL_MPSIZ_Pos (0U) -#define USB_OTG_DOEPCTL_MPSIZ_Msk (0x7FFUL << USB_OTG_DOEPCTL_MPSIZ_Pos) /*!< 0x000007FF */ -#define USB_OTG_DOEPCTL_MPSIZ USB_OTG_DOEPCTL_MPSIZ_Msk /*!< Maximum packet size */ /*! Date: Mon, 7 Mar 2022 23:04:47 +0700 Subject: implement dcd_sof_enable() for rp2040 --- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'src/portable') diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index 915822798..f7b105b6e 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -247,6 +247,12 @@ static void dcd_rp2040_irq(void) uint32_t const status = usb_hw->ints; uint32_t handled = 0; + if (status & USB_INTF_DEV_SOF_BITS) + { + handled |= USB_INTF_DEV_SOF_BITS; + dcd_event_sof(0, usb_hw->sof_rd & USB_SOF_RD_BITS, true); + } + // xfer events are handled before setup req. So if a transfer completes immediately // before closing the EP, the events will be delivered in same order. if (status & USB_INTS_BUFF_STATUS_BITS) @@ -424,6 +430,23 @@ void dcd_connect(__unused uint8_t rhport) usb_hw_set->sie_ctrl = USB_SIE_CTRL_PULLUP_EN_BITS; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + + uint32_t inte = usb_hw->inte; + + if (en) + { + inte |= USB_INTS_DEV_SOF_BITS; + }else + { + inte &= ~USB_INTS_DEV_SOF_BITS; + } + + usb_hw->inte = inte; +} + /*------------------------------------------------------------------*/ /* DCD Endpoint port *------------------------------------------------------------------*/ -- cgit v1.3.1 From 606f932d92322a71960f51148ecc91eaf29bf507 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 7 Mar 2022 23:05:05 +0700 Subject: added dcd_sof_enable() stubs for all other ports --- src/portable/bridgetek/ft9xx/dcd_ft9xx.c | 7 +++++++ src/portable/chipidea/ci_hs/dcd_ci_hs.c | 8 ++++++++ src/portable/dialog/da146xx/dcd_da146xx.c | 8 ++++++++ src/portable/espressif/esp32sx/dcd_esp32sx.c | 8 ++++++++ src/portable/mentor/musb/dcd_musb.c | 8 ++++++++ src/portable/microchip/pic32mz/dcd_pic32mz.c | 8 ++++++++ src/portable/microchip/samd/dcd_samd.c | 8 ++++++++ src/portable/microchip/samg/dcd_samg.c | 8 ++++++++ src/portable/microchip/samx7x/dcd_samx7x.c | 8 ++++++++ src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c | 8 ++++++++ src/portable/nordic/nrf5x/dcd_nrf5x.c | 8 ++++++++ src/portable/nuvoton/nuc120/dcd_nuc120.c | 8 ++++++++ src/portable/nuvoton/nuc121/dcd_nuc121.c | 8 ++++++++ src/portable/nuvoton/nuc505/dcd_nuc505.c | 8 ++++++++ src/portable/nxp/khci/dcd_khci.c | 8 ++++++++ src/portable/nxp/lpc17_40/dcd_lpc17_40.c | 8 ++++++++ src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 8 ++++++++ src/portable/nxp/transdimension/dcd_transdimension.c | 8 ++++++++ src/portable/renesas/usba/dcd_usba.c | 8 ++++++++ src/portable/sony/cxd56/dcd_cxd56.c | 8 ++++++++ src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 8 ++++++++ src/portable/st/synopsys/dcd_synopsys.c | 7 +++++++ src/portable/sunxi/dcd_sunxi_musb.c | 8 ++++++++ src/portable/synopsys/dwc2/dcd_dwc2.c | 7 +++++++ src/portable/template/dcd_template.c | 8 ++++++++ src/portable/ti/msp430x5xx/dcd_msp430x5xx.c | 8 ++++++++ src/portable/valentyusb/eptri/dcd_eptri.c | 7 +++++++ 27 files changed, 212 insertions(+) (limited to 'src/portable') diff --git a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c index 791f6cf60..3c3cb63b8 100644 --- a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c +++ b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c @@ -649,6 +649,13 @@ void dcd_disconnect(uint8_t rhport) _ft90x_phy_enable(false); } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} //--------------------------------------------------------------------+ // Endpoint API diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 32c2fc029..41d2f1870 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -266,6 +266,14 @@ void dcd_disconnect(uint8_t rhport) dcd_reg->USBCMD &= ~USBCMD_RUN_STOP; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + //--------------------------------------------------------------------+ // HELPER //--------------------------------------------------------------------+ diff --git a/src/portable/dialog/da146xx/dcd_da146xx.c b/src/portable/dialog/da146xx/dcd_da146xx.c index 919249a09..0bb8b6e41 100644 --- a/src/portable/dialog/da146xx/dcd_da146xx.c +++ b/src/portable/dialog/da146xx/dcd_da146xx.c @@ -882,6 +882,14 @@ void dcd_disconnect(uint8_t rhport) REG_CLR_BIT(USB_MCTRL_REG, USB_NAT); } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + TU_ATTR_ALWAYS_INLINE static inline bool is_in_isr(void) { return (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) != 0; diff --git a/src/portable/espressif/esp32sx/dcd_esp32sx.c b/src/portable/espressif/esp32sx/dcd_esp32sx.c index bd8805dd3..a30fca0d8 100644 --- a/src/portable/espressif/esp32sx/dcd_esp32sx.c +++ b/src/portable/espressif/esp32sx/dcd_esp32sx.c @@ -240,6 +240,14 @@ void dcd_disconnect(uint8_t rhport) USB0.dctl |= USB_SFTDISCON_M; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + /*------------------------------------------------------------------*/ /* DCD Endpoint port *------------------------------------------------------------------*/ diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c index d36585592..0ba53d4d0 100644 --- a/src/portable/mentor/musb/dcd_musb.c +++ b/src/portable/mentor/musb/dcd_musb.c @@ -648,6 +648,14 @@ void dcd_disconnect(uint8_t rhport) USB0->POWER &= ~USB_POWER_SOFTCONN; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + //--------------------------------------------------------------------+ // Endpoint API //--------------------------------------------------------------------+ diff --git a/src/portable/microchip/pic32mz/dcd_pic32mz.c b/src/portable/microchip/pic32mz/dcd_pic32mz.c index 7d48f755b..db93644b1 100644 --- a/src/portable/microchip/pic32mz/dcd_pic32mz.c +++ b/src/portable/microchip/pic32mz/dcd_pic32mz.c @@ -186,6 +186,14 @@ void dcd_disconnect(uint8_t rhport) USB_REGS->POWERbits.SOFTCONN = 1; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + TU_ATTR_ALWAYS_INLINE static inline bool is_in_isr(void) { return (_CP0_GET_STATUS() & (_CP0_STATUS_EXL_MASK | _CP0_STATUS_IPL_MASK)) != 0; diff --git a/src/portable/microchip/samd/dcd_samd.c b/src/portable/microchip/samd/dcd_samd.c index c4ee6f2f5..5ae5a554b 100644 --- a/src/portable/microchip/samd/dcd_samd.c +++ b/src/portable/microchip/samd/dcd_samd.c @@ -180,6 +180,14 @@ void dcd_connect(uint8_t rhport) USB->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_DETACH; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + /*------------------------------------------------------------------*/ /* DCD Endpoint port *------------------------------------------------------------------*/ diff --git a/src/portable/microchip/samg/dcd_samg.c b/src/portable/microchip/samg/dcd_samg.c index 2e9854153..814e680fb 100644 --- a/src/portable/microchip/samg/dcd_samg.c +++ b/src/portable/microchip/samg/dcd_samg.c @@ -210,6 +210,14 @@ void dcd_disconnect(uint8_t rhport) UDP->UDP_TXVC = UDP_TXVC_TXVDIS_Msk; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + //--------------------------------------------------------------------+ // Endpoint API //--------------------------------------------------------------------+ diff --git a/src/portable/microchip/samx7x/dcd_samx7x.c b/src/portable/microchip/samx7x/dcd_samx7x.c index a82f29a88..7507c0f69 100644 --- a/src/portable/microchip/samx7x/dcd_samx7x.c +++ b/src/portable/microchip/samx7x/dcd_samx7x.c @@ -191,6 +191,14 @@ void dcd_disconnect(uint8_t rhport) USB_REG->DEVCTRL &=~(DEVCTRL_ADDEN | DEVCTRL_UADD); } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + static tusb_speed_t get_speed(void) { switch (USB_REG->SR & SR_SPEED) { diff --git a/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c b/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c index 1edcd8458..39b09db68 100644 --- a/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c +++ b/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c @@ -305,6 +305,14 @@ void dcd_disconnect(uint8_t rhport) USB_OTG_FS->CTL = 0; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + //--------------------------------------------------------------------+ // Endpoint API //--------------------------------------------------------------------+ diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index bc145eaa4..430d8eded 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -307,6 +307,14 @@ void dcd_connect(uint8_t rhport) NRF_USBD->USBPULLUP = 1; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + //--------------------------------------------------------------------+ // Endpoint API //--------------------------------------------------------------------+ diff --git a/src/portable/nuvoton/nuc120/dcd_nuc120.c b/src/portable/nuvoton/nuc120/dcd_nuc120.c index 694766613..2fdc05f36 100644 --- a/src/portable/nuvoton/nuc120/dcd_nuc120.c +++ b/src/portable/nuvoton/nuc120/dcd_nuc120.c @@ -497,4 +497,12 @@ void dcd_connect(uint8_t rhport) usb_attach(); } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + #endif diff --git a/src/portable/nuvoton/nuc121/dcd_nuc121.c b/src/portable/nuvoton/nuc121/dcd_nuc121.c index 88d514bce..a56b5f8e8 100644 --- a/src/portable/nuvoton/nuc121/dcd_nuc121.c +++ b/src/portable/nuvoton/nuc121/dcd_nuc121.c @@ -551,4 +551,12 @@ void dcd_connect(uint8_t rhport) usb_attach(); } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + #endif diff --git a/src/portable/nuvoton/nuc505/dcd_nuc505.c b/src/portable/nuvoton/nuc505/dcd_nuc505.c index 498977561..886720e33 100644 --- a/src/portable/nuvoton/nuc505/dcd_nuc505.c +++ b/src/portable/nuvoton/nuc505/dcd_nuc505.c @@ -720,4 +720,12 @@ void dcd_connect(uint8_t rhport) usb_attach(); } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + #endif diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c index 4c7737103..13eb105cd 100644 --- a/src/portable/nxp/khci/dcd_khci.c +++ b/src/portable/nxp/khci/dcd_khci.c @@ -328,6 +328,14 @@ void dcd_disconnect(uint8_t rhport) KHCI->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + //--------------------------------------------------------------------+ // Endpoint API //--------------------------------------------------------------------+ diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c index d2cce2db3..0894a5eeb 100644 --- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c +++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c @@ -228,6 +228,14 @@ void dcd_disconnect(uint8_t rhport) sie_write(SIE_CMDCODE_DEVICE_STATUS, 1, 0); } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + //--------------------------------------------------------------------+ // CONTROL HELPER //--------------------------------------------------------------------+ diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index 55d872dc0..09ebf3b0d 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -277,6 +277,14 @@ void dcd_disconnect(uint8_t rhport) dcd_reg->DEVCMDSTAT &= ~CMDSTAT_DEVICE_CONNECT_MASK; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + //--------------------------------------------------------------------+ // DCD Endpoint Port //--------------------------------------------------------------------+ diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c index 108baf99d..2347e1dae 100644 --- a/src/portable/nxp/transdimension/dcd_transdimension.c +++ b/src/portable/nxp/transdimension/dcd_transdimension.c @@ -294,6 +294,14 @@ void dcd_disconnect(uint8_t rhport) dcd_reg->USBCMD &= ~USBCMD_RUN_STOP; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + //--------------------------------------------------------------------+ // HELPER //--------------------------------------------------------------------+ diff --git a/src/portable/renesas/usba/dcd_usba.c b/src/portable/renesas/usba/dcd_usba.c index 330f65348..fa87c9f4d 100644 --- a/src/portable/renesas/usba/dcd_usba.c +++ b/src/portable/renesas/usba/dcd_usba.c @@ -687,6 +687,14 @@ void dcd_disconnect(uint8_t rhport) USB0.SYSCFG.BIT.DPRPU = 0; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + //--------------------------------------------------------------------+ // Endpoint API //--------------------------------------------------------------------+ diff --git a/src/portable/sony/cxd56/dcd_cxd56.c b/src/portable/sony/cxd56/dcd_cxd56.c index fbea03b1d..6aa0efb21 100644 --- a/src/portable/sony/cxd56/dcd_cxd56.c +++ b/src/portable/sony/cxd56/dcd_cxd56.c @@ -247,6 +247,14 @@ void dcd_disconnect(uint8_t rhport) DEV_DISCONNECT(usbdev); } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + //--------------------------------------------------------------------+ // Endpoint API //--------------------------------------------------------------------+ diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index f201a02cf..836711974 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -287,6 +287,14 @@ void dcd_connect(uint8_t rhport) } #endif +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + // Enable device interrupt void dcd_int_enable (uint8_t rhport) { diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index d7f659340..2fc3adb4f 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -602,6 +602,13 @@ void dcd_disconnect(uint8_t rhport) dev->DCTL |= USB_OTG_DCTL_SDIS; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} /*------------------------------------------------------------------*/ /* DCD Endpoint port diff --git a/src/portable/sunxi/dcd_sunxi_musb.c b/src/portable/sunxi/dcd_sunxi_musb.c index 27514339b..a0be846a5 100644 --- a/src/portable/sunxi/dcd_sunxi_musb.c +++ b/src/portable/sunxi/dcd_sunxi_musb.c @@ -909,6 +909,14 @@ void dcd_disconnect(uint8_t rhport) USBC_REG_clear_bit_b(USBC_BP_POWER_D_SOFT_CONNECT, USBC_REG_PCTL(USBC0_BASE)); } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + void dcd_int_enable(uint8_t rhport) { (void)rhport; diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index c71f38d2d..37712d2d9 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -588,6 +588,13 @@ void dcd_disconnect(uint8_t rhport) dwc2->dctl |= DCTL_SDIS; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} /*------------------------------------------------------------------*/ /* DCD Endpoint port diff --git a/src/portable/template/dcd_template.c b/src/portable/template/dcd_template.c index 977369300..26b5dce9d 100644 --- a/src/portable/template/dcd_template.c +++ b/src/portable/template/dcd_template.c @@ -82,6 +82,14 @@ void dcd_disconnect(uint8_t rhport) (void) rhport; } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + //--------------------------------------------------------------------+ // Endpoint API //--------------------------------------------------------------------+ diff --git a/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c b/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c index c3b3b2403..605c13b4a 100644 --- a/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c +++ b/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c @@ -222,6 +222,14 @@ void dcd_disconnect(uint8_t rhport) dcd_int_enable(rhport); } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + /*------------------------------------------------------------------*/ /* DCD Endpoint port *------------------------------------------------------------------*/ diff --git a/src/portable/valentyusb/eptri/dcd_eptri.c b/src/portable/valentyusb/eptri/dcd_eptri.c index dfadfdcb3..e368b5f39 100644 --- a/src/portable/valentyusb/eptri/dcd_eptri.c +++ b/src/portable/valentyusb/eptri/dcd_eptri.c @@ -401,6 +401,13 @@ void dcd_disconnect(uint8_t rhport) usb_pullup_out_write(0); } +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} //--------------------------------------------------------------------+ // DCD Endpoint Port -- cgit v1.3.1 From f212899b54740479eff225d89432d88f0a14f17e Mon Sep 17 00:00:00 2001 From: Reinhard Panhuber Date: Mon, 14 Mar 2022 20:40:33 +0100 Subject: Add SOF callback function for feedback value determination in uac - wip! --- src/class/audio/audio_device.c | 83 +++++++++++++++++++++++++++++++++++ src/class/audio/audio_device.h | 23 +++++++++- src/device/usbd.c | 22 ++++++++-- src/device/usbd_pvt.h | 5 ++- src/portable/synopsys/dwc2/dcd_dwc2.c | 32 ++++++++++++-- 5 files changed, 156 insertions(+), 9 deletions(-) (limited to 'src/portable') diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index 06979b09e..0828f2e6f 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -306,6 +306,13 @@ typedef struct #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP uint32_t fb_val; // Feedback value for asynchronous mode (in 16.16 format). + +#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_WITHIN_SOF_ISR + uint8_t n_frames; // Number of (micro)frames used to estimate feedback value + uint8_t n_frames_current; // Current (micro)frame number + uint32_t feeback_param_factor; // TODO: Set this value within some new tud_audio_set_feedback_params_fm_fs function as feeback_param_factor = f_s / (f_cpu * n_frames)! +#endif + #endif #endif @@ -421,6 +428,10 @@ static inline uint8_t tu_desc_subtype(void const* desc) } #endif +#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_WITHIN_SOF_ISR +static bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback); +#endif + bool tud_audio_n_mounted(uint8_t func_id) { TU_VERIFY(func_id < CFG_TUD_AUDIO); @@ -1658,6 +1669,11 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const * { audio->ep_fb = ep_addr; +#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_WITHIN_SOF_ISR + usbd_sof_enable(rhport, true); // Enable SOF interrupt + audio->n_frames_current = 0; +#endif + // Invoke callback after ep_out is set if (audio->ep_out != 0) { @@ -1682,6 +1698,23 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const * p_desc = tu_desc_next(p_desc); } + // Disable SOF interrupt if no driver has any enabled feedback EP +#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP && CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_WITHIN_SOF_ISR + + bool disable = true; + + for(uint8_t i=0; i < CFG_TUD_AUDIO; i++) + { + if (_audiod_fct[i].ep_fb != 0) + { + disable = false; + } + } + + if (disable) usbd_sof_enable(rhport, false); + +#endif + tud_control_status(rhport, p_request); return true; @@ -1970,6 +2003,52 @@ bool audiod_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint3 return false; } +#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP && CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_WITHIN_SOF_ISR +bool tud_audio_set_feedback_params_fm_fs(uint8_t func_id, uint32_t f_m, uint32_t f_s) +{ + audiod_function_t* audio = &_audiod_fct[func_id]; + uint8_t n_frame = 1; // TODO: finalize that + audio->n_frames = n_frame; + audio->feeback_param_factor = f_s / f_m / n_frame; // TODO: Check the 16.16 precision! + return true; +} +#endif + +void audiod_sof (uint8_t rhport, uint32_t frame_count) +{ + (void) rhport; + (void) frame_count; + +#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP && CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_WITHIN_SOF_ISR + + // Determine feedback value - The feedback method is described in 5.12.4.2 of the USB 2.0 spec + // Boiled down, the feedback value Ff = n_samples / (micro)frame. + // Since an accuracy of less than 1 Sample / second is desired, at least n_frames = ceil(2^K * f_s / f_cpu) frames need to be measured, where K = 10 for full speed and K = 13 for high speed, f_s is the sampling frequency e.g. 48 kHz and f_cpu is the cpu clock frequency e.g. 100 MHz (or any other master clock whose clock count is available and locked to f_s) + // The update interval in the (4.10.2.1) Feedback Endpoint Descriptor must be less or equal to 2^(K - P), where P = min( ceil(log2(f_cpu / f_s)), K) + // Ff = n_cycles / n_frames * f_s / f_cpu in 16.16 format, where n_cycles are the number of CPU cycles within n_frames + + // Iterate over audio functions and set feedback value + for(uint8_t i=0; i < CFG_TUD_AUDIO; i++) + { + audiod_function_t* audio = &_audiod_fct[i]; + + if (audio->ep_fb != 0) + { + audio->n_frames_current++; + if (audio->n_frames_current == audio->n_frames) + { + uint32_t n_cylces = tud_audio_n_get_fm_n_cycles_cb(rhport, audio->ep_fb); + uint32_t feedback = n_cylces * audio->feeback_param_factor; + + tud_audio_n_fb_set(i, feedback); + audio->n_frames_current = 0; + } + } + } + +#endif +} + bool tud_audio_buffer_and_schedule_control_xfer(uint8_t rhport, tusb_control_request_t const * p_request, void* data, uint16_t len) { // Handles only sending of data not receiving @@ -2247,7 +2326,11 @@ static void audiod_parse_for_AS_params(audiod_function_t* audio, uint8_t const * #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP +#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_WITHIN_SOF_ISR +static bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback) +#else bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback) +#endif { TU_VERIFY(func_id < CFG_TUD_AUDIO && _audiod_fct[func_id].p_desc != NULL); diff --git a/src/class/audio/audio_device.h b/src/class/audio/audio_device.h index f406cf281..c9d711a36 100644 --- a/src/class/audio/audio_device.h +++ b/src/class/audio/audio_device.h @@ -191,6 +191,11 @@ #define CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION 0 // 0 or 1 #endif +// Determine feedback value within SOF ISR within audio driver - if disabled the user has to call tud_audio_n_fb_set() with a suitable feedback value on its own. If done within audio driver SOF ISR, tud_audio_n_fb_set() is disabled for user +#ifndef CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_WITHIN_SOF_ISR +#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_WITHIN_SOF_ISR 1 // 0 or 1 +#endif + // Audio interrupt control EP size - disabled if 0 #ifndef CFG_TUD_AUDIO_INT_CTR_EPSIZE_IN #define CFG_TUD_AUDIO_INT_CTR_EPSIZE_IN 0 // Audio interrupt control - if required - 6 Bytes according to UAC 2 specification (p. 74) @@ -468,8 +473,23 @@ TU_ATTR_WEAK bool tud_audio_fb_done_cb(uint8_t rhport); // // Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0 devices. On Linux and macOS it seems the // driver can work with either format. So a good compromise is to keep format correction disabled and stick to 16.16 format. + +// Feedback value can be determined from within the SOF ISR of the audio driver. This should reduce jitter. If the feature is used, the user can not set the feedback value. +# if !CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_WITHIN_SOF_ISR bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback); static inline bool tud_audio_fb_set(uint32_t feedback); +# else + +// This callback function is called once the feedback value needs to be updated within the SOF ISR in the audio class. To determine the feedback value, some +// parameters need to be given. The user must implement this callback function and provide the current cycle count of the master clock. +// The feedback endpoint number can be used to identify the correct audio function in case multiple audio functions were defined. +TU_ATTR_WEAK uint32_t tud_audio_n_get_fm_n_cycles_cb(uint8_t rhport, uint8_t ep_fb); + +// f_m : Main clock frequency in Hz i.e. master clock to which sample clock is locked +// f_s : Current sample rate in Hz +bool tud_audio_set_feedback_params_fm_fs(uint8_t func_id, uint32_t f_m, uint32_t f_s); +#endif + #endif #if CFG_TUD_AUDIO_INT_CTR_EPSIZE_IN @@ -611,7 +631,7 @@ static inline uint16_t tud_audio_int_ctr_write(uint8_t const* buffer, uint16_t l } #endif -#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP +#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP && !CFG_TUD_AUDIO_ENABLE_FEEDBACK_DETERMINATION_WITHIN_SOF_ISR static inline bool tud_audio_fb_set(uint32_t feedback) { return tud_audio_n_fb_set(0, feedback); @@ -626,6 +646,7 @@ void audiod_reset (uint8_t rhport); uint16_t audiod_open (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len); bool audiod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request); bool audiod_xfer_cb (uint8_t rhport, uint8_t edpt_addr, xfer_result_t result, uint32_t xferred_bytes); +void audiod_sof (uint8_t rhport, uint32_t frame_count); #ifdef __cplusplus } diff --git a/src/device/usbd.c b/src/device/usbd.c index 8662d5b84..170342072 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -139,7 +139,7 @@ static usbd_class_driver_t const _usbd_driver[] = .open = audiod_open, .control_xfer_cb = audiod_control_xfer_cb, .xfer_cb = audiod_xfer_cb, - .sof = NULL + .sof = audiod_sof }, #endif @@ -612,7 +612,7 @@ void tud_task (void) for ( uint8_t i = 0; i < TOTAL_DRIVER_COUNT; i++ ) { usbd_class_driver_t const * driver = get_driver(i); - if ( driver->sof ) driver->sof(event.rhport); + if ( driver->sof ) driver->sof(event.rhport, event.sof.frame_count); } break; @@ -1131,7 +1131,18 @@ void dcd_event_handler(dcd_event_t const * event, bool in_isr) break; case DCD_EVENT_SOF: - // SOF Handler + // SOF driver handler in ISR context + for (uint8_t i = 0; i < TOTAL_DRIVER_COUNT; i++) + { + usbd_class_driver_t const * driver = get_driver(i); + if (driver->sof) + { + driver->sof(event->rhport, event->sof.frame_count); + // TU_LOG2("%s sof\r\n", driver->name); // too demanding + } + } + + // SOF user handler in ISR context if (_sof_isr) _sof_isr(event->sof.frame_count); // Some MCUs after running dcd_remote_wakeup() does not have way to detect the end of remote wakeup @@ -1441,4 +1452,9 @@ void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr) return; } +void usbd_sof_enable(uint8_t rhport, bool en) +{ + dcd_sof_enable(rhport, en); +} + #endif diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h index dae95cebb..f9fb543df 100644 --- a/src/device/usbd_pvt.h +++ b/src/device/usbd_pvt.h @@ -48,7 +48,7 @@ typedef struct uint16_t (* open ) (uint8_t rhport, tusb_desc_interface_t const * desc_intf, uint16_t max_len); bool (* control_xfer_cb ) (uint8_t rhport, uint8_t stage, tusb_control_request_t const * request); bool (* xfer_cb ) (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes); - void (* sof ) (uint8_t rhport); /* optional */ + void (* sof ) (uint8_t rhport, uint32_t frame_count); /* optional */ } usbd_class_driver_t; // Invoked when initializing device stack to get additional class drivers. @@ -102,6 +102,9 @@ bool usbd_edpt_ready(uint8_t rhport, uint8_t ep_addr) return !usbd_edpt_busy(rhport, ep_addr) && !usbd_edpt_stalled(rhport, ep_addr); } +// Enable SOF interrupt +void usbd_sof_enable(uint8_t rhport, bool en); + /*------------------------------------------------------------------*/ /* Helper *------------------------------------------------------------------*/ diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index 37712d2d9..d92b17703 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -93,6 +93,9 @@ static uint16_t ep0_pending[2]; // Index determines direction static uint16_t _allocated_fifo_words_tx; // TX FIFO size in words (IN EPs) static bool _out_ep_closed; // Flag to check if RX FIFO size needs an update (reduce its size) +// SOF enabling flag - required for SOF to not get disabled in ISR when SOF was enabled by +static bool _sof_en; + // Calculate the RX FIFO size according to recommendations from reference manual static inline uint16_t calc_rx_ff_size(uint16_t ep_size) { @@ -126,6 +129,8 @@ static void bus_reset(uint8_t rhport) tu_memclr(xfer_status, sizeof(xfer_status)); _out_ep_closed = false; + _sof_en = false; + // clear device address dwc2->dcfg &= ~DCFG_DAD_Msk; @@ -588,12 +593,23 @@ void dcd_disconnect(uint8_t rhport) dwc2->dctl |= DCTL_SDIS; } +// Be advised: audio, video and possibly other iso-ep classes use dcd_sof_enable() to enable/disable its corresponding ISR on purpose! void dcd_sof_enable(uint8_t rhport, bool en) { (void) rhport; - (void) en; + dwc2_regs_t * dwc2 = DWC2_REG(rhport); + + _sof_en = en; - // TODO implement later + if (en) + { + dwc2->gintsts = GINTSTS_SOF; + dwc2->gintmsk |= GINTMSK_SOFM; + } + else + { + dwc2->gintmsk &= ~GINTMSK_SOFM; + } } /*------------------------------------------------------------------*/ @@ -1258,8 +1274,16 @@ void dcd_int_handler(uint8_t rhport) { dwc2->gotgint = GINTSTS_SOF; - // Disable SOF interrupt since currently only used for remote wakeup detection - dwc2->gintmsk &= ~GINTMSK_SOFM; + if (_sof_en) + { + uint32_t frame = (dwc2->dsts & (USB_OTG_DSTS_FNSOF)) >> 8; + dcd_event_sof(rhport, frame, true); + } + else + { + // Disable SOF interrupt if SOF was not explicitly enabled. SOF was used for remote wakeup detection + dwc2->gintmsk &= ~GINTMSK_SOFM; + } dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); } -- cgit v1.3.1 From 9fde8f2d9e311afc6ea3707f1ac3b245e0816a4c Mon Sep 17 00:00:00 2001 From: Reinhard Panhuber Date: Wed, 16 Mar 2022 07:53:47 +0100 Subject: Fix DSTS_FNSOF in dwc2.c --- src/portable/synopsys/dwc2/dcd_dwc2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/portable') diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index d92b17703..ccc16d643 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -1276,7 +1276,7 @@ void dcd_int_handler(uint8_t rhport) if (_sof_en) { - uint32_t frame = (dwc2->dsts & (USB_OTG_DSTS_FNSOF)) >> 8; + uint32_t frame = (dwc2->dsts & (DSTS_FNSOF)) >> 8; dcd_event_sof(rhport, frame, true); } else -- cgit v1.3.1 From e2f0aef93b246368e1f6bdf101604e73d252801a Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 30 Mar 2022 16:41:55 +0700 Subject: make use pio_usb_port_reset_start/end --- hw/bsp/rp2040/family.cmake | 1 + src/portable/raspberrypi/pio/hcd_pio.c | 10 ++-------- 2 files changed, 3 insertions(+), 8 deletions(-) (limited to 'src/portable') diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index 23ea893b7..b56ee6a6d 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -91,6 +91,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker) ${TOP}/src/portable/raspberrypi/pio/hcd_pio.c ${TOP}/lib/Pico-PIO-USB/pio_usb.c + ${TOP}/lib/Pico-PIO-USB/pio_usb_port.c ${TOP}/lib/Pico-PIO-USB/usb_crc.c ) diff --git a/src/portable/raspberrypi/pio/hcd_pio.c b/src/portable/raspberrypi/pio/hcd_pio.c index 8d1903f85..e4a4e2450 100644 --- a/src/portable/raspberrypi/pio/hcd_pio.c +++ b/src/portable/raspberrypi/pio/hcd_pio.c @@ -53,8 +53,6 @@ extern pio_port_t pio_port[1]; extern root_port_t root_port[PIO_USB_ROOT_PORT_CNT]; extern endpoint_t ep_pool[PIO_USB_EP_POOL_CNT]; - -extern port_pin_status_t get_port_pin_status( root_port_t *port); extern void configure_fullspeed_host( pio_port_t *pp, const pio_usb_configuration_t *c, root_port_t *port); extern void configure_lowspeed_host( pio_port_t *pp, const pio_usb_configuration_t *c, root_port_t *port); @@ -83,10 +81,7 @@ void hcd_port_reset(uint8_t rhport) pio_port_t *pp = &pio_port[0]; root_port_t *root = &root_port[rhport]; - pio_sm_set_pins_with_mask(pp->pio_usb_tx, pp->sm_tx, (0b00 << root->pin_dp), - (0b11u << root->pin_dp)); - pio_sm_set_pindirs_with_mask(pp->pio_usb_tx, pp->sm_tx, (0b11u << root->pin_dp), - (0b11u << root->pin_dp)); + pio_usb_port_reset_start(root, pp); } void hcd_port_reset_end(uint8_t rhport) @@ -96,8 +91,7 @@ void hcd_port_reset_end(uint8_t rhport) pio_port_t *pp = &pio_port[0]; root_port_t *root = &root_port[rhport]; - pio_sm_set_pindirs_with_mask(pp->pio_usb_tx, pp->sm_tx, (0b00u << root->pin_dp), - (0b11u << root->pin_dp)); + pio_usb_port_reset_end(root, pp); busy_wait_us(100); -- cgit v1.3.1 From e94d11a5b39cae08f39722eaa5f6ac4d527a329b Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 31 Mar 2022 12:56:53 +0700 Subject: implement pio_usb_irq_handler --- lib/Pico-PIO-USB | 2 +- src/portable/raspberrypi/pio/hcd_pio.c | 26 +++++++++++++++++++++++--- 2 files changed, 24 insertions(+), 4 deletions(-) (limited to 'src/portable') diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index 92268187f..4220c05dc 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit 92268187f3b0490a43d139ed2cb598b06258011f +Subproject commit 4220c05dc6b7ab7b4db33e5e05bb66be7b6c7156 diff --git a/src/portable/raspberrypi/pio/hcd_pio.c b/src/portable/raspberrypi/pio/hcd_pio.c index e4a4e2450..254acf1d2 100644 --- a/src/portable/raspberrypi/pio/hcd_pio.c +++ b/src/portable/raspberrypi/pio/hcd_pio.c @@ -101,7 +101,7 @@ void hcd_port_reset_end(uint8_t rhport) if (fullspeed_flag && get_port_pin_status(root) == PORT_PIN_FS_IDLE) { root->root_device = &usb_device[0]; if (!root->root_device->connected) { - configure_fullspeed_host(pp, &pio_host_config, root); +// configure_fullspeed_host(pp, &pio_host_config, root); root->root_device->is_fullspeed = true; root->root_device->is_root = true; root->root_device->connected = true; @@ -111,7 +111,7 @@ void hcd_port_reset_end(uint8_t rhport) } else if (!fullspeed_flag && get_port_pin_status(root) == PORT_PIN_LS_IDLE) { root->root_device = &usb_device[0]; if (!root->root_device->connected) { - configure_lowspeed_host(pp, &pio_host_config, root); +// configure_lowspeed_host(pp, &pio_host_config, root); root->root_device->is_fullspeed = false; root->root_device->is_root = true; root->root_device->connected = true; @@ -217,6 +217,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet return false; } + bool hcd_edpt_control_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8], uint8_t* data) { int ret; @@ -242,7 +243,6 @@ bool hcd_edpt_control_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t const setup return ret == 0; } - //bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) //{ // // EPX is shared, so multiple device addresses and endpoint addresses share that @@ -265,4 +265,24 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) return true; } +// IRQ Handler +void pio_usb_irq_handler(uint8_t root_id) +{ + root_port_t* port = PIO_USB(root_id); + + if ( port->ints & PIO_USB_INTS_CONNECT_BITS ) + { + hcd_event_device_attach(root_id+1, true); + + port->ints &= ~PIO_USB_INTS_CONNECT_BITS; + } + + if ( port->ints & PIO_USB_INTS_DISCONNECT_BITS ) + { + hcd_event_device_remove(root_id+1, true); + + port->ints &= ~PIO_USB_INTS_DISCONNECT_BITS; + } +} + #endif -- cgit v1.3.1 From 75bca96bc630b98723c9f4bbb4958dac22ac594d Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 1 Apr 2022 16:01:24 +0700 Subject: pio usb control work well including stall response --- src/host/hcd.h | 4 -- src/host/usbh.c | 16 ++--- src/portable/raspberrypi/pio/hcd_pio.c | 116 ++++++++++++++++++++------------- 3 files changed, 77 insertions(+), 59 deletions(-) (limited to 'src/portable') diff --git a/src/host/hcd.h b/src/host/hcd.h index 0e18351fc..9b41f2447 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -153,10 +153,6 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * // Submit a special transfer to send 8-byte Setup Packet, when complete hcd_event_xfer_complete() must be invoked bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]); -// Optional: some controllers are capable of carry out the whole Control Transfer (setup, data, status) -// without help of USBH. -bool hcd_edpt_control_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8], uint8_t* data) TU_ATTR_WEAK; - // clear stall, data toggle is also reset to DATA0 bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr); diff --git a/src/host/usbh.c b/src/host/usbh.c index b388a4c08..520ef4c7d 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -543,19 +543,12 @@ bool tuh_control_xfer (tuh_xfer_t* xfer) const uint8_t rhport = usbh_get_rhport(daddr); TU_LOG2("[%u:%u] %s: ", rhport, daddr, xfer->setup->bRequest <= TUSB_REQ_SYNCH_FRAME ? tu_str_std_request[xfer->setup->bRequest] : "Unknown Request"); - TU_LOG2_VAR(&xfer->setup); + TU_LOG2_VAR(xfer->setup); TU_LOG2("\r\n"); if (xfer->complete_cb) { - if ( hcd_edpt_control_xfer ) - { - _ctrl_xfer.stage = CONTROL_STAGE_ACK; - TU_ASSERT( hcd_edpt_control_xfer(rhport, daddr, (uint8_t const*) &_ctrl_xfer.request, _ctrl_xfer.buffer) ); - }else - { - TU_ASSERT( hcd_setup_send(rhport, daddr, (uint8_t const*) &_ctrl_xfer.request) ); - } + TU_ASSERT( hcd_setup_send(rhport, daddr, (uint8_t const*) &_ctrl_xfer.request) ); }else { // blocking if complete callback is not provided @@ -643,7 +636,8 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result { // DATA stage: initial data toggle is always 1 _set_control_xfer_stage(CONTROL_STAGE_DATA); - return hcd_edpt_xfer(rhport, dev_addr, tu_edpt_addr(0, request->bmRequestType_bit.direction), _ctrl_xfer.buffer, request->wLength); + TU_ASSERT( hcd_edpt_xfer(rhport, dev_addr, tu_edpt_addr(0, request->bmRequestType_bit.direction), _ctrl_xfer.buffer, request->wLength) ); + return true; } __attribute__((fallthrough)); @@ -658,7 +652,7 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result // ACK stage: toggle is always 1 _set_control_xfer_stage(CONTROL_STAGE_ACK); - hcd_edpt_xfer(rhport, dev_addr, tu_edpt_addr(0, 1-request->bmRequestType_bit.direction), NULL, 0); + TU_ASSERT( hcd_edpt_xfer(rhport, dev_addr, tu_edpt_addr(0, 1-request->bmRequestType_bit.direction), NULL, 0) ); break; case CONTROL_STAGE_ACK: diff --git a/src/portable/raspberrypi/pio/hcd_pio.c b/src/portable/raspberrypi/pio/hcd_pio.c index 254acf1d2..4eff490c8 100644 --- a/src/portable/raspberrypi/pio/hcd_pio.c +++ b/src/portable/raspberrypi/pio/hcd_pio.c @@ -53,15 +53,6 @@ extern pio_port_t pio_port[1]; extern root_port_t root_port[PIO_USB_ROOT_PORT_CNT]; extern endpoint_t ep_pool[PIO_USB_EP_POOL_CNT]; -extern void configure_fullspeed_host( pio_port_t *pp, const pio_usb_configuration_t *c, root_port_t *port); -extern void configure_lowspeed_host( pio_port_t *pp, const pio_usb_configuration_t *c, root_port_t *port); - -extern void control_setup_transfer( const pio_port_t *pp, uint8_t device_address, uint8_t *tx_data_address, uint8_t tx_data_len); -extern int control_in_protocol( usb_device_t *device, uint8_t *tx_data, uint16_t tx_length, uint8_t *rx_buffer, uint16_t request_length); -extern int control_out_protocol( usb_device_t *device, uint8_t *setup_data, uint16_t setup_length, uint8_t *out_data, uint16_t out_length); - -extern void update_packet_crc16(usb_setup_packet_t * packet); - //--------------------------------------------------------------------+ // HCD API //--------------------------------------------------------------------+ @@ -157,12 +148,15 @@ void hcd_int_disable(uint8_t rhport) // Endpoint API //--------------------------------------------------------------------+ -bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) +bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep) { rhport = RHPORT_PIO(rhport); usb_device_t *device = &usb_device[0]; + return pio_usb_endpoint_open(rhport, dev_addr, (uint8_t const*) desc_ep); + +#if 0 static uint8_t ep_id_idx; // TODO remove later if (ep_desc->bEndpointAddress == 0) @@ -202,45 +196,19 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const } return true; +#endif } bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) { - (void) rhport; - - return true; + rhport = RHPORT_PIO(rhport); + return pio_usb_endpoint_transfer(rhport, dev_addr, ep_addr, buffer, buflen); } bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) { - (void) rhport; - return false; -} - - -bool hcd_edpt_control_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8], uint8_t* data) -{ - int ret; rhport = RHPORT_PIO(rhport); - - uint16_t const len = ((tusb_control_request_t const*) setup_packet)->wLength; - - usb_setup_packet_t pio_setup = { USB_SYNC, USB_PID_DATA0 }; - memcpy(&pio_setup.request_type, setup_packet, 8); - update_packet_crc16(&pio_setup); - - if (setup_packet[0] & TUSB_DIR_IN_MASK) - { - ret = control_in_protocol(&usb_device[0], (uint8_t*) &pio_setup, sizeof(pio_setup), data, len); - }else - { - ret = control_out_protocol(&usb_device[0], (uint8_t*) &pio_setup, sizeof(pio_setup), data, len); - } - - // TODO current pio is blocking - hcd_event_xfer_complete(dev_addr, 0, 0, ret ? XFER_RESULT_FAILED : XFER_RESULT_SUCCESS, false); - - return ret == 0; + return pio_usb_endpoint_send_setup(rhport, dev_addr, setup_packet); } //bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) @@ -265,23 +233,83 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) return true; } +void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* port, uint32_t flag) +{ + volatile uint32_t* ep_reg; + xfer_result_t result; + + if ( flag == PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) + { + ep_reg = &port->ep_complete; + result = XFER_RESULT_SUCCESS; + } + else if ( flag == PIO_USB_INTS_ENDPOINT_ERROR_BITS ) + { + ep_reg = &port->ep_error; + result = XFER_RESULT_FAILED; + } + else if ( flag == PIO_USB_INTS_ENDPOINT_STALLED_BITS ) + { + ep_reg = &port->ep_stalled; + result = XFER_RESULT_STALLED; + } + else + { + // something wrong + return; + } + + const uint32_t ep_all = *ep_reg; + + for(uint8_t ep_idx = 0; ep_idx < PIO_USB_EP_POOL_CNT; ep_idx++) + { + uint32_t const mask = (1u << ep_idx); + + if (ep_all & mask) + { + endpoint_t* ep = PIO_USB_EP(ep_idx); + hcd_event_xfer_complete(ep->dev_addr, ep->ep_num, ep->actual_len, result, true); + } + } + + // clear all + (*ep_reg) &= ~ep_all; +} + // IRQ Handler -void pio_usb_irq_handler(uint8_t root_id) +void __no_inline_not_in_flash_func(pio_usb_host_irq_handler)(uint8_t root_id) { root_port_t* port = PIO_USB(root_id); if ( port->ints & PIO_USB_INTS_CONNECT_BITS ) { - hcd_event_device_attach(root_id+1, true); - port->ints &= ~PIO_USB_INTS_CONNECT_BITS; + + hcd_event_device_attach(root_id+1, true); } if ( port->ints & PIO_USB_INTS_DISCONNECT_BITS ) { + port->ints &= ~PIO_USB_INTS_DISCONNECT_BITS; hcd_event_device_remove(root_id+1, true); + } - port->ints &= ~PIO_USB_INTS_DISCONNECT_BITS; + if ( port->ints & PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) + { + port->ints &= ~PIO_USB_INTS_ENDPOINT_COMPLETE_BITS; + handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_COMPLETE_BITS); + } + + if ( port->ints & PIO_USB_INTS_ENDPOINT_ERROR_BITS ) + { + port->ints &= ~PIO_USB_INTS_ENDPOINT_ERROR_BITS; + handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_ERROR_BITS); + } + + if ( port->ints & PIO_USB_INTS_ENDPOINT_STALLED_BITS ) + { + port->ints &= ~PIO_USB_INTS_ENDPOINT_STALLED_BITS; + handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_STALLED_BITS); } } -- cgit v1.3.1 From e6e3dfedc815007d07ea455df04569604d87a856 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 1 Apr 2022 16:34:36 +0700 Subject: hid example work well --- lib/Pico-PIO-USB | 2 +- src/class/hid/hid_host.c | 2 +- src/host/usbh.c | 2 +- src/portable/raspberrypi/pio/hcd_pio.c | 42 ---------------------------------- 4 files changed, 3 insertions(+), 45 deletions(-) (limited to 'src/portable') diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index 4220c05dc..650130ab3 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit 4220c05dc6b7ab7b4db33e5e05bb66be7b6c7156 +Subproject commit 650130ab312e0dc9337dc52cccf34d35875abdf7 diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index ce3d1598c..2573f5a6b 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -329,7 +329,7 @@ bool hidh_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *de TU_VERIFY(TUSB_CLASS_HID == desc_itf->bInterfaceClass); - TU_LOG2("HID opening Interface %u (addr = %u)\r\n", desc_itf->bInterfaceNumber, dev_addr); + TU_LOG2("[%u] HID opening Interface %u\r\n", dev_addr, desc_itf->bInterfaceNumber); // len = interface + hid + n*endpoints uint16_t const drv_len = sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + desc_itf->bNumEndpoints*sizeof(tusb_desc_endpoint_t); diff --git a/src/host/usbh.c b/src/host/usbh.c index 520ef4c7d..c127ef310 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -792,7 +792,7 @@ bool usbh_edpt_xfer_with_callback(uint8_t dev_addr, uint8_t ep_addr, uint8_t * b static bool usbh_edpt_control_open(uint8_t dev_addr, uint8_t max_packet_size) { - TU_LOG2("Open EP0 with Size = %u (addr = %u)\r\n", max_packet_size, dev_addr); + TU_LOG2("[%u] Open EP0 with Size = %u\r\n", dev_addr, max_packet_size); tusb_desc_endpoint_t ep0_desc = { diff --git a/src/portable/raspberrypi/pio/hcd_pio.c b/src/portable/raspberrypi/pio/hcd_pio.c index 4eff490c8..037ebc132 100644 --- a/src/portable/raspberrypi/pio/hcd_pio.c +++ b/src/portable/raspberrypi/pio/hcd_pio.c @@ -155,48 +155,6 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const usb_device_t *device = &usb_device[0]; return pio_usb_endpoint_open(rhport, dev_addr, (uint8_t const*) desc_ep); - -#if 0 - static uint8_t ep_id_idx; // TODO remove later - - if (ep_desc->bEndpointAddress == 0) - { - device->event = EVENT_NONE; - device->address = dev_addr; - - ep_id_idx = 0; - }else if (ep_desc->bmAttributes.xfer == TUSB_XFER_INTERRUPT) // only support interrupt endpoint - { - endpoint_t *ep = NULL; - for ( int ep_pool_idx = 0; ep_pool_idx < PIO_USB_EP_POOL_CNT; ep_pool_idx++ ) - { - if ( ep_pool[ep_pool_idx].ep_num == 0 ) - { - ep = &ep_pool[ep_pool_idx]; - device->endpoint_id[ep_id_idx] = ep_pool_idx + 1; - ep_id_idx++; - - ep->data_id = 0; - ep->ep_num = ep_desc->bEndpointAddress; - ep->interval = ep_desc->bInterval; - ep->interval_counter = 0; - ep->size = (uint8_t) tu_edpt_packet_size(ep_desc); - ep->attr = EP_ATTR_INTERRUPT; - - break; - } - } - -// TU_LOG1_INT(device->connected); -// TU_LOG1_INT(device->root); -// TU_LOG1_INT(device->is_root); -// TU_LOG1_INT(device->is_fullspeed); -// -// TU_LOG1_INT(ep_id_idx); - } - - return true; -#endif } bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) -- cgit v1.3.1 From db6cba6a7bdf82f8c131fa2c521b86b10b4d053e Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 1 Apr 2022 16:38:41 +0700 Subject: rename pio to pio_usb --- hw/bsp/rp2040/family.cmake | 2 +- src/portable/raspberrypi/pio/hcd_pio.c | 274 ------------------------- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 274 +++++++++++++++++++++++++ 3 files changed, 275 insertions(+), 275 deletions(-) delete mode 100644 src/portable/raspberrypi/pio/hcd_pio.c create mode 100644 src/portable/raspberrypi/pio_usb/hcd_pio_usb.c (limited to 'src/portable') diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index b56ee6a6d..4cec645a2 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -89,7 +89,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker) ${TOP}/src/class/msc/msc_host.c ${TOP}/src/class/vendor/vendor_host.c - ${TOP}/src/portable/raspberrypi/pio/hcd_pio.c + ${TOP}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c ${TOP}/lib/Pico-PIO-USB/pio_usb.c ${TOP}/lib/Pico-PIO-USB/pio_usb_port.c ${TOP}/lib/Pico-PIO-USB/usb_crc.c diff --git a/src/portable/raspberrypi/pio/hcd_pio.c b/src/portable/raspberrypi/pio/hcd_pio.c deleted file mode 100644 index 037ebc132..000000000 --- a/src/portable/raspberrypi/pio/hcd_pio.c +++ /dev/null @@ -1,274 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2021 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "tusb_option.h" - -#if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RP2040) && CFG_TUH_RPI_PIO_USB - -#include "pico.h" -#include "hardware/pio.h" -#include "pio_usb.h" - -//--------------------------------------------------------------------+ -// INCLUDE -//--------------------------------------------------------------------+ -#include "osal/osal.h" - -#include "host/hcd.h" -#include "host/usbh.h" - -#define RHPORT_OFFSET 1 -#define RHPORT_PIO(_x) ((_x)-RHPORT_OFFSET) - - -static usb_device_t *_test_usb_device = NULL; -static pio_usb_configuration_t pio_host_config = PIO_USB_DEFAULT_CONFIG; - -extern root_port_t root_port[PIO_USB_ROOT_PORT_CNT]; -extern usb_device_t usb_device[PIO_USB_DEVICE_CNT]; -extern pio_port_t pio_port[1]; -extern root_port_t root_port[PIO_USB_ROOT_PORT_CNT]; -extern endpoint_t ep_pool[PIO_USB_EP_POOL_CNT]; - -//--------------------------------------------------------------------+ -// HCD API -//--------------------------------------------------------------------+ -bool hcd_init(uint8_t rhport) -{ - // To run USB SOF interrupt in core1, create alarm pool in core1. - pio_host_config.alarm_pool = (void*)alarm_pool_create(2, 1); - _test_usb_device = pio_usb_host_init(&pio_host_config); - - return true; -} - -void hcd_port_reset(uint8_t rhport) -{ - rhport = RHPORT_PIO(rhport); - - pio_port_t *pp = &pio_port[0]; - root_port_t *root = &root_port[rhport]; - - pio_usb_port_reset_start(root, pp); -} - -void hcd_port_reset_end(uint8_t rhport) -{ - rhport = RHPORT_PIO(rhport); - - pio_port_t *pp = &pio_port[0]; - root_port_t *root = &root_port[rhport]; - - pio_usb_port_reset_end(root, pp); - - busy_wait_us(100); - - // TODO slow speed - bool fullspeed_flag = true; - - if (fullspeed_flag && get_port_pin_status(root) == PORT_PIN_FS_IDLE) { - root->root_device = &usb_device[0]; - if (!root->root_device->connected) { -// configure_fullspeed_host(pp, &pio_host_config, root); - root->root_device->is_fullspeed = true; - root->root_device->is_root = true; - root->root_device->connected = true; - root->root_device->root = root; - root->root_device->event = EVENT_CONNECT; - } - } else if (!fullspeed_flag && get_port_pin_status(root) == PORT_PIN_LS_IDLE) { - root->root_device = &usb_device[0]; - if (!root->root_device->connected) { -// configure_lowspeed_host(pp, &pio_host_config, root); - root->root_device->is_fullspeed = false; - root->root_device->is_root = true; - root->root_device->connected = true; - root->root_device->root = root; - root->root_device->event = EVENT_CONNECT; - } - } -} - -bool hcd_port_connect_status(uint8_t rhport) -{ - root_port_t* port = &root_port[0]; - bool dp = gpio_get(port->pin_dp); - bool dm = gpio_get(port->pin_dm); - return dp || dm; -} - -tusb_speed_t hcd_port_speed_get(uint8_t rhport) -{ - // TODO determine link speed - return TUSB_SPEED_FULL; -} - -// Close all opened endpoint belong to this device -void hcd_device_close(uint8_t rhport, uint8_t dev_addr) -{ -} - -uint32_t hcd_frame_number(uint8_t rhport) -{ - return 0; -} - -void hcd_int_enable(uint8_t rhport) -{ -} - -void hcd_int_disable(uint8_t rhport) -{ -} - -//--------------------------------------------------------------------+ -// Endpoint API -//--------------------------------------------------------------------+ - -bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep) -{ - rhport = RHPORT_PIO(rhport); - - usb_device_t *device = &usb_device[0]; - - return pio_usb_endpoint_open(rhport, dev_addr, (uint8_t const*) desc_ep); -} - -bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) -{ - rhport = RHPORT_PIO(rhport); - return pio_usb_endpoint_transfer(rhport, dev_addr, ep_addr, buffer, buflen); -} - -bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) -{ - rhport = RHPORT_PIO(rhport); - return pio_usb_endpoint_send_setup(rhport, dev_addr, setup_packet); -} - -//bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) -//{ -// // EPX is shared, so multiple device addresses and endpoint addresses share that -// // so if any transfer is active on epx, we are busy. Interrupt endpoints have their own -// // EPX so ep->active will only be busy if there is a pending transfer on that interrupt endpoint -// // on that device -// pico_trace("hcd_edpt_busy dev addr %d ep_addr 0x%x\n", dev_addr, ep_addr); -// struct hw_endpoint *ep = get_dev_ep(dev_addr, ep_addr); -// assert(ep); -// bool busy = ep->active; -// pico_trace("busy == %d\n", busy); -// return busy; -//} - -bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) -{ - (void) dev_addr; - (void) ep_addr; - - return true; -} - -void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* port, uint32_t flag) -{ - volatile uint32_t* ep_reg; - xfer_result_t result; - - if ( flag == PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) - { - ep_reg = &port->ep_complete; - result = XFER_RESULT_SUCCESS; - } - else if ( flag == PIO_USB_INTS_ENDPOINT_ERROR_BITS ) - { - ep_reg = &port->ep_error; - result = XFER_RESULT_FAILED; - } - else if ( flag == PIO_USB_INTS_ENDPOINT_STALLED_BITS ) - { - ep_reg = &port->ep_stalled; - result = XFER_RESULT_STALLED; - } - else - { - // something wrong - return; - } - - const uint32_t ep_all = *ep_reg; - - for(uint8_t ep_idx = 0; ep_idx < PIO_USB_EP_POOL_CNT; ep_idx++) - { - uint32_t const mask = (1u << ep_idx); - - if (ep_all & mask) - { - endpoint_t* ep = PIO_USB_EP(ep_idx); - hcd_event_xfer_complete(ep->dev_addr, ep->ep_num, ep->actual_len, result, true); - } - } - - // clear all - (*ep_reg) &= ~ep_all; -} - -// IRQ Handler -void __no_inline_not_in_flash_func(pio_usb_host_irq_handler)(uint8_t root_id) -{ - root_port_t* port = PIO_USB(root_id); - - if ( port->ints & PIO_USB_INTS_CONNECT_BITS ) - { - port->ints &= ~PIO_USB_INTS_CONNECT_BITS; - - hcd_event_device_attach(root_id+1, true); - } - - if ( port->ints & PIO_USB_INTS_DISCONNECT_BITS ) - { - port->ints &= ~PIO_USB_INTS_DISCONNECT_BITS; - hcd_event_device_remove(root_id+1, true); - } - - if ( port->ints & PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) - { - port->ints &= ~PIO_USB_INTS_ENDPOINT_COMPLETE_BITS; - handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_COMPLETE_BITS); - } - - if ( port->ints & PIO_USB_INTS_ENDPOINT_ERROR_BITS ) - { - port->ints &= ~PIO_USB_INTS_ENDPOINT_ERROR_BITS; - handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_ERROR_BITS); - } - - if ( port->ints & PIO_USB_INTS_ENDPOINT_STALLED_BITS ) - { - port->ints &= ~PIO_USB_INTS_ENDPOINT_STALLED_BITS; - handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_STALLED_BITS); - } -} - -#endif diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c new file mode 100644 index 000000000..037ebc132 --- /dev/null +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -0,0 +1,274 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "tusb_option.h" + +#if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RP2040) && CFG_TUH_RPI_PIO_USB + +#include "pico.h" +#include "hardware/pio.h" +#include "pio_usb.h" + +//--------------------------------------------------------------------+ +// INCLUDE +//--------------------------------------------------------------------+ +#include "osal/osal.h" + +#include "host/hcd.h" +#include "host/usbh.h" + +#define RHPORT_OFFSET 1 +#define RHPORT_PIO(_x) ((_x)-RHPORT_OFFSET) + + +static usb_device_t *_test_usb_device = NULL; +static pio_usb_configuration_t pio_host_config = PIO_USB_DEFAULT_CONFIG; + +extern root_port_t root_port[PIO_USB_ROOT_PORT_CNT]; +extern usb_device_t usb_device[PIO_USB_DEVICE_CNT]; +extern pio_port_t pio_port[1]; +extern root_port_t root_port[PIO_USB_ROOT_PORT_CNT]; +extern endpoint_t ep_pool[PIO_USB_EP_POOL_CNT]; + +//--------------------------------------------------------------------+ +// HCD API +//--------------------------------------------------------------------+ +bool hcd_init(uint8_t rhport) +{ + // To run USB SOF interrupt in core1, create alarm pool in core1. + pio_host_config.alarm_pool = (void*)alarm_pool_create(2, 1); + _test_usb_device = pio_usb_host_init(&pio_host_config); + + return true; +} + +void hcd_port_reset(uint8_t rhport) +{ + rhport = RHPORT_PIO(rhport); + + pio_port_t *pp = &pio_port[0]; + root_port_t *root = &root_port[rhport]; + + pio_usb_port_reset_start(root, pp); +} + +void hcd_port_reset_end(uint8_t rhport) +{ + rhport = RHPORT_PIO(rhport); + + pio_port_t *pp = &pio_port[0]; + root_port_t *root = &root_port[rhport]; + + pio_usb_port_reset_end(root, pp); + + busy_wait_us(100); + + // TODO slow speed + bool fullspeed_flag = true; + + if (fullspeed_flag && get_port_pin_status(root) == PORT_PIN_FS_IDLE) { + root->root_device = &usb_device[0]; + if (!root->root_device->connected) { +// configure_fullspeed_host(pp, &pio_host_config, root); + root->root_device->is_fullspeed = true; + root->root_device->is_root = true; + root->root_device->connected = true; + root->root_device->root = root; + root->root_device->event = EVENT_CONNECT; + } + } else if (!fullspeed_flag && get_port_pin_status(root) == PORT_PIN_LS_IDLE) { + root->root_device = &usb_device[0]; + if (!root->root_device->connected) { +// configure_lowspeed_host(pp, &pio_host_config, root); + root->root_device->is_fullspeed = false; + root->root_device->is_root = true; + root->root_device->connected = true; + root->root_device->root = root; + root->root_device->event = EVENT_CONNECT; + } + } +} + +bool hcd_port_connect_status(uint8_t rhport) +{ + root_port_t* port = &root_port[0]; + bool dp = gpio_get(port->pin_dp); + bool dm = gpio_get(port->pin_dm); + return dp || dm; +} + +tusb_speed_t hcd_port_speed_get(uint8_t rhport) +{ + // TODO determine link speed + return TUSB_SPEED_FULL; +} + +// Close all opened endpoint belong to this device +void hcd_device_close(uint8_t rhport, uint8_t dev_addr) +{ +} + +uint32_t hcd_frame_number(uint8_t rhport) +{ + return 0; +} + +void hcd_int_enable(uint8_t rhport) +{ +} + +void hcd_int_disable(uint8_t rhport) +{ +} + +//--------------------------------------------------------------------+ +// Endpoint API +//--------------------------------------------------------------------+ + +bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep) +{ + rhport = RHPORT_PIO(rhport); + + usb_device_t *device = &usb_device[0]; + + return pio_usb_endpoint_open(rhport, dev_addr, (uint8_t const*) desc_ep); +} + +bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) +{ + rhport = RHPORT_PIO(rhport); + return pio_usb_endpoint_transfer(rhport, dev_addr, ep_addr, buffer, buflen); +} + +bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) +{ + rhport = RHPORT_PIO(rhport); + return pio_usb_endpoint_send_setup(rhport, dev_addr, setup_packet); +} + +//bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) +//{ +// // EPX is shared, so multiple device addresses and endpoint addresses share that +// // so if any transfer is active on epx, we are busy. Interrupt endpoints have their own +// // EPX so ep->active will only be busy if there is a pending transfer on that interrupt endpoint +// // on that device +// pico_trace("hcd_edpt_busy dev addr %d ep_addr 0x%x\n", dev_addr, ep_addr); +// struct hw_endpoint *ep = get_dev_ep(dev_addr, ep_addr); +// assert(ep); +// bool busy = ep->active; +// pico_trace("busy == %d\n", busy); +// return busy; +//} + +bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) +{ + (void) dev_addr; + (void) ep_addr; + + return true; +} + +void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* port, uint32_t flag) +{ + volatile uint32_t* ep_reg; + xfer_result_t result; + + if ( flag == PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) + { + ep_reg = &port->ep_complete; + result = XFER_RESULT_SUCCESS; + } + else if ( flag == PIO_USB_INTS_ENDPOINT_ERROR_BITS ) + { + ep_reg = &port->ep_error; + result = XFER_RESULT_FAILED; + } + else if ( flag == PIO_USB_INTS_ENDPOINT_STALLED_BITS ) + { + ep_reg = &port->ep_stalled; + result = XFER_RESULT_STALLED; + } + else + { + // something wrong + return; + } + + const uint32_t ep_all = *ep_reg; + + for(uint8_t ep_idx = 0; ep_idx < PIO_USB_EP_POOL_CNT; ep_idx++) + { + uint32_t const mask = (1u << ep_idx); + + if (ep_all & mask) + { + endpoint_t* ep = PIO_USB_EP(ep_idx); + hcd_event_xfer_complete(ep->dev_addr, ep->ep_num, ep->actual_len, result, true); + } + } + + // clear all + (*ep_reg) &= ~ep_all; +} + +// IRQ Handler +void __no_inline_not_in_flash_func(pio_usb_host_irq_handler)(uint8_t root_id) +{ + root_port_t* port = PIO_USB(root_id); + + if ( port->ints & PIO_USB_INTS_CONNECT_BITS ) + { + port->ints &= ~PIO_USB_INTS_CONNECT_BITS; + + hcd_event_device_attach(root_id+1, true); + } + + if ( port->ints & PIO_USB_INTS_DISCONNECT_BITS ) + { + port->ints &= ~PIO_USB_INTS_DISCONNECT_BITS; + hcd_event_device_remove(root_id+1, true); + } + + if ( port->ints & PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) + { + port->ints &= ~PIO_USB_INTS_ENDPOINT_COMPLETE_BITS; + handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_COMPLETE_BITS); + } + + if ( port->ints & PIO_USB_INTS_ENDPOINT_ERROR_BITS ) + { + port->ints &= ~PIO_USB_INTS_ENDPOINT_ERROR_BITS; + handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_ERROR_BITS); + } + + if ( port->ints & PIO_USB_INTS_ENDPOINT_STALLED_BITS ) + { + port->ints &= ~PIO_USB_INTS_ENDPOINT_STALLED_BITS; + handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_STALLED_BITS); + } +} + +#endif -- cgit v1.3.1 From c25f835aea838f935893fdef6352fab938e11d4b Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 1 Apr 2022 23:31:43 +0700 Subject: update to use pio hw endpoint --- hw/bsp/rp2040/family.cmake | 3 ++- lib/Pico-PIO-USB | 2 +- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 2 +- 3 files changed, 4 insertions(+), 3 deletions(-) (limited to 'src/portable') diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index 4cec645a2..275ec9e6b 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -91,7 +91,8 @@ if (NOT TARGET _rp2040_family_inclusion_marker) ${TOP}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c ${TOP}/lib/Pico-PIO-USB/pio_usb.c - ${TOP}/lib/Pico-PIO-USB/pio_usb_port.c + ${TOP}/lib/Pico-PIO-USB/pio_usb_host.c + ${TOP}/lib/Pico-PIO-USB/pio_usb_hw.c ${TOP}/lib/Pico-PIO-USB/usb_crc.c ) diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index 650130ab3..72f91ac9c 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit 650130ab312e0dc9337dc52cccf34d35875abdf7 +Subproject commit 72f91ac9cdaf532eacfbe9534420341b13480441 diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index 037ebc132..09407851d 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -225,7 +225,7 @@ void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* port, uint3 if (ep_all & mask) { - endpoint_t* ep = PIO_USB_EP(ep_idx); + pio_hw_endpoint_t* ep = PIO_USB_HW_EP(ep_idx); hcd_event_xfer_complete(ep->dev_addr, ep->ep_num, ep->actual_len, result, true); } } -- cgit v1.3.1 From f881e77e66ea92506fefb69a24324f6c2274aab9 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 2 Apr 2022 19:19:00 +0700 Subject: extracting hw root port --- lib/Pico-PIO-USB | 2 +- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 6 ++---- 2 files changed, 3 insertions(+), 5 deletions(-) (limited to 'src/portable') diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index 72f91ac9c..ea48fc073 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit 72f91ac9cdaf532eacfbe9534420341b13480441 +Subproject commit ea48fc073ce28e3870a71e8019b08a02bde8ebf9 diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index 09407851d..1fe7a0d6e 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -50,8 +50,6 @@ static pio_usb_configuration_t pio_host_config = PIO_USB_DEFAULT_CONFIG; extern root_port_t root_port[PIO_USB_ROOT_PORT_CNT]; extern usb_device_t usb_device[PIO_USB_DEVICE_CNT]; extern pio_port_t pio_port[1]; -extern root_port_t root_port[PIO_USB_ROOT_PORT_CNT]; -extern endpoint_t ep_pool[PIO_USB_EP_POOL_CNT]; //--------------------------------------------------------------------+ // HCD API @@ -191,7 +189,7 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) return true; } -void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* port, uint32_t flag) +void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_t* port, uint32_t flag) { volatile uint32_t* ep_reg; xfer_result_t result; @@ -237,7 +235,7 @@ void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* port, uint3 // IRQ Handler void __no_inline_not_in_flash_func(pio_usb_host_irq_handler)(uint8_t root_id) { - root_port_t* port = PIO_USB(root_id); + pio_hw_root_port_t* port = PIO_USB_HW_RPORT(root_id); if ( port->ints & PIO_USB_INTS_CONNECT_BITS ) { -- cgit v1.3.1 From f6851cf18764a615f83bb782973bb3ea25e9089c Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 3 Apr 2022 00:17:58 +0700 Subject: clean up hcd pio --- lib/Pico-PIO-USB | 2 +- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 60 ++++---------------------- 2 files changed, 10 insertions(+), 52 deletions(-) (limited to 'src/portable') diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index ea48fc073..7d8df447c 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit ea48fc073ce28e3870a71e8019b08a02bde8ebf9 +Subproject commit 7d8df447c4c5d0515f2ab9f10b28ac92d7cc78df diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index 1fe7a0d6e..dc52870e9 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -43,14 +43,8 @@ #define RHPORT_OFFSET 1 #define RHPORT_PIO(_x) ((_x)-RHPORT_OFFSET) - -static usb_device_t *_test_usb_device = NULL; static pio_usb_configuration_t pio_host_config = PIO_USB_DEFAULT_CONFIG; -extern root_port_t root_port[PIO_USB_ROOT_PORT_CNT]; -extern usb_device_t usb_device[PIO_USB_DEVICE_CNT]; -extern pio_port_t pio_port[1]; - //--------------------------------------------------------------------+ // HCD API //--------------------------------------------------------------------+ @@ -58,7 +52,7 @@ bool hcd_init(uint8_t rhport) { // To run USB SOF interrupt in core1, create alarm pool in core1. pio_host_config.alarm_pool = (void*)alarm_pool_create(2, 1); - _test_usb_device = pio_usb_host_init(&pio_host_config); + (void) pio_usb_host_init(&pio_host_config); return true; } @@ -66,56 +60,23 @@ bool hcd_init(uint8_t rhport) void hcd_port_reset(uint8_t rhport) { rhport = RHPORT_PIO(rhport); - - pio_port_t *pp = &pio_port[0]; - root_port_t *root = &root_port[rhport]; - - pio_usb_port_reset_start(root, pp); + pio_usb_hw_port_reset_start(rhport); } void hcd_port_reset_end(uint8_t rhport) { rhport = RHPORT_PIO(rhport); - - pio_port_t *pp = &pio_port[0]; - root_port_t *root = &root_port[rhport]; - - pio_usb_port_reset_end(root, pp); - - busy_wait_us(100); - - // TODO slow speed - bool fullspeed_flag = true; - - if (fullspeed_flag && get_port_pin_status(root) == PORT_PIN_FS_IDLE) { - root->root_device = &usb_device[0]; - if (!root->root_device->connected) { -// configure_fullspeed_host(pp, &pio_host_config, root); - root->root_device->is_fullspeed = true; - root->root_device->is_root = true; - root->root_device->connected = true; - root->root_device->root = root; - root->root_device->event = EVENT_CONNECT; - } - } else if (!fullspeed_flag && get_port_pin_status(root) == PORT_PIN_LS_IDLE) { - root->root_device = &usb_device[0]; - if (!root->root_device->connected) { -// configure_lowspeed_host(pp, &pio_host_config, root); - root->root_device->is_fullspeed = false; - root->root_device->is_root = true; - root->root_device->connected = true; - root->root_device->root = root; - root->root_device->event = EVENT_CONNECT; - } - } + pio_usb_hw_port_reset_end(rhport); } bool hcd_port_connect_status(uint8_t rhport) { - root_port_t* port = &root_port[0]; - bool dp = gpio_get(port->pin_dp); - bool dm = gpio_get(port->pin_dm); - return dp || dm; + rhport = RHPORT_PIO(rhport); + + pio_hw_root_port_t *root = PIO_USB_HW_RPORT(rhport); + port_pin_status_t line_state = pio_hw_get_line_state(root); + + return line_state != PORT_PIN_SE0; } tusb_speed_t hcd_port_speed_get(uint8_t rhport) @@ -149,9 +110,6 @@ void hcd_int_disable(uint8_t rhport) bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep) { rhport = RHPORT_PIO(rhport); - - usb_device_t *device = &usb_device[0]; - return pio_usb_endpoint_open(rhport, dev_addr, (uint8_t const*) desc_ep); } -- cgit v1.3.1 From 7ea75d3c09d1afd4db5374c89f715d8ff6c1d414 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 3 Apr 2022 20:44:16 +0700 Subject: use pio usb host init --- lib/Pico-PIO-USB | 2 +- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 5 ++--- 2 files changed, 3 insertions(+), 4 deletions(-) (limited to 'src/portable') diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index 7d8df447c..b507f95de 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit 7d8df447c4c5d0515f2ab9f10b28ac92d7cc78df +Subproject commit b507f95de457d5dc14fb15fd6481ef748c6e3342 diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index dc52870e9..c2ac2c706 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -50,9 +50,8 @@ static pio_usb_configuration_t pio_host_config = PIO_USB_DEFAULT_CONFIG; //--------------------------------------------------------------------+ bool hcd_init(uint8_t rhport) { - // To run USB SOF interrupt in core1, create alarm pool in core1. - pio_host_config.alarm_pool = (void*)alarm_pool_create(2, 1); - (void) pio_usb_host_init(&pio_host_config); + // To run USB SOF interrupt in core1, call this init in core1 + pio_usb_host_controller_init(&pio_host_config); return true; } -- cgit v1.3.1 From d7d7e61f3437076a38ec031f2dc4cef38c8c831b Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 3 Apr 2022 22:48:08 +0700 Subject: correct pio usb speed, and close device --- lib/Pico-PIO-USB | 2 +- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 5 ++++- 2 files changed, 5 insertions(+), 2 deletions(-) (limited to 'src/portable') diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index b507f95de..650ef75f0 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit b507f95de457d5dc14fb15fd6481ef748c6e3342 +Subproject commit 650ef75f0d8a4020a7ddc2ccee1ee0f3237ab760 diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index c2ac2c706..839087957 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -81,12 +81,15 @@ bool hcd_port_connect_status(uint8_t rhport) tusb_speed_t hcd_port_speed_get(uint8_t rhport) { // TODO determine link speed - return TUSB_SPEED_FULL; + rhport = RHPORT_PIO(rhport); + return PIO_USB_HW_RPORT(rhport)->is_fullspeed ? TUSB_SPEED_FULL : TUSB_SPEED_LOW; } // Close all opened endpoint belong to this device void hcd_device_close(uint8_t rhport, uint8_t dev_addr) { + rhport = RHPORT_PIO(rhport); + pio_usb_host_close_device(rhport, dev_addr); } uint32_t hcd_frame_number(uint8_t rhport) -- cgit v1.3.1 From d97c1546957059cfb3063b95d5287e2729f7f79a Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 5 Apr 2022 00:04:47 +0700 Subject: add need_pre for pio usb, but not work out well --- lib/Pico-PIO-USB | 2 +- src/host/usbh.c | 4 ++-- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 6 +++++- 3 files changed, 8 insertions(+), 4 deletions(-) (limited to 'src/portable') diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index 650ef75f0..4993f4a1d 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit 650ef75f0d8a4020a7ddc2ccee1ee0f3237ab760 +Subproject commit 4993f4a1df03c8af13c8091052a6274e8c333bc0 diff --git a/src/host/usbh.c b/src/host/usbh.c index c127ef310..47c462012 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -642,7 +642,7 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result __attribute__((fallthrough)); case CONTROL_STAGE_DATA: - if (xferred_bytes) + if (request->wLength) { TU_LOG2("[%u:%u] Control data:\r\n", rhport, dev_addr); TU_LOG2_MEM(_ctrl_xfer.buffer, xferred_bytes, 2); @@ -1301,7 +1301,7 @@ static void process_enumeration(tuh_xfer_t* xfer) TU_ASSERT(new_dev, ); new_dev->addressed = 1; - // TODO close device 0, may not be needed + // Close device 0 hcd_device_close(_dev0.rhport, 0); // open control pipe for new address diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index 839087957..c2ef54b9e 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -111,8 +111,12 @@ void hcd_int_disable(uint8_t rhport) bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep) { + hcd_devtree_info_t dev_tree; + hcd_devtree_get_info(dev_addr, &dev_tree); + bool const need_pre = (dev_tree.hub_addr && dev_tree.speed == TUSB_SPEED_LOW); + rhport = RHPORT_PIO(rhport); - return pio_usb_endpoint_open(rhport, dev_addr, (uint8_t const*) desc_ep); + return pio_usb_endpoint_open(rhport, dev_addr, (uint8_t const*) desc_ep, need_pre); } bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) -- cgit v1.3.1 From d5d4909c20f581ef2046932191f487c001d59ca3 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 8 Apr 2022 13:36:05 +0700 Subject: proof of concpet that device pio-usb work with host pio-usb --- examples/device/hid_boot_interface/src/main.c | 4 +++ .../device/hid_boot_interface/src/tusb_config.h | 3 ++ examples/host/cdc_msc_hid/src/tusb_config.h | 1 + hw/bsp/rp2040/family.cmake | 32 +++++++++------------- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 2 +- src/tusb_option.h | 6 +++- 6 files changed, 27 insertions(+), 21 deletions(-) (limited to 'src/portable') diff --git a/examples/device/hid_boot_interface/src/main.c b/examples/device/hid_boot_interface/src/main.c index e5e2f6856..ed7f235b7 100644 --- a/examples/device/hid_boot_interface/src/main.c +++ b/examples/device/hid_boot_interface/src/main.c @@ -31,6 +31,8 @@ #include "tusb.h" #include "usb_descriptors.h" +#include "pio_usb.h" + //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF PROTYPES //--------------------------------------------------------------------+ @@ -59,6 +61,8 @@ int main(void) while (1) { + pio_usb_device_task(); + tud_task(); // tinyusb device task led_blinking_task(); diff --git a/examples/device/hid_boot_interface/src/tusb_config.h b/examples/device/hid_boot_interface/src/tusb_config.h index 1c8fa40b2..d4f67e7ba 100644 --- a/examples/device/hid_boot_interface/src/tusb_config.h +++ b/examples/device/hid_boot_interface/src/tusb_config.h @@ -39,6 +39,9 @@ #error CFG_TUSB_MCU must be defined #endif +// Use raspberry pio-usb for device +#define CFG_TUD_RPI_PIO_USB 1 + // RHPort number used for device can be defined by board.mk, default to port 0 #ifndef BOARD_DEVICE_RHPORT_NUM #define BOARD_DEVICE_RHPORT_NUM 0 diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index 80ee8cb01..9d083c771 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -39,6 +39,7 @@ #error CFG_TUSB_MCU must be defined #endif +// Use raspberry pio-usb for host #define CFG_TUH_RPI_PIO_USB 1 //#define CFG_TUSB_RPI_PIO_INC_PATH 1 diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index 275ec9e6b..b186fc78e 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -29,12 +29,17 @@ if (NOT TARGET _rp2040_family_inclusion_marker) target_sources(tinyusb_common_base INTERFACE ${TOP}/src/tusb.c ${TOP}/src/common/tusb_fifo.c + ${TOP}/lib/Pico-PIO-USB/pio_usb.c + ${TOP}/lib/Pico-PIO-USB/pio_usb_host.c + ${TOP}/lib/Pico-PIO-USB/pio_usb_hw.c + ${TOP}/lib/Pico-PIO-USB/usb_crc.c ) target_include_directories(tinyusb_common_base INTERFACE ${TOP}/src ${TOP}/src/common ${TOP}/hw + ${TOP}/lib/Pico-PIO-USB ) target_link_libraries(tinyusb_common_base INTERFACE @@ -42,6 +47,10 @@ if (NOT TARGET _rp2040_family_inclusion_marker) hardware_irq hardware_resets pico_sync + # for usb-pio + hardware_dma + hardware_pio + pico_multicore ) set(TINYUSB_DEBUG_LEVEL 0) @@ -60,6 +69,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker) add_library(tinyusb_device_base INTERFACE) target_sources(tinyusb_device_base INTERFACE ${TOP}/src/portable/raspberrypi/rp2040/dcd_rp2040.c + ${TOP}/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c ${TOP}/src/portable/raspberrypi/rp2040/rp2040_usb.c ${TOP}/src/device/usbd.c ${TOP}/src/device/usbd_control.c @@ -88,12 +98,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker) ${TOP}/src/class/hid/hid_host.c ${TOP}/src/class/msc/msc_host.c ${TOP}/src/class/vendor/vendor_host.c - - ${TOP}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c - ${TOP}/lib/Pico-PIO-USB/pio_usb.c - ${TOP}/lib/Pico-PIO-USB/pio_usb_host.c - ${TOP}/lib/Pico-PIO-USB/pio_usb_hw.c - ${TOP}/lib/Pico-PIO-USB/usb_crc.c + ${TOP}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c ) # Sometimes have to do host specific actions in mostly common functions @@ -101,17 +106,6 @@ if (NOT TARGET _rp2040_family_inclusion_marker) RP2040_USB_HOST_MODE=1 ) - # config for host pio - target_link_libraries(tinyusb_host_base INTERFACE - hardware_dma - hardware_pio - pico_multicore - ) - - target_include_directories(tinyusb_host_base INTERFACE - ${TOP}/lib/Pico-PIO-USB - ) - add_library(tinyusb_bsp INTERFACE) target_sources(tinyusb_bsp INTERFACE ${TOP}/hw/bsp/rp2040/family.c @@ -166,8 +160,8 @@ if (NOT TARGET _rp2040_family_inclusion_marker) _family_initialize_project(${PROJECT} ${DIR}) enable_language(C CXX ASM) pico_sdk_init() - pico_generate_pio_header(tinyusb_host_base ${TOP}/lib/Pico-PIO-USB/usb_tx.pio) - pico_generate_pio_header(tinyusb_host_base ${TOP}/lib/Pico-PIO-USB/usb_rx.pio) + pico_generate_pio_header(tinyusb_common_base ${TOP}/lib/Pico-PIO-USB/usb_tx.pio) + pico_generate_pio_header(tinyusb_common_base ${TOP}/lib/Pico-PIO-USB/usb_rx.pio) endfunction() # This method must be called from the project scope to suppress known warnings in TinyUSB source files diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index 915822798..2d77ad4f9 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -26,7 +26,7 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && CFG_TUSB_MCU == OPT_MCU_RP2040 +#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RP2040) && !CFG_TUD_RPI_PIO_USB #include "pico.h" #include "rp2040_usb.h" diff --git a/src/tusb_option.h b/src/tusb_option.h index 61cc283c4..5636b34fe 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -239,7 +239,7 @@ #define TUH_OPT_RHPORT -1 #endif -#define CFG_TUH_ENABLED ( TUH_RHPORT_MODE & OPT_MODE_HOST ) +#define CFG_TUH_ENABLED (TUH_RHPORT_MODE & OPT_MODE_HOST) // For backward compatible #define TUSB_OPT_DEVICE_ENABLED CFG_TUD_ENABLED @@ -398,6 +398,10 @@ #define CFG_TUH_RPI_PIO_USB 0 #endif +#ifndef CFG_TUD_RPI_PIO_USB +#define CFG_TUD_RPI_PIO_USB 0 +#endif + //------------------------------------------------------------------ // Configuration Validation -- cgit v1.3.1 From cc5a4720e5c1295eacf02c7b81fc4454f29cfaa4 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 14 Apr 2022 21:51:49 +0700 Subject: catch up with pio lib --- .../device/hid_boot_interface/src/tusb_config.h | 3 + hw/bsp/rp2040/family.cmake | 5 +- lib/Pico-PIO-USB | 2 +- src/portable/raspberrypi/pio_usb/dcd_pio_usb.c | 234 +++++++++++++++++++++ src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 28 ++- 5 files changed, 254 insertions(+), 18 deletions(-) create mode 100644 src/portable/raspberrypi/pio_usb/dcd_pio_usb.c (limited to 'src/portable') diff --git a/examples/device/hid_boot_interface/src/tusb_config.h b/examples/device/hid_boot_interface/src/tusb_config.h index d4f67e7ba..c8bb8a807 100644 --- a/examples/device/hid_boot_interface/src/tusb_config.h +++ b/examples/device/hid_boot_interface/src/tusb_config.h @@ -41,6 +41,9 @@ // Use raspberry pio-usb for device #define CFG_TUD_RPI_PIO_USB 1 +#if CFG_TUD_RPI_PIO_USB +#define BOARD_DEVICE_RHPORT_NUM 1 +#endif // RHPort number used for device can be defined by board.mk, default to port 0 #ifndef BOARD_DEVICE_RHPORT_NUM diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index b186fc78e..d872c35ea 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -31,6 +31,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker) ${TOP}/src/common/tusb_fifo.c ${TOP}/lib/Pico-PIO-USB/pio_usb.c ${TOP}/lib/Pico-PIO-USB/pio_usb_host.c + ${TOP}/lib/Pico-PIO-USB/pio_usb_device.c ${TOP}/lib/Pico-PIO-USB/pio_usb_hw.c ${TOP}/lib/Pico-PIO-USB/usb_crc.c ) @@ -69,8 +70,8 @@ if (NOT TARGET _rp2040_family_inclusion_marker) add_library(tinyusb_device_base INTERFACE) target_sources(tinyusb_device_base INTERFACE ${TOP}/src/portable/raspberrypi/rp2040/dcd_rp2040.c - ${TOP}/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c ${TOP}/src/portable/raspberrypi/rp2040/rp2040_usb.c + ${TOP}/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c ${TOP}/src/device/usbd.c ${TOP}/src/device/usbd_control.c ${TOP}/src/class/audio/audio_device.c @@ -92,13 +93,13 @@ if (NOT TARGET _rp2040_family_inclusion_marker) target_sources(tinyusb_host_base INTERFACE ${TOP}/src/portable/raspberrypi/rp2040/hcd_rp2040.c ${TOP}/src/portable/raspberrypi/rp2040/rp2040_usb.c + ${TOP}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c ${TOP}/src/host/usbh.c ${TOP}/src/host/hub.c ${TOP}/src/class/cdc/cdc_host.c ${TOP}/src/class/hid/hid_host.c ${TOP}/src/class/msc/msc_host.c ${TOP}/src/class/vendor/vendor_host.c - ${TOP}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c ) # Sometimes have to do host specific actions in mostly common functions diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index 4993f4a1d..84a00b976 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit 4993f4a1df03c8af13c8091052a6274e8c333bc0 +Subproject commit 84a00b976041d8c34cf660fda6fa88198c9721dc diff --git a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c new file mode 100644 index 000000000..08d8b6086 --- /dev/null +++ b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c @@ -0,0 +1,234 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "tusb_option.h" + +#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RP2040) && CFG_TUD_RPI_PIO_USB + +#include "pico.h" +#include "hardware/pio.h" +#include "pio_usb.h" + +#include "device/dcd.h" + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM DECLARATION +//--------------------------------------------------------------------+ + +#define RHPORT_OFFSET 1 +#define RHPORT_PIO(_x) ((_x)-RHPORT_OFFSET) + +static uint8_t new_addr = 0; + +//------------- -------------// +static usb_device_t *usb_device = NULL; +static usb_descriptor_buffers_t desc; + +/*------------------------------------------------------------------*/ +/* Device API + *------------------------------------------------------------------*/ + +// Initialize controller to device mode +void dcd_init (uint8_t rhport) +{ + (void) rhport; + + static pio_usb_configuration_t config = PIO_USB_DEFAULT_CONFIG; + usb_device = pio_usb_device_init(&config, &desc); +} + +// Enable device interrupt +void dcd_int_enable (uint8_t rhport) +{ + (void) rhport; +} + +// Disable device interrupt +void dcd_int_disable (uint8_t rhport) +{ + (void) rhport; +} + +// Receive Set Address request, mcu port must also include status IN response +void dcd_set_address (uint8_t rhport, uint8_t dev_addr) +{ + // store addr, will update crc5 lut when status is complete + new_addr = dev_addr; + + dcd_edpt_xfer(rhport, 0x80, NULL, 0); +} + +// Wake up host +void dcd_remote_wakeup (uint8_t rhport) +{ + (void) rhport; +} + +// Connect by enabling internal pull-up resistor on D+/D- +void dcd_connect(uint8_t rhport) +{ + (void) rhport; +} + +// Disconnect by disabling internal pull-up resistor on D+/D- +void dcd_disconnect(uint8_t rhport) +{ + (void) rhport; +} + +//--------------------------------------------------------------------+ +// Endpoint API +//--------------------------------------------------------------------+ + +// Configure endpoint's registers according to descriptor +bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) +{ + (void) rhport; + (void) ep_desc; + return false; +} + +void dcd_edpt_close_all (uint8_t rhport) +{ + (void) rhport; +} + +// Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack +bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) +{ + uint8_t pio_rhport = RHPORT_PIO(rhport); + return pio_usb_device_endpoint_transfer(pio_rhport, ep_addr, buffer, total_bytes); +} + +// Submit a transfer where is managed by FIFO, When complete dcd_event_xfer_complete() is invoked to notify the stack - optional, however, must be listed in usbd.c +bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes) +{ + (void) rhport; + (void) ep_addr; + (void) ff; + (void) total_bytes; + return false; +} + +// Stall endpoint +void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) +{ + (void) rhport; + (void) ep_addr; +} + +// clear stall, data toggle is also reset to DATA0 +void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) +{ + (void) rhport; + (void) ep_addr; +} + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ +extern void update_ep0_crc5_lut(uint8_t addr); + +static void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_t* port, uint32_t flag) +{ + volatile uint32_t* ep_reg; + xfer_result_t result; + + if ( flag == PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) + { + ep_reg = &port->ep_complete; + result = XFER_RESULT_SUCCESS; + } + else if ( flag == PIO_USB_INTS_ENDPOINT_ERROR_BITS ) + { + ep_reg = &port->ep_error; + result = XFER_RESULT_FAILED; + } + else if ( flag == PIO_USB_INTS_ENDPOINT_STALLED_BITS ) + { + ep_reg = &port->ep_stalled; + result = XFER_RESULT_STALLED; + } + else + { + // something wrong + return; + } + + const uint32_t ep_all = *ep_reg; + + for(uint8_t ep_idx = 0; ep_idx < PIO_USB_EP_POOL_CNT; ep_idx++) + { + uint32_t const mask = (1u << ep_idx); + + if (ep_all & mask) + { + pio_hw_endpoint_t* ep = PIO_USB_HW_EP(ep_idx); + uint8_t const tu_rhport = port - PIO_USB_HW_RPORT(0) + 1; + + // address is changed, update crc5 lut + if (new_addr && ep->ep_num == 0x80 && ep->actual_len == 0) + { + update_ep0_crc5_lut(new_addr); + new_addr = 0; + } + + dcd_event_xfer_complete(tu_rhport, ep->ep_num, ep->actual_len, result, true); + } + } + + // clear all + (*ep_reg) &= ~ep_all; +} + +// IRQ Handler +void __no_inline_not_in_flash_func(pio_usb_device_irq_handler)(uint8_t root_id) +{ + uint8_t const tu_rhport = root_id + 1; + pio_hw_root_port_t* port = PIO_USB_HW_RPORT(root_id); + uint32_t const ints = port->ints; + + if (ints & PIO_USB_INTS_RESET_END_BITS) + { + new_addr = 0; + dcd_event_bus_reset(tu_rhport, TUSB_SPEED_FULL, true); + } + + if (ints & PIO_USB_INTS_SETUP_REQ_BITS) + { + dcd_event_setup_received(tu_rhport, port->setup_packet, true); + } + + if ( ints & PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) + { + handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_COMPLETE_BITS); + } + + // clear all + port->ints &= ~ints; +} + +#endif diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index c2ef54b9e..4bd318448 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -116,19 +116,19 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const bool const need_pre = (dev_tree.hub_addr && dev_tree.speed == TUSB_SPEED_LOW); rhport = RHPORT_PIO(rhport); - return pio_usb_endpoint_open(rhport, dev_addr, (uint8_t const*) desc_ep, need_pre); + return pio_usb_host_endpoint_open(rhport, dev_addr, (uint8_t const*) desc_ep, need_pre); } bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) { rhport = RHPORT_PIO(rhport); - return pio_usb_endpoint_transfer(rhport, dev_addr, ep_addr, buffer, buflen); + return pio_usb_host_endpoint_transfer(rhport, dev_addr, ep_addr, buffer, buflen); } bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) { rhport = RHPORT_PIO(rhport); - return pio_usb_endpoint_send_setup(rhport, dev_addr, setup_packet); + return pio_usb_host_send_setup(rhport, dev_addr, setup_packet); } //bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) @@ -153,7 +153,7 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) return true; } -void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_t* port, uint32_t flag) +static void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_t* port, uint32_t flag) { volatile uint32_t* ep_reg; xfer_result_t result; @@ -200,37 +200,35 @@ void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_t* port void __no_inline_not_in_flash_func(pio_usb_host_irq_handler)(uint8_t root_id) { pio_hw_root_port_t* port = PIO_USB_HW_RPORT(root_id); + uint32_t const ints = port->ints; - if ( port->ints & PIO_USB_INTS_CONNECT_BITS ) + if ( ints & PIO_USB_INTS_CONNECT_BITS ) { - port->ints &= ~PIO_USB_INTS_CONNECT_BITS; - hcd_event_device_attach(root_id+1, true); } - if ( port->ints & PIO_USB_INTS_DISCONNECT_BITS ) + if ( ints & PIO_USB_INTS_DISCONNECT_BITS ) { - port->ints &= ~PIO_USB_INTS_DISCONNECT_BITS; hcd_event_device_remove(root_id+1, true); } - if ( port->ints & PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) + if ( ints & PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) { - port->ints &= ~PIO_USB_INTS_ENDPOINT_COMPLETE_BITS; handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_COMPLETE_BITS); } - if ( port->ints & PIO_USB_INTS_ENDPOINT_ERROR_BITS ) + if ( ints & PIO_USB_INTS_ENDPOINT_ERROR_BITS ) { - port->ints &= ~PIO_USB_INTS_ENDPOINT_ERROR_BITS; handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_ERROR_BITS); } - if ( port->ints & PIO_USB_INTS_ENDPOINT_STALLED_BITS ) + if ( ints & PIO_USB_INTS_ENDPOINT_STALLED_BITS ) { - port->ints &= ~PIO_USB_INTS_ENDPOINT_STALLED_BITS; handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_STALLED_BITS); } + + // clear all + port->ints &= ~ints; } #endif -- cgit v1.3.1 From 05bfc1a9eba9fc901c35bdd1844cf962c5732310 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 15 Apr 2022 01:04:12 +0700 Subject: pio device works well --- examples/device/hid_boot_interface/src/main.c | 2 -- lib/Pico-PIO-USB | 2 +- src/portable/raspberrypi/pio_usb/dcd_pio_usb.c | 45 ++++++++++---------------- 3 files changed, 18 insertions(+), 31 deletions(-) (limited to 'src/portable') diff --git a/examples/device/hid_boot_interface/src/main.c b/examples/device/hid_boot_interface/src/main.c index ed7f235b7..031b17a2e 100644 --- a/examples/device/hid_boot_interface/src/main.c +++ b/examples/device/hid_boot_interface/src/main.c @@ -61,8 +61,6 @@ int main(void) while (1) { - pio_usb_device_task(); - tud_task(); // tinyusb device task led_blinking_task(); diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index 84a00b976..d2b37b42b 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit 84a00b976041d8c34cf660fda6fa88198c9721dc +Subproject commit d2b37b42befb6c761433b3c164c59a049721762f diff --git a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c index 08d8b6086..dc9cbb45b 100644 --- a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c @@ -41,8 +41,6 @@ #define RHPORT_OFFSET 1 #define RHPORT_PIO(_x) ((_x)-RHPORT_OFFSET) -static uint8_t new_addr = 0; - //------------- -------------// static usb_device_t *usb_device = NULL; static usb_descriptor_buffers_t desc; @@ -75,10 +73,12 @@ void dcd_int_disable (uint8_t rhport) // Receive Set Address request, mcu port must also include status IN response void dcd_set_address (uint8_t rhport, uint8_t dev_addr) { - // store addr, will update crc5 lut when status is complete - new_addr = dev_addr; + uint8_t const pio_rhport = RHPORT_PIO(rhport); + + // must be called before queuing status + pio_usb_device_set_address(pio_rhport, dev_addr); - dcd_edpt_xfer(rhport, 0x80, NULL, 0); + pio_usb_device_endpoint_transfer(pio_rhport, 0x80, NULL, 0); } // Wake up host @@ -104,11 +104,10 @@ void dcd_disconnect(uint8_t rhport) //--------------------------------------------------------------------+ // Configure endpoint's registers according to descriptor -bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) +bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_ep) { - (void) rhport; - (void) ep_desc; - return false; + uint8_t const pio_rhport = RHPORT_PIO(rhport); + return pio_usb_device_endpoint_open(pio_rhport, (uint8_t const*) desc_ep); } void dcd_edpt_close_all (uint8_t rhport) @@ -119,19 +118,19 @@ void dcd_edpt_close_all (uint8_t rhport) // Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) { - uint8_t pio_rhport = RHPORT_PIO(rhport); + uint8_t const pio_rhport = RHPORT_PIO(rhport); return pio_usb_device_endpoint_transfer(pio_rhport, ep_addr, buffer, total_bytes); } // Submit a transfer where is managed by FIFO, When complete dcd_event_xfer_complete() is invoked to notify the stack - optional, however, must be listed in usbd.c -bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes) -{ - (void) rhport; - (void) ep_addr; - (void) ff; - (void) total_bytes; - return false; -} +//bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes) +//{ +// (void) rhport; +// (void) ep_addr; +// (void) ff; +// (void) total_bytes; +// return false; +//} // Stall endpoint void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) @@ -150,7 +149,6 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ -extern void update_ep0_crc5_lut(uint8_t addr); static void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_t* port, uint32_t flag) { @@ -188,14 +186,6 @@ static void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_ { pio_hw_endpoint_t* ep = PIO_USB_HW_EP(ep_idx); uint8_t const tu_rhport = port - PIO_USB_HW_RPORT(0) + 1; - - // address is changed, update crc5 lut - if (new_addr && ep->ep_num == 0x80 && ep->actual_len == 0) - { - update_ep0_crc5_lut(new_addr); - new_addr = 0; - } - dcd_event_xfer_complete(tu_rhport, ep->ep_num, ep->actual_len, result, true); } } @@ -213,7 +203,6 @@ void __no_inline_not_in_flash_func(pio_usb_device_irq_handler)(uint8_t root_id) if (ints & PIO_USB_INTS_RESET_END_BITS) { - new_addr = 0; dcd_event_bus_reset(tu_rhport, TUSB_SPEED_FULL, true); } -- cgit v1.3.1 From b5a9537eea81bd6ffd8d575dbd2b5823c2fc1f0e Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 16 Apr 2022 01:19:51 +0700 Subject: support pio dcd endpiont stall --- lib/Pico-PIO-USB | 2 +- src/portable/raspberrypi/pio_usb/dcd_pio_usb.c | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) (limited to 'src/portable') diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index ed84b4de8..d6712cad5 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit ed84b4de88e7c22bb56cb53bf85f1a2c5dd8b8fc +Subproject commit d6712cad5bfbddb25647974f0d583596e703c06f diff --git a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c index dc9cbb45b..7744a11cd 100644 --- a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c @@ -136,14 +136,17 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; - (void) ep_addr; + pio_hw_endpoint_t *ep = pio_usb_device_get_ep(ep_addr); + ep->stalled = true; } // clear stall, data toggle is also reset to DATA0 void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; - (void) ep_addr; + pio_hw_endpoint_t *ep = pio_usb_device_get_ep(ep_addr); + ep->data_id = 0; + ep->stalled = false; } //--------------------------------------------------------------------+ -- cgit v1.3.1 From a32cb1bb93ce986af9ed83f5d378c26bb4df2b1e Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 18 Apr 2022 17:49:21 +0700 Subject: clean up pio driver --- lib/Pico-PIO-USB | 2 +- src/device/dcd.h | 32 ++++++++++++++++++++--- src/device/usbd.c | 36 ++------------------------ src/device/usbd.h | 2 +- src/portable/raspberrypi/pio_usb/dcd_pio_usb.c | 7 ++--- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 6 ++--- 6 files changed, 39 insertions(+), 46 deletions(-) (limited to 'src/portable') diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index d6712cad5..98e3feefc 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit d6712cad5bfbddb25647974f0d583596e703c06f +Subproject commit 98e3feefcd1c7218bced0ea2ea35530fd1b550e4 diff --git a/src/device/dcd.h b/src/device/dcd.h index 8efbc90ef..bc68c9be6 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -174,16 +174,40 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr); extern void dcd_event_handler(dcd_event_t const * event, bool in_isr); // helper to send bus signal event -extern void dcd_event_bus_signal (uint8_t rhport, dcd_eventid_t eid, bool in_isr); +TU_ATTR_ALWAYS_INLINE static inline void dcd_event_bus_signal (uint8_t rhport, dcd_eventid_t eid, bool in_isr) +{ + dcd_event_t event = { .rhport = rhport, .event_id = eid }; + dcd_event_handler(&event, in_isr); +} // helper to send bus reset event -extern void dcd_event_bus_reset (uint8_t rhport, tusb_speed_t speed, bool in_isr); +TU_ATTR_ALWAYS_INLINE static inline void dcd_event_bus_reset (uint8_t rhport, tusb_speed_t speed, bool in_isr) +{ + dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_BUS_RESET }; + event.bus_reset.speed = speed; + dcd_event_handler(&event, in_isr); +} // helper to send setup received -extern void dcd_event_setup_received(uint8_t rhport, uint8_t const * setup, bool in_isr); +TU_ATTR_ALWAYS_INLINE static inline void dcd_event_setup_received(uint8_t rhport, uint8_t const * setup, bool in_isr) +{ + dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_SETUP_RECEIVED }; + memcpy(&event.setup_received, setup, 8); + + dcd_event_handler(&event, in_isr); +} // helper to send transfer complete event -extern void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_bytes, uint8_t result, bool in_isr); +TU_ATTR_ALWAYS_INLINE static inline void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_bytes, uint8_t result, bool in_isr) +{ + dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_XFER_COMPLETE }; + + event.xfer_complete.ep_addr = ep_addr; + event.xfer_complete.len = xferred_bytes; + event.xfer_complete.result = result; + + dcd_event_handler(&event, in_isr); +} #ifdef __cplusplus } diff --git a/src/device/usbd.c b/src/device/usbd.c index 7ab2660f4..8d5d54b86 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -265,7 +265,7 @@ static inline usbd_class_driver_t const * get_driver(uint8_t drvid) //--------------------------------------------------------------------+ enum { RHPORT_INVALID = 0xFFu }; -static uint8_t _usbd_rhport = RHPORT_INVALID; +static volatile uint8_t _usbd_rhport = RHPORT_INVALID; // Event queue // usbd_int_set() is used as mutex in OS NONE config @@ -1065,7 +1065,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const //--------------------------------------------------------------------+ // DCD Event Handler //--------------------------------------------------------------------+ -void dcd_event_handler(dcd_event_t const * event, bool in_isr) +void __no_inline_not_in_flash_func(dcd_event_handler)(dcd_event_t const * event, bool in_isr) { switch (event->event_id) { @@ -1115,38 +1115,6 @@ void dcd_event_handler(dcd_event_t const * event, bool in_isr) } } -void dcd_event_bus_signal (uint8_t rhport, dcd_eventid_t eid, bool in_isr) -{ - dcd_event_t event = { .rhport = rhport, .event_id = eid }; - dcd_event_handler(&event, in_isr); -} - -void dcd_event_bus_reset (uint8_t rhport, tusb_speed_t speed, bool in_isr) -{ - dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_BUS_RESET }; - event.bus_reset.speed = speed; - dcd_event_handler(&event, in_isr); -} - -void dcd_event_setup_received(uint8_t rhport, uint8_t const * setup, bool in_isr) -{ - dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_SETUP_RECEIVED }; - memcpy(&event.setup_received, setup, 8); - - dcd_event_handler(&event, in_isr); -} - -void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_bytes, uint8_t result, bool in_isr) -{ - dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_XFER_COMPLETE }; - - event.xfer_complete.ep_addr = ep_addr; - event.xfer_complete.len = xferred_bytes; - event.xfer_complete.result = result; - - dcd_event_handler(&event, in_isr); -} - //--------------------------------------------------------------------+ // USBD API For Class Driver //--------------------------------------------------------------------+ diff --git a/src/device/usbd.h b/src/device/usbd.h index b2bf8ba9d..32c82e75a 100644 --- a/src/device/usbd.h +++ b/src/device/usbd.h @@ -46,7 +46,7 @@ bool tud_inited(void); // Task function should be called in main/rtos loop void tud_task (void); -// Check if there is pending events need proccessing by tud_task() +// Check if there is pending events need processing by tud_task() bool tud_task_event_ready(void); // Interrupt handler, name alias to DCD diff --git a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c index 7744a11cd..38867ea1c 100644 --- a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c @@ -78,7 +78,7 @@ void dcd_set_address (uint8_t rhport, uint8_t dev_addr) // must be called before queuing status pio_usb_device_set_address(pio_rhport, dev_addr); - pio_usb_device_endpoint_transfer(pio_rhport, 0x80, NULL, 0); + dcd_edpt_xfer(rhport, 0x80, NULL, 0); } // Wake up host @@ -118,8 +118,9 @@ void dcd_edpt_close_all (uint8_t rhport) // Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) { - uint8_t const pio_rhport = RHPORT_PIO(rhport); - return pio_usb_device_endpoint_transfer(pio_rhport, ep_addr, buffer, total_bytes); + (void) rhport; + pio_hw_endpoint_t *ep = pio_usb_device_get_ep(ep_addr); + return pio_usb_endpoint_transfer(ep, buffer, total_bytes); } // Submit a transfer where is managed by FIFO, When complete dcd_event_xfer_complete() is invoked to notify the stack - optional, however, must be listed in usbd.c diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index 4bd318448..e311f16d0 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -51,7 +51,7 @@ static pio_usb_configuration_t pio_host_config = PIO_USB_DEFAULT_CONFIG; bool hcd_init(uint8_t rhport) { // To run USB SOF interrupt in core1, call this init in core1 - pio_usb_host_controller_init(&pio_host_config); + pio_usb_host_init(&pio_host_config); return true; } @@ -59,13 +59,13 @@ bool hcd_init(uint8_t rhport) void hcd_port_reset(uint8_t rhport) { rhport = RHPORT_PIO(rhport); - pio_usb_hw_port_reset_start(rhport); + pio_usb_host_port_reset_start(rhport); } void hcd_port_reset_end(uint8_t rhport) { rhport = RHPORT_PIO(rhport); - pio_usb_hw_port_reset_end(rhport); + pio_usb_host_port_reset_end(rhport); } bool hcd_port_connect_status(uint8_t rhport) -- cgit v1.3.1 From 52190e7308c723df952c8bfced25f70d333e22fe Mon Sep 17 00:00:00 2001 From: Nikitarc Date: Tue, 19 Apr 2022 21:53:00 +0200 Subject: Update dwc2_stm32.h Support STM32H7 with only 1 USB port: H72x / H73x / H7Ax / H7Bx --- src/portable/synopsys/dwc2/dwc2_stm32.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/portable') diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index 469045ac4..c4a4d310f 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -56,6 +56,11 @@ #define EP_FIFO_SIZE_FS 4096 #define EP_MAX_HS 9 #define EP_FIFO_SIZE_HS 4096 + #if (! defined USB2_OTG_FS) + // H7 with only 1 USB port: H72x / H73x / H7Ax / H7Bx + // USB_OTG_FS_PERIPH_BASE and OTG_FS_IRQn not defined + #define USB_OTG_FS_PERIPH_BASE USB1_OTG_HS_PERIPH_BASE + #define OTG_FS_IRQn OTG_HS_IRQn #elif CFG_TUSB_MCU == OPT_MCU_STM32F7 #include "stm32f7xx.h" -- cgit v1.3.1 From a90839688c11338451729838e45ae3aaa58864fe Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 20 Apr 2022 13:25:38 +0700 Subject: add msec timeout to osal_queue_receive(), tud_task() and tuh_task() both pending for event queue with timeout of 1 ms --- src/device/usbd.c | 3 +-- src/host/usbh.c | 2 +- src/osal/osal.h | 22 +++++++++---------- src/osal/osal_freertos.h | 29 ++++++++++++------------ src/osal/osal_mynewt.h | 22 ++++++++++--------- src/osal/osal_none.h | 28 ++++++++++++----------- src/osal/osal_pico.h | 44 +++++++++++++++++++------------------ src/osal/osal_rtthread.h | 28 ++++++++++++----------- src/osal/osal_rtx4.h | 28 +++++++++++------------ src/portable/sony/cxd56/dcd_cxd56.c | 2 +- src/tusb_option.h | 2 +- 11 files changed, 109 insertions(+), 101 deletions(-) (limited to 'src/portable') diff --git a/src/device/usbd.c b/src/device/usbd.c index 7ab2660f4..36b9c7cff 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -475,8 +475,7 @@ void tud_task (void) while (1) { dcd_event_t event; - - if ( !osal_queue_receive(_usbd_q, &event) ) return; + if ( !osal_queue_receive(_usbd_q, &event, 1) ) return; #if CFG_TUSB_DEBUG >= 2 if (event.event_id == DCD_EVENT_SETUP_RECEIVED) TU_LOG2("\r\n"); // extra line for setup diff --git a/src/host/usbh.c b/src/host/usbh.c index f534070de..ad90a1b1b 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -401,7 +401,7 @@ void tuh_task(void) while (1) { hcd_event_t event; - if ( !osal_queue_receive(_usbh_q, &event) ) return; + if ( !osal_queue_receive(_usbh_q, &event, 1) ) return; switch (event.event_id) { diff --git a/src/osal/osal.h b/src/osal/osal.h index 7111bbdb2..9d11866df 100644 --- a/src/osal/osal.h +++ b/src/osal/osal.h @@ -66,19 +66,19 @@ typedef void (*osal_task_func_t)( void * ); // OSAL Porting API // Should be implemented as static inline function in osal_port.h header /* - static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef); - static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr); - static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec); - static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl); // TODO removed + osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef); + bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr); + bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec); + void osal_semaphore_reset(osal_semaphore_t sem_hdl); // TODO removed - static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef); - static inline bool osal_mutex_lock (osal_mutex_t sem_hdl, uint32_t msec); - static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl); + osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef); + bool osal_mutex_lock (osal_mutex_t sem_hdl, uint32_t msec); + bool osal_mutex_unlock(osal_mutex_t mutex_hdl); - static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef); - static inline bool osal_queue_receive(osal_queue_t qhdl, void* data); - static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr); - static inline bool osal_queue_empty(osal_queue_t qhdl); + osal_queue_t osal_queue_create(osal_queue_def_t* qdef); + bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec); + bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr); + bool osal_queue_empty(osal_queue_t qhdl); */ //--------------------------------------------------------------------+ diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h index 69a026df5..c3a0756e1 100644 --- a/src/osal/osal_freertos.h +++ b/src/osal/osal_freertos.h @@ -40,7 +40,7 @@ extern "C" { //--------------------------------------------------------------------+ // TASK API //--------------------------------------------------------------------+ -static inline void osal_task_delay(uint32_t msec) +TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) { vTaskDelay( pdMS_TO_TICKS(msec) ); } @@ -51,12 +51,12 @@ static inline void osal_task_delay(uint32_t msec) typedef StaticSemaphore_t osal_semaphore_def_t; typedef SemaphoreHandle_t osal_semaphore_t; -static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef) +TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef) { return xSemaphoreCreateBinaryStatic(semdef); } -static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) +TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) { if ( !in_isr ) { @@ -78,13 +78,13 @@ static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) } } -static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec) +TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec) { uint32_t const ticks = (msec == OSAL_TIMEOUT_WAIT_FOREVER) ? portMAX_DELAY : pdMS_TO_TICKS(msec); return xSemaphoreTake(sem_hdl, ticks); } -static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) +TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) { xQueueReset(sem_hdl); } @@ -95,17 +95,17 @@ static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) typedef StaticSemaphore_t osal_mutex_def_t; typedef SemaphoreHandle_t osal_mutex_t; -static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) +TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) { return xSemaphoreCreateMutexStatic(mdef); } -static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec) +TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec) { return osal_semaphore_wait(mutex_hdl, msec); } -static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) +TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) { return xSemaphoreGive(mutex_hdl); } @@ -114,7 +114,7 @@ static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) // QUEUE API //--------------------------------------------------------------------+ -// role device/host is used by OS NONE for mutex (disable usb isr) only +// _int_set is not used with an RTOS #define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \ static _type _name##_##buf[_depth];\ osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf }; @@ -130,17 +130,18 @@ typedef struct typedef QueueHandle_t osal_queue_t; -static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) +TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) { return xQueueCreateStatic(qdef->depth, qdef->item_sz, (uint8_t*) qdef->buf, &qdef->sq); } -static inline bool osal_queue_receive(osal_queue_t qhdl, void* data) +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec) { - return xQueueReceive(qhdl, data, portMAX_DELAY); + uint32_t const ticks = (msec == OSAL_TIMEOUT_WAIT_FOREVER) ? portMAX_DELAY : pdMS_TO_TICKS(msec); + return xQueueReceive(qhdl, data, ticks); } -static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr) +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr) { if ( !in_isr ) { @@ -162,7 +163,7 @@ static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in } } -static inline bool osal_queue_empty(osal_queue_t qhdl) +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) { return uxQueueMessagesWaiting(qhdl) == 0; } diff --git a/src/osal/osal_mynewt.h b/src/osal/osal_mynewt.h index 78a257cd6..b8ea2087c 100644 --- a/src/osal/osal_mynewt.h +++ b/src/osal/osal_mynewt.h @@ -36,7 +36,7 @@ //--------------------------------------------------------------------+ // TASK API //--------------------------------------------------------------------+ -static inline void osal_task_delay(uint32_t msec) +TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) { os_time_delay( os_time_ms_to_ticks32(msec) ); } @@ -47,18 +47,18 @@ static inline void osal_task_delay(uint32_t msec) typedef struct os_sem osal_semaphore_def_t; typedef struct os_sem* osal_semaphore_t; -static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef) +TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef) { return (os_sem_init(semdef, 0) == OS_OK) ? (osal_semaphore_t) semdef : NULL; } -static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) +TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) { (void) in_isr; return os_sem_release(sem_hdl) == OS_OK; } -static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) +TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) { uint32_t const ticks = (msec == OSAL_TIMEOUT_WAIT_FOREVER) ? OS_TIMEOUT_NEVER : os_time_ms_to_ticks32(msec); return os_sem_pend(sem_hdl, ticks) == OS_OK; @@ -75,18 +75,18 @@ static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl) typedef struct os_mutex osal_mutex_def_t; typedef struct os_mutex* osal_mutex_t; -static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) +TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) { return (os_mutex_init(mdef) == OS_OK) ? (osal_mutex_t) mdef : NULL; } -static inline bool osal_mutex_lock(osal_mutex_t mutex_hdl, uint32_t msec) +TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock(osal_mutex_t mutex_hdl, uint32_t msec) { uint32_t const ticks = (msec == OSAL_TIMEOUT_WAIT_FOREVER) ? OS_TIMEOUT_NEVER : os_time_ms_to_ticks32(msec); return os_mutex_pend(mutex_hdl, ticks) == OS_OK; } -static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) +TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) { return os_mutex_release(mutex_hdl) == OS_OK; } @@ -116,7 +116,7 @@ typedef struct typedef osal_queue_def_t* osal_queue_t; -static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) +TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) { if ( OS_OK != os_mempool_init(&qdef->mpool, qdef->depth, qdef->item_sz, qdef->buf, "usbd queue") ) return NULL; if ( OS_OK != os_mempool_init(&qdef->epool, qdef->depth, sizeof(struct os_event), qdef->evbuf, "usbd evqueue") ) return NULL; @@ -125,8 +125,10 @@ static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) return (osal_queue_t) qdef; } -static inline bool osal_queue_receive(osal_queue_t qhdl, void* data) +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec) { + (void) msec; // os_eventq_get() does not take timeout, always behave as msec = WAIT_FOREVER + struct os_event* ev; ev = os_eventq_get(&qhdl->evq); @@ -161,7 +163,7 @@ static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in return true; } -static inline bool osal_queue_empty(osal_queue_t qhdl) +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) { return STAILQ_EMPTY(&qhdl->evq.evq_list); } diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h index 4217f0422..9c80e4548 100644 --- a/src/osal/osal_none.h +++ b/src/osal/osal_none.h @@ -46,13 +46,13 @@ typedef struct typedef osal_semaphore_def_t* osal_semaphore_t; -static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef) +TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef) { semdef->count = 0; return semdef; } -static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) +TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) { (void) in_isr; sem_hdl->count++; @@ -60,7 +60,7 @@ static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) } // TODO blocking for now -static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec) +TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec) { (void) msec; @@ -70,7 +70,7 @@ static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec) return true; } -static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl) +TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl) { sem_hdl->count = 0; } @@ -82,18 +82,18 @@ static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl) typedef osal_semaphore_def_t osal_mutex_def_t; typedef osal_semaphore_t osal_mutex_t; -static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) +TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) { mdef->count = 1; return mdef; } -static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec) +TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec) { return osal_semaphore_wait(mutex_hdl, msec); } -static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) +TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) { return osal_semaphore_post(mutex_hdl, false); } @@ -120,27 +120,29 @@ typedef osal_queue_def_t* osal_queue_t; } // lock queue by disable USB interrupt -static inline void _osal_q_lock(osal_queue_t qhdl) +TU_ATTR_ALWAYS_INLINE static inline void _osal_q_lock(osal_queue_t qhdl) { // disable dcd/hcd interrupt qhdl->interrupt_set(false); } // unlock queue -static inline void _osal_q_unlock(osal_queue_t qhdl) +TU_ATTR_ALWAYS_INLINE static inline void _osal_q_unlock(osal_queue_t qhdl) { // enable dcd/hcd interrupt qhdl->interrupt_set(true); } -static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) +TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) { tu_fifo_clear(&qdef->ff); return (osal_queue_t) qdef; } -static inline bool osal_queue_receive(osal_queue_t qhdl, void* data) +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec) { + (void) msec; // not used, always behave as msec = 0 + _osal_q_lock(qhdl); bool success = tu_fifo_read(&qhdl->ff, data); _osal_q_unlock(qhdl); @@ -148,7 +150,7 @@ static inline bool osal_queue_receive(osal_queue_t qhdl, void* data) return success; } -static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr) +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr) { if (!in_isr) { _osal_q_lock(qhdl); @@ -165,7 +167,7 @@ static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in return success; } -static inline bool osal_queue_empty(osal_queue_t qhdl) +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) { // Skip queue lock/unlock since this function is primarily called // with interrupt disabled before going into low power mode diff --git a/src/osal/osal_pico.h b/src/osal/osal_pico.h index 70432d22b..abef286b4 100644 --- a/src/osal/osal_pico.h +++ b/src/osal/osal_pico.h @@ -39,7 +39,7 @@ //--------------------------------------------------------------------+ // TASK API //--------------------------------------------------------------------+ -static inline void osal_task_delay(uint32_t msec) +TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) { sleep_ms(msec); } @@ -49,25 +49,25 @@ static inline void osal_task_delay(uint32_t msec) //--------------------------------------------------------------------+ typedef struct semaphore osal_semaphore_def_t, *osal_semaphore_t; -static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef) +TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef) { sem_init(semdef, 0, 255); return semdef; } -static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) +TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) { (void) in_isr; sem_release(sem_hdl); return true; } -static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec) +TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec) { return sem_acquire_timeout_ms(sem_hdl, msec); } -static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl) +TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl) { sem_reset(sem_hdl, 0); } @@ -78,21 +78,21 @@ static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl) //--------------------------------------------------------------------+ typedef struct mutex osal_mutex_def_t, *osal_mutex_t; -static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) +TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) { - mutex_init(mdef); - return mdef; + mutex_init(mdef); + return mdef; } -static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec) +TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec) { - return mutex_enter_timeout_ms(mutex_hdl, msec); + return mutex_enter_timeout_ms(mutex_hdl, msec); } -static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) +TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) { - mutex_exit(mutex_hdl); - return true; + mutex_exit(mutex_hdl); + return true; } //--------------------------------------------------------------------+ @@ -121,26 +121,28 @@ typedef osal_queue_def_t* osal_queue_t; } // lock queue by disable USB interrupt -static inline void _osal_q_lock(osal_queue_t qhdl) +TU_ATTR_ALWAYS_INLINE static inline void _osal_q_lock(osal_queue_t qhdl) { - critical_section_enter_blocking(&qhdl->critsec); + critical_section_enter_blocking(&qhdl->critsec); } // unlock queue -static inline void _osal_q_unlock(osal_queue_t qhdl) +TU_ATTR_ALWAYS_INLINE static inline void _osal_q_unlock(osal_queue_t qhdl) { - critical_section_exit(&qhdl->critsec); + critical_section_exit(&qhdl->critsec); } -static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) +TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) { critical_section_init(&qdef->critsec); tu_fifo_clear(&qdef->ff); return (osal_queue_t) qdef; } -static inline bool osal_queue_receive(osal_queue_t qhdl, void* data) +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec) { + (void) msec; // not used, always behave as msec = 0 + // TODO: revisit... docs say that mutexes are never used from IRQ context, // however osal_queue_recieve may be. therefore my assumption is that // the fifo mutex is not populated for queues used from an IRQ context @@ -153,7 +155,7 @@ static inline bool osal_queue_receive(osal_queue_t qhdl, void* data) return success; } -static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr) +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr) { // TODO: revisit... docs say that mutexes are never used from IRQ context, // however osal_queue_recieve may be. therefore my assumption is that @@ -170,7 +172,7 @@ static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in return success; } -static inline bool osal_queue_empty(osal_queue_t qhdl) +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) { // TODO: revisit; whether this is true or not currently, tu_fifo_empty is a single // volatile read. diff --git a/src/osal/osal_rtthread.h b/src/osal/osal_rtthread.h index 0845175b8..a790a5e27 100644 --- a/src/osal/osal_rtthread.h +++ b/src/osal/osal_rtthread.h @@ -37,7 +37,7 @@ extern "C" { //--------------------------------------------------------------------+ // TASK API //--------------------------------------------------------------------+ -static inline void osal_task_delay(uint32_t msec) { +TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) { rt_thread_mdelay(msec); } @@ -47,22 +47,22 @@ static inline void osal_task_delay(uint32_t msec) { typedef struct rt_semaphore osal_semaphore_def_t; typedef rt_sem_t osal_semaphore_t; -static inline osal_semaphore_t +TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t *semdef) { rt_sem_init(semdef, "tusb", 0, RT_IPC_FLAG_FIFO); return semdef; } -static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) { +TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) { (void) in_isr; return rt_sem_release(sem_hdl) == RT_EOK; } -static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) { +TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) { return rt_sem_take(sem_hdl, rt_tick_from_millisecond(msec)) == RT_EOK; } -static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) { +TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) { // TODO: implement } @@ -72,16 +72,16 @@ static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) { typedef struct rt_mutex osal_mutex_def_t; typedef rt_mutex_t osal_mutex_t; -static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t *mdef) { +TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t *mdef) { rt_mutex_init(mdef, "tusb", RT_IPC_FLAG_FIFO); return mdef; } -static inline bool osal_mutex_lock(osal_mutex_t mutex_hdl, uint32_t msec) { +TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock(osal_mutex_t mutex_hdl, uint32_t msec) { return rt_mutex_take(mutex_hdl, rt_tick_from_millisecond(msec)) == RT_EOK; } -static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) { +TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) { return rt_mutex_release(mutex_hdl) == RT_EOK; } @@ -104,22 +104,24 @@ typedef struct { typedef rt_mq_t osal_queue_t; -static inline osal_queue_t osal_queue_create(osal_queue_def_t *qdef) { +TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t *qdef) { rt_mq_init(&(qdef->sq), "tusb", qdef->buf, qdef->item_sz, qdef->item_sz * qdef->depth, RT_IPC_FLAG_FIFO); return &(qdef->sq); } -static inline bool osal_queue_receive(osal_queue_t qhdl, void *data) { - return rt_mq_recv(qhdl, data, qhdl->msg_size, RT_WAITING_FOREVER) == RT_EOK; +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void *data, uint32_t msec) { + + rt_tick_t tick = rt_tick_from_millisecond((rt_int32_t) msec)); + return rt_mq_recv(qhdl, data, qhdl->msg_size, tick) == RT_EOK; } -static inline bool osal_queue_send(osal_queue_t qhdl, void const *data, bool in_isr) { +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const *data, bool in_isr) { (void) in_isr; return rt_mq_send(qhdl, (void *)data, qhdl->msg_size) == RT_EOK; } -static inline bool osal_queue_empty(osal_queue_t qhdl) { +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) { return (qhdl->entry) == 0; } diff --git a/src/osal/osal_rtx4.h b/src/osal/osal_rtx4.h index 1856a5d9a..dea1c12c8 100644 --- a/src/osal/osal_rtx4.h +++ b/src/osal/osal_rtx4.h @@ -37,7 +37,7 @@ extern "C" { //--------------------------------------------------------------------+ // TASK API //--------------------------------------------------------------------+ -static inline void osal_task_delay(uint32_t msec) +TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) { uint16_t hi = msec >> 16; uint16_t lo = msec; @@ -47,7 +47,7 @@ static inline void osal_task_delay(uint32_t msec) os_dly_wait(lo); } -static inline uint16_t msec2wait(uint32_t msec) { +TU_ATTR_ALWAYS_INLINE static inline uint16_t msec2wait(uint32_t msec) { if (msec == OSAL_TIMEOUT_WAIT_FOREVER) return 0xFFFF; else if (msec >= 0xFFFE) @@ -62,12 +62,12 @@ static inline uint16_t msec2wait(uint32_t msec) { typedef OS_SEM osal_semaphore_def_t; typedef OS_ID osal_semaphore_t; -static inline OS_ID osal_semaphore_create(osal_semaphore_def_t* semdef) { +TU_ATTR_ALWAYS_INLINE static inline OS_ID osal_semaphore_create(osal_semaphore_def_t* semdef) { os_sem_init(semdef, 0); return semdef; } -static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) { +TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) { if ( !in_isr ) { os_sem_send(sem_hdl); } else { @@ -76,11 +76,11 @@ static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) { return true; } -static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec) { +TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec) { return os_sem_wait(sem_hdl, msec2wait(msec)) != OS_R_TMO; } -static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) { +TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) { // TODO: implement } @@ -90,18 +90,18 @@ static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) { typedef OS_MUT osal_mutex_def_t; typedef OS_ID osal_mutex_t; -static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) +TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) { os_mut_init(mdef); return mdef; } -static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec) +TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec) { return os_mut_wait(mutex_hdl, msec2wait(msec)) != OS_R_TMO; } -static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) +TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) { return os_mut_release(mutex_hdl) == OS_R_OK; } @@ -127,23 +127,23 @@ typedef struct typedef osal_queue_def_t* osal_queue_t; -static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) +TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) { os_mbx_init(qdef->mbox, (qdef->depth + 4) * 4); _init_box(qdef->pool, ((qdef->item_sz+3)/4)*(qdef->depth) + 3, qdef->item_sz); return qdef; } -static inline bool osal_queue_receive(osal_queue_t qhdl, void* data) +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec) { void* buf; - os_mbx_wait(qhdl->mbox, &buf, 0xFFFF); + os_mbx_wait(qhdl->mbox, &buf, msec2wait(msec)); memcpy(data, buf, qhdl->item_sz); _free_box(qhdl->pool, buf); return true; } -static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr) +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr) { void* buf = _alloc_box(qhdl->pool); memcpy(buf, data, qhdl->item_sz); @@ -158,7 +158,7 @@ static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in return true; } -static inline bool osal_queue_empty(osal_queue_t qhdl) +TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) { return os_mbx_check(qhdl->mbox) == qhdl->depth; } diff --git a/src/portable/sony/cxd56/dcd_cxd56.c b/src/portable/sony/cxd56/dcd_cxd56.c index fbea03b1d..d3154e58f 100644 --- a/src/portable/sony/cxd56/dcd_cxd56.c +++ b/src/portable/sony/cxd56/dcd_cxd56.c @@ -363,7 +363,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to if (usbdcd_driver.setup_processed) { - if (osal_queue_receive(usbdcd_driver.setup_queue, &ctrl)) + if (osal_queue_receive(usbdcd_driver.setup_queue, &ctrl, 100)) { usbdcd_driver.setup_processed = false; dcd_event_setup_received(0, (uint8_t *)&ctrl, false); diff --git a/src/tusb_option.h b/src/tusb_option.h index bd87a953c..9cacedd4c 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -286,7 +286,7 @@ #endif // mutex is only needed for RTOS TODO also required with multiple core MCUs -#define TUSB_OPT_MUTEX (CFG_TUSB_OS != OPT_OS_NONE) +#define TUSB_OPT_MUTEX (CFG_TUSB_OS != OPT_OS_NONE) //-------------------------------------------------------------------- // DEVICE OPTIONS -- cgit v1.3.1 From c422b9ef419d4abc52b8c1e95ba4577ac6ae6a8c Mon Sep 17 00:00:00 2001 From: Nikitarc Date: Wed, 20 Apr 2022 11:29:03 +0200 Subject: Update dwc2_stm32.h Add missing #endif --- src/portable/synopsys/dwc2/dwc2_stm32.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/portable') diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index c4a4d310f..d54bf1fd7 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -61,6 +61,7 @@ // USB_OTG_FS_PERIPH_BASE and OTG_FS_IRQn not defined #define USB_OTG_FS_PERIPH_BASE USB1_OTG_HS_PERIPH_BASE #define OTG_FS_IRQn OTG_HS_IRQn + #endif #elif CFG_TUSB_MCU == OPT_MCU_STM32F7 #include "stm32f7xx.h" -- cgit v1.3.1 From 12debd7763bfc6f55566e5f4f8c982a55f206815 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 22 Apr 2022 01:06:17 +0700 Subject: keep up with pio usb --- hw/bsp/rp2040/family.cmake | 1 - lib/Pico-PIO-USB | 2 +- src/common/tusb_debug.h | 4 ++++ src/portable/raspberrypi/pio_usb/dcd_pio_usb.c | 10 +++++----- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 4 ++-- 5 files changed, 12 insertions(+), 9 deletions(-) (limited to 'src/portable') diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index d872c35ea..70e18293f 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -32,7 +32,6 @@ if (NOT TARGET _rp2040_family_inclusion_marker) ${TOP}/lib/Pico-PIO-USB/pio_usb.c ${TOP}/lib/Pico-PIO-USB/pio_usb_host.c ${TOP}/lib/Pico-PIO-USB/pio_usb_device.c - ${TOP}/lib/Pico-PIO-USB/pio_usb_hw.c ${TOP}/lib/Pico-PIO-USB/usb_crc.c ) diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index d15fffd95..f656d703f 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit d15fffd950018c60cba5c98d676a4fafaeea2648 +Subproject commit f656d703f3cee1e589eebb6606e204f59afb5611 diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index 647e8a8db..1ea2c19f5 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -65,6 +65,7 @@ static inline void tu_print_var(uint8_t const* buf, uint32_t bufsize) // Log with Level #define TU_LOG(n, ...) TU_XSTRCAT(TU_LOG, n)(__VA_ARGS__) #define TU_LOG_MEM(n, ...) TU_XSTRCAT3(TU_LOG, n, _MEM)(__VA_ARGS__) +#define TU_LOG_ARR(n, ...) TU_XSTRCAT3(TU_LOG, n, _ARR)(__VA_ARGS__) #define TU_LOG_VAR(n, ...) TU_XSTRCAT3(TU_LOG, n, _VAR)(__VA_ARGS__) #define TU_LOG_INT(n, ...) TU_XSTRCAT3(TU_LOG, n, _INT)(__VA_ARGS__) #define TU_LOG_HEX(n, ...) TU_XSTRCAT3(TU_LOG, n, _HEX)(__VA_ARGS__) @@ -74,6 +75,7 @@ static inline void tu_print_var(uint8_t const* buf, uint32_t bufsize) // Log Level 1: Error #define TU_LOG1 tu_printf #define TU_LOG1_MEM tu_print_mem +#define TU_LOG1_ARR(_x, _n) tu_print_var((uint8_t const*)(_x), _n) #define TU_LOG1_VAR(_x) tu_print_var((uint8_t const*)(_x), sizeof(*(_x))) #define TU_LOG1_INT(_x) tu_printf(#_x " = %ld\r\n", (unsigned long) (_x) ) #define TU_LOG1_HEX(_x) tu_printf(#_x " = %lX\r\n", (unsigned long) (_x) ) @@ -82,6 +84,7 @@ static inline void tu_print_var(uint8_t const* buf, uint32_t bufsize) #if CFG_TUSB_DEBUG >= 2 #define TU_LOG2 TU_LOG1 #define TU_LOG2_MEM TU_LOG1_MEM + #define TU_LOG2_ARR TU_LOG1_ARR #define TU_LOG2_VAR TU_LOG1_VAR #define TU_LOG2_INT TU_LOG1_INT #define TU_LOG2_HEX TU_LOG1_HEX @@ -91,6 +94,7 @@ static inline void tu_print_var(uint8_t const* buf, uint32_t bufsize) #if CFG_TUSB_DEBUG >= 3 #define TU_LOG3 TU_LOG1 #define TU_LOG3_MEM TU_LOG1_MEM + #define TU_LOG3_ARR TU_LOG1_ARR #define TU_LOG3_VAR TU_LOG1_VAR #define TU_LOG3_INT TU_LOG1_INT #define TU_LOG3_HEX TU_LOG1_HEX diff --git a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c index 38867ea1c..1cb850654 100644 --- a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c @@ -119,8 +119,8 @@ void dcd_edpt_close_all (uint8_t rhport) bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) { (void) rhport; - pio_hw_endpoint_t *ep = pio_usb_device_get_ep(ep_addr); - return pio_usb_endpoint_transfer(ep, buffer, total_bytes); + endpoint_t *ep = pio_usb_device_get_ep(ep_addr); + return pio_usb_ll_endpoint_transfer(ep, buffer, total_bytes); } // Submit a transfer where is managed by FIFO, When complete dcd_event_xfer_complete() is invoked to notify the stack - optional, however, must be listed in usbd.c @@ -137,7 +137,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; - pio_hw_endpoint_t *ep = pio_usb_device_get_ep(ep_addr); + endpoint_t *ep = pio_usb_device_get_ep(ep_addr); ep->stalled = true; } @@ -145,7 +145,7 @@ void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; - pio_hw_endpoint_t *ep = pio_usb_device_get_ep(ep_addr); + endpoint_t *ep = pio_usb_device_get_ep(ep_addr); ep->data_id = 0; ep->stalled = false; } @@ -188,7 +188,7 @@ static void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_ if (ep_all & mask) { - pio_hw_endpoint_t* ep = PIO_USB_HW_EP(ep_idx); + endpoint_t* ep = PIO_USB_HW_EP(ep_idx); uint8_t const tu_rhport = port - PIO_USB_HW_RPORT(0) + 1; dcd_event_xfer_complete(tu_rhport, ep->ep_num, ep->actual_len, result, true); } diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index e311f16d0..2615b2356 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -73,7 +73,7 @@ bool hcd_port_connect_status(uint8_t rhport) rhport = RHPORT_PIO(rhport); pio_hw_root_port_t *root = PIO_USB_HW_RPORT(rhport); - port_pin_status_t line_state = pio_hw_get_line_state(root); + port_pin_status_t line_state = pio_usb_ll_get_line_state(root); return line_state != PORT_PIN_SE0; } @@ -187,7 +187,7 @@ static void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_ if (ep_all & mask) { - pio_hw_endpoint_t* ep = PIO_USB_HW_EP(ep_idx); + endpoint_t* ep = PIO_USB_HW_EP(ep_idx); hcd_event_xfer_complete(ep->dev_addr, ep->ep_num, ep->actual_len, result, true); } } -- cgit v1.3.1 From 2f9b9a31be9d511d0bbb99671a2f5e7818cf8a55 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 22 Apr 2022 18:23:38 +0700 Subject: more with pio usb --- lib/Pico-PIO-USB | 2 +- src/portable/raspberrypi/pio_usb/dcd_pio_usb.c | 29 +++++++++++++------------- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 13 ++++++------ 3 files changed, 23 insertions(+), 21 deletions(-) (limited to 'src/portable') diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index f656d703f..496454021 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit f656d703f3cee1e589eebb6606e204f59afb5611 +Subproject commit 496454021deab00e1c425a6eb70009666fa036b3 diff --git a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c index 1cb850654..d73419fe3 100644 --- a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c @@ -31,6 +31,7 @@ #include "pico.h" #include "hardware/pio.h" #include "pio_usb.h" +#include "pio_usb_ll.h" #include "device/dcd.h" @@ -119,7 +120,7 @@ void dcd_edpt_close_all (uint8_t rhport) bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) { (void) rhport; - endpoint_t *ep = pio_usb_device_get_ep(ep_addr); + endpoint_t *ep = pio_usb_device_get_endpoint_by_address(ep_addr); return pio_usb_ll_endpoint_transfer(ep, buffer, total_bytes); } @@ -137,7 +138,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; - endpoint_t *ep = pio_usb_device_get_ep(ep_addr); + endpoint_t *ep = pio_usb_device_get_endpoint_by_address(ep_addr); ep->stalled = true; } @@ -145,7 +146,7 @@ void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; - endpoint_t *ep = pio_usb_device_get_ep(ep_addr); + endpoint_t *ep = pio_usb_device_get_endpoint_by_address(ep_addr); ep->data_id = 0; ep->stalled = false; } @@ -154,24 +155,24 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) // //--------------------------------------------------------------------+ -static void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_t* port, uint32_t flag) +static void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* rport, uint32_t flag) { volatile uint32_t* ep_reg; xfer_result_t result; if ( flag == PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) { - ep_reg = &port->ep_complete; + ep_reg = &rport->ep_complete; result = XFER_RESULT_SUCCESS; } else if ( flag == PIO_USB_INTS_ENDPOINT_ERROR_BITS ) { - ep_reg = &port->ep_error; + ep_reg = &rport->ep_error; result = XFER_RESULT_FAILED; } else if ( flag == PIO_USB_INTS_ENDPOINT_STALLED_BITS ) { - ep_reg = &port->ep_stalled; + ep_reg = &rport->ep_stalled; result = XFER_RESULT_STALLED; } else @@ -188,8 +189,8 @@ static void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_ if (ep_all & mask) { - endpoint_t* ep = PIO_USB_HW_EP(ep_idx); - uint8_t const tu_rhport = port - PIO_USB_HW_RPORT(0) + 1; + endpoint_t* ep = PIO_USB_ENDPOINT(ep_idx); + uint8_t const tu_rhport = rport - PIO_USB_ROOT_PORT(0) + 1; dcd_event_xfer_complete(tu_rhport, ep->ep_num, ep->actual_len, result, true); } } @@ -202,8 +203,8 @@ static void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_ void __no_inline_not_in_flash_func(pio_usb_device_irq_handler)(uint8_t root_id) { uint8_t const tu_rhport = root_id + 1; - pio_hw_root_port_t* port = PIO_USB_HW_RPORT(root_id); - uint32_t const ints = port->ints; + root_port_t* rport = PIO_USB_ROOT_PORT(root_id); + uint32_t const ints = rport->ints; if (ints & PIO_USB_INTS_RESET_END_BITS) { @@ -212,16 +213,16 @@ void __no_inline_not_in_flash_func(pio_usb_device_irq_handler)(uint8_t root_id) if (ints & PIO_USB_INTS_SETUP_REQ_BITS) { - dcd_event_setup_received(tu_rhport, port->setup_packet, true); + dcd_event_setup_received(tu_rhport, rport->setup_packet, true); } if ( ints & PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) { - handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_COMPLETE_BITS); + handle_endpoint_irq(rport, PIO_USB_INTS_ENDPOINT_COMPLETE_BITS); } // clear all - port->ints &= ~ints; + rport->ints &= ~ints; } #endif diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index 2615b2356..f881716ec 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -31,6 +31,7 @@ #include "pico.h" #include "hardware/pio.h" #include "pio_usb.h" +#include "pio_usb_ll.h" //--------------------------------------------------------------------+ // INCLUDE @@ -72,8 +73,8 @@ bool hcd_port_connect_status(uint8_t rhport) { rhport = RHPORT_PIO(rhport); - pio_hw_root_port_t *root = PIO_USB_HW_RPORT(rhport); - port_pin_status_t line_state = pio_usb_ll_get_line_state(root); + root_port_t *root = PIO_USB_ROOT_PORT(rhport); + port_pin_status_t line_state = pio_usb_bus_get_line_state(root); return line_state != PORT_PIN_SE0; } @@ -82,7 +83,7 @@ tusb_speed_t hcd_port_speed_get(uint8_t rhport) { // TODO determine link speed rhport = RHPORT_PIO(rhport); - return PIO_USB_HW_RPORT(rhport)->is_fullspeed ? TUSB_SPEED_FULL : TUSB_SPEED_LOW; + return PIO_USB_ROOT_PORT(rhport)->is_fullspeed ? TUSB_SPEED_FULL : TUSB_SPEED_LOW; } // Close all opened endpoint belong to this device @@ -153,7 +154,7 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) return true; } -static void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_t* port, uint32_t flag) +static void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* port, uint32_t flag) { volatile uint32_t* ep_reg; xfer_result_t result; @@ -187,7 +188,7 @@ static void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_ if (ep_all & mask) { - endpoint_t* ep = PIO_USB_HW_EP(ep_idx); + endpoint_t* ep = PIO_USB_ENDPOINT(ep_idx); hcd_event_xfer_complete(ep->dev_addr, ep->ep_num, ep->actual_len, result, true); } } @@ -199,7 +200,7 @@ static void __no_inline_not_in_flash_func(handle_endpoint_irq)(pio_hw_root_port_ // IRQ Handler void __no_inline_not_in_flash_func(pio_usb_host_irq_handler)(uint8_t root_id) { - pio_hw_root_port_t* port = PIO_USB_HW_RPORT(root_id); + root_port_t* port = PIO_USB_ROOT_PORT(root_id); uint32_t const ints = port->ints; if ( ints & PIO_USB_INTS_CONNECT_BITS ) -- cgit v1.3.1 From 26a25279bc7196d93ca074203ac35260298df472 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 26 Apr 2022 00:35:16 +0700 Subject: follow pio usb changes --- lib/Pico-PIO-USB | 2 +- src/portable/raspberrypi/pio_usb/dcd_pio_usb.c | 11 +++---- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 40 ++++++++++++++------------ 3 files changed, 27 insertions(+), 26 deletions(-) (limited to 'src/portable') diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index 496454021..d2c70ae7b 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit 496454021deab00e1c425a6eb70009666fa036b3 +Subproject commit d2c70ae7b6a122027b7c5c9aa4769fab19e8e886 diff --git a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c index d73419fe3..09be69afa 100644 --- a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c @@ -74,11 +74,8 @@ void dcd_int_disable (uint8_t rhport) // Receive Set Address request, mcu port must also include status IN response void dcd_set_address (uint8_t rhport, uint8_t dev_addr) { - uint8_t const pio_rhport = RHPORT_PIO(rhport); - // must be called before queuing status - pio_usb_device_set_address(pio_rhport, dev_addr); - + pio_usb_device_set_address(dev_addr); dcd_edpt_xfer(rhport, 0x80, NULL, 0); } @@ -107,8 +104,8 @@ void dcd_disconnect(uint8_t rhport) // Configure endpoint's registers according to descriptor bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_ep) { - uint8_t const pio_rhport = RHPORT_PIO(rhport); - return pio_usb_device_endpoint_open(pio_rhport, (uint8_t const*) desc_ep); + (void) rhport; + return pio_usb_device_endpoint_open((uint8_t const*) desc_ep); } void dcd_edpt_close_all (uint8_t rhport) @@ -121,7 +118,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t { (void) rhport; endpoint_t *ep = pio_usb_device_get_endpoint_by_address(ep_addr); - return pio_usb_ll_endpoint_transfer(ep, buffer, total_bytes); + return pio_usb_ll_transfer_start(ep, buffer, total_bytes); } // Submit a transfer where is managed by FIFO, When complete dcd_event_xfer_complete() is invoked to notify the stack - optional, however, must be listed in usbd.c diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index f881716ec..2b3d72df8 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -59,21 +59,21 @@ bool hcd_init(uint8_t rhport) void hcd_port_reset(uint8_t rhport) { - rhport = RHPORT_PIO(rhport); - pio_usb_host_port_reset_start(rhport); + uint8_t pio_rhport = RHPORT_PIO(rhport); + pio_usb_host_port_reset_start(pio_rhport); } void hcd_port_reset_end(uint8_t rhport) { - rhport = RHPORT_PIO(rhport); - pio_usb_host_port_reset_end(rhport); + uint8_t pio_rhport = RHPORT_PIO(rhport); + pio_usb_host_port_reset_end(pio_rhport); } bool hcd_port_connect_status(uint8_t rhport) { - rhport = RHPORT_PIO(rhport); + uint8_t pio_rhport = RHPORT_PIO(rhport); - root_port_t *root = PIO_USB_ROOT_PORT(rhport); + root_port_t *root = PIO_USB_ROOT_PORT(pio_rhport); port_pin_status_t line_state = pio_usb_bus_get_line_state(root); return line_state != PORT_PIN_SE0; @@ -82,28 +82,31 @@ bool hcd_port_connect_status(uint8_t rhport) tusb_speed_t hcd_port_speed_get(uint8_t rhport) { // TODO determine link speed - rhport = RHPORT_PIO(rhport); - return PIO_USB_ROOT_PORT(rhport)->is_fullspeed ? TUSB_SPEED_FULL : TUSB_SPEED_LOW; + uint8_t pio_rhport = RHPORT_PIO(rhport); + return PIO_USB_ROOT_PORT(pio_rhport)->is_fullspeed ? TUSB_SPEED_FULL : TUSB_SPEED_LOW; } // Close all opened endpoint belong to this device void hcd_device_close(uint8_t rhport, uint8_t dev_addr) { - rhport = RHPORT_PIO(rhport); - pio_usb_host_close_device(rhport, dev_addr); + uint8_t pio_rhport = RHPORT_PIO(rhport); + pio_usb_host_close_device(pio_rhport, dev_addr); } uint32_t hcd_frame_number(uint8_t rhport) { + (void) rhport; return 0; } void hcd_int_enable(uint8_t rhport) { + (void) rhport; } void hcd_int_disable(uint8_t rhport) { + (void) rhport; } //--------------------------------------------------------------------+ @@ -116,20 +119,20 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const hcd_devtree_get_info(dev_addr, &dev_tree); bool const need_pre = (dev_tree.hub_addr && dev_tree.speed == TUSB_SPEED_LOW); - rhport = RHPORT_PIO(rhport); - return pio_usb_host_endpoint_open(rhport, dev_addr, (uint8_t const*) desc_ep, need_pre); + uint8_t pio_rhport = RHPORT_PIO(rhport); + return pio_usb_host_endpoint_open(pio_rhport, dev_addr, (uint8_t const*) desc_ep, need_pre); } bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) { - rhport = RHPORT_PIO(rhport); - return pio_usb_host_endpoint_transfer(rhport, dev_addr, ep_addr, buffer, buflen); + uint8_t pio_rhport = RHPORT_PIO(rhport); + return pio_usb_host_endpoint_transfer(pio_rhport, dev_addr, ep_addr, buffer, buflen); } bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) { - rhport = RHPORT_PIO(rhport); - return pio_usb_host_send_setup(rhport, dev_addr, setup_packet); + uint8_t pio_rhport = RHPORT_PIO(rhport); + return pio_usb_host_send_setup(pio_rhport, dev_addr, setup_packet); } //bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) @@ -200,17 +203,18 @@ static void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* port // IRQ Handler void __no_inline_not_in_flash_func(pio_usb_host_irq_handler)(uint8_t root_id) { + uint8_t const tu_rhport = root_id + 1; root_port_t* port = PIO_USB_ROOT_PORT(root_id); uint32_t const ints = port->ints; if ( ints & PIO_USB_INTS_CONNECT_BITS ) { - hcd_event_device_attach(root_id+1, true); + hcd_event_device_attach(tu_rhport, true); } if ( ints & PIO_USB_INTS_DISCONNECT_BITS ) { - hcd_event_device_remove(root_id+1, true); + hcd_event_device_remove(tu_rhport, true); } if ( ints & PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) -- cgit v1.3.1 From 4d11c658fffa810f271fdafb6453eff1f2b77b3f Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 26 Apr 2022 13:08:03 +0700 Subject: improve pio usb endpoint handler --- src/portable/raspberrypi/pio_usb/dcd_pio_usb.c | 38 ++++++++--------------- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 42 ++++++-------------------- 2 files changed, 21 insertions(+), 59 deletions(-) (limited to 'src/portable') diff --git a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c index 09be69afa..77f34238a 100644 --- a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c @@ -152,32 +152,8 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) // //--------------------------------------------------------------------+ -static void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* rport, uint32_t flag) +static void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* rport, xfer_result_t result, volatile uint32_t* ep_reg) { - volatile uint32_t* ep_reg; - xfer_result_t result; - - if ( flag == PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) - { - ep_reg = &rport->ep_complete; - result = XFER_RESULT_SUCCESS; - } - else if ( flag == PIO_USB_INTS_ENDPOINT_ERROR_BITS ) - { - ep_reg = &rport->ep_error; - result = XFER_RESULT_FAILED; - } - else if ( flag == PIO_USB_INTS_ENDPOINT_STALLED_BITS ) - { - ep_reg = &rport->ep_stalled; - result = XFER_RESULT_STALLED; - } - else - { - // something wrong - return; - } - const uint32_t ep_all = *ep_reg; for(uint8_t ep_idx = 0; ep_idx < PIO_USB_EP_POOL_CNT; ep_idx++) @@ -215,7 +191,17 @@ void __no_inline_not_in_flash_func(pio_usb_device_irq_handler)(uint8_t root_id) if ( ints & PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) { - handle_endpoint_irq(rport, PIO_USB_INTS_ENDPOINT_COMPLETE_BITS); + handle_endpoint_irq(rport, XFER_RESULT_SUCCESS, &rport->ep_complete); + } + + if ( ints & PIO_USB_INTS_ENDPOINT_STALLED_BITS ) + { + handle_endpoint_irq(rport, XFER_RESULT_STALLED, &rport->ep_stalled); + } + + if ( ints & PIO_USB_INTS_ENDPOINT_ERROR_BITS ) + { + handle_endpoint_irq(rport, XFER_RESULT_FAILED, &rport->ep_error); } // clear all diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index 2b3d72df8..8101fb2d3 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -157,32 +157,8 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) return true; } -static void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* port, uint32_t flag) +static void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* port, xfer_result_t result, volatile uint32_t* ep_reg) { - volatile uint32_t* ep_reg; - xfer_result_t result; - - if ( flag == PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) - { - ep_reg = &port->ep_complete; - result = XFER_RESULT_SUCCESS; - } - else if ( flag == PIO_USB_INTS_ENDPOINT_ERROR_BITS ) - { - ep_reg = &port->ep_error; - result = XFER_RESULT_FAILED; - } - else if ( flag == PIO_USB_INTS_ENDPOINT_STALLED_BITS ) - { - ep_reg = &port->ep_stalled; - result = XFER_RESULT_STALLED; - } - else - { - // something wrong - return; - } - const uint32_t ep_all = *ep_reg; for(uint8_t ep_idx = 0; ep_idx < PIO_USB_EP_POOL_CNT; ep_idx++) @@ -204,8 +180,8 @@ static void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* port void __no_inline_not_in_flash_func(pio_usb_host_irq_handler)(uint8_t root_id) { uint8_t const tu_rhport = root_id + 1; - root_port_t* port = PIO_USB_ROOT_PORT(root_id); - uint32_t const ints = port->ints; + root_port_t* rport = PIO_USB_ROOT_PORT(root_id); + uint32_t const ints = rport->ints; if ( ints & PIO_USB_INTS_CONNECT_BITS ) { @@ -219,21 +195,21 @@ void __no_inline_not_in_flash_func(pio_usb_host_irq_handler)(uint8_t root_id) if ( ints & PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) { - handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_COMPLETE_BITS); + handle_endpoint_irq(rport, XFER_RESULT_SUCCESS, &rport->ep_complete); } - if ( ints & PIO_USB_INTS_ENDPOINT_ERROR_BITS ) + if ( ints & PIO_USB_INTS_ENDPOINT_STALLED_BITS ) { - handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_ERROR_BITS); + handle_endpoint_irq(rport, XFER_RESULT_STALLED, &rport->ep_stalled); } - if ( ints & PIO_USB_INTS_ENDPOINT_STALLED_BITS ) + if ( ints & PIO_USB_INTS_ENDPOINT_ERROR_BITS ) { - handle_endpoint_irq(port, PIO_USB_INTS_ENDPOINT_STALLED_BITS); + handle_endpoint_irq(rport, XFER_RESULT_FAILED, &rport->ep_error); } // clear all - port->ints &= ~ints; + rport->ints &= ~ints; } #endif -- cgit v1.3.1 From 455bddddcd051acd6d62bca97783be04fc508e96 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 26 Apr 2022 18:47:09 +0700 Subject: minor clean up --- lib/Pico-PIO-USB | 2 +- src/portable/raspberrypi/pio_usb/dcd_pio_usb.c | 9 ++++----- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 3 ++- 3 files changed, 7 insertions(+), 7 deletions(-) (limited to 'src/portable') diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index d2c70ae7b..125753a97 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit d2c70ae7b6a122027b7c5c9aa4769fab19e8e886 +Subproject commit 125753a9783bc1724a185770b04f83c4ebd4b6c5 diff --git a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c index 77f34238a..3daa39a8b 100644 --- a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c @@ -152,7 +152,7 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) // //--------------------------------------------------------------------+ -static void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* rport, xfer_result_t result, volatile uint32_t* ep_reg) +static void __no_inline_not_in_flash_func(handle_endpoint_irq)(uint8_t tu_rhport, xfer_result_t result, volatile uint32_t* ep_reg) { const uint32_t ep_all = *ep_reg; @@ -163,7 +163,6 @@ static void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* rpor if (ep_all & mask) { endpoint_t* ep = PIO_USB_ENDPOINT(ep_idx); - uint8_t const tu_rhport = rport - PIO_USB_ROOT_PORT(0) + 1; dcd_event_xfer_complete(tu_rhport, ep->ep_num, ep->actual_len, result, true); } } @@ -191,17 +190,17 @@ void __no_inline_not_in_flash_func(pio_usb_device_irq_handler)(uint8_t root_id) if ( ints & PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) { - handle_endpoint_irq(rport, XFER_RESULT_SUCCESS, &rport->ep_complete); + handle_endpoint_irq(tu_rhport, XFER_RESULT_SUCCESS, &rport->ep_complete); } if ( ints & PIO_USB_INTS_ENDPOINT_STALLED_BITS ) { - handle_endpoint_irq(rport, XFER_RESULT_STALLED, &rport->ep_stalled); + handle_endpoint_irq(tu_rhport, XFER_RESULT_STALLED, &rport->ep_stalled); } if ( ints & PIO_USB_INTS_ENDPOINT_ERROR_BITS ) { - handle_endpoint_irq(rport, XFER_RESULT_FAILED, &rport->ep_error); + handle_endpoint_irq(tu_rhport, XFER_RESULT_FAILED, &rport->ep_error); } // clear all diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index 8101fb2d3..f6caabb54 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -157,8 +157,9 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) return true; } -static void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* port, xfer_result_t result, volatile uint32_t* ep_reg) +static void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* rport, xfer_result_t result, volatile uint32_t* ep_reg) { + (void) rport; const uint32_t ep_all = *ep_reg; for(uint8_t ep_idx = 0; ep_idx < PIO_USB_EP_POOL_CNT; ep_idx++) -- cgit v1.3.1 From ae5490e5a5cd8650a45578b4ac70dbe89b002fb1 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 27 Apr 2022 20:52:56 +0700 Subject: clean up --- examples/device/hid_boot_interface/src/tusb_config.h | 6 ++---- examples/host/cdc_msc_hid/src/tusb_config.h | 7 +++---- src/common/tusb_debug.h | 6 +++--- src/device/usbd.c | 2 +- src/host/usbh.c | 6 +++--- src/portable/raspberrypi/pio_usb/dcd_pio_usb.c | 1 - src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 1 - 7 files changed, 12 insertions(+), 17 deletions(-) (limited to 'src/portable') diff --git a/examples/device/hid_boot_interface/src/tusb_config.h b/examples/device/hid_boot_interface/src/tusb_config.h index c8bb8a807..8bc85b722 100644 --- a/examples/device/hid_boot_interface/src/tusb_config.h +++ b/examples/device/hid_boot_interface/src/tusb_config.h @@ -40,10 +40,8 @@ #endif // Use raspberry pio-usb for device -#define CFG_TUD_RPI_PIO_USB 1 -#if CFG_TUD_RPI_PIO_USB -#define BOARD_DEVICE_RHPORT_NUM 1 -#endif +// #define CFG_TUD_RPI_PIO_USB 1 +// #define BOARD_DEVICE_RHPORT_NUM 1 // RHPort number used for device can be defined by board.mk, default to port 0 #ifndef BOARD_DEVICE_RHPORT_NUM diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h index 9d083c771..e9e68cf5a 100644 --- a/examples/host/cdc_msc_hid/src/tusb_config.h +++ b/examples/host/cdc_msc_hid/src/tusb_config.h @@ -40,13 +40,12 @@ #endif // Use raspberry pio-usb for host -#define CFG_TUH_RPI_PIO_USB 1 -//#define CFG_TUSB_RPI_PIO_INC_PATH 1 - +// #define CFG_TUH_RPI_PIO_USB 1 +// #define CFG_TUH_RPI_PIO_USB 1 #if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST | OPT_MODE_HIGH_SPEED) -#elif CFG_TUH_RPI_PIO_USB +#elif defined(CFG_TUH_RPI_PIO_USB) && CFG_TUH_RPI_PIO_USB // rp2040: port0 is native, port 1 for PIO-USB #define CFG_TUSB_RHPORT1_MODE OPT_MODE_HOST #else diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h index 1ea2c19f5..ac5bee6ec 100644 --- a/src/common/tusb_debug.h +++ b/src/common/tusb_debug.h @@ -57,7 +57,7 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent); #define tu_printf printf #endif -static inline void tu_print_var(uint8_t const* buf, uint32_t bufsize) +static inline void tu_print_arr(uint8_t const* buf, uint32_t bufsize) { for(uint32_t i=0; i Date: Thu, 28 Apr 2022 18:00:30 +0700 Subject: more clean up --- lib/Pico-PIO-USB | 2 +- src/device/usbd.c | 3 +-- src/host/usbh.c | 9 +++++---- src/portable/raspberrypi/pio_usb/dcd_pio_usb.c | 1 + 4 files changed, 8 insertions(+), 7 deletions(-) (limited to 'src/portable') diff --git a/lib/Pico-PIO-USB b/lib/Pico-PIO-USB index aecced02e..6f76de3c0 160000 --- a/lib/Pico-PIO-USB +++ b/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit aecced02e756f3a35805cacdd9be25976b6dd978 +Subproject commit 6f76de3c0fb4679afc9f953cd4fec0637ebd2f15 diff --git a/src/device/usbd.c b/src/device/usbd.c index e545e8056..1dd1a352e 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -1071,8 +1071,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const //--------------------------------------------------------------------+ // DCD Event Handler //--------------------------------------------------------------------+ -TU_ATTR_FAST_FUNC -void dcd_event_handler(dcd_event_t const * event, bool in_isr) +TU_ATTR_FAST_FUNC void dcd_event_handler(dcd_event_t const * event, bool in_isr) { switch (event->event_id) { diff --git a/src/host/usbh.c b/src/host/usbh.c index 99ba964d2..74ffb5c38 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -1139,7 +1139,7 @@ enum { //ENUM_HUB_GET_STATUS_1, ENUM_HUB_CLEAR_RESET_1, ENUM_ADDR0_DEVICE_DESC, - ENUM_RESET_2, // 2nd reset before set address + ENUM_RESET_2, // 2nd reset before set address (not used) ENUM_HUB_GET_STATUS_2, ENUM_HUB_CLEAR_RESET_2, ENUM_SET_ADDR, @@ -1227,17 +1227,17 @@ static void process_enumeration(tuh_xfer_t* xfer) } break; +#if 0 case ENUM_RESET_2: + // XXX note used by now, but may be needed for some devices !? // Reset device again before Set Address - TU_LOG2("Port reset \r\n"); + TU_LOG2("Port reset2 \r\n"); if (_dev0.hub_addr == 0) { // connected directly to roothub -#if !CFG_TUH_RPI_PIO_USB // FIXME skip this reset for pio-usb hcd_port_reset( _dev0.rhport ); osal_task_delay(RESET_DELAY); hcd_port_reset_end(_dev0.rhport); -#endif // TODO: fall through to SET ADDRESS, refactor later } #if CFG_TUH_HUB @@ -1249,6 +1249,7 @@ static void process_enumeration(tuh_xfer_t* xfer) } #endif __attribute__((fallthrough)); +#endif case ENUM_SET_ADDR: enum_request_set_addr(); diff --git a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c index fb10087b5..1bc5594d8 100644 --- a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c @@ -135,6 +135,7 @@ void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; endpoint_t *ep = pio_usb_device_get_endpoint_by_address(ep_addr); + ep->has_transfer = false; ep->stalled = true; } -- cgit v1.3.1 From c145777e0eb6b9add414504dd8cf4ec7da6cc61a Mon Sep 17 00:00:00 2001 From: Jerzy Kasenberg Date: Sun, 1 May 2022 14:14:42 +0200 Subject: dcd_pic32: Add asserts transfer sanity check TU_ASSERTS added to detect transfer inconsistency. --- src/portable/microchip/pic32mz/dcd_pic32mz.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/portable') diff --git a/src/portable/microchip/pic32mz/dcd_pic32mz.c b/src/portable/microchip/pic32mz/dcd_pic32mz.c index 7d48f755b..1683d95b4 100644 --- a/src/portable/microchip/pic32mz/dcd_pic32mz.c +++ b/src/portable/microchip/pic32mz/dcd_pic32mz.c @@ -530,6 +530,7 @@ static void ep0_handle_rx(void) transferred = rx_fifo_read(0, xfer->buffer + xfer->transferred); xfer->transferred += transferred; + TU_ASSERT(xfer->transferred <= xfer->total_len,); if (transferred < xfer->max_packet_size || xfer->transferred == xfer->total_len) { ep0_set_stage(EP0_STAGE_DATA_OUT_COMPLETE); @@ -560,6 +561,7 @@ static void epn_handle_rx_int(uint8_t epnum) transferred = rx_fifo_read(epnum, xfer->buffer + xfer->transferred); USB_REGS->EPCSR[epnum].RXCSRL_HOSTbits.RXPKTRDY = 0; xfer->transferred += transferred; + TU_ASSERT(xfer->transferred <= xfer->total_len,); if (transferred < xfer->max_packet_size || xfer->transferred == xfer->total_len) { xfer_complete(xfer, XFER_RESULT_SUCCESS, true); @@ -579,6 +581,7 @@ static void epn_handle_tx_int(uint8_t epnum) else { xfer->transferred += xfer->last_packet_size; + TU_ASSERT(xfer->transferred <= xfer->total_len,); if (xfer->last_packet_size < xfer->max_packet_size || xfer->transferred == xfer->total_len) { xfer->last_packet_size = 0; -- cgit v1.3.1 From e49cad84e2798ddd4ee49d3684ce7b414d30ccb2 Mon Sep 17 00:00:00 2001 From: Jerzy Kasenberg Date: Sun, 1 May 2022 14:18:53 +0200 Subject: dcd_pic32: Fix memory overwrite in incoming data When transfer was finished rx_fifo_read() read all that was to read RXPKTRDY was cleared allowing next packet to be received. Then xfer_complete was called. Interrupt for OUT endpoint was left enable, that would not be a problem if data was handled fast and new transfer was scheduled. For MSC when host sends a lot of data this interrupt that was enabled could cause epn_handle_rx_int() to be called after transfer was completed and next was not scheduled yet. Without TU_ASSERT that was added to detect this, incoming data was written past buffer provided by user code resulting in random memory corruption. This just blocks RX interrupt when transfer is finished, and also only unmasked rx interrupts are handled. --- src/portable/microchip/pic32mz/dcd_pic32mz.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/portable') diff --git a/src/portable/microchip/pic32mz/dcd_pic32mz.c b/src/portable/microchip/pic32mz/dcd_pic32mz.c index 1683d95b4..2103d41fb 100644 --- a/src/portable/microchip/pic32mz/dcd_pic32mz.c +++ b/src/portable/microchip/pic32mz/dcd_pic32mz.c @@ -564,6 +564,7 @@ static void epn_handle_rx_int(uint8_t epnum) TU_ASSERT(xfer->transferred <= xfer->total_len,); if (transferred < xfer->max_packet_size || xfer->transferred == xfer->total_len) { + USB_REGS->INTRRXEbits.w &= ~(1u << epnum); xfer_complete(xfer, XFER_RESULT_SUCCESS, true); } } @@ -692,7 +693,7 @@ void dcd_int_handler(uint8_t rhport) int i; uint8_t mask; __USBCSR2bits_t csr2_bits; - uint16_t rxints = USB_REGS->INTRRX; + uint16_t rxints = USB_REGS->INTRRX & USB_REGS->INTRRXEbits.w; uint16_t txints = USB_REGS->INTRTX; csr2_bits = USBCSR2bits; (void) rhport; -- cgit v1.3.1 From f452ab745ef953d74704bc5429ff16a80a5b325a Mon Sep 17 00:00:00 2001 From: Pascal Speck Date: Tue, 3 May 2022 09:52:10 +0200 Subject: overwrite grstctl on edpt_disable --- src/portable/synopsys/dwc2/dcd_dwc2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/portable') diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index c71f38d2d..01b74d05e 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -796,7 +796,7 @@ static void dcd_edpt_disable (uint8_t rhport, uint8_t ep_addr, bool stall) } // Flush the FIFO, and wait until we have confirmed it cleared. - dwc2->grstctl |= (epnum << GRSTCTL_TXFNUM_Pos); + dwc2->grstctl = (epnum << GRSTCTL_TXFNUM_Pos); dwc2->grstctl |= GRSTCTL_TXFFLSH; while ( (dwc2->grstctl & GRSTCTL_TXFFLSH_Msk) != 0 ) {} } -- cgit v1.3.1 From 8473ca16fb74edcb32a050ef087d5f30f50c599b Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 10 May 2022 22:56:06 +0700 Subject: clean up --- examples/dual/host_hid_to_device_cdc/src/main.c | 3 --- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 18 ++++++++++-------- 2 files changed, 10 insertions(+), 11 deletions(-) (limited to 'src/portable') diff --git a/examples/dual/host_hid_to_device_cdc/src/main.c b/examples/dual/host_hid_to_device_cdc/src/main.c index cc811cd71..c05d65c9e 100644 --- a/examples/dual/host_hid_to_device_cdc/src/main.c +++ b/examples/dual/host_hid_to_device_cdc/src/main.c @@ -176,9 +176,6 @@ void tuh_hid_umount_cb(uint8_t dev_addr, uint8_t instance) printf("[%u] HID Interface instance = %d is unmounted\r\n", dev_addr, instance); } -// keycodes from last report to check if key is holding or newly pressed -uint8_t last_keycodes[6] = {0}; - // look up new key in previous keys static inline bool find_key_in_report(hid_keyboard_report_t const *report, uint8_t keycode) { diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index 3c7378561..1b2d29331 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -50,6 +50,8 @@ static pio_usb_configuration_t pio_host_config = PIO_USB_DEFAULT_CONFIG; //--------------------------------------------------------------------+ bool hcd_init(uint8_t rhport) { + (void) rhport; + // To run USB SOF interrupt in core1, call this init in core1 pio_usb_host_init(&pio_host_config); @@ -58,19 +60,19 @@ bool hcd_init(uint8_t rhport) void hcd_port_reset(uint8_t rhport) { - uint8_t pio_rhport = RHPORT_PIO(rhport); + uint8_t const pio_rhport = RHPORT_PIO(rhport); pio_usb_host_port_reset_start(pio_rhport); } void hcd_port_reset_end(uint8_t rhport) { - uint8_t pio_rhport = RHPORT_PIO(rhport); + uint8_t const pio_rhport = RHPORT_PIO(rhport); pio_usb_host_port_reset_end(pio_rhport); } bool hcd_port_connect_status(uint8_t rhport) { - uint8_t pio_rhport = RHPORT_PIO(rhport); + uint8_t const pio_rhport = RHPORT_PIO(rhport); root_port_t *root = PIO_USB_ROOT_PORT(pio_rhport); port_pin_status_t line_state = pio_usb_bus_get_line_state(root); @@ -81,14 +83,14 @@ bool hcd_port_connect_status(uint8_t rhport) tusb_speed_t hcd_port_speed_get(uint8_t rhport) { // TODO determine link speed - uint8_t pio_rhport = RHPORT_PIO(rhport); + uint8_t const pio_rhport = RHPORT_PIO(rhport); return PIO_USB_ROOT_PORT(pio_rhport)->is_fullspeed ? TUSB_SPEED_FULL : TUSB_SPEED_LOW; } // Close all opened endpoint belong to this device void hcd_device_close(uint8_t rhport, uint8_t dev_addr) { - uint8_t pio_rhport = RHPORT_PIO(rhport); + uint8_t const pio_rhport = RHPORT_PIO(rhport); pio_usb_host_close_device(pio_rhport, dev_addr); } @@ -118,19 +120,19 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const hcd_devtree_get_info(dev_addr, &dev_tree); bool const need_pre = (dev_tree.hub_addr && dev_tree.speed == TUSB_SPEED_LOW); - uint8_t pio_rhport = RHPORT_PIO(rhport); + uint8_t const pio_rhport = RHPORT_PIO(rhport); return pio_usb_host_endpoint_open(pio_rhport, dev_addr, (uint8_t const*) desc_ep, need_pre); } bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) { - uint8_t pio_rhport = RHPORT_PIO(rhport); + uint8_t const pio_rhport = RHPORT_PIO(rhport); return pio_usb_host_endpoint_transfer(pio_rhport, dev_addr, ep_addr, buffer, buflen); } bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) { - uint8_t pio_rhport = RHPORT_PIO(rhport); + uint8_t const pio_rhport = RHPORT_PIO(rhport); return pio_usb_host_send_setup(pio_rhport, dev_addr, setup_packet); } -- cgit v1.3.1 From 26c4d4b328ca93d0db5d8d7842a315cbde4d9f5a Mon Sep 17 00:00:00 2001 From: graham sanderson Date: Fri, 20 May 2022 17:25:30 -0500 Subject: Minor cleanup of RP2040 code post addition of Pico-PIO_USB * Removed some compiler warnings, and cleaned out unnecessary warning suppression from CMake suppress_tinyusb_warnings() * Made explicit family_configure_dual_usb_example() for DUAL mode examples as family_configure_target() may not generally be called multiple times for the same target * Renamed library pico_pio_usb to tinyusb_picio_pio_usb to be clearer and avoid conflict if someone already has a pico_pio_usb in their project * Added family_add_pico_pio_usb() method for adding Pico-PIO_SUB support to an existing example * Allowed tinyusb_pico_pio_usb to be added to regular apps using the Pico SDK --- examples/device/net_lwip_webserver/src/lwipopts.h | 2 + examples/dual/CMakeLists.txt | 12 ++ .../dual/host_hid_to_device_cdc/CMakeLists.txt | 4 +- examples/host/bare_api/CMakeLists.txt | 2 +- examples/host/cdc_msc_hid/CMakeLists.txt | 2 +- examples/host/hid_controller/CMakeLists.txt | 2 +- hw/bsp/rp2040/family.c | 2 + hw/bsp/rp2040/family.cmake | 156 +++++++++++---------- src/portable/raspberrypi/rp2040/hcd_rp2040.c | 4 + src/portable/raspberrypi/rp2040/rp2040_usb.c | 2 +- 10 files changed, 107 insertions(+), 81 deletions(-) create mode 100644 examples/dual/CMakeLists.txt (limited to 'src/portable') diff --git a/examples/device/net_lwip_webserver/src/lwipopts.h b/examples/device/net_lwip_webserver/src/lwipopts.h index a215017c7..639619f63 100644 --- a/examples/device/net_lwip_webserver/src/lwipopts.h +++ b/examples/device/net_lwip_webserver/src/lwipopts.h @@ -49,7 +49,9 @@ #define TCP_MSS (1500 /*mtu*/ - 20 /*iphdr*/ - 20 /*tcphhr*/) #define TCP_SND_BUF (2 * TCP_MSS) +#ifndef TCP_WND #define TCP_WND (TCP_MSS) +#endif #define ETHARP_SUPPORT_STATIC_ENTRIES 1 diff --git a/examples/dual/CMakeLists.txt b/examples/dual/CMakeLists.txt new file mode 100644 index 000000000..d2f9a42f0 --- /dev/null +++ b/examples/dual/CMakeLists.txt @@ -0,0 +1,12 @@ +cmake_minimum_required(VERSION 3.5) + +include(${CMAKE_CURRENT_SOURCE_DIR}/../../hw/bsp/family_support.cmake) + +project(tinyusb_dual_examples) +family_initialize_project(tinyusb_dual_examples ${CMAKE_CURRENT_LIST_DIR}) +if (FAMILY STREQUAL "rp2040" AND NOT TARGET tinyusb_pico_pio_usb) + message("Skipping dual host/device mode examples as Pico-PIO-USB is not available") +else() + # family_add_subdirectory will filter what to actually add based on selected FAMILY + family_add_subdirectory(host_hid_to_device_cdc) +endif() diff --git a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt index 24ebfdec3..ea4e087e3 100644 --- a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt +++ b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt @@ -25,6 +25,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) -family_configure_host_example(${PROJECT}) -family_configure_pico_pio_usb_example(${PROJECT}) +family_configure_dual_usb_example(${PROJECT}) diff --git a/examples/host/bare_api/CMakeLists.txt b/examples/host/bare_api/CMakeLists.txt index 607ef22eb..bc04b01a7 100644 --- a/examples/host/bare_api/CMakeLists.txt +++ b/examples/host/bare_api/CMakeLists.txt @@ -27,4 +27,4 @@ target_include_directories(${PROJECT} PUBLIC family_configure_host_example(${PROJECT}) # For rp2040, un-comment to enable pico-pio-usb -# family_configure_pico_pio_usb_example(${PROJECT}) +# family_add_pico_pio_usb(${PROJECT}) \ No newline at end of file diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt index 214e9f2e7..c4a4d8e63 100644 --- a/examples/host/cdc_msc_hid/CMakeLists.txt +++ b/examples/host/cdc_msc_hid/CMakeLists.txt @@ -29,4 +29,4 @@ target_include_directories(${PROJECT} PUBLIC family_configure_host_example(${PROJECT}) # For rp2040, un-comment to enable pico-pio-usb -# family_configure_pico_pio_usb_example(${PROJECT}) +# family_add_pico_pio_usb(${PROJECT}) diff --git a/examples/host/hid_controller/CMakeLists.txt b/examples/host/hid_controller/CMakeLists.txt index 6227e0790..6153d399a 100644 --- a/examples/host/hid_controller/CMakeLists.txt +++ b/examples/host/hid_controller/CMakeLists.txt @@ -28,4 +28,4 @@ target_include_directories(${PROJECT} PUBLIC family_configure_host_example(${PROJECT}) # For rp2040, un-comment to enable pico-pio-usb -# family_configure_pico_pio_usb_example(${PROJECT}) +# family_add_pico_pio_usb(${PROJECT}) diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c index dcf38b6ec..8de1c1aab 100644 --- a/hw/bsp/rp2040/family.c +++ b/hw/bsp/rp2040/family.c @@ -127,8 +127,10 @@ void board_init(void) #ifndef BUTTON_BOOTSEL #endif +#if CFG_TUH_RPI_PIO_USB || CFG_TUD_RPI_PIO_USB // Set the system clock to a multiple of 120mhz for bitbanging USB with pico-usb set_sys_clock_khz(120000, true); +#endif #if defined(UART_DEV) && defined(LIB_PICO_STDIO_UART) bi_decl(bi_2pins_with_func(UART_TX_PIN, UART_TX_PIN, GPIO_FUNC_UART)); diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index 17ae3de9b..df3a6a91e 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -23,7 +23,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker) set(PICO_TINYUSB_PATH ${TOP}) endif() - #------------------------------------ + #------------------------------------ # Base config for both device and host; wrapped by SDK's tinyusb_common #------------------------------------ add_library(tinyusb_common_base INTERFACE) @@ -50,7 +50,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker) if (CMAKE_BUILD_TYPE STREQUAL "Debug") message("Compiling TinyUSB with CFG_TUSB_DEBUG=1") set(TINYUSB_DEBUG_LEVEL 1) - endif () + endif() target_compile_definitions(tinyusb_common_base INTERFACE CFG_TUSB_MCU=OPT_MCU_RP2040 @@ -58,44 +58,13 @@ if (NOT TARGET _rp2040_family_inclusion_marker) CFG_TUSB_DEBUG=${TINYUSB_DEBUG_LEVEL} ) - #------------------------------------ - # PIO USB for both host and device - #------------------------------------ - add_library(pico_pio_usb INTERFACE) - - if (NOT DEFINED PICO_PIO_USB_PATH) - set(PICO_PIO_USB_PATH "${TOP}/hw/mcu/raspberry_pi/Pico-PIO-USB") - endif() - - target_sources(pico_pio_usb INTERFACE - ${PICO_PIO_USB_PATH}/src/pio_usb.c - ${PICO_PIO_USB_PATH}/src/pio_usb_host.c - ${PICO_PIO_USB_PATH}/src/pio_usb_device.c - ${PICO_PIO_USB_PATH}/src/usb_crc.c - ) - - target_include_directories(pico_pio_usb INTERFACE - ${PICO_PIO_USB_PATH}/src - ) - - target_link_libraries(pico_pio_usb INTERFACE - hardware_dma - hardware_pio - pico_multicore - ) - - target_compile_definitions(pico_pio_usb INTERFACE - PIO_USB_USE_TINYUSB - ) - - #------------------------------------ + #------------------------------------ # Base config for device mode; wrapped by SDK's tinyusb_device #------------------------------------ add_library(tinyusb_device_base INTERFACE) target_sources(tinyusb_device_base INTERFACE ${TOP}/src/portable/raspberrypi/rp2040/dcd_rp2040.c ${TOP}/src/portable/raspberrypi/rp2040/rp2040_usb.c - ${TOP}/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c ${TOP}/src/device/usbd.c ${TOP}/src/device/usbd_control.c ${TOP}/src/class/audio/audio_device.c @@ -119,7 +88,6 @@ if (NOT TARGET _rp2040_family_inclusion_marker) target_sources(tinyusb_host_base INTERFACE ${TOP}/src/portable/raspberrypi/rp2040/hcd_rp2040.c ${TOP}/src/portable/raspberrypi/rp2040/rp2040_usb.c - ${TOP}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c ${TOP}/src/host/usbh.c ${TOP}/src/host/hub.c ${TOP}/src/class/cdc/cdc_host.c @@ -140,8 +108,8 @@ if (NOT TARGET _rp2040_family_inclusion_marker) target_sources(tinyusb_bsp INTERFACE ${TOP}/hw/bsp/rp2040/family.c ) -# target_include_directories(tinyusb_bsp INTERFACE -# ${TOP}/hw/bsp/rp2040) + # target_include_directories(tinyusb_bsp INTERFACE + # ${TOP}/hw/bsp/rp2040) # tinyusb_additions will hold our extra settings for examples add_library(tinyusb_additions INTERFACE) @@ -151,22 +119,22 @@ if (NOT TARGET _rp2040_family_inclusion_marker) ) if(DEFINED LOG) - target_compile_definitions(tinyusb_additions INTERFACE CFG_TUSB_DEBUG=${LOG} ) + target_compile_definitions(tinyusb_additions INTERFACE CFG_TUSB_DEBUG=${LOG}) endif() if(LOGGER STREQUAL "rtt") - target_compile_definitions(tinyusb_additions INTERFACE - LOGGER_RTT - SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL - ) - - target_sources(tinyusb_additions INTERFACE - ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c - ) - - target_include_directories(tinyusb_additions INTERFACE - ${TOP}/lib/SEGGER_RTT/RTT - ) + target_compile_definitions(tinyusb_additions INTERFACE + LOGGER_RTT + SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL + ) + + target_sources(tinyusb_additions INTERFACE + ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c + ) + + target_include_directories(tinyusb_additions INTERFACE + ${TOP}/lib/SEGGER_RTT/RTT + ) endif() #------------------------------------ @@ -189,41 +157,81 @@ if (NOT TARGET _rp2040_family_inclusion_marker) target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_host) endfunction() - function(family_configure_pico_pio_usb_example TARGET) + function(family_add_pico_pio_usb TARGET) + target_link_libraries(${TARGET} PUBLIC tinyusb_pico_pio_usb) + endfunction() + + function(family_configure_dual_usb_example TARGET) family_configure_target(${TARGET}) - target_link_libraries(${TARGET} PUBLIC pico_stdlib pico_pio_usb) - pico_generate_pio_header(tinyusb_common_base ${PICO_PIO_USB_PATH}/src/usb_tx.pio) - pico_generate_pio_header(tinyusb_common_base ${PICO_PIO_USB_PATH}/src/usb_rx.pio) + # require tinyusb_pico_pio_usb + target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device tinyusb_host tinyusb_pico_pio_usb ) endfunction() + function(check_and_add_pico_pio_usb_support) + # check for pico_generate_pio_header (as depending on environment we may be called before SDK is + # initialized in which case it isn't available yet), and only do the initialization once + if (COMMAND pico_generate_pio_header AND NOT TARGET tinyusb_pico_pio_usb) + #------------------------------------ + # PIO USB for both host and device + #------------------------------------ + + if (NOT DEFINED PICO_PIO_USB_PATH) + set(PICO_PIO_USB_PATH "${TOP}/hw/mcu/raspberry_pi/Pico-PIO-USB") + endif() + + if (EXISTS ${PICO_PIO_USB_PATH}/src/pio_usb.c) + add_library(tinyusb_pico_pio_usb INTERFACE) + target_sources(tinyusb_device_base INTERFACE + ${TOP}/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c + ) + target_sources(tinyusb_host_base INTERFACE + ${TOP}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c + ) + + target_sources(tinyusb_pico_pio_usb INTERFACE + ${PICO_PIO_USB_PATH}/src/pio_usb.c + ${PICO_PIO_USB_PATH}/src/pio_usb_host.c + ${PICO_PIO_USB_PATH}/src/pio_usb_device.c + ${PICO_PIO_USB_PATH}/src/usb_crc.c + ) + + target_include_directories(tinyusb_pico_pio_usb INTERFACE + ${PICO_PIO_USB_PATH}/src + ) + + target_link_libraries(tinyusb_pico_pio_usb INTERFACE + hardware_dma + hardware_pio + pico_multicore + ) + + target_compile_definitions(tinyusb_pico_pio_usb INTERFACE + PIO_USB_USE_TINYUSB + ) + + pico_generate_pio_header(tinyusb_pico_pio_usb ${PICO_PIO_USB_PATH}/src/usb_tx.pio) + pico_generate_pio_header(tinyusb_pico_pio_usb ${PICO_PIO_USB_PATH}/src/usb_rx.pio) + endif() + endif() + endfunction() + + # Try to add Pico-PIO_USB support now for the case where this file is included directly + # after Pico SDK initialization, but without using the family_ functions (as is the case + # when included by the SDK itself) + check_and_add_pico_pio_usb_support() + function(family_initialize_project PROJECT DIR) # call the original version of this function from family_common.cmake _family_initialize_project(${PROJECT} ${DIR}) enable_language(C CXX ASM) pico_sdk_init() + + # now re-check for adding Pico-PIO_USB support now SDK is definitely available + check_and_add_pico_pio_usb_support() endfunction() # This method must be called from the project scope to suppress known warnings in TinyUSB source files function(suppress_tinyusb_warnings) - set_source_files_properties( - ${PICO_TINYUSB_PATH}/src/tusb.c - PROPERTIES - COMPILE_FLAGS "-Wno-conversion") - set_source_files_properties( - ${PICO_TINYUSB_PATH}/src/common/tusb_fifo.c - PROPERTIES - COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual") - set_source_files_properties( - ${PICO_TINYUSB_PATH}/src/device/usbd.c - PROPERTIES - COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual -Wno-null-dereference") - set_source_files_properties( - ${PICO_TINYUSB_PATH}/src/device/usbd_control.c - PROPERTIES - COMPILE_FLAGS "-Wno-conversion") - set_source_files_properties( - ${PICO_TINYUSB_PATH}/src/class/cdc/cdc_device.c - PROPERTIES - COMPILE_FLAGS "-Wno-conversion") + # there are currently no warnings to suppress, however this function must still exist endfunction() endif() diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index 5164035aa..54c27ffe3 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -537,7 +537,11 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet (void) rhport; // Copy data into setup packet buffer +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Warray-bounds" +#pragma GCC diagnostic ignored "-Wstringop-overflow" memcpy((void*)&usbh_dpram->setup_packet[0], setup_packet, 8); +#pragma GCC diagnostic pop // Configure EP0 struct with setup info for the trans complete struct hw_endpoint *ep = _hw_endpoint_allocate(0); diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index 9c3e5d011..c93199fd0 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -58,9 +58,9 @@ void rp2040_usb_init(void) unreset_block_wait(RESETS_RESET_USBCTRL_BITS); // Clear any previous state just in case - // TODO Suppress warning array-bounds with gcc11 #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Warray-bounds" +#pragma GCC diagnostic ignored "-Wstringop-overflow" memset(usb_hw, 0, sizeof(*usb_hw)); memset(usb_dpram, 0, sizeof(*usb_dpram)); #pragma GCC diagnostic pop -- cgit v1.3.1 From 731ac3d3d60daf4831f2e9491a45d30cc2492d5b Mon Sep 17 00:00:00 2001 From: "William D. Jones" Date: Mon, 30 May 2022 14:01:57 -0400 Subject: msp430x5xx: Add fix for possible bug in msp430-elf-gcc 9.3.0. --- src/portable/ti/msp430x5xx/dcd_msp430x5xx.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'src/portable') diff --git a/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c b/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c index c3b3b2403..f1d350dcc 100644 --- a/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c +++ b/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c @@ -623,7 +623,18 @@ void dcd_int_handler(uint8_t rhport) handle_setup_packet(); } - uint16_t curr_vector = USBVECINT; + // Workaround possible bug in MSP430 GCC 9.3.0 where volatile variable + // USBVECINT is read from twice when only once is intended. The second + // (garbage) read seems to be triggered by certain switch statement + // configurations. + uint16_t curr_vector; + #if __GNUC__ > 9 || (__GNUC__ == 9 && __GNUC_MINOR__ > 2) + asm volatile ("mov %1, %0" + : "=r" (curr_vector) + : "m" (USBVECINT)); + #else + curr_vector = USBVECINT; + #endif switch(curr_vector) { -- cgit v1.3.1 From 6e7cd220dc60b176e0096f4a5818376ea84a7e15 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 1 Jun 2022 13:18:24 +0700 Subject: grstctl set fifo + flush in one assign --- src/portable/synopsys/dwc2/dcd_dwc2.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/portable') diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index 01b74d05e..556bcaf65 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -796,8 +796,7 @@ static void dcd_edpt_disable (uint8_t rhport, uint8_t ep_addr, bool stall) } // Flush the FIFO, and wait until we have confirmed it cleared. - dwc2->grstctl = (epnum << GRSTCTL_TXFNUM_Pos); - dwc2->grstctl |= GRSTCTL_TXFFLSH; + dwc2->grstctl = ((epnum << GRSTCTL_TXFNUM_Pos) | GRSTCTL_TXFFLSH); while ( (dwc2->grstctl & GRSTCTL_TXFFLSH_Msk) != 0 ) {} } else -- cgit v1.3.1 From 99c1585ed215cb5ee2e27a41c54310d144e0ee6c Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 1 Jun 2022 23:53:40 +0700 Subject: rename board specific macro for example - BOARD_DEVICE/HOST_RHPORT_NUM to BOARD_TUD/H_RHPORT - BOARD_DEVICE/HOST_RHPORT_SPEED to BOARD_TUD/H_MAX_SPEED --- examples/device/cdc_dual_ports/src/tusb_config.h | 16 ++++----- examples/device/cdc_msc/src/tusb_config.h | 36 +++++++++++++------ examples/device/cdc_msc_freertos/src/tusb_config.h | 18 +++++----- examples/device/dfu/src/tusb_config.h | 16 ++++----- examples/device/dfu_runtime/src/tusb_config.h | 16 ++++----- .../device/dynamic_configuration/src/tusb_config.h | 16 ++++----- .../device/hid_boot_interface/src/tusb_config.h | 18 +++++----- examples/device/hid_composite/src/tusb_config.h | 16 ++++----- .../hid_composite_freertos/src/tusb_config.h | 16 ++++----- .../device/hid_generic_inout/src/tusb_config.h | 16 ++++----- .../hid_multiple_interface/src/tusb_config.h | 16 ++++----- examples/device/midi_test/src/tusb_config.h | 16 ++++----- examples/device/msc_dual_lun/src/tusb_config.h | 16 ++++----- .../device/net_lwip_webserver/src/tusb_config.h | 16 ++++----- examples/device/usbtmc/src/tusb_config.h | 16 ++++----- examples/device/video_capture/src/tusb_config.h | 16 ++++----- examples/device/webusb_serial/src/tusb_config.h | 16 ++++----- .../dual/host_hid_to_device_cdc/src/tusb_config.h | 36 +++++++++---------- hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk | 4 +-- hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk | 4 +-- hw/bsp/imxrt/family.mk | 8 ++--- hw/bsp/lpc54/family.mk | 2 +- hw/bsp/lpc55/family.mk | 4 +-- hw/bsp/stm32f7/family.c | 4 +-- hw/bsp/stm32f7/family.mk | 6 ++-- hw/bsp/stm32h7/family.c | 4 +-- hw/bsp/stm32h7/family.mk | 6 ++-- src/portable/bridgetek/ft9xx/dcd_ft9xx.c | 42 +++++++++++----------- src/tusb_option.h | 2 ++ 29 files changed, 217 insertions(+), 201 deletions(-) (limited to 'src/portable') diff --git a/examples/device/cdc_dual_ports/src/tusb_config.h b/examples/device/cdc_dual_ports/src/tusb_config.h index f93606092..037fc8290 100644 --- a/examples/device/cdc_dual_ports/src/tusb_config.h +++ b/examples/device/cdc_dual_ports/src/tusb_config.h @@ -40,21 +40,21 @@ #endif // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/device/cdc_msc/src/tusb_config.h b/examples/device/cdc_msc/src/tusb_config.h index 6507cef19..3849ad4d0 100644 --- a/examples/device/cdc_msc/src/tusb_config.h +++ b/examples/device/cdc_msc/src/tusb_config.h @@ -39,31 +39,45 @@ #error CFG_TUSB_MCU must be defined #endif +// This example doesn't use an RTOS +#ifndef CFG_TUSB_OS +#define CFG_TUSB_OS OPT_OS_NONE +#endif + +// Enable Device stack +#define CFG_TUD_ENABLED 1 + // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif -// This example doesn't use an RTOS -#ifndef CFG_TUSB_OS -#define CFG_TUSB_OS OPT_OS_NONE + + +// Device max speed, default is max speed that hardware controller could support without external PHY +// BOARD_TUD_MAX_SPEED can be used to change value (e.g for board features external PHY). +#ifdef BOARD_TUD_MAX_SPEED + #define CFG_TUD_MAX_SPEED BOARD_TUD_MAX_SPEED +#else + #define CFG_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif + // CFG_TUSB_DEBUG is defined by compiler in DEBUG build // #define CFG_TUSB_DEBUG 0 diff --git a/examples/device/cdc_msc_freertos/src/tusb_config.h b/examples/device/cdc_msc_freertos/src/tusb_config.h index 55e84c62d..d8eeda07d 100644 --- a/examples/device/cdc_msc_freertos/src/tusb_config.h +++ b/examples/device/cdc_msc_freertos/src/tusb_config.h @@ -40,26 +40,26 @@ #endif // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to Highspeed for MCU with internal HighSpeed PHY (can be port specific), otherwise FullSpeed -#ifndef BOARD_DEVICE_RHPORT_SPEED +#ifndef BOARD_TUD_MAX_SPEED #if (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || \ CFG_TUSB_MCU == OPT_MCU_NUC505 || CFG_TUSB_MCU == OPT_MCU_CXD56) - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_HIGH_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_HIGH_SPEED #else - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_FULL_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_FULL_SPEED #endif #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/device/dfu/src/tusb_config.h b/examples/device/dfu/src/tusb_config.h index d4779b2e1..924ede47a 100644 --- a/examples/device/dfu/src/tusb_config.h +++ b/examples/device/dfu/src/tusb_config.h @@ -22,21 +22,21 @@ #endif // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/device/dfu_runtime/src/tusb_config.h b/examples/device/dfu_runtime/src/tusb_config.h index e15ae7997..f31c9c970 100644 --- a/examples/device/dfu_runtime/src/tusb_config.h +++ b/examples/device/dfu_runtime/src/tusb_config.h @@ -22,21 +22,21 @@ #endif // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/device/dynamic_configuration/src/tusb_config.h b/examples/device/dynamic_configuration/src/tusb_config.h index ddc295dcc..333b62e03 100644 --- a/examples/device/dynamic_configuration/src/tusb_config.h +++ b/examples/device/dynamic_configuration/src/tusb_config.h @@ -40,21 +40,21 @@ #endif // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/device/hid_boot_interface/src/tusb_config.h b/examples/device/hid_boot_interface/src/tusb_config.h index 8bc85b722..e3c50aa3f 100644 --- a/examples/device/hid_boot_interface/src/tusb_config.h +++ b/examples/device/hid_boot_interface/src/tusb_config.h @@ -41,24 +41,24 @@ // Use raspberry pio-usb for device // #define CFG_TUD_RPI_PIO_USB 1 -// #define BOARD_DEVICE_RHPORT_NUM 1 +// #define BOARD_TUD_RHPORT 1 // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/device/hid_composite/src/tusb_config.h b/examples/device/hid_composite/src/tusb_config.h index d0f2b513f..1a9223f5b 100644 --- a/examples/device/hid_composite/src/tusb_config.h +++ b/examples/device/hid_composite/src/tusb_config.h @@ -40,21 +40,21 @@ #endif // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/device/hid_composite_freertos/src/tusb_config.h b/examples/device/hid_composite_freertos/src/tusb_config.h index 7522bd714..8fd6498e6 100644 --- a/examples/device/hid_composite_freertos/src/tusb_config.h +++ b/examples/device/hid_composite_freertos/src/tusb_config.h @@ -40,21 +40,21 @@ #endif // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/device/hid_generic_inout/src/tusb_config.h b/examples/device/hid_generic_inout/src/tusb_config.h index 9db50269c..e5ae4b0cc 100644 --- a/examples/device/hid_generic_inout/src/tusb_config.h +++ b/examples/device/hid_generic_inout/src/tusb_config.h @@ -40,21 +40,21 @@ #endif // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/device/hid_multiple_interface/src/tusb_config.h b/examples/device/hid_multiple_interface/src/tusb_config.h index 32e8c2843..766b8e518 100644 --- a/examples/device/hid_multiple_interface/src/tusb_config.h +++ b/examples/device/hid_multiple_interface/src/tusb_config.h @@ -40,21 +40,21 @@ #endif // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/device/midi_test/src/tusb_config.h b/examples/device/midi_test/src/tusb_config.h index 967c71403..a7673245e 100644 --- a/examples/device/midi_test/src/tusb_config.h +++ b/examples/device/midi_test/src/tusb_config.h @@ -40,21 +40,21 @@ #endif // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/device/msc_dual_lun/src/tusb_config.h b/examples/device/msc_dual_lun/src/tusb_config.h index f617f5a4c..2778e61b0 100644 --- a/examples/device/msc_dual_lun/src/tusb_config.h +++ b/examples/device/msc_dual_lun/src/tusb_config.h @@ -40,21 +40,21 @@ #endif // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/device/net_lwip_webserver/src/tusb_config.h b/examples/device/net_lwip_webserver/src/tusb_config.h index b1b48598b..5042c0e5d 100644 --- a/examples/device/net_lwip_webserver/src/tusb_config.h +++ b/examples/device/net_lwip_webserver/src/tusb_config.h @@ -40,21 +40,21 @@ #endif // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/device/usbtmc/src/tusb_config.h b/examples/device/usbtmc/src/tusb_config.h index 5b2215be5..0b2df291a 100644 --- a/examples/device/usbtmc/src/tusb_config.h +++ b/examples/device/usbtmc/src/tusb_config.h @@ -22,21 +22,21 @@ #endif // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/device/video_capture/src/tusb_config.h b/examples/device/video_capture/src/tusb_config.h index 3a079e66b..85bf80a64 100644 --- a/examples/device/video_capture/src/tusb_config.h +++ b/examples/device/video_capture/src/tusb_config.h @@ -35,21 +35,21 @@ //-------------------------------------------------------------------- // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/device/webusb_serial/src/tusb_config.h b/examples/device/webusb_serial/src/tusb_config.h index f5e4694e3..eab1d6387 100644 --- a/examples/device/webusb_serial/src/tusb_config.h +++ b/examples/device/webusb_serial/src/tusb_config.h @@ -40,21 +40,21 @@ #endif // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort max operational speed can defined by board.mk // Default to max (auto) speed for MCU with internal HighSpeed PHY -#ifndef BOARD_DEVICE_RHPORT_SPEED - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_DEFAULT_SPEED +#ifndef BOARD_TUD_MAX_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_DEFAULT_SPEED #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h index 0fa4899a9..9a8f31da0 100644 --- a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h +++ b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h @@ -40,13 +40,13 @@ #endif // RHPort number used for device can be defined by board.mk, default to port 0 -#ifndef BOARD_DEVICE_RHPORT_NUM - #define BOARD_DEVICE_RHPORT_NUM 0 +#ifndef BOARD_TUD_RHPORT + #define BOARD_TUD_RHPORT 0 #endif // RHPort number used for device can be defined by board.mk, default to port 1 -#ifndef BOARD_HOST_RHPORT_NUM - #define BOARD_HOST_RHPORT_NUM 1 +#ifndef BOARD_TUH_RHPORT + #define BOARD_TUH_RHPORT 1 #endif // Use raspberry pio-usb for host @@ -54,42 +54,42 @@ // RHPort max operational speed can defined by board.mk // Default to Highspeed for MCU with internal HighSpeed PHY (can be port specific), otherwise FullSpeed -#ifndef BOARD_DEVICE_RHPORT_SPEED +#ifndef BOARD_TUD_MAX_SPEED #if TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX, OPT_MCU_MIMXRT10XX, OPT_MCU_NUC505) ||\ TU_CHECK_MCU(OPT_MCU_CXD56, OPT_MCU_SAMX7X, OPT_MCU_BCM2711) ||\ TU_CHECK_MCU(OPT_MCU_FT90X, OPT_MCU_FT93X) - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_HIGH_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_HIGH_SPEED #else - #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_FULL_SPEED + #define BOARD_TUD_MAX_SPEED OPT_MODE_FULL_SPEED #endif #endif // RHPort max operational speed can defined by board.mk // Default to Highspeed for MCU with internal HighSpeed PHY (can be port specific), otherwise FullSpeed -#ifndef BOARD_HOST_RHPORT_SPEED +#ifndef BOARD_TUH_MAX_SPEED #if TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX, OPT_MCU_MIMXRT10XX, OPT_MCU_NUC505) ||\ TU_CHECK_MCU(OPT_MCU_CXD56, OPT_MCU_SAMX7X, OPT_MCU_BCM2711) ||\ TU_CHECK_MCU(OPT_MCU_FT90X, OPT_MCU_FT93X) - #define BOARD_HOST_RHPORT_SPEED OPT_MODE_HIGH_SPEED + #define BOARD_TUH_MAX_SPEED OPT_MODE_HIGH_SPEED #else - #define BOARD_HOST_RHPORT_SPEED OPT_MODE_FULL_SPEED + #define BOARD_TUH_MAX_SPEED OPT_MODE_FULL_SPEED #endif #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_DEVICE_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) -#elif BOARD_DEVICE_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#if BOARD_TUD_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) +#elif BOARD_TUD_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | BOARD_TUD_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif // Device mode with rhport and speed defined by board.mk -#if BOARD_HOST_RHPORT_NUM == 0 - #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST | BOARD_HOST_RHPORT_SPEED) -#elif BOARD_HOST_RHPORT_NUM == 1 - #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_HOST | BOARD_HOST_RHPORT_SPEED) +#if BOARD_TUH_RHPORT == 0 + #define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST | BOARD_TUH_MAX_SPEED) +#elif BOARD_TUH_RHPORT == 1 + #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_HOST | BOARD_TUH_MAX_SPEED) #else #error "Incorrect RHPort configuration" #endif diff --git a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk index b14b2a6b9..d21063c99 100644 --- a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk +++ b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk @@ -7,8 +7,8 @@ JLINK_DEVICE = MIMXRT1062xxx6A # For flash-pyocd target PYOCD_TARGET = mimxrt1060 -BOARD_DEVICE_RHPORT_NUM = 1 -BOARD_HOST_RHPORT_NUM = 0 +BOARD_TUD_RHPORT = 1 +BOARD_TUH_RHPORT = 0 # flash using pyocd flash: flash-pyocd diff --git a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk index 2b479719f..00b574c52 100644 --- a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk +++ b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk @@ -7,8 +7,8 @@ JLINK_DEVICE = MIMXRT1064xxx6A # For flash-pyocd target PYOCD_TARGET = mimxrt1064 -BOARD_DEVICE_RHPORT_NUM = 1 -BOARD_HOST_RHPORT_NUM = 0 +BOARD_TUD_RHPORT = 1 +BOARD_TUH_RHPORT = 0 # flash using pyocd flash: flash-pyocd diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk index 0bf4a0d15..c81e67eb6 100644 --- a/hw/bsp/imxrt/family.mk +++ b/hw/bsp/imxrt/family.mk @@ -15,11 +15,11 @@ CFLAGS += \ -DXIP_BOOT_HEADER_ENABLE=1 \ -DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX -ifdef BOARD_DEVICE_RHPORT_NUM -CFLAGS += -DBOARD_DEVICE_RHPORT_NUM=$(BOARD_DEVICE_RHPORT_NUM) +ifdef BOARD_TUD_RHPORT +CFLAGS += -DBOARD_TUD_RHPORT=$(BOARD_TUD_RHPORT) endif -ifdef BOARD_HOST_RHPORT_NUM -CFLAGS += -DBOARD_HOST_RHPORT_NUM=$(BOARD_HOST_RHPORT_NUM) +ifdef BOARD_TUH_RHPORT +CFLAGS += -DBOARD_TUH_RHPORT=$(BOARD_TUH_RHPORT) endif # mcu driver cause following warnings diff --git a/hw/bsp/lpc54/family.mk b/hw/bsp/lpc54/family.mk index 600df6fd0..39111d1ad 100644 --- a/hw/bsp/lpc54/family.mk +++ b/hw/bsp/lpc54/family.mk @@ -15,7 +15,7 @@ CFLAGS += \ ifeq ($(PORT), 1) $(info "PORT1 High Speed") - CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED + CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED # LPC55 Highspeed Port1 can only write to USB_SRAM region CFLAGS += -DCFG_TUSB_MEM_SECTION='__attribute__((section("m_usb_global")))' diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk index 4e8d65ce9..1af1d076e 100644 --- a/hw/bsp/lpc55/family.mk +++ b/hw/bsp/lpc55/family.mk @@ -16,11 +16,11 @@ CFLAGS += \ -mfpu=fpv5-sp-d16 \ -DCFG_TUSB_MCU=OPT_MCU_LPC55XX \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' \ - -DBOARD_DEVICE_RHPORT_NUM=$(PORT) + -DBOARD_TUD_RHPORT=$(PORT) ifeq ($(PORT), 1) $(info "PORT1 High Speed") - CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED + CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED # LPC55 Highspeed Port1 can only write to USB_SRAM region CFLAGS += -DCFG_TUSB_MEM_SECTION='__attribute__((section("m_usb_global")))' diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c index 14e3b2fd9..425e6e1bc 100644 --- a/hw/bsp/stm32f7/family.c +++ b/hw/bsp/stm32f7/family.c @@ -125,7 +125,7 @@ void board_init(void) UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; HAL_UART_Init(&UartHandle); -#if BOARD_DEVICE_RHPORT_NUM == 0 +#if BOARD_TUD_RHPORT == 0 // OTG_FS /* Configure DM DP Pins */ @@ -258,7 +258,7 @@ void board_init(void) USB_OTG_HS->GUSBCFG &= ~USB_OTG_GUSBCFG_FHMOD; USB_OTG_HS->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD; -#endif // BOARD_DEVICE_RHPORT_NUM +#endif // BOARD_TUD_RHPORT } diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk index 8482e6dd2..b8a5d7ead 100644 --- a/hw/bsp/stm32f7/family.mk +++ b/hw/bsp/stm32f7/family.mk @@ -16,14 +16,14 @@ CFLAGS += \ -mfpu=fpv5-d16 \ -nostdlib -nostartfiles \ -DCFG_TUSB_MCU=OPT_MCU_STM32F7 \ - -DBOARD_DEVICE_RHPORT_NUM=$(PORT) + -DBOARD_TUD_RHPORT=$(PORT) ifeq ($(PORT), 1) ifeq ($(SPEED), high) - CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED + CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED $(info "Using OTG_HS in HighSpeed mode") else - CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_FULL_SPEED + CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED $(info "Using OTG_HS in FullSpeed mode") endif else diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c index 84976b4e4..3964f427a 100644 --- a/hw/bsp/stm32h7/family.c +++ b/hw/bsp/stm32h7/family.c @@ -122,7 +122,7 @@ void board_init(void) UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; HAL_UART_Init(&UartHandle); -#if BOARD_DEVICE_RHPORT_NUM == 0 +#if BOARD_TUD_RHPORT == 0 // Despite being call USB2_OTG // OTG_FS is marked as RHPort0 by TinyUSB to be consistent across stm32 port // PA9 VUSB, PA10 ID, PA11 DM, PA12 DP @@ -166,7 +166,7 @@ void board_init(void) USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL; #endif // vbus sense -#elif BOARD_DEVICE_RHPORT_NUM == 1 +#elif BOARD_TUD_RHPORT == 1 // Despite being call USB2_OTG // OTG_HS is marked as RHPort1 by TinyUSB to be consistent across stm32 port diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk index 096d04d0c..a1cd93b27 100644 --- a/hw/bsp/stm32h7/family.mk +++ b/hw/bsp/stm32h7/family.mk @@ -16,14 +16,14 @@ CFLAGS += \ -mfpu=fpv5-d16 \ -nostdlib -nostartfiles \ -DCFG_TUSB_MCU=OPT_MCU_STM32H7 \ - -DBOARD_DEVICE_RHPORT_NUM=$(PORT) + -DBOARD_TUD_RHPORT=$(PORT) ifeq ($(PORT), 1) ifeq ($(SPEED), high) - CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED + CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED $(info "Using OTG_HS in HighSpeed mode") else - CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_FULL_SPEED + CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED $(info "Using OTG_HS in FullSpeed mode") endif else diff --git a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c index 3c3cb63b8..7a65cf5d0 100644 --- a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c +++ b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c @@ -239,12 +239,12 @@ static void _dcd_ft90x_attach(void) CRITICAL_SECTION_BEGIN // Turn off the device enable bit. -#if BOARD_DEVICE_RHPORT_SPEED == OPT_MODE_HIGH_SPEED +#if BOARD_TUD_MAX_SPEED == OPT_MODE_HIGH_SPEED USBD_REG(fctrl) = 0; -#else // BOARD_DEVICE_RHPORT_SPEED == OPT_MODE_FULL_SPEED +#else // BOARD_TUD_MAX_SPEED == OPT_MODE_FULL_SPEED //Set the full speed only bit if required. USBD_REG(fctrl) = MASK_USBD_FCTRL_MODE_FS_ONLY; -#endif // BOARD_DEVICE_RHPORT_SPEED +#endif // BOARD_TUD_MAX_SPEED // Clear first reset and suspend interrupts. do @@ -291,7 +291,7 @@ static void _dcd_ft90x_detach(void) delayms(1); // Disable USB PHY - dcd_disconnect(BOARD_DEVICE_RHPORT_NUM); + dcd_disconnect(BOARD_TUD_RHPORT); delayms(1); // Disable Chip USB device clock/PM configuration. @@ -323,7 +323,7 @@ static void _ft90x_usb_speed(void) delayus(200); } -#if BOARD_DEVICE_RHPORT_SPEED == OPT_MODE_HIGH_SPEED +#if BOARD_TUD_MAX_SPEED == OPT_MODE_HIGH_SPEED /* Detect high or full speed */ fctrl_val = MASK_USBD_FCTRL_USB_DEV_EN; @@ -347,11 +347,11 @@ static void _ft90x_usb_speed(void) delayus(125 + 5); _speed = (USBD_REG(cmif) & MASK_USBD_CMIF_SOFIRQ) ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL; - dcd_event_bus_reset(BOARD_DEVICE_RHPORT_NUM, _speed, true); + dcd_event_bus_reset(BOARD_TUD_RHPORT, _speed, true); #endif /* !__FT930__ */ -#else // BOARD_DEVICE_RHPORT_SPEED == OPT_MODE_FULL_SPEED +#else // BOARD_TUD_MAX_SPEED == OPT_MODE_FULL_SPEED /* User force set to full speed */ _speed = TUSB_SPEED_FULL; @@ -364,10 +364,10 @@ static void _ft90x_usb_speed(void) } #endif USBD_REG(fctrl) = fctrl_val; - dcd_event_bus_reset(BOARD_DEVICE_RHPORT_NUM, _speed, true); + dcd_event_bus_reset(BOARD_TUD_RHPORT, _speed, true); return; -#endif // BOARD_DEVICE_RHPORT_SPEED +#endif // BOARD_TUD_MAX_SPEED } // Send a buffer to the USB IN FIFO. @@ -899,7 +899,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) void _ft90x_usbd_ISR(void) { - tud_int_handler(BOARD_DEVICE_RHPORT_NUM); // Resolves to dcd_int_handler(). + tud_int_handler(BOARD_TUD_RHPORT); // Resolves to dcd_int_handler(). } void dcd_int_handler(uint8_t rhport) @@ -937,19 +937,19 @@ void dcd_int_handler(uint8_t rhport) { // Reset endpoints to default state. _ft90x_reset_edpts(); - dcd_event_bus_reset(BOARD_DEVICE_RHPORT_NUM, _speed, true); + dcd_event_bus_reset(BOARD_TUD_RHPORT, _speed, true); } if (cmif & MASK_USBD_CMIF_SUSIRQ) //Handle Suspend interrupt { - dcd_event_bus_signal(BOARD_DEVICE_RHPORT_NUM, DCD_EVENT_SUSPEND, true); + dcd_event_bus_signal(BOARD_TUD_RHPORT, DCD_EVENT_SUSPEND, true); } if (cmif & MASK_USBD_CMIF_RESIRQ) //Handle Resume interrupt { - dcd_event_bus_signal(BOARD_DEVICE_RHPORT_NUM, DCD_EVENT_RESUME, true); + dcd_event_bus_signal(BOARD_TUD_RHPORT, DCD_EVENT_RESUME, true); } if (cmif & MASK_USBD_CMIF_SOFIRQ) //Handle SOF interrupt { - dcd_event_bus_signal(BOARD_DEVICE_RHPORT_NUM, DCD_EVENT_SOF, true); + dcd_event_bus_signal(BOARD_TUD_RHPORT, DCD_EVENT_SOF, true); } } // Handle endpoint interrupts. @@ -980,7 +980,7 @@ void dcd_int_handler(uint8_t rhport) _ft90x_dusb_out(USBD_EP_0, (uint8_t *)_ft90x_setup_packet, sizeof(USB_device_request)); // Send the packet to tinyusb. - dcd_event_setup_received(BOARD_DEVICE_RHPORT_NUM, _ft90x_setup_packet, true); + dcd_event_setup_received(BOARD_TUD_RHPORT, _ft90x_setup_packet, true); // Clear the interrupt that signals a SETUP packet is received. USBD_EP_SR_REG(USBD_EP_0) = (MASK_USBD_EP0SR_SETUP); @@ -1002,7 +1002,7 @@ void dcd_int_handler(uint8_t rhport) xfer_bytes = _ft90x_edpt_xfer_out(USBD_EP_0, (uint8_t *)ep_xfer[USBD_EP_0].buff_ptr, xfer_bytes); } // Now signal completion of data packet. - dcd_event_xfer_complete(BOARD_DEVICE_RHPORT_NUM, (ep_xfer[USBD_EP_0].dir ? TUSB_DIR_IN_MASK : 0), xfer_bytes, XFER_RESULT_SUCCESS, true); + dcd_event_xfer_complete(BOARD_TUD_RHPORT, (ep_xfer[USBD_EP_0].dir ? TUSB_DIR_IN_MASK : 0), xfer_bytes, XFER_RESULT_SUCCESS, true); // Allow new transfers on the control endpoint. ep_xfer[USBD_EP_0].valid = 0; @@ -1059,7 +1059,7 @@ void dcd_int_handler(uint8_t rhport) if (ep_xfer[ep_number].remain_size == 0) { // Signal tinyUSB. - dcd_event_xfer_complete(BOARD_DEVICE_RHPORT_NUM, ep_number | ep_dirmask, ep_xfer[ep_number].total_size, XFER_RESULT_SUCCESS, true); + dcd_event_xfer_complete(BOARD_TUD_RHPORT, ep_number | ep_dirmask, ep_xfer[ep_number].total_size, XFER_RESULT_SUCCESS, true); // Allow new transfers on this endpoint. ep_xfer[ep_number].valid = 0; @@ -1084,21 +1084,21 @@ void ft90x_usbd_pm_ISR(void) { // Signal connection interrupt SYS->PMCFG_H = MASK_SYS_PMCFG_PM_GPIO_IRQ_PEND; - dcd_event_bus_signal(BOARD_DEVICE_RHPORT_NUM, DCD_EVENT_RESUME, true); + dcd_event_bus_signal(BOARD_TUD_RHPORT, DCD_EVENT_RESUME, true); } if (pmcfg & MASK_SYS_PMCFG_DEV_DIS_DEV) { // Signal disconnection interrupt SYS->PMCFG_H = MASK_SYS_PMCFG_PM_GPIO_IRQ_PEND; - dcd_event_bus_signal(BOARD_DEVICE_RHPORT_NUM, DCD_EVENT_UNPLUGGED, true); + dcd_event_bus_signal(BOARD_TUD_RHPORT, DCD_EVENT_UNPLUGGED, true); } if (pmcfg & MASK_SYS_PMCFG_HOST_RST_DEV) { // Signal Host Reset interrupt SYS->PMCFG_H = MASK_SYS_PMCFG_PM_GPIO_IRQ_PEND; - dcd_event_bus_signal(BOARD_DEVICE_RHPORT_NUM, DCD_EVENT_BUS_RESET, true); + dcd_event_bus_signal(BOARD_TUD_RHPORT, DCD_EVENT_BUS_RESET, true); } if (pmcfg & MASK_SYS_PMCFG_HOST_RESUME_DEV) @@ -1109,7 +1109,7 @@ void ft90x_usbd_pm_ISR(void) { // If we are driving K-state on Device USB port; // We must maintain the 1ms requirement before resuming the phy - dcd_event_bus_signal(BOARD_DEVICE_RHPORT_NUM, DCD_EVENT_RESUME, true); + dcd_event_bus_signal(BOARD_TUD_RHPORT, DCD_EVENT_RESUME, true); } } } diff --git a/src/tusb_option.h b/src/tusb_option.h index 3b054fc78..ce22a8a6a 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -221,7 +221,9 @@ typedef int make_iso_compilers_happy ; #define TUD_OPT_RHPORT -1 #endif +#ifndef CFG_TUD_ENABLED #define CFG_TUD_ENABLED (TUD_RHPORT_MODE & OPT_MODE_DEVICE) +#endif #if CFG_TUD_ENABLED #define TUD_OPT_HIGH_SPEED ((TUD_RHPORT_MODE & OPT_MODE_SPEED_MASK) ? (TUD_RHPORT_MODE & OPT_MODE_HIGH_SPEED) : (TUP_RHPORT_HIGHSPEED & (1 << TUD_OPT_RHPORT))) -- cgit v1.3.1 From 8b37aa157911ff2cd470d090bb2e276ca57f5af4 Mon Sep 17 00:00:00 2001 From: Jerzy Kasenberg Date: Wed, 1 Jun 2022 21:50:15 +0200 Subject: nrf5x: Fix DMA access There were two problems: - dma_running flag could be checked in USB interrupt (not set yet) then higher priority interrupt could start transfer, check dma_running (not set yet) set it to true start DMA; then when USB interrupt continues it starts another DMA that is not allowed - when DMA is started some registers can't be safely accessed, read can yield invalid values (SIZE.EPOUT, SIZE.EPISO) current implementation could start DMA for one OUT endpoint then check that another endpoint also has data and while DMA was not started right away, SIZE.EPOUT was copied already to MAXCNT register. Later on when DMA was started not all data was read from endpoint due to incorrect DMA size previously set. To prevent both cases dma_running is changed in atomic way. Only code that actually set this value to true starts DMA, code that tried and had dma_running flag already set simply defers DMA start to USB task. This eliminates also need to have mutex that was there to limit access to dma_running flag to one task only. transfer also now has started flag that is set only after dcd_edpt_xfer() sets up total_len and actua_len. Previously USB interrupt was disabled when total_len and actual_len were setup to prevent race condition when data arrived to ednpoint before transfer was setup was finished. --- src/portable/nordic/nrf5x/dcd_nrf5x.c | 93 ++++++++++++++--------------------- 1 file changed, 37 insertions(+), 56 deletions(-) (limited to 'src/portable') diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index 430d8eded..efa30c60a 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -28,6 +28,7 @@ #if CFG_TUD_ENABLED && CFG_TUSB_MCU == OPT_MCU_NRF5X +#include #include "nrf.h" #include "nrf_clock.h" #include "nrf_power.h" @@ -72,6 +73,7 @@ typedef struct // nRF will auto accept OUT packet after DMA is done // indicate packet is already ACK volatile bool data_received; + volatile bool started; // Set to true when data was transferred from RAM to ISO IN output buffer. // New data can be put in ISO IN output buffer after SOF. @@ -79,9 +81,6 @@ typedef struct } xfer_td_t; -static osal_mutex_def_t dcd_mutex_def; -static osal_mutex_t dcd_mutex; - // Data for managing dcd static struct { @@ -90,7 +89,7 @@ static struct xfer_td_t xfer[EP_CBI_COUNT + 1][2]; // nRF can only carry one DMA at a time, this is used to guard the access to EasyDMA - volatile bool dma_running; + atomic_bool dma_running; }_dcd; /*------------------------------------------------------------------*/ @@ -121,8 +120,6 @@ TU_ATTR_ALWAYS_INLINE static inline bool is_in_isr(void) // helper to start DMA static void start_dma(volatile uint32_t* reg_startep) { - _dcd.dma_running = true; - (*reg_startep) = 1; __ISB(); __DSB(); @@ -131,50 +128,18 @@ static void start_dma(volatile uint32_t* reg_startep) // Therefore dma_pending is corrected right away if ( (reg_startep == &NRF_USBD->TASKS_EP0STATUS) || (reg_startep == &NRF_USBD->TASKS_EP0RCVOUT) ) { - _dcd.dma_running = false; + atomic_flag_clear(&_dcd.dma_running); } } -// only 1 EasyDMA can be active at any time -// TODO use Cortex M4 LDREX and STREX command (atomic) to have better mutex access to EasyDMA -// since current implementation does not 100% guarded against race condition static void edpt_dma_start(volatile uint32_t* reg_startep) { - // Called in critical section i.e within USB ISR, or USB/Global interrupt disabled - if ( is_in_isr() || __get_PRIMASK() || !NVIC_GetEnableIRQ(USBD_IRQn) ) + if ( atomic_flag_test_and_set(&_dcd.dma_running) ) { - if (_dcd.dma_running) - { - //use usbd task to defer later - usbd_defer_func((osal_task_func_t) edpt_dma_start, (void*) (uintptr_t) reg_startep, true); - }else - { - start_dma(reg_startep); - } + usbd_defer_func((osal_task_func_t) edpt_dma_start, (void*) (uintptr_t) reg_startep, true); }else { - // Called in non-critical thread-mode, should be 99% of the time. - // Should be safe to blocking wait until previous DMA transfer complete - uint8_t const rhport = 0; - bool started = false; - osal_mutex_lock(dcd_mutex, OSAL_TIMEOUT_WAIT_FOREVER); - while(!started) - { - // LDREX/STREX may be needed in form of std atomic (required C11) or - // use osal mutex to guard against multiple core MCUs such as nRF53 - dcd_int_disable(rhport); - - if ( !_dcd.dma_running ) - { - start_dma(reg_startep); - started = true; - } - - dcd_int_enable(rhport); - - // osal_yield(); - } - osal_mutex_unlock(dcd_mutex); + start_dma(reg_startep); } } @@ -182,7 +147,7 @@ static void edpt_dma_start(volatile uint32_t* reg_startep) static void edpt_dma_end(void) { TU_ASSERT(_dcd.dma_running, ); - _dcd.dma_running = false; + atomic_flag_clear(&_dcd.dma_running); } // helper getting td @@ -191,12 +156,26 @@ static inline xfer_td_t* get_td(uint8_t epnum, uint8_t dir) return &_dcd.xfer[epnum][dir]; } +static void xact_out_dma(uint8_t epnum); +// Function wraps xact_out_dma which wants uint8_t while usbd_defer_func wants void (*)(void *) +static void xact_out_dma_wrapper(void *epnum) +{ + xact_out_dma((uint8_t)((uintptr_t)epnum)); +} + // Start DMA to move data from Endpoint -> RAM static void xact_out_dma(uint8_t epnum) { xfer_td_t* xfer = get_td(epnum, TUSB_DIR_OUT); uint32_t xact_len; + // DMA can't be active during read of SIZE.EPOUT or SIZE.ISOOUT, so try to lock, + // If already running deffer call regardless if it was called from ISR or task, + if ( atomic_flag_test_and_set(&_dcd.dma_running) ) + { + usbd_defer_func((osal_task_func_t)xact_out_dma_wrapper, (void *)(uint32_t)epnum, is_in_isr()); + return; + } if (epnum == EP_ISO_NUM) { xact_len = NRF_USBD->SIZE.ISOOUT; @@ -204,6 +183,7 @@ static void xact_out_dma(uint8_t epnum) if (xact_len & USBD_SIZE_ISOOUT_ZERO_Msk) { xact_len = 0; + atomic_flag_clear(&_dcd.dma_running); } else { @@ -211,7 +191,7 @@ static void xact_out_dma(uint8_t epnum) NRF_USBD->ISOOUT.PTR = (uint32_t) xfer->buffer; NRF_USBD->ISOOUT.MAXCNT = xact_len; - edpt_dma_start(&NRF_USBD->TASKS_STARTISOOUT); + start_dma(&NRF_USBD->TASKS_STARTISOOUT); } } else @@ -223,7 +203,7 @@ static void xact_out_dma(uint8_t epnum) NRF_USBD->EPOUT[epnum].PTR = (uint32_t) xfer->buffer; NRF_USBD->EPOUT[epnum].MAXCNT = xact_len; - edpt_dma_start(&NRF_USBD->TASKS_STARTEPOUT[epnum]); + start_dma(&NRF_USBD->TASKS_STARTEPOUT[epnum]); } } @@ -248,7 +228,6 @@ static void xact_in_dma(uint8_t epnum) void dcd_init (uint8_t rhport) { TU_LOG1("dcd init\r\n"); - dcd_mutex = osal_mutex_create(&dcd_mutex_def); (void) rhport; } @@ -471,17 +450,10 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t xfer_td_t* xfer = get_td(epnum, dir); - if (!is_in_isr()) { - osal_mutex_lock(dcd_mutex, OSAL_TIMEOUT_WAIT_FOREVER); - dcd_int_disable(rhport); - } + TU_ASSERT(!xfer->started); xfer->buffer = buffer; xfer->total_len = total_bytes; xfer->actual_len = 0; - if (!is_in_isr()) { - dcd_int_enable(rhport); - osal_mutex_unlock(dcd_mutex); - } // Control endpoint with zero-length packet and opposite direction to 1st request byte --> status stage bool const control_status = (epnum == 0 && total_bytes == 0 && dir != tu_edpt_dir(NRF_USBD->BMREQUESTTYPE)); @@ -496,13 +468,20 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t } else if ( dir == TUSB_DIR_OUT ) { + xfer->started = true; if ( epnum == 0 ) { // Accept next Control Out packet. TASKS_EP0RCVOUT also require EasyDMA edpt_dma_start(&NRF_USBD->TASKS_EP0RCVOUT); }else { - if ( xfer->data_received && xfer->total_len > xfer->actual_len) + // started just set, it could start DMA transfer if interrupt was trigger after this line + // code only needs to start transfer (from Endpoint to RAM) when data_received was set + // before started was set. If started is NOT set but data_received is, it means that + // current transfer was already finished and next data is already present in endpoint and + // can be consumed by future transfer + __ISB(); __DSB(); + if ( xfer->data_received && xfer->started ) { // Data is already received previously // start DMA to copy to SRAM @@ -804,7 +783,9 @@ void dcd_int_handler(uint8_t rhport) } }else { + TU_ASSERT(xfer->started,); xfer->total_len = xfer->actual_len; + xfer->started = false; // CBI OUT complete dcd_event_xfer_complete(0, epnum, xfer->actual_len, XFER_RESULT_SUCCESS, true); @@ -857,7 +838,7 @@ void dcd_int_handler(uint8_t rhport) { xfer_td_t* xfer = get_td(epnum, TUSB_DIR_OUT); - if (xfer->actual_len < xfer->total_len) + if ( xfer->started && xfer->actual_len < xfer->total_len ) { xact_out_dma(epnum); }else -- cgit v1.3.1 From 31134f41a17c004aa48d87e397a6bae061f5b328 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 3 Jun 2022 17:24:28 +0700 Subject: make dwc2 stm32 rhport support dynamic --- src/portable/synopsys/dwc2/dcd_dwc2.c | 80 ++++++++++++++++++--------------- src/portable/synopsys/dwc2/dwc2_stm32.h | 61 ++++++++++++++++--------- src/portable/synopsys/dwc2/dwc2_type.h | 17 +++++-- 3 files changed, 97 insertions(+), 61 deletions(-) (limited to 'src/portable') diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index e489f6445..4d9e43ba8 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -50,12 +50,14 @@ #error "Unsupported MCUs" #endif +// Note _dwc2_controller[] must be defined by port header + //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM //--------------------------------------------------------------------+ // DWC2 registers -#define DWC2_REG(_port) ((dwc2_regs_t*) DWC2_REG_BASE) +#define DWC2_REG(_port) ((dwc2_regs_t*) _dwc2_controller[_port].reg_base) // Debug level for DWC2 #define DWC2_DEBUG 2 @@ -72,7 +74,6 @@ #define dcache_clean_invalidate(_addr, _size) #endif - static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[2]; typedef struct { @@ -97,34 +98,32 @@ static bool _out_ep_closed; // Flag to check if RX FIFO si static bool _sof_en; // Calculate the RX FIFO size according to recommendations from reference manual -static inline uint16_t calc_rx_ff_size(uint16_t ep_size) +static inline uint16_t calc_grxfsiz(uint16_t max_ep_size, uint8_t ep_count) { - return 15 + 2*(ep_size/4) + 2*DWC2_EP_MAX; + return 15 + 2*(max_ep_size/4) + 2*ep_count; } static void update_grxfsiz(uint8_t rhport) { - (void) rhport; - - dwc2_regs_t * dwc2 = DWC2_REG(rhport); + dwc2_regs_t * dwc2 = DWC2_REG(rhport); + uint8_t const ep_count = _dwc2_controller[rhport].ep_count; // Determine largest EP size for RX FIFO uint16_t max_epsize = 0; - for (uint8_t epnum = 0; epnum < DWC2_EP_MAX; epnum++) + for (uint8_t epnum = 0; epnum < ep_count; epnum++) { max_epsize = tu_max16(max_epsize, xfer_status[epnum][TUSB_DIR_OUT].max_size); } // Update size of RX FIFO - dwc2->grxfsiz = calc_rx_ff_size(max_epsize); + dwc2->grxfsiz = calc_grxfsiz(max_epsize, ep_count); } -// Setup the control endpoint 0. +// Start of Bus Reset static void bus_reset(uint8_t rhport) { - (void) rhport; - - dwc2_regs_t * dwc2 = DWC2_REG(rhport); + dwc2_regs_t * dwc2 = DWC2_REG(rhport); + uint8_t const ep_count = _dwc2_controller[rhport].ep_count; tu_memclr(xfer_status, sizeof(xfer_status)); _out_ep_closed = false; @@ -135,7 +134,7 @@ static void bus_reset(uint8_t rhport) dwc2->dcfg &= ~DCFG_DAD_Msk; // 1. NAK for all OUT endpoints - for ( uint8_t n = 0; n < DWC2_EP_MAX; n++ ) + for ( uint8_t n = 0; n < ep_count; n++ ) { dwc2->epout[n].doepctl |= DOEPCTL_SNAK; } @@ -185,22 +184,24 @@ static void bus_reset(uint8_t rhport) // - 2 for each used OUT endpoint // // Therefore GRXFSIZ = 13 + 1 + 1 + 2 x (Largest-EPsize/4) + 2 x EPOUTnum - // - FullSpeed (64 Bytes ): GRXFSIZ = 15 + 2 x 16 + 2 x DWC2_EP_MAX = 47 + 2 x DWC2_EP_MAX - // - Highspeed (512 bytes): GRXFSIZ = 15 + 2 x 128 + 2 x DWC2_EP_MAX = 271 + 2 x DWC2_EP_MAX + // - FullSpeed (64 Bytes ): GRXFSIZ = 15 + 2 x 16 + 2 x ep_count = 47 + 2 x ep_count + // - Highspeed (512 bytes): GRXFSIZ = 15 + 2 x 128 + 2 x ep_count = 271 + 2 x ep_count // // NOTE: Largest-EPsize & EPOUTnum is actual used endpoints in configuration. Since DCD has no knowledge - // of the overall picture yet. We will use the worst scenario: largest possible + DWC2_EP_MAX + // of the overall picture yet. We will use the worst scenario: largest possible + ep_count // // For Isochronous, largest EP size can be 1023/1024 for FS/HS respectively. In addition if multiple ISO // are enabled at least "2 x (Largest-EPsize/4) + 1" are recommended. Maybe provide a macro for application to // overwrite this. - dwc2->grxfsiz = calc_rx_ff_size(TUD_OPT_HIGH_SPEED ? 512 : 64); + // EP0 out max is 64 + dwc2->grxfsiz = calc_grxfsiz(64, ep_count); + // Setup the control endpoint 0 _allocated_fifo_words_tx = 16; // Control IN uses FIFO 0 with 64 bytes ( 16 32-bit word ) - dwc2->dieptxf0 = (16 << DIEPTXF0_TX0FD_Pos) | (DWC2_EP_FIFO_SIZE/4 - _allocated_fifo_words_tx); + dwc2->dieptxf0 = (16 << DIEPTXF0_TX0FD_Pos) | (_dwc2_controller[rhport].ep_fifo_size/4 - _allocated_fifo_words_tx); // Fixed control EP0 size to 64 bytes dwc2->epin[0].diepctl &= ~(0x03 << DIEPCTL_MPSIZ_Pos); @@ -363,7 +364,11 @@ static void reset_core(dwc2_regs_t * dwc2) static bool phy_hs_supported(dwc2_regs_t * dwc2) { // note: esp32 incorrect report its hs_phy_type as utmi +#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) + return false; +#else return TUD_OPT_HIGH_SPEED && dwc2->ghwcfg2_bm.hs_phy_type != HS_PHY_TYPE_NONE; +#endif } static void phy_fs_init(dwc2_regs_t * dwc2) @@ -620,12 +625,13 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) { (void) rhport; - dwc2_regs_t * dwc2 = DWC2_REG(rhport); + dwc2_regs_t * dwc2 = DWC2_REG(rhport); + uint8_t const ep_count = _dwc2_controller[rhport].ep_count; uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress); uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress); - TU_ASSERT(epnum < DWC2_EP_MAX); + TU_ASSERT(epnum < ep_count); xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir); xfer->max_size = tu_edpt_packet_size(desc_edpt); @@ -636,12 +642,12 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) if(dir == TUSB_DIR_OUT) { // Calculate required size of RX FIFO - uint16_t const sz = calc_rx_ff_size(4*fifo_size); + uint16_t const sz = calc_grxfsiz(4*fifo_size, ep_count); // If size_rx needs to be extended check if possible and if so enlarge it if (dwc2->grxfsiz < sz) { - TU_ASSERT(sz + _allocated_fifo_words_tx <= DWC2_EP_FIFO_SIZE/4); + TU_ASSERT(sz + _allocated_fifo_words_tx <= _dwc2_controller[rhport].ep_fifo_size/4); // Enlarge RX FIFO dwc2->grxfsiz = sz; @@ -678,15 +684,15 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) // - IN EP 1 gets FIFO 1, IN EP "n" gets FIFO "n". // Check if free space is available - TU_ASSERT(_allocated_fifo_words_tx + fifo_size + dwc2->grxfsiz <= DWC2_EP_FIFO_SIZE/4); + TU_ASSERT(_allocated_fifo_words_tx + fifo_size + dwc2->grxfsiz <= _dwc2_controller[rhport].ep_fifo_size/4); _allocated_fifo_words_tx += fifo_size; - TU_LOG(DWC2_DEBUG, " Allocated %u bytes at offset %u", fifo_size*4, DWC2_EP_FIFO_SIZE-_allocated_fifo_words_tx*4); + TU_LOG(DWC2_DEBUG, " Allocated %u bytes at offset %lu", fifo_size*4, _dwc2_controller[rhport].ep_fifo_size-_allocated_fifo_words_tx*4); // DIEPTXF starts at FIFO #1. // Both TXFD and TXSA are in unit of 32-bit words. - dwc2->dieptxf[epnum - 1] = (fifo_size << DIEPTXF_INEPTXFD_Pos) | (DWC2_EP_FIFO_SIZE/4 - _allocated_fifo_words_tx); + dwc2->dieptxf[epnum - 1] = (fifo_size << DIEPTXF_INEPTXFD_Pos) | (_dwc2_controller[rhport].ep_fifo_size/4 - _allocated_fifo_words_tx); dwc2->epin[epnum].diepctl |= (1 << DIEPCTL_USBAEP_Pos) | (epnum << DIEPCTL_TXFNUM_Pos) | @@ -703,14 +709,13 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) // Close all non-control endpoints, cancel all pending transfers if any. void dcd_edpt_close_all (uint8_t rhport) { - (void) rhport; - - dwc2_regs_t * dwc2 = DWC2_REG(rhport); + dwc2_regs_t * dwc2 = DWC2_REG(rhport); + uint8_t const ep_count = _dwc2_controller[rhport].ep_count; // Disable non-control interrupt dwc2->daintmsk = (1 << DAINTMSK_OEPM_Pos) | (1 << DAINTMSK_IEPM_Pos); - for(uint8_t n = 1; n < DWC2_EP_MAX; n++) + for(uint8_t n = 1; n < ep_count; n++) { // disable OUT endpoint dwc2->epout[n].doepctl = 0; @@ -871,8 +876,9 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) { uint16_t const fifo_size = (dwc2->dieptxf[epnum - 1] & DIEPTXF_INEPTXFD_Msk) >> DIEPTXF_INEPTXFD_Pos; uint16_t const fifo_start = (dwc2->dieptxf[epnum - 1] & DIEPTXF_INEPTXSA_Msk) >> DIEPTXF_INEPTXSA_Pos; + // For now only the last opened endpoint can be closed without fuss. - TU_ASSERT(fifo_start == DWC2_EP_FIFO_SIZE/4 - _allocated_fifo_words_tx,); + TU_ASSERT(fifo_start == _dwc2_controller[rhport].ep_fifo_size/4 - _allocated_fifo_words_tx,); _allocated_fifo_words_tx -= fifo_size; } else @@ -1075,11 +1081,12 @@ static void handle_rxflvl_irq(uint8_t rhport) static void handle_epout_irq (uint8_t rhport) { - dwc2_regs_t *dwc2 = DWC2_REG(rhport); + dwc2_regs_t * dwc2 = DWC2_REG(rhport); + uint8_t const ep_count = _dwc2_controller[rhport].ep_count; // DAINT for a given EP clears when DOEPINTx is cleared. // OEPINT will be cleared when DAINT's out bits are cleared. - for ( uint8_t n = 0; n < DWC2_EP_MAX; n++ ) + for ( uint8_t n = 0; n < ep_count; n++ ) { if ( dwc2->daint & TU_BIT(DAINT_OEPINT_Pos + n) ) { @@ -1126,12 +1133,13 @@ static void handle_epout_irq (uint8_t rhport) static void handle_epin_irq (uint8_t rhport) { - dwc2_regs_t *dwc2 = DWC2_REG(rhport); - dwc2_epin_t* epin = dwc2->epin; + dwc2_regs_t * dwc2 = DWC2_REG(rhport); + uint8_t const ep_count = _dwc2_controller[rhport].ep_count; + dwc2_epin_t* epin = dwc2->epin; // DAINT for a given EP clears when DIEPINTx is cleared. // IEPINT will be cleared when DAINT's out bits are cleared. - for ( uint8_t n = 0; n < DWC2_EP_MAX; n++ ) + for ( uint8_t n = 0; n < ep_count; n++ ) { if ( dwc2->daint & TU_BIT(DAINT_IEPINT_Pos + n) ) { diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index d54bf1fd7..23632616a 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -56,12 +56,9 @@ #define EP_FIFO_SIZE_FS 4096 #define EP_MAX_HS 9 #define EP_FIFO_SIZE_HS 4096 - #if (! defined USB2_OTG_FS) - // H7 with only 1 USB port: H72x / H73x / H7Ax / H7Bx - // USB_OTG_FS_PERIPH_BASE and OTG_FS_IRQn not defined - #define USB_OTG_FS_PERIPH_BASE USB1_OTG_HS_PERIPH_BASE - #define OTG_FS_IRQn OTG_HS_IRQn - #endif + + // NOTE: H7 with only 1 USB port: H72x / H73x / H7Ax / H7Bx + // USB_OTG_FS_PERIPH_BASE and OTG_FS_IRQn not defined #elif CFG_TUSB_MCU == OPT_MCU_STM32F7 #include "stm32f7xx.h" @@ -79,35 +76,57 @@ #error "Unsupported MCUs" #endif -// On STM32 we associate Port0 to OTG_FS, and Port1 to OTG_HS -#if TUD_OPT_RHPORT == 0 - #define DWC2_REG_BASE USB_OTG_FS_PERIPH_BASE - #define DWC2_EP_MAX EP_MAX_FS - #define DWC2_EP_FIFO_SIZE EP_FIFO_SIZE_FS - #define RHPORT_IRQn OTG_FS_IRQn - +// OTG HS always has higher number of endpoints than FS +#ifdef EP_MAX_HS + #define DWC2_EP_MAX EP_MAX_HS #else - #define DWC2_REG_BASE USB_OTG_HS_PERIPH_BASE - #define DWC2_EP_MAX EP_MAX_HS - #define DWC2_EP_FIFO_SIZE EP_FIFO_SIZE_HS - #define RHPORT_IRQn OTG_HS_IRQn + #define DWC2_EP_MAX EP_MAX_FS +#endif +// On STM32 we associate Port0 to OTG_FS, and Port1 to OTG_HS +//#if TUD_OPT_RHPORT == 0 +// #define DWC2_REG_BASE USB_OTG_FS_PERIPH_BASE +// #define DWC2_EP_MAX EP_MAX_FS +// #define DWC2_EP_FIFO_SIZE EP_FIFO_SIZE_FS +// #define RHPORT_IRQn OTG_FS_IRQn +// +//#else +// #define DWC2_REG_BASE USB_OTG_HS_PERIPH_BASE +// #define DWC2_EP_MAX EP_MAX_HS +// #define DWC2_EP_FIFO_SIZE EP_FIFO_SIZE_HS +// #define RHPORT_IRQn OTG_HS_IRQn +// +//#endif + +// On STM32 for consistency we associate +// - Port0 to OTG_FS, and Port1 to OTG_HS +static const dwc2_controller_t _dwc2_controller[] = +{ +#ifdef USB_OTG_FS_PERIPH_BASE + { .reg_base = USB_OTG_FS_PERIPH_BASE, .irqnum = OTG_FS_IRQn, .ep_count = EP_MAX_FS, .ep_fifo_size = EP_FIFO_SIZE_FS}, +#endif + +#ifdef USB_OTG_HS_PERIPH_BASE + { .reg_base = USB_OTG_HS_PERIPH_BASE, .irqnum = OTG_HS_IRQn, .ep_count = EP_MAX_HS, .ep_fifo_size = EP_FIFO_SIZE_HS}, #endif +}; + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ extern uint32_t SystemCoreClock; TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_enable(uint8_t rhport) { - (void) rhport; - NVIC_EnableIRQ(RHPORT_IRQn); + NVIC_EnableIRQ(_dwc2_controller[rhport].irqnum); } TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_disable (uint8_t rhport) { - (void) rhport; - NVIC_DisableIRQ(RHPORT_IRQn); + NVIC_DisableIRQ(_dwc2_controller[rhport].irqnum); } TU_ATTR_ALWAYS_INLINE diff --git a/src/portable/synopsys/dwc2/dwc2_type.h b/src/portable/synopsys/dwc2/dwc2_type.h index 7fa2028eb..e9df7335e 100644 --- a/src/portable/synopsys/dwc2/dwc2_type.h +++ b/src/portable/synopsys/dwc2/dwc2_type.h @@ -19,6 +19,19 @@ #include "stdint.h" +#ifdef __cplusplus + extern "C" { +#endif + +// Controller +typedef struct +{ + uint32_t reg_base; + uint32_t irqnum; + uint8_t ep_count; + uint32_t ep_fifo_size; +}dwc2_controller_t; + /* DWC OTG HW Release versions */ #define DWC2_CORE_REV_2_71a 0x4f54271a #define DWC2_CORE_REV_2_72a 0x4f54272a @@ -40,10 +53,6 @@ #define DWC2_FS_IOT_ID 0x55310000 #define DWC2_HS_IOT_ID 0x55320000 -#ifdef __cplusplus - extern "C" { -#endif - #if 0 // HS PHY typedef struct -- cgit v1.3.1 From f626916a5733fc7beff29ff6f907433e28ff14e0 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 4 Jun 2022 23:52:12 +0700 Subject: update all dwc2 ports to support new dynamic controller support --- src/portable/synopsys/dwc2/dcd_dwc2.c | 10 ++++++++-- src/portable/synopsys/dwc2/dwc2_bcm.h | 13 +++++++------ src/portable/synopsys/dwc2/dwc2_efm32.h | 12 +++++++----- src/portable/synopsys/dwc2/dwc2_esp32.h | 8 +++++--- src/portable/synopsys/dwc2/dwc2_gd32.h | 13 +++++++------ src/portable/synopsys/dwc2/dwc2_stm32.h | 19 ++----------------- src/portable/synopsys/dwc2/dwc2_type.h | 8 ++++---- src/portable/synopsys/dwc2/dwc2_xmc.h | 15 ++++++++------- 8 files changed, 48 insertions(+), 50 deletions(-) (limited to 'src/portable') diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index 4d9e43ba8..f5ecdfe4f 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -34,6 +34,13 @@ #include "device/dcd.h" #include "dwc2_type.h" +// Following symbols must be defined by port header +// - _dwc2_controller[]: array of controllers +// - DWC2_EP_MAX: largest EP counts of all controllers +// - dwc2_phy_init/dwc2_phy_update: phy init called before and after core reset +// - dwc2_dcd_int_enable/dwc2_dcd_int_disable +// - dwc2_remote_wakeup_delay + #if defined(TUP_USBIP_DWC2_STM32) #include "dwc2_stm32.h" #elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) @@ -50,8 +57,6 @@ #error "Unsupported MCUs" #endif -// Note _dwc2_controller[] must be defined by port header - //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM //--------------------------------------------------------------------+ @@ -467,6 +472,7 @@ static bool check_dwc2(dwc2_regs_t * dwc2) #endif // For some reasons: GD32VF103 snpsid and all hwcfg register are always zero (skip it) + (void) dwc2; #if !TU_CHECK_MCU(OPT_MCU_GD32VF103) uint32_t const gsnpsid = dwc2->gsnpsid & GSNPSID_ID_MASK; TU_ASSERT(gsnpsid == DWC2_OTG_ID || gsnpsid == DWC2_FS_IOT_ID || gsnpsid == DWC2_HS_IOT_ID); diff --git a/src/portable/synopsys/dwc2/dwc2_bcm.h b/src/portable/synopsys/dwc2/dwc2_bcm.h index 14194e754..732d96ae0 100644 --- a/src/portable/synopsys/dwc2/dwc2_bcm.h +++ b/src/portable/synopsys/dwc2/dwc2_bcm.h @@ -35,9 +35,12 @@ #include "broadcom/interrupts.h" #include "broadcom/caches.h" -#define DWC2_REG_BASE USB_OTG_GLOBAL_BASE #define DWC2_EP_MAX 8 -#define DWC2_EP_FIFO_SIZE 4096 + +static const dwc2_controller_t _dwc2_controller[] = +{ + { .reg_base = USB_OTG_GLOBAL_BASE, .irqnum = USB_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = 4096 } +}; #define dcache_clean(_addr, _size) data_clean(_addr, _size) #define dcache_invalidate(_addr, _size) data_invalidate(_addr, _size) @@ -46,15 +49,13 @@ TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_enable(uint8_t rhport) { - (void) rhport; - BP_EnableIRQ(USB_IRQn); + BP_EnableIRQ(_dwc2_controller[rhport].irqnum); } TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_disable (uint8_t rhport) { - (void) rhport; - BP_DisableIRQ(USB_IRQn); + BP_DisableIRQ(_dwc2_controller[rhport].irqnum); } static inline void dwc2_remote_wakeup_delay(void) diff --git a/src/portable/synopsys/dwc2/dwc2_efm32.h b/src/portable/synopsys/dwc2/dwc2_efm32.h index ee4c3c715..0e3570cbb 100644 --- a/src/portable/synopsys/dwc2/dwc2_efm32.h +++ b/src/portable/synopsys/dwc2/dwc2_efm32.h @@ -37,20 +37,22 @@ // EFM32 has custom control register before DWC registers #define DWC2_REG_BASE (USB_BASE + offsetof(USB_TypeDef, GOTGCTL)) #define DWC2_EP_MAX 7 -#define DWC2_EP_FIFO_SIZE 2048 + +static const dwc2_controller_t _dwc2_controller[] = +{ + { .reg_base = DWC2_REG_BASE, .irqnum = USB_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = 2048 } +}; TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_enable(uint8_t rhport) { - (void) rhport; - NVIC_EnableIRQ(USB_IRQn); + NVIC_EnableIRQ(_dwc2_controller[rhport].irqnum); } TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_disable (uint8_t rhport) { - (void) rhport; - NVIC_DisableIRQ(USB_IRQn); + NVIC_DisableIRQ(_dwc2_controller[rhport].irqnum); } static inline void dwc2_remote_wakeup_delay(void) diff --git a/src/portable/synopsys/dwc2/dwc2_esp32.h b/src/portable/synopsys/dwc2/dwc2_esp32.h index 78da277d5..c50dd66b8 100644 --- a/src/portable/synopsys/dwc2/dwc2_esp32.h +++ b/src/portable/synopsys/dwc2/dwc2_esp32.h @@ -37,10 +37,12 @@ //#include "soc/usb_periph.h" #define DWC2_REG_BASE 0x60080000UL -#define DWC2_EP_MAX 5 // USB_OUT_EP_NUM -#define DWC2_EP_FIFO_SIZE 1024 +#define DWC2_EP_MAX 6 // USB_OUT_EP_NUM. TODO ESP32Sx only has 5 tx fifo (5 endpoint IN) -// #define EP_FIFO_NUM 5 +static const dwc2_controller_t _dwc2_controller[] = +{ + { .reg_base = DWC2_REG_BASE, .irqnum = 0, .ep_count = DWC2_EP_MAX, .ep_fifo_size = 1024 } +}; static intr_handle_t usb_ih; diff --git a/src/portable/synopsys/dwc2/dwc2_gd32.h b/src/portable/synopsys/dwc2/dwc2_gd32.h index f8fa01ee0..0375fffe4 100644 --- a/src/portable/synopsys/dwc2/dwc2_gd32.h +++ b/src/portable/synopsys/dwc2/dwc2_gd32.h @@ -34,8 +34,11 @@ #define DWC2_REG_BASE 0x50000000UL #define DWC2_EP_MAX 4 -#define DWC2_EP_FIFO_SIZE 1280 -#define RHPORT_IRQn 86 + +static const dwc2_controller_t _dwc2_controller[] = +{ + { .reg_base = DWC2_REG_BASE, .irqnum = 86, .ep_count = DWC2_EP_MAX, .ep_fifo_size = 1280 } +}; extern uint32_t SystemCoreClock; @@ -57,15 +60,13 @@ static inline void __eclic_disable_interrupt (uint32_t irq){ TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_enable(uint8_t rhport) { - (void) rhport; - __eclic_enable_interrupt(RHPORT_IRQn); + __eclic_enable_interrupt(_dwc2_controller[rhport].irqnum); } TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_disable (uint8_t rhport) { - (void) rhport; - __eclic_disable_interrupt(RHPORT_IRQn); + __eclic_disable_interrupt(_dwc2_controller[rhport].irqnum); } static inline void dwc2_remote_wakeup_delay(void) diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index 23632616a..709428f7f 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -83,31 +83,16 @@ #define DWC2_EP_MAX EP_MAX_FS #endif -// On STM32 we associate Port0 to OTG_FS, and Port1 to OTG_HS -//#if TUD_OPT_RHPORT == 0 -// #define DWC2_REG_BASE USB_OTG_FS_PERIPH_BASE -// #define DWC2_EP_MAX EP_MAX_FS -// #define DWC2_EP_FIFO_SIZE EP_FIFO_SIZE_FS -// #define RHPORT_IRQn OTG_FS_IRQn -// -//#else -// #define DWC2_REG_BASE USB_OTG_HS_PERIPH_BASE -// #define DWC2_EP_MAX EP_MAX_HS -// #define DWC2_EP_FIFO_SIZE EP_FIFO_SIZE_HS -// #define RHPORT_IRQn OTG_HS_IRQn -// -//#endif - // On STM32 for consistency we associate // - Port0 to OTG_FS, and Port1 to OTG_HS static const dwc2_controller_t _dwc2_controller[] = { #ifdef USB_OTG_FS_PERIPH_BASE - { .reg_base = USB_OTG_FS_PERIPH_BASE, .irqnum = OTG_FS_IRQn, .ep_count = EP_MAX_FS, .ep_fifo_size = EP_FIFO_SIZE_FS}, + { .reg_base = USB_OTG_FS_PERIPH_BASE, .irqnum = OTG_FS_IRQn, .ep_count = EP_MAX_FS, .ep_fifo_size = EP_FIFO_SIZE_FS }, #endif #ifdef USB_OTG_HS_PERIPH_BASE - { .reg_base = USB_OTG_HS_PERIPH_BASE, .irqnum = OTG_HS_IRQn, .ep_count = EP_MAX_HS, .ep_fifo_size = EP_FIFO_SIZE_HS}, + { .reg_base = USB_OTG_HS_PERIPH_BASE, .irqnum = OTG_HS_IRQn, .ep_count = EP_MAX_HS, .ep_fifo_size = EP_FIFO_SIZE_HS }, #endif }; diff --git a/src/portable/synopsys/dwc2/dwc2_type.h b/src/portable/synopsys/dwc2/dwc2_type.h index e9df7335e..3fc979337 100644 --- a/src/portable/synopsys/dwc2/dwc2_type.h +++ b/src/portable/synopsys/dwc2/dwc2_type.h @@ -26,10 +26,10 @@ // Controller typedef struct { - uint32_t reg_base; - uint32_t irqnum; - uint8_t ep_count; - uint32_t ep_fifo_size; + uintptr_t reg_base; + uint32_t irqnum; + uint8_t ep_count; + uint32_t ep_fifo_size; }dwc2_controller_t; /* DWC OTG HW Release versions */ diff --git a/src/portable/synopsys/dwc2/dwc2_xmc.h b/src/portable/synopsys/dwc2/dwc2_xmc.h index 4e6bebb01..63419abf7 100644 --- a/src/portable/synopsys/dwc2/dwc2_xmc.h +++ b/src/portable/synopsys/dwc2/dwc2_xmc.h @@ -34,23 +34,24 @@ #include "xmc_device.h" -// XMC has custom control register before DWC registers -#define DWC2_REG_BASE USB0_BASE #define DWC2_EP_MAX 7 -#define DWC2_EP_FIFO_SIZE 2048 + +static const dwc2_controller_t _dwc2_controller[] = +{ + // Note: XMC has some custom control registers before DWC registers + { .reg_base = USB0_BASE, .irqnum = USB0_0_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = 2048 } +}; TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_enable(uint8_t rhport) { - (void) rhport; - NVIC_EnableIRQ(USB0_0_IRQn); + NVIC_EnableIRQ(_dwc2_controller[rhport].irqnum); } TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_disable (uint8_t rhport) { - (void) rhport; - NVIC_DisableIRQ(USB0_0_IRQn); + NVIC_DisableIRQ(_dwc2_controller[rhport].irqnum); } static inline void dwc2_remote_wakeup_delay(void) -- cgit v1.3.1 From 7187cd9a8528bfe2b570567ca2d0a2ae36b7c478 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 6 Jun 2022 12:51:10 +0700 Subject: fix ci, remove use of CFG_TUSB_RHPORT0_MODE in bsp --- hw/bsp/ea4088qs/ea4088qs.c | 6 ++--- hw/bsp/ea4357/ea4357.c | 36 ++++++++++++++++++++---------- hw/bsp/fomu/fomu.c | 2 +- hw/bsp/imxrt/family.c | 38 +++++++++++++++++++++++--------- hw/bsp/lpc54/family.c | 19 +++++++++++----- hw/bsp/lpc55/family.c | 16 ++++++++++++-- hw/bsp/lpcxpresso1769/lpcxpresso1769.c | 8 +++---- hw/bsp/mbed1768/mbed1768.c | 8 +++---- hw/bsp/ngx4330/ngx4330.c | 35 +++++++++++++++++------------ hw/bsp/samg55xplained/samg55xplained.c | 2 +- src/portable/bridgetek/ft9xx/dcd_ft9xx.c | 2 +- 11 files changed, 114 insertions(+), 58 deletions(-) (limited to 'src/portable') diff --git a/hw/bsp/ea4088qs/ea4088qs.c b/hw/bsp/ea4088qs/ea4088qs.c index b25f9101c..fa905b2f9 100644 --- a/hw/bsp/ea4088qs/ea4088qs.c +++ b/hw/bsp/ea4088qs/ea4088qs.c @@ -32,11 +32,11 @@ //--------------------------------------------------------------------+ void USB_IRQHandler(void) { - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST + #if CFG_TUD_ENABLED tuh_int_handler(0); #endif - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE + #if CFG_TUH_ENABLED tud_int_handler(0); #endif } @@ -115,7 +115,7 @@ void board_init(void) SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); + NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif Chip_GPIO_Init(LPC_GPIO); diff --git a/hw/bsp/ea4357/ea4357.c b/hw/bsp/ea4357/ea4357.c index aa206a28d..2c1d08770 100644 --- a/hw/bsp/ea4357/ea4357.c +++ b/hw/bsp/ea4357/ea4357.c @@ -53,6 +53,18 @@ // {0x02, 7, 0, 7 }, // SW6 //}; +#ifdef BOARD_TUD_RHPORT + #define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n) +#else + #define PORT_SUPPORT_DEVICE(_n) 0 +#endif + +#ifdef BOARD_TUH_RHPORT + #define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n) +#else + #define PORT_SUPPORT_HOST(_n) 0 +#endif + /*------------------------------------------------------------------*/ /* BOARD API *------------------------------------------------------------------*/ @@ -116,7 +128,7 @@ void board_init(void) SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - //NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif Chip_GPIO_Init(LPC_GPIO_PORT); @@ -170,7 +182,7 @@ void board_init(void) * - Insert jumpers in position 2-3 in JP17/JP18/JP19 * - Insert jumpers in JP31 (OTG) */ -#if CFG_TUSB_RHPORT0_MODE +#if PORT_SUPPORT_DEVICE(0) || PORT_SUPPORT_HOST(0) Chip_USB0_Init(); #endif @@ -195,14 +207,14 @@ void board_init(void) * - LED34 lights green when +5V is available on J20. * - JP15 shall not be inserted. JP16 has no effect */ -#if CFG_TUSB_RHPORT1_MODE +#if PORT_SUPPORT_DEVICE(1) || PORT_SUPPORT_HOST(1) Chip_USB1_Init(); #endif // USB0 Vbus Power: P2_3 on EA4357 channel B U20 GPIO26 active low (base board) Chip_SCU_PinMuxSet(2, 3, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC7); - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE + #if PORT_SUPPORT_DEVICE(0) // P9_5 (GPIO5[18]) (GPIO28 on oem base) as USB connect, active low. Chip_SCU_PinMuxSet(9, 5, SCU_MODE_PULLDOWN | SCU_MODE_FUNC4); Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 5, 18); @@ -217,23 +229,23 @@ void board_init(void) //--------------------------------------------------------------------+ void USB0_IRQHandler(void) { - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST - tuh_int_handler(0); + #if PORT_SUPPORT_DEVICE(0) + tud_int_handler(0); #endif - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE - tud_int_handler(0); + #if PORT_SUPPORT_HOST(0) + tuh_int_handler(0); #endif } void USB1_IRQHandler(void) { - #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST - tuh_int_handler(1); + #if PORT_SUPPORT_DEVICE(1) + tud_int_handler(1); #endif - #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE - tud_int_handler(1); + #if PORT_SUPPORT_HOST(1) + tuh_int_handler(1); #endif } diff --git a/hw/bsp/fomu/fomu.c b/hw/bsp/fomu/fomu.c index 12b7bfd18..33c630303 100644 --- a/hw/bsp/fomu/fomu.c +++ b/hw/bsp/fomu/fomu.c @@ -61,7 +61,7 @@ void isr(void) irqs = irq_pending() & irq_getmask(); -#if CFG_TUSB_RHPORT0_MODE == OPT_MODE_DEVICE +#if CFG_TUD_ENABLED if (irqs & (1 << USB_INTERRUPT)) { tud_int_handler(0); } diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c index 8d34d4b9f..e5f630108 100644 --- a/hw/bsp/imxrt/family.c +++ b/hw/bsp/imxrt/family.c @@ -34,9 +34,25 @@ #include "clock_config.h" +#ifdef BOARD_TUD_RHPORT + #define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n) +#else + #define PORT_SUPPORT_DEVICE(_n) 0 +#endif + +#ifdef BOARD_TUH_RHPORT + #define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n) +#else + #define PORT_SUPPORT_HOST(_n) 0 +#endif + // needed by fsl_flexspi_nor_boot const uint8_t dcd_data[] = { 0x00 }; +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + void board_init(void) { // Init clock @@ -51,9 +67,9 @@ void board_init(void) SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB_OTG1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); -#ifdef USB_OTG2_IRQn - NVIC_SetPriority(USB_OTG2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); + NVIC_SetPriority(USB_OTG1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); +#ifdef USBPHY2 + NVIC_SetPriority(USB_OTG2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif #endif @@ -149,23 +165,23 @@ void board_init(void) //--------------------------------------------------------------------+ void USB_OTG1_IRQHandler(void) { - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST - tuh_int_handler(0); + #if PORT_SUPPORT_DEVICE(0) + tud_int_handler(0); #endif - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE - tud_int_handler(0); + #if PORT_SUPPORT_HOST(0) + tuh_int_handler(0); #endif } void USB_OTG2_IRQHandler(void) { - #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST - tuh_int_handler(1); + #if PORT_SUPPORT_DEVICE(1) + tud_int_handler(1); #endif - #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE - tud_int_handler(1); + #if PORT_SUPPORT_HOST(1) + tuh_int_handler(1); #endif } diff --git a/hw/bsp/lpc54/family.c b/hw/bsp/lpc54/family.c index 4f1199c3a..9bb341e73 100644 --- a/hw/bsp/lpc54/family.c +++ b/hw/bsp/lpc54/family.c @@ -33,6 +33,18 @@ #include "bsp/board.h" #include "board.h" +#ifdef BOARD_TUD_RHPORT + #define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n) +#else + #define PORT_SUPPORT_DEVICE(_n) 0 +#endif + +#ifdef BOARD_TUH_RHPORT + #define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n) +#else + #define PORT_SUPPORT_HOST(_n) 0 +#endif + //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM //--------------------------------------------------------------------+ @@ -152,8 +164,7 @@ void board_init(void) #if defined(FSL_FEATURE_SOC_USBHSD_COUNT) && FSL_FEATURE_SOC_USBHSD_COUNT // LPC546xx and LPC540xx has OTG 1 FS + 1 HS rhports - - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE + #if PORT_SUPPORT_DEVICE(0) // Port0 is Full Speed POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*< Turn on USB Phy */ CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false); @@ -167,7 +178,7 @@ void board_init(void) CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbSrcFro, CLOCK_GetFroHfFreq()); #endif - #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE + #if PORT_SUPPORT_DEVICE(1) // Port1 is High Speed POWER_DisablePD(kPDRUNCFG_PD_USB1_PHY); @@ -178,10 +189,8 @@ void board_init(void) CLOCK_EnableUsbhs0DeviceClock(kCLOCK_UsbSrcUsbPll, 0U); #endif - #else // LPC5411x series only has full speed device - POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); // Turn on USB Phy CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); /* enable USB IP clock */ #endif diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c index f037a9f5b..e7aed5759 100644 --- a/hw/bsp/lpc55/family.c +++ b/hw/bsp/lpc55/family.c @@ -34,6 +34,18 @@ #include "fsl_sctimer.h" #include "sct_neopixel.h" +#ifdef BOARD_TUD_RHPORT + #define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n) +#else + #define PORT_SUPPORT_DEVICE(_n) 0 +#endif + +#ifdef BOARD_TUH_RHPORT + #define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n) +#else + #define PORT_SUPPORT_HOST(_n) 0 +#endif + //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM //--------------------------------------------------------------------+ @@ -164,7 +176,7 @@ void board_init(void) /* PORT0 PIN22 configured as USB0_VBUS */ IOCON_PinMuxSet(IOCON, 0U, 22U, IOCON_PIO_DIG_FUNC7_EN); -#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE +#if PORT_SUPPORT_DEVICE(0) // Port0 is Full Speed /* Turn on USB0 Phy */ @@ -189,7 +201,7 @@ void board_init(void) CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); #endif -#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE +#if PORT_SUPPORT_DEVICE(1) // Port1 is High Speed /* Turn on USB1 Phy */ diff --git a/hw/bsp/lpcxpresso1769/lpcxpresso1769.c b/hw/bsp/lpcxpresso1769/lpcxpresso1769.c index b82e5ffe0..b7bce93d2 100644 --- a/hw/bsp/lpcxpresso1769/lpcxpresso1769.c +++ b/hw/bsp/lpcxpresso1769/lpcxpresso1769.c @@ -32,12 +32,12 @@ //--------------------------------------------------------------------+ void USB_IRQHandler(void) { - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST - tuh_int_handler(0); + #if CFG_TUD_ENABLED + tud_int_handler(0); #endif - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE - tud_int_handler(0); + #if CFG_TUH_ENABLED + tuh_int_handler(0); #endif } diff --git a/hw/bsp/mbed1768/mbed1768.c b/hw/bsp/mbed1768/mbed1768.c index 7c2b37016..08cf3adbd 100644 --- a/hw/bsp/mbed1768/mbed1768.c +++ b/hw/bsp/mbed1768/mbed1768.c @@ -146,12 +146,12 @@ void board_init(void) //--------------------------------------------------------------------+ void USB_IRQHandler(void) { - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST - tuh_int_handler(0); + #if CFG_TUD_ENABLED + tud_int_handler(0); #endif - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE - tud_int_handler(0); + #if CFG_TUH_ENABLED + tuh_int_handler(0); #endif } diff --git a/hw/bsp/ngx4330/ngx4330.c b/hw/bsp/ngx4330/ngx4330.c index b63f9b894..4fc314165 100644 --- a/hw/bsp/ngx4330/ngx4330.c +++ b/hw/bsp/ngx4330/ngx4330.c @@ -40,6 +40,18 @@ #define BOARD_UART_PIN_TX 10 // PF.10 : UART0_TXD #define BOARD_UART_PIN_RX 11 // PF.11 : UART0_RXD +#ifdef BOARD_TUD_RHPORT + #define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n) +#else + #define PORT_SUPPORT_DEVICE(_n) 0 +#endif + +#ifdef BOARD_TUH_RHPORT + #define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n) +#else + #define PORT_SUPPORT_HOST(_n) 0 +#endif + /*------------------------------------------------------------------*/ /* BOARD API *------------------------------------------------------------------*/ @@ -120,7 +132,7 @@ void board_init(void) SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - //NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif Chip_GPIO_Init(LPC_GPIO_PORT); @@ -167,9 +179,7 @@ void board_init(void) * status feedback from the distribution switch. GPIO54 is used for VBUS sensing. 15Kohm pull-down * resistors are always active */ -#if CFG_TUSB_RHPORT0_MODE Chip_USB0_Init(); -#endif /* USB1 * When USB channel #1 is used as USB Host, 15Kohm pull-down resistors are needed on the USB data @@ -189,12 +199,9 @@ void board_init(void) * of VBUS can be read via U31. * JP16 shall not be inserted. */ -#if CFG_TUSB_RHPORT1_MODE Chip_USB1_Init(); - // Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 5, 6); /* GPIO5[6] = USB1_PWR_EN */ // Chip_GPIO_SetPinState(LPC_GPIO_PORT, 5, 6, true); /* GPIO5[6] output high */ -#endif } //--------------------------------------------------------------------+ @@ -202,23 +209,23 @@ void board_init(void) //--------------------------------------------------------------------+ void USB0_IRQHandler(void) { - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST - tuh_int_handler(0); + #if PORT_SUPPORT_DEVICE(0) + tud_int_handler(0); #endif - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE - tud_int_handler(0); + #if PORT_SUPPORT_HOST(0) + tuh_int_handler(0); #endif } void USB1_IRQHandler(void) { - #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST - tuh_int_handler(1); + #if PORT_SUPPORT_DEVICE(1) + tud_int_handler(1); #endif - #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE - tud_int_handler(1); + #if PORT_SUPPORT_HOST(1) + tuh_int_handler(1); #endif } diff --git a/hw/bsp/samg55xplained/samg55xplained.c b/hw/bsp/samg55xplained/samg55xplained.c index ed106b06b..027c88e2f 100644 --- a/hw/bsp/samg55xplained/samg55xplained.c +++ b/hw/bsp/samg55xplained/samg55xplained.c @@ -99,7 +99,7 @@ void board_init(void) //--------------------------------------------------------------------+ void UDP_Handler(void) { - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE + #if CFG_TUD_ENABLED tud_int_handler(0); #endif } diff --git a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c index 7a65cf5d0..2445593fe 100644 --- a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c +++ b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c @@ -312,7 +312,7 @@ static void _dcd_ft90x_detach(void) // Determine the speed of the USB to which we are connected. // Set the speed of the PHY accordingly. -// High speed can be disabled through CFG_TUSB_RHPORT0_MODE settings. +// High speed can be disabled through CFG_TUSB_RHPORT0_MODE or CFG_TUD_MAX_SPEED settings. static void _ft90x_usb_speed(void) { uint8_t fctrl_val; -- cgit v1.3.1 From 1b086729452c67e3e78a736506732ca013959572 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 6 Jun 2022 13:25:48 +0700 Subject: more ci fix --- hw/bsp/imxrt/family.c | 4 ++-- src/portable/synopsys/dwc2/dwc2_stm32.h | 5 ++++- 2 files changed, 6 insertions(+), 3 deletions(-) (limited to 'src/portable') diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c index e5f630108..fc6e9e266 100644 --- a/hw/bsp/imxrt/family.c +++ b/hw/bsp/imxrt/family.c @@ -34,13 +34,13 @@ #include "clock_config.h" -#ifdef BOARD_TUD_RHPORT +#if defined(BOARD_TUD_RHPORT) && CFG_TUD_ENABLED #define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n) #else #define PORT_SUPPORT_DEVICE(_n) 0 #endif -#ifdef BOARD_TUH_RHPORT +#if defined(BOARD_TUH_RHPORT) && CFG_TUH_ENABLED #define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n) #else #define PORT_SUPPORT_HOST(_n) 0 diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index 709428f7f..b500ddc46 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -47,6 +47,7 @@ #include "stm32f4xx.h" #define EP_MAX_FS USB_OTG_FS_MAX_IN_ENDPOINTS #define EP_FIFO_SIZE_FS USB_OTG_FS_TOTAL_FIFO_SIZE + #define EP_MAX_HS USB_OTG_HS_MAX_IN_ENDPOINTS #define EP_FIFO_SIZE_HS USB_OTG_HS_TOTAL_FIFO_SIZE @@ -54,6 +55,7 @@ #include "stm32h7xx.h" #define EP_MAX_FS 9 #define EP_FIFO_SIZE_FS 4096 + #define EP_MAX_HS 9 #define EP_FIFO_SIZE_HS 4096 @@ -64,6 +66,7 @@ #include "stm32f7xx.h" #define EP_MAX_FS 6 #define EP_FIFO_SIZE_FS 1280 + #define EP_MAX_HS 9 #define EP_FIFO_SIZE_HS 4096 @@ -77,7 +80,7 @@ #endif // OTG HS always has higher number of endpoints than FS -#ifdef EP_MAX_HS +#ifdef USB_OTG_HS_PERIPH_BASE #define DWC2_EP_MAX EP_MAX_HS #else #define DWC2_EP_MAX EP_MAX_FS -- cgit v1.3.1 From 8cbc34de11ccaaf0831cda14ad703d8d962ae725 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 8 Jun 2022 01:17:01 +0700 Subject: add tuh_configure() for port/dynamic host behavior config --- hw/bsp/rp2040/family.c | 16 +++++++++-- src/device/usbd.c | 2 +- src/host/hcd.h | 5 +++- src/host/usbh.c | 39 ++++++++++++++++---------- src/host/usbh.h | 16 +++++++++-- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 12 ++++++-- 6 files changed, 67 insertions(+), 23 deletions(-) (limited to 'src/portable') diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c index 8de1c1aab..68c9e2d52 100644 --- a/hw/bsp/rp2040/family.c +++ b/hw/bsp/rp2040/family.c @@ -35,6 +35,13 @@ #include "bsp/board.h" #include "board.h" +#if CFG_TUH_RPI_PIO_USB || CFG_TUD_RPI_PIO_USB +#include "pio_usb.h" +#endif + +// PIO_USB_DP_PIN_DEFAULT is 0, which conflict with UART, change to 2 +#define PICO_PIO_USB_PIN_DP 2 + #ifdef BUTTON_BOOTSEL // This example blinks the Picoboard LED when the BOOTSEL button is pressed. // @@ -130,6 +137,12 @@ void board_init(void) #if CFG_TUH_RPI_PIO_USB || CFG_TUD_RPI_PIO_USB // Set the system clock to a multiple of 120mhz for bitbanging USB with pico-usb set_sys_clock_khz(120000, true); + + // rp2040 use pico-pio-usb for host tuh_configure() can be used to passed pio configuration to the host stack + // Note: tuh_configure() must be called before tuh_init() + pio_usb_configuration_t pio_cfg = PIO_USB_DEFAULT_CONFIG; + pio_cfg.pin_dp = PICO_PIO_USB_PIN_DP; + tuh_configure(BOARD_TUH_RHPORT, TUH_CFGID_RPI_PIO_USB_CONFIGURATION, &pio_cfg); #endif #if defined(UART_DEV) && defined(LIB_PICO_STDIO_UART) @@ -142,9 +155,8 @@ void board_init(void) stdio_rtt_init(); #endif - // todo probably set up device mode? #if CFG_TUD_ENABLED - + // TODO probably set up device mode? #endif #if CFG_TUH_ENABLED diff --git a/src/device/usbd.c b/src/device/usbd.c index 55e478a4e..697477584 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -392,7 +392,7 @@ bool tud_init (uint8_t rhport) // skip if already initialized if ( tud_inited() ) return true; - TU_LOG2("USBD init\r\n"); + TU_LOG2("USBD init rhport %u\r\n", rhport); TU_LOG2_INT(sizeof(usbd_device_t)); tu_varclr(&_usbd_dev); diff --git a/src/host/hcd.h b/src/host/hcd.h index 036394c72..2bc85034f 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -48,7 +48,7 @@ // #endif #endif - //--------------------------------------------------------------------+ +//--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ typedef enum @@ -106,6 +106,9 @@ typedef struct // Controller API //--------------------------------------------------------------------+ +// optional hcd configuration, called by tuh_config() +bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) TU_ATTR_WEAK; + // Initialize controller to host mode bool hcd_init(uint8_t rhport); diff --git a/src/host/usbh.c b/src/host/usbh.c index e0e41a8d1..ab2d8770a 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -274,9 +274,32 @@ static void process_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t h static bool usbh_edpt_control_open(uint8_t dev_addr, uint8_t max_packet_size); static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes); +#if CFG_TUSB_OS == OPT_OS_NONE +// TODO rework time-related function later +void osal_task_delay(uint32_t msec) +{ + (void) msec; + + const uint32_t start = hcd_frame_number(TUH_OPT_RHPORT); + while ( ( hcd_frame_number(TUH_OPT_RHPORT) - start ) < msec ) {} +} +#endif + //--------------------------------------------------------------------+ // PUBLIC API (Parameter Verification is required) //--------------------------------------------------------------------+ + +bool tuh_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) +{ + if (hcd_configure) + { + return hcd_configure(rhport, cfg_id, cfg_param); + }else + { + return false; + } +} + bool tuh_mounted(uint8_t dev_addr) { usbh_device_t* dev = get_device(dev_addr); @@ -303,20 +326,6 @@ tusb_speed_t tuh_speed_get (uint8_t dev_addr) return (tusb_speed_t) (dev ? get_device(dev_addr)->speed : _dev0.speed); } -#if CFG_TUSB_OS == OPT_OS_NONE -void osal_task_delay(uint32_t msec) -{ - (void) msec; - - const uint32_t start = hcd_frame_number(TUH_OPT_RHPORT); - while ( ( hcd_frame_number(TUH_OPT_RHPORT) - start ) < msec ) {} -} -#endif - -//--------------------------------------------------------------------+ -// CLASS-USBD API (don't require to verify parameters) -//--------------------------------------------------------------------+ - static void clear_device(usbh_device_t* dev) { tu_memclr(dev, sizeof(usbh_device_t)); @@ -334,7 +343,7 @@ bool tuh_init(uint8_t rhport) // skip if already initialized if (_usbh_initialized) return _usbh_initialized; - TU_LOG2("USBH init\r\n"); + TU_LOG2("USBH init rhport %u\r\n", rhport); TU_LOG2_INT(sizeof(usbh_device_t)); TU_LOG2_INT(sizeof(hcd_event_t)); TU_LOG2_INT(sizeof(_ctrl_xfer)); diff --git a/src/host/usbh.h b/src/host/usbh.h index c6d36fb7f..4c65da206 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -46,8 +46,8 @@ typedef void (*tuh_xfer_cb_t)(tuh_xfer_t* xfer); // Note1: layout and order of this will be changed in near future // it is advised to initialize it using member name -// Note2: not all field is available/meaningful in callback, some info is not saved by -// usbh to save SRAM +// Note2: not all field is available/meaningful in callback, +// some info is not saved by usbh to save SRAM struct tuh_xfer_s { uint8_t daddr; @@ -69,6 +69,12 @@ struct tuh_xfer_s // uint32_t timeout_ms; // place holder, not supported yet }; +// ConfigID for tuh_config() +enum +{ + TUH_CFGID_RPI_PIO_USB_CONFIGURATION = OPT_MCU_RP2040 // cfg_param: pio_usb_configuration_t +}; + //--------------------------------------------------------------------+ // APPLICATION CALLBACK //--------------------------------------------------------------------+ @@ -85,6 +91,12 @@ TU_ATTR_WEAK void tuh_umount_cb(uint8_t daddr); // APPLICATION API //--------------------------------------------------------------------+ +// Configure host stack behavior with dynamic or port-specific parameters. +// Should be called before tuh_init() +// - cfg_id : configure ID (TBD) +// - cfg_param: configure data, structure depends on the ID +bool tuh_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param); + // Init host stack bool tuh_init(uint8_t rhport); diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index 1b2d29331..58b153ac3 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -43,17 +43,25 @@ #define RHPORT_OFFSET 1 #define RHPORT_PIO(_x) ((_x)-RHPORT_OFFSET) -static pio_usb_configuration_t pio_host_config = PIO_USB_DEFAULT_CONFIG; +static pio_usb_configuration_t pio_host_cfg = PIO_USB_DEFAULT_CONFIG; //--------------------------------------------------------------------+ // HCD API //--------------------------------------------------------------------+ +bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) +{ + (void) rhport; + TU_VERIFY(cfg_id == TUH_CFGID_RPI_PIO_USB_CONFIGURATION); + memcpy(&pio_host_cfg, cfg_param, sizeof(pio_usb_configuration_t)); + return true; +} + bool hcd_init(uint8_t rhport) { (void) rhport; // To run USB SOF interrupt in core1, call this init in core1 - pio_usb_host_init(&pio_host_config); + pio_usb_host_init(&pio_host_cfg); return true; } -- cgit v1.3.1 From dd035b0eb2ed6ea7fee892d2a832e09f7c5c633c Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 8 Jun 2022 16:08:27 +0700 Subject: make all hcd/dcd function used in isr into ram with __no_inline_not_in_flash_func() for faster irq handling result is 1KB of code moved from rom -> ram --- src/common/tusb_types.h | 14 +++++++------- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 12 ++++++------ src/portable/raspberrypi/rp2040/hcd_rp2040.c | 18 ++++++++++++------ src/portable/raspberrypi/rp2040/rp2040_usb.c | 16 ++++++++-------- src/portable/raspberrypi/rp2040/rp2040_usb.h | 12 ++++++++---- 5 files changed, 41 insertions(+), 31 deletions(-) (limited to 'src/portable') diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index e2fa17532..1f2a38d4c 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -492,23 +492,23 @@ TU_ATTR_BIT_FIELD_ORDER_END //--------------------------------------------------------------------+ // Get direction from Endpoint address -static inline tusb_dir_t tu_edpt_dir(uint8_t addr) +TU_ATTR_ALWAYS_INLINE static inline tusb_dir_t tu_edpt_dir(uint8_t addr) { return (addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT; } // Get Endpoint number from address -static inline uint8_t tu_edpt_number(uint8_t addr) +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_number(uint8_t addr) { return (uint8_t)(addr & (~TUSB_DIR_IN_MASK)); } -static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) { return (uint8_t)(num | (dir ? TUSB_DIR_IN_MASK : 0)); } -static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) { return tu_le16toh(desc_ep->wMaxPacketSize) & TU_GENMASK(10, 0); } @@ -516,18 +516,18 @@ static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) //--------------------------------------------------------------------+ // Descriptor helper //--------------------------------------------------------------------+ -static inline uint8_t const * tu_desc_next(void const* desc) +TU_ATTR_ALWAYS_INLINE static inline uint8_t const * tu_desc_next(void const* desc) { uint8_t const* desc8 = (uint8_t const*) desc; return desc8 + desc8[DESC_OFFSET_LEN]; } -static inline uint8_t tu_desc_type(void const* desc) +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_type(void const* desc) { return ((uint8_t const*) desc)[DESC_OFFSET_TYPE]; } -static inline uint8_t tu_desc_len(void const* desc) +TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_len(void const* desc) { return ((uint8_t const*) desc)[DESC_OFFSET_LEN]; } diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index 48793b0d0..3fefc972d 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -55,7 +55,7 @@ static uint8_t *next_buffer_ptr; // USB_MAX_ENDPOINTS Endpoints, direction TUSB_DIR_OUT for out and TUSB_DIR_IN for in. static struct hw_endpoint hw_endpoints[USB_MAX_ENDPOINTS][2]; -static inline struct hw_endpoint *hw_endpoint_get_by_num(uint8_t num, tusb_dir_t dir) +TU_ATTR_ALWAYS_INLINE static inline struct hw_endpoint *hw_endpoint_get_by_num(uint8_t num, tusb_dir_t dir) { return &hw_endpoints[num][dir]; } @@ -185,7 +185,7 @@ static void hw_endpoint_xfer(uint8_t ep_addr, uint8_t *buffer, uint16_t total_by hw_endpoint_xfer_start(ep, buffer, total_bytes); } -static void hw_handle_buff_status(void) +static void __no_inline_not_in_flash_func(hw_handle_buff_status)(void) { uint32_t remaining_buffers = usb_hw->buf_status; pico_trace("buf_status = 0x%08x\n", remaining_buffers); @@ -214,7 +214,7 @@ static void hw_handle_buff_status(void) } } -static void reset_ep0_pid(void) +TU_ATTR_ALWAYS_INLINE static inline void reset_ep0_pid(void) { // If we have finished this transfer on EP0 set pid back to 1 for next // setup transfer. Also clear a stall in case @@ -226,7 +226,7 @@ static void reset_ep0_pid(void) } } -static void reset_non_control_endpoints(void) +static void __no_inline_not_in_flash_func(reset_non_control_endpoints)(void) { // Disable all non-control for ( uint8_t i = 0; i < USB_MAX_ENDPOINTS-1; i++ ) @@ -242,7 +242,7 @@ static void reset_non_control_endpoints(void) next_buffer_ptr = &usb_dpram->epx_data[0]; } -static void dcd_rp2040_irq(void) +static void __no_inline_not_in_flash_func(dcd_rp2040_irq)(void) { uint32_t const status = usb_hw->ints; uint32_t handled = 0; @@ -524,7 +524,7 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) hw_endpoint_close(ep_addr); } -void dcd_int_handler(uint8_t rhport) +void __no_inline_not_in_flash_func(dcd_int_handler)(uint8_t rhport) { (void) rhport; dcd_rp2040_irq(); diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index 54c27ffe3..063a8acd0 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -79,7 +79,7 @@ static struct hw_endpoint *get_dev_ep(uint8_t dev_addr, uint8_t ep_addr) return NULL; } -static inline uint8_t dev_speed(void) +TU_ATTR_ALWAYS_INLINE static inline uint8_t dev_speed(void) { return (usb_hw->sie_status & USB_SIE_STATUS_SPEED_BITS) >> USB_SIE_STATUS_SPEED_LSB; } @@ -91,7 +91,7 @@ static bool need_pre(uint8_t dev_addr) return hcd_port_speed_get(0) != tuh_speed_get(dev_addr); } -static void hw_xfer_complete(struct hw_endpoint *ep, xfer_result_t xfer_result) +static void __no_inline_not_in_flash_func(hw_xfer_complete)(struct hw_endpoint *ep, xfer_result_t xfer_result) { // Mark transfer as done before we tell the tinyusb stack uint8_t dev_addr = ep->dev_addr; @@ -101,7 +101,7 @@ static void hw_xfer_complete(struct hw_endpoint *ep, xfer_result_t xfer_result) hcd_event_xfer_complete(dev_addr, ep_addr, xferred_len, xfer_result, true); } -static void _handle_buff_status_bit(uint bit, struct hw_endpoint *ep) +static void __no_inline_not_in_flash_func(_handle_buff_status_bit)(uint bit, struct hw_endpoint *ep) { usb_hw_clear->buf_status = bit; bool done = hw_endpoint_xfer_continue(ep); @@ -111,7 +111,7 @@ static void _handle_buff_status_bit(uint bit, struct hw_endpoint *ep) } } -static void hw_handle_buff_status(void) +static void __no_inline_not_in_flash_func(hw_handle_buff_status)(void) { uint32_t remaining_buffers = usb_hw->buf_status; pico_trace("buf_status 0x%08x\n", remaining_buffers); @@ -159,7 +159,7 @@ static void hw_handle_buff_status(void) } } -static void hw_trans_complete(void) +static void __no_inline_not_in_flash_func(hw_trans_complete)(void) { if (usb_hw->sie_ctrl & USB_SIE_CTRL_SEND_SETUP_BITS) { @@ -175,7 +175,7 @@ static void hw_trans_complete(void) } } -static void hcd_rp2040_irq(void) +static void __no_inline_not_in_flash_func(hcd_rp2040_irq)(void) { uint32_t status = usb_hw->ints; uint32_t handled = 0; @@ -240,6 +240,12 @@ static void hcd_rp2040_irq(void) } } +void __no_inline_not_in_flash_func(hcd_int_handler)(uint8_t rhport) +{ + (void) rhport; + hcd_rp2040_irq(); +} + static struct hw_endpoint *_next_free_interrupt_ep(void) { struct hw_endpoint *ep = NULL; diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index c93199fd0..ebcc76a4b 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -38,7 +38,7 @@ const char *ep_dir_string[] = { "in", }; -static inline void _hw_endpoint_lock_update(__unused struct hw_endpoint * ep, __unused int delta) { +TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_lock_update(__unused struct hw_endpoint * ep, __unused int delta) { // todo add critsec as necessary to prevent issues between worker and IRQ... // note that this is perhaps as simple as disabling IRQs because it would make // sense to have worker and IRQ on same core, however I think using critsec is about equivalent. @@ -69,7 +69,7 @@ void rp2040_usb_init(void) usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS; } -void hw_endpoint_reset_transfer(struct hw_endpoint *ep) +void __no_inline_not_in_flash_func(hw_endpoint_reset_transfer)(struct hw_endpoint *ep) { ep->active = false; ep->remaining_len = 0; @@ -77,7 +77,7 @@ void hw_endpoint_reset_transfer(struct hw_endpoint *ep) ep->user_buf = 0; } -void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask) { +void __no_inline_not_in_flash_func(_hw_endpoint_buffer_control_update32)(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask) { uint32_t value = 0; if (and_mask) { value = *ep->buffer_control & and_mask; @@ -108,7 +108,7 @@ void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_m } // prepare buffer, return buffer control -static uint32_t prepare_ep_buffer(struct hw_endpoint *ep, uint8_t buf_id) +static uint32_t __no_inline_not_in_flash_func(prepare_ep_buffer)(struct hw_endpoint *ep, uint8_t buf_id) { uint16_t const buflen = tu_min16(ep->remaining_len, ep->wMaxPacketSize); ep->remaining_len = (uint16_t)(ep->remaining_len - buflen); @@ -143,7 +143,7 @@ static uint32_t prepare_ep_buffer(struct hw_endpoint *ep, uint8_t buf_id) } // Prepare buffer control register value -static void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep) +static void __no_inline_not_in_flash_func(_hw_endpoint_start_next_buffer)(struct hw_endpoint *ep) { uint32_t ep_ctrl = *ep->endpoint_control; @@ -205,7 +205,7 @@ void hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t to } // sync endpoint buffer and return transferred bytes -static uint16_t sync_ep_buffer(struct hw_endpoint *ep, uint8_t buf_id) +static uint16_t __no_inline_not_in_flash_func(sync_ep_buffer)(struct hw_endpoint *ep, uint8_t buf_id) { uint32_t buf_ctrl = _hw_endpoint_buffer_control_get_value32(ep); if (buf_id) buf_ctrl = buf_ctrl >> 16; @@ -241,7 +241,7 @@ static uint16_t sync_ep_buffer(struct hw_endpoint *ep, uint8_t buf_id) return xferred_bytes; } -static void _hw_endpoint_xfer_sync (struct hw_endpoint *ep) +static void __no_inline_not_in_flash_func(_hw_endpoint_xfer_sync) (struct hw_endpoint *ep) { // Update hw endpoint struct with info from hardware // after a buff status interrupt @@ -292,7 +292,7 @@ static void _hw_endpoint_xfer_sync (struct hw_endpoint *ep) } // Returns true if transfer is complete -bool hw_endpoint_xfer_continue(struct hw_endpoint *ep) +bool __no_inline_not_in_flash_func(hw_endpoint_xfer_continue)(struct hw_endpoint *ep) { _hw_endpoint_lock_update(ep, 1); // Part way through a transfer diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.h b/src/portable/raspberrypi/rp2040/rp2040_usb.h index da1933ddd..4442e22dc 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.h +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.h @@ -72,16 +72,20 @@ bool hw_endpoint_xfer_continue(struct hw_endpoint *ep); void hw_endpoint_reset_transfer(struct hw_endpoint *ep); void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask); -static inline uint32_t _hw_endpoint_buffer_control_get_value32(struct hw_endpoint *ep) { + +TU_ATTR_ALWAYS_INLINE static inline uint32_t _hw_endpoint_buffer_control_get_value32(struct hw_endpoint *ep) { return *ep->buffer_control; } -static inline void _hw_endpoint_buffer_control_set_value32(struct hw_endpoint *ep, uint32_t value) { + +TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_set_value32(struct hw_endpoint *ep, uint32_t value) { return _hw_endpoint_buffer_control_update32(ep, 0, value); } -static inline void _hw_endpoint_buffer_control_set_mask32(struct hw_endpoint *ep, uint32_t value) { + +TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_set_mask32(struct hw_endpoint *ep, uint32_t value) { return _hw_endpoint_buffer_control_update32(ep, ~value, value); } -static inline void _hw_endpoint_buffer_control_clear_mask32(struct hw_endpoint *ep, uint32_t value) { + +TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_clear_mask32(struct hw_endpoint *ep, uint32_t value) { return _hw_endpoint_buffer_control_update32(ep, ~value, 0); } -- cgit v1.3.1 From 19d054f7892beda36c7f6fe5f07d84a13db7df16 Mon Sep 17 00:00:00 2001 From: Liam Fraser Date: Thu, 13 Jan 2022 11:17:08 +0000 Subject: hcd_rp2040 improvements: - Stall now has priority over other interrupt responses - Delete eunused hcd_edpt_busy - Assert !ep->active when trying to start a new xfer - Assert !ep->active when handling buff_status bits - Set ep->xferred_len to 8 once a setup packet is finished so the data structure is accurate --- src/portable/raspberrypi/rp2040/hcd_rp2040.c | 46 +++++++++++++--------------- 1 file changed, 22 insertions(+), 24 deletions(-) (limited to 'src/portable') diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index 063a8acd0..dddb9cd90 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -104,6 +104,8 @@ static void __no_inline_not_in_flash_func(hw_xfer_complete)(struct hw_endpoint * static void __no_inline_not_in_flash_func(_handle_buff_status_bit)(uint bit, struct hw_endpoint *ep) { usb_hw_clear->buf_status = bit; + // EP may have been stalled? + assert(ep->active); bool done = hw_endpoint_xfer_continue(ep); if (done) { @@ -166,6 +168,8 @@ static void __no_inline_not_in_flash_func(hw_trans_complete)(void) pico_trace("Sent setup packet\n"); struct hw_endpoint *ep = &epx; assert(ep->active); + // Set transferred length to 8 for a setup packet + ep->xferred_len = 8; hw_xfer_complete(ep, XFER_RESULT_SUCCESS); } else @@ -197,6 +201,18 @@ static void __no_inline_not_in_flash_func(hcd_rp2040_irq)(void) usb_hw_clear->sie_status = USB_SIE_STATUS_SPEED_BITS; } + if (status & USB_INTS_STALL_BITS) + { + // We have rx'd a stall from the device + // NOTE THIS SHOULD HAVE PRIORITY OVER BUFF_STATUS + // AND TRANS_COMPLETE as the stall is an alternative response + // to one of those events + pico_trace("Stall REC\n"); + handled |= USB_INTS_STALL_BITS; + usb_hw_clear->sie_status = USB_SIE_STATUS_STALL_REC_BITS; + hw_xfer_complete(&epx, XFER_RESULT_STALLED); + } + if (status & USB_INTS_BUFF_STATUS_BITS) { handled |= USB_INTS_BUFF_STATUS_BITS; @@ -212,15 +228,6 @@ static void __no_inline_not_in_flash_func(hcd_rp2040_irq)(void) hw_trans_complete(); } - if (status & USB_INTS_STALL_BITS) - { - // We have rx'd a stall from the device - pico_trace("Stall REC\n"); - handled |= USB_INTS_STALL_BITS; - usb_hw_clear->sie_status = USB_SIE_STATUS_STALL_REC_BITS; - hw_xfer_complete(&epx, XFER_RESULT_STALLED); - } - if (status & USB_INTS_ERROR_RX_TIMEOUT_BITS) { handled |= USB_INTS_ERROR_RX_TIMEOUT_BITS; @@ -505,6 +512,9 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * struct hw_endpoint *ep = get_dev_ep(dev_addr, ep_addr); assert(ep); + // EP should be inactive + assert(!ep->active); + // Control endpoint can change direction 0x00 <-> 0x80 if ( ep_addr != ep->ep_addr ) { @@ -552,6 +562,9 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet // Configure EP0 struct with setup info for the trans complete struct hw_endpoint *ep = _hw_endpoint_allocate(0); + // EPX should be inactive + assert(!ep->active); + // EP0 out _hw_endpoint_init(ep, dev_addr, 0x00, ep->wMaxPacketSize, 0, 0); assert(ep->configured); @@ -571,21 +584,6 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet return true; } - -//bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) -//{ -// // EPX is shared, so multiple device addresses and endpoint addresses share that -// // so if any transfer is active on epx, we are busy. Interrupt endpoints have their own -// // EPX so ep->active will only be busy if there is a pending transfer on that interrupt endpoint -// // on that device -// pico_trace("hcd_edpt_busy dev addr %d ep_addr 0x%x\n", dev_addr, ep_addr); -// struct hw_endpoint *ep = get_dev_ep(dev_addr, ep_addr); -// assert(ep); -// bool busy = ep->active; -// pico_trace("busy == %d\n", busy); -// return busy; -//} - bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) { (void) dev_addr; -- cgit v1.3.1 From c5ba4af25babbf7fc6ee97d0f6ec06079e5f1b0f Mon Sep 17 00:00:00 2001 From: graham sanderson Date: Thu, 16 Jun 2022 11:03:53 -0500 Subject: rp2040: make moving 1K of code into RAM optional - and off by default --- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 8 ++++---- src/portable/raspberrypi/rp2040/hcd_rp2040.c | 12 ++++++------ src/portable/raspberrypi/rp2040/rp2040_usb.c | 14 +++++++------- src/portable/raspberrypi/rp2040/rp2040_usb.h | 9 +++++++++ 4 files changed, 26 insertions(+), 17 deletions(-) (limited to 'src/portable') diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index 3fefc972d..4c8084878 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -185,7 +185,7 @@ static void hw_endpoint_xfer(uint8_t ep_addr, uint8_t *buffer, uint16_t total_by hw_endpoint_xfer_start(ep, buffer, total_bytes); } -static void __no_inline_not_in_flash_func(hw_handle_buff_status)(void) +static void __tusb_irq_path_func(hw_handle_buff_status)(void) { uint32_t remaining_buffers = usb_hw->buf_status; pico_trace("buf_status = 0x%08x\n", remaining_buffers); @@ -226,7 +226,7 @@ TU_ATTR_ALWAYS_INLINE static inline void reset_ep0_pid(void) } } -static void __no_inline_not_in_flash_func(reset_non_control_endpoints)(void) +static void __tusb_irq_path_func(reset_non_control_endpoints)(void) { // Disable all non-control for ( uint8_t i = 0; i < USB_MAX_ENDPOINTS-1; i++ ) @@ -242,7 +242,7 @@ static void __no_inline_not_in_flash_func(reset_non_control_endpoints)(void) next_buffer_ptr = &usb_dpram->epx_data[0]; } -static void __no_inline_not_in_flash_func(dcd_rp2040_irq)(void) +static void __tusb_irq_path_func(dcd_rp2040_irq)(void) { uint32_t const status = usb_hw->ints; uint32_t handled = 0; @@ -524,7 +524,7 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) hw_endpoint_close(ep_addr); } -void __no_inline_not_in_flash_func(dcd_int_handler)(uint8_t rhport) +void __tusb_irq_path_func(dcd_int_handler)(uint8_t rhport) { (void) rhport; dcd_rp2040_irq(); diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index 063a8acd0..346326cd0 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -91,7 +91,7 @@ static bool need_pre(uint8_t dev_addr) return hcd_port_speed_get(0) != tuh_speed_get(dev_addr); } -static void __no_inline_not_in_flash_func(hw_xfer_complete)(struct hw_endpoint *ep, xfer_result_t xfer_result) +static void __tusb_irq_path_func(hw_xfer_complete)(struct hw_endpoint *ep, xfer_result_t xfer_result) { // Mark transfer as done before we tell the tinyusb stack uint8_t dev_addr = ep->dev_addr; @@ -101,7 +101,7 @@ static void __no_inline_not_in_flash_func(hw_xfer_complete)(struct hw_endpoint * hcd_event_xfer_complete(dev_addr, ep_addr, xferred_len, xfer_result, true); } -static void __no_inline_not_in_flash_func(_handle_buff_status_bit)(uint bit, struct hw_endpoint *ep) +static void __tusb_irq_path_func(_handle_buff_status_bit)(uint bit, struct hw_endpoint *ep) { usb_hw_clear->buf_status = bit; bool done = hw_endpoint_xfer_continue(ep); @@ -111,7 +111,7 @@ static void __no_inline_not_in_flash_func(_handle_buff_status_bit)(uint bit, str } } -static void __no_inline_not_in_flash_func(hw_handle_buff_status)(void) +static void __tusb_irq_path_func(hw_handle_buff_status)(void) { uint32_t remaining_buffers = usb_hw->buf_status; pico_trace("buf_status 0x%08x\n", remaining_buffers); @@ -159,7 +159,7 @@ static void __no_inline_not_in_flash_func(hw_handle_buff_status)(void) } } -static void __no_inline_not_in_flash_func(hw_trans_complete)(void) +static void __tusb_irq_path_func(hw_trans_complete)(void) { if (usb_hw->sie_ctrl & USB_SIE_CTRL_SEND_SETUP_BITS) { @@ -175,7 +175,7 @@ static void __no_inline_not_in_flash_func(hw_trans_complete)(void) } } -static void __no_inline_not_in_flash_func(hcd_rp2040_irq)(void) +static void __tusb_irq_path_func(hcd_rp2040_irq)(void) { uint32_t status = usb_hw->ints; uint32_t handled = 0; @@ -240,7 +240,7 @@ static void __no_inline_not_in_flash_func(hcd_rp2040_irq)(void) } } -void __no_inline_not_in_flash_func(hcd_int_handler)(uint8_t rhport) +void __tusb_irq_path_func(hcd_int_handler)(uint8_t rhport) { (void) rhport; hcd_rp2040_irq(); diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index ebcc76a4b..f93568f0c 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -69,7 +69,7 @@ void rp2040_usb_init(void) usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS; } -void __no_inline_not_in_flash_func(hw_endpoint_reset_transfer)(struct hw_endpoint *ep) +void __tusb_irq_path_func(hw_endpoint_reset_transfer)(struct hw_endpoint *ep) { ep->active = false; ep->remaining_len = 0; @@ -77,7 +77,7 @@ void __no_inline_not_in_flash_func(hw_endpoint_reset_transfer)(struct hw_endpoin ep->user_buf = 0; } -void __no_inline_not_in_flash_func(_hw_endpoint_buffer_control_update32)(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask) { +void __tusb_irq_path_func(_hw_endpoint_buffer_control_update32)(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask) { uint32_t value = 0; if (and_mask) { value = *ep->buffer_control & and_mask; @@ -108,7 +108,7 @@ void __no_inline_not_in_flash_func(_hw_endpoint_buffer_control_update32)(struct } // prepare buffer, return buffer control -static uint32_t __no_inline_not_in_flash_func(prepare_ep_buffer)(struct hw_endpoint *ep, uint8_t buf_id) +static uint32_t __tusb_irq_path_func(prepare_ep_buffer)(struct hw_endpoint *ep, uint8_t buf_id) { uint16_t const buflen = tu_min16(ep->remaining_len, ep->wMaxPacketSize); ep->remaining_len = (uint16_t)(ep->remaining_len - buflen); @@ -143,7 +143,7 @@ static uint32_t __no_inline_not_in_flash_func(prepare_ep_buffer)(struct hw_endpo } // Prepare buffer control register value -static void __no_inline_not_in_flash_func(_hw_endpoint_start_next_buffer)(struct hw_endpoint *ep) +static void __tusb_irq_path_func(_hw_endpoint_start_next_buffer)(struct hw_endpoint *ep) { uint32_t ep_ctrl = *ep->endpoint_control; @@ -205,7 +205,7 @@ void hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t to } // sync endpoint buffer and return transferred bytes -static uint16_t __no_inline_not_in_flash_func(sync_ep_buffer)(struct hw_endpoint *ep, uint8_t buf_id) +static uint16_t __tusb_irq_path_func(sync_ep_buffer)(struct hw_endpoint *ep, uint8_t buf_id) { uint32_t buf_ctrl = _hw_endpoint_buffer_control_get_value32(ep); if (buf_id) buf_ctrl = buf_ctrl >> 16; @@ -241,7 +241,7 @@ static uint16_t __no_inline_not_in_flash_func(sync_ep_buffer)(struct hw_endpoint return xferred_bytes; } -static void __no_inline_not_in_flash_func(_hw_endpoint_xfer_sync) (struct hw_endpoint *ep) +static void __tusb_irq_path_func(_hw_endpoint_xfer_sync) (struct hw_endpoint *ep) { // Update hw endpoint struct with info from hardware // after a buff status interrupt @@ -292,7 +292,7 @@ static void __no_inline_not_in_flash_func(_hw_endpoint_xfer_sync) (struct hw_end } // Returns true if transfer is complete -bool __no_inline_not_in_flash_func(hw_endpoint_xfer_continue)(struct hw_endpoint *ep) +bool __tusb_irq_path_func(hw_endpoint_xfer_continue)(struct hw_endpoint *ep) { _hw_endpoint_lock_update(ep, 1); // Part way through a transfer diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.h b/src/portable/raspberrypi/rp2040/rp2040_usb.h index 4442e22dc..c72dae64c 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.h +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.h @@ -16,6 +16,15 @@ #define TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX PICO_RP2040_USB_DEVICE_ENUMERATION_FIX #endif +#ifndef PICO_RP2040_USB_FAST_IRQ +#define PICO_RP2040_USB_FAST_IRQ 0 +#endif + +#if PICO_RP2040_USB_FAST_IRQ +#define __tusb_irq_path_func(x) __no_inline_not_in_flash_func(x) +#else +#define __tusb_irq_path_func(x) x +#endif #define pico_info(...) TU_LOG(2, __VA_ARGS__) #define pico_trace(...) TU_LOG(3, __VA_ARGS__) -- cgit v1.3.1 From 05fc2fa7a64c32aa748c8c0f1fe119f417fed074 Mon Sep 17 00:00:00 2001 From: maddyaby <32046405+maddyaby@users.noreply.github.com> Date: Thu, 16 Jun 2022 16:57:20 -0700 Subject: Stub out dcd_edpt_close for samd Not having this prevents the device from finishing the mounting process. Tested on a SAMD51 and didn't seem to need to actually do anything in the close function. --- src/portable/microchip/samd/dcd_samd.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/portable') diff --git a/src/portable/microchip/samd/dcd_samd.c b/src/portable/microchip/samd/dcd_samd.c index 5ae5a554b..20dbde0f4 100644 --- a/src/portable/microchip/samd/dcd_samd.c +++ b/src/portable/microchip/samd/dcd_samd.c @@ -250,6 +250,13 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) return true; } +void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) { + (void) rhport; + (void) ep_addr; + + // TODO: implement if necessary? +} + void dcd_edpt_close_all (uint8_t rhport) { (void) rhport; -- cgit v1.3.1 From 1001d2da401bc9abb98207d8f4be239ac62d5c33 Mon Sep 17 00:00:00 2001 From: mingpepe Date: Fri, 17 Jun 2022 16:50:24 +0800 Subject: Fix typo for log format --- src/portable/raspberrypi/rp2040/rp2040_usb.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/portable') diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index f93568f0c..49be90167 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -174,7 +174,7 @@ static void __tusb_irq_path_func(_hw_endpoint_start_next_buffer)(struct hw_endpo *ep->endpoint_control = ep_ctrl; - TU_LOG(3, " Prepare BufCtrl: [0] = 0x%04u [1] = 0x%04x\r\n", tu_u32_low16(buf_ctrl), tu_u32_high16(buf_ctrl)); + TU_LOG(3, " Prepare BufCtrl: [0] = 0x%04x [1] = 0x%04x\r\n", tu_u32_low16(buf_ctrl), tu_u32_high16(buf_ctrl)); // Finally, write to buffer_control which will trigger the transfer // the next time the controller polls this dpram address @@ -247,7 +247,7 @@ static void __tusb_irq_path_func(_hw_endpoint_xfer_sync) (struct hw_endpoint *ep // after a buff status interrupt uint32_t __unused buf_ctrl = _hw_endpoint_buffer_control_get_value32(ep); - TU_LOG(3, " Sync BufCtrl: [0] = 0x%04u [1] = 0x%04x\r\n", tu_u32_low16(buf_ctrl), tu_u32_high16(buf_ctrl)); + TU_LOG(3, " Sync BufCtrl: [0] = 0x%04x [1] = 0x%04x\r\n", tu_u32_low16(buf_ctrl), tu_u32_high16(buf_ctrl)); // always sync buffer 0 uint16_t buf0_bytes = sync_ep_buffer(ep, 0); @@ -285,7 +285,7 @@ static void __tusb_irq_path_func(_hw_endpoint_xfer_sync) (struct hw_endpoint *ep usb_hw->abort &= ~TU_BIT(ep_id); TU_LOG(3, "----SHORT PACKET buffer0 on EP %02X:\r\n", ep->ep_addr); - TU_LOG(3, " BufCtrl: [0] = 0x%04u [1] = 0x%04x\r\n", tu_u32_low16(buf_ctrl), tu_u32_high16(buf_ctrl)); + TU_LOG(3, " BufCtrl: [0] = 0x%04x [1] = 0x%04x\r\n", tu_u32_low16(buf_ctrl), tu_u32_high16(buf_ctrl)); #endif } } -- cgit v1.3.1 From c45118dacf176b232e22c49ed68acf8c95a1dfc6 Mon Sep 17 00:00:00 2001 From: graham sanderson Date: Fri, 17 Jun 2022 09:13:40 -0500 Subject: rp2040: use shared IRQ handlers, so user can also hook the USB IRQ --- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 2 +- src/portable/raspberrypi/rp2040/hcd_rp2040.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/portable') diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index 4c8084878..c6018c515 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -363,7 +363,7 @@ void dcd_init (uint8_t rhport) usb_hw->pwr = USB_USB_PWR_VBUS_DETECT_BITS | USB_USB_PWR_VBUS_DETECT_OVERRIDE_EN_BITS; #endif - irq_set_exclusive_handler(USBCTRL_IRQ, dcd_rp2040_irq); + irq_add_shared_handler(USBCTRL_IRQ, dcd_rp2040_irq, PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY); // Init control endpoints tu_memclr(hw_endpoints[0], 2*sizeof(hw_endpoint_t)); diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index 346326cd0..67d2de254 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -369,7 +369,7 @@ bool hcd_init(uint8_t rhport) // Force VBUS detect to always present, for now we assume vbus is always provided (without using VBUS En) usb_hw->pwr = USB_USB_PWR_VBUS_DETECT_BITS | USB_USB_PWR_VBUS_DETECT_OVERRIDE_EN_BITS; - irq_set_exclusive_handler(USBCTRL_IRQ, hcd_rp2040_irq); + irq_add_shared_handler(USBCTRL_IRQ, hcd_rp2040_irq, PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY); // clear epx and interrupt eps memset(&ep_pool, 0, sizeof(ep_pool)); -- cgit v1.3.1 From 2cc2a90215f94692f18e0a402470c58366bfca47 Mon Sep 17 00:00:00 2001 From: maddyaby <32046405+maddyaby@users.noreply.github.com> Date: Fri, 17 Jun 2022 16:07:32 -0700 Subject: Allow more endpoint packet sizes for SAMD Tested on SAMD51 - we can allow more packet sizes by checking that the set size value is greater than the requested packet size instead of exactly the same. --- src/portable/microchip/samd/dcd_samd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/portable') diff --git a/src/portable/microchip/samd/dcd_samd.c b/src/portable/microchip/samd/dcd_samd.c index 5ae5a554b..2f40c8247 100644 --- a/src/portable/microchip/samd/dcd_samd.c +++ b/src/portable/microchip/samd/dcd_samd.c @@ -222,14 +222,14 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) UsbDeviceDescBank* bank = &sram_registers[epnum][dir]; uint32_t size_value = 0; while (size_value < 7) { - if (1 << (size_value + 3) == tu_edpt_packet_size(desc_edpt)) { + if (1 << (size_value + 3) >= tu_edpt_packet_size(desc_edpt)) { break; } size_value++; } // unsupported endpoint size - if ( size_value == 7 && tu_edpt_packet_size(desc_edpt) != 1023 ) return false; + if ( size_value == 7 && tu_edpt_packet_size(desc_edpt) > 1023 ) return false; bank->PCKSIZE.bit.SIZE = size_value; -- cgit v1.3.1 From 4f6e770eda9f8c605b238f35def1edaff93a8fb8 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 24 Jun 2022 19:45:49 +0700 Subject: add more warning option, also fix -Wconversion with rp2040 -Wuninitialized, -Wunused, -Wredundant-decls --- examples/device/cdc_msc/src/usb_descriptors.c | 2 +- examples/make.mk | 7 ++++- hw/bsp/broadcom_32bit/family.mk | 2 +- hw/bsp/broadcom_64bit/family.mk | 2 +- hw/bsp/imxrt/family.mk | 2 +- hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c | 1 - hw/bsp/nrf/family.mk | 3 ++ hw/bsp/rx/family.mk | 3 ++ hw/bsp/samd21/family.mk | 2 +- hw/bsp/saml2x/family.mk | 2 +- hw/mcu/raspberry_pi/Pico-PIO-USB | 2 +- src/class/cdc/cdc_device.c | 6 ++-- src/class/msc/msc_device.c | 33 +++++++++++----------- src/common/tusb_fifo.c | 12 ++++---- src/device/usbd.c | 16 +++++++---- src/device/usbd_control.c | 2 +- src/portable/synopsys/dwc2/dwc2_stm32.h | 3 +- 17 files changed, 58 insertions(+), 42 deletions(-) (limited to 'src/portable') diff --git a/examples/device/cdc_msc/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c index 09894cf1b..6b59ed50f 100644 --- a/examples/device/cdc_msc/src/usb_descriptors.c +++ b/examples/device/cdc_msc/src/usb_descriptors.c @@ -282,7 +282,7 @@ uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid) } // first byte is length (including header), second byte is string type - _desc_str[0] = (TUSB_DESC_STRING << 8 ) | (2*chr_count + 2); + _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2)); return _desc_str; } diff --git a/examples/make.mk b/examples/make.mk index bed46d02b..26065c027 100644 --- a/examples/make.mk +++ b/examples/make.mk @@ -108,8 +108,13 @@ CFLAGS += \ -Wcast-align \ -Wcast-function-type \ -Wcast-qual \ - -Wnull-dereference + -Wnull-dereference \ + -Wuninitialized \ + -Wunused \ + -Wredundant-decls +# -Wconversion \ + # Debugging/Optimization ifeq ($(DEBUG), 1) CFLAGS += -Og diff --git a/hw/bsp/broadcom_32bit/family.mk b/hw/bsp/broadcom_32bit/family.mk index 98744c5d0..cf68e21ee 100644 --- a/hw/bsp/broadcom_32bit/family.mk +++ b/hw/bsp/broadcom_32bit/family.mk @@ -16,7 +16,7 @@ CFLAGS += \ CROSS_COMPILE = arm-none-eabi- # mcu driver cause following warnings -CFLAGS += -Wno-error=cast-qual +CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls SRC_C += \ src/portable/synopsys/dwc2/dcd_dwc2.c \ diff --git a/hw/bsp/broadcom_64bit/family.mk b/hw/bsp/broadcom_64bit/family.mk index 723926734..97af6d64a 100644 --- a/hw/bsp/broadcom_64bit/family.mk +++ b/hw/bsp/broadcom_64bit/family.mk @@ -15,7 +15,7 @@ CFLAGS += \ CROSS_COMPILE = aarch64-none-elf- # mcu driver cause following warnings -CFLAGS += -Wno-error=cast-qual +CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls SRC_C += \ src/portable/synopsys/dwc2/dcd_dwc2.c \ diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk index c81e67eb6..0a55b740b 100644 --- a/hw/bsp/imxrt/family.mk +++ b/hw/bsp/imxrt/family.mk @@ -23,7 +23,7 @@ CFLAGS += -DBOARD_TUH_RHPORT=$(BOARD_TUH_RHPORT) endif # mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=implicit-fallthrough= +CFLAGS += -Wno-error=unused-parameter -Wno-error=implicit-fallthrough -Wno-error=redundant-decls MCU_DIR = $(SDK_DIR)/devices/$(MCU_VARIANT) diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c index cff7bc15e..9793ba241 100644 --- a/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c +++ b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c @@ -52,7 +52,6 @@ void USB_DeviceClockInit (void) //--------------------------------------------------------------------+ // LED -void board_led_write (bool state); extern u32 SystemCoreClock; const int baudrate = 115200; diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk index d8283a9e6..609e2da0b 100644 --- a/hw/bsp/nrf/family.mk +++ b/hw/bsp/nrf/family.mk @@ -16,6 +16,9 @@ CFLAGS += \ # suppress warning caused by vendor mcu driver CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual +# warning caused by dcd_nrf5x.c due to include of usbd.h and re-declare of dcd_int_handler() +CFLAGS += -Wno-error=redundant-decls + # All source paths should be relative to the top level. LD_FILE ?= hw/bsp/nrf/boards/$(BOARD)/nrf52840_s140_v6.ld diff --git a/hw/bsp/rx/family.mk b/hw/bsp/rx/family.mk index aba05812d..f4f8ae088 100644 --- a/hw/bsp/rx/family.mk +++ b/hw/bsp/rx/family.mk @@ -13,6 +13,9 @@ CFLAGS += \ -mlittle-endian-data \ -DSSIZE_MAX=__INT_MAX__ +# suppress warning caused by vendor mcu driver +CFLAGS += -Wno-error=redundant-decls + SRC_C += \ src/portable/renesas/usba/dcd_usba.c \ src/portable/renesas/usba/hcd_usba.c \ diff --git a/hw/bsp/samd21/family.mk b/hw/bsp/samd21/family.mk index 208f23789..95421e753 100644 --- a/hw/bsp/samd21/family.mk +++ b/hw/bsp/samd21/family.mk @@ -13,7 +13,7 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_SAMD21 # suppress warning caused by vendor mcu driver -CFLAGS += -Wno-error=cast-qual +CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls SRC_C += \ src/portable/microchip/samd/dcd_samd.c \ diff --git a/hw/bsp/saml2x/family.mk b/hw/bsp/saml2x/family.mk index bb1faeb7f..afb0afc03 100644 --- a/hw/bsp/saml2x/family.mk +++ b/hw/bsp/saml2x/family.mk @@ -14,7 +14,7 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_SAML22 # suppress warning caused by vendor mcu driver -CFLAGS += -Wno-error=cast-qual +CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls SRC_C += \ src/portable/microchip/samd/dcd_samd.c \ diff --git a/hw/mcu/raspberry_pi/Pico-PIO-USB b/hw/mcu/raspberry_pi/Pico-PIO-USB index 2a9fefd6c..92bd3b4c3 160000 --- a/hw/mcu/raspberry_pi/Pico-PIO-USB +++ b/hw/mcu/raspberry_pi/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit 2a9fefd6ccf42e5d8570ae83fdc54c9c875ebdd1 +Subproject commit 92bd3b4c3ad2fce36166e4a357749b6d4fe9013b diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c index 7aa7a4860..fab6f0035 100644 --- a/src/class/cdc/cdc_device.c +++ b/src/class/cdc/cdc_device.c @@ -145,7 +145,7 @@ uint32_t tud_cdc_n_available(uint8_t itf) uint32_t tud_cdc_n_read(uint8_t itf, void* buffer, uint32_t bufsize) { cdcd_interface_t* p_cdc = &_cdcd_itf[itf]; - uint32_t num_read = tu_fifo_read_n(&p_cdc->rx_ff, buffer, bufsize); + uint32_t num_read = tu_fifo_read_n(&p_cdc->rx_ff, buffer, (uint16_t) bufsize); _prep_out_transaction(p_cdc); return num_read; } @@ -168,7 +168,7 @@ void tud_cdc_n_read_flush (uint8_t itf) uint32_t tud_cdc_n_write(uint8_t itf, void const* buffer, uint32_t bufsize) { cdcd_interface_t* p_cdc = &_cdcd_itf[itf]; - uint16_t ret = tu_fifo_write_n(&p_cdc->tx_ff, buffer, bufsize); + uint16_t ret = tu_fifo_write_n(&p_cdc->tx_ff, buffer, (uint16_t) bufsize); // flush if queue more than packet size if ( tu_fifo_count(&p_cdc->tx_ff) >= BULK_PACKET_SIZE ) @@ -435,7 +435,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_ // Received new data if ( ep_addr == p_cdc->ep_out ) { - tu_fifo_write_n(&p_cdc->rx_ff, &p_cdc->epout_buf, xferred_bytes); + tu_fifo_write_n(&p_cdc->rx_ff, &p_cdc->epout_buf, (uint16_t) xferred_bytes); // Check for wanted char and invoke callback if needed if ( tud_cdc_rx_wanted_cb && (((signed char) p_cdc->wanted_char) != -1) ) diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index 3facb76d6..33dd4ac37 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -463,7 +463,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t { // Didn't check for case 9 (Ho > Dn), which requires examining scsi command first // but it is OK to just receive data then responded with failed status - TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_out, _mscd_buf, p_msc->total_len) ); + TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_out, _mscd_buf, (uint16_t) p_msc->total_len) ); } }else { @@ -473,7 +473,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t // Invoke user callback if not built-in if ( (resplen < 0) && (p_msc->sense_key == 0) ) { - resplen = tud_msc_scsi_cb(p_cbw->lun, p_cbw->command, _mscd_buf, p_msc->total_len); + resplen = tud_msc_scsi_cb(p_cbw->lun, p_cbw->command, _mscd_buf, (uint16_t) p_msc->total_len); } if ( resplen < 0 ) @@ -506,7 +506,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t { // cannot return more than host expect p_msc->total_len = tu_min32((uint32_t) resplen, p_cbw->total_bytes); - TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_in, _mscd_buf, p_msc->total_len) ); + TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_in, _mscd_buf, (uint16_t) p_msc->total_len) ); } } } @@ -541,7 +541,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t // OUT transfer, invoke callback if needed if ( !is_data_in(p_cbw->dir) ) { - int32_t cb_result = tud_msc_scsi_cb(p_cbw->lun, p_cbw->command, _mscd_buf, p_msc->total_len); + int32_t cb_result = tud_msc_scsi_cb(p_cbw->lun, p_cbw->command, _mscd_buf, (uint16_t) p_msc->total_len); if ( cb_result < 0 ) { @@ -707,7 +707,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ read_capa10.block_size = tu_htonl(block_size); resplen = sizeof(read_capa10); - memcpy(buffer, &read_capa10, resplen); + memcpy(buffer, &read_capa10, (size_t) resplen); } } break; @@ -741,7 +741,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ read_fmt_capa.block_size_u16 = tu_htons(block_size); resplen = sizeof(read_fmt_capa); - memcpy(buffer, &read_fmt_capa, resplen); + memcpy(buffer, &read_fmt_capa, (size_t) resplen); } } break; @@ -764,7 +764,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ tud_msc_inquiry_cb(lun, inquiry_rsp.vendor_id, inquiry_rsp.product_id, inquiry_rsp.product_rev); resplen = sizeof(inquiry_rsp); - memcpy(buffer, &inquiry_rsp, resplen); + memcpy(buffer, &inquiry_rsp, (size_t) resplen); } break; @@ -788,7 +788,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ mode_resp.write_protected = !writable; resplen = sizeof(mode_resp); - memcpy(buffer, &mode_resp, resplen); + memcpy(buffer, &mode_resp, (size_t) resplen); } break; @@ -801,17 +801,17 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_ }; sense_rsp.add_sense_len = sizeof(scsi_sense_fixed_resp_t) - 8; - sense_rsp.sense_key = p_msc->sense_key; + sense_rsp.sense_key = (uint8_t) (p_msc->sense_key & 0x0F); sense_rsp.add_sense_code = p_msc->add_sense_code; sense_rsp.add_sense_qualifier = p_msc->add_sense_qualifier; resplen = sizeof(sense_rsp); - memcpy(buffer, &sense_rsp, resplen); + memcpy(buffer, &sense_rsp, (size_t) resplen); // request sense callback could overwrite the sense data if (tud_msc_request_sense_cb) { - resplen = tud_msc_request_sense_cb(lun, buffer, bufsize); + resplen = tud_msc_request_sense_cb(lun, buffer, (uint16_t) bufsize); } // Clear sense data after copy @@ -859,7 +859,7 @@ static void proc_read10_cmd(uint8_t rhport, mscd_interface_t* p_msc) } else { - TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_in, _mscd_buf, nbytes), ); + TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_in, _mscd_buf, (uint16_t) nbytes), ); } } @@ -883,7 +883,7 @@ static void proc_write10_cmd(uint8_t rhport, mscd_interface_t* p_msc) } // remaining bytes capped at class buffer - int32_t nbytes = (int32_t) tu_min32(sizeof(_mscd_buf), p_cbw->total_bytes-p_msc->xferred_len); + uint16_t nbytes = (uint16_t) tu_min32(sizeof(_mscd_buf), p_cbw->total_bytes-p_msc->xferred_len); // Write10 callback will be called later when usb transfer complete TU_ASSERT( usbd_edpt_xfer(rhport, p_msc->ep_out, _mscd_buf, nbytes), ); @@ -921,14 +921,15 @@ static void proc_write10_new_data(uint8_t rhport, mscd_interface_t* p_msc, uint3 // Application consume less than what we got (including zero) if ( (uint32_t) nbytes < xferred_bytes ) { + uint32_t const left_over = xferred_bytes - (uint32_t) nbytes; if ( nbytes > 0 ) { - p_msc->xferred_len += nbytes; - memmove(_mscd_buf, _mscd_buf+nbytes, xferred_bytes-nbytes); + p_msc->xferred_len += (uint16_t) nbytes; + memmove(_mscd_buf, _mscd_buf+nbytes, left_over); } // simulate an transfer complete with adjusted parameters --> callback will be invoked with adjusted parameter - dcd_event_xfer_complete(rhport, p_msc->ep_out, xferred_bytes-nbytes, XFER_RESULT_SUCCESS, false); + dcd_event_xfer_complete(rhport, p_msc->ep_out, left_over, XFER_RESULT_SUCCESS, false); } else { diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 183c9c6fc..895b9208b 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -79,7 +79,7 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si // Limit index space to 2*depth - this allows for a fast "modulo" calculation // but limits the maximum depth to 2^16/2 = 2^15 and buffer overflows are detectable // only if overflow happens once (important for unsupervised DMA applications) - f->max_pointer_idx = 2*depth - 1; + f->max_pointer_idx = (uint16_t) (2*depth - 1); f->non_used_index_space = UINT16_MAX - f->max_pointer_idx; f->rd_idx = f->wr_idx = 0; @@ -205,7 +205,7 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t uint8_t rem = nLin_bytes & 0x03; if (rem > 0) { - uint8_t remrem = tu_min16(nWrap_bytes, 4-rem); + uint8_t remrem = (uint8_t) tu_min16(nWrap_bytes, 4-rem); nWrap_bytes -= remrem; uint32_t tmp32 = *rx_fifo; @@ -288,7 +288,7 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rel, tu uint8_t rem = nLin_bytes & 0x03; if (rem > 0) { - uint8_t remrem = tu_min16(nWrap_bytes, 4-rem); + uint8_t remrem = (uint8_t) tu_min16(nWrap_bytes, 4-rem); nWrap_bytes -= remrem; uint32_t tmp32=0; @@ -325,7 +325,7 @@ static uint16_t advance_pointer(tu_fifo_t* f, uint16_t p, uint16_t offset) // We are exploiting the wrap around to the correct index if ((p > (uint16_t)(p + offset)) || ((uint16_t)(p + offset) > f->max_pointer_idx)) { - p = (p + offset) + f->non_used_index_space; + p = (uint16_t) ((p + offset) + f->non_used_index_space); } else { @@ -342,7 +342,7 @@ static uint16_t backward_pointer(tu_fifo_t* f, uint16_t p, uint16_t offset) // We are exploiting the wrap around to the correct index if ((p < (uint16_t)(p - offset)) || ((uint16_t)(p - offset) > f->max_pointer_idx)) { - p = (p - offset) - f->non_used_index_space; + p = (uint16_t) ((p - offset) - f->non_used_index_space); } else { @@ -818,7 +818,7 @@ bool tu_fifo_clear(tu_fifo_t *f) _ff_lock(f->mutex_rd); f->rd_idx = f->wr_idx = 0; - f->max_pointer_idx = 2*f->depth-1; + f->max_pointer_idx = (uint16_t) (2*f->depth-1); f->non_used_index_space = UINT16_MAX - f->max_pointer_idx; _ff_unlock(f->mutex_wr); diff --git a/src/device/usbd.c b/src/device/usbd.c index 1806281ff..fa894accc 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -409,6 +409,7 @@ bool tud_init (uint8_t rhport) for (uint8_t i = 0; i < TOTAL_DRIVER_COUNT; i++) { usbd_class_driver_t const * driver = get_driver(i); + TU_ASSERT(driver); TU_LOG2("%s init\r\n", driver->name); driver->init(); } @@ -426,7 +427,9 @@ static void configuration_reset(uint8_t rhport) { for ( uint8_t i = 0; i < TOTAL_DRIVER_COUNT; i++ ) { - get_driver(i)->reset(rhport); + usbd_class_driver_t const * driver = get_driver(i); + TU_ASSERT(driver, ); + driver->reset(rhport); } tu_varclr(&_usbd_dev); @@ -735,7 +738,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const // Device status bit mask // - Bit 0: Self Powered // - Bit 1: Remote Wakeup enabled - uint16_t status = (_usbd_dev.self_powered ? 1 : 0) | (_usbd_dev.remote_wakeup_en ? 2 : 0); + uint16_t status = (uint16_t) ((_usbd_dev.self_powered ? 1u : 0u) | (_usbd_dev.remote_wakeup_en ? 2u : 0u)); tud_control_xfer(rhport, p_request, &status, 2); } break; @@ -867,8 +870,8 @@ static bool process_set_config(uint8_t rhport, uint8_t cfg_num) TU_ASSERT(desc_cfg != NULL && desc_cfg->bDescriptorType == TUSB_DESC_CONFIGURATION); // Parse configuration descriptor - _usbd_dev.remote_wakeup_support = (desc_cfg->bmAttributes & TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP) ? 1 : 0; - _usbd_dev.self_powered = (desc_cfg->bmAttributes & TUSB_DESC_CONFIG_ATT_SELF_POWERED ) ? 1 : 0; + _usbd_dev.remote_wakeup_support = (desc_cfg->bmAttributes & TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP) ? 1u : 0u; + _usbd_dev.self_powered = (desc_cfg->bmAttributes & TUSB_DESC_CONFIG_ATT_SELF_POWERED ) ? 1u : 0u; // Parse interface descriptor uint8_t const * p_desc = ((uint8_t const*) desc_cfg) + sizeof(tusb_desc_configuration_t); @@ -895,11 +898,12 @@ static bool process_set_config(uint8_t rhport, uint8_t cfg_num) tusb_desc_interface_t const * desc_itf = (tusb_desc_interface_t const*) p_desc; // Find driver for this interface - uint16_t const remaining_len = desc_end-p_desc; + uint16_t const remaining_len = (uint16_t) (desc_end-p_desc); uint8_t drv_id; for (drv_id = 0; drv_id < TOTAL_DRIVER_COUNT; drv_id++) { usbd_class_driver_t const *driver = get_driver(drv_id); + TU_ASSERT(driver); uint16_t const drv_len = driver->open(rhport, desc_itf, remaining_len); if ( (sizeof(tusb_desc_interface_t) <= drv_len) && (drv_len <= remaining_len) ) @@ -1101,7 +1105,7 @@ TU_ATTR_FAST_FUNC void dcd_event_handler(dcd_event_t const * event, bool in_isr) for (uint8_t i = 0; i < TOTAL_DRIVER_COUNT; i++) { usbd_class_driver_t const * driver = get_driver(i); - if (driver->sof) + if (driver && driver->sof) { driver->sof(event->rhport, event->sof.frame_count); } diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c index 4f4108090..94a952df7 100644 --- a/src/device/usbd_control.c +++ b/src/device/usbd_control.c @@ -189,7 +189,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result TU_LOG_MEM(2, _usbd_ctrl_buf, xferred_bytes, 2); } - _ctrl_xfer.total_xferred += xferred_bytes; + _ctrl_xfer.total_xferred += (uint16_t) xferred_bytes; _ctrl_xfer.buffer += xferred_bytes; // Data Stage is complete when all request's length are transferred or diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index b500ddc46..1d849541e 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -103,7 +103,8 @@ static const dwc2_controller_t _dwc2_controller[] = // //--------------------------------------------------------------------+ -extern uint32_t SystemCoreClock; +// SystemCoreClock is alrady included by family header +// extern uint32_t SystemCoreClock; TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_enable(uint8_t rhport) -- cgit v1.3.1 From a0ef4898906a5985deae11e5539a942885398ca1 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 27 Jun 2022 17:11:24 +0700 Subject: fix all warnings with host rp2040 --- .../dual/host_hid_to_device_cdc/CMakeLists.txt | 4 + examples/dual/host_hid_to_device_cdc/src/main.c | 6 +- examples/host/bare_api/CMakeLists.txt | 3 + examples/host/bare_api/src/main.c | 11 +- examples/host/cdc_msc_hid/CMakeLists.txt | 3 + examples/host/hid_controller/CMakeLists.txt | 3 + src/class/cdc/cdc_host.c | 8 +- src/class/hid/hid_host.c | 7 +- src/class/msc/msc_host.c | 8 +- src/host/usbh.c | 6 +- src/osal/osal_pico.h | 5 - src/portable/raspberrypi/rp2040/hcd_rp2040.c | 111 +++++++++++---------- 12 files changed, 98 insertions(+), 77 deletions(-) (limited to 'src/portable') diff --git a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt index ea4e087e3..cd6f16339 100644 --- a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt +++ b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt @@ -23,6 +23,10 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) +# Example common such as compiler warnings +# skip extra warnings since pio-usb still has some warnings to fix +#include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) + # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_dual_usb_example(${PROJECT}) diff --git a/examples/dual/host_hid_to_device_cdc/src/main.c b/examples/dual/host_hid_to_device_cdc/src/main.c index 6a25a28da..bd7870274 100644 --- a/examples/dual/host_hid_to_device_cdc/src/main.c +++ b/examples/dual/host_hid_to_device_cdc/src/main.c @@ -160,7 +160,7 @@ void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* desc_re char tempbuf[256]; int count = sprintf(tempbuf, "[%04x:%04x][%u] HID Interface%u, Protocol = %s\r\n", vid, pid, dev_addr, instance, protocol_str[itf_protocol]); - tud_cdc_write(tempbuf, count); + tud_cdc_write(tempbuf, (uint32_t) count); tud_cdc_write_flush(); // Receive report from boot keyboard & mouse only @@ -179,7 +179,7 @@ void tuh_hid_umount_cb(uint8_t dev_addr, uint8_t instance) { char tempbuf[256]; int count = sprintf(tempbuf, "[%u] HID Interface%u is unmounted\r\n", dev_addr, instance); - tud_cdc_write(tempbuf, count); + tud_cdc_write(tempbuf, (uint32_t) count); tud_cdc_write_flush(); } @@ -251,7 +251,7 @@ static void process_mouse_report(uint8_t dev_addr, hid_mouse_report_t const * re char tempbuf[32]; int count = sprintf(tempbuf, "[%u] %c%c%c %d %d %d\r\n", dev_addr, l, m, r, report->x, report->y, report->wheel); - tud_cdc_write(tempbuf, count); + tud_cdc_write(tempbuf, (uint32_t) count); tud_cdc_write_flush(); } diff --git a/examples/host/bare_api/CMakeLists.txt b/examples/host/bare_api/CMakeLists.txt index bc04b01a7..98540ffb0 100644 --- a/examples/host/bare_api/CMakeLists.txt +++ b/examples/host/bare_api/CMakeLists.txt @@ -22,6 +22,9 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) +# Example common such as compiler warnings +include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) + # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_host_example(${PROJECT}) diff --git a/examples/host/bare_api/src/main.c b/examples/host/bare_api/src/main.c index 9ccd856d4..51cab2de0 100644 --- a/examples/host/bare_api/src/main.c +++ b/examples/host/bare_api/src/main.c @@ -189,7 +189,7 @@ void parse_config_descriptor(uint8_t dev_addr, tusb_desc_configuration_t const* if( TUSB_DESC_INTERFACE != tu_desc_type(p_desc) ) return; tusb_desc_interface_t const* desc_itf = (tusb_desc_interface_t const*) p_desc; - uint16_t const drv_len = count_interface_total_len(desc_itf, assoc_itf_count, desc_end-p_desc); + uint16_t const drv_len = count_interface_total_len(desc_itf, assoc_itf_count, (uint16_t) (desc_end-p_desc)); // probably corrupted descriptor if(drv_len < sizeof(tusb_desc_interface_t)) return; @@ -244,7 +244,8 @@ void hid_report_received(tuh_xfer_t* xfer); void open_hid_interface(uint8_t daddr, tusb_desc_interface_t const *desc_itf, uint16_t max_len) { // len = interface + hid + n*endpoints - uint16_t const drv_len = sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + desc_itf->bNumEndpoints*sizeof(tusb_desc_endpoint_t); + uint16_t const drv_len = (uint16_t) (sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + + desc_itf->bNumEndpoints * sizeof(tusb_desc_endpoint_t)); // corrupted descriptor if (max_len < drv_len) return; @@ -377,7 +378,7 @@ static void _convert_utf16le_to_utf8(const uint16_t *utf16, size_t utf16_len, ui for (size_t i = 0; i < utf16_len; i++) { uint16_t chr = utf16[i]; if (chr < 0x80) { - *utf8++ = chr & 0xff; + *utf8++ = chr & 0xffu; } else if (chr < 0x800) { *utf8++ = (uint8_t)(0xC0 | (chr >> 6 & 0x1F)); *utf8++ = (uint8_t)(0x80 | (chr >> 0 & 0x3F)); @@ -405,12 +406,12 @@ static int _count_utf8_bytes(const uint16_t *buf, size_t len) { } // TODO: Handle UTF-16 code points that take two entries. } - return total_bytes; + return (int) total_bytes; } static void print_utf16(uint16_t *temp_buf, size_t buf_len) { size_t utf16_len = ((temp_buf[0] & 0xff) - 2) / sizeof(uint16_t); - size_t utf8_len = _count_utf8_bytes(temp_buf + 1, utf16_len); + size_t utf8_len = (size_t) _count_utf8_bytes(temp_buf + 1, utf16_len); _convert_utf16le_to_utf8(temp_buf + 1, utf16_len, (uint8_t *) temp_buf, sizeof(uint16_t) * buf_len); ((uint8_t*) temp_buf)[utf8_len] = '\0'; diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt index c4a4d8e63..6990e957b 100644 --- a/examples/host/cdc_msc_hid/CMakeLists.txt +++ b/examples/host/cdc_msc_hid/CMakeLists.txt @@ -24,6 +24,9 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) +# Example common such as compiler warnings +include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) + # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_host_example(${PROJECT}) diff --git a/examples/host/hid_controller/CMakeLists.txt b/examples/host/hid_controller/CMakeLists.txt index 6153d399a..eefeb4a49 100644 --- a/examples/host/hid_controller/CMakeLists.txt +++ b/examples/host/hid_controller/CMakeLists.txt @@ -23,6 +23,9 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) +# Example common such as compiler warnings +include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) + # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_host_example(${PROJECT}) diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 044085e81..ee824cb4e 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -105,7 +105,7 @@ bool tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length, bool i uint8_t const ep_out = cdch_data[dev_addr-1].ep_out; if ( usbh_edpt_busy(dev_addr, ep_out) ) return false; - return usbh_edpt_xfer(dev_addr, ep_out, (void*)(uintptr_t) p_data, length); + return usbh_edpt_xfer(dev_addr, ep_out, (void*)(uintptr_t) p_data, (uint16_t) length); } bool tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is_notify) @@ -117,7 +117,7 @@ bool tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is uint8_t const ep_in = cdch_data[dev_addr-1].ep_in; if ( usbh_edpt_busy(dev_addr, ep_in) ) return false; - return usbh_edpt_xfer(dev_addr, ep_in, p_buffer, length); + return usbh_edpt_xfer(dev_addr, ep_in, p_buffer, (uint16_t) length); } bool tuh_cdc_set_control_line_state(uint8_t dev_addr, bool dtr, bool rts, tuh_xfer_cb_t complete_cb) @@ -133,8 +133,8 @@ bool tuh_cdc_set_control_line_state(uint8_t dev_addr, bool dtr, bool rts, tuh_xf .direction = TUSB_DIR_OUT }, .bRequest = CDC_REQUEST_SET_CONTROL_LINE_STATE, - .wValue = (rts ? 2 : 0) | (dtr ? 1 : 0), - .wIndex = p_cdc->itf_num, + .wValue = tu_htole16((uint16_t) ((dtr ? 1u : 0u) | (rts ? 2u : 0u))), + .wIndex = tu_htole16(p_cdc->itf_num), .wLength = 0 }; diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index 2573f5a6b..ca745464c 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -295,10 +295,10 @@ bool hidh_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint3 { TU_LOG2(" Get Report callback (%u, %u)\r\n", dev_addr, instance); TU_LOG3_MEM(hid_itf->epin_buf, xferred_bytes, 2); - tuh_hid_report_received_cb(dev_addr, instance, hid_itf->epin_buf, xferred_bytes); + tuh_hid_report_received_cb(dev_addr, instance, hid_itf->epin_buf, (uint16_t) xferred_bytes); }else { - if (tuh_hid_report_sent_cb) tuh_hid_report_sent_cb(dev_addr, instance, hid_itf->epout_buf, xferred_bytes); + if (tuh_hid_report_sent_cb) tuh_hid_report_sent_cb(dev_addr, instance, hid_itf->epout_buf, (uint16_t) xferred_bytes); } return true; @@ -332,7 +332,8 @@ bool hidh_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *de TU_LOG2("[%u] HID opening Interface %u\r\n", dev_addr, desc_itf->bInterfaceNumber); // len = interface + hid + n*endpoints - uint16_t const drv_len = sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + desc_itf->bNumEndpoints*sizeof(tusb_desc_endpoint_t); + uint16_t const drv_len = (uint16_t) (sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + + desc_itf->bNumEndpoints * sizeof(tusb_desc_endpoint_t)); TU_ASSERT(max_len >= drv_len); uint8_t const *p_desc = (uint8_t const *) desc_itf; diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index c54a63f37..934f79ff7 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -325,19 +325,19 @@ bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32 p_msc->stage = MSC_STAGE_DATA; uint8_t const ep_data = (cbw->dir & TUSB_DIR_IN_MASK) ? p_msc->ep_in : p_msc->ep_out; - TU_ASSERT(usbh_edpt_xfer(dev_addr, ep_data, p_msc->buffer, cbw->total_bytes)); + TU_ASSERT(usbh_edpt_xfer(dev_addr, ep_data, p_msc->buffer, (uint16_t) cbw->total_bytes)); }else { // Status stage p_msc->stage = MSC_STAGE_STATUS; - TU_ASSERT(usbh_edpt_xfer(dev_addr, p_msc->ep_in, (uint8_t*) &p_msc->csw, sizeof(msc_csw_t))); + TU_ASSERT(usbh_edpt_xfer(dev_addr, p_msc->ep_in, (uint8_t*) &p_msc->csw, (uint16_t) sizeof(msc_csw_t))); } break; case MSC_STAGE_DATA: // Status stage p_msc->stage = MSC_STAGE_STATUS; - TU_ASSERT(usbh_edpt_xfer(dev_addr, p_msc->ep_in, (uint8_t*) &p_msc->csw, sizeof(msc_csw_t))); + TU_ASSERT(usbh_edpt_xfer(dev_addr, p_msc->ep_in, (uint8_t*) &p_msc->csw, (uint16_t) sizeof(msc_csw_t))); break; case MSC_STAGE_STATUS: @@ -370,7 +370,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *de MSC_PROTOCOL_BOT == desc_itf->bInterfaceProtocol); // msc driver length is fixed - uint16_t const drv_len = sizeof(tusb_desc_interface_t) + desc_itf->bNumEndpoints*sizeof(tusb_desc_endpoint_t); + uint16_t const drv_len = (uint16_t) (sizeof(tusb_desc_interface_t) + desc_itf->bNumEndpoints * sizeof(tusb_desc_endpoint_t)); TU_ASSERT(drv_len <= max_len); msch_interface_t* p_msc = get_itf(dev_addr); diff --git a/src/host/usbh.c b/src/host/usbh.c index 4c9b0b1ba..b6a03b82e 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -665,7 +665,7 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result TU_LOG2_MEM(_ctrl_xfer.buffer, xferred_bytes, 2); } - _ctrl_xfer.actual_len = xferred_bytes; + _ctrl_xfer.actual_len = (uint16_t) xferred_bytes; // ACK stage: toggle is always 1 _set_control_xfer_stage(CONTROL_STAGE_ACK); @@ -696,7 +696,7 @@ bool tuh_edpt_xfer(tuh_xfer_t* xfer) TU_VERIFY(usbh_edpt_claim(daddr, ep_addr)); - if ( !usbh_edpt_xfer_with_callback(daddr, ep_addr, xfer->buffer, xfer->buflen, xfer->complete_cb, xfer->user_data) ) + if ( !usbh_edpt_xfer_with_callback(daddr, ep_addr, xfer->buffer, (uint16_t) xfer->buflen, xfer->complete_cb, xfer->user_data) ) { usbh_edpt_release(daddr, ep_addr); return false; @@ -1525,7 +1525,7 @@ static bool _parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configur } #endif - uint16_t const drv_len = tu_desc_get_interface_total_len(desc_itf, assoc_itf_count, desc_end-p_desc); + uint16_t const drv_len = tu_desc_get_interface_total_len(desc_itf, assoc_itf_count, (uint16_t) (desc_end-p_desc)); TU_ASSERT(drv_len >= sizeof(tusb_desc_interface_t)); // Find driver for this interface diff --git a/src/osal/osal_pico.h b/src/osal/osal_pico.h index abef286b4..8b428d642 100644 --- a/src/osal/osal_pico.h +++ b/src/osal/osal_pico.h @@ -100,11 +100,6 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hd //--------------------------------------------------------------------+ #include "common/tusb_fifo.h" -#if CFG_TUH_ENABLED -extern void hcd_int_disable(uint8_t rhport); -extern void hcd_int_enable(uint8_t rhport); -#endif - typedef struct { tu_fifo_t ff; diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index 93c764caf..13e7778ea 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -262,7 +262,7 @@ static struct hw_endpoint *_next_free_interrupt_ep(void) if (!ep->configured) { // Will be configured by _hw_endpoint_init / _hw_endpoint_allocate - ep->interrupt_num = i - 1; + ep->interrupt_num = (uint8_t) (i - 1); return ep; } } @@ -297,7 +297,7 @@ static struct hw_endpoint *_hw_endpoint_allocate(uint8_t transfer_type) return ep; } -static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t ep_addr, uint wMaxPacketSize, uint8_t transfer_type, uint8_t bmInterval) +static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t ep_addr, uint16_t wMaxPacketSize, uint8_t transfer_type, uint8_t bmInterval) { // Already has data buffer, endpoint control, and buffer control allocated at this point assert(ep->endpoint_control); @@ -329,7 +329,10 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t | EP_CTRL_INTERRUPT_PER_BUFFER | (ep->transfer_type << EP_CTRL_BUFFER_TYPE_LSB) | dpram_offset; - ep_reg |= bmInterval ? (bmInterval - 1) << EP_CTRL_HOST_INTERRUPT_INTERVAL_LSB : 0; + if (bmInterval) + { + ep_reg |= (uint32_t) ((bmInterval - 1) << EP_CTRL_HOST_INTERRUPT_INTERVAL_LSB); + } *ep->endpoint_control = ep_reg; pico_trace("endpoint control (0x%p) <- 0x%x\n", ep->endpoint_control, ep_reg); ep->configured = true; @@ -341,7 +344,7 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t // device address // endpoint number / direction // preamble - uint32_t reg = dev_addr | (num << USB_ADDR_ENDP1_ENDPOINT_LSB); + uint32_t reg = (uint32_t) (dev_addr | (num << USB_ADDR_ENDP1_ENDPOINT_LSB)); if (dir == TUSB_DIR_OUT) { @@ -367,39 +370,41 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t //--------------------------------------------------------------------+ bool hcd_init(uint8_t rhport) { - pico_trace("hcd_init %d\n", rhport); - assert(rhport == 0); + (void) rhport; + pico_trace("hcd_init %d\n", rhport); + assert(rhport == 0); - // Reset any previous state - rp2040_usb_init(); + // Reset any previous state + rp2040_usb_init(); - // Force VBUS detect to always present, for now we assume vbus is always provided (without using VBUS En) - usb_hw->pwr = USB_USB_PWR_VBUS_DETECT_BITS | USB_USB_PWR_VBUS_DETECT_OVERRIDE_EN_BITS; + // Force VBUS detect to always present, for now we assume vbus is always provided (without using VBUS En) + usb_hw->pwr = USB_USB_PWR_VBUS_DETECT_BITS | USB_USB_PWR_VBUS_DETECT_OVERRIDE_EN_BITS; - irq_add_shared_handler(USBCTRL_IRQ, hcd_rp2040_irq, PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY); + irq_add_shared_handler(USBCTRL_IRQ, hcd_rp2040_irq, PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY); - // clear epx and interrupt eps - memset(&ep_pool, 0, sizeof(ep_pool)); + // clear epx and interrupt eps + memset(&ep_pool, 0, sizeof(ep_pool)); - // Enable in host mode with SOF / Keep alive on - usb_hw->main_ctrl = USB_MAIN_CTRL_CONTROLLER_EN_BITS | USB_MAIN_CTRL_HOST_NDEVICE_BITS; - usb_hw->sie_ctrl = SIE_CTRL_BASE; - usb_hw->inte = USB_INTE_BUFF_STATUS_BITS | - USB_INTE_HOST_CONN_DIS_BITS | - USB_INTE_HOST_RESUME_BITS | - USB_INTE_STALL_BITS | - USB_INTE_TRANS_COMPLETE_BITS | - USB_INTE_ERROR_RX_TIMEOUT_BITS | - USB_INTE_ERROR_DATA_SEQ_BITS ; + // Enable in host mode with SOF / Keep alive on + usb_hw->main_ctrl = USB_MAIN_CTRL_CONTROLLER_EN_BITS | USB_MAIN_CTRL_HOST_NDEVICE_BITS; + usb_hw->sie_ctrl = SIE_CTRL_BASE; + usb_hw->inte = USB_INTE_BUFF_STATUS_BITS | + USB_INTE_HOST_CONN_DIS_BITS | + USB_INTE_HOST_RESUME_BITS | + USB_INTE_STALL_BITS | + USB_INTE_TRANS_COMPLETE_BITS | + USB_INTE_ERROR_RX_TIMEOUT_BITS | + USB_INTE_ERROR_DATA_SEQ_BITS ; - return true; + return true; } void hcd_port_reset(uint8_t rhport) { - pico_trace("hcd_port_reset\n"); - assert(rhport == 0); - // TODO: Nothing to do here yet. Perhaps need to reset some state? + (void) rhport; + pico_trace("hcd_port_reset\n"); + assert(rhport == 0); + // TODO: Nothing to do here yet. Perhaps need to reset some state? } void hcd_port_reset_end(uint8_t rhport) @@ -409,25 +414,27 @@ void hcd_port_reset_end(uint8_t rhport) bool hcd_port_connect_status(uint8_t rhport) { - pico_trace("hcd_port_connect_status\n"); - assert(rhport == 0); - return usb_hw->sie_status & USB_SIE_STATUS_SPEED_BITS; + (void) rhport; + pico_trace("hcd_port_connect_status\n"); + assert(rhport == 0); + return usb_hw->sie_status & USB_SIE_STATUS_SPEED_BITS; } tusb_speed_t hcd_port_speed_get(uint8_t rhport) { - assert(rhport == 0); - // TODO: Should enumval this register - switch (dev_speed()) - { - case 1: - return TUSB_SPEED_LOW; - case 2: - return TUSB_SPEED_FULL; - default: - panic("Invalid speed\n"); - return TUSB_SPEED_INVALID; - } + (void) rhport; + assert(rhport == 0); + // TODO: Should enumval this register + switch (dev_speed()) + { + case 1: + return TUSB_SPEED_LOW; + case 2: + return TUSB_SPEED_FULL; + default: + panic("Invalid speed\n"); + return TUSB_SPEED_INVALID; + } } // Close all opened endpoint belong to this device @@ -465,15 +472,17 @@ uint32_t hcd_frame_number(uint8_t rhport) void hcd_int_enable(uint8_t rhport) { - assert(rhport == 0); - irq_set_enabled(USBCTRL_IRQ, true); + (void) rhport; + assert(rhport == 0); + irq_set_enabled(USBCTRL_IRQ, true); } void hcd_int_disable(uint8_t rhport) { - // todo we should check this is disabling from the correct core; note currently this is never called - assert(rhport == 0); - irq_set_enabled(USBCTRL_IRQ, false); + (void) rhport; + // todo we should check this is disabling from the correct core; note currently this is never called + assert(rhport == 0); + irq_set_enabled(USBCTRL_IRQ, false); } //--------------------------------------------------------------------+ @@ -488,6 +497,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const // Allocated differently based on if it's an interrupt endpoint or not struct hw_endpoint *ep = _hw_endpoint_allocate(ep_desc->bmAttributes.xfer); + TU_ASSERT(ep); _hw_endpoint_init(ep, dev_addr, @@ -510,7 +520,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * // Get appropriate ep. Either EPX or interrupt endpoint struct hw_endpoint *ep = get_dev_ep(dev_addr, ep_addr); - assert(ep); + TU_ASSERT(ep); // EP should be inactive assert(!ep->active); @@ -532,7 +542,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * // That has set up buffer control, endpoint control etc // for host we have to initiate the transfer - usb_hw->dev_addr_ctrl = dev_addr | (ep_num << USB_ADDR_ENDP_ENDPOINT_LSB); + usb_hw->dev_addr_ctrl = (uint32_t) (dev_addr | (ep_num << USB_ADDR_ENDP_ENDPOINT_LSB)); uint32_t flags = USB_SIE_CTRL_START_TRANS_BITS | SIE_CTRL_BASE | (ep_dir ? USB_SIE_CTRL_RECEIVE_DATA_BITS : USB_SIE_CTRL_SEND_DATA_BITS); @@ -556,11 +566,12 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Warray-bounds" #pragma GCC diagnostic ignored "-Wstringop-overflow" - memcpy((void*)&usbh_dpram->setup_packet[0], setup_packet, 8); + memcpy((void*) (uintptr_t) &usbh_dpram->setup_packet[0], setup_packet, 8); #pragma GCC diagnostic pop // Configure EP0 struct with setup info for the trans complete struct hw_endpoint *ep = _hw_endpoint_allocate(0); + TU_ASSERT(ep); // EPX should be inactive assert(!ep->active); -- cgit v1.3.1 From 25580b4fe9acd1d9f9f12cbfdd29037669376a8d Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 27 Jun 2022 21:05:41 +0700 Subject: use forloop to avoid -Warray-bounds with host setup packet --- src/portable/raspberrypi/rp2040/hcd_rp2040.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'src/portable') diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index 13e7778ea..e9118c6a3 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -563,11 +563,10 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet (void) rhport; // Copy data into setup packet buffer -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Warray-bounds" -#pragma GCC diagnostic ignored "-Wstringop-overflow" - memcpy((void*) (uintptr_t) &usbh_dpram->setup_packet[0], setup_packet, 8); -#pragma GCC diagnostic pop + for(uint8_t i=0; i<8; i++) + { + usbh_dpram->setup_packet[i] = setup_packet[i]; + } // Configure EP0 struct with setup info for the trans complete struct hw_endpoint *ep = _hw_endpoint_allocate(0); -- cgit v1.3.1 From bc4da2047bf73f81cfcd6daa9bd07901dcdff3c9 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Mon, 27 Jun 2022 20:31:44 +0200 Subject: samd: Fix a lock-up situation at high traffic. This PR fixes a transmit lock-up, which happens, when data is received and sent at the sime time at moderate to high speeds, like code which just echoes incoming data. In my case, an issue was reported here: https://github.com/micropython/micropython/issues/8521 --- src/portable/microchip/samd/dcd_samd.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/portable') diff --git a/src/portable/microchip/samd/dcd_samd.c b/src/portable/microchip/samd/dcd_samd.c index 20dbde0f4..22fe32407 100644 --- a/src/portable/microchip/samd/dcd_samd.c +++ b/src/portable/microchip/samd/dcd_samd.c @@ -286,14 +286,14 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t { bank->PCKSIZE.bit.MULTI_PACKET_SIZE = total_bytes; bank->PCKSIZE.bit.BYTE_COUNT = 0; - ep->EPSTATUSCLR.reg |= USB_DEVICE_EPSTATUSCLR_BK0RDY; - ep->EPINTFLAG.reg |= USB_DEVICE_EPINTFLAG_TRFAIL0; + ep->EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_BK0RDY; + ep->EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL0; } else { bank->PCKSIZE.bit.MULTI_PACKET_SIZE = 0; bank->PCKSIZE.bit.BYTE_COUNT = total_bytes; - ep->EPSTATUSSET.reg |= USB_DEVICE_EPSTATUSSET_BK1RDY; - ep->EPINTFLAG.reg |= USB_DEVICE_EPINTFLAG_TRFAIL1; + ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_BK1RDY; + ep->EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL1; } return true; -- cgit v1.3.1 From 8fe9022a6e6dea785092f4e0dff8180f1f0d4d86 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 29 Jun 2022 14:06:44 +0700 Subject: fix buid_board.py script --- hw/bsp/ea4088qs/ea4088qs.c | 4 +-- hw/bsp/frdm_k32l2b/board.mk | 2 +- hw/bsp/frdm_kl25z/board.mk | 2 +- hw/bsp/kuiic/kuiic.c | 2 +- hw/bsp/lpcxpresso11u37/board.mk | 2 +- hw/bsp/lpcxpresso1347/board.mk | 2 +- hw/bsp/nutiny_nuc121s/board.mk | 3 +++ hw/bsp/nutiny_nuc125s/board.mk | 3 +++ hw/bsp/nutiny_nuc126v/board.mk | 3 +++ hw/bsp/nutiny_sdk_nuc505/board.mk | 3 +++ hw/bsp/same70_qmtech/board.mk | 2 +- hw/bsp/same70_xplained/board.mk | 2 +- hw/bsp/samg55xplained/board.mk | 2 +- hw/bsp/spresense/board.mk | 3 ++- hw/bsp/stm32l0538disco/board.mk | 2 +- src/portable/synopsys/dwc2/dwc2_stm32.h | 3 +++ tools/build_family.py | 2 +- tools/build_utils.py | 44 +++++++++++++++++++-------------- 18 files changed, 55 insertions(+), 31 deletions(-) (limited to 'src/portable') diff --git a/hw/bsp/ea4088qs/ea4088qs.c b/hw/bsp/ea4088qs/ea4088qs.c index fa905b2f9..7150ed393 100644 --- a/hw/bsp/ea4088qs/ea4088qs.c +++ b/hw/bsp/ea4088qs/ea4088qs.c @@ -33,11 +33,11 @@ void USB_IRQHandler(void) { #if CFG_TUD_ENABLED - tuh_int_handler(0); + tud_int_handler(0); #endif #if CFG_TUH_ENABLED - tud_int_handler(0); + tuh_int_handler(0); #endif } diff --git a/hw/bsp/frdm_k32l2b/board.mk b/hw/bsp/frdm_k32l2b/board.mk index 56df553da..a737eb360 100644 --- a/hw/bsp/frdm_k32l2b/board.mk +++ b/hw/bsp/frdm_k32l2b/board.mk @@ -9,7 +9,7 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_K32L2BXX # mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter +CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls MCU_DIR = $(SDK_DIR)/devices/K32L2B31A diff --git a/hw/bsp/frdm_kl25z/board.mk b/hw/bsp/frdm_kl25z/board.mk index 3585b8b03..6a72d516b 100644 --- a/hw/bsp/frdm_kl25z/board.mk +++ b/hw/bsp/frdm_kl25z/board.mk @@ -14,7 +14,7 @@ LDFLAGS += \ -Wl,--defsym,__heap_size__=0 # mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=format +CFLAGS += -Wno-error=unused-parameter -Wno-error=format -Wno-error=redundant-decls MCU_DIR = $(SDK_DIR)/devices/MKL25Z4 diff --git a/hw/bsp/kuiic/kuiic.c b/hw/bsp/kuiic/kuiic.c index 737ef3f5c..7aaa9e03c 100644 --- a/hw/bsp/kuiic/kuiic.c +++ b/hw/bsp/kuiic/kuiic.c @@ -45,7 +45,7 @@ * Variables ******************************************************************************/ /* System clock frequency. */ -extern uint32_t SystemCoreClock; +// extern uint32_t SystemCoreClock; /******************************************************************************* * Variables for BOARD_BootClockRUN configuration diff --git a/hw/bsp/lpcxpresso11u37/board.mk b/hw/bsp/lpcxpresso11u37/board.mk index b736eebe1..be6d2ed52 100644 --- a/hw/bsp/lpcxpresso11u37/board.mk +++ b/hw/bsp/lpcxpresso11u37/board.mk @@ -15,7 +15,7 @@ CFLAGS += \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' # mcu driver cause following warnings -CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter +CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=redundant-decls MCU_DIR = hw/mcu/nxp/lpcopen/lpc11uxx/lpc_chip_11uxx diff --git a/hw/bsp/lpcxpresso1347/board.mk b/hw/bsp/lpcxpresso1347/board.mk index 62135c274..bf9c97c82 100644 --- a/hw/bsp/lpcxpresso1347/board.mk +++ b/hw/bsp/lpcxpresso1347/board.mk @@ -15,7 +15,7 @@ CFLAGS += \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' # startup.c and lpc_types.h cause following errors -CFLAGS += -Wno-error=strict-prototypes +CFLAGS += -Wno-error=strict-prototypes -Wno-error=redundant-decls MCU_DIR = hw/mcu/nxp/lpcopen/lpc13xx/lpc_chip_13xx diff --git a/hw/bsp/nutiny_nuc121s/board.mk b/hw/bsp/nutiny_nuc121s/board.mk index ff1d5aa3a..ad2ee1ea0 100644 --- a/hw/bsp/nutiny_nuc121s/board.mk +++ b/hw/bsp/nutiny_nuc121s/board.mk @@ -10,6 +10,9 @@ CFLAGS += \ -DCFG_EXAMPLE_MSC_READONLY \ -DCFG_TUSB_MCU=OPT_MCU_NUC121 +# mcu driver cause following warnings +CFLAGS += -Wno-error=redundant-decls + # All source paths should be relative to the top level. LD_FILE = hw/bsp/$(BOARD)/nuc121_flash.ld diff --git a/hw/bsp/nutiny_nuc125s/board.mk b/hw/bsp/nutiny_nuc125s/board.mk index bb56e42ab..000c8cd95 100644 --- a/hw/bsp/nutiny_nuc125s/board.mk +++ b/hw/bsp/nutiny_nuc125s/board.mk @@ -10,6 +10,9 @@ CFLAGS += \ -DCFG_EXAMPLE_MSC_READONLY \ -DCFG_TUSB_MCU=OPT_MCU_NUC121 +# mcu driver cause following warnings +CFLAGS += -Wno-error=redundant-decls + # All source paths should be relative to the top level. LD_FILE = hw/bsp/$(BOARD)/nuc125_flash.ld diff --git a/hw/bsp/nutiny_nuc126v/board.mk b/hw/bsp/nutiny_nuc126v/board.mk index 4f0ebf201..0dcd897cb 100644 --- a/hw/bsp/nutiny_nuc126v/board.mk +++ b/hw/bsp/nutiny_nuc126v/board.mk @@ -11,6 +11,9 @@ CFLAGS += \ -D__CORTEX_SC=0 \ -DCFG_TUSB_MCU=OPT_MCU_NUC126 +# mcu driver cause following warnings +CFLAGS += -Wno-error=redundant-decls + # All source paths should be relative to the top level. LD_FILE = hw/bsp/$(BOARD)/nuc126_flash.ld diff --git a/hw/bsp/nutiny_sdk_nuc505/board.mk b/hw/bsp/nutiny_sdk_nuc505/board.mk index e8514347e..f27577e36 100644 --- a/hw/bsp/nutiny_sdk_nuc505/board.mk +++ b/hw/bsp/nutiny_sdk_nuc505/board.mk @@ -9,6 +9,9 @@ CFLAGS += \ -mfpu=fpv4-sp-d16 \ -DCFG_TUSB_MCU=OPT_MCU_NUC505 +# mcu driver cause following warnings +CFLAGS += -Wno-error=redundant-decls + # All source paths should be relative to the top level. LD_FILE = hw/bsp/$(BOARD)/nuc505_flashtoram.ld diff --git a/hw/bsp/same70_qmtech/board.mk b/hw/bsp/same70_qmtech/board.mk index ba7088e44..2aa09f5dd 100644 --- a/hw/bsp/same70_qmtech/board.mk +++ b/hw/bsp/same70_qmtech/board.mk @@ -11,7 +11,7 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_SAMX7X # suppress following warnings from mcu driver -CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual +CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual -Wno-error=redundant-decls ASF_DIR = hw/mcu/microchip/same70 diff --git a/hw/bsp/same70_xplained/board.mk b/hw/bsp/same70_xplained/board.mk index cb2decf50..cbc51e6b0 100644 --- a/hw/bsp/same70_xplained/board.mk +++ b/hw/bsp/same70_xplained/board.mk @@ -11,7 +11,7 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_SAMX7X # suppress following warnings from mcu driver -CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual +CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual -Wno-error=redundant-decls ASF_DIR = hw/mcu/microchip/same70 diff --git a/hw/bsp/samg55xplained/board.mk b/hw/bsp/samg55xplained/board.mk index deff6944c..d0d0ade01 100644 --- a/hw/bsp/samg55xplained/board.mk +++ b/hw/bsp/samg55xplained/board.mk @@ -12,7 +12,7 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_SAMG # suppress following warnings from mcu driver -CFLAGS += -Wno-error=undef -Wno-error=cast-qual -Wno-error=null-dereference +CFLAGS += -Wno-error=undef -Wno-error=cast-qual -Wno-error=null-dereference -Wno-error=redundant-decls ASF_DIR = hw/mcu/microchip/samg55 diff --git a/hw/bsp/spresense/board.mk b/hw/bsp/spresense/board.mk index ba291e817..78d7f6a66 100644 --- a/hw/bsp/spresense/board.mk +++ b/hw/bsp/spresense/board.mk @@ -34,8 +34,9 @@ CFLAGS += \ -Wno-error=unused-parameter \ -DCFG_TUSB_MCU=OPT_MCU_CXD56 \ +# suppress following warnings from mcu driver # lwip/src/core/raw.c:334:43: error: declaration of 'recv' shadows a global declaration -CFLAGS += -Wno-error=shadow +CFLAGS += -Wno-error=shadow -Wno-error=redundant-decls SPRESENSE_SDK = $(TOP)/hw/mcu/sony/cxd56/spresense-exported-sdk diff --git a/hw/bsp/stm32l0538disco/board.mk b/hw/bsp/stm32l0538disco/board.mk index e19101d64..69f09075a 100644 --- a/hw/bsp/stm32l0538disco/board.mk +++ b/hw/bsp/stm32l0538disco/board.mk @@ -17,7 +17,7 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_STM32L0 # mcu driver cause following warnings -CFLAGS += -Wno-error=unused-parameter -Wno-error=maybe-uninitialized +CFLAGS += -Wno-error=unused-parameter -Wno-error=maybe-uninitialized -Wno-error=redundant-decls # All source paths should be relative to the top level. LD_FILE = hw/bsp/$(BOARD)/STM32L053C8Tx_FLASH.ld diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index 1d849541e..1187e0d6e 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -43,6 +43,9 @@ #define EP_MAX_FS USB_OTG_FS_MAX_IN_ENDPOINTS #define EP_FIFO_SIZE_FS USB_OTG_FS_TOTAL_FIFO_SIZE + #define EP_MAX_HS USB_OTG_HS_MAX_IN_ENDPOINTS + #define EP_FIFO_SIZE_HS USB_OTG_HS_TOTAL_FIFO_SIZE + #elif CFG_TUSB_MCU == OPT_MCU_STM32F4 #include "stm32f4xx.h" #define EP_MAX_FS USB_OTG_FS_MAX_IN_ENDPOINTS diff --git a/tools/build_family.py b/tools/build_family.py index 095ca4ff7..680411eab 100644 --- a/tools/build_family.py +++ b/tools/build_family.py @@ -48,7 +48,7 @@ all_families.sort() def build_family(example, family): all_boards = [] for entry in os.scandir("hw/bsp/{}/boards".format(family)): - if entry.is_dir(): + if entry.is_dir() and entry.name != 'pico_sdk': all_boards.append(entry.name) filter_with_input(all_boards) all_boards.sort() diff --git a/tools/build_utils.py b/tools/build_utils.py index 299fffa4d..68c2ed98b 100644 --- a/tools/build_utils.py +++ b/tools/build_utils.py @@ -4,26 +4,34 @@ def skip_example(example, board): ex_dir = pathlib.Path('examples/') / example bsp = pathlib.Path("hw/bsp") - board_dir = list(bsp.glob("*/boards/" + board)) - if not board_dir: - # Skip unknown boards - return True - - board_dir = list(board_dir)[0] + # board without family + board_dir = bsp / board - family_dir = board_dir.parent.parent - family = family_dir.name - - # family CMake - family_mk = family_dir / "family.cmake" - - # family.mk - if not family_mk.exists(): - family_mk = family_dir / "family.mk" - - mk_contents = family_mk.read_text() + if board_dir.exists(): + family = "" + mk_contents = "" + else: + # otherwise look into family + board_dir = list(bsp.glob("*/boards/" + board)) + if not board_dir: + # Skip unknown boards + return True + + board_dir = list(board_dir)[0] + + family_dir = board_dir.parent.parent + family = family_dir.name + + # family CMake + family_mk = family_dir / "family.cmake" + + # family.mk + if not family_mk.exists(): + family_mk = family_dir / "family.mk" + + mk_contents = family_mk.read_text() - # Find the mcu + # Find the mcu, first in family mk then board mk if "CFG_TUSB_MCU=OPT_MCU_" not in mk_contents: board_mk = board_dir / "board.cmake" if not board_mk.exists(): -- cgit v1.3.1 From 9ec92ff97bf5e4b5730925ff591ed9f044d2c847 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 30 Jun 2022 15:45:04 +0700 Subject: rp2040 enable SOF as resumed signal when remote wakeup --- src/device/usbd.c | 2 +- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 25 +++++++++++++++++-------- 2 files changed, 18 insertions(+), 9 deletions(-) (limited to 'src/portable') diff --git a/src/device/usbd.c b/src/device/usbd.c index 382efa4d1..c199e647e 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -316,7 +316,7 @@ void usbd_driver_print_control_complete_name(usbd_control_xfer_cb_t callback) for (uint8_t i = 0; i < TOTAL_DRIVER_COUNT; i++) { usbd_class_driver_t const * driver = get_driver(i); - if ( driver->control_xfer_cb == callback ) + if ( driver && driver->control_xfer_cb == callback ) { TU_LOG(USBD_DBG, " %s control complete\r\n", driver->name); return; diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index c6018c515..2003f72fd 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -55,6 +55,9 @@ static uint8_t *next_buffer_ptr; // USB_MAX_ENDPOINTS Endpoints, direction TUSB_DIR_OUT for out and TUSB_DIR_IN for in. static struct hw_endpoint hw_endpoints[USB_MAX_ENDPOINTS][2]; +// SOF may be used by remote wakeup as RESUME, this indicate whether SOF is actually used by usbd +static bool _sof_enable = false; + TU_ATTR_ALWAYS_INLINE static inline struct hw_endpoint *hw_endpoint_get_by_num(uint8_t num, tusb_dir_t dir) { return &hw_endpoints[num][dir]; @@ -250,6 +253,10 @@ static void __tusb_irq_path_func(dcd_rp2040_irq)(void) if (status & USB_INTF_DEV_SOF_BITS) { handled |= USB_INTF_DEV_SOF_BITS; + + // disable SOF interrupt if it is used for RESUME in remote wakeup + if (!_sof_enable) usb_hw_clear->inte = USB_INTS_DEV_SOF_BITS; + dcd_event_sof(0, usb_hw->sof_rd & USB_SOF_RD_BITS, true); } @@ -411,9 +418,13 @@ void dcd_set_address (__unused uint8_t rhport, __unused uint8_t dev_addr) void dcd_remote_wakeup(__unused uint8_t rhport) { - pico_info("dcd_remote_wakeup %d\n", rhport); - assert(rhport == 0); - usb_hw_set->sie_ctrl = USB_SIE_CTRL_RESUME_BITS; + pico_info("dcd_remote_wakeup %d\n", rhport); + assert(rhport == 0); + + // since RESUME interrupt is not triggered if we are the one initiate + // briefly enable SOF to notify usbd when bus is ready + usb_hw_set->inte = USB_INTS_DEV_SOF_BITS; + usb_hw_set->sie_ctrl = USB_SIE_CTRL_RESUME_BITS; } // disconnect by disabling internal pull-up resistor on D+/D- @@ -434,17 +445,15 @@ void dcd_sof_enable(uint8_t rhport, bool en) { (void) rhport; - uint32_t inte = usb_hw->inte; + _sof_enable = en; if (en) { - inte |= USB_INTS_DEV_SOF_BITS; + usb_hw_set->inte = USB_INTS_DEV_SOF_BITS; }else { - inte &= ~USB_INTS_DEV_SOF_BITS; + usb_hw_clear->inte = USB_INTS_DEV_SOF_BITS; } - - usb_hw->inte = inte; } /*------------------------------------------------------------------*/ -- cgit v1.3.1 From 60c1750a9bd79e46385680b35e12f116808894f7 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Thu, 30 Jun 2022 22:18:23 +0200 Subject: mimxrt: Add/change definitions for MIMXRT11XX boards. These are mostly identical to the MIMXRT10XX, with one tiny difference. --- hw/bsp/board_mcu.h | 2 +- src/class/audio/audio_device.c | 3 ++- src/common/tusb_mcu.h | 2 +- src/portable/chipidea/ci_hs/ci_hs_imxrt.h | 5 +++++ src/portable/chipidea/ci_hs/dcd_ci_hs.c | 2 +- src/portable/chipidea/ci_hs/hcd_ci_hs.c | 2 +- src/tusb_option.h | 1 + 7 files changed, 12 insertions(+), 5 deletions(-) (limited to 'src/portable') diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index 8202479cb..93b1d595f 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -110,7 +110,7 @@ #elif CFG_TUSB_MCU == OPT_MCU_VALENTYUSB_EPTRI // no header needed -#elif CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#elif CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX #include "fsl_device_registers.h" #elif CFG_TUSB_MCU == OPT_MCU_NUC120 diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index 6df68c559..ef0f9c4b7 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -66,7 +66,7 @@ // Use ring buffer if it's available, some MCUs need extra RAM requirements #ifndef TUD_AUDIO_PREFER_RING_BUFFER -#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX #define TUD_AUDIO_PREFER_RING_BUFFER 0 #else #define TUD_AUDIO_PREFER_RING_BUFFER 1 @@ -103,6 +103,7 @@ CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ CFG_TUSB_MCU == OPT_MCU_LPC43XX || \ CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || \ + CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX || \ CFG_TUSB_MCU == OPT_MCU_MSP432E4 #if TUD_AUDIO_PREFER_RING_BUFFER #define USE_LINEAR_BUFFER 0 diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 383a8d686..37866f2a3 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -75,7 +75,7 @@ // TODO USB0 has 5, USB1 has 6 #define TUP_DCD_ENDPOINT_MAX 6 -#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX) +#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX, OPT_MCU_MIMXRT11XX) #define TUP_USBIP_CHIPIDEA_HS #define TUP_USBIP_EHCI diff --git a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h index 78ca5a5a2..a2a0c98f4 100644 --- a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h +++ b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h @@ -29,6 +29,11 @@ #include "fsl_device_registers.h" +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX +#define USB1_BASE USB_OTG1_BASE +#define USB2_BASE USB_OTG2_BASE +#endif + static const ci_hs_controller_t _ci_controller[] = { // RT1010 and RT1020 only has 1 USB controller diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 41d2f1870..0925215ae 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -34,7 +34,7 @@ #include "device/dcd.h" #include "ci_hs_type.h" -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX #include "ci_hs_imxrt.h" #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) #include "ci_hs_lpc18_43.h" diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c index 221721b0f..39b490f72 100644 --- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -29,7 +29,7 @@ // Chipidea Highspeed USB IP implement EHCI for host functionality #if CFG_TUH_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) + (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX) //--------------------------------------------------------------------+ // INCLUDE diff --git a/src/tusb_option.h b/src/tusb_option.h index 206d23e72..0749a5e52 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -99,6 +99,7 @@ typedef int make_iso_compilers_happy; // NXP iMX RT #define OPT_MCU_MIMXRT10XX 700 ///< NXP iMX RT10xx +#define OPT_MCU_MIMXRT11XX 701 ///< NXP iMX RT11xx // Nuvoton #define OPT_MCU_NUC121 800 -- cgit v1.3.1 From ec6f56768a03fcc43158b0d429e8b826825d02f7 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Fri, 1 Jul 2022 08:42:46 +0200 Subject: mimxrt: Change OPT_MCU_MIMXRT1xXX to OPT_MCU_MIMXRT. Which fits both MIMXRT10XX and MIMXRT11XX. --- hw/bsp/board_mcu.h | 2 +- hw/bsp/f1c100s/README.md | 2 +- hw/bsp/imxrt/family.mk | 2 +- src/class/audio/audio_device.c | 5 ++--- src/common/tusb_mcu.h | 2 +- src/portable/chipidea/ci_hs/ci_hs_imxrt.h | 2 +- src/portable/chipidea/ci_hs/dcd_ci_hs.c | 2 +- src/portable/chipidea/ci_hs/hcd_ci_hs.c | 4 ++-- src/portable/nxp/transdimension/dcd_transdimension.c | 6 +++--- src/portable/nxp/transdimension/hcd_transdimension.c | 6 +++--- src/tusb_option.h | 4 ++-- 11 files changed, 18 insertions(+), 19 deletions(-) (limited to 'src/portable') diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index 93b1d595f..5c309a21d 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -110,7 +110,7 @@ #elif CFG_TUSB_MCU == OPT_MCU_VALENTYUSB_EPTRI // no header needed -#elif CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX +#elif CFG_TUSB_MCU == OPT_MCU_MIMXRT #include "fsl_device_registers.h" #elif CFG_TUSB_MCU == OPT_MCU_NUC120 diff --git a/hw/bsp/f1c100s/README.md b/hw/bsp/f1c100s/README.md index 325044716..4aa1e153b 100644 --- a/hw/bsp/f1c100s/README.md +++ b/hw/bsp/f1c100s/README.md @@ -17,4 +17,4 @@ Flash: `make BOARD=f1c100s flash` will write the image to SPI flash, and then re ## TODO -* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX` high speed MCU check in examples (maybe we should extract the logic?) \ No newline at end of file +* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT` high speed MCU check in examples (maybe we should extract the logic?) \ No newline at end of file diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk index 0a55b740b..846ecd255 100644 --- a/hw/bsp/imxrt/family.mk +++ b/hw/bsp/imxrt/family.mk @@ -13,7 +13,7 @@ CFLAGS += \ -D__ARMVFP__=0 -D__ARMFPV5__=0\ -DXIP_EXTERNAL_FLASH=1 \ -DXIP_BOOT_HEADER_ENABLE=1 \ - -DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX + -DCFG_TUSB_MCU=OPT_MCU_MIMXRT ifdef BOARD_TUD_RHPORT CFLAGS += -DBOARD_TUD_RHPORT=$(BOARD_TUD_RHPORT) diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index ef0f9c4b7..473d1e910 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -66,7 +66,7 @@ // Use ring buffer if it's available, some MCUs need extra RAM requirements #ifndef TUD_AUDIO_PREFER_RING_BUFFER -#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX +#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT #define TUD_AUDIO_PREFER_RING_BUFFER 0 #else #define TUD_AUDIO_PREFER_RING_BUFFER 1 @@ -102,8 +102,7 @@ CFG_TUSB_MCU == OPT_MCU_GD32VF103 || \ CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ CFG_TUSB_MCU == OPT_MCU_LPC43XX || \ - CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || \ - CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX || \ + CFG_TUSB_MCU == OPT_MCU_MIMXRT || \ CFG_TUSB_MCU == OPT_MCU_MSP432E4 #if TUD_AUDIO_PREFER_RING_BUFFER #define USE_LINEAR_BUFFER 0 diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 37866f2a3..baa82fc14 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -75,7 +75,7 @@ // TODO USB0 has 5, USB1 has 6 #define TUP_DCD_ENDPOINT_MAX 6 -#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX, OPT_MCU_MIMXRT11XX) +#elif TU_CHECK_MCU(OPT_MCU_MIMXRT) #define TUP_USBIP_CHIPIDEA_HS #define TUP_USBIP_EHCI diff --git a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h index a2a0c98f4..53bc8bd00 100644 --- a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h +++ b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h @@ -29,7 +29,7 @@ #include "fsl_device_registers.h" -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX +#if !defined(USB1_BASE) && defined(USB_OTG1_BASE) #define USB1_BASE USB_OTG1_BASE #define USB2_BASE USB_OTG2_BASE #endif diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 0925215ae..c7cc3e0e8 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -34,7 +34,7 @@ #include "device/dcd.h" #include "ci_hs_type.h" -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT #include "ci_hs_imxrt.h" #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) #include "ci_hs_lpc18_43.h" diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c index 39b490f72..d0396daea 100644 --- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -29,7 +29,7 @@ // Chipidea Highspeed USB IP implement EHCI for host functionality #if CFG_TUH_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT11XX) + (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT) //--------------------------------------------------------------------+ // INCLUDE @@ -39,7 +39,7 @@ #include "portable/ehci/ehci_api.h" #include "ci_hs_type.h" -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT #include "ci_hs_imxrt.h" #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) #include "ci_hs_lpc18_43.h" diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c index 2347e1dae..1f27a6872 100644 --- a/src/portable/nxp/transdimension/dcd_transdimension.c +++ b/src/portable/nxp/transdimension/dcd_transdimension.c @@ -27,14 +27,14 @@ #include "tusb_option.h" #if CFG_TUD_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) + (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT) #warning "transdimenion is renamed to chipidea (portable/chipidea/ci_hs) to match other opensource naming convention such as linux. This file will be removed in the future, please update your makefile accordingly" //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT #include "fsl_device_registers.h" #define INCLUDE_FSL_DEVICE_REGISTERS #else @@ -153,7 +153,7 @@ typedef struct const uint8_t ep_count; // Max bi-directional Endpoints }dcd_controller_t; -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT static const dcd_controller_t _dcd_controller[] = { // RT1010 and RT1020 only has 1 USB controller diff --git a/src/portable/nxp/transdimension/hcd_transdimension.c b/src/portable/nxp/transdimension/hcd_transdimension.c index 2d0830981..392764ff6 100644 --- a/src/portable/nxp/transdimension/hcd_transdimension.c +++ b/src/portable/nxp/transdimension/hcd_transdimension.c @@ -29,14 +29,14 @@ // NXP Trans-Dimension USB IP implement EHCI for host functionality #if CFG_TUH_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) + (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT) #warning "transdimenion is renamed to chipidea (portable/chipidea/ci_hs) to match other opensource naming convention such as linux. This file will be removed in the future, please update your makefile accordingly" //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT #include "fsl_device_registers.h" #else // LPCOpen for 18xx & 43xx @@ -58,7 +58,7 @@ typedef struct const IRQn_Type irqnum; // IRQ number }hcd_controller_t; -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT static const hcd_controller_t _hcd_controller[] = { // RT1010 and RT1020 only has 1 USB controller diff --git a/src/tusb_option.h b/src/tusb_option.h index 0749a5e52..a030197f6 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -98,8 +98,8 @@ typedef int make_iso_compilers_happy; #define OPT_MCU_VALENTYUSB_EPTRI 600 ///< Fomu eptri config // NXP iMX RT -#define OPT_MCU_MIMXRT10XX 700 ///< NXP iMX RT10xx -#define OPT_MCU_MIMXRT11XX 701 ///< NXP iMX RT11xx +#define OPT_MCU_MIMXRT 700 ///< NXP iMX RT Series +#define OPT_MCU_MIMXRT10XX OPT_MCU_MIMXRT // Nuvoton #define OPT_MCU_NUC121 800 -- cgit v1.3.1 From 19768936ae6379b4c86947f70ab5cf2c0f8ed8f4 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 11 Jul 2022 14:01:18 +0700 Subject: bump up mcux-sdk for rt11xx, add back OPT_MCU_MIMXRT11XX --- examples/host/bare_api/only.txt | 1 + examples/host/cdc_msc_hid/only.txt | 1 + examples/host/hid_controller/only.txt | 1 + hw/mcu/nxp/mcux-sdk | 2 +- src/portable/chipidea/ci_hs/ci_hs_imxrt.h | 3 +++ src/tusb_option.h | 5 +++-- 6 files changed, 10 insertions(+), 3 deletions(-) (limited to 'src/portable') diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt index 7fe4e3f5c..da3ffdd19 100644 --- a/examples/host/bare_api/only.txt +++ b/examples/host/bare_api/only.txt @@ -4,6 +4,7 @@ mcu:LPC18XX mcu:LPC40XX mcu:LPC43XX mcu:MIMXRT10XX +mcu:MIMXRT11XX mcu:RP2040 mcu:MSP432E4 mcu:RX65X diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt index 7fe4e3f5c..da3ffdd19 100644 --- a/examples/host/cdc_msc_hid/only.txt +++ b/examples/host/cdc_msc_hid/only.txt @@ -4,6 +4,7 @@ mcu:LPC18XX mcu:LPC40XX mcu:LPC43XX mcu:MIMXRT10XX +mcu:MIMXRT11XX mcu:RP2040 mcu:MSP432E4 mcu:RX65X diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt index 7fe4e3f5c..da3ffdd19 100644 --- a/examples/host/hid_controller/only.txt +++ b/examples/host/hid_controller/only.txt @@ -4,6 +4,7 @@ mcu:LPC18XX mcu:LPC40XX mcu:LPC43XX mcu:MIMXRT10XX +mcu:MIMXRT11XX mcu:RP2040 mcu:MSP432E4 mcu:RX65X diff --git a/hw/mcu/nxp/mcux-sdk b/hw/mcu/nxp/mcux-sdk index cb21c6609..ae2ab01d9 160000 --- a/hw/mcu/nxp/mcux-sdk +++ b/hw/mcu/nxp/mcux-sdk @@ -1 +1 @@ -Subproject commit cb21c660991c92e90ece99ccb63a4bc611899c3a +Subproject commit ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294 diff --git a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h index 53bc8bd00..2de0d9cb4 100644 --- a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h +++ b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h @@ -31,6 +31,9 @@ #if !defined(USB1_BASE) && defined(USB_OTG1_BASE) #define USB1_BASE USB_OTG1_BASE +#endif + +#if !defined(USB2_BASE) && defined(USB_OTG2_BASE) #define USB2_BASE USB_OTG2_BASE #endif diff --git a/src/tusb_option.h b/src/tusb_option.h index a030197f6..70ef1c399 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -98,8 +98,9 @@ typedef int make_iso_compilers_happy; #define OPT_MCU_VALENTYUSB_EPTRI 600 ///< Fomu eptri config // NXP iMX RT -#define OPT_MCU_MIMXRT 700 ///< NXP iMX RT Series -#define OPT_MCU_MIMXRT10XX OPT_MCU_MIMXRT +#define OPT_MCU_MIMXRT 700 ///< NXP iMX RT Series +#define OPT_MCU_MIMXRT10XX OPT_MCU_MIMXRT ///< RT10xx +#define OPT_MCU_MIMXRT11XX OPT_MCU_MIMXRT ///< RT11xx // Nuvoton #define OPT_MCU_NUC121 800 -- cgit v1.3.1 From fc1a27b6c9d5a19529d6ac968164f2734ea89023 Mon Sep 17 00:00:00 2001 From: graham sanderson Date: Tue, 12 Jul 2022 12:58:30 -0500 Subject: RP@040: rework CMake for compiler warnings --- examples/device/audio_4_channel_mic/CMakeLists.txt | 3 - examples/device/audio_test/CMakeLists.txt | 3 - examples/device/board_test/CMakeLists.txt | 3 - examples/device/cdc_dual_ports/CMakeLists.txt | 3 - examples/device/cdc_msc/CMakeLists.txt | 3 - examples/device/dfu/CMakeLists.txt | 3 - examples/device/dfu_runtime/CMakeLists.txt | 3 - .../device/dynamic_configuration/CMakeLists.txt | 3 - examples/device/hid_boot_interface/CMakeLists.txt | 3 - examples/device/hid_composite/CMakeLists.txt | 3 - examples/device/hid_generic_inout/CMakeLists.txt | 3 - .../device/hid_multiple_interface/CMakeLists.txt | 3 - examples/device/midi_test/CMakeLists.txt | 3 - examples/device/msc_dual_lun/CMakeLists.txt | 3 - examples/device/net_lwip_webserver/CMakeLists.txt | 3 - examples/device/uac2_headset/CMakeLists.txt | 3 - examples/device/usbtmc/CMakeLists.txt | 3 - examples/device/video_capture/CMakeLists.txt | 3 - examples/device/webusb_serial/CMakeLists.txt | 3 - .../dual/host_hid_to_device_cdc/CMakeLists.txt | 9 +-- examples/example.cmake | 32 ---------- examples/host/bare_api/CMakeLists.txt | 3 - examples/host/cdc_msc_hid/CMakeLists.txt | 3 - examples/host/hid_controller/CMakeLists.txt | 3 - hw/bsp/family_support.cmake | 37 +++++++++++ hw/bsp/rp2040/family.cmake | 71 +++++++++++++--------- src/portable/raspberrypi/rp2040/rp2040_usb.c | 2 + 27 files changed, 85 insertions(+), 132 deletions(-) delete mode 100644 examples/example.cmake (limited to 'src/portable') diff --git a/examples/device/audio_4_channel_mic/CMakeLists.txt b/examples/device/audio_4_channel_mic/CMakeLists.txt index e6ce2813e..f6e10e2ea 100644 --- a/examples/device/audio_4_channel_mic/CMakeLists.txt +++ b/examples/device/audio_4_channel_mic/CMakeLists.txt @@ -23,9 +23,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) diff --git a/examples/device/audio_test/CMakeLists.txt b/examples/device/audio_test/CMakeLists.txt index 416b91665..cb321f9a8 100644 --- a/examples/device/audio_test/CMakeLists.txt +++ b/examples/device/audio_test/CMakeLists.txt @@ -23,9 +23,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) \ No newline at end of file diff --git a/examples/device/board_test/CMakeLists.txt b/examples/device/board_test/CMakeLists.txt index ac530a928..37113578e 100644 --- a/examples/device/board_test/CMakeLists.txt +++ b/examples/device/board_test/CMakeLists.txt @@ -36,9 +36,6 @@ else() ${CMAKE_CURRENT_SOURCE_DIR}/src ) - # Example common such as compiler warnings - include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) diff --git a/examples/device/cdc_dual_ports/CMakeLists.txt b/examples/device/cdc_dual_ports/CMakeLists.txt index 438635958..abc4d91da 100644 --- a/examples/device/cdc_dual_ports/CMakeLists.txt +++ b/examples/device/cdc_dual_ports/CMakeLists.txt @@ -23,9 +23,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) \ No newline at end of file diff --git a/examples/device/cdc_msc/CMakeLists.txt b/examples/device/cdc_msc/CMakeLists.txt index 04c7c1b26..fa6e83b7e 100644 --- a/examples/device/cdc_msc/CMakeLists.txt +++ b/examples/device/cdc_msc/CMakeLists.txt @@ -24,9 +24,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) \ No newline at end of file diff --git a/examples/device/dfu/CMakeLists.txt b/examples/device/dfu/CMakeLists.txt index 121ab3852..acaa54198 100644 --- a/examples/device/dfu/CMakeLists.txt +++ b/examples/device/dfu/CMakeLists.txt @@ -23,9 +23,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) diff --git a/examples/device/dfu_runtime/CMakeLists.txt b/examples/device/dfu_runtime/CMakeLists.txt index 438635958..abc4d91da 100644 --- a/examples/device/dfu_runtime/CMakeLists.txt +++ b/examples/device/dfu_runtime/CMakeLists.txt @@ -23,9 +23,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) \ No newline at end of file diff --git a/examples/device/dynamic_configuration/CMakeLists.txt b/examples/device/dynamic_configuration/CMakeLists.txt index 04c7c1b26..fa6e83b7e 100644 --- a/examples/device/dynamic_configuration/CMakeLists.txt +++ b/examples/device/dynamic_configuration/CMakeLists.txt @@ -24,9 +24,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) \ No newline at end of file diff --git a/examples/device/hid_boot_interface/CMakeLists.txt b/examples/device/hid_boot_interface/CMakeLists.txt index 438635958..abc4d91da 100644 --- a/examples/device/hid_boot_interface/CMakeLists.txt +++ b/examples/device/hid_boot_interface/CMakeLists.txt @@ -23,9 +23,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) \ No newline at end of file diff --git a/examples/device/hid_composite/CMakeLists.txt b/examples/device/hid_composite/CMakeLists.txt index 438635958..abc4d91da 100644 --- a/examples/device/hid_composite/CMakeLists.txt +++ b/examples/device/hid_composite/CMakeLists.txt @@ -23,9 +23,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) \ No newline at end of file diff --git a/examples/device/hid_generic_inout/CMakeLists.txt b/examples/device/hid_generic_inout/CMakeLists.txt index 438635958..abc4d91da 100644 --- a/examples/device/hid_generic_inout/CMakeLists.txt +++ b/examples/device/hid_generic_inout/CMakeLists.txt @@ -23,9 +23,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) \ No newline at end of file diff --git a/examples/device/hid_multiple_interface/CMakeLists.txt b/examples/device/hid_multiple_interface/CMakeLists.txt index 438635958..abc4d91da 100644 --- a/examples/device/hid_multiple_interface/CMakeLists.txt +++ b/examples/device/hid_multiple_interface/CMakeLists.txt @@ -23,9 +23,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) \ No newline at end of file diff --git a/examples/device/midi_test/CMakeLists.txt b/examples/device/midi_test/CMakeLists.txt index 438635958..abc4d91da 100644 --- a/examples/device/midi_test/CMakeLists.txt +++ b/examples/device/midi_test/CMakeLists.txt @@ -23,9 +23,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) \ No newline at end of file diff --git a/examples/device/msc_dual_lun/CMakeLists.txt b/examples/device/msc_dual_lun/CMakeLists.txt index 518eac3ad..9e834ae21 100644 --- a/examples/device/msc_dual_lun/CMakeLists.txt +++ b/examples/device/msc_dual_lun/CMakeLists.txt @@ -24,9 +24,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) \ No newline at end of file diff --git a/examples/device/net_lwip_webserver/CMakeLists.txt b/examples/device/net_lwip_webserver/CMakeLists.txt index 0f41b888a..9fe1a325e 100644 --- a/examples/device/net_lwip_webserver/CMakeLists.txt +++ b/examples/device/net_lwip_webserver/CMakeLists.txt @@ -69,9 +69,6 @@ if (EXISTS ${TOP}/lib/lwip/src) ${TOP}/lib/networking/rndis_reports.c ) - # Example common such as compiler warnings - include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # due to warnings from other net source, we need to prevent error from some of the warnings options target_compile_options(${PROJECT} PUBLIC -Wno-error=null-dereference diff --git a/examples/device/uac2_headset/CMakeLists.txt b/examples/device/uac2_headset/CMakeLists.txt index 438635958..abc4d91da 100644 --- a/examples/device/uac2_headset/CMakeLists.txt +++ b/examples/device/uac2_headset/CMakeLists.txt @@ -23,9 +23,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) \ No newline at end of file diff --git a/examples/device/usbtmc/CMakeLists.txt b/examples/device/usbtmc/CMakeLists.txt index 74f81b24f..c49603c26 100644 --- a/examples/device/usbtmc/CMakeLists.txt +++ b/examples/device/usbtmc/CMakeLists.txt @@ -24,9 +24,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) \ No newline at end of file diff --git a/examples/device/video_capture/CMakeLists.txt b/examples/device/video_capture/CMakeLists.txt index 416b91665..cb321f9a8 100644 --- a/examples/device/video_capture/CMakeLists.txt +++ b/examples/device/video_capture/CMakeLists.txt @@ -23,9 +23,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) \ No newline at end of file diff --git a/examples/device/webusb_serial/CMakeLists.txt b/examples/device/webusb_serial/CMakeLists.txt index 438635958..abc4d91da 100644 --- a/examples/device/webusb_serial/CMakeLists.txt +++ b/examples/device/webusb_serial/CMakeLists.txt @@ -23,9 +23,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_device_example(${PROJECT}) \ No newline at end of file diff --git a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt index 909ee423f..fc9bbfc13 100644 --- a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt +++ b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt @@ -23,8 +23,9 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) +# Configure compilation flags and libraries for the example... see the corresponding function +# in hw/bsp/FAMILY/family.cmake for details. +family_configure_dual_usb_example(${PROJECT}) # due to warnings from other net source, we need to prevent error from some of the warnings options target_compile_options(${PROJECT} PUBLIC @@ -37,7 +38,3 @@ target_compile_options(${PROJECT} PUBLIC -Wno-error=sign-compare -Wno-error=unused-function ) - -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_dual_usb_example(${PROJECT}) diff --git a/examples/example.cmake b/examples/example.cmake deleted file mode 100644 index 6b5e41dd9..000000000 --- a/examples/example.cmake +++ /dev/null @@ -1,32 +0,0 @@ -target_compile_options(${PROJECT} PUBLIC - -Wall - -Wextra - -Werror - -Wfatal-errors - -Wdouble-promotion - -Wfloat-equal - -Wshadow - -Wwrite-strings - -Wsign-compare - -Wmissing-format-attribute - -Wunreachable-code - -Wcast-align - -Wcast-qual - -Wnull-dereference - -Wuninitialized - -Wunused - -Wredundant-decls - #-Wstrict-prototypes - #-Werror-implicit-function-declaration - #-Wundef - ) - -# GCC 10 -if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 10.0) - target_compile_options(${PROJECT} PUBLIC -Wconversion) -endif() - -# GCC 8 -if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 8.0) - target_compile_options(${PROJECT} PUBLIC -Wcast-function-type -Wstrict-overflow) -endif() diff --git a/examples/host/bare_api/CMakeLists.txt b/examples/host/bare_api/CMakeLists.txt index 98540ffb0..bc04b01a7 100644 --- a/examples/host/bare_api/CMakeLists.txt +++ b/examples/host/bare_api/CMakeLists.txt @@ -22,9 +22,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_host_example(${PROJECT}) diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt index 6990e957b..c4a4d8e63 100644 --- a/examples/host/cdc_msc_hid/CMakeLists.txt +++ b/examples/host/cdc_msc_hid/CMakeLists.txt @@ -24,9 +24,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_host_example(${PROJECT}) diff --git a/examples/host/hid_controller/CMakeLists.txt b/examples/host/hid_controller/CMakeLists.txt index eefeb4a49..6153d399a 100644 --- a/examples/host/hid_controller/CMakeLists.txt +++ b/examples/host/hid_controller/CMakeLists.txt @@ -23,9 +23,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Example common such as compiler warnings -include(${CMAKE_CURRENT_SOURCE_DIR}/../../example.cmake) - # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. family_configure_host_example(${PROJECT}) diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index ee29caba7..75bd97cb6 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -79,6 +79,43 @@ if (NOT TARGET _family_support_marker) endif() endfunction() + function(family_add_default_example_warnings TARGET) + target_compile_options(${TARGET} PUBLIC + -Wall + -Wextra + -Werror + -Wfatal-errors + -Wdouble-promotion + -Wfloat-equal + -Wshadow + -Wwrite-strings + -Wsign-compare + -Wmissing-format-attribute + -Wunreachable-code + -Wcast-align + -Wcast-qual + -Wnull-dereference + -Wuninitialized + -Wunused + -Wredundant-decls + #-Wstrict-prototypes + #-Werror-implicit-function-declaration + #-Wundef + ) + + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + # GCC 10 + if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 10.0) + target_compile_options(${TARGET} PUBLIC -Wconversion) + endif() + + # GCC 8 + if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 8.0) + target_compile_options(${TARGET} PUBLIC -Wcast-function-type -Wstrict-overflow) + endif() + endif() + endfunction() + # configure an executable target to link to tinyusb in device mode, and add the board implementation function(family_configure_device_example TARGET) # default implentation is empty, the function should be redefined in the FAMILY/family.cmake diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index 530d80fec..31e97d9af 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -147,16 +147,23 @@ if (NOT TARGET _rp2040_family_inclusion_marker) target_link_libraries(${TARGET} PUBLIC pico_stdlib pico_bootsel_via_double_reset tinyusb_board tinyusb_additions) endfunction() + function(rp2040_family_configure_example_warnings TARGET) + if (NOT PICO_TINYUSB_NO_EXAMPLE_WARNINGS) + family_add_default_example_warnings(${TARGET}) + endif() + suppress_tinyusb_warnings() + endfunction() + function(family_configure_device_example TARGET) family_configure_target(${TARGET}) target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device) - suppress_tinyusb_warnings() + rp2040_family_configure_example_warnings(${TARGET}) endfunction() function(family_configure_host_example TARGET) family_configure_target(${TARGET}) target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_host) - suppress_tinyusb_warnings() + rp2040_family_configure_example_warnings(${TARGET}) endfunction() function(family_add_pico_pio_usb TARGET) @@ -167,7 +174,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker) family_configure_target(${TARGET}) # require tinyusb_pico_pio_usb target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device tinyusb_host tinyusb_pico_pio_usb ) - suppress_tinyusb_warnings() + rp2040_family_configure_example_warnings(${TARGET}) endfunction() function(check_and_add_pico_pio_usb_support) @@ -236,30 +243,38 @@ if (NOT TARGET _rp2040_family_inclusion_marker) # This method must be called from the project scope to suppress known warnings in TinyUSB source files function(suppress_tinyusb_warnings) # some of these are pretty silly warnings only occurring in some older GCC versions 9 or prior - if (CMAKE_C_COMPILER_VERSION VERSION_LESS 10.0) - set(CONVERSION_WARNING_FILES - ${PICO_TINYUSB_PATH}/src/tusb.c - ${PICO_TINYUSB_PATH}/src/common/tusb_fifo.c - ${PICO_TINYUSB_PATH}/src/device/usbd.c - ${PICO_TINYUSB_PATH}/src/device/usbd_control.c - ${PICO_TINYUSB_PATH}/src/host/usbh.c - ${PICO_TINYUSB_PATH}/src/class/cdc/cdc_device.c - ${PICO_TINYUSB_PATH}/src/class/cdc/cdc_host.c - ${PICO_TINYUSB_PATH}/src/class/hid/hid_device.c - ${PICO_TINYUSB_PATH}/src/class/hid/hid_host.c - ${PICO_TINYUSB_PATH}/src/class/audio/audio_device.c - ${PICO_TINYUSB_PATH}/src/class/dfu/dfu_device.c - ${PICO_TINYUSB_PATH}/src/class/dfu/dfu_rt_device.c - ${PICO_TINYUSB_PATH}/src/class/midi/midi_device.c - ${PICO_TINYUSB_PATH}/src/class/usbtmc/usbtmc_device.c - ${PICO_TINYUSB_PATH}/src/portable/raspberrypi/rp2040/hcd_rp2040.c - ) - foreach(SOURCE_FILE IN LISTS CONVERSION_WARNING_FILES) - set_source_files_properties( - ${SOURCE_FILE} - PROPERTIES - COMPILE_FLAGS "-Wno-conversion") - endforeach() - endif() + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + if (CMAKE_C_COMPILER_VERSION VERSION_LESS 10.0) + set(CONVERSION_WARNING_FILES + ${PICO_TINYUSB_PATH}/src/tusb.c + ${PICO_TINYUSB_PATH}/src/common/tusb_fifo.c + ${PICO_TINYUSB_PATH}/src/device/usbd.c + ${PICO_TINYUSB_PATH}/src/device/usbd_control.c + ${PICO_TINYUSB_PATH}/src/host/usbh.c + ${PICO_TINYUSB_PATH}/src/class/cdc/cdc_device.c + ${PICO_TINYUSB_PATH}/src/class/cdc/cdc_host.c + ${PICO_TINYUSB_PATH}/src/class/hid/hid_device.c + ${PICO_TINYUSB_PATH}/src/class/hid/hid_host.c + ${PICO_TINYUSB_PATH}/src/class/audio/audio_device.c + ${PICO_TINYUSB_PATH}/src/class/dfu/dfu_device.c + ${PICO_TINYUSB_PATH}/src/class/dfu/dfu_rt_device.c + ${PICO_TINYUSB_PATH}/src/class/midi/midi_device.c + ${PICO_TINYUSB_PATH}/src/class/usbtmc/usbtmc_device.c + ${PICO_TINYUSB_PATH}/src/portable/raspberrypi/rp2040/hcd_rp2040.c + ) + foreach(SOURCE_FILE IN LISTS CONVERSION_WARNING_FILES) + set_source_files_properties( + ${SOURCE_FILE} + PROPERTIES + COMPILE_FLAGS "-Wno-conversion") + endforeach() + endif() + if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 11.0) + set_source_files_properties( + ${PICO_TINYUSB_PATH}/src/portable/raspberrypi/rp2040/rp2040_usb.c + PROPERTIES + COMPILE_FLAGS "-Wno-stringop-overflow -Wno-array-bounds") + endif() + endif() endfunction() endif() diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index 49be90167..25c013bd2 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -60,7 +60,9 @@ void rp2040_usb_init(void) // Clear any previous state just in case #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Warray-bounds" +#if __GNUC__ > 6 #pragma GCC diagnostic ignored "-Wstringop-overflow" +#endif memset(usb_hw, 0, sizeof(*usb_hw)); memset(usb_dpram, 0, sizeof(*usb_dpram)); #pragma GCC diagnostic pop -- cgit v1.3.1 From 5e3cfe7b5784ee94a4914b36232d28ce96cf18f2 Mon Sep 17 00:00:00 2001 From: Jerzy Kasenberg Date: Fri, 26 Aug 2022 08:01:06 +0200 Subject: nrf5x: Fix endpoint internal state when closed Field started (regardind transfer) was only cleaed when transfer was finished. For audio devices set interface is called many times. When there is no audio (silence) set interface requests zero lenght bandwithd that in turn calls dcd_edpt_close(). When endpoint is closed due to set interface request transfer should not longer be started since it will block next start transfer with assert. This just sets 'started' to false when endpoint is closed. --- src/portable/nordic/nrf5x/dcd_nrf5x.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/portable') diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index efa30c60a..f213e9f9f 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -438,6 +438,7 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) // When both ISO endpoint are close there is no need for SOF any more. if (_dcd.xfer[EP_ISO_NUM][TUSB_DIR_IN].mps + _dcd.xfer[EP_ISO_NUM][TUSB_DIR_OUT].mps == 0) NRF_USBD->INTENCLR = USBD_INTENCLR_SOF_Msk; } + _dcd.xfer[epnum][dir].started = false; __ISB(); __DSB(); } -- cgit v1.3.1 From c5992edc7de6f54d5fdab801c46e964bc0f18542 Mon Sep 17 00:00:00 2001 From: ReimuNotMoe <34613827+ReimuNotMoe@users.noreply.github.com> Date: Sat, 3 Sep 2022 05:18:29 +0800 Subject: Initial PIC32MM/MX & PIC24 support --- src/portable/microchip/pic/dcd_pic.c | 711 +++++++++++++++++++++++++++++++++++ src/tusb_option.h | 5 + 2 files changed, 716 insertions(+) create mode 100644 src/portable/microchip/pic/dcd_pic.c (limited to 'src/portable') diff --git a/src/portable/microchip/pic/dcd_pic.c b/src/portable/microchip/pic/dcd_pic.c new file mode 100644 index 000000000..df9b2ff01 --- /dev/null +++ b/src/portable/microchip/pic/dcd_pic.c @@ -0,0 +1,711 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020 Koji Kitayama + * Copyright (c) 2022 Reimu NotMoe + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "tusb_option.h" + +#if CFG_TUD_ENABLED && \ + (CFG_TUSB_MCU == OPT_MCU_PIC32MX || CFG_TUSB_MCU == OPT_MCU_PIC32MM || \ + CFG_TUSB_MCU == OPT_MCU_PIC32MK || CFG_TUSB_MCU == OPT_MCU_PIC24 || \ + CFG_TUSB_MCU == OPT_MCU_DSPIC33) + +#include + +#include "device/dcd.h" + + +#if (CFG_TUSB_MCU == OPT_MCU_PIC32MX || CFG_TUSB_MCU == OPT_MCU_PIC32MM || CFG_TUSB_MCU == OPT_MCU_PIC32MK) + +#define TU_PIC_HAS_MMU 1 +#define TU_PIC_HAS_HW_RMW 1 +#define TU_PIC_INT_SIZE 4 + +#elif (CFG_TUSB_MCU == OPT_MCU_PIC24 || CFG_TUSB_MCU == OPT_MCU_DSPIC33) + +#define TU_PIC_HAS_MMU 0 +#define TU_PIC_HAS_HW_RMW 0 +#define TU_PIC_INT_SIZE 2 + +#else + +#error Unsupportd PIC MCU + +#endif + + +#if TU_PIC_HAS_MMU + +#ifndef KVA_TO_PA +#define KVA_TO_PA(kva) ((uint32_t)(kva) & 0x1fffffff) +#endif + +#ifndef PA_TO_KVA1 +#define PA_TO_KVA1(pa) ((uint32_t)(pa) | 0xA0000000) +#endif + +#else + +#ifndef KVA_TO_PA +#define KVA_TO_PA(kva) (kva) +#endif + +#ifndef PA_TO_KVA1 +#define PA_TO_KVA1(pa) (pa) +#endif + +#endif + + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM DECLARATION +//--------------------------------------------------------------------+ + +enum { + TOK_PID_OUT = 0x1u, + TOK_PID_IN = 0x9u, + TOK_PID_SETUP = 0xDu, +}; + +typedef struct TU_ATTR_PACKED +{ + union { + uint32_t head; + struct { + union { + struct { + uint16_t : 2; + uint16_t tok_pid : 4; + uint16_t data : 1; + uint16_t own : 1; + uint16_t : 8; + }; + struct { + uint16_t : 2; + uint16_t bdt_stall : 1; + uint16_t dts : 1; + uint16_t ninc : 1; + uint16_t keep : 1; + uint16_t : 10; + }; + }; + uint16_t bc : 10; + uint16_t : 6; + }; + }; + uint8_t *addr; +} buffer_descriptor_t; + +TU_VERIFY_STATIC( sizeof(buffer_descriptor_t) == 8, "size is not correct" ); + +typedef struct TU_ATTR_PACKED +{ + union { + uint32_t state; + struct { + uint32_t max_packet_size :11; + uint32_t : 5; + uint32_t odd : 1; + uint32_t :15; + }; + }; + uint16_t length; + uint16_t remaining; +} endpoint_state_t; + +TU_VERIFY_STATIC( sizeof(endpoint_state_t) == 8, "size is not correct" ); + +typedef struct +{ + union { + /* [#EP][OUT,IN][EVEN,ODD] */ + buffer_descriptor_t bdt[16][2][2]; + uint16_t bda[512]; + }; + TU_ATTR_ALIGNED(4) union { + endpoint_state_t endpoint[16][2]; + endpoint_state_t endpoint_unified[16 * 2]; + }; + uint8_t setup_packet[8]; + uint8_t addr; +} dcd_data_t; + +//--------------------------------------------------------------------+ +// INTERNAL OBJECT & FUNCTION DECLARATION +//--------------------------------------------------------------------+ +// BDT(Buffer Descriptor Table) must be 256-byte aligned +CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(512) volatile static dcd_data_t _dcd; + +TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 512, "size is not correct" ); + +#if TU_PIC_INT_SIZE == 4 +typedef uint32_t ep_reg_t; +#elif TU_PIC_INT_SIZE == 2 +typedef uint16_t ep_reg_t; +#endif + +static inline volatile void *ep_addr(uint8_t rhport, uint8_t ep_num) { +#if CFG_TUSB_MCU == OPT_MCU_PIC32MK + volatile void *ep_reg_base = rhport ? (&U2EP0) : (&U1EP0); +#else + volatile void *ep_reg_base = &U1EP0; +#endif + return ep_reg_base + 0x10 * ep_num; +} + +static inline ep_reg_t ep_read(uint8_t rhport, uint8_t ep_num) { + volatile ep_reg_t *ep = ep_addr(rhport, ep_num); + return *ep; +} + +static inline void ep_write(uint8_t rhport, uint8_t ep_num, ep_reg_t val) { + volatile ep_reg_t *ep = ep_addr(rhport, ep_num); + *ep = val; +} + +static inline void ep_clear(uint8_t rhport, uint8_t ep_num, ep_reg_t val) { +#if TU_PIC_HAS_HW_RMW + volatile ep_reg_t *ep_clr = (ep_addr(rhport, ep_num) + 0x4); + *ep_clr = val; +#else + ep_reg_t v = ep_read(rhport, ep_num); + v &= ~val; + ep_write(rhport, ep_num, v); +#endif +} + +static inline void ep_set(uint8_t rhport, uint8_t ep_num, ep_reg_t val) { +#if TU_PIC_HAS_HW_RMW + volatile ep_reg_t *ep_s = (ep_addr(rhport, ep_num) + 0x8); + *ep_s = val; +#else + ep_reg_t v = ep_read(rhport, ep_num); + v |= val; + ep_write(rhport, ep_num, v); +#endif +} + +static inline void intr_enable(uint8_t rhport) { +#if CFG_TUSB_MCU == OPT_MCU_PIC32MM + IEC0SET = _IEC0_USBIE_MASK; +#elif CFG_TUSB_MCU == OPT_MCU_PIC32MX + IEC1SET = _IEC1_USBIE_MASK; +#elif CFG_TUSB_MCU == OPT_MCU_PIC32MK + if (rhport == 0) + IEC1SET = _IEC1_USB1IE_MASK; + else + IEC7SET = _IEC7_USB2IE_MASK; +#elif (CFG_TUSB_MCU == OPT_MCU_PIC24) || (CFG_TUSB_MCU == OPT_MCU_DSPIC33) + IEC5bits.USB1IE = 1; +#endif +} + +static inline void intr_disable(uint8_t rhport) { +#if CFG_TUSB_MCU == OPT_MCU_PIC32MM + IEC0CLR = _IEC0_USBIE_MASK; +#elif CFG_TUSB_MCU == OPT_MCU_PIC32MX + IEC1CLR = _IEC1_USBIE_MASK; +#elif CFG_TUSB_MCU == OPT_MCU_PIC32MK + if (rhport == 0) + IEC1CLR = _IEC1_USB1IE_MASK; + else + IEC7CLR = _IEC7_USB2IE_MASK; +#elif (CFG_TUSB_MCU == OPT_MCU_PIC24) || (CFG_TUSB_MCU == OPT_MCU_DSPIC33) + IEC5bits.USB1IE = 0; +#endif +} + +static inline int intr_is_enabled(uint8_t rhport) { +#if CFG_TUSB_MCU == OPT_MCU_PIC32MM + return IEC0bits.USBIE; +#elif CFG_TUSB_MCU == OPT_MCU_PIC32MX + return IEC1bits.USBIE; +#elif CFG_TUSB_MCU == OPT_MCU_PIC32MK + if (rhport == 0) + return IEC1bits.USB1IE; + else + return IEC7bits.USB2IE; +#elif (CFG_TUSB_MCU == OPT_MCU_PIC24) || (CFG_TUSB_MCU == OPT_MCU_DSPIC33) + return IEC5bits.USB1IE; +#endif +} + +static inline void intr_clear(uint8_t rhport) { +#if CFG_TUSB_MCU == OPT_MCU_PIC32MM + IFS0CLR = _IFS0_USBIF_MASK; +#elif CFG_TUSB_MCU == OPT_MCU_PIC32MX + IFS1CLR = _IFS1_USBIF_MASK; +#elif CFG_TUSB_MCU == OPT_MCU_PIC32MK + if (rhport == 0) + IFS1CLR = _IFS1_USB1IF_MASK; + else + IFS7CLR = _IFS7_USB2IF_MASK; +#elif (CFG_TUSB_MCU == OPT_MCU_PIC24) || (CFG_TUSB_MCU == OPT_MCU_DSPIC33) + IFS5bits.USB1IF = 0; +#endif +} + +static void prepare_next_setup_packet(uint8_t rhport) +{ + const unsigned out_odd = _dcd.endpoint[0][0].odd; + const unsigned in_odd = _dcd.endpoint[0][1].odd; + TU_ASSERT(0 == _dcd.bdt[0][0][out_odd].own, ); + + _dcd.bdt[0][0][out_odd].data = 0; + _dcd.bdt[0][0][out_odd ^ 1].data = 1; + _dcd.bdt[0][1][in_odd].data = 1; + _dcd.bdt[0][1][in_odd ^ 1].data = 0; + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_OUT), + _dcd.setup_packet, sizeof(_dcd.setup_packet)); +} + +static void process_stall(uint8_t rhport) +{ + for (int i = 0; i < 16; ++i) { + unsigned const endpt = ep_read(rhport, i); + + if (endpt & _U1EP0_EPSTALL_MASK) { + // prepare next setup if endpoint0 + if ( i == 0 ) prepare_next_setup_packet(rhport); + + // clear stall bit + ep_clear(rhport, i, _U1EP0_EPSTALL_MASK); + } + } +} + +static void process_tokdne(uint8_t rhport) +{ + uint32_t s = U1STAT; + + U1IR = _U1IR_TRNIF_MASK; + + uint8_t epnum = (s >> _U1STAT_ENDPT0_POSITION); + uint8_t dir = (s & _U1STAT_DIR_MASK) >> _U1STAT_DIR_POSITION; + unsigned odd = (s & _U1STAT_PPBI_MASK) ? 1 : 0; + + buffer_descriptor_t *bd = (buffer_descriptor_t *)&_dcd.bda[s]; + endpoint_state_t *ep = &_dcd.endpoint_unified[s >> 3]; + + /* fetch pid before discarded by the next steps */ + const unsigned pid = bd->tok_pid; + + /* reset values for a next transfer */ + bd->bdt_stall = 0; + bd->dts = 1; + bd->ninc = 0; + bd->keep = 0; + /* update the odd variable to prepare for the next transfer */ + ep->odd = odd ^ 1; + if (pid == TOK_PID_SETUP) { + dcd_event_setup_received(rhport, (uint8_t *)PA_TO_KVA1(bd->addr), true); + U1CONCLR = _U1CON_PKTDIS_TOKBUSY_MASK; + return; + } + + const unsigned bc = bd->bc; + const unsigned remaining = ep->remaining - bc; + if (remaining && bc == ep->max_packet_size) { + /* continue the transferring consecutive data */ + ep->remaining = remaining; + const int next_remaining = remaining - ep->max_packet_size; + if (next_remaining > 0) { + /* prepare to the after next transfer */ + bd->addr += ep->max_packet_size * 2; + bd->bc = next_remaining > ep->max_packet_size ? ep->max_packet_size: next_remaining; + bd->own = 1; /* the own bit must set after addr */ + } + return; + } + const unsigned length = ep->length; + dcd_event_xfer_complete(rhport, + tu_edpt_addr(epnum, dir), + length - remaining, XFER_RESULT_SUCCESS, true); + if (0 == epnum && 0 == length) { + /* After completion a ZLP of control transfer, + * it prepares for the next steup transfer. */ + if (_dcd.addr) { + /* When the transfer was the SetAddress, + * the device address should be updated here. */ + U1ADDR = _dcd.addr; + _dcd.addr = 0; + } + prepare_next_setup_packet(rhport); + } +} + +static void process_bus_reset(uint8_t rhport) +{ + U1PWRCCLR = _U1PWRC_USUSPEND_MASK; + U1CONSET = _U1CON_PPBRST_MASK; + U1ADDR = 0; + + U1IE = _U1IE_URSTIE_DETACHIE_MASK | _U1IE_TRNIE_MASK | _U1IE_IDLEIE_MASK | + _U1IE_UERRIE_MASK | _U1IE_STALLIE_MASK; + + U1EP0 = _U1EP0_EPHSHK_MASK | _U1EP0_EPRXEN_MASK | _U1EP0_EPTXEN_MASK; + + for (unsigned i = 1; i < 16; ++i) { + ep_write(rhport, i, 0); + } + + buffer_descriptor_t *bd = _dcd.bdt[0][0]; + for (unsigned i = 0; i < sizeof(_dcd.bdt)/sizeof(*bd); ++i, ++bd) { + bd->head = 0; + } + const endpoint_state_t ep0 = { + .max_packet_size = CFG_TUD_ENDPOINT0_SIZE, + .odd = 0, + .length = 0, + .remaining = 0, + }; + _dcd.endpoint[0][0] = ep0; + _dcd.endpoint[0][1] = ep0; + tu_memclr(_dcd.endpoint[1], sizeof(_dcd.endpoint) - sizeof(_dcd.endpoint[0])); + _dcd.addr = 0; + prepare_next_setup_packet(rhport); + U1CONCLR = _U1CON_PPBRST_MASK; + dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true); +} + +static void process_bus_sleep(uint8_t rhport) +{ + // Enable resume & disable suspend interrupt + dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); +} + +static void process_bus_resume(uint8_t rhport) +{ + // Enable suspend & disable resume interrupt + U1PWRCCLR = _U1PWRC_USUSPEND_MASK; + U1IECLR = _U1IE_RESUMEIE_MASK; + U1IESET = _U1IE_IDLEIE_MASK; + + dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); +} + +/*------------------------------------------------------------------*/ +/* Device API + *------------------------------------------------------------------*/ +void dcd_init(uint8_t rhport) +{ + intr_disable(rhport); + intr_clear(rhport); + +#if CFG_TUSB_MCU == OPT_MCU_PIC32MM + TRISBbits.TRISB6 = 1; +#endif + +#if (CFG_TUSB_MCU == OPT_MCU_PIC32MX) || (CFG_TUSB_MCU == OPT_MCU_PIC32MM) + U1PWRCSET = _U1PWRC_USBPWR_MASK; +#elif CFG_TUSB_MCU == OPT_MCU_PIC32MK + // TODO +#elif (CFG_TUSB_MCU == OPT_MCU_PIC24) || (CFG_TUSB_MCU == OPT_MCU_DSPIC33) + U1PWRCbits.USBPWR = 1; +#endif + + tu_memclr(&_dcd, sizeof(_dcd)); + + uint32_t bdt_phys = KVA_TO_PA((uintptr_t)_dcd.bdt); + + U1BDTP1 = (uint8_t)(bdt_phys >> 8); + U1BDTP2 = (uint8_t)(bdt_phys >> 16); + U1BDTP3 = (uint8_t)(bdt_phys >> 24); + + U1IE = _U1IE_URSTIE_DETACHIE_MASK; + + dcd_connect(rhport); + +} + +void dcd_int_enable(uint8_t rhport) +{ + intr_enable(rhport); +} + +void dcd_int_disable(uint8_t rhport) +{ + intr_disable(rhport); +} + +void dcd_set_address(uint8_t rhport, uint8_t dev_addr) +{ + _dcd.addr = dev_addr & 0x7F; + /* Response with status first before changing device address */ + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); +} + +void dcd_remote_wakeup(uint8_t rhport) +{ + U1CONSET = _U1CON_RESUME_MASK; + + unsigned cnt = 25000000 / 1000; + while (cnt--) asm volatile("nop"); + + U1CONCLR = _U1CON_RESUME_MASK; +} + +void dcd_connect(uint8_t rhport) +{ + while (!U1CONbits.USBEN) + U1CONSET = _U1CON_USBEN_SOFEN_MASK; +} + +void dcd_disconnect(uint8_t rhport) +{ + U1CON = 0; +} + +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; +} + +//--------------------------------------------------------------------+ +// Endpoint API +//--------------------------------------------------------------------+ +bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) +{ + const unsigned ep_addr = ep_desc->bEndpointAddress; + const unsigned epn = tu_edpt_number(ep_addr); + const unsigned dir = tu_edpt_dir(ep_addr); + const unsigned xfer = ep_desc->bmAttributes.xfer; + endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; + const unsigned odd = ep->odd; + buffer_descriptor_t *bd = _dcd.bdt[epn][dir]; + + /* No support for control transfer */ + TU_ASSERT(epn && (xfer != TUSB_XFER_CONTROL)); + + ep->max_packet_size = tu_edpt_packet_size(ep_desc); + + unsigned val = _U1EP0_EPCONDIS_MASK; + val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? _U1EP0_EPHSHK_MASK : 0; + val |= dir ? _U1EP0_EPTXEN_MASK : _U1EP0_EPRXEN_MASK; + + volatile void *ep_reg_base = &U1EP0; + volatile uint32_t *reg_ep = (ep_reg_base + 0x10 * epn); + + *reg_ep |= val; + + if (xfer != TUSB_XFER_ISOCHRONOUS) { + bd[odd].dts = 1; + bd[odd].data = 0; + bd[odd ^ 1].dts = 1; + bd[odd ^ 1].data = 1; + } + + return true; +} + +void dcd_edpt_close_all(uint8_t rhport) +{ + const unsigned ie = intr_is_enabled(rhport); + intr_disable(rhport); + + for (unsigned i = 1; i < 16; ++i) { + ep_write(rhport, i, 0); + } + + if (ie) intr_enable(rhport); + + buffer_descriptor_t *bd = _dcd.bdt[1][0]; + for (unsigned i = 2; i < sizeof(_dcd.bdt)/sizeof(*bd); ++i, ++bd) { + bd->head = 0; + } + endpoint_state_t *ep = &_dcd.endpoint[1][0]; + for (unsigned i = 2; i < sizeof(_dcd.endpoint)/sizeof(*ep); ++i, ++ep) { + /* Clear except the odd */ + ep->max_packet_size = 0; + ep->length = 0; + ep->remaining = 0; + } +} + +void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) +{ + const unsigned epn = tu_edpt_number(ep_addr); + const unsigned dir = tu_edpt_dir(ep_addr); + endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; + buffer_descriptor_t *bd = _dcd.bdt[epn][dir]; + const unsigned msk = dir ? _U1EP0_EPTXEN_MASK : _U1EP0_EPRXEN_MASK; + const unsigned ie = intr_is_enabled(rhport); + + intr_disable(rhport); + + ep_clear(rhport, epn, msk); + + ep->max_packet_size = 0; + ep->length = 0; + ep->remaining = 0; + bd[0].head = 0; + bd[1].head = 0; + + if (ie) intr_enable(rhport); +} + +bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) +{ + const unsigned epn = tu_edpt_number(ep_addr); + const unsigned dir = tu_edpt_dir(ep_addr); + endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; + buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][ep->odd]; + TU_ASSERT(0 == bd->own); + + const unsigned ie = intr_is_enabled(rhport); + + intr_disable(rhport); + + ep->length = total_bytes; + ep->remaining = total_bytes; + + const unsigned mps = ep->max_packet_size; + if (total_bytes > mps) { + buffer_descriptor_t *next = ep->odd ? bd - 1: bd + 1; + /* When total_bytes is greater than the max packet size, + * it prepares to the next transfer to avoid NAK in advance. */ + next->bc = total_bytes >= 2 * mps ? mps: total_bytes - mps; + next->addr = (uint8_t *)KVA_TO_PA(buffer + mps); + next->own = 1; + } + bd->bc = total_bytes >= mps ? mps: total_bytes; + bd->addr = (uint8_t *)KVA_TO_PA(buffer); +// __DSB(); + bd->own = 1; /* This bit must be set last */ + + if (ie) intr_enable(rhport); + + return true; +} + +void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) +{ + (void) rhport; + const unsigned epn = tu_edpt_number(ep_addr); + + if (0 == epn) { + ep_set(rhport, epn, _U1EP0_EPSTALL_MASK); + } else { + const unsigned dir = tu_edpt_dir(ep_addr); + const unsigned odd = _dcd.endpoint[epn][dir].odd; + buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][odd]; + TU_ASSERT(0 == bd->own,); + + const unsigned ie = intr_is_enabled(rhport); + + intr_disable(rhport); + + bd->bdt_stall = 1; + bd->own = 1; /* This bit must be set last */ + + if (ie) intr_enable(rhport); + } +} + +void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) +{ + const unsigned epn = tu_edpt_number(ep_addr); + TU_VERIFY(epn,); + const unsigned dir = tu_edpt_dir(ep_addr); + const unsigned odd = _dcd.endpoint[epn][dir].odd; + buffer_descriptor_t *bd = _dcd.bdt[epn][dir]; + TU_VERIFY(bd[odd].own,); + + const unsigned ie = intr_is_enabled(rhport); + + intr_disable(rhport); + + bd[odd].own = 0; + + // clear stall + bd[odd].bdt_stall = 0; + + // Reset data toggle + bd[odd ].data = 0; + bd[odd ^ 1].data = 1; + + // We already cleared this in ISR, but just clear it here to be safe + const unsigned endpt = ep_read(rhport, epn); + if (endpt & _U1EP0_EPSTALL_MASK) { + ep_clear(rhport, endpt, _U1EP0_EPSTALL_MASK); + } + + if (ie) intr_enable(rhport); +} + +//--------------------------------------------------------------------+ +// ISR +//--------------------------------------------------------------------+ +void dcd_int_handler(uint8_t rhport) +{ + uint32_t is = U1IR; + uint32_t msk = U1IE; + + U1IR = is & ~msk; + is &= msk; + + if (is & _U1IR_UERRIF_MASK) { + uint32_t es = U1EIR; + U1EIR = es; + U1IR = is; /* discard any pending events */ + } + + if (is & _U1IR_URSTIF_DETACHIF_MASK) { + U1IR = is; /* discard any pending events */ + process_bus_reset(rhport); + } + + if (is & _U1IR_IDLEIF_MASK) { + // Note Host usually has extra delay after bus reset (without SOF), which could falsely + // detected as Sleep event. Though usbd has debouncing logic so we are good + U1IR = _U1IR_IDLEIF_MASK; + process_bus_sleep(rhport); + } + + if (is & _U1IR_RESUMEIF_MASK) { + U1IR = _U1IR_RESUMEIF_MASK; + process_bus_resume(rhport); + } + + if (is & _U1IR_SOFIF_MASK) { + U1IR = _U1IR_SOFIF_MASK; + dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); + } + + if (is & _U1IR_STALLIF_MASK) { + U1IR = _U1IR_STALLIF_MASK; + process_stall(rhport); + } + + if (is & _U1IR_TRNIF_MASK) { + process_tokdne(rhport); + } + + intr_clear(rhport); + +} + +#endif diff --git a/src/tusb_option.h b/src/tusb_option.h index e7fc68858..4c2dd0258 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -146,6 +146,11 @@ typedef int make_iso_compilers_happy; // PIC #define OPT_MCU_PIC32MZ 1900 ///< MicroChip PIC32MZ family +#define OPT_MCU_PIC32MM 1901 ///< MicroChip PIC32MM family +#define OPT_MCU_PIC32MX 1902 ///< MicroChip PIC32MX family +#define OPT_MCU_PIC32MK 1903 ///< MicroChip PIC32MK family +#define OPT_MCU_PIC24 1910 ///< MicroChip PIC24 family +#define OPT_MCU_DSPIC33 1911 ///< MicroChip DSPIC33 family // BridgeTek #define OPT_MCU_FT90X 2000 ///< BridgeTek FT90x -- cgit v1.3.1 From 0931b52b66864ab680f1e5b52eb0c20d028f5558 Mon Sep 17 00:00:00 2001 From: jmark1m Date: Wed, 7 Sep 2022 15:10:44 -0500 Subject: Fix bug #1628 by preventing shared irq slots for filling up --- src/portable/raspberrypi/rp2040/hcd_rp2040.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/portable') diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c index e9118c6a3..6ca992954 100644 --- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c @@ -380,6 +380,9 @@ bool hcd_init(uint8_t rhport) // Force VBUS detect to always present, for now we assume vbus is always provided (without using VBUS En) usb_hw->pwr = USB_USB_PWR_VBUS_DETECT_BITS | USB_USB_PWR_VBUS_DETECT_OVERRIDE_EN_BITS; + // Remove shared irq if it was previously added so as not to fill up shared irq slots + irq_remove_handler(USBCTRL_IRQ, hcd_rp2040_irq); + irq_add_shared_handler(USBCTRL_IRQ, hcd_rp2040_irq, PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY); // clear epx and interrupt eps -- cgit v1.3.1 From 7a48b1f0d191093caa59c4fcb5c4f85fa2e53323 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 13 Sep 2022 11:04:48 +0700 Subject: re-added code in pr 1438 to fix compile with h7 with 1 usb otg --- src/portable/synopsys/dwc2/dwc2_stm32.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/portable') diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index 1187e0d6e..337f611d8 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -64,6 +64,10 @@ // NOTE: H7 with only 1 USB port: H72x / H73x / H7Ax / H7Bx // USB_OTG_FS_PERIPH_BASE and OTG_FS_IRQn not defined + #if (! defined USB2_OTG_FS) + #define USB_OTG_FS_PERIPH_BASE USB1_OTG_HS_PERIPH_BASE + #define OTG_FS_IRQn OTG_HS_IRQn + #endif #elif CFG_TUSB_MCU == OPT_MCU_STM32F7 #include "stm32f7xx.h" -- cgit v1.3.1 From 3133cacc6ab699244617039462f5c3870e16d835 Mon Sep 17 00:00:00 2001 From: Jerzy Kasenberg Date: Tue, 13 Sep 2022 08:10:58 +0200 Subject: nrf5x: Fix reception of large ISO packets ISO packet size is up to 1023 for full speed device. Upon completion of ISO reception, reported length of incoming packet was truncated to one byte only. This results in incorrect data stream for higher bit rates 48 samples * 4 bytes per sample * 2 channels = 384 bytes of data and 128 was reported. There is no change in logic extending xact_len to uint16_t fixes the issue. --- src/portable/nordic/nrf5x/dcd_nrf5x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/portable') diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index f213e9f9f..ca37d799f 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -765,7 +765,7 @@ void dcd_int_handler(uint8_t rhport) if ( tu_bit_test(int_status, USBD_INTEN_ENDEPOUT0_Pos+epnum)) { xfer_td_t* xfer = get_td(epnum, TUSB_DIR_OUT); - uint8_t const xact_len = NRF_USBD->EPOUT[epnum].AMOUNT; + uint16_t const xact_len = NRF_USBD->EPOUT[epnum].AMOUNT; xfer->buffer += xact_len; xfer->actual_len += xact_len; -- cgit v1.3.1 From 988eeb50c6c962279360b457803859956a0d38e4 Mon Sep 17 00:00:00 2001 From: mingpepe Date: Wed, 5 Oct 2022 21:26:22 +0800 Subject: Fix typo for log in dcd_rp2040.c --- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/portable') diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index 2003f72fd..4952d29b1 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -88,7 +88,7 @@ static void _hw_endpoint_alloc(struct hw_endpoint *ep, uint8_t transfer_type) uint dpram_offset = hw_data_offset(ep->hw_data_buf); hard_assert(hw_data_offset(next_buffer_ptr) <= USB_DPRAM_MAX); - pico_info(" Alloced %d bytes at offset 0x%x (0x%p)\r\n", size, dpram_offset, ep->hw_data_buf); + pico_info(" Allocated %d bytes at offset 0x%x (0x%p)\r\n", size, dpram_offset, ep->hw_data_buf); // Fill in endpoint control register with buffer offset uint32_t const reg = EP_CTRL_ENABLE_BITS | ((uint)transfer_type << EP_CTRL_BUFFER_TYPE_LSB) | dpram_offset; -- cgit v1.3.1 From 8096afc6dea975e95e0b50dc4b55926236b90b62 Mon Sep 17 00:00:00 2001 From: ReimuNotMoe <34613827+ReimuNotMoe@users.noreply.github.com> Date: Thu, 6 Oct 2022 03:45:51 +0800 Subject: Microchip PIC24/dsPIC33 device mode support --- src/common/tusb_mcu.h | 5 ++ src/portable/microchip/pic/dcd_pic.c | 139 +++++++++++++++++++++++++++-------- 2 files changed, 112 insertions(+), 32 deletions(-) (limited to 'src/portable') diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index baa82fc14..514ffcd4d 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -111,6 +111,11 @@ #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER +#elif TU_CHECK_MCU(OPT_MCU_PIC32MX, OPT_MCU_PIC32MM, OPT_MCU_PIC32MK) || \ + TU_CHECK_MCU(OPT_MCU_PIC24, OPT_MCU_DSPIC33) + #define TUP_DCD_ENDPOINT_MAX 16 + #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER + //------------- ST -------------// #elif TU_CHECK_MCU(OPT_MCU_STM32F0) #define TUP_DCD_ENDPOINT_MAX 8 diff --git a/src/portable/microchip/pic/dcd_pic.c b/src/portable/microchip/pic/dcd_pic.c index df9b2ff01..6cf0e6285 100644 --- a/src/portable/microchip/pic/dcd_pic.c +++ b/src/portable/microchip/pic/dcd_pic.c @@ -39,14 +39,10 @@ #if (CFG_TUSB_MCU == OPT_MCU_PIC32MX || CFG_TUSB_MCU == OPT_MCU_PIC32MM || CFG_TUSB_MCU == OPT_MCU_PIC32MK) -#define TU_PIC_HAS_MMU 1 -#define TU_PIC_HAS_HW_RMW 1 #define TU_PIC_INT_SIZE 4 #elif (CFG_TUSB_MCU == OPT_MCU_PIC24 || CFG_TUSB_MCU == OPT_MCU_DSPIC33) -#define TU_PIC_HAS_MMU 0 -#define TU_PIC_HAS_HW_RMW 0 #define TU_PIC_INT_SIZE 2 #else @@ -56,7 +52,7 @@ #endif -#if TU_PIC_HAS_MMU +#if TU_PIC_INT_SIZE == 4 #ifndef KVA_TO_PA #define KVA_TO_PA(kva) ((uint32_t)(kva) & 0x1fffffff) @@ -89,6 +85,8 @@ enum { TOK_PID_SETUP = 0xDu, }; +// The BDT is 8 bytes on 32bit PICs and 4 bytes on 8/16bit PICs +#if TU_PIC_INT_SIZE == 4 typedef struct TU_ATTR_PACKED { union { @@ -119,6 +117,37 @@ typedef struct TU_ATTR_PACKED } buffer_descriptor_t; TU_VERIFY_STATIC( sizeof(buffer_descriptor_t) == 8, "size is not correct" ); +#else +typedef struct TU_ATTR_PACKED +{ + union { + uint16_t head; + + struct { + uint16_t : 10; + uint16_t tok_pid : 4; + uint16_t data : 1; + uint16_t own : 1; + }; + struct { + uint16_t : 10; + uint16_t bdt_stall : 1; + uint16_t dts : 1; + uint16_t ninc : 1; + uint16_t keep : 1; + }; + + struct { + uint16_t bc : 10; + uint16_t : 6; + }; + }; + uint8_t *addr; +} buffer_descriptor_t; + +TU_VERIFY_STATIC( sizeof(buffer_descriptor_t) == 4, "size is not correct" ); +#endif + typedef struct TU_ATTR_PACKED { @@ -142,7 +171,11 @@ typedef struct union { /* [#EP][OUT,IN][EVEN,ODD] */ buffer_descriptor_t bdt[16][2][2]; - uint16_t bda[512]; +#if TU_PIC_INT_SIZE == 4 + uint16_t bda[256]; +#else + uint8_t bda[256]; +#endif }; TU_ATTR_ALIGNED(4) union { endpoint_state_t endpoint[16][2]; @@ -158,7 +191,11 @@ typedef struct // BDT(Buffer Descriptor Table) must be 256-byte aligned CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(512) volatile static dcd_data_t _dcd; +#if TU_PIC_INT_SIZE == 4 TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 512, "size is not correct" ); +#else +TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 256, "size is not correct" ); +#endif #if TU_PIC_INT_SIZE == 4 typedef uint32_t ep_reg_t; @@ -172,7 +209,12 @@ static inline volatile void *ep_addr(uint8_t rhport, uint8_t ep_num) { #else volatile void *ep_reg_base = &U1EP0; #endif - return ep_reg_base + 0x10 * ep_num; +#if TU_PIC_INT_SIZE == 4 + const size_t offset = 0x10; +#else + const size_t offset = 0x2; +#endif + return ep_reg_base + offset * ep_num; } static inline ep_reg_t ep_read(uint8_t rhport, uint8_t ep_num) { @@ -186,7 +228,7 @@ static inline void ep_write(uint8_t rhport, uint8_t ep_num, ep_reg_t val) { } static inline void ep_clear(uint8_t rhport, uint8_t ep_num, ep_reg_t val) { -#if TU_PIC_HAS_HW_RMW +#if TU_PIC_INT_SIZE == 4 volatile ep_reg_t *ep_clr = (ep_addr(rhport, ep_num) + 0x4); *ep_clr = val; #else @@ -197,7 +239,7 @@ static inline void ep_clear(uint8_t rhport, uint8_t ep_num, ep_reg_t val) { } static inline void ep_set(uint8_t rhport, uint8_t ep_num, ep_reg_t val) { -#if TU_PIC_HAS_HW_RMW +#if TU_PIC_INT_SIZE == 4 volatile ep_reg_t *ep_s = (ep_addr(rhport, ep_num) + 0x8); *ep_s = val; #else @@ -278,7 +320,7 @@ static void prepare_next_setup_packet(uint8_t rhport) _dcd.bdt[0][1][in_odd].data = 1; _dcd.bdt[0][1][in_odd ^ 1].data = 0; dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_OUT), - _dcd.setup_packet, sizeof(_dcd.setup_packet)); + _dcd.setup_packet, sizeof(_dcd.setup_packet)); } static void process_stall(uint8_t rhport) @@ -298,7 +340,7 @@ static void process_stall(uint8_t rhport) static void process_tokdne(uint8_t rhport) { - uint32_t s = U1STAT; + ep_reg_t s = U1STAT; U1IR = _U1IR_TRNIF_MASK; @@ -321,7 +363,11 @@ static void process_tokdne(uint8_t rhport) ep->odd = odd ^ 1; if (pid == TOK_PID_SETUP) { dcd_event_setup_received(rhport, (uint8_t *)PA_TO_KVA1(bd->addr), true); +#if TU_PIC_INT_SIZE == 4 U1CONCLR = _U1CON_PKTDIS_TOKBUSY_MASK; +#else + U1CONbits.PKTDIS = 0; +#endif return; } @@ -341,8 +387,8 @@ static void process_tokdne(uint8_t rhport) } const unsigned length = ep->length; dcd_event_xfer_complete(rhport, - tu_edpt_addr(epnum, dir), - length - remaining, XFER_RESULT_SUCCESS, true); + tu_edpt_addr(epnum, dir), + length - remaining, XFER_RESULT_SUCCESS, true); if (0 == epnum && 0 == length) { /* After completion a ZLP of control transfer, * it prepares for the next steup transfer. */ @@ -358,11 +404,16 @@ static void process_tokdne(uint8_t rhport) static void process_bus_reset(uint8_t rhport) { +#if TU_PIC_INT_SIZE == 4 U1PWRCCLR = _U1PWRC_USUSPEND_MASK; U1CONSET = _U1CON_PPBRST_MASK; +#else + U1PWRCbits.USUSPND = 0; + U1CONbits.PPBRST = 1; +#endif U1ADDR = 0; - U1IE = _U1IE_URSTIE_DETACHIE_MASK | _U1IE_TRNIE_MASK | _U1IE_IDLEIE_MASK | + U1IE = _U1IE_URSTIE_MASK | _U1IE_TRNIE_MASK | _U1IE_IDLEIE_MASK | _U1IE_UERRIE_MASK | _U1IE_STALLIE_MASK; U1EP0 = _U1EP0_EPHSHK_MASK | _U1EP0_EPRXEN_MASK | _U1EP0_EPTXEN_MASK; @@ -386,7 +437,11 @@ static void process_bus_reset(uint8_t rhport) tu_memclr(_dcd.endpoint[1], sizeof(_dcd.endpoint) - sizeof(_dcd.endpoint[0])); _dcd.addr = 0; prepare_next_setup_packet(rhport); +#if TU_PIC_INT_SIZE == 4 U1CONCLR = _U1CON_PPBRST_MASK; +#else + U1CONbits.PPBRST = 0; +#endif dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true); } @@ -399,9 +454,15 @@ static void process_bus_sleep(uint8_t rhport) static void process_bus_resume(uint8_t rhport) { // Enable suspend & disable resume interrupt +#if TU_PIC_INT_SIZE == 4 U1PWRCCLR = _U1PWRC_USUSPEND_MASK; U1IECLR = _U1IE_RESUMEIE_MASK; U1IESET = _U1IE_IDLEIE_MASK; +#else + U1PWRCbits.USUSPND = 0; + U1IEbits.RESUMEIE = 0; + U1IEbits.IDLEIE = 1; +#endif dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); } @@ -418,26 +479,29 @@ void dcd_init(uint8_t rhport) TRISBbits.TRISB6 = 1; #endif -#if (CFG_TUSB_MCU == OPT_MCU_PIC32MX) || (CFG_TUSB_MCU == OPT_MCU_PIC32MM) + tu_memclr(&_dcd, sizeof(_dcd)); + +#if TU_PIC_INT_SIZE == 4 U1PWRCSET = _U1PWRC_USBPWR_MASK; -#elif CFG_TUSB_MCU == OPT_MCU_PIC32MK - // TODO -#elif (CFG_TUSB_MCU == OPT_MCU_PIC24) || (CFG_TUSB_MCU == OPT_MCU_DSPIC33) +#else U1PWRCbits.USBPWR = 1; #endif - - tu_memclr(&_dcd, sizeof(_dcd)); - + +#if TU_PIC_INT_SIZE == 4 uint32_t bdt_phys = KVA_TO_PA((uintptr_t)_dcd.bdt); U1BDTP1 = (uint8_t)(bdt_phys >> 8); U1BDTP2 = (uint8_t)(bdt_phys >> 16); U1BDTP3 = (uint8_t)(bdt_phys >> 24); +#else + U1BDTP1 = (uint8_t)((uint16_t)(void *)_dcd.bdt >> 8); - U1IE = _U1IE_URSTIE_DETACHIE_MASK; + U1CNFG1bits.PPB = 2; +#endif - dcd_connect(rhport); + U1IE = _U1IE_URSTIE_MASK; + dcd_connect(rhport); } void dcd_int_enable(uint8_t rhport) @@ -459,18 +523,30 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr) void dcd_remote_wakeup(uint8_t rhport) { +#if TU_PIC_INT_SIZE == 4 U1CONSET = _U1CON_RESUME_MASK; - +#else + U1CONbits.RESUME = 1; +#endif unsigned cnt = 25000000 / 1000; while (cnt--) asm volatile("nop"); +#if TU_PIC_INT_SIZE == 4 U1CONCLR = _U1CON_RESUME_MASK; +#else + U1CONbits.RESUME = 0; +#endif } void dcd_connect(uint8_t rhport) { - while (!U1CONbits.USBEN) + while (!U1CONbits.USBEN) { +#if TU_PIC_INT_SIZE == 4 U1CONSET = _U1CON_USBEN_SOFEN_MASK; +#else + U1CONbits.USBEN = 1; +#endif + } } void dcd_disconnect(uint8_t rhport) @@ -502,14 +578,14 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) ep->max_packet_size = tu_edpt_packet_size(ep_desc); + unsigned val = _U1EP0_EPCONDIS_MASK; val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? _U1EP0_EPHSHK_MASK : 0; val |= dir ? _U1EP0_EPTXEN_MASK : _U1EP0_EPRXEN_MASK; - volatile void *ep_reg_base = &U1EP0; - volatile uint32_t *reg_ep = (ep_reg_base + 0x10 * epn); - - *reg_ep |= val; + ep_reg_t tmp = ep_read(rhport, epn); + tmp |= val; + ep_write(rhport, epn, tmp); if (xfer != TUSB_XFER_ISOCHRONOUS) { bd[odd].dts = 1; @@ -569,6 +645,7 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) { + const unsigned epn = tu_edpt_number(ep_addr); const unsigned dir = tu_edpt_dir(ep_addr); endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; @@ -593,7 +670,6 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to } bd->bc = total_bytes >= mps ? mps: total_bytes; bd->addr = (uint8_t *)KVA_TO_PA(buffer); -// __DSB(); bd->own = 1; /* This bit must be set last */ if (ie) intr_enable(rhport); @@ -673,7 +749,7 @@ void dcd_int_handler(uint8_t rhport) U1IR = is; /* discard any pending events */ } - if (is & _U1IR_URSTIF_DETACHIF_MASK) { + if (is & _U1IR_URSTIF_MASK) { U1IR = is; /* discard any pending events */ process_bus_reset(rhport); } @@ -705,7 +781,6 @@ void dcd_int_handler(uint8_t rhport) } intr_clear(rhport); - } #endif -- cgit v1.3.1 From 16f1554a03a89c51cd033b6a06cb758668f32fda Mon Sep 17 00:00:00 2001 From: tswan-quasi Date: Tue, 11 Oct 2022 09:59:28 -0400 Subject: lpc55s69 isochronous, dummy address for endpoint buffers to prevent accidental writes --- src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 96 +++++++++++++++++----------- 1 file changed, 59 insertions(+), 37 deletions(-) (limited to 'src/portable') diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index 09ebf3b0d..b0ddebad0 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -78,8 +78,9 @@ typedef struct { // Max nbytes for each control/bulk/interrupt transfer enum { - NBYTES_CBI_FULLSPEED_MAX = 64, - NBYTES_CBI_HIGHSPEED_MAX = 32767 // can be up to all 15-bit, but only tested with 4096 + NBYTES_CBI_FS_ISO_MAX = 1023, // FS ISO + NBYTES_CBI_FS_MAX = 64, // FS control/bulk/interrupt + NBYTES_CBI_HS_MAX = 32767 // can be up to all 15-bit, but only tested with 4096 }; enum { @@ -174,6 +175,7 @@ typedef struct // For example: LPC55s69 port1 Highspeed must be USB_RAM (0x40100000) // Use CFG_TUSB_MEM_SECTION to place it accordingly. CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(256) static dcd_data_t _dcd; +CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(256) static volatile uint8_t dummy[64]; // TODO temp fix to prevent accidental overwrite due to ep[][].buffer_xx.offset being 0 //--------------------------------------------------------------------+ // Multiple Controllers @@ -225,8 +227,44 @@ static inline uint8_t ep_addr2id(uint8_t ep_addr) //--------------------------------------------------------------------+ // CONTROLLER API //--------------------------------------------------------------------+ + +static void prepare_setup_packet(uint8_t rhport) +{ + if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL ) + { + _dcd.ep[0][1].buffer_fs.offset = get_buf_offset(_dcd.setup_packet); + }else + { + _dcd.ep[0][1].buffer_hs.offset = get_buf_offset(_dcd.setup_packet); + } +} + +static void edpt_reset(uint8_t rhport, uint8_t ep_id) +{ + const uint32_t offset = get_buf_offset((void*)dummy); + tu_memclr(&_dcd.ep[ep_id], sizeof(_dcd.ep[ep_id])); + if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL ) + { + _dcd.ep[ep_id][0].buffer_fs.offset = _dcd.ep[ep_id][1].buffer_fs.offset = offset; + } + else + { + _dcd.ep[ep_id][0].buffer_hs.offset = _dcd.ep[ep_id][1].buffer_hs.offset = offset; + } +} + +static void edpt_reset_all(uint8_t rhport) +{ + for (uint8_t ep_id = 0; ep_id < 2*_dcd_controller[rhport].ep_pairs; ++ep_id) + { + edpt_reset(rhport, ep_id); + } + prepare_setup_packet(rhport); +} void dcd_init(uint8_t rhport) { + edpt_reset_all(rhport); + dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; dcd_reg->EPLISTSTART = (uint32_t) _dcd.ep; @@ -310,18 +348,13 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) { - (void) rhport; - - // TODO not support ISO yet - TU_VERIFY(p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS); - //------------- Prepare Queue Head -------------// uint8_t ep_id = ep_addr2id(p_endpoint_desc->bEndpointAddress); // Check if endpoint is available TU_ASSERT( _dcd.ep[ep_id][0].disable && _dcd.ep[ep_id][1].disable ); - tu_memclr(_dcd.ep[ep_id], 2*sizeof(ep_cmd_sts_t)); + edpt_reset(rhport, ep_id); _dcd.ep[ep_id][0].is_iso = (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS); // Enable EP interrupt @@ -333,19 +366,18 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) void dcd_edpt_close_all (uint8_t rhport) { - (void) rhport; - // TODO implement dcd_edpt_close_all() + for (uint8_t ep_id = 0; ep_id < 2*_dcd_controller[rhport].ep_pairs; ++ep_id) + { + _dcd.ep[ep_id][0].active = _dcd.ep[ep_id][0].active = 0; // TODO proper way is to EPSKIP then wait ep[][].active then write ep[][].disable (see table 778 in LPC55S69 Use Manual) + _dcd.ep[ep_id][0].disable = _dcd.ep[ep_id][1].disable = 1; + } } -static void prepare_setup_packet(uint8_t rhport) +void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) { - if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL ) - { - _dcd.ep[0][1].buffer_fs.offset = get_buf_offset(_dcd.setup_packet);; - }else - { - _dcd.ep[0][1].buffer_hs.offset = get_buf_offset(_dcd.setup_packet);; - } + uint8_t ep_id = ep_addr2id(ep_addr); + _dcd.ep[ep_id][0].active = _dcd.ep[ep_id][0].active = 0; // TODO proper way is to EPSKIP then wait ep[][].active then write ep[][].disable (see table 778 in LPC55S69 Use Manual) + _dcd.ep[ep_id][0].disable = _dcd.ep[ep_id][1].disable = 1; } static void prepare_ep_xfer(uint8_t rhport, uint8_t ep_id, uint16_t buf_offset, uint16_t total_bytes) @@ -354,13 +386,12 @@ static void prepare_ep_xfer(uint8_t rhport, uint8_t ep_id, uint16_t buf_offset, if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL ) { - // TODO ISO FullSpeed can have up to 1023 bytes - nbytes = tu_min16(total_bytes, NBYTES_CBI_FULLSPEED_MAX); + nbytes = tu_min16(total_bytes, _dcd.ep[ep_id][0].is_iso ? NBYTES_CBI_FS_ISO_MAX : NBYTES_CBI_FS_MAX); _dcd.ep[ep_id][0].buffer_fs.offset = buf_offset; _dcd.ep[ep_id][0].buffer_fs.nbytes = nbytes; }else { - nbytes = tu_min16(total_bytes, NBYTES_CBI_HIGHSPEED_MAX); + nbytes = tu_min16(total_bytes, NBYTES_CBI_HS_MAX); _dcd.ep[ep_id][0].buffer_hs.offset = buf_offset; _dcd.ep[ep_id][0].buffer_hs.nbytes = nbytes; } @@ -379,7 +410,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to tu_memclr(&_dcd.dma[ep_id], sizeof(xfer_dma_t)); _dcd.dma[ep_id].total_bytes = total_bytes; - prepare_ep_xfer(rhport, ep_id, get_buf_offset(buffer), total_bytes); + prepare_ep_xfer(rhport, ep_id, buffer ? get_buf_offset(buffer) : get_buf_offset((void*)dummy), total_bytes); return true; } @@ -390,6 +421,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to static void bus_reset(uint8_t rhport) { tu_memclr(&_dcd, sizeof(dcd_data_t)); + edpt_reset_all(rhport); // disable all non-control endpoints on bus reset for(uint8_t ep_id = 2; ep_id < 2*MAX_EP_PAIRS; ep_id++) @@ -397,8 +429,6 @@ static void bus_reset(uint8_t rhport) _dcd.ep[ep_id][0].disable = _dcd.ep[ep_id][1].disable = 1; } - prepare_setup_packet(rhport); - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; dcd_reg->EPINUSE = 0; @@ -506,23 +536,15 @@ void dcd_int_handler(uint8_t rhport) } } - // TODO support suspend & resume if (cmd_stat & CMDSTAT_SUSPEND_CHANGE_MASK) { - if (cmd_stat & CMDSTAT_DEVICE_SUSPEND_MASK) - { // suspend signal, bus idle for more than 3ms - // Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration. - if (cmd_stat & CMDSTAT_DEVICE_ADDR_MASK) - { - dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); - } + // suspend signal, bus idle for more than 3ms + // Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration. + if (cmd_stat & CMDSTAT_DEVICE_ADDR_MASK) + { + dcd_event_bus_signal(rhport, (cmd_stat & CMDSTAT_DEVICE_SUSPEND_MASK) ? DCD_EVENT_SUSPEND : DCD_EVENT_RESUME, true); } } -// else -// { // resume signal -// dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); -// } -// } } // Setup Receive -- cgit v1.3.1 From 930c68278c3825bce91ef324090d25c392844558 Mon Sep 17 00:00:00 2001 From: tswan-quasi Date: Wed, 12 Oct 2022 11:16:35 -0400 Subject: double cast of pointer to remove error --- src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/portable') diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index b0ddebad0..7220654e0 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -241,7 +241,7 @@ static void prepare_setup_packet(uint8_t rhport) static void edpt_reset(uint8_t rhport, uint8_t ep_id) { - const uint32_t offset = get_buf_offset((void*)dummy); + const uint32_t offset = get_buf_offset((void*)(uint32_t)dummy); tu_memclr(&_dcd.ep[ep_id], sizeof(_dcd.ep[ep_id])); if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL ) { @@ -410,7 +410,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to tu_memclr(&_dcd.dma[ep_id], sizeof(xfer_dma_t)); _dcd.dma[ep_id].total_bytes = total_bytes; - prepare_ep_xfer(rhport, ep_id, buffer ? get_buf_offset(buffer) : get_buf_offset((void*)dummy), total_bytes); + prepare_ep_xfer(rhport, ep_id, buffer ? get_buf_offset(buffer) : get_buf_offset((void*)(uint32_t)dummy), total_bytes); return true; } -- cgit v1.3.1 From 4238467b2d78fcb11ba63026daa525d1c09e17ac Mon Sep 17 00:00:00 2001 From: LynnL4 Date: Thu, 13 Oct 2022 17:37:28 +0800 Subject: Add support for STM32U5 mcu --- hw/bsp/board_mcu.h | 3 + .../boards/stm32u575eval/STM32U575AIIXQ_FLASH.ld | 167 +++++++ hw/bsp/stm32u5/boards/stm32u575eval/board.h | 112 +++++ hw/bsp/stm32u5/boards/stm32u575eval/board.mk | 10 + hw/bsp/stm32u5/family.c | 200 ++++++++ hw/bsp/stm32u5/family.mk | 45 ++ hw/bsp/stm32u5/stm32u5xx_hal_conf.h | 506 +++++++++++++++++++++ src/common/tusb_mcu.h | 5 + src/portable/synopsys/dwc2/dwc2_stm32.h | 6 + src/tusb_option.h | 1 + 10 files changed, 1055 insertions(+) create mode 100644 hw/bsp/stm32u5/boards/stm32u575eval/STM32U575AIIXQ_FLASH.ld create mode 100644 hw/bsp/stm32u5/boards/stm32u575eval/board.h create mode 100644 hw/bsp/stm32u5/boards/stm32u575eval/board.mk create mode 100644 hw/bsp/stm32u5/family.c create mode 100644 hw/bsp/stm32u5/family.mk create mode 100644 hw/bsp/stm32u5/stm32u5xx_hal_conf.h (limited to 'src/portable') diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index 5c309a21d..18f071a22 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -98,6 +98,9 @@ #elif CFG_TUSB_MCU == OPT_MCU_STM32WB #include "stm32wbxx.h" +#elif CFG_TUSB_MCU == OPT_MCU_STM32U5 + #include "stm32u5xx.h" + #elif CFG_TUSB_MCU == OPT_MCU_CXD56 // no header needed diff --git a/hw/bsp/stm32u5/boards/stm32u575eval/STM32U575AIIXQ_FLASH.ld b/hw/bsp/stm32u5/boards/stm32u575eval/STM32U575AIIXQ_FLASH.ld new file mode 100644 index 000000000..03c022bc2 --- /dev/null +++ b/hw/bsp/stm32u5/boards/stm32u575eval/STM32U575AIIXQ_FLASH.ld @@ -0,0 +1,167 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Author : STM32CubeIDE +** +** Abstract : Linker script for STM32U575xI Device from STM32U5 series +** 2048Kbytes FLASH +** 784Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +** Copyright (c) 2022 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200 ; /* required amount of heap */ +_Min_Stack_Size = 0x400 ; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 768K + SRAM4 (xrw) : ORIGIN = 0x28000000, LENGTH = 16K + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + KEEP(*(.isr_vector)) /* Startup code */ + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + } >FLASH + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } >FLASH + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/hw/bsp/stm32u5/boards/stm32u575eval/board.h b/hw/bsp/stm32u5/boards/stm32u575eval/board.h new file mode 100644 index 000000000..5c348b812 --- /dev/null +++ b/hw/bsp/stm32u5/boards/stm32u575eval/board.h @@ -0,0 +1,112 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022, Hongtai Liu + * Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus +extern "C" +{ +#endif + +// LED GREEN +#define LED_PORT GPIOB +#define LED_PIN GPIO_PIN_7 +#define LED_STATE_ON 1 + +// // LED +#define BUTTON_PORT GPIOC +#define BUTTON_PIN GPIO_PIN_13 +#define BUTTON_STATE_ACTIVE 1 + +// UART Enable for STLink VCOM +#define UART_DEV USART1 +#define UART_CLK_EN __HAL_RCC_USART1_CLK_ENABLE +#define UART_GPIO_PORT GPIOA +#define UART_GPIO_AF GPIO_AF7_USART1 +#define UART_TX_PIN GPIO_PIN_9 +#define UART_RX_PIN GPIO_PIN_10 + +//--------------------------------------------------------------------+ +// RCC Clock +//--------------------------------------------------------------------+ + +static inline void board_clock_init(void) +{ + + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + + /* Enable Power Clock*/ + __HAL_RCC_PWR_CLK_ENABLE(); + + /** Configure the main internal regulator output voltage + */ + HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); + + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 10; + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 2; + RCC_OscInitStruct.PLL.PLLR = 1; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_1; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_CLK48; + PeriphClkInit.IclkClockSelection = RCC_CLK48CLKSOURCE_HSI48; + + HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit); + + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; + + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4); +} + + +#ifdef __cplusplus +} +#endif + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/stm32u5/boards/stm32u575eval/board.mk b/hw/bsp/stm32u5/boards/stm32u575eval/board.mk new file mode 100644 index 000000000..19cd2a5b0 --- /dev/null +++ b/hw/bsp/stm32u5/boards/stm32u575eval/board.mk @@ -0,0 +1,10 @@ +CFLAGS += \ + -DSTM32U575xx \ + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/STM32U575AIIXQ_FLASH.ld + +SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u575xx.s + +# For flash-jlink target +JLINK_DEVICE = stm32u575 diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c new file mode 100644 index 000000000..9bc94cfa3 --- /dev/null +++ b/hw/bsp/stm32u5/family.c @@ -0,0 +1,200 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2022, Hongtai Liu + * Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "stm32u5xx_hal.h" +#include "bsp/board.h" +#include "board.h" + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void OTG_FS_IRQHandler(void) +{ + tud_int_handler(0); +} + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM +//--------------------------------------------------------------------+ + +UART_HandleTypeDef UartHandle; + +void board_init(void) +{ + + board_clock_init(); + + // Enable All GPIOs clocks + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + + UART_CLK_EN(); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(OTG_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); +#endif + + GPIO_InitTypeDef GPIO_InitStruct; + + // LED + GPIO_InitStruct.Pin = LED_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); + + // Button + GPIO_InitStruct.Pin = BUTTON_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); + + // IOSV bit MUST be set to access GPIO port G[2:15] */ + HAL_PWREx_EnableVddIO2(); + + // Uart + GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = UART_GPIO_AF; + HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct); + + UartHandle.Instance = UART_DEV; + UartHandle.Init.BaudRate = CFG_BOARD_UART_BAUDRATE; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + UartHandle.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + UartHandle.Init.ClockPrescaler = UART_PRESCALER_DIV1; + UartHandle.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + + HAL_UART_Init(&UartHandle); + + /* Configure USB FS GPIOs */ + /* Configure DM DP Pins */ + GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF10_USB; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* Configure ID pin */ + GPIO_InitStruct.Pin = GPIO_PIN_10; + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Alternate = GPIO_AF10_USB; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + +#if OTG_FS_VBUS_SENSE + // Configure VBUS Pin + GPIO_InitStruct.Pin = GPIO_PIN_9; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + // Enable VBUS sense (B device) via pin PA9 + USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN; +#else + // Disable VBUS sense (B device) via pin PA9 + USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN; + + // B-peripheral session valid override enable + USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN; + USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL; +#endif // vbus sense + + /* Enable USB power on Pwrctrl CR2 register */ + HAL_PWREx_EnableVddUSB(); + + /* USB_OTG_FS clock enable */ + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN); +} + +int board_uart_read(uint8_t *buf, int len) +{ + (void)buf; + (void)len; + return 0; +} + +int board_uart_write(void const *buf, int len) +{ + HAL_UART_Transmit(&UartHandle, (uint8_t *)(uintptr_t)buf, len, 0xffff); + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif + +void HardFault_Handler(void) +{ + asm("bkpt"); +} + +// Required by __libc_init_array in startup code if we are compiling using +// -nostdlib/-nostartfiles. +void _init(void) +{ +} diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk new file mode 100644 index 000000000..1cfb81e43 --- /dev/null +++ b/hw/bsp/stm32u5/family.mk @@ -0,0 +1,45 @@ +ST_FAMILY = u5 +DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver + +ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) +ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver + +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -flto \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m33 \ + -mfloat-abi=hard \ + -mfpu=fpv5-sp-d16 \ + -nostdlib -nostartfiles \ + -DCFG_TUSB_MCU=OPT_MCU_STM32U5 + +# suppress warning caused by vendor mcu driver +CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align -Wno-error=undef -Wno-error=unused-parameter + +#src/portable/st/synopsys/dcd_synopsys.c +SRC_C += \ + src/portable/synopsys/dwc2/dcd_dwc2.c \ + $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c + +INC += \ + $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ + $(TOP)/$(ST_CMSIS)/Include \ + $(TOP)/$(ST_HAL_DRIVER)/Inc \ + $(TOP)/$(BOARD_PATH) + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM33_NTZ/non_secure + +# flash target using on-board stlink +flash: flash-stlink diff --git a/hw/bsp/stm32u5/stm32u5xx_hal_conf.h b/hw/bsp/stm32u5/stm32u5xx_hal_conf.h new file mode 100644 index 000000000..15dffa813 --- /dev/null +++ b/hw/bsp/stm32u5/stm32u5xx_hal_conf.h @@ -0,0 +1,506 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32u5xx_hal_conf.h + * @author MCD Application Team + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32U5xx_HAL_CONF_H +#define STM32U5xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ + +#define HAL_MODULE_ENABLED + +/*#define HAL_ADC_MODULE_ENABLED */ +/*#define HAL_MDF_MODULE_ENABLED */ +/*#define HAL_COMP_MODULE_ENABLED */ +/*#define HAL_CORDIC_MODULE_ENABLED */ +/*#define HAL_CRC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_DAC_MODULE_ENABLED */ +/*#define HAL_DMA2D_MODULE_ENABLED */ +/*#define HAL_DSI_MODULE_ENABLED */ +/*#define HAL_FDCAN_MODULE_ENABLED */ +/*#define HAL_FMAC_MODULE_ENABLED */ +/*#define HAL_GFXMMU_MODULE_ENABLED */ +/*#define HAL_GPU2D_MODULE_ENABLED */ +/*#define HAL_GTZC_MODULE_ENABLED */ +/*#define HAL_HASH_MODULE_ENABLED */ +/*#define HAL_HRTIM_MODULE_ENABLED */ +/*#define HAL_IRDA_MODULE_ENABLED */ +/*#define HAL_IWDG_MODULE_ENABLED */ +/*#define HAL_I2C_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_LPTIM_MODULE_ENABLED */ +/*#define HAL_LTDC_MODULE_ENABLED */ +/*#define HAL_NAND_MODULE_ENABLED */ +/*#define HAL_NOR_MODULE_ENABLED */ +/*#define HAL_OPAMP_MODULE_ENABLED */ +#define HAL_OSPI_MODULE_ENABLED +/*#define HAL_OTFDEC_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/*#define HAL_PKA_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_RNG_MODULE_ENABLED */ +/*#define HAL_RTC_MODULE_ENABLED */ +/*#define HAL_SAI_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_SD_MODULE_ENABLED */ +/*#define HAL_MMC_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +/*#define HAL_SMBUS_MODULE_ENABLED */ +/*#define HAL_SPI_MODULE_ENABLED */ +/*#define HAL_SRAM_MODULE_ENABLED */ +/*#define HAL_TIM_MODULE_ENABLED */ +/*#define HAL_TSC_MODULE_ENABLED */ +/*#define HAL_RAMCFG_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED +/*#define HAL_USART_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ +/*#define HAL_DCMI_MODULE_ENABLED */ +/*#define HAL_PSSI_MODULE_ENABLED */ +#define HAL_ICACHE_MODULE_ENABLED +/*#define HAL_DCACHE_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/*#define HAL_HCD_MODULE_ENABLED */ +/*#define HAL_XSPI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE 16000000UL /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT 100UL /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal Multiple Speed oscillator (MSI) default value. + * This value is the default MSI range value after Reset. + */ +#if !defined (MSI_VALUE) + #define MSI_VALUE 4000000UL /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE 16000000UL /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG. + * This internal oscillator is mainly dedicated to provide a high precision clock to + * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry. + * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency + * which is subject to manufacturing process variations. + */ +#if !defined (HSI48_VALUE) + #define HSI48_VALUE 48000000UL /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. + The real value my vary depending on manufacturing process variations.*/ +#endif /* HSI48_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE 32000UL /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE 32768UL /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT 5000UL /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for SAI1 peripheral + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * frequency. + */ +#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) + #define EXTERNAL_SAI1_CLOCK_VALUE 48000UL /*!< Value of the SAI1 External clock source in Hz*/ +#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ + +#define VDD_VALUE 3300UL /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY (15UL) /*!< tick interrupt priority (lowest by default) */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U /*!< Enable prefetch */ + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ + +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Register callback feature configuration ############### */ +/** + * @brief Set below the peripheral configuration to "1U" to add the support + * of HAL callback registration/unregistration feature for the HAL + * driver(s). This allows user application to provide specific callback + * functions thanks to HAL_PPP_RegisterCallback() rather than overwriting + * the default weak callback functions (see each stm32u5xx_hal_ppp.h file + * for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef + * for each PPP peripheral). + */ +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ +#define USE_HAL_COMP_REGISTER_CALLBACKS 0U /* COMP register callback disabled */ +#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U /* CORDIC register callback disabled */ +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ +#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ +#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ +#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ +#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ +#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U /* FDCAN register callback disabled */ +#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U /* FMAC register callback disabled */ +#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ +#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ +#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U /* GFXMMU register callback disabled */ +#define USE_HAL_GPU2D_REGISTER_CALLBACKS 0U /* GPU2D register callback disabled */ +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ +#define USE_HAL_IWDG_REGISTER_CALLBACKS 0U /* IWDG register callback disabled */ +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ +#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ +#define USE_HAL_MDF_REGISTER_CALLBACKS 0U /* MDF register callback disabled */ +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ +#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ +#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ +#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */ +#define USE_HAL_OTFDEC_REGISTER_CALLBACKS 0U /* OTFDEC register callback disabled */ +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ +#define USE_HAL_PKA_REGISTER_CALLBACKS 0U /* PKA register callback disabled */ +#define USE_HAL_RAMCFG_REGISTER_CALLBACKS 0U /* RAMCFG register callback disabled */ +#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ +#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ +#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ +#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ +#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ +#define USE_HAL_TSC_REGISTER_CALLBACKS 0U /* TSC register callback disabled */ +#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ +#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver + * Activated: CRC code is present inside driver + * Deactivated: CRC code cleaned from driver + */ +#define USE_SPI_CRC 0U + +/* ################## SDMMC peripheral configuration ######################### */ + +#define USE_SD_TRANSCEIVER 0U /*!< use uSD Transceiver */ + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32u5xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32u5xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_ICACHE_MODULE_ENABLED + #include "stm32u5xx_hal_icache.h" +#endif /* HAL_ICACHE_MODULE_ENABLED */ + +#ifdef HAL_DCACHE_MODULE_ENABLED + #include "stm32u5xx_hal_dcache.h" +#endif /* HAL_DCACHE_MODULE_ENABLED */ + +#ifdef HAL_GTZC_MODULE_ENABLED + #include "stm32u5xx_hal_gtzc.h" +#endif /* HAL_GTZC_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32u5xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32u5xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED +#include "stm32u5xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32u5xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_PKA_MODULE_ENABLED + #include "stm32u5xx_hal_pka.h" +#endif /* HAL_PKA_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32u5xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED + #include "stm32u5xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32u5xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32u5xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32u5xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32u5xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32u5xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32u5xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32u5xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32u5xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32u5xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32u5xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32u5xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED +#include "stm32u5xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED +#include "stm32u5xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_OPAMP_MODULE_ENABLED +#include "stm32u5xx_hal_opamp.h" +#endif /* HAL_OPAMP_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32u5xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_OSPI_MODULE_ENABLED + #include "stm32u5xx_hal_ospi.h" +#endif /* HAL_OSPI_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32u5xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32u5xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32u5xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32u5xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32u5xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32u5xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32u5xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_TSC_MODULE_ENABLED + #include "stm32u5xx_hal_tsc.h" +#endif /* HAL_TSC_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32u5xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32u5xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32u5xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32u5xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32u5xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32u5xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32u5xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_CORDIC_MODULE_ENABLED + #include "stm32u5xx_hal_cordic.h" +#endif /* HAL_CORDIC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32u5xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32u5xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_FDCAN_MODULE_ENABLED + #include "stm32u5xx_hal_fdcan.h" +#endif /* HAL_FDCAN_MODULE_ENABLED */ + +#ifdef HAL_FMAC_MODULE_ENABLED + #include "stm32u5xx_hal_fmac.h" +#endif /* HAL_FMAC_MODULE_ENABLED */ + +#ifdef HAL_GFXMMU_MODULE_ENABLED + #include "stm32u5xx_hal_gfxmmu.h" +#endif /* HAL_GFXMMU_MODULE_ENABLED */ + +#ifdef HAL_GPU2D_MODULE_ENABLED + #include "stm32u5xx_hal_gpu2d.h" +#endif /* HAL_GPU2D_MODULE_ENABLED */ + +#ifdef HAL_OTFDEC_MODULE_ENABLED + #include "stm32u5xx_hal_otfdec.h" +#endif /* HAL_OTFDEC_MODULE_ENABLED */ + +#ifdef HAL_PSSI_MODULE_ENABLED + #include "stm32u5xx_hal_pssi.h" +#endif /* HAL_PSSI_MODULE_ENABLED */ + +#ifdef HAL_RAMCFG_MODULE_ENABLED + #include "stm32u5xx_hal_ramcfg.h" +#endif /* HAL_RAMCFG_MODULE_ENABLED */ + +#ifdef HAL_MDF_MODULE_ENABLED + #include "stm32u5xx_hal_mdf.h" +#endif /* HAL_MDF_MODULE_ENABLED */ + +#ifdef HAL_XSPI_MODULE_ENABLED + #include "stm32u5xx_hal_xspi.h" +#endif /* HAL_XSPI_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t *file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32U5xx_HAL_CONF_H */ + diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 514ffcd4d..86c68baf8 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -189,6 +189,11 @@ #elif TU_CHECK_MCU(OPT_MCU_STM32WB) #define TUP_DCD_ENDPOINT_MAX 8 +#elif TU_CHECK_MCU(OPT_MCU_STM32U5) + #define TUP_USBIP_DWC2 + #define TUP_USBIP_DWC2_STM32 + #define TUP_DCD_ENDPOINT_MAX 6 + //------------- Sony -------------// #elif TU_CHECK_MCU(OPT_MCU_CXD56) #define TUP_DCD_ENDPOINT_MAX 7 diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index 337f611d8..ea786362e 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -82,6 +82,12 @@ #define EP_MAX_FS 6 #define EP_FIFO_SIZE_FS 1280 +#elif CFG_TUSB_MCU == OPT_MCU_STM32U5 + #include "stm32u5xx.h" + #define USB_OTG_FS_PERIPH_BASE USB_OTG_FS_BASE + #define EP_MAX_FS 6 + #define EP_FIFO_SIZE_FS 1280 + #else #error "Unsupported MCUs" #endif diff --git a/src/tusb_option.h b/src/tusb_option.h index 4c2dd0258..f95ae6273 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -84,6 +84,7 @@ typedef int make_iso_compilers_happy; #define OPT_MCU_STM32G0 310 ///< ST G0 #define OPT_MCU_STM32G4 311 ///< ST G4 #define OPT_MCU_STM32WB 312 ///< ST WB +#define OPT_MCU_STM32U5 313 ///< ST U5 // Sony #define OPT_MCU_CXD56 400 ///< SONY CXD56 -- cgit v1.3.1 From 2c1ff2673baaeefc6520d25e87d5ca5e6b2093db Mon Sep 17 00:00:00 2001 From: tswan-quasi Date: Thu, 13 Oct 2022 11:48:30 -0400 Subject: (void) rhport for unused parameter --- src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/portable') diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index 7220654e0..1f29abbb8 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -375,6 +375,8 @@ void dcd_edpt_close_all (uint8_t rhport) void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) { + (void) rhport; + uint8_t ep_id = ep_addr2id(ep_addr); _dcd.ep[ep_id][0].active = _dcd.ep[ep_id][0].active = 0; // TODO proper way is to EPSKIP then wait ep[][].active then write ep[][].disable (see table 778 in LPC55S69 Use Manual) _dcd.ep[ep_id][0].disable = _dcd.ep[ep_id][1].disable = 1; @@ -403,8 +405,6 @@ static void prepare_ep_xfer(uint8_t rhport, uint8_t ep_id, uint16_t buf_offset, bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) { - (void) rhport; - uint8_t const ep_id = ep_addr2id(ep_addr); tu_memclr(&_dcd.dma[ep_id], sizeof(xfer_dma_t)); -- cgit v1.3.1 From 3f45f3767240dccfccbf9b013a9109912bfa2b5c Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 17 Oct 2022 23:13:24 +0700 Subject: minor rename --- src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'src/portable') diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index 1f29abbb8..51baaf224 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -78,7 +78,8 @@ typedef struct { // Max nbytes for each control/bulk/interrupt transfer enum { - NBYTES_CBI_FS_ISO_MAX = 1023, // FS ISO + NBYTES_ISO_FS_MAX = 1023, // FS ISO + NBYTES_ISO_HS_MAX = 1024, // HS ISO NBYTES_CBI_FS_MAX = 64, // FS control/bulk/interrupt NBYTES_CBI_HS_MAX = 32767 // can be up to all 15-bit, but only tested with 4096 }; @@ -113,6 +114,8 @@ enum { typedef union TU_ATTR_PACKED { // Full and High speed has different bit layout for buffer_offset and nbytes + // TODO FS/HS layout depends on the max speed of controller e.g + // lpc55s69 PORT0 is only FS but actually has the same layout as HS on port1 // Buffer (aligned 64) = DATABUFSTART [31:22] | buffer_offset [21:6] volatile struct { @@ -388,7 +391,7 @@ static void prepare_ep_xfer(uint8_t rhport, uint8_t ep_id, uint16_t buf_offset, if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL ) { - nbytes = tu_min16(total_bytes, _dcd.ep[ep_id][0].is_iso ? NBYTES_CBI_FS_ISO_MAX : NBYTES_CBI_FS_MAX); + nbytes = tu_min16(total_bytes, _dcd.ep[ep_id][0].is_iso ? NBYTES_ISO_FS_MAX : NBYTES_CBI_FS_MAX); _dcd.ep[ep_id][0].buffer_fs.offset = buf_offset; _dcd.ep[ep_id][0].buffer_fs.nbytes = nbytes; }else -- cgit v1.3.1 From a49ca795afc9008085d905e6fb43f511dca7be7c Mon Sep 17 00:00:00 2001 From: Tomas Rezucha Date: Tue, 18 Oct 2022 08:05:13 +0200 Subject: esp: Fix Isochronous transfers On ESP32-S2/S3 ISO transfers must be configured for even or odd frame. Closes https://github.com/hathach/tinyusb/issues/1382 --- src/portable/espressif/esp32sx/dcd_esp32sx.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'src/portable') diff --git a/src/portable/espressif/esp32sx/dcd_esp32sx.c b/src/portable/espressif/esp32sx/dcd_esp32sx.c index a30fca0d8..0b75af627 100644 --- a/src/portable/espressif/esp32sx/dcd_esp32sx.c +++ b/src/portable/espressif/esp32sx/dcd_esp32sx.c @@ -59,6 +59,7 @@ typedef struct { uint16_t queued_len; uint16_t max_size; bool short_packet; + uint8_t interval; } xfer_ctl_t; static const char *TAG = "TUSB:DCD"; @@ -267,6 +268,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_edpt) xfer_ctl_t *xfer = XFER_CTL_BASE(epnum, dir); xfer->max_size = tu_edpt_packet_size(desc_edpt); + xfer->interval = desc_edpt->bInterval; if (dir == TUSB_DIR_OUT) { out_ep[epnum].doepctl |= USB_USBACTEP1_M | @@ -379,6 +381,13 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to USB0.in_ep_reg[epnum].dieptsiz = (num_packets << USB_D_PKTCNT0_S) | total_bytes; USB0.in_ep_reg[epnum].diepctl |= USB_D_EPENA1_M | USB_D_CNAK1_M; // Enable | CNAK + // For ISO endpoint with interval=1 set correct DATA0/DATA1 bit for next frame + if ((USB0.in_ep_reg[epnum].diepctl & USB_D_EPTYPE0_M) == (1 << USB_D_EPTYPE1_S) && xfer->interval == 1) { + // Take odd/even bit from frame counter. + uint32_t const odd_frame_now = (USB0.dsts & (1u << USB_SOFFN_S)); + USB0.in_ep_reg[epnum].diepctl |= (odd_frame_now ? USB_DI_SETD0PID1 : USB_DI_SETD1PID1); + } + // Enable fifo empty interrupt only if there are something to put in the fifo. if(total_bytes != 0) { USB0.dtknqr4_fifoemptymsk |= (1 << epnum); @@ -387,6 +396,13 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to // Each complete packet for OUT xfers triggers XFRC. USB0.out_ep_reg[epnum].doeptsiz |= USB_PKTCNT0_M | ((xfer->max_size & USB_XFERSIZE0_V) << USB_XFERSIZE0_S); USB0.out_ep_reg[epnum].doepctl |= USB_EPENA0_M | USB_CNAK0_M; + + // For ISO endpoint with interval=1 set correct DATA0/DATA1 bit for next frame + if ((USB0.out_ep_reg[epnum].doepctl & USB_D_EPTYPE0_M) == (1 << USB_D_EPTYPE1_S) && xfer->interval == 1) { + // Take odd/even bit from frame counter. + uint32_t const odd_frame_now = (USB0.dsts & (1u << USB_SOFFN_S)); + USB0.out_ep_reg[epnum].doepctl |= (odd_frame_now ? USB_DO_SETD0PID1 : USB_DO_SETD1PID1); + } } return true; } -- cgit v1.3.1 From fe4278554b04c3446b30f28fdb6aaad908f8fa48 Mon Sep 17 00:00:00 2001 From: tswan-quasi Date: Thu, 20 Oct 2022 11:02:57 -0400 Subject: dummy buffer only on EP0 OUT ZLPs --- src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-) (limited to 'src/portable') diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index 51baaf224..ed6c14f17 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -178,7 +178,7 @@ typedef struct // For example: LPC55s69 port1 Highspeed must be USB_RAM (0x40100000) // Use CFG_TUSB_MEM_SECTION to place it accordingly. CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(256) static dcd_data_t _dcd; -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(256) static volatile uint8_t dummy[64]; // TODO temp fix to prevent accidental overwrite due to ep[][].buffer_xx.offset being 0 +CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(256) static volatile uint8_t dummy[8] = { 0 }; // a fix for EP0 OUT ZLPs overwriting the buffer //--------------------------------------------------------------------+ // Multiple Controllers @@ -244,16 +244,7 @@ static void prepare_setup_packet(uint8_t rhport) static void edpt_reset(uint8_t rhport, uint8_t ep_id) { - const uint32_t offset = get_buf_offset((void*)(uint32_t)dummy); tu_memclr(&_dcd.ep[ep_id], sizeof(_dcd.ep[ep_id])); - if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL ) - { - _dcd.ep[ep_id][0].buffer_fs.offset = _dcd.ep[ep_id][1].buffer_fs.offset = offset; - } - else - { - _dcd.ep[ep_id][0].buffer_hs.offset = _dcd.ep[ep_id][1].buffer_hs.offset = offset; - } } static void edpt_reset_all(uint8_t rhport) @@ -413,7 +404,11 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to tu_memclr(&_dcd.dma[ep_id], sizeof(xfer_dma_t)); _dcd.dma[ep_id].total_bytes = total_bytes; - prepare_ep_xfer(rhport, ep_id, buffer ? get_buf_offset(buffer) : get_buf_offset((void*)(uint32_t)dummy), total_bytes); + if (!buffer && !ep_id) // for EP0 OUT ZLPs to prevent overwrites to buffer + { + buffer = (uint8_t*)(uint32_t)dummy; + } + prepare_ep_xfer(rhport, ep_id, get_buf_offset(buffer), total_bytes); return true; } @@ -426,8 +421,8 @@ static void bus_reset(uint8_t rhport) tu_memclr(&_dcd, sizeof(dcd_data_t)); edpt_reset_all(rhport); - // disable all non-control endpoints on bus reset - for(uint8_t ep_id = 2; ep_id < 2*MAX_EP_PAIRS; ep_id++) + // disable all endpoints as epecified by LPC55S69 UM Table 778 + for(uint8_t ep_id = 0; ep_id < 2*MAX_EP_PAIRS; ep_id++) { _dcd.ep[ep_id][0].disable = _dcd.ep[ep_id][1].disable = 1; } -- cgit v1.3.1 From 0b5504708172aa269653924da95e358720aabf7d Mon Sep 17 00:00:00 2001 From: tswan-quasi Date: Thu, 20 Oct 2022 11:04:49 -0400 Subject: typo fix --- src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/portable') diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index ed6c14f17..80d85fa46 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -421,7 +421,7 @@ static void bus_reset(uint8_t rhport) tu_memclr(&_dcd, sizeof(dcd_data_t)); edpt_reset_all(rhport); - // disable all endpoints as epecified by LPC55S69 UM Table 778 + // disable all endpoints as specified by LPC55S69 UM Table 778 for(uint8_t ep_id = 0; ep_id < 2*MAX_EP_PAIRS; ep_id++) { _dcd.ep[ep_id][0].disable = _dcd.ep[ep_id][1].disable = 1; -- cgit v1.3.1 From 35e1a27c950c4b25106c074d0b66220d099e54a7 Mon Sep 17 00:00:00 2001 From: tswan-quasi Date: Fri, 21 Oct 2022 15:06:30 -0400 Subject: unused (void) cast --- src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/portable') diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index 80d85fa46..7825d287f 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -244,6 +244,7 @@ static void prepare_setup_packet(uint8_t rhport) static void edpt_reset(uint8_t rhport, uint8_t ep_id) { + (void) rhport; tu_memclr(&_dcd.ep[ep_id], sizeof(_dcd.ep[ep_id])); } -- cgit v1.3.1 From e3b7ed9ae966be1cb41165343ef30c6523ed5771 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 24 Oct 2022 18:43:21 +0700 Subject: use dummy for all ZLP for ip3511, fix lpc55 build with DEBUG=1 --- hw/bsp/lpc55/family.mk | 1 + src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 10 ++++++++-- 2 files changed, 9 insertions(+), 2 deletions(-) (limited to 'src/portable') diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk index 1af1d076e..9d6702b94 100644 --- a/hw/bsp/lpc55/family.mk +++ b/hw/bsp/lpc55/family.mk @@ -43,6 +43,7 @@ SRC_C += \ $(MCU_DIR)/drivers/fsl_power.c \ $(MCU_DIR)/drivers/fsl_reset.c \ $(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \ + $(SDK_DIR)/drivers/common/fsl_common_arm.c \ $(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \ $(SDK_DIR)/drivers/flexcomm/fsl_usart.c \ lib/sct_neopixel/sct_neopixel.c diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index 7825d287f..9b490c48c 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -178,7 +178,9 @@ typedef struct // For example: LPC55s69 port1 Highspeed must be USB_RAM (0x40100000) // Use CFG_TUSB_MEM_SECTION to place it accordingly. CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(256) static dcd_data_t _dcd; -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(256) static volatile uint8_t dummy[8] = { 0 }; // a fix for EP0 OUT ZLPs overwriting the buffer + +// Dummy buffer to fix ZLPs overwriting the buffer (probably an USB/DMA controller bug) +CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(64) static uint8_t dummy[8]; //--------------------------------------------------------------------+ // Multiple Controllers @@ -405,10 +407,14 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to tu_memclr(&_dcd.dma[ep_id], sizeof(xfer_dma_t)); _dcd.dma[ep_id].total_bytes = total_bytes; - if (!buffer && !ep_id) // for EP0 OUT ZLPs to prevent overwrites to buffer + if (!buffer) { + // Although having no data, ZLPs can cause buffer overwritten to zeroes. + // Probably due to USB/DMA controller side effect/bug. + // Assigned buffer offset to (valid) dummy to prevent overwriting to DATABUFSTART buffer = (uint8_t*)(uint32_t)dummy; } + prepare_ep_xfer(rhport, ep_id, get_buf_offset(buffer), total_bytes); return true; -- cgit v1.3.1