From 2499c9382d4ff0d67106f6dc6cd4a9dfbd0be20e Mon Sep 17 00:00:00 2001
From: Scott Shawcroft <scott@tannewt.org>
Date: Fri, 17 Sep 2021 16:51:34 -0700
Subject: rpi start. doesn't work

---
 src/tusb_option.h | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'src/tusb_option.h')

diff --git a/src/tusb_option.h b/src/tusb_option.h
index a00f3489f..0240857d9 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -126,6 +126,9 @@
 // GigaDevice
 #define OPT_MCU_GD32VF103        1600 ///< GigaDevice GD32VF103
 
+// Broadcom
+#define OPT_MCU_BCM2711          1700 ///< Broadcom BCM2711
+
 //--------------------------------------------------------------------+
 // Supported OS
 //--------------------------------------------------------------------+
-- 
cgit v1.3.1


From a0202df920889b57f79560760f6a38632e52c364 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 25 Oct 2021 13:49:59 +0700
Subject: add TU_ARGS_APPLY(), TU_CHECK_MCU() now could check list of mcus

---
 src/common/tusb_common.h   | 31 -------------------------------
 src/common/tusb_compiler.h | 40 ++++++++++++++++++++++++++++++++++++++++
 src/tusb_option.h          |  9 ++++++++-
 3 files changed, 48 insertions(+), 32 deletions(-)

(limited to 'src/tusb_option.h')

diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index fc92654b7..bf9641622 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -235,37 +235,6 @@ TU_ATTR_ALWAYS_INLINE static inline void     tu_unaligned_write16 (void* mem, ui
 
 #endif
 
-/*------------------------------------------------------------------*/
-/* Count number of arguments of __VA_ARGS__
- * - reference https://groups.google.com/forum/#!topic/comp.std.c/d-6Mj5Lko_s
- * - _GET_NTH_ARG() takes args >= N (64) but only expand to Nth one (64th)
- * - _RSEQ_N() is reverse sequential to N to add padding to have
- * Nth position is the same as the number of arguments
- * - ##__VA_ARGS__ is used to deal with 0 paramerter (swallows comma)
- *------------------------------------------------------------------*/
-#ifndef TU_ARGS_NUM
-
-#define TU_ARGS_NUM(...) 	 _TU_NARG(_0, ##__VA_ARGS__,_RSEQ_N())
-
-#define _TU_NARG(...)        _GET_NTH_ARG(__VA_ARGS__)
-#define _GET_NTH_ARG( \
-          _1, _2, _3, _4, _5, _6, _7, _8, _9,_10, \
-         _11,_12,_13,_14,_15,_16,_17,_18,_19,_20, \
-         _21,_22,_23,_24,_25,_26,_27,_28,_29,_30, \
-         _31,_32,_33,_34,_35,_36,_37,_38,_39,_40, \
-         _41,_42,_43,_44,_45,_46,_47,_48,_49,_50, \
-         _51,_52,_53,_54,_55,_56,_57,_58,_59,_60, \
-         _61,_62,_63,N,...) N
-#define _RSEQ_N() \
-         62,61,60,                      \
-         59,58,57,56,55,54,53,52,51,50, \
-         49,48,47,46,45,44,43,42,41,40, \
-         39,38,37,36,35,34,33,32,31,30, \
-         29,28,27,26,25,24,23,22,21,20, \
-         19,18,17,16,15,14,13,12,11,10, \
-         9,8,7,6,5,4,3,2,1,0
-#endif
-
 // To be removed
 //------------- Binary constant -------------//
 #if defined(__GNUC__) && !defined(__CC_ARM)
diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index 3e85939b0..b0999b5d9 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -67,6 +67,46 @@
 #define TU_LITTLE_ENDIAN (0x12u)
 #define TU_BIG_ENDIAN (0x21u)
 
+/*------------------------------------------------------------------*/
+/* Count number of arguments of __VA_ARGS__
+ * - reference https://groups.google.com/forum/#!topic/comp.std.c/d-6Mj5Lko_s
+ * - _GET_NTH_ARG() takes args >= N (64) but only expand to Nth one (64th)
+ * - _RSEQ_N() is reverse sequential to N to add padding to have
+ * Nth position is the same as the number of arguments
+ * - ##__VA_ARGS__ is used to deal with 0 paramerter (swallows comma)
+ *------------------------------------------------------------------*/
+#define TU_ARGS_NUM(...) 	 _TU_NARG(_0, ##__VA_ARGS__,_RSEQ_N())
+
+#define _TU_NARG(...)      _GET_NTH_ARG(__VA_ARGS__)
+#define _GET_NTH_ARG( \
+          _1, _2, _3, _4, _5, _6, _7, _8, _9,_10, \
+         _11,_12,_13,_14,_15,_16,_17,_18,_19,_20, \
+         _21,_22,_23,_24,_25,_26,_27,_28,_29,_30, \
+         _31,_32,_33,_34,_35,_36,_37,_38,_39,_40, \
+         _41,_42,_43,_44,_45,_46,_47,_48,_49,_50, \
+         _51,_52,_53,_54,_55,_56,_57,_58,_59,_60, \
+         _61,_62,_63,N,...) N
+#define _RSEQ_N() \
+         62,61,60,                      \
+         59,58,57,56,55,54,53,52,51,50, \
+         49,48,47,46,45,44,43,42,41,40, \
+         39,38,37,36,35,34,33,32,31,30, \
+         29,28,27,26,25,24,23,22,21,20, \
+         19,18,17,16,15,14,13,12,11,10, \
+         9,8,7,6,5,4,3,2,1,0
+
+// Apply an macro X to each of the arguments with an separated of choice
+#define TU_ARGS_APPLY(_X, _s, ...)   TU_XSTRCAT(_TU_ARGS_APPLY_, TU_ARGS_NUM(__VA_ARGS__))(_X, _s, __VA_ARGS__)
+
+#define _TU_ARGS_APPLY_1(_X, _s, _a1)                                    _X(_a1)
+#define _TU_ARGS_APPLY_2(_X, _s, _a1, _a2)                               _X(_a1) _s _X(_a2)
+#define _TU_ARGS_APPLY_3(_X, _s, _a1, _a2, _a3)                          _X(_a1) _s _TU_ARGS_APPLY_2(_X, _s, _a2, _a3)
+#define _TU_ARGS_APPLY_4(_X, _s, _a1, _a2, _a3, _a4)                     _X(_a1) _s _TU_ARGS_APPLY_3(_X, _s, _a2, _a3, _a4)
+#define _TU_ARGS_APPLY_5(_X, _s, _a1, _a2, _a3, _a4, _a5)                _X(_a1) _s _TU_ARGS_APPLY_4(_X, _s, _a2, _a3, _a4, _a5)
+#define _TU_ARGS_APPLY_6(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6)           _X(_a1) _s _TU_ARGS_APPLY_5(_X, _s, _a2, _a3, _a4, _a5, _a6)
+#define _TU_ARGS_APPLY_7(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7)      _X(_a1) _s _TU_ARGS_APPLY_6(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7)
+#define _TU_ARGS_APPLY_8(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7, _a8) _X(_a1) _s _TU_ARGS_APPLY_7(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7, _a8)
+
 //--------------------------------------------------------------------+
 // Compiler porting with Attribute and Endian
 //--------------------------------------------------------------------+
diff --git a/src/tusb_option.h b/src/tusb_option.h
index e49fc0119..89d83472b 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -27,6 +27,8 @@
 #ifndef _TUSB_OPTION_H_
 #define _TUSB_OPTION_H_
 
+#include "common/tusb_compiler.h"
+
 #define TUSB_VERSION_MAJOR     0
 #define TUSB_VERSION_MINOR     12
 #define TUSB_VERSION_REVISION  0
@@ -36,7 +38,6 @@
 // Supported MCUs
 // CFG_TUSB_MCU must be defined to one of following value
 //--------------------------------------------------------------------+
-#define TU_CHECK_MCU(_m)            (CFG_TUSB_MCU == OPT_MCU_##_m)
 
 #define OPT_MCU_NONE                0
 
@@ -126,6 +127,12 @@
 // GigaDevice
 #define OPT_MCU_GD32VF103        1600 ///< GigaDevice GD32VF103
 
+
+// Helper to check if configured MCU is one of listed
+// Apply _TU_CHECK_MCU with || as separator to list of input
+#define _TU_CHECK_MCU(_m)   (CFG_TUSB_MCU == OPT_MCU_##_m)
+#define TU_CHECK_MCU(...)   TU_ARGS_APPLY(_TU_CHECK_MCU, ||, __VA_ARGS__)
+
 //--------------------------------------------------------------------+
 // Supported OS
 //--------------------------------------------------------------------+
-- 
cgit v1.3.1


From 4ccf60954d184c0530daf800090bd7103aacee86 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 25 Oct 2021 15:51:41 +0700
Subject: moving esp32s2 to dwc2, abstract dwc2_set_turnaround()

---
 .../device/cdc_msc_freertos/src/CMakeLists.txt     |  2 +-
 hw/bsp/gd32vf103/family.mk                         |  3 +-
 src/device/dcd_attr.h                              | 16 ++--
 src/portable/synopsys/dwc2/dcd_dwc2.c              | 98 ++++++----------------
 src/portable/synopsys/dwc2/dwc2_esp32.h            | 82 ++++++++++++++++++
 src/portable/synopsys/dwc2/dwc2_gd32.h             | 37 ++++++--
 src/portable/synopsys/dwc2/dwc2_stm32.h            | 83 +++++++++++++++---
 src/tusb_option.h                                  |  2 +-
 8 files changed, 222 insertions(+), 101 deletions(-)
 create mode 100644 src/portable/synopsys/dwc2/dwc2_esp32.h

(limited to 'src/tusb_option.h')

diff --git a/examples/device/cdc_msc_freertos/src/CMakeLists.txt b/examples/device/cdc_msc_freertos/src/CMakeLists.txt
index 07fc4df89..93ae0686a 100644
--- a/examples/device/cdc_msc_freertos/src/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/src/CMakeLists.txt
@@ -27,5 +27,5 @@ target_sources(${COMPONENT_TARGET} PUBLIC
   "${TOP}/src/class/net/ncm_device.c"
   "${TOP}/src/class/usbtmc/usbtmc_device.c"
   "${TOP}/src/class/vendor/vendor_device.c"
-  "${TOP}/src/portable/espressif/esp32sx/dcd_esp32sx.c"
+  "${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c"
 )
diff --git a/hw/bsp/gd32vf103/family.mk b/hw/bsp/gd32vf103/family.mk
index 4de23ac17..49bacdf1b 100644
--- a/hw/bsp/gd32vf103/family.mk
+++ b/hw/bsp/gd32vf103/family.mk
@@ -28,8 +28,7 @@ CFLAGS += \
 	-mstrict-align \
 	-nostdlib -nostartfiles \
 	-DCFG_TUSB_MCU=OPT_MCU_GD32VF103 \
-	-DDOWNLOAD_MODE=DOWNLOAD_MODE_FLASHXIP \
-	-DGD32VF103 
+	-DDOWNLOAD_MODE=DOWNLOAD_MODE_FLASHXIP
 
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter
diff --git a/src/device/dcd_attr.h b/src/device/dcd_attr.h
index 3690985c6..ddec481a8 100644
--- a/src/device/dcd_attr.h
+++ b/src/device/dcd_attr.h
@@ -36,13 +36,13 @@
 // - PORT_HIGHSPEED: mask to indicate which port support highspeed mode, bit0 for port0 and so on.
 
 //------------- NXP -------------//
-#if   TU_CHECK_MCU(LPC11UXX) || TU_CHECK_MCU(LPC13XX) || TU_CHECK_MCU(LPC15XX)
+#if   TU_CHECK_MCU(LPC11UXX, LPC13XX, LPC15XX)
   #define DCD_ATTR_ENDPOINT_MAX   5
 
-#elif TU_CHECK_MCU(LPC175X_6X) || TU_CHECK_MCU(LPC177X_8X) || TU_CHECK_MCU(LPC40XX)
+#elif TU_CHECK_MCU(LPC175X_6X, LPC177X_8X, LPC40XX)
   #define DCD_ATTR_ENDPOINT_MAX   16
 
-#elif TU_CHECK_MCU(LPC18XX) || TU_CHECK_MCU(LPC43XX)
+#elif TU_CHECK_MCU(LPC18XX, LPC43XX)
   // TODO USB0 has 6, USB1 has 4
   #define DCD_ATTR_ENDPOINT_MAX   6
 
@@ -60,7 +60,7 @@
 #elif TU_CHECK_MCU(MIMXRT10XX)
   #define DCD_ATTR_ENDPOINT_MAX   8
 
-#elif TU_CHECK_MCU(MKL25ZXX) || TU_CHECK_MCU(K32L2BXX)
+#elif TU_CHECK_MCU(MKL25ZXX, K32L2BXX)
   #define DCD_ATTR_ENDPOINT_MAX   16
 
 #elif TU_CHECK_MCU(MM32F327X)
@@ -72,8 +72,8 @@
   #define DCD_ATTR_ENDPOINT_MAX   9
 
 //------------- Microchip -------------//
-#elif TU_CHECK_MCU(SAMD21) || TU_CHECK_MCU(SAMD51) || TU_CHECK_MCU(SAME5X) || \
-      TU_CHECK_MCU(SAMD11) || TU_CHECK_MCU(SAML21) || TU_CHECK_MCU(SAML22)
+#elif TU_CHECK_MCU(SAMD21, SAMD51, SAME5X) || \
+      TU_CHECK_MCU(SAMD11, SAML21, SAML22)
   #define DCD_ATTR_ENDPOINT_MAX   8
 
 #elif TU_CHECK_MCU(SAMG)
@@ -119,7 +119,7 @@
   #define DCD_ATTR_ENDPOINT_MAX   9
   #define DCD_ATTR_DWC2_STM32
 
-#elif TU_CHECK_MCU(STM32L0) || TU_CHECK_MCU(STM32L1)
+#elif TU_CHECK_MCU(STM32L0, STM32L1)
   #define DCD_ATTR_ENDPOINT_MAX   8
 
 #elif TU_CHECK_MCU(STM32L4)
@@ -157,7 +157,7 @@
   #define DCD_ATTR_ENDPOINT_MAX   12
 
 //------------- Espressif -------------//
-#elif TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3)
+#elif TU_CHECK_MCU(ESP32S2, ESP32S3)
   #define DCD_ATTR_ENDPOINT_MAX   6
 
 //------------- Dialog -------------//
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index 367fc7b56..c3773fb8b 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -30,13 +30,16 @@
 #include "tusb_option.h"
 #include "device/dcd_attr.h"
 
-#if TUSB_OPT_DEVICE_ENABLED && (defined(DCD_ATTR_DWC2_STM32) || TU_CHECK_MCU(GD32VF103))
+#if TUSB_OPT_DEVICE_ENABLED && \
+    ( defined(DCD_ATTR_DWC2_STM32) || TU_CHECK_MCU(ESP32S2, ESP32S3, GD32VF103) )
 
 #include "device/dcd.h"
 #include "dwc2_type.h"
 
 #if defined(DCD_ATTR_DWC2_STM32)
   #include "dwc2_stm32.h"
+#elif TU_CHECK_MCU(ESP32S2, ESP32S3)
+  #include "dwc2_esp32.h"
 #elif TU_CHECK_MCU(GD32VF103)
   #include "dwc2_gd32.h"
 #else
@@ -72,7 +75,7 @@ typedef struct {
 
 typedef volatile uint32_t * usb_fifo_t;
 
-xfer_ctl_t xfer_status[EP_MAX][2];
+xfer_ctl_t xfer_status[DWC2_EP_MAX][2];
 #define XFER_CTL_BASE(_ep, _dir) &xfer_status[_ep][_dir]
 
 // EP0 transfers are limited to 1 packet - larger sizes has to be split
@@ -85,7 +88,7 @@ static bool _out_ep_closed;                       // Flag to check if RX FIFO si
 // Calculate the RX FIFO size according to recommendations from reference manual
 static inline uint16_t calc_rx_ff_size(uint16_t ep_size)
 {
-  return 15 + 2*(ep_size/4) + 2*EP_MAX;
+  return 15 + 2*(ep_size/4) + 2*DWC2_EP_MAX;
 }
 
 static void update_grxfsiz(uint8_t rhport)
@@ -96,7 +99,7 @@ static void update_grxfsiz(uint8_t rhport)
 
   // Determine largest EP size for RX FIFO
   uint16_t max_epsize = 0;
-  for (uint8_t epnum = 0; epnum < EP_MAX; epnum++)
+  for (uint8_t epnum = 0; epnum < DWC2_EP_MAX; epnum++)
   {
     max_epsize = tu_max16(max_epsize, xfer_status[epnum][TUSB_DIR_OUT].max_size);
   }
@@ -122,7 +125,7 @@ static void bus_reset(uint8_t rhport)
   dev->DCFG &= ~DCFG_DAD_Msk;
 
   // 1. NAK for all OUT endpoints
-  for(uint8_t n = 0; n < EP_MAX; n++) {
+  for(uint8_t n = 0; n < DWC2_EP_MAX; n++) {
     out_ep[n].DOEPCTL |= DOEPCTL_SNAK;
   }
 
@@ -171,11 +174,11 @@ static void bus_reset(uint8_t rhport)
   //   - 2 for each used OUT endpoint
   //
   //   Therefore GRXFSIZ = 13 + 1 + 1 + 2 x (Largest-EPsize/4) + 2 x EPOUTnum
-  //   - FullSpeed (64 Bytes ): GRXFSIZ = 15 + 2 x  16 + 2 x EP_MAX = 47  + 2 x EP_MAX
-  //   - Highspeed (512 bytes): GRXFSIZ = 15 + 2 x 128 + 2 x EP_MAX = 271 + 2 x EP_MAX
+  //   - FullSpeed (64 Bytes ): GRXFSIZ = 15 + 2 x  16 + 2 x DWC2_EP_MAX = 47  + 2 x DWC2_EP_MAX
+  //   - Highspeed (512 bytes): GRXFSIZ = 15 + 2 x 128 + 2 x DWC2_EP_MAX = 271 + 2 x DWC2_EP_MAX
   //
   //   NOTE: Largest-EPsize & EPOUTnum is actual used endpoints in configuration. Since DCD has no knowledge
-  //   of the overall picture yet. We will use the worst scenario: largest possible + EP_MAX
+  //   of the overall picture yet. We will use the worst scenario: largest possible + DWC2_EP_MAX
   //
   //   For Isochronous, largest EP size can be 1023/1024 for FS/HS respectively. In addition if multiple ISO
   //   are enabled at least "2 x (Largest-EPsize/4) + 1" are recommended.  Maybe provide a macro for application to
@@ -186,7 +189,7 @@ static void bus_reset(uint8_t rhport)
   _allocated_fifo_words_tx = 16;
 
   // Control IN uses FIFO 0 with 64 bytes ( 16 32-bit word )
-  core->DIEPTXF0_HNPTXFSIZ = (16 << TX0FD_Pos) | (EP_FIFO_SIZE/4 - _allocated_fifo_words_tx);
+  core->DIEPTXF0_HNPTXFSIZ = (16 << TX0FD_Pos) | (DWC2_EP_FIFO_SIZE/4 - _allocated_fifo_words_tx);
 
   // Fixed control EP0 size to 64 bytes
   in_ep[0].DIEPCTL &= ~(0x03 << DIEPCTL_MPSIZ_Pos);
@@ -197,47 +200,6 @@ static void bus_reset(uint8_t rhport)
   core->GINTMSK |= GINTMSK_OEPINT | GINTMSK_IEPINT;
 }
 
-// Set turn-around timeout according to link speed
-extern uint32_t SystemCoreClock;
-static void set_turnaround(dwc2_core_t * core, tusb_speed_t speed)
-{
-  core->GUSBCFG &= ~GUSBCFG_TRDT;
-
-  if ( speed == TUSB_SPEED_HIGH )
-  {
-    // Use fixed 0x09 for Highspeed
-    core->GUSBCFG |= (0x09 << GUSBCFG_TRDT_Pos);
-  }
-  else
-  {
-    // Turnaround timeout depends on the MCU clock
-    uint32_t turnaround;
-
-    if ( SystemCoreClock >= 32000000U )
-      turnaround = 0x6U;
-    else if ( SystemCoreClock >= 27500000U )
-      turnaround = 0x7U;
-    else if ( SystemCoreClock >= 24000000U )
-      turnaround = 0x8U;
-    else if ( SystemCoreClock >= 21800000U )
-      turnaround = 0x9U;
-    else if ( SystemCoreClock >= 20000000U )
-      turnaround = 0xAU;
-    else if ( SystemCoreClock >= 18500000U )
-      turnaround = 0xBU;
-    else if ( SystemCoreClock >= 17200000U )
-      turnaround = 0xCU;
-    else if ( SystemCoreClock >= 16000000U )
-      turnaround = 0xDU;
-    else if ( SystemCoreClock >= 15000000U )
-      turnaround = 0xEU;
-    else
-      turnaround = 0xFU;
-
-    // Fullspeed depends on MCU clocks, but we will use 0x06 for 32+ Mhz
-    core->GUSBCFG |= (turnaround << GUSBCFG_TRDT_Pos);
-  }
-}
 
 static tusb_speed_t get_speed(uint8_t rhport)
 {
@@ -368,6 +330,8 @@ void dcd_init (uint8_t rhport)
   // peripheral in each Reference Manual.
   dwc2_core_t * core = CORE_REG(rhport);
 
+  // check GSNPSID
+
   // No HNP/SRP (no OTG support), program timeout later.
   if ( rhport == 1 )
   {
@@ -422,7 +386,7 @@ void dcd_init (uint8_t rhport)
 
   // If USB host misbehaves during status portion of control xfer
   // (non zero-length packet), send STALL back and discard.
-  dev->DCFG |=  DCFG_NZLSOHSK;
+  dev->DCFG |= DCFG_NZLSOHSK;
 
   set_speed(rhport, TUD_OPT_HIGH_SPEED ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL);
 
@@ -457,16 +421,6 @@ void dcd_set_address (uint8_t rhport, uint8_t dev_addr)
   dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0);
 }
 
-static void remote_wakeup_delay(void)
-{
-  // try to delay for 1 ms
-  uint32_t count = SystemCoreClock / 1000;
-  while ( count-- )
-  {
-    __NOP();
-  }
-}
-
 void dcd_remote_wakeup(uint8_t rhport)
 {
   (void) rhport;
@@ -482,7 +436,7 @@ void dcd_remote_wakeup(uint8_t rhport)
   core->GINTMSK |= GINTMSK_SOFM;
 
   // Per specs: remote wakeup signal bit must be clear within 1-15ms
-  remote_wakeup_delay();
+  dwc2_remote_wakeup_delay();
 
   dev->DCTL &= ~DCTL_RWUSIG;
 }
@@ -518,7 +472,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
   uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress);
   uint8_t const dir   = tu_edpt_dir(desc_edpt->bEndpointAddress);
 
-  TU_ASSERT(epnum < EP_MAX);
+  TU_ASSERT(epnum < DWC2_EP_MAX);
 
   xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir);
   xfer->max_size = tu_edpt_packet_size(desc_edpt);
@@ -534,7 +488,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
     // If size_rx needs to be extended check if possible and if so enlarge it
     if (core->GRXFSIZ < sz)
     {
-      TU_ASSERT(sz + _allocated_fifo_words_tx <= EP_FIFO_SIZE/4);
+      TU_ASSERT(sz + _allocated_fifo_words_tx <= DWC2_EP_FIFO_SIZE/4);
 
       // Enlarge RX FIFO
       core->GRXFSIZ = sz;
@@ -571,15 +525,15 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
     // - IN EP 1 gets FIFO 1, IN EP "n" gets FIFO "n".
 
     // Check if free space is available
-    TU_ASSERT(_allocated_fifo_words_tx + fifo_size + core->GRXFSIZ <= EP_FIFO_SIZE/4);
+    TU_ASSERT(_allocated_fifo_words_tx + fifo_size + core->GRXFSIZ <= DWC2_EP_FIFO_SIZE/4);
 
     _allocated_fifo_words_tx += fifo_size;
 
-    TU_LOG(2, "    Allocated %u bytes at offset %u", fifo_size*4, EP_FIFO_SIZE-_allocated_fifo_words_tx*4);
+    TU_LOG(2, "    Allocated %u bytes at offset %u", fifo_size*4, DWC2_EP_FIFO_SIZE-_allocated_fifo_words_tx*4);
 
     // DIEPTXF starts at FIFO #1.
     // Both TXFD and TXSA are in unit of 32-bit words.
-    core->DIEPTXF[epnum - 1] = (fifo_size << DIEPTXF_INEPTXFD_Pos) | (EP_FIFO_SIZE/4 - _allocated_fifo_words_tx);
+    core->DIEPTXF[epnum - 1] = (fifo_size << DIEPTXF_INEPTXFD_Pos) | (DWC2_EP_FIFO_SIZE/4 - _allocated_fifo_words_tx);
 
     in_ep[epnum].DIEPCTL |= (1 << DIEPCTL_USBAEP_Pos) |
         (epnum << DIEPCTL_TXFNUM_Pos) |
@@ -606,7 +560,7 @@ void dcd_edpt_close_all (uint8_t rhport)
   // Disable non-control interrupt
   dev->DAINTMSK = (1 << DAINTMSK_OEPM_Pos) | (1 << DAINTMSK_IEPM_Pos);
 
-  for(uint8_t n = 1; n < EP_MAX; n++)
+  for(uint8_t n = 1; n < DWC2_EP_MAX; n++)
   {
     // disable OUT endpoint
     out_ep[n].DOEPCTL = 0;
@@ -756,7 +710,7 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
     uint16_t const fifo_size = (core->DIEPTXF[epnum - 1] & DIEPTXF_INEPTXFD_Msk) >> DIEPTXF_INEPTXFD_Pos;
     uint16_t const fifo_start = (core->DIEPTXF[epnum - 1] & DIEPTXF_INEPTXSA_Msk) >> DIEPTXF_INEPTXSA_Pos;
     // For now only the last opened endpoint can be closed without fuss.
-    TU_ASSERT(fifo_start == EP_FIFO_SIZE/4 - _allocated_fifo_words_tx,);
+    TU_ASSERT(fifo_start == DWC2_EP_FIFO_SIZE/4 - _allocated_fifo_words_tx,);
     _allocated_fifo_words_tx -= fifo_size;
   }
   else
@@ -920,7 +874,7 @@ static void handle_rxflvl_ints(uint8_t rhport, dwc2_epout_t * out_ep) {
 static void handle_epout_ints(uint8_t rhport, dwc2_device_t * dev, dwc2_epout_t * out_ep) {
   // DAINT for a given EP clears when DOEPINTx is cleared.
   // OEPINT will be cleared when DAINT's out bits are cleared.
-  for(uint8_t n = 0; n < EP_MAX; n++) {
+  for(uint8_t n = 0; n < DWC2_EP_MAX; n++) {
     xfer_ctl_t * xfer = XFER_CTL_BASE(n, TUSB_DIR_OUT);
 
     if(dev->DAINT & (1 << (DAINT_OEPINT_Pos + n))) {
@@ -949,7 +903,7 @@ static void handle_epout_ints(uint8_t rhport, dwc2_device_t * dev, dwc2_epout_t
 static void handle_epin_ints(uint8_t rhport, dwc2_device_t * dev, dwc2_epin_t * in_ep) {
   // DAINT for a given EP clears when DIEPINTx is cleared.
   // IEPINT will be cleared when DAINT's out bits are cleared.
-  for ( uint8_t n = 0; n < EP_MAX; n++ )
+  for ( uint8_t n = 0; n < DWC2_EP_MAX; n++ )
   {
     xfer_ctl_t *xfer = XFER_CTL_BASE(n, TUSB_DIR_IN);
 
@@ -1040,7 +994,7 @@ void dcd_int_handler(uint8_t rhport)
 
     tusb_speed_t const speed = get_speed(rhport);
 
-    set_turnaround(core, speed);
+    dwc2_set_turnaround(core, speed);
     dcd_event_bus_reset(rhport, speed, true);
   }
 
diff --git a/src/portable/synopsys/dwc2/dwc2_esp32.h b/src/portable/synopsys/dwc2/dwc2_esp32.h
new file mode 100644
index 000000000..5e544673d
--- /dev/null
+++ b/src/portable/synopsys/dwc2/dwc2_esp32.h
@@ -0,0 +1,82 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+
+#ifndef _DWC2_ESP32_H_
+#define _DWC2_ESP32_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "esp_intr_alloc.h"
+#include "soc/periph_defs.h"
+//#include "soc/usb_periph.h"
+
+#define DWC2_REG_BASE       0x60080000UL
+#define DWC2_EP_MAX         5             // USB_OUT_EP_NUM
+#define DWC2_EP_FIFO_SIZE   1024
+
+// #define EP_FIFO_NUM 5
+
+static intr_handle_t usb_ih;
+
+static void dcd_int_handler_wrap(void* arg)
+{
+  (void) arg;
+  dcd_int_handler(0);
+}
+
+static inline void dcd_dwc2_int_enable (uint8_t rhport)
+{
+  (void) rhport;
+  esp_intr_alloc(ETS_USB_INTR_SOURCE, ESP_INTR_FLAG_LOWMED, dcd_int_handler_wrap, NULL, &usb_ih);
+}
+
+static inline void dcd_dwc2_int_disable (uint8_t rhport)
+{
+  (void) rhport;
+  esp_intr_free(usb_ih);
+}
+
+static inline void dwc2_remote_wakeup_delay(void)
+{
+  vTaskDelay(pdMS_TO_TICKS(1));
+}
+
+static inline void dwc2_set_turnaround(dwc2_core_t * core, tusb_speed_t speed)
+{
+  (void) core;
+  (void) speed;
+
+  // keep the reset value
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DWC2_ESP32_H_ */
diff --git a/src/portable/synopsys/dwc2/dwc2_gd32.h b/src/portable/synopsys/dwc2/dwc2_gd32.h
index 8fe390fd8..1ad066720 100644
--- a/src/portable/synopsys/dwc2/dwc2_gd32.h
+++ b/src/portable/synopsys/dwc2/dwc2_gd32.h
@@ -28,14 +28,18 @@
 #ifndef DWC2_GD32_H_
 #define DWC2_GD32_H_
 
-// for remote wakeup delay
-#define __NOP()   __asm volatile ("nop")
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
 
 // These numbers are the same for the whole GD32VF103 family.
-#define DWC2_REG_BASE   0x50000000UL
-#define EP_MAX          4
-#define EP_FIFO_SIZE    1280
-#define RHPORT_IRQn     86
+#define DWC2_REG_BASE       0x50000000UL
+#define DWC2_EP_MAX         4
+#define DWC2_EP_FIFO_SIZE   1280
+#define RHPORT_IRQn         86
+
+extern uint32_t SystemCoreClock;
 
 // The GD32VF103 is a RISC-V MCU, which implements the ECLIC Core-Local
 // Interrupt Controller by Nuclei. It is nearly API compatible to the
@@ -66,4 +70,25 @@ static inline void dcd_dwc2_int_disable (uint8_t rhport)
   __eclic_disable_interrupt(RHPORT_IRQn);
 }
 
+TU_ATTR_ALWAYS_INLINE
+static inline void dwc2_remote_wakeup_delay(void)
+{
+  // try to delay for 1 ms
+  uint32_t count = SystemCoreClock / 1000;
+  while ( count-- ) __asm volatile ("nop");
+}
+
+static inline void dwc2_set_turnaround(dwc2_core_t * core, tusb_speed_t speed)
+{
+  (void) core;
+  (void) speed;
+
+  // keep the reset value
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* DWC2_GD32_H_ */
diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h
index d99e5502a..2a6d58e9a 100644
--- a/src/portable/synopsys/dwc2/dwc2_stm32.h
+++ b/src/portable/synopsys/dwc2/dwc2_stm32.h
@@ -24,8 +24,12 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_DWC2_STM32_H_
-#define _TUSB_DWC2_STM32_H_
+#ifndef _DWC2_STM32_H_
+#define _DWC2_STM32_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
 
 // EP_MAX       : Max number of bi-directional endpoints including EP0
 // EP_FIFO_SIZE : Size of dedicated USB SRAM
@@ -71,19 +75,21 @@
 
 // On STM32 we associate Port0 to OTG_FS, and Port1 to OTG_HS
 #if TUD_OPT_RHPORT == 0
-  #define EP_MAX            EP_MAX_FS
-  #define EP_FIFO_SIZE      EP_FIFO_SIZE_FS
-  #define DWC2_REG_BASE     USB_OTG_FS_PERIPH_BASE
-  #define RHPORT_IRQn       OTG_FS_IRQn
+  #define DWC2_REG_BASE       USB_OTG_FS_PERIPH_BASE
+  #define DWC2_EP_MAX         EP_MAX_FS
+  #define DWC2_EP_FIFO_SIZE   EP_FIFO_SIZE_FS
+  #define RHPORT_IRQn         OTG_FS_IRQn
 
 #else
-  #define EP_MAX            EP_MAX_HS
-  #define EP_FIFO_SIZE      EP_FIFO_SIZE_HS
-  #define DWC2_REG_BASE     USB_OTG_HS_PERIPH_BASE
-  #define RHPORT_IRQn       OTG_HS_IRQn
+  #define DWC2_REG_BASE       USB_OTG_HS_PERIPH_BASE
+  #define DWC2_EP_MAX         EP_MAX_HS
+  #define DWC2_EP_FIFO_SIZE   EP_FIFO_SIZE_HS
+  #define RHPORT_IRQn         OTG_HS_IRQn
 
 #endif
 
+extern uint32_t SystemCoreClock;
+
 TU_ATTR_ALWAYS_INLINE
 static inline void dcd_dwc2_int_enable(uint8_t rhport)
 {
@@ -98,4 +104,59 @@ static inline void dcd_dwc2_int_disable (uint8_t rhport)
   NVIC_DisableIRQ(RHPORT_IRQn);
 }
 
-#endif /* DWC2_STM32_H_ */
+TU_ATTR_ALWAYS_INLINE
+static inline void dwc2_remote_wakeup_delay(void)
+{
+  // try to delay for 1 ms
+  uint32_t count = SystemCoreClock / 1000;
+  while ( count-- ) __NOP();
+}
+
+// Set turn-around timeout according to link speed
+static inline void dwc2_set_turnaround(dwc2_core_t * core, tusb_speed_t speed)
+{
+  core->GUSBCFG &= ~GUSBCFG_TRDT;
+
+  if ( speed == TUSB_SPEED_HIGH )
+  {
+    // Use fixed 0x09 for Highspeed
+    core->GUSBCFG |= (0x09 << GUSBCFG_TRDT_Pos);
+  }
+  else
+  {
+    // Turnaround timeout depends on the MCU clock
+    uint32_t turnaround;
+
+    if ( SystemCoreClock >= 32000000U )
+      turnaround = 0x6U;
+    else if ( SystemCoreClock >= 27500000U )
+      turnaround = 0x7U;
+    else if ( SystemCoreClock >= 24000000U )
+      turnaround = 0x8U;
+    else if ( SystemCoreClock >= 21800000U )
+      turnaround = 0x9U;
+    else if ( SystemCoreClock >= 20000000U )
+      turnaround = 0xAU;
+    else if ( SystemCoreClock >= 18500000U )
+      turnaround = 0xBU;
+    else if ( SystemCoreClock >= 17200000U )
+      turnaround = 0xCU;
+    else if ( SystemCoreClock >= 16000000U )
+      turnaround = 0xDU;
+    else if ( SystemCoreClock >= 15000000U )
+      turnaround = 0xEU;
+    else
+      turnaround = 0xFU;
+
+    // Fullspeed depends on MCU clocks, but we will use 0x06 for 32+ Mhz
+    core->GUSBCFG |= (turnaround << GUSBCFG_TRDT_Pos);
+  }
+}
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DWC2_STM32_H_ */
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 89d83472b..d707c44c7 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -131,7 +131,7 @@
 // Helper to check if configured MCU is one of listed
 // Apply _TU_CHECK_MCU with || as separator to list of input
 #define _TU_CHECK_MCU(_m)   (CFG_TUSB_MCU == OPT_MCU_##_m)
-#define TU_CHECK_MCU(...)   TU_ARGS_APPLY(_TU_CHECK_MCU, ||, __VA_ARGS__)
+#define TU_CHECK_MCU(...)   (TU_ARGS_APPLY(_TU_CHECK_MCU, ||, __VA_ARGS__))
 
 //--------------------------------------------------------------------+
 // Supported OS
-- 
cgit v1.3.1


From dbd31895bc234ff6d76d3fe736dc613890ab7acb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 25 Oct 2021 17:04:03 +0700
Subject: change usage of TU_CHECK_MCU() to prevent macro conflict

---
 .../audio_4_channel_mic/src/usb_descriptors.c      | 12 ++--
 examples/device/audio_test/src/usb_descriptors.c   |  2 +-
 examples/device/cdc_msc_freertos/src/main.c        |  6 +-
 examples/device/cdc_msc_freertos/src/tusb_config.h |  2 +-
 examples/device/hid_composite_freertos/src/main.c  |  6 +-
 .../hid_composite_freertos/src/tusb_config.h       |  2 +-
 .../device/video_capture/src/usb_descriptors.c     |  4 +-
 src/class/msc/msc_device.c                         |  2 +-
 src/common/tusb_compiler.h                         |  2 +-
 src/device/dcd_attr.h                              | 73 +++++++++++-----------
 src/host/hcd_attr.h                                | 46 +++++++-------
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c      | 11 ++--
 src/portable/synopsys/dwc2/dcd_dwc2.c              |  6 +-
 src/tusb_option.h                                  |  2 +-
 14 files changed, 85 insertions(+), 91 deletions(-)

(limited to 'src/tusb_option.h')

diff --git a/examples/device/audio_4_channel_mic/src/usb_descriptors.c b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
index b6a5bd5c2..93ae2ea47 100644
--- a/examples/device/audio_4_channel_mic/src/usb_descriptors.c
+++ b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
@@ -81,12 +81,12 @@ enum
 
 #define CONFIG_TOTAL_LEN    	(TUD_CONFIG_DESC_LEN + CFG_TUD_AUDIO * TUD_AUDIO_MIC_FOUR_CH_DESC_LEN)
 
-#if TU_CHECK_MCU(LPC175X_6X) || TU_CHECK_MCU(LPC177X_8X) || TU_CHECK_MCU(LPC40XX)
+#if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
   // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
   // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ...
   #define EPNUM_AUDIO   0x03
 
-#elif TU_CHECK_MCU(NRF5X)
+#elif TU_CHECK_MCU(OPT_MCU_NRF5X)
   // nRF5x ISO can only be endpoint 8
   #define EPNUM_AUDIO   0x08
 
@@ -96,11 +96,11 @@ enum
 
 uint8_t const desc_configuration[] =
 {
-    // Interface count, string index, total length, attribute, power in mA
-    TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
+  // Interface count, string index, total length, attribute, power in mA
+  TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
-    // Interface number, string index, EP Out & EP In address, EP size
-    TUD_AUDIO_MIC_FOUR_CH_DESCRIPTOR(/*_itfnum*/ ITF_NUM_AUDIO_CONTROL, /*_stridx*/ 0, /*_nBytesPerSample*/ CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX, /*_nBitsUsedPerSample*/ CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX*8, /*_epin*/ 0x80 | EPNUM_AUDIO, /*_epsize*/ CFG_TUD_AUDIO_EP_SZ_IN)
+  // Interface number, string index, EP Out & EP In address, EP size
+  TUD_AUDIO_MIC_FOUR_CH_DESCRIPTOR(/*_itfnum*/ ITF_NUM_AUDIO_CONTROL, /*_stridx*/ 0, /*_nBytesPerSample*/ CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX, /*_nBitsUsedPerSample*/ CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX*8, /*_epin*/ 0x80 | EPNUM_AUDIO, /*_epsize*/ CFG_TUD_AUDIO_EP_SZ_IN)
 };
 
 // Invoked when received GET CONFIGURATION DESCRIPTOR
diff --git a/examples/device/audio_test/src/usb_descriptors.c b/examples/device/audio_test/src/usb_descriptors.c
index 348f5eede..09b2a2d45 100644
--- a/examples/device/audio_test/src/usb_descriptors.c
+++ b/examples/device/audio_test/src/usb_descriptors.c
@@ -86,7 +86,7 @@ enum
   // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ...
   #define EPNUM_AUDIO   0x03
 
-#elif TU_CHECK_MCU(NRF5X)
+#elif TU_CHECK_MCU(OPT_MCU_NRF5X)
   // nRF5x ISO can only be endpoint 8
   #define EPNUM_AUDIO   0x08
 
diff --git a/examples/device/cdc_msc_freertos/src/main.c b/examples/device/cdc_msc_freertos/src/main.c
index 65b7fda3b..2d3426f1d 100644
--- a/examples/device/cdc_msc_freertos/src/main.c
+++ b/examples/device/cdc_msc_freertos/src/main.c
@@ -30,7 +30,7 @@
 #include "bsp/board.h"
 #include "tusb.h"
 
-#if TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3)
+#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
   // ESP-IDF need "freertos/" prefix in include path.
   // CFG_TUSB_OS_INC_PATH should be defined accordingly.
   #include "freertos/FreeRTOS.h"
@@ -105,14 +105,14 @@ int main(void)
   (void) xTaskCreateStatic( cdc_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, cdc_stack, &cdc_taskdef);
 
   // skip starting scheduler (and return) for ESP32-S2 or ESP32-S3
-#if !( TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3) )
+#if !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
   vTaskStartScheduler();
 #endif
 
   return 0;
 }
 
-#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
+#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
 void app_main(void)
 {
   main();
diff --git a/examples/device/cdc_msc_freertos/src/tusb_config.h b/examples/device/cdc_msc_freertos/src/tusb_config.h
index d4bbdee48..55e84c62d 100644
--- a/examples/device/cdc_msc_freertos/src/tusb_config.h
+++ b/examples/device/cdc_msc_freertos/src/tusb_config.h
@@ -68,7 +68,7 @@
 #define CFG_TUSB_OS               OPT_OS_FREERTOS
 
 // Espressif IDF requires "freertos/" prefix in include path
-#if TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3)
+#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
   #define CFG_TUSB_OS_INC_PATH    freertos/
 #endif
 
diff --git a/examples/device/hid_composite_freertos/src/main.c b/examples/device/hid_composite_freertos/src/main.c
index b25c71f64..336f5d426 100644
--- a/examples/device/hid_composite_freertos/src/main.c
+++ b/examples/device/hid_composite_freertos/src/main.c
@@ -31,7 +31,7 @@
 #include "tusb.h"
 #include "usb_descriptors.h"
 
-#if TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3)
+#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
   // ESP-IDF need "freertos/" prefix in include path.
   // CFG_TUSB_OS_INC_PATH should be defined accordingly.
   #include "freertos/FreeRTOS.h"
@@ -105,14 +105,14 @@ int main(void)
   (void) xTaskCreateStatic( hid_task, "hid", HID_STACK_SZIE, NULL, configMAX_PRIORITIES-2, hid_stack, &hid_taskdef);
 
   // skip starting scheduler (and return) for ESP32-S2 or ESP32-S3
-#if !( TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3) )
+#if !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
   vTaskStartScheduler();
 #endif
 
   return 0;
 }
 
-#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
+#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
 void app_main(void)
 {
   main();
diff --git a/examples/device/hid_composite_freertos/src/tusb_config.h b/examples/device/hid_composite_freertos/src/tusb_config.h
index b061dce3f..062f32ac3 100644
--- a/examples/device/hid_composite_freertos/src/tusb_config.h
+++ b/examples/device/hid_composite_freertos/src/tusb_config.h
@@ -68,7 +68,7 @@
 #define CFG_TUSB_OS               OPT_OS_FREERTOS
 
 // Espressif IDF requires "freertos/" prefix in include path
-#if TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3)
+#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
   #define CFG_TUSB_OS_INC_PATH    freertos/
 #endif
 
diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c
index 404ffe070..da8ec8e89 100644
--- a/examples/device/video_capture/src/usb_descriptors.c
+++ b/examples/device/video_capture/src/usb_descriptors.c
@@ -77,12 +77,12 @@ uint8_t const * tud_descriptor_device_cb(void)
 
 #define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_LEN)
 
-#if TU_CHECK_MCU(LPC175X_6X) || TU_CHECK_MCU(LPC177X_8X) || TU_CHECK_MCU(LPC40XX)
+#if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
   // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
   // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In, 5 Bulk etc ...
   #define EPNUM_VIDEO_IN    0x83
 
-#elif TU_CHECK_MCU(NRF5X)
+#elif TU_CHECK_MCU(OPT_MCU_NRF5X)
   // nRF5x ISO can only be endpoint 8
   #define EPNUM_VIDEO_IN    0x88
 
diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c
index 81522be46..dd490dd68 100644
--- a/src/class/msc/msc_device.c
+++ b/src/class/msc/msc_device.c
@@ -617,7 +617,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
       }
     }
 
-    #if TU_CHECK_MCU(CXD56)
+    #if TU_CHECK_MCU(OPT_MCU_CXD56)
     // WORKAROUND: cxd56 has its own nuttx usb stack which does not forward Set/ClearFeature(Endpoint) to DCD.
     // There is no way for us to know when EP is un-stall, therefore we will unconditionally un-stall here and
     // hope everything will work
diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index b0999b5d9..d3284c62a 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -69,7 +69,7 @@
 
 /*------------------------------------------------------------------*/
 /* Count number of arguments of __VA_ARGS__
- * - reference https://groups.google.com/forum/#!topic/comp.std.c/d-6Mj5Lko_s
+ * - reference https://stackoverflow.com/questions/2124339/c-preprocessor-va-args-number-of-arguments
  * - _GET_NTH_ARG() takes args >= N (64) but only expand to Nth one (64th)
  * - _RSEQ_N() is reverse sequential to N to add padding to have
  * Nth position is the same as the number of arguments
diff --git a/src/device/dcd_attr.h b/src/device/dcd_attr.h
index ddec481a8..54627eaa0 100644
--- a/src/device/dcd_attr.h
+++ b/src/device/dcd_attr.h
@@ -36,59 +36,59 @@
 // - PORT_HIGHSPEED: mask to indicate which port support highspeed mode, bit0 for port0 and so on.
 
 //------------- NXP -------------//
-#if   TU_CHECK_MCU(LPC11UXX, LPC13XX, LPC15XX)
+#if   TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX)
   #define DCD_ATTR_ENDPOINT_MAX   5
 
-#elif TU_CHECK_MCU(LPC175X_6X, LPC177X_8X, LPC40XX)
+#elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
   #define DCD_ATTR_ENDPOINT_MAX   16
 
-#elif TU_CHECK_MCU(LPC18XX, LPC43XX)
+#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
   // TODO USB0 has 6, USB1 has 4
   #define DCD_ATTR_ENDPOINT_MAX   6
 
-#elif TU_CHECK_MCU(LPC51UXX)
+#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX)
    #define DCD_ATTR_ENDPOINT_MAX   5
 
-#elif TU_CHECK_MCU(LPC54XXX)
+#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX)
   // TODO USB0 has 5, USB1 has 6
   #define DCD_ATTR_ENDPOINT_MAX   6
 
-#elif TU_CHECK_MCU(LPC55XX)
+#elif TU_CHECK_MCU(OPT_MCU_LPC55XX)
   // TODO USB0 has 5, USB1 has 6
   #define DCD_ATTR_ENDPOINT_MAX   6
 
-#elif TU_CHECK_MCU(MIMXRT10XX)
+#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX)
   #define DCD_ATTR_ENDPOINT_MAX   8
 
-#elif TU_CHECK_MCU(MKL25ZXX, K32L2BXX)
+#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX)
   #define DCD_ATTR_ENDPOINT_MAX   16
 
-#elif TU_CHECK_MCU(MM32F327X)
+#elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
   #define DCD_ATTR_ENDPOINT_MAX   16
 
 //------------- Nordic -------------//
-#elif TU_CHECK_MCU(NRF5X)
+#elif TU_CHECK_MCU(OPT_MCU_NRF5X)
   // 8 CBI + 1 ISO
   #define DCD_ATTR_ENDPOINT_MAX   9
 
 //------------- Microchip -------------//
-#elif TU_CHECK_MCU(SAMD21, SAMD51, SAME5X) || \
-      TU_CHECK_MCU(SAMD11, SAML21, SAML22)
+#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \
+      TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22)
   #define DCD_ATTR_ENDPOINT_MAX   8
 
-#elif TU_CHECK_MCU(SAMG)
+#elif TU_CHECK_MCU(OPT_MCU_SAMG)
   #define DCD_ATTR_ENDPOINT_MAX   6
   #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
 
-#elif TU_CHECK_MCU(SAMX7X)
+#elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
   #define DCD_ATTR_ENDPOINT_MAX   10
   #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
 
 //------------- ST -------------//
-#elif TU_CHECK_MCU(STM32F0)
+#elif TU_CHECK_MCU(OPT_MCU_STM32F0)
   #define DCD_ATTR_ENDPOINT_MAX   8
 
-#elif TU_CHECK_MCU(STM32F1)
+#elif TU_CHECK_MCU(OPT_MCU_STM32F1)
   #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \
       defined (STM32F107xB) || defined (STM32F107xC)
     #define DCD_ATTR_ENDPOINT_MAX   4
@@ -97,32 +97,32 @@
     #define DCD_ATTR_ENDPOINT_MAX   8
   #endif
 
-#elif TU_CHECK_MCU(STM32F2)
+#elif TU_CHECK_MCU(OPT_MCU_STM32F2)
   // FS has 4 ep, HS has 5 ep
   #define DCD_ATTR_ENDPOINT_MAX   6
   #define DCD_ATTR_DWC2_STM32
 
-#elif TU_CHECK_MCU(STM32F3)
+#elif TU_CHECK_MCU(OPT_MCU_STM32F3)
   #define DCD_ATTR_ENDPOINT_MAX   8
 
-#elif TU_CHECK_MCU(STM32F4)
+#elif TU_CHECK_MCU(OPT_MCU_STM32F4)
   // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9
   #define DCD_ATTR_ENDPOINT_MAX   6
   #define DCD_ATTR_DWC2_STM32
 
-#elif TU_CHECK_MCU(STM32F7)
+#elif TU_CHECK_MCU(OPT_MCU_STM32F7)
   // FS has 6, HS has 9
   #define DCD_ATTR_ENDPOINT_MAX   9
   #define DCD_ATTR_DWC2_STM32
 
-#elif TU_CHECK_MCU(STM32H7)
+#elif TU_CHECK_MCU(OPT_MCU_STM32H7)
   #define DCD_ATTR_ENDPOINT_MAX   9
   #define DCD_ATTR_DWC2_STM32
 
-#elif TU_CHECK_MCU(STM32L0, STM32L1)
+#elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1)
   #define DCD_ATTR_ENDPOINT_MAX   8
 
-#elif TU_CHECK_MCU(STM32L4)
+#elif TU_CHECK_MCU(OPT_MCU_STM32L4)
   #if defined (STM32L475xx) || defined (STM32L476xx) ||                          \
       defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \
       defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \
@@ -134,53 +134,50 @@
   #endif
 
 //------------- Sony -------------//
-#elif TU_CHECK_MCU(CXD56)
+#elif TU_CHECK_MCU(OPT_MCU_CXD56)
   #define DCD_ATTR_ENDPOINT_MAX   7
   #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
 
 //------------- TI -------------//
-#elif TU_CHECK_MCU(MSP430x5xx)
+#elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx)
   #define DCD_ATTR_ENDPOINT_MAX   8
 
 //------------- ValentyUSB -------------//
-#elif TU_CHECK_MCU(VALENTYUSB_EPTRI)
+#elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI)
   #define DCD_ATTR_ENDPOINT_MAX   16
 
 //------------- Nuvoton -------------//
-#elif TU_CHECK_MCU(NUC121) || TU_CHECK_MCU(NUC126)
+#elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126)
   #define DCD_ATTR_ENDPOINT_MAX   8
 
-#elif TU_CHECK_MCU(NUC120)
+#elif TU_CHECK_MCU(OPT_MCU_NUC120)
   #define DCD_ATTR_ENDPOINT_MAX   6
 
-#elif TU_CHECK_MCU(NUC505)
+#elif TU_CHECK_MCU(OPT_MCU_NUC505)
   #define DCD_ATTR_ENDPOINT_MAX   12
 
 //------------- Espressif -------------//
-#elif TU_CHECK_MCU(ESP32S2, ESP32S3)
+#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
   #define DCD_ATTR_ENDPOINT_MAX   6
 
 //------------- Dialog -------------//
-#elif TU_CHECK_MCU(DA1469X)
+#elif TU_CHECK_MCU(OPT_MCU_DA1469X)
   #define DCD_ATTR_ENDPOINT_MAX   4
 
 //------------- Raspberry Pi -------------//
-#elif TU_CHECK_MCU(RP2040)
+#elif TU_CHECK_MCU(OPT_MCU_RP2040)
   #define DCD_ATTR_ENDPOINT_MAX   16
 
 //------------- Silabs -------------//
-#elif TU_CHECK_MCU(EFM32GG) || TU_CHECK_MCU(EFM32GG11) || TU_CHECK_MCU(EFM32GG12)
+#elif TU_CHECK_MCU(OPT_MCU_EFM32GG, OPT_MCU_EFM32GG11, OPT_MCU_EFM32GG12)
   #define DCD_ATTR_ENDPOINT_MAX   7
 
 //------------- Renesas -------------//
-#elif TU_CHECK_MCU(RX63X) || TU_CHECK_MCU(RX65X) || TU_CHECK_MCU(RX72N)
+#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
   #define DCD_ATTR_ENDPOINT_MAX   10
 
-//#elif TU_CHECK_MCU(MM32F327X)
-//  #define DCD_ATTR_ENDPOINT_MAX not known yet
-
 //------------- GigaDevice -------------//
-#elif TU_CHECK_MCU(GD32VF103)
+#elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
   #define DCD_ATTR_ENDPOINT_MAX   4
 
 #else
diff --git a/src/host/hcd_attr.h b/src/host/hcd_attr.h
index 729fc407b..a9bc242d7 100644
--- a/src/host/hcd_attr.h
+++ b/src/host/hcd_attr.h
@@ -34,64 +34,64 @@
 // - PORT_HIGHSPEED: mask to indicate which port support highspeed mode, bit0 for port0 and so on.
 
 //------------- NXP -------------//
-#if TU_CHECK_MCU(LPC175X_6X) || TU_CHECK_MCU(LPC177X_8X) || TU_CHECK_MCU(LPC40XX)
+#if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
   #define HCD_ATTR_OHCI
 
-#elif TU_CHECK_MCU(LPC18XX) || TU_CHECK_MCU(LPC43XX)
+#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
   #define HCD_ATTR_EHCI_TRANSDIMENSION
 
-#elif TU_CHECK_MCU(LPC54XXX)
+#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX)
   // #define HCD_ATTR_EHCI_NXP_PTD
 
-#elif TU_CHECK_MCU(LPC55XX)
+#elif TU_CHECK_MCU(OPT_MCU_LPC55XX)
   // #define HCD_ATTR_EHCI_NXP_PTD
 
-#elif TU_CHECK_MCU(MIMXRT10XX)
+#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX)
   #define HCD_ATTR_EHCI_TRANSDIMENSION
 
-#elif TU_CHECK_MCU(MKL25ZXX)
+#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX)
 
 //------------- Microchip -------------//
-#elif TU_CHECK_MCU(SAMD21) || TU_CHECK_MCU(SAMD51) || TU_CHECK_MCU(SAME5X) || \
-      TU_CHECK_MCU(SAMD11) || TU_CHECK_MCU(SAML21) || TU_CHECK_MCU(SAML22)
+#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \
+      TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22)
 
-#elif TU_CHECK_MCU(SAMG)
+#elif TU_CHECK_MCU(OPT_MCU_SAMG)
 
-#elif TU_CHECK_MCU(SAMX7X)
+#elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
 
 //------------- ST -------------//
-#elif TU_CHECK_MCU(STM32F0) || TU_CHECK_MCU(STM32F1) || TU_CHECK_MCU(STM32F3) || \
-      TU_CHECK_MCU(STM32L0) || TU_CHECK_MCU(STM32L1) || TU_CHECK_MCU(STM32L4)
+#elif TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F1, OPT_MCU_STM32F3) || \
+      TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1, OPT_MCU_STM32L4)
 
-#elif TU_CHECK_MCU(STM32F2) || TU_CHECK_MCU(STM32F4) || TU_CHECK_MCU(STM32F3)
+#elif TU_CHECK_MCU(OPT_MCU_STM32F2, OPT_MCU_STM32F3, OPT_MCU_STM32F4)
 
-#elif TU_CHECK_MCU(STM32F7)
+#elif TU_CHECK_MCU(OPT_MCU_STM32F7)
 
-#elif TU_CHECK_MCU(STM32H7)
+#elif TU_CHECK_MCU(OPT_MCU_STM32H7)
 
 //------------- Sony -------------//
-#elif TU_CHECK_MCU(CXD56)
+#elif TU_CHECK_MCU(OPT_MCU_CXD56)
 
 //------------- Nuvoton -------------//
-#elif TU_CHECK_MCU(NUC505)
+#elif TU_CHECK_MCU(OPT_MCU_NUC505)
 
 //------------- Espressif -------------//
-#elif TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3)
+#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
 
 //------------- Raspberry Pi -------------//
-#elif TU_CHECK_MCU(RP2040)
+#elif TU_CHECK_MCU(OPT_MCU_RP2040)
 
 //------------- Silabs -------------//
-#elif TU_CHECK_MCU(EFM32GG) || TU_CHECK_MCU(EFM32GG11) || TU_CHECK_MCU(EFM32GG12)
+#elif TU_CHECK_MCU(OPT_MCU_EFM32GG, OPT_MCU_EFM32GG11, OPT_MCU_EFM32GG12)
 
 //------------- Renesas -------------//
-#elif TU_CHECK_MCU(RX63X) || TU_CHECK_MCU(RX65X) || TU_CHECK_MCU(RX72N)
+#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
 
-//#elif TU_CHECK_MCU(MM32F327X)
+//#elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
 //  #define DCD_ATTR_ENDPOINT_MAX not known yet
 
 //------------- GigaDevice -------------//
-#elif TU_CHECK_MCU(GD32VF103)
+#elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
 
 #else
 //  #warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8"
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index ca6564d46..933f352a2 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -109,13 +109,10 @@
 #define STM32F1_FSDEV
 #endif
 
-#if (TUSB_OPT_DEVICE_ENABLED) && ( \
-      (CFG_TUSB_MCU == OPT_MCU_STM32F0                          ) || \
-      (CFG_TUSB_MCU == OPT_MCU_STM32F1 && defined(STM32F1_FSDEV)) || \
-      (CFG_TUSB_MCU == OPT_MCU_STM32F3                          ) || \
-	  (CFG_TUSB_MCU == OPT_MCU_STM32L0                          ) || \
-      (CFG_TUSB_MCU == OPT_MCU_STM32L1                          ) \
-    )
+#if TUSB_OPT_DEVICE_ENABLED && \
+      ( TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F3, OPT_MCU_STM32L0, OPT_MCU_STM32L1) || \
+        (TU_CHECK_MCU(OPT_MCU_STM32F1) && defined(STM32F1_FSDEV)) \
+      )
 
 // In order to reduce the dependance on HAL, we undefine this.
 // Some definitions are copied to our private include file.
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index fca5321f7..7ae10652c 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -31,16 +31,16 @@
 #include "device/dcd_attr.h"
 
 #if TUSB_OPT_DEVICE_ENABLED && \
-    ( defined(DCD_ATTR_DWC2_STM32) || TU_CHECK_MCU(ESP32S2, ESP32S3, GD32VF103) )
+    ( defined(DCD_ATTR_DWC2_STM32) || TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_GD32VF103) )
 
 #include "device/dcd.h"
 #include "dwc2_type.h"
 
 #if defined(DCD_ATTR_DWC2_STM32)
   #include "dwc2_stm32.h"
-#elif TU_CHECK_MCU(ESP32S2, ESP32S3)
+#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
   #include "dwc2_esp32.h"
-#elif TU_CHECK_MCU(GD32VF103)
+#elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
   #include "dwc2_gd32.h"
 #else
   #error "Unsupported MCUs"
diff --git a/src/tusb_option.h b/src/tusb_option.h
index d707c44c7..509ff4a3c 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -130,7 +130,7 @@
 
 // Helper to check if configured MCU is one of listed
 // Apply _TU_CHECK_MCU with || as separator to list of input
-#define _TU_CHECK_MCU(_m)   (CFG_TUSB_MCU == OPT_MCU_##_m)
+#define _TU_CHECK_MCU(_m)   (CFG_TUSB_MCU == _m)
 #define TU_CHECK_MCU(...)   (TU_ARGS_APPLY(_TU_CHECK_MCU, ||, __VA_ARGS__))
 
 //--------------------------------------------------------------------+
-- 
cgit v1.3.1


From 9cd5a87c64425b8a7427531735f06f255117aeeb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 30 Oct 2021 20:42:55 +0700
Subject: add support for EFM32GG

merge GG12 GG12 to simply OPT_MCU_EFM32GG
---
 hw/bsp/board_mcu.h                           |   2 +-
 hw/bsp/sltb009a/board.mk                     |   4 +-
 hw/bsp/stm32f4/family.c                      |   7 ++
 hw/bsp/stm32h7/boards/stm32h743eval/board.mk |   1 +
 hw/bsp/stm32h7/family.mk                     |  12 ++-
 src/device/dcd_attr.h                        |   2 +-
 src/host/hcd_attr.h                          |   2 +-
 src/portable/synopsys/dwc2/dcd_dwc2.c        |  90 ++++++++++-------
 src/portable/synopsys/dwc2/dwc2_bcm.h        |  17 +++-
 src/portable/synopsys/dwc2/dwc2_esp32.h      |  18 +++-
 src/portable/synopsys/dwc2/dwc2_gd32.h       |  18 +++-
 src/portable/synopsys/dwc2/dwc2_stm32.h      | 143 +++++++++++++++------------
 src/portable/synopsys/dwc2/dwc2_type.h       |   2 +-
 src/tusb_option.h                            |   2 -
 14 files changed, 199 insertions(+), 121 deletions(-)

(limited to 'src/tusb_option.h')

diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h
index a4d57597c..c840db89e 100644
--- a/hw/bsp/board_mcu.h
+++ b/hw/bsp/board_mcu.h
@@ -125,7 +125,7 @@
 #elif CFG_TUSB_MCU == OPT_MCU_RP2040
   #include "pico.h"
   
-#elif CFG_TUSB_MCU == OPT_MCU_EFM32GG || CFG_TUSB_MCU == OPT_MCU_EFM32GG11 || CFG_TUSB_MCU == OPT_MCU_EFM32GG12
+#elif CFG_TUSB_MCU == OPT_MCU_EFM32GG
   #include "em_device.h"
 
 #elif CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X
diff --git a/hw/bsp/sltb009a/board.mk b/hw/bsp/sltb009a/board.mk
index e8a24d1bd..7a046b34b 100644
--- a/hw/bsp/sltb009a/board.mk
+++ b/hw/bsp/sltb009a/board.mk
@@ -8,7 +8,7 @@ CFLAGS += \
   -D__STARTUP_CLEAR_BSS \
   -D__START=main \
   -DEFM32GG12B810F1024GM64 \
-  -DCFG_TUSB_MCU=OPT_MCU_EFM32GG12 
+  -DCFG_TUSB_MCU=OPT_MCU_EFM32GG
 
 # mcu driver cause following warnings
 #CFLAGS += -Wno-error=unused-parameter
@@ -24,7 +24,7 @@ LD_FILE = $(SILABS_CMSIS)/Source/GCC/$(SILABS_FAMILY).ld
 
 SRC_C += \
   $(SILABS_CMSIS)/Source/system_$(SILABS_FAMILY).c \
-  src/portable/silabs/efm32/dcd_efm32.c
+	src/portable/synopsys/dwc2/dcd_dwc2.c
 
 SRC_S += \
   $(SILABS_CMSIS)/Source/GCC/startup_$(SILABS_FAMILY).S
diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c
index 31f27fa3f..82d4957e7 100644
--- a/hw/bsp/stm32f4/family.c
+++ b/hw/bsp/stm32f4/family.c
@@ -36,6 +36,11 @@ void OTG_FS_IRQHandler(void)
   tud_int_handler(0);
 }
 
+void OTG_HS_IRQHandler(void)
+{
+  tud_int_handler(1);
+}
+
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
@@ -134,6 +139,8 @@ void board_init(void)
   // Enable USB OTG clock
   __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
 
+//  __HAL_RCC_USB_OTG_HS_CLK_ENABLE();
+
   board_vbus_sense_init();
 }
 
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.mk b/hw/bsp/stm32h7/boards/stm32h743eval/board.mk
index 96d14a795..b768a0ee6 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.mk
@@ -2,6 +2,7 @@ CFLAGS += -DSTM32H743xx -DHSE_VALUE=25000000
 
 # Default is Highspeed port
 PORT ?= 1
+SPEED ?= high
 
 SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s
 LD_FILE = $(BOARD_PATH)/stm32h743xx_flash.ld
diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk
index 6a257e22d..096d04d0c 100644
--- a/hw/bsp/stm32h7/family.mk
+++ b/hw/bsp/stm32h7/family.mk
@@ -19,16 +19,22 @@ CFLAGS += \
 	-DBOARD_DEVICE_RHPORT_NUM=$(PORT)
 
 ifeq ($(PORT), 1)
-  CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED
-  $(info "PORT1 High Speed")
+  ifeq ($(SPEED), high)
+    CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED
+    $(info "Using OTG_HS in HighSpeed mode")
+  else
+    CFLAGS += -DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_FULL_SPEED
+    $(info "Using OTG_HS in FullSpeed mode")
+  endif
 else
-  $(info "PORT0 Full Speed")
+  $(info "Using OTG_FS")
 endif
 
 # suppress warning caused by vendor mcu driver
 CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align
 
 # All source paths should be relative to the top level.
+
 SRC_C += \
 	src/portable/synopsys/dwc2/dcd_dwc2.c \
 	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
diff --git a/src/device/dcd_attr.h b/src/device/dcd_attr.h
index 90f3a526a..70854f9c6 100644
--- a/src/device/dcd_attr.h
+++ b/src/device/dcd_attr.h
@@ -169,7 +169,7 @@
   #define DCD_ATTR_ENDPOINT_MAX   16
 
 //------------- Silabs -------------//
-#elif TU_CHECK_MCU(OPT_MCU_EFM32GG, OPT_MCU_EFM32GG11, OPT_MCU_EFM32GG12)
+#elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
   #define DCD_ATTR_ENDPOINT_MAX   7
 
 //------------- Renesas -------------//
diff --git a/src/host/hcd_attr.h b/src/host/hcd_attr.h
index a9bc242d7..06011c63c 100644
--- a/src/host/hcd_attr.h
+++ b/src/host/hcd_attr.h
@@ -82,7 +82,7 @@
 #elif TU_CHECK_MCU(OPT_MCU_RP2040)
 
 //------------- Silabs -------------//
-#elif TU_CHECK_MCU(OPT_MCU_EFM32GG, OPT_MCU_EFM32GG11, OPT_MCU_EFM32GG12)
+#elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
 
 //------------- Renesas -------------//
 #elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index aad7e45cc..16780cba8 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -31,7 +31,9 @@
 #include "device/dcd_attr.h"
 
 #if TUSB_OPT_DEVICE_ENABLED && \
-    ( defined(DCD_ATTR_DWC2_STM32) || TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_GD32VF103, OPT_MCU_BCM2711) )
+    ( defined(DCD_ATTR_DWC2_STM32) || \
+      TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_GD32VF103) || \
+      TU_CHECK_MCU(OPT_MCU_EFM32GG, OPT_MCU_BCM2711) )
 
 #include "device/dcd.h"
 #include "dwc2_type.h"
@@ -44,6 +46,8 @@
   #include "dwc2_gd32.h"
 #elif TU_CHECK_MCU(OPT_MCU_BCM2711)
   #include "dwc2_bcm.h"
+#elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
+  #include "dwc2_efm32.h"
 #else
   #error "Unsupported MCUs"
 #endif
@@ -260,6 +264,9 @@ void print_dwc2_info(dwc2_regs_t * dwc2)
   dwc2_ghwcfg3_t const * hw_cfg3 = &dwc2->ghwcfg3_bm;
   dwc2_ghwcfg4_t const * hw_cfg4 = &dwc2->ghwcfg4_bm;
 
+  TU_LOG_HEX(DWC2_DEBUG, dwc2->gotgctl);
+  TU_LOG_HEX(DWC2_DEBUG, dwc2->gusbcfg);
+  TU_LOG_HEX(DWC2_DEBUG, dwc2->dcfg);
   TU_LOG_HEX(DWC2_DEBUG, dwc2->guid);
   TU_LOG_HEX(DWC2_DEBUG, dwc2->gsnpsid);
   TU_LOG_HEX(DWC2_DEBUG, dwc2->ghwcfg1);
@@ -349,23 +356,22 @@ static void phy_fs_init(dwc2_regs_t * dwc2)
   // Select FS PHY
   dwc2->gusbcfg |= GUSBCFG_PHYSEL;
 
+  // MCU specific PHY init before reset
+  dwc2_phy_init(dwc2, HS_PHY_TYPE_NONE);
+
   // Reset core after selecting PHY
   reset_core(dwc2);
 
-  // set turn around
   // USB turnaround time is critical for certification where long cables and 5-Hubs are used.
   // So if you need the AHB to run at less than 30 MHz, and if USB turnaround time is not critical,
-  // these bits can be programmed to a larger value.
-  //TU_LOG_INT(DWC2_DEBUG, (dwc2->gusbcfg & GUSBCFG_TRDT_Msk) >> GUSBCFG_TRDT_Pos );
-  dwc2_phyfs_set_turnaround(dwc2);
+  // these bits can be programmed to a larger value. Default is 5
+  dwc2->gusbcfg = (dwc2->gusbcfg & ~GUSBCFG_TRDT_Msk) | (5u << GUSBCFG_TRDT_Pos);
+
+  // MCU specific PHY update post reset
+  dwc2_phy_update(dwc2, HS_PHY_TYPE_NONE);
 
   // set max speed
   dwc2->dcfg = (dwc2->dcfg & ~DCFG_DSPD_Msk) | (DCFG_DSPD_FS << DCFG_DSPD_Pos);
-
-  #if defined(DCD_ATTR_DWC2_STM32)
-  // activate FS PHY on stm32
-  dwc2->stm32_gccfg |= STM32_GCCFG_PWRDWN;
-  #endif
 }
 
 static void phy_hs_init(dwc2_regs_t * dwc2)
@@ -399,19 +405,13 @@ static void phy_hs_init(dwc2_regs_t * dwc2)
 
     // Set 16-bit interface if supported
     if (dwc2->ghwcfg4_bm.utmi_phy_data_width) gusbcfg |= GUSBCFG_PHYIF16;
-
-    #if defined(DCD_ATTR_DWC2_STM32) && defined(USB_HS_PHYC)
-    dwc2_stm32_utmi_phy_init(dwc2);
-    #endif
   }
 
   // Apply config
   dwc2->gusbcfg = gusbcfg;
 
-  #if defined(DCD_ATTR_DWC2_STM32)
-  // Disable STM32 FS PHY
-  dwc2->stm32_gccfg &= ~STM32_GCCFG_PWRDWN;
-  #endif
+  // mcu specific phy init
+  dwc2_phy_init(dwc2, dwc2->ghwcfg2_bm.hs_phy_type);
 
   // Reset core after selecting PHY
   reset_core(dwc2);
@@ -421,7 +421,10 @@ static void phy_hs_init(dwc2_regs_t * dwc2)
   // - 5 if using 16-bit PHY interface
   gusbcfg &= ~GUSBCFG_TRDT_Msk;
   gusbcfg |= (dwc2->ghwcfg4_bm.utmi_phy_data_width ? 5u : 9u) << GUSBCFG_TRDT_Pos;
-  dwc2->gusbcfg = gusbcfg; // Apply config
+  dwc2->gusbcfg = gusbcfg;
+
+  // MCU specific PHY update post reset
+  dwc2_phy_update(dwc2, dwc2->ghwcfg2_bm.hs_phy_type);
 
   // Set max speed
   dwc2->dcfg = (dwc2->dcfg & ~DCFG_DSPD_Msk) | (DCFG_DSPD_HS << DCFG_DSPD_Pos);
@@ -429,16 +432,16 @@ static void phy_hs_init(dwc2_regs_t * dwc2)
 
 static bool check_dwc2(dwc2_regs_t * dwc2)
 {
+#if CFG_TUSB_DEBUG >= DWC2_DEBUG
+  print_dwc2_info(dwc2);
+#endif
+
   // For some reasons: GD32VF103 snpsid and all hwcfg register are always zero (skip it)
 #if !TU_CHECK_MCU(OPT_MCU_GD32VF103)
   uint32_t const gsnpsid = dwc2->gsnpsid & GSNPSID_ID_MASK;
   TU_ASSERT(gsnpsid == DWC2_OTG_ID || gsnpsid == DWC2_FS_IOT_ID || gsnpsid == DWC2_HS_IOT_ID);
 #endif
 
-#if CFG_TUSB_DEBUG >= DWC2_DEBUG
-  print_dwc2_info(dwc2);
-#endif
-
   return true;
 }
 
@@ -451,8 +454,10 @@ void dcd_init (uint8_t rhport)
   // Check Synopsys ID register, failed if controller clock/power is not enabled
   TU_VERIFY(check_dwc2(dwc2), );
 
-  // Force device mode
-  dwc2->gusbcfg = (dwc2->gusbcfg & ~GUSBCFG_FHMOD) | GUSBCFG_FDMOD;
+  dcd_disconnect(rhport);
+
+  // max number of endpoints & total_fifo_size are:
+  // hw_cfg2->num_dev_ep, hw_cfg2->total_fifo_size
 
   if( phy_hs_supported(dwc2) )
   {
@@ -464,7 +469,11 @@ void dcd_init (uint8_t rhport)
     phy_fs_init(dwc2);
   }
 
-  TU_LOG_HEX(DWC2_DEBUG, dwc2->gusbcfg);
+  // Restart PHY clock
+  dwc2->pcgctl &= ~(PCGCTL_STOPPCLK | PCGCTL_GATEHCLK | PCGCTL_PWRCLMP | PCGCTL_RSTPDWNMODULE);
+
+  // Force device mode
+  dwc2->gusbcfg = (dwc2->gusbcfg & ~GUSBCFG_FHMOD) | GUSBCFG_FDMOD;
 
 	/* Set HS/FS Timeout Calibration to 7 (max available value).
 	 * The number of PHY clocks that the application programs in
@@ -476,27 +485,34 @@ void dcd_init (uint8_t rhport)
 	 */
   dwc2->gusbcfg |= (7ul << GUSBCFG_TOCAL_Pos);
 
-  // Restart PHY clock
-  dwc2->pcgctl &= ~(PCGCTL_STOPPCLK | PCGCTL_GATEHCLK | PCGCTL_PWRCLMP | PCGCTL_RSTPDWNMODULE);
+  // If USB host misbehaves during status portion of control xfer
+  // (non zero-length packet), send STALL back and discard.
+  dwc2->dcfg |= DCFG_NZLSOHSK;
+
+  // Clear A,B, VBus valid override
+  dwc2->gotgctl &= ~(GOTGCTL_BVALOEN | GOTGCTL_AVALOEN | GOTGCTL_VBVALOEN);
 
   // Clear all interrupts
   dwc2->gintsts |= dwc2->gintsts;
+  dwc2->gotgint |= dwc2->gotgint;
 
   // Required as part of core initialization.
   // TODO: How should mode mismatch be handled? It will cause
   // the core to stop working/require reset.
-  dwc2->gintmsk |= GINTMSK_OTGINT | GINTMSK_MMISM;
-
-  // If USB host misbehaves during status portion of control xfer
-  // (non zero-length packet), send STALL back and discard.
-  dwc2->dcfg |= DCFG_NZLSOHSK;
-
-  dwc2->gintmsk |= GINTMSK_USBRST | GINTMSK_ENUMDNEM | GINTMSK_USBSUSPM |
-                   GINTMSK_WUIM   | GINTMSK_RXFLVLM;
+  dwc2->gintmsk = GINTMSK_OTGINT   | GINTMSK_MMISM  | GINTMSK_RXFLVLM  |
+                  GINTMSK_USBSUSPM | GINTMSK_USBRST | GINTMSK_ENUMDNEM | GINTMSK_WUIM;
 
   // Enable global interrupt
   dwc2->gahbcfg |= GAHBCFG_GINT;
 
+  // make sure we are in device mode
+//  TU_ASSERT(!(dwc2->gintsts & GINTSTS_CMOD), );
+
+//  TU_LOG_HEX(DWC2_DEBUG, dwc2->gotgctl);
+//  TU_LOG_HEX(DWC2_DEBUG, dwc2->gusbcfg);
+//  TU_LOG_HEX(DWC2_DEBUG, dwc2->dcfg);
+//  TU_LOG_HEX(DWC2_DEBUG, dwc2->gahbcfg);
+
   dcd_connect(rhport);
 }
 
@@ -1096,6 +1112,8 @@ void dcd_int_handler(uint8_t rhport)
 
   uint32_t const int_status = dwc2->gintsts & dwc2->gintmsk;
 
+//  TU_LOG_HEX(DWC2_DEBUG, int_status);
+
   if(int_status & GINTSTS_USBRST)
   {
     // USBRST is start of reset.
diff --git a/src/portable/synopsys/dwc2/dwc2_bcm.h b/src/portable/synopsys/dwc2/dwc2_bcm.h
index c064946cf..38d10930c 100644
--- a/src/portable/synopsys/dwc2/dwc2_bcm.h
+++ b/src/portable/synopsys/dwc2/dwc2_bcm.h
@@ -51,17 +51,28 @@ static inline void dwc2_dcd_int_disable (uint8_t rhport)
   BP_DisableIRQ(USB_IRQn);
 }
 
-TU_ATTR_ALWAYS_INLINE
 static inline void dwc2_remote_wakeup_delay(void)
 {
   // try to delay for 1 ms
   // TODO implement later
 }
 
-static inline void dwc2_phyfs_set_turnaround(dwc2_regs_t * dwc2)
+// MCU specific PHY init, called BEFORE core reset
+static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
 {
   (void) dwc2;
-  // do nothing since bcm alwyas use HS PHY
+  (void) hs_phy_type;
+
+  // nothing to do
+}
+
+// MCU specific PHY update, it is called AFTER init() and core reset
+static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
+{
+  (void) dwc2;
+  (void) hs_phy_type;
+
+  // nothing to do
 }
 
 #ifdef __cplusplus
diff --git a/src/portable/synopsys/dwc2/dwc2_esp32.h b/src/portable/synopsys/dwc2/dwc2_esp32.h
index af5d5f093..78da277d5 100644
--- a/src/portable/synopsys/dwc2/dwc2_esp32.h
+++ b/src/portable/synopsys/dwc2/dwc2_esp32.h
@@ -50,12 +50,14 @@ static void dcd_int_handler_wrap(void* arg)
   dcd_int_handler(0);
 }
 
+TU_ATTR_ALWAYS_INLINE
 static inline void dwc2_dcd_int_enable (uint8_t rhport)
 {
   (void) rhport;
   esp_intr_alloc(ETS_USB_INTR_SOURCE, ESP_INTR_FLAG_LOWMED, dcd_int_handler_wrap, NULL, &usb_ih);
 }
 
+TU_ATTR_ALWAYS_INLINE
 static inline void dwc2_dcd_int_disable (uint8_t rhport)
 {
   (void) rhport;
@@ -67,10 +69,22 @@ static inline void dwc2_remote_wakeup_delay(void)
   vTaskDelay(pdMS_TO_TICKS(1));
 }
 
-static inline void dwc2_phyfs_set_turnaround(dwc2_regs_t * dwc2)
+// MCU specific PHY init, called BEFORE core reset
+static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
 {
   (void) dwc2;
-  // keep the reset value which is 5 on this port
+  (void) hs_phy_type;
+
+  // nothing to do
+}
+
+// MCU specific PHY update, it is called AFTER init() and core reset
+static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
+{
+  (void) dwc2;
+  (void) hs_phy_type;
+
+  // nothing to do
 }
 
 #ifdef __cplusplus
diff --git a/src/portable/synopsys/dwc2/dwc2_gd32.h b/src/portable/synopsys/dwc2/dwc2_gd32.h
index 15e73ad1e..f8fa01ee0 100644
--- a/src/portable/synopsys/dwc2/dwc2_gd32.h
+++ b/src/portable/synopsys/dwc2/dwc2_gd32.h
@@ -68,7 +68,6 @@ static inline void dwc2_dcd_int_disable (uint8_t rhport)
   __eclic_disable_interrupt(RHPORT_IRQn);
 }
 
-TU_ATTR_ALWAYS_INLINE
 static inline void dwc2_remote_wakeup_delay(void)
 {
   // try to delay for 1 ms
@@ -76,12 +75,23 @@ static inline void dwc2_remote_wakeup_delay(void)
   while ( count-- ) __asm volatile ("nop");
 }
 
-static inline void dwc2_phyfs_set_turnaround(dwc2_regs_t * dwc2)
+// MCU specific PHY init, called BEFORE core reset
+static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
 {
-  // use recommeded value 6 by stm32 for mcu with AHB clock > 32Mhz
-  dwc2->gusbcfg = (dwc2->gusbcfg & GUSBCFG_TRDT_Msk) | (6u << GUSBCFG_TRDT_Pos);
+  (void) dwc2;
+  (void) hs_phy_type;
+
+  // nothing to do
 }
 
+// MCU specific PHY update, it is called AFTER init() and core reset
+static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
+{
+  (void) dwc2;
+  (void) hs_phy_type;
+
+  // nothing to do
+}
 
 #ifdef __cplusplus
 }
diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h
index 4d0ed3f0a..469045ac4 100644
--- a/src/portable/synopsys/dwc2/dwc2_stm32.h
+++ b/src/portable/synopsys/dwc2/dwc2_stm32.h
@@ -112,79 +112,92 @@ static inline void dwc2_remote_wakeup_delay(void)
   while ( count-- ) __NOP();
 }
 
-// Set turn-around timeout according to link speed
-static inline void dwc2_phyfs_set_turnaround(dwc2_regs_t * dwc2)
+// MCU specific PHY init, called BEFORE core reset
+static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
 {
-  // Turnaround timeout depends on the AHB clock dictated by STM32 Reference Manual
-  uint32_t turnaround;
-
-  if ( SystemCoreClock >= 32000000U )
-    turnaround = 0x6u;
-  else if ( SystemCoreClock >= 27500000U )
-    turnaround = 0x7u;
-  else if ( SystemCoreClock >= 24000000U )
-    turnaround = 0x8u;
-  else if ( SystemCoreClock >= 21800000U )
-    turnaround = 0x9u;
-  else if ( SystemCoreClock >= 20000000U )
-    turnaround = 0xAu;
-  else if ( SystemCoreClock >= 18500000U )
-    turnaround = 0xBu;
-  else if ( SystemCoreClock >= 17200000U )
-    turnaround = 0xCu;
-  else if ( SystemCoreClock >= 16000000U )
-    turnaround = 0xDu;
-  else if ( SystemCoreClock >= 15000000U )
-    turnaround = 0xEu;
-  else
-    turnaround = 0xFu;
-
-  dwc2->gusbcfg = (dwc2->gusbcfg & GUSBCFG_TRDT_Msk) | (turnaround << GUSBCFG_TRDT_Pos);
+  if ( hs_phy_type == HS_PHY_TYPE_NONE )
+  {
+    // Enable on-chip FS PHY
+    dwc2->stm32_gccfg |= STM32_GCCFG_PWRDWN;
+  }else
+  {
+    // Disable FS PHY
+    dwc2->stm32_gccfg &= ~STM32_GCCFG_PWRDWN;
+
+    // Enable on-chip HS PHY
+    if (hs_phy_type == HS_PHY_TYPE_UTMI || hs_phy_type == HS_PHY_TYPE_UTMI_ULPI)
+    {
+#ifdef USB_HS_PHYC
+      // Enable UTMI HS PHY
+      dwc2->stm32_gccfg |= STM32_GCCFG_PHYHSEN;
+
+      // Enable LDO
+      USB_HS_PHYC->USB_HS_PHYC_LDO |= USB_HS_PHYC_LDO_ENABLE;
+
+      // Wait until LDO ready
+      while ( 0 == (USB_HS_PHYC->USB_HS_PHYC_LDO & USB_HS_PHYC_LDO_STATUS) ) {}
+
+      uint32_t phyc_pll = 0;
+
+      // TODO Try to get HSE_VALUE from registers instead of depending CFLAGS
+      switch ( HSE_VALUE )
+      {
+        case 12000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_12MHZ   ; break;
+        case 12500000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_12_5MHZ ; break;
+        case 16000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_16MHZ   ; break;
+        case 24000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_24MHZ   ; break;
+        case 25000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_25MHZ   ; break;
+        case 32000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_Msk     ; break; // Value not defined in header
+        default:
+          TU_ASSERT(false, );
+      }
+      USB_HS_PHYC->USB_HS_PHYC_PLL = phyc_pll;
+
+      // Control the tuning interface of the High Speed PHY
+      // Use magic value (USB_HS_PHYC_TUNE_VALUE) from ST driver for F7
+      USB_HS_PHYC->USB_HS_PHYC_TUNE |= 0x00000F13U;
+
+      // Enable PLL internal PHY
+      USB_HS_PHYC->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL_PLLEN;
+#endif
+    }
+  }
 }
 
-#if defined(USB_HS_PHYC)
-static inline void dwc2_stm32_utmi_phy_init(dwc2_regs_t * dwc2)
+// MCU specific PHY update, it is called AFTER init() and core reset
+static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
 {
-  USB_HS_PHYC_GlobalTypeDef *usb_hs_phyc = (USB_HS_PHYC_GlobalTypeDef*) USB_HS_PHYC_CONTROLLER_BASE;
-
-  // Enable UTMI HS PHY
-  dwc2->stm32_gccfg |= STM32_GCCFG_PHYHSEN;
-
-  // Enable LDO
-  usb_hs_phyc->USB_HS_PHYC_LDO |= USB_HS_PHYC_LDO_ENABLE;
-
-  // Wait until LDO ready
-  while ( 0 == (usb_hs_phyc->USB_HS_PHYC_LDO & USB_HS_PHYC_LDO_STATUS) ) {}
-
-  uint32_t phyc_pll = 0;
-
-  // TODO Try to get HSE_VALUE from registers instead of depending CFLAGS
-  switch ( HSE_VALUE )
+  // used to set turnaround time for fullspeed, nothing to do in highspeed mode
+  if ( hs_phy_type == HS_PHY_TYPE_NONE )
   {
-    case 12000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_12MHZ   ; break;
-    case 12500000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_12_5MHZ ; break;
-    case 16000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_16MHZ   ; break;
-    case 24000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_24MHZ   ; break;
-    case 25000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_25MHZ   ; break;
-    case 32000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_Msk     ; break; // Value not defined in header
-    default:
-      TU_ASSERT(false, );
+    // Turnaround timeout depends on the AHB clock dictated by STM32 Reference Manual
+    uint32_t turnaround;
+
+    if ( SystemCoreClock >= 32000000u )
+      turnaround = 0x6u;
+    else if ( SystemCoreClock >= 27500000u )
+      turnaround = 0x7u;
+    else if ( SystemCoreClock >= 24000000u )
+      turnaround = 0x8u;
+    else if ( SystemCoreClock >= 21800000u )
+      turnaround = 0x9u;
+    else if ( SystemCoreClock >= 20000000u )
+      turnaround = 0xAu;
+    else if ( SystemCoreClock >= 18500000u )
+      turnaround = 0xBu;
+    else if ( SystemCoreClock >= 17200000u )
+      turnaround = 0xCu;
+    else if ( SystemCoreClock >= 16000000u )
+      turnaround = 0xDu;
+    else if ( SystemCoreClock >= 15000000u )
+      turnaround = 0xEu;
+    else
+      turnaround = 0xFu;
+
+    dwc2->gusbcfg = (dwc2->gusbcfg & ~GUSBCFG_TRDT_Msk) | (turnaround << GUSBCFG_TRDT_Pos);
   }
-  usb_hs_phyc->USB_HS_PHYC_PLL = phyc_pll;
-
-  // Control the tuning interface of the High Speed PHY
-  // Use magic value (USB_HS_PHYC_TUNE_VALUE) from ST driver
-  usb_hs_phyc->USB_HS_PHYC_TUNE |= 0x00000F13U;
-
-  // Enable PLL internal PHY
-  usb_hs_phyc->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL_PLLEN;
-
-  // Original ST code has 2 ms delay for PLL stabilization.
-  // Primitive test shows that more than 10 USB un/replug cycle showed no error with enumeration
 }
 
-#endif
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/src/portable/synopsys/dwc2/dwc2_type.h b/src/portable/synopsys/dwc2/dwc2_type.h
index 7b3db4dd9..583a7274a 100644
--- a/src/portable/synopsys/dwc2/dwc2_type.h
+++ b/src/portable/synopsys/dwc2/dwc2_type.h
@@ -528,7 +528,7 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo   ) == 0x1000, "incorrect size");
 #define GUSBCFG_PHYSEL_Pos               (6U)
 #define GUSBCFG_PHYSEL_Msk               (0x1UL << GUSBCFG_PHYSEL_Pos)            // 0x00000040 */
 #define GUSBCFG_PHYSEL                   GUSBCFG_PHYSEL_Msk                       // USB 2.0 high-speed ULPI PHY or USB 1.1 full-speed serial transceiver select */
-#define GUSBCFG_DDRSEL                TU_BIT(7)                                // Single Data Rate (SDR) or Double Data Rate (DDR) or ULPI interface.
+#define GUSBCFG_DDRSEL                   TU_BIT(7)                                // Single Data Rate (SDR) or Double Data Rate (DDR) or ULPI interface.
 #define GUSBCFG_SRPCAP_Pos               (8U)
 #define GUSBCFG_SRPCAP_Msk               (0x1UL << GUSBCFG_SRPCAP_Pos)            // 0x00000100 */
 #define GUSBCFG_SRPCAP                   GUSBCFG_SRPCAP_Msk                       // SRP-capable */
diff --git a/src/tusb_option.h b/src/tusb_option.h
index de0279dda..4da07e241 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -113,8 +113,6 @@
 
 // Silabs
 #define OPT_MCU_EFM32GG          1300 ///< Silabs EFM32GG
-#define OPT_MCU_EFM32GG11        1301 ///< Silabs EFM32GG11
-#define OPT_MCU_EFM32GG12        1302 ///< Silabs EFM32GG12
 
 // Renesas RX
 #define OPT_MCU_RX63X            1400 ///< Renesas RX63N/631
-- 
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