From d32a6521256594b41e4c54d0dbf50470573ba995 Mon Sep 17 00:00:00 2001
From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com>
Date: Thu, 9 Apr 2026 10:35:01 +0000
Subject: Refactor STM32 FSDEV PMA errata delay into common helper

Agent-Logs-Url: https://github.com/hathach/tinyusb/sessions/3ec0d5b6-cb8e-48ff-8606-3371beb1efcb

Co-authored-by: HiFiPhile <4375114+HiFiPhile@users.noreply.github.com>
---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 20 +-----------
 src/portable/st/stm32_fsdev/fsdev_common.c    | 17 ++++++++++
 src/portable/st/stm32_fsdev/fsdev_common.h    | 23 ++++++++++++++
 src/portable/st/stm32_fsdev/fsdev_stm32.h     | 14 +++++++++
 src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c | 45 ++-------------------------
 5 files changed, 57 insertions(+), 62 deletions(-)

(limited to 'src')

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 8b4719b21..c8bb0e827 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -394,25 +394,7 @@ void dcd_int_handler(uint8_t rhport) {
 
     if (ep_reg & U_EP_CTR_RX) {
   #ifdef  CFG_TUSB_FSDEV_32BIT
-      /* https://www.st.com/resource/en/errata_sheet/es0561-stm32h503cbebkbrb-device-errata-stmicroelectronics.pdf
-       * https://www.st.com/resource/en/errata_sheet/es0587-stm32u535xx-and-stm32u545xx-device-errata-stmicroelectronics.pdf
-       * From H503/U535 errata: Buffer description table update completes after CTR interrupt triggers
-       * Description:
-       * - During OUT transfers, the correct transfer interrupt (CTR) is triggered a little before the last USB SRAM
-       * accesses have completed. If the software responds quickly to the interrupt, the full buffer contents may not be
-       * correct. Workaround:
-       * - Software should ensure that a small delay is included before accessing the SRAM contents. This delay
-       * should be 800 ns in Full Speed mode and 6.4 μs in Low Speed mode
-       * - Since H5 can run up to 250Mhz -> 1 cycle = 4ns. Per errata, we need to wait 200 cycles. Though executing code
-       * also takes time, so we'll wait 60 cycles (count = 20).
-       * - Since Low Speed mode is not supported/popular, we will ignore it for now.
-       *
-       * Note: this errata may also apply to G0, U5, H5 etc.
-       */
-      volatile uint32_t cycle_count = 20; // defined as PCD_RX_PMA_CNT in stm32 hal_driver
-      while (cycle_count > 0U) {
-        cycle_count--;                    // each count take 3 cycles (1 for sub, jump, and compare)
-      }
+      fsdev_btable_workaround_delay(false);
   #endif
 
       if (ep_reg & U_EP_SETUP) {
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.c b/src/portable/st/stm32_fsdev/fsdev_common.c
index 003bcd069..3f3973a9d 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.c
+++ b/src/portable/st/stm32_fsdev/fsdev_common.c
@@ -113,4 +113,21 @@ void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint16_t wCount) {
 #endif
 }
 
+/* STM32 FSDEV PMA Buffer Description Table errata workaround:
+ * - ES0561 (STM32H503), ES0587 (STM32U535/U545)
+ * - CTR may trigger before final PMA SRAM accesses complete on OUT transfers.
+ * - Insert delay before reading PMA count/data.
+ */
+void fsdev_btable_workaround_delay(bool low_speed) {
+#if defined(TUP_USBIP_FSDEV_STM32) && defined(CFG_TUSB_FSDEV_32BIT)
+  uint32_t cycle_count = low_speed ? CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT : CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT;
+  volatile uint32_t delay_count = cycle_count;
+  while (delay_count > 0U) {
+    delay_count--; // each count take 3 cycles (1 for sub, jump, and compare)
+  }
+#else
+  (void) low_speed;
+#endif
+}
+
 #endif
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 140ff1d61..bf4941794 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -307,6 +307,26 @@ typedef struct {
   #error "Unknown USB IP"
 #endif
 
+#if defined(TUP_USBIP_FSDEV_STM32) && defined(CFG_TUSB_FSDEV_32BIT)
+  #ifndef CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT
+    #if defined(FSDEV_STM32_CPU_MHZ)
+      #define CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT (FSDEV_STM32_CPU_MHZ / 4U)
+    #else
+      // Keep conservative default and allow board/application override.
+      #define CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT 20U
+    #endif
+  #endif
+
+  #ifndef CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT
+    #if defined(FSDEV_STM32_CPU_MHZ)
+      #define CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT (FSDEV_STM32_CPU_MHZ * 2U)
+    #else
+      // Keep conservative default and allow board/application override.
+      #define CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT 20U
+    #endif
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // Endpoint Helper
 // - CTR is write 0 to clear
@@ -449,6 +469,9 @@ uint16_t pma_align_buffer_size(uint16_t size, uint8_t *blsize, uint8_t *num_bloc
 // Set RX buffer size
 void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint16_t wCount);
 
+// STM32 FSDEV PMA Buffer Description Table errata workaround delay.
+void fsdev_btable_workaround_delay(bool low_speed);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index a63592c5d..3f726c2ec 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -138,6 +138,20 @@
   #error "FSDEV_HAS_SBUF_ISO not defined"
 #endif
 
+#ifndef FSDEV_STM32_CPU_MHZ
+  #if CFG_TUSB_MCU == OPT_MCU_STM32H5
+    #define FSDEV_STM32_CPU_MHZ 250U
+  #elif CFG_TUSB_MCU == OPT_MCU_STM32U5
+    #define FSDEV_STM32_CPU_MHZ 160U
+  #elif CFG_TUSB_MCU == OPT_MCU_STM32U3
+    #define FSDEV_STM32_CPU_MHZ 96U
+  #elif CFG_TUSB_MCU == OPT_MCU_STM32G0
+    #define FSDEV_STM32_CPU_MHZ 64U
+  #elif CFG_TUSB_MCU == OPT_MCU_STM32C0
+    #define FSDEV_STM32_CPU_MHZ 48U
+  #endif
+#endif
+
 #ifndef CFG_TUD_FSDEV_DOUBLE_BUFFERED_ISO_EP
   // Default configuration for double-buffered isochronous endpoints:
   // - Enable double buffering on devices with >1KB Packet Memory Area (PMA)
diff --git a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
index 18685dbdc..c41228919 100644
--- a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
@@ -58,20 +58,6 @@
 
 TU_VERIFY_STATIC(CFG_TUH_FSDEV_ENDPOINT_MAX <= 255, "currently only use 8-bit for index");
 
-#if CFG_TUSB_MCU == OPT_MCU_STM32H5
-  #define CPU_FREQUENCY_MHZ 250U
-#elif CFG_TUSB_MCU == OPT_MCU_STM32U5
-  #define CPU_FREQUENCY_MHZ 160U
-#elif CFG_TUSB_MCU == OPT_MCU_STM32U3
-  #define CPU_FREQUENCY_MHZ 96U
-#elif CFG_TUSB_MCU == OPT_MCU_STM32G0
-  #define CPU_FREQUENCY_MHZ 64U
-#elif CFG_TUSB_MCU == OPT_MCU_STM32C0
-  #define CPU_FREQUENCY_MHZ 48U
-#else
-  #error "CPU_FREQUENCY_MHZ not defined for this STM32 MCU"
-#endif
-
 enum {
   HCD_XFER_ERROR_MAX = 3,
   HCD_XFER_NAK_MAX = 15,
@@ -165,35 +151,8 @@ static inline void channel_write_status(uint8_t ch_id, uint32_t ch_reg, tusb_dir
 }
 
 static inline uint16_t channel_get_rx_count(uint8_t ch_id) {
-  /* https://www.st.com/resource/en/errata_sheet/es0561-stm32h503cbebkbrb-device-errata-stmicroelectronics.pdf
-  * https://www.st.com/resource/en/errata_sheet/es0587-stm32u535xx-and-stm32u545xx-device-errata-stmicroelectronics.pdf
-  * From H503/U535 errata: Buffer description table update completes after CTR interrupt triggers
-  * Description:
-  * - During OUT transfers, the correct transfer interrupt (CTR) is triggered a little before the last USB SRAM accesses
-  * have completed. If the software responds quickly to the interrupt, the full buffer contents may not be correct.
-  * Workaround:
-  * - Software should ensure that a small delay is included before accessing the SRAM contents. This delay
-  * should be 800 ns in Full Speed mode and 6.4 μs in Low Speed mode
-  *
-  * Note: this errata may also apply to G0, U5, H5 etc.
-  *
-  * We choose the delay count based on max CPU frequency (in MHz) to ensure the delay is at least the required time.
-  */
-
   uint32_t ch_reg = ch_read(ch_id);
-  if (FSDEV_REG->ISTR & U_ISTR_LS_DCONN || ch_reg & U_EP_LSEP) {
-    // Low speed mode: 6.4 us delay -> about 2 cycles per MHz
-    volatile uint32_t cycle_count = CPU_FREQUENCY_MHZ * 2U;
-    while (cycle_count > 0U) {
-      cycle_count--; // each count take 3 cycles (1 for sub, jump, and compare)
-    }
-  } else {
-    // Full speed mode: 800 ns delay -> about 0.25 cycles per MHz
-    volatile uint32_t cycle_count = CPU_FREQUENCY_MHZ / 4U;
-    while (cycle_count > 0U) {
-      cycle_count--; // each count take 3 cycles (1 for sub, jump, and compare)
-    }
-  }
+  fsdev_btable_workaround_delay((FSDEV_REG->ISTR & U_ISTR_LS_DCONN) || (ch_reg & U_EP_LSEP));
 
   return btable_get_count(ch_id, BTABLE_BUF_RX);
 }
@@ -238,7 +197,7 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   // If DCON_STAT is already set, the controller sometimes misses the initial connection interrupt
   if (FSDEV_REG->ISTR & U_ISTR_DCON_STAT) {
     // Wait DP/DM stabilize time
-    volatile uint32_t cycle_count = CPU_FREQUENCY_MHZ / 4U;
+    volatile uint32_t cycle_count = CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT;
     while (cycle_count > 0U) {
       cycle_count--;
     }
-- 
cgit v1.3.1


From b2c36e0000b48f05e161f76fa880b810cf9405b4 Mon Sep 17 00:00:00 2001
From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com>
Date: Thu, 9 Apr 2026 10:39:02 +0000
Subject: Document and polish shared FSDEV errata delay helper

Agent-Logs-Url: https://github.com/hathach/tinyusb/sessions/3ec0d5b6-cb8e-48ff-8606-3371beb1efcb

Co-authored-by: HiFiPhile <4375114+HiFiPhile@users.noreply.github.com>
---
 src/portable/st/stm32_fsdev/fsdev_common.c | 2 +-
 src/portable/st/stm32_fsdev/fsdev_common.h | 3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/portable/st/stm32_fsdev/fsdev_common.c b/src/portable/st/stm32_fsdev/fsdev_common.c
index 3f3973a9d..4b7c1ad5f 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.c
+++ b/src/portable/st/stm32_fsdev/fsdev_common.c
@@ -123,7 +123,7 @@ void fsdev_btable_workaround_delay(bool low_speed) {
   uint32_t cycle_count = low_speed ? CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT : CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT;
   volatile uint32_t delay_count = cycle_count;
   while (delay_count > 0U) {
-    delay_count--; // each count take 3 cycles (1 for sub, jump, and compare)
+    delay_count--; // each count takes 3 cycles (1 for sub, jump, and compare)
   }
 #else
   (void) low_speed;
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index bf4941794..2da80fd73 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -469,7 +469,8 @@ uint16_t pma_align_buffer_size(uint16_t size, uint8_t *blsize, uint8_t *num_bloc
 // Set RX buffer size
 void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint16_t wCount);
 
-// STM32 FSDEV PMA Buffer Description Table errata workaround delay.
+// Delay helper for STM32 FSDEV PMA Buffer Description Table errata (ES0561/ES0587).
+// Low-speed path uses CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT, otherwise full-speed count.
 void fsdev_btable_workaround_delay(bool low_speed);
 
 #ifdef __cplusplus
-- 
cgit v1.3.1


From e03a8aa6b1005d33f6b47a7c07f21b18444627d2 Mon Sep 17 00:00:00 2001
From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com>
Date: Thu, 9 Apr 2026 10:40:24 +0000
Subject: Restore compile-time guard for STM32 FSDEV delay defaults

Agent-Logs-Url: https://github.com/hathach/tinyusb/sessions/3ec0d5b6-cb8e-48ff-8606-3371beb1efcb

Co-authored-by: HiFiPhile <4375114+HiFiPhile@users.noreply.github.com>
---
 src/portable/st/stm32_fsdev/fsdev_common.h | 6 ++----
 src/portable/st/stm32_fsdev/fsdev_stm32.h  | 4 ++++
 2 files changed, 6 insertions(+), 4 deletions(-)

(limited to 'src')

diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 2da80fd73..ab07ca0e9 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -312,8 +312,7 @@ typedef struct {
     #if defined(FSDEV_STM32_CPU_MHZ)
       #define CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT (FSDEV_STM32_CPU_MHZ / 4U)
     #else
-      // Keep conservative default and allow board/application override.
-      #define CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT 20U
+      #error "Define CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT or FSDEV_STM32_CPU_MHZ for STM32 FSDEV 32-bit"
     #endif
   #endif
 
@@ -321,8 +320,7 @@ typedef struct {
     #if defined(FSDEV_STM32_CPU_MHZ)
       #define CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT (FSDEV_STM32_CPU_MHZ * 2U)
     #else
-      // Keep conservative default and allow board/application override.
-      #define CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT 20U
+      #error "Define CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT or FSDEV_STM32_CPU_MHZ for STM32 FSDEV 32-bit"
     #endif
   #endif
 #endif
diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index 3f726c2ec..a6827cc60 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -145,10 +145,14 @@
     #define FSDEV_STM32_CPU_MHZ 160U
   #elif CFG_TUSB_MCU == OPT_MCU_STM32U3
     #define FSDEV_STM32_CPU_MHZ 96U
+  #elif CFG_TUSB_MCU == OPT_MCU_STM32U0
+    #define FSDEV_STM32_CPU_MHZ 56U
   #elif CFG_TUSB_MCU == OPT_MCU_STM32G0
     #define FSDEV_STM32_CPU_MHZ 64U
   #elif CFG_TUSB_MCU == OPT_MCU_STM32C0
     #define FSDEV_STM32_CPU_MHZ 48U
+  #elif defined(CFG_TUSB_FSDEV_32BIT)
+    #error "FSDEV_STM32_CPU_MHZ not defined for this STM32 MCU"
   #endif
 #endif
 
-- 
cgit v1.3.1


From 2f4792f9e1b5a6f06e6306fe0d0ebce641914791 Mon Sep 17 00:00:00 2001
From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com>
Date: Thu, 9 Apr 2026 10:41:14 +0000
Subject: Decouple DCON stabilize delay from BTABLE errata macro

Agent-Logs-Url: https://github.com/hathach/tinyusb/sessions/3ec0d5b6-cb8e-48ff-8606-3371beb1efcb

Co-authored-by: HiFiPhile <4375114+HiFiPhile@users.noreply.github.com>
---
 src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
index c41228919..50ff975fc 100644
--- a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
@@ -197,7 +197,7 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   // If DCON_STAT is already set, the controller sometimes misses the initial connection interrupt
   if (FSDEV_REG->ISTR & U_ISTR_DCON_STAT) {
     // Wait DP/DM stabilize time
-    volatile uint32_t cycle_count = CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT;
+    volatile uint32_t cycle_count = FSDEV_STM32_CPU_MHZ / 4U;
     while (cycle_count > 0U) {
       cycle_count--;
     }
-- 
cgit v1.3.1


From 84943dbbd54e119248f3585aa1fe9c6496af7069 Mon Sep 17 00:00:00 2001
From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com>
Date: Thu, 9 Apr 2026 10:42:01 +0000
Subject: Simplify delay loop comment in shared FSDEV helper

Agent-Logs-Url: https://github.com/hathach/tinyusb/sessions/3ec0d5b6-cb8e-48ff-8606-3371beb1efcb

Co-authored-by: HiFiPhile <4375114+HiFiPhile@users.noreply.github.com>
---
 src/portable/st/stm32_fsdev/fsdev_common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/portable/st/stm32_fsdev/fsdev_common.c b/src/portable/st/stm32_fsdev/fsdev_common.c
index 4b7c1ad5f..e6c95e12d 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.c
+++ b/src/portable/st/stm32_fsdev/fsdev_common.c
@@ -123,7 +123,7 @@ void fsdev_btable_workaround_delay(bool low_speed) {
   uint32_t cycle_count = low_speed ? CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT : CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT;
   volatile uint32_t delay_count = cycle_count;
   while (delay_count > 0U) {
-    delay_count--; // each count takes 3 cycles (1 for sub, jump, and compare)
+    delay_count--;
   }
 #else
   (void) low_speed;
-- 
cgit v1.3.1


From ab32a2cd2b7472966b309521d80b15488393af0e Mon Sep 17 00:00:00 2001
From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com>
Date: Thu, 9 Apr 2026 10:42:47 +0000
Subject: Clarify STM32U0 delay-default frequency usage

Agent-Logs-Url: https://github.com/hathach/tinyusb/sessions/3ec0d5b6-cb8e-48ff-8606-3371beb1efcb

Co-authored-by: HiFiPhile <4375114+HiFiPhile@users.noreply.github.com>
---
 src/portable/st/stm32_fsdev/fsdev_stm32.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src')

diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index a6827cc60..5950efbe3 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -146,6 +146,7 @@
   #elif CFG_TUSB_MCU == OPT_MCU_STM32U3
     #define FSDEV_STM32_CPU_MHZ 96U
   #elif CFG_TUSB_MCU == OPT_MCU_STM32U0
+    // Used by STM32 FSDEV PMA delay defaults as a conservative max CPU frequency.
     #define FSDEV_STM32_CPU_MHZ 56U
   #elif CFG_TUSB_MCU == OPT_MCU_STM32G0
     #define FSDEV_STM32_CPU_MHZ 64U
-- 
cgit v1.3.1


From 41575d2de943393f6cc7e5228ab904614fadce28 Mon Sep 17 00:00:00 2001
From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com>
Date: Thu, 9 Apr 2026 10:44:08 +0000
Subject: Polish FSDEV delay code readability

Agent-Logs-Url: https://github.com/hathach/tinyusb/sessions/3ec0d5b6-cb8e-48ff-8606-3371beb1efcb

Co-authored-by: HiFiPhile <4375114+HiFiPhile@users.noreply.github.com>
---
 src/portable/st/stm32_fsdev/fsdev_stm32.h     | 2 +-
 src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c | 3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index 5950efbe3..5e383eb97 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -139,6 +139,7 @@
 #endif
 
 #ifndef FSDEV_STM32_CPU_MHZ
+  // Max CPU frequency in MHz, used to derive conservative FSDEV PMA delay defaults.
   #if CFG_TUSB_MCU == OPT_MCU_STM32H5
     #define FSDEV_STM32_CPU_MHZ 250U
   #elif CFG_TUSB_MCU == OPT_MCU_STM32U5
@@ -146,7 +147,6 @@
   #elif CFG_TUSB_MCU == OPT_MCU_STM32U3
     #define FSDEV_STM32_CPU_MHZ 96U
   #elif CFG_TUSB_MCU == OPT_MCU_STM32U0
-    // Used by STM32 FSDEV PMA delay defaults as a conservative max CPU frequency.
     #define FSDEV_STM32_CPU_MHZ 56U
   #elif CFG_TUSB_MCU == OPT_MCU_STM32G0
     #define FSDEV_STM32_CPU_MHZ 64U
diff --git a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
index 50ff975fc..18cf302d8 100644
--- a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
@@ -152,7 +152,8 @@ static inline void channel_write_status(uint8_t ch_id, uint32_t ch_reg, tusb_dir
 
 static inline uint16_t channel_get_rx_count(uint8_t ch_id) {
   uint32_t ch_reg = ch_read(ch_id);
-  fsdev_btable_workaround_delay((FSDEV_REG->ISTR & U_ISTR_LS_DCONN) || (ch_reg & U_EP_LSEP));
+  const bool is_low_speed = (FSDEV_REG->ISTR & U_ISTR_LS_DCONN) || (ch_reg & U_EP_LSEP);
+  fsdev_btable_workaround_delay(is_low_speed);
 
   return btable_get_count(ch_id, BTABLE_BUF_RX);
 }
-- 
cgit v1.3.1


From 048bb5ca690311a24cae69fd177bd2f4721f27b6 Mon Sep 17 00:00:00 2001
From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com>
Date: Fri, 10 Apr 2026 10:53:03 +0000
Subject: Make fsdev errata delay helper static inline

Agent-Logs-Url: https://github.com/hathach/tinyusb/sessions/8588a09c-d4e5-4284-8944-47ae4e2a2a1f

Co-authored-by: HiFiPhile <4375114+HiFiPhile@users.noreply.github.com>
---
 src/portable/st/stm32_fsdev/fsdev_common.c | 17 -----------------
 src/portable/st/stm32_fsdev/fsdev_common.h | 12 +++++++++++-
 2 files changed, 11 insertions(+), 18 deletions(-)

(limited to 'src')

diff --git a/src/portable/st/stm32_fsdev/fsdev_common.c b/src/portable/st/stm32_fsdev/fsdev_common.c
index e6c95e12d..003bcd069 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.c
+++ b/src/portable/st/stm32_fsdev/fsdev_common.c
@@ -113,21 +113,4 @@ void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint16_t wCount) {
 #endif
 }
 
-/* STM32 FSDEV PMA Buffer Description Table errata workaround:
- * - ES0561 (STM32H503), ES0587 (STM32U535/U545)
- * - CTR may trigger before final PMA SRAM accesses complete on OUT transfers.
- * - Insert delay before reading PMA count/data.
- */
-void fsdev_btable_workaround_delay(bool low_speed) {
-#if defined(TUP_USBIP_FSDEV_STM32) && defined(CFG_TUSB_FSDEV_32BIT)
-  uint32_t cycle_count = low_speed ? CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT : CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT;
-  volatile uint32_t delay_count = cycle_count;
-  while (delay_count > 0U) {
-    delay_count--;
-  }
-#else
-  (void) low_speed;
-#endif
-}
-
 #endif
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index ab07ca0e9..f5cfa93c8 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -469,7 +469,17 @@ void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint16_t wCount);
 
 // Delay helper for STM32 FSDEV PMA Buffer Description Table errata (ES0561/ES0587).
 // Low-speed path uses CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT, otherwise full-speed count.
-void fsdev_btable_workaround_delay(bool low_speed);
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_btable_workaround_delay(bool low_speed) {
+#if defined(TUP_USBIP_FSDEV_STM32) && defined(CFG_TUSB_FSDEV_32BIT)
+  uint32_t cycle_count = low_speed ? CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT : CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT;
+  volatile uint32_t delay_count = cycle_count;
+  while (delay_count > 0U) {
+    delay_count--;
+  }
+#else
+  (void) low_speed;
+#endif
+}
 
 #ifdef __cplusplus
 }
-- 
cgit v1.3.1


From 54e1973906c6152ffd5d650d4f8fb146b4fa9068 Mon Sep 17 00:00:00 2001
From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com>
Date: Fri, 10 Apr 2026 10:53:41 +0000
Subject: Restore errata context comment on inline delay helper

Agent-Logs-Url: https://github.com/hathach/tinyusb/sessions/8588a09c-d4e5-4284-8944-47ae4e2a2a1f

Co-authored-by: HiFiPhile <4375114+HiFiPhile@users.noreply.github.com>
---
 src/portable/st/stm32_fsdev/fsdev_common.h | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index f5cfa93c8..95854d63d 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -467,8 +467,13 @@ uint16_t pma_align_buffer_size(uint16_t size, uint8_t *blsize, uint8_t *num_bloc
 // Set RX buffer size
 void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint16_t wCount);
 
-// Delay helper for STM32 FSDEV PMA Buffer Description Table errata (ES0561/ES0587).
-// Low-speed path uses CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT, otherwise full-speed count.
+/* STM32 FSDEV PMA Buffer Description Table errata workaround:
+ * - ES0561 (STM32H503), ES0587 (STM32U535/U545)
+ * - CTR may trigger before final PMA SRAM accesses complete on OUT transfers.
+ * - Insert delay before reading PMA count/data.
+ *
+ * Low-speed path uses CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT, otherwise full-speed count.
+ */
 TU_ATTR_ALWAYS_INLINE static inline void fsdev_btable_workaround_delay(bool low_speed) {
 #if defined(TUP_USBIP_FSDEV_STM32) && defined(CFG_TUSB_FSDEV_32BIT)
   uint32_t cycle_count = low_speed ? CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT : CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT;
-- 
cgit v1.3.1


From 37ace45508fb32568e78ba3410d708db359a46d4 Mon Sep 17 00:00:00 2001
From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com>
Date: Fri, 10 Apr 2026 11:11:31 +0000
Subject: Allow STM32 FSDEV delay override macros to satisfy 32-bit guard

Agent-Logs-Url: https://github.com/hathach/tinyusb/sessions/b35badc2-444a-4329-b136-f314591cf693

Co-authored-by: HiFiPhile <4375114+HiFiPhile@users.noreply.github.com>
---
 src/portable/st/stm32_fsdev/fsdev_stm32.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index 5e383eb97..d2a7a6caa 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -152,8 +152,9 @@
     #define FSDEV_STM32_CPU_MHZ 64U
   #elif CFG_TUSB_MCU == OPT_MCU_STM32C0
     #define FSDEV_STM32_CPU_MHZ 48U
-  #elif defined(CFG_TUSB_FSDEV_32BIT)
-    #error "FSDEV_STM32_CPU_MHZ not defined for this STM32 MCU"
+  #elif defined(CFG_TUSB_FSDEV_32BIT) && \
+      (!defined(CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT) || !defined(CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT))
+    #error "Define FSDEV_STM32_CPU_MHZ or both CFG_TUSB_FSDEV_BTABLE_{FS,LS}_DELAY_COUNT for this STM32 MCU"
   #endif
 #endif
 
-- 
cgit v1.3.1


From 35045e0346f64fe3b19e94c8e9c8d2eb908fc5d6 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 10 Apr 2026 13:33:13 +0200
Subject: debloat the workaround

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c |  2 +-
 src/portable/st/stm32_fsdev/fsdev_common.h    | 37 -----------------
 src/portable/st/stm32_fsdev/fsdev_stm32.h     | 60 ++++++++++++++++++---------
 src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c |  6 +--
 4 files changed, 42 insertions(+), 63 deletions(-)

(limited to 'src')

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index c8bb0e827..3ef0819bd 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -393,7 +393,7 @@ void dcd_int_handler(uint8_t rhport) {
     const uint32_t ep_reg = ep_read(ep_id);
 
     if (ep_reg & U_EP_CTR_RX) {
-  #ifdef  CFG_TUSB_FSDEV_32BIT
+  #if defined(TUP_USBIP_FSDEV_STM32) && defined(CFG_TUSB_FSDEV_32BIT)
       fsdev_btable_workaround_delay(false);
   #endif
 
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 95854d63d..140ff1d61 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -307,24 +307,6 @@ typedef struct {
   #error "Unknown USB IP"
 #endif
 
-#if defined(TUP_USBIP_FSDEV_STM32) && defined(CFG_TUSB_FSDEV_32BIT)
-  #ifndef CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT
-    #if defined(FSDEV_STM32_CPU_MHZ)
-      #define CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT (FSDEV_STM32_CPU_MHZ / 4U)
-    #else
-      #error "Define CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT or FSDEV_STM32_CPU_MHZ for STM32 FSDEV 32-bit"
-    #endif
-  #endif
-
-  #ifndef CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT
-    #if defined(FSDEV_STM32_CPU_MHZ)
-      #define CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT (FSDEV_STM32_CPU_MHZ * 2U)
-    #else
-      #error "Define CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT or FSDEV_STM32_CPU_MHZ for STM32 FSDEV 32-bit"
-    #endif
-  #endif
-#endif
-
 //--------------------------------------------------------------------+
 // Endpoint Helper
 // - CTR is write 0 to clear
@@ -467,25 +449,6 @@ uint16_t pma_align_buffer_size(uint16_t size, uint8_t *blsize, uint8_t *num_bloc
 // Set RX buffer size
 void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint16_t wCount);
 
-/* STM32 FSDEV PMA Buffer Description Table errata workaround:
- * - ES0561 (STM32H503), ES0587 (STM32U535/U545)
- * - CTR may trigger before final PMA SRAM accesses complete on OUT transfers.
- * - Insert delay before reading PMA count/data.
- *
- * Low-speed path uses CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT, otherwise full-speed count.
- */
-TU_ATTR_ALWAYS_INLINE static inline void fsdev_btable_workaround_delay(bool low_speed) {
-#if defined(TUP_USBIP_FSDEV_STM32) && defined(CFG_TUSB_FSDEV_32BIT)
-  uint32_t cycle_count = low_speed ? CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT : CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT;
-  volatile uint32_t delay_count = cycle_count;
-  while (delay_count > 0U) {
-    delay_count--;
-  }
-#else
-  (void) low_speed;
-#endif
-}
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index d2a7a6caa..79052b489 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -138,26 +138,6 @@
   #error "FSDEV_HAS_SBUF_ISO not defined"
 #endif
 
-#ifndef FSDEV_STM32_CPU_MHZ
-  // Max CPU frequency in MHz, used to derive conservative FSDEV PMA delay defaults.
-  #if CFG_TUSB_MCU == OPT_MCU_STM32H5
-    #define FSDEV_STM32_CPU_MHZ 250U
-  #elif CFG_TUSB_MCU == OPT_MCU_STM32U5
-    #define FSDEV_STM32_CPU_MHZ 160U
-  #elif CFG_TUSB_MCU == OPT_MCU_STM32U3
-    #define FSDEV_STM32_CPU_MHZ 96U
-  #elif CFG_TUSB_MCU == OPT_MCU_STM32U0
-    #define FSDEV_STM32_CPU_MHZ 56U
-  #elif CFG_TUSB_MCU == OPT_MCU_STM32G0
-    #define FSDEV_STM32_CPU_MHZ 64U
-  #elif CFG_TUSB_MCU == OPT_MCU_STM32C0
-    #define FSDEV_STM32_CPU_MHZ 48U
-  #elif defined(CFG_TUSB_FSDEV_32BIT) && \
-      (!defined(CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT) || !defined(CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT))
-    #error "Define FSDEV_STM32_CPU_MHZ or both CFG_TUSB_FSDEV_BTABLE_{FS,LS}_DELAY_COUNT for this STM32 MCU"
-  #endif
-#endif
-
 #ifndef CFG_TUD_FSDEV_DOUBLE_BUFFERED_ISO_EP
   // Default configuration for double-buffered isochronous endpoints:
   // - Enable double buffering on devices with >1KB Packet Memory Area (PMA)
@@ -271,6 +251,46 @@ TU_ATTR_ALWAYS_INLINE static inline void fsdev_int_disable(uint8_t rhport) {
   // CMSIS has a membar after disabling interrupts
 }
 
+//--------------------------------------------------------------------+
+// STM32 FSDEV PMA Buffer Description Table errata workaround
+//--------------------------------------------------------------------+
+
+#ifdef CFG_TUSB_FSDEV_32BIT
+// ES0561 (STM32H503), ES0587 (STM32U535/U545)
+// CTR may trigger before final PMA SRAM accesses complete on OUT transfers.
+// Insert delay before reading PMA count/data.
+// Max CPU frequency in MHz, used to derive conservative FSDEV PMA delay defaults.
+#if CFG_TUSB_MCU == OPT_MCU_STM32H5
+  #define FSDEV_STM32_CPU_MHZ 250U
+#elif CFG_TUSB_MCU == OPT_MCU_STM32U5
+  #define FSDEV_STM32_CPU_MHZ 160U
+#elif CFG_TUSB_MCU == OPT_MCU_STM32U3
+  #define FSDEV_STM32_CPU_MHZ 96U
+#elif CFG_TUSB_MCU == OPT_MCU_STM32U0
+  #define FSDEV_STM32_CPU_MHZ 56U
+#elif CFG_TUSB_MCU == OPT_MCU_STM32G0
+  #define FSDEV_STM32_CPU_MHZ 64U
+#elif CFG_TUSB_MCU == OPT_MCU_STM32C0
+  #define FSDEV_STM32_CPU_MHZ 48U
+#endif
+
+#ifndef CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT
+  #define CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT (FSDEV_STM32_CPU_MHZ / 4U)
+#endif
+
+#ifndef CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT
+  #define CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT (FSDEV_STM32_CPU_MHZ * 2U)
+#endif
+
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_btable_workaround_delay(bool low_speed) {
+  uint32_t cycle_count = low_speed ? CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT : CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT;
+  volatile uint32_t delay_count = cycle_count;
+  while (delay_count > 0U) {
+    delay_count--;
+  }
+}
+#endif
+
 //--------------------------------------------------------------------+
 // Connect / Disconnect
 //--------------------------------------------------------------------+
diff --git a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
index 18cf302d8..f9201651a 100644
--- a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
@@ -197,11 +197,7 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
 
   // If DCON_STAT is already set, the controller sometimes misses the initial connection interrupt
   if (FSDEV_REG->ISTR & U_ISTR_DCON_STAT) {
-    // Wait DP/DM stabilize time
-    volatile uint32_t cycle_count = FSDEV_STM32_CPU_MHZ / 4U;
-    while (cycle_count > 0U) {
-      cycle_count--;
-    }
+    tusb_time_delay_ms_api(2);
     port_status_handler(rhport, false);
   }
 
-- 
cgit v1.3.1


From 5540b2a83fb83dd7f1a477e99084b1818abc2e46 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Apr 2026 19:06:56 +0700
Subject: use single volatile counter

---
 src/portable/st/stm32_fsdev/fsdev_stm32.h | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)

(limited to 'src')

diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index 79052b489..070aa00ec 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -256,10 +256,14 @@ TU_ATTR_ALWAYS_INLINE static inline void fsdev_int_disable(uint8_t rhport) {
 //--------------------------------------------------------------------+
 
 #ifdef CFG_TUSB_FSDEV_32BIT
-// ES0561 (STM32H503), ES0587 (STM32U535/U545)
-// CTR may trigger before final PMA SRAM accesses complete on OUT transfers.
-// Insert delay before reading PMA count/data.
-// Max CPU frequency in MHz, used to derive conservative FSDEV PMA delay defaults.
+/* Errata: Buffer description table update completes after CTR interrupt triggers
+ * https://www.st.com/resource/en/errata_sheet/es0561-stm32h503cbebkbrb-device-errata-stmicroelectronics.pdf
+ * https://www.st.com/resource/en/errata_sheet/es0587-stm32u535xx-and-stm32u545xx-device-errata-stmicroelectronics.pdf
+ *
+ * CTR may trigger before final PMA SRAM accesses complete on OUT transfers.
+ * Insert delay before reading PMA count/data.
+ * Max CPU frequency in MHz, used to derive conservative FSDEV PMA delay defaults.
+ */
 #if CFG_TUSB_MCU == OPT_MCU_STM32H5
   #define FSDEV_STM32_CPU_MHZ 250U
 #elif CFG_TUSB_MCU == OPT_MCU_STM32U5
@@ -283,10 +287,9 @@ TU_ATTR_ALWAYS_INLINE static inline void fsdev_int_disable(uint8_t rhport) {
 #endif
 
 TU_ATTR_ALWAYS_INLINE static inline void fsdev_btable_workaround_delay(bool low_speed) {
-  uint32_t cycle_count = low_speed ? CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT : CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT;
-  volatile uint32_t delay_count = cycle_count;
-  while (delay_count > 0U) {
-    delay_count--;
+  volatile uint32_t cycle_count = low_speed ? CFG_TUSB_FSDEV_BTABLE_LS_DELAY_COUNT : CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT;
+  while (cycle_count > 0U) {
+    cycle_count--;
   }
 }
 #endif
-- 
cgit v1.3.1