1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
|
/*
* Copyright 2025 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _CLOCK_CONFIG_H_
#define _CLOCK_CONFIG_H_
#include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes default configuration of clocks.
*
*/
void BOARD_InitBootClocks(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO12M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO12M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKFRO12M_ADC0_CLOCK 0UL /* Clock consumers of ADC0_clock output : ADC0 */
#define BOARD_BOOTCLOCKFRO12M_CLK16K_0_CLOCK 0UL /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
#define BOARD_BOOTCLOCKFRO12M_CLK16K_1_CLOCK 0UL /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
#define BOARD_BOOTCLOCKFRO12M_CLKOUT_CLOCK 0UL /* Clock consumers of CLKOUT_clock output : N/A */
#define BOARD_BOOTCLOCKFRO12M_CLK_1M_CLOCK 1000000UL /* Clock consumers of CLK_1M_clock output : CMC */
#define BOARD_BOOTCLOCKFRO12M_CLK_48M_CLOCK 0UL /* Clock consumers of CLK_48M_clock output : N/A */
#define BOARD_BOOTCLOCKFRO12M_CLK_IN_CLOCK 0UL /* Clock consumers of CLK_IN_clock output : N/A */
#define BOARD_BOOTCLOCKFRO12M_CMP0FDIV_CLOCK 0UL /* Clock consumers of CMP0FDIV_clock output : CMP0 */
#define BOARD_BOOTCLOCKFRO12M_CMP0RRDIV_CLOCK 0UL /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
#define BOARD_BOOTCLOCKFRO12M_CMP1FDIV_CLOCK 0UL /* Clock consumers of CMP1FDIV_clock output : CMP1 */
#define BOARD_BOOTCLOCKFRO12M_CMP1RRDIV_CLOCK 0UL /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
#define BOARD_BOOTCLOCKFRO12M_CPU_CLOCK 12000000UL /* Clock consumers of CPU_clock output : N/A */
#define BOARD_BOOTCLOCKFRO12M_CTIMER0_CLOCK 0UL /* Clock consumers of CTIMER0_clock output : CTIMER0 */
#define BOARD_BOOTCLOCKFRO12M_CTIMER1_CLOCK 0UL /* Clock consumers of CTIMER1_clock output : CTIMER1 */
#define BOARD_BOOTCLOCKFRO12M_CTIMER2_CLOCK 0UL /* Clock consumers of CTIMER2_clock output : CTIMER2 */
#define BOARD_BOOTCLOCKFRO12M_FREQME_REFERENCE_CLOCK 0UL /* Clock consumers of FREQME_reference_clock output : FREQME0 */
#define BOARD_BOOTCLOCKFRO12M_FREQME_TARGET_CLOCK 0UL /* Clock consumers of FREQME_target_clock output : FREQME0 */
#define BOARD_BOOTCLOCKFRO12M_FRO_12M_CLOCK 12000000UL /* Clock consumers of FRO_12M_clock output : N/A */
#define BOARD_BOOTCLOCKFRO12M_FRO_HF_DIV_CLOCK 0UL /* Clock consumers of FRO_HF_DIV_clock output : N/A */
#define BOARD_BOOTCLOCKFRO12M_FRO_HF_CLOCK 0UL /* Clock consumers of FRO_HF_clock output : N/A */
#define BOARD_BOOTCLOCKFRO12M_I3C_FCLK_CLOCK 0UL /* Clock consumers of I3C_FCLK_clock output : I3C0 */
#define BOARD_BOOTCLOCKFRO12M_I3C_SLOW_TC_CLOCK 0UL /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
#define BOARD_BOOTCLOCKFRO12M_I3C_SLOW_CLOCK 0UL /* Clock consumers of I3C_SLOW_clock output : I3C0 */
#define BOARD_BOOTCLOCKFRO12M_LPI2C0_CLOCK 0UL /* Clock consumers of LPI2C0_clock output : LPI2C0 */
#define BOARD_BOOTCLOCKFRO12M_LPSPI0_CLOCK 0UL /* Clock consumers of LPSPI0_clock output : LPSPI0 */
#define BOARD_BOOTCLOCKFRO12M_LPSPI1_CLOCK 0UL /* Clock consumers of LPSPI1_clock output : LPSPI1 */
#define BOARD_BOOTCLOCKFRO12M_LPTMR0_CLOCK 0UL /* Clock consumers of LPTMR0_clock output : LPTMR0 */
#define BOARD_BOOTCLOCKFRO12M_LPUART0_CLOCK 0UL /* Clock consumers of LPUART0_clock output : LPUART0 */
#define BOARD_BOOTCLOCKFRO12M_LPUART1_CLOCK 0UL /* Clock consumers of LPUART1_clock output : LPUART1 */
#define BOARD_BOOTCLOCKFRO12M_LPUART2_CLOCK 0UL /* Clock consumers of LPUART2_clock output : LPUART2 */
#define BOARD_BOOTCLOCKFRO12M_MAIN_CLOCK 12000000UL /* Clock consumers of MAIN_clock output : FLEXPWM0 */
#define BOARD_BOOTCLOCKFRO12M_OSTIMER_CLOCK 0UL /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
#define BOARD_BOOTCLOCKFRO12M_FIRC_TRIM_CLOCK 0UL /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
#define BOARD_BOOTCLOCKFRO12M_SIRC_TRIM_CLOCK 0UL /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
#define BOARD_BOOTCLOCKFRO12M_SLOW_CLOCK 3000000UL /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
#define BOARD_BOOTCLOCKFRO12M_SYSTEM_CLOCK 12000000UL /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
#define BOARD_BOOTCLOCKFRO12M_TRACE_CLOCK 12000000UL /* Clock consumers of TRACE_clock output : SWD */
#define BOARD_BOOTCLOCKFRO12M_USB0_CLOCK 0UL /* Clock consumers of USB0_clock output : USB0 */
#define BOARD_BOOTCLOCKFRO12M_UTICK_CLOCK 1000000UL /* Clock consumers of UTICK_clock output : UTICK0 */
#define BOARD_BOOTCLOCKFRO12M_WUU_CLOCK 0UL /* Clock consumers of WUU_clock output : N/A */
#define BOARD_BOOTCLOCKFRO12M_WWDT0_CLOCK 1000000UL /* Clock consumers of WWDT0_clock output : WWDT0 */
/*******************************************************************************
* API for BOARD_BootClockFRO12M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO12M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO24M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO24M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO24M_CORE_CLOCK 24000000U /*!< Core clock frequency: 24000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKFRO24M_ADC0_CLOCK 0UL /* Clock consumers of ADC0_clock output : ADC0 */
#define BOARD_BOOTCLOCKFRO24M_CLK16K_0_CLOCK 0UL /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
#define BOARD_BOOTCLOCKFRO24M_CLK16K_1_CLOCK 0UL /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
#define BOARD_BOOTCLOCKFRO24M_CLKOUT_CLOCK 0UL /* Clock consumers of CLKOUT_clock output : N/A */
#define BOARD_BOOTCLOCKFRO24M_CLK_1M_CLOCK 1000000UL /* Clock consumers of CLK_1M_clock output : CMC */
#define BOARD_BOOTCLOCKFRO24M_CLK_48M_CLOCK 48000000UL /* Clock consumers of CLK_48M_clock output : N/A */
#define BOARD_BOOTCLOCKFRO24M_CLK_IN_CLOCK 0UL /* Clock consumers of CLK_IN_clock output : N/A */
#define BOARD_BOOTCLOCKFRO24M_CMP0FDIV_CLOCK 0UL /* Clock consumers of CMP0FDIV_clock output : CMP0 */
#define BOARD_BOOTCLOCKFRO24M_CMP0RRDIV_CLOCK 0UL /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
#define BOARD_BOOTCLOCKFRO24M_CMP1FDIV_CLOCK 0UL /* Clock consumers of CMP1FDIV_clock output : CMP1 */
#define BOARD_BOOTCLOCKFRO24M_CMP1RRDIV_CLOCK 0UL /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
#define BOARD_BOOTCLOCKFRO24M_CPU_CLOCK 24000000UL /* Clock consumers of CPU_clock output : N/A */
#define BOARD_BOOTCLOCKFRO24M_CTIMER0_CLOCK 0UL /* Clock consumers of CTIMER0_clock output : CTIMER0 */
#define BOARD_BOOTCLOCKFRO24M_CTIMER1_CLOCK 0UL /* Clock consumers of CTIMER1_clock output : CTIMER1 */
#define BOARD_BOOTCLOCKFRO24M_CTIMER2_CLOCK 0UL /* Clock consumers of CTIMER2_clock output : CTIMER2 */
#define BOARD_BOOTCLOCKFRO24M_FREQME_REFERENCE_CLOCK 0UL /* Clock consumers of FREQME_reference_clock output : FREQME0 */
#define BOARD_BOOTCLOCKFRO24M_FREQME_TARGET_CLOCK 0UL /* Clock consumers of FREQME_target_clock output : FREQME0 */
#define BOARD_BOOTCLOCKFRO24M_FRO_12M_CLOCK 12000000UL /* Clock consumers of FRO_12M_clock output : N/A */
#define BOARD_BOOTCLOCKFRO24M_FRO_HF_DIV_CLOCK 48000000UL /* Clock consumers of FRO_HF_DIV_clock output : N/A */
#define BOARD_BOOTCLOCKFRO24M_FRO_HF_CLOCK 48000000UL /* Clock consumers of FRO_HF_clock output : N/A */
#define BOARD_BOOTCLOCKFRO24M_I3C_FCLK_CLOCK 0UL /* Clock consumers of I3C_FCLK_clock output : I3C0 */
#define BOARD_BOOTCLOCKFRO24M_I3C_SLOW_TC_CLOCK 0UL /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
#define BOARD_BOOTCLOCKFRO24M_I3C_SLOW_CLOCK 0UL /* Clock consumers of I3C_SLOW_clock output : I3C0 */
#define BOARD_BOOTCLOCKFRO24M_LPI2C0_CLOCK 0UL /* Clock consumers of LPI2C0_clock output : LPI2C0 */
#define BOARD_BOOTCLOCKFRO24M_LPSPI0_CLOCK 0UL /* Clock consumers of LPSPI0_clock output : LPSPI0 */
#define BOARD_BOOTCLOCKFRO24M_LPSPI1_CLOCK 0UL /* Clock consumers of LPSPI1_clock output : LPSPI1 */
#define BOARD_BOOTCLOCKFRO24M_LPTMR0_CLOCK 0UL /* Clock consumers of LPTMR0_clock output : LPTMR0 */
#define BOARD_BOOTCLOCKFRO24M_LPUART0_CLOCK 0UL /* Clock consumers of LPUART0_clock output : LPUART0 */
#define BOARD_BOOTCLOCKFRO24M_LPUART1_CLOCK 0UL /* Clock consumers of LPUART1_clock output : LPUART1 */
#define BOARD_BOOTCLOCKFRO24M_LPUART2_CLOCK 0UL /* Clock consumers of LPUART2_clock output : LPUART2 */
#define BOARD_BOOTCLOCKFRO24M_MAIN_CLOCK 48000000UL /* Clock consumers of MAIN_clock output : FLEXPWM0 */
#define BOARD_BOOTCLOCKFRO24M_OSTIMER_CLOCK 0UL /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
#define BOARD_BOOTCLOCKFRO24M_FIRC_TRIM_CLOCK 0UL /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
#define BOARD_BOOTCLOCKFRO24M_SIRC_TRIM_CLOCK 0UL /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
#define BOARD_BOOTCLOCKFRO24M_SLOW_CLOCK 6000000UL /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
#define BOARD_BOOTCLOCKFRO24M_SYSTEM_CLOCK 24000000UL /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
#define BOARD_BOOTCLOCKFRO24M_TRACE_CLOCK 24000000UL /* Clock consumers of TRACE_clock output : SWD */
#define BOARD_BOOTCLOCKFRO24M_USB0_CLOCK 0UL /* Clock consumers of USB0_clock output : USB0 */
#define BOARD_BOOTCLOCKFRO24M_UTICK_CLOCK 1000000UL /* Clock consumers of UTICK_clock output : UTICK0 */
#define BOARD_BOOTCLOCKFRO24M_WUU_CLOCK 0UL /* Clock consumers of WUU_clock output : N/A */
#define BOARD_BOOTCLOCKFRO24M_WWDT0_CLOCK 1000000UL /* Clock consumers of WWDT0_clock output : WWDT0 */
/*******************************************************************************
* API for BOARD_BootClockFRO24M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO24M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO48M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO48M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO48M_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKFRO48M_ADC0_CLOCK 0UL /* Clock consumers of ADC0_clock output : ADC0 */
#define BOARD_BOOTCLOCKFRO48M_CLK16K_0_CLOCK 0UL /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
#define BOARD_BOOTCLOCKFRO48M_CLK16K_1_CLOCK 0UL /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
#define BOARD_BOOTCLOCKFRO48M_CLKOUT_CLOCK 0UL /* Clock consumers of CLKOUT_clock output : N/A */
#define BOARD_BOOTCLOCKFRO48M_CLK_1M_CLOCK 1000000UL /* Clock consumers of CLK_1M_clock output : CMC */
#define BOARD_BOOTCLOCKFRO48M_CLK_48M_CLOCK 48000000UL /* Clock consumers of CLK_48M_clock output : N/A */
#define BOARD_BOOTCLOCKFRO48M_CLK_IN_CLOCK 0UL /* Clock consumers of CLK_IN_clock output : N/A */
#define BOARD_BOOTCLOCKFRO48M_CMP0FDIV_CLOCK 0UL /* Clock consumers of CMP0FDIV_clock output : CMP0 */
#define BOARD_BOOTCLOCKFRO48M_CMP0RRDIV_CLOCK 0UL /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
#define BOARD_BOOTCLOCKFRO48M_CMP1FDIV_CLOCK 0UL /* Clock consumers of CMP1FDIV_clock output : CMP1 */
#define BOARD_BOOTCLOCKFRO48M_CMP1RRDIV_CLOCK 0UL /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
#define BOARD_BOOTCLOCKFRO48M_CPU_CLOCK 48000000UL /* Clock consumers of CPU_clock output : N/A */
#define BOARD_BOOTCLOCKFRO48M_CTIMER0_CLOCK 0UL /* Clock consumers of CTIMER0_clock output : CTIMER0 */
#define BOARD_BOOTCLOCKFRO48M_CTIMER1_CLOCK 0UL /* Clock consumers of CTIMER1_clock output : CTIMER1 */
#define BOARD_BOOTCLOCKFRO48M_CTIMER2_CLOCK 0UL /* Clock consumers of CTIMER2_clock output : CTIMER2 */
#define BOARD_BOOTCLOCKFRO48M_FREQME_REFERENCE_CLOCK 0UL /* Clock consumers of FREQME_reference_clock output : FREQME0 */
#define BOARD_BOOTCLOCKFRO48M_FREQME_TARGET_CLOCK 0UL /* Clock consumers of FREQME_target_clock output : FREQME0 */
#define BOARD_BOOTCLOCKFRO48M_FRO_12M_CLOCK 12000000UL /* Clock consumers of FRO_12M_clock output : N/A */
#define BOARD_BOOTCLOCKFRO48M_FRO_HF_DIV_CLOCK 48000000UL /* Clock consumers of FRO_HF_DIV_clock output : N/A */
#define BOARD_BOOTCLOCKFRO48M_FRO_HF_CLOCK 48000000UL /* Clock consumers of FRO_HF_clock output : N/A */
#define BOARD_BOOTCLOCKFRO48M_I3C_FCLK_CLOCK 0UL /* Clock consumers of I3C_FCLK_clock output : I3C0 */
#define BOARD_BOOTCLOCKFRO48M_I3C_SLOW_TC_CLOCK 0UL /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
#define BOARD_BOOTCLOCKFRO48M_I3C_SLOW_CLOCK 0UL /* Clock consumers of I3C_SLOW_clock output : I3C0 */
#define BOARD_BOOTCLOCKFRO48M_LPI2C0_CLOCK 0UL /* Clock consumers of LPI2C0_clock output : LPI2C0 */
#define BOARD_BOOTCLOCKFRO48M_LPSPI0_CLOCK 0UL /* Clock consumers of LPSPI0_clock output : LPSPI0 */
#define BOARD_BOOTCLOCKFRO48M_LPSPI1_CLOCK 0UL /* Clock consumers of LPSPI1_clock output : LPSPI1 */
#define BOARD_BOOTCLOCKFRO48M_LPTMR0_CLOCK 0UL /* Clock consumers of LPTMR0_clock output : LPTMR0 */
#define BOARD_BOOTCLOCKFRO48M_LPUART0_CLOCK 0UL /* Clock consumers of LPUART0_clock output : LPUART0 */
#define BOARD_BOOTCLOCKFRO48M_LPUART1_CLOCK 0UL /* Clock consumers of LPUART1_clock output : LPUART1 */
#define BOARD_BOOTCLOCKFRO48M_LPUART2_CLOCK 0UL /* Clock consumers of LPUART2_clock output : LPUART2 */
#define BOARD_BOOTCLOCKFRO48M_MAIN_CLOCK 48000000UL /* Clock consumers of MAIN_clock output : FLEXPWM0 */
#define BOARD_BOOTCLOCKFRO48M_OSTIMER_CLOCK 0UL /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
#define BOARD_BOOTCLOCKFRO48M_FIRC_TRIM_CLOCK 0UL /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
#define BOARD_BOOTCLOCKFRO48M_SIRC_TRIM_CLOCK 0UL /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
#define BOARD_BOOTCLOCKFRO48M_SLOW_CLOCK 12000000UL /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
#define BOARD_BOOTCLOCKFRO48M_SYSTEM_CLOCK 48000000UL /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
#define BOARD_BOOTCLOCKFRO48M_TRACE_CLOCK 48000000UL /* Clock consumers of TRACE_clock output : SWD */
#define BOARD_BOOTCLOCKFRO48M_USB0_CLOCK 0UL /* Clock consumers of USB0_clock output : USB0 */
#define BOARD_BOOTCLOCKFRO48M_UTICK_CLOCK 1000000UL /* Clock consumers of UTICK_clock output : UTICK0 */
#define BOARD_BOOTCLOCKFRO48M_WUU_CLOCK 0UL /* Clock consumers of WUU_clock output : N/A */
#define BOARD_BOOTCLOCKFRO48M_WWDT0_CLOCK 1000000UL /* Clock consumers of WWDT0_clock output : WWDT0 */
/*******************************************************************************
* API for BOARD_BootClockFRO48M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO48M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO64M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO64M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO64M_CORE_CLOCK 64000000U /*!< Core clock frequency: 64000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKFRO64M_ADC0_CLOCK 0UL /* Clock consumers of ADC0_clock output : ADC0 */
#define BOARD_BOOTCLOCKFRO64M_CLK16K_0_CLOCK 0UL /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
#define BOARD_BOOTCLOCKFRO64M_CLK16K_1_CLOCK 0UL /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
#define BOARD_BOOTCLOCKFRO64M_CLKOUT_CLOCK 0UL /* Clock consumers of CLKOUT_clock output : N/A */
#define BOARD_BOOTCLOCKFRO64M_CLK_1M_CLOCK 1000000UL /* Clock consumers of CLK_1M_clock output : CMC */
#define BOARD_BOOTCLOCKFRO64M_CLK_48M_CLOCK 48000000UL /* Clock consumers of CLK_48M_clock output : N/A */
#define BOARD_BOOTCLOCKFRO64M_CLK_IN_CLOCK 0UL /* Clock consumers of CLK_IN_clock output : N/A */
#define BOARD_BOOTCLOCKFRO64M_CMP0FDIV_CLOCK 0UL /* Clock consumers of CMP0FDIV_clock output : CMP0 */
#define BOARD_BOOTCLOCKFRO64M_CMP0RRDIV_CLOCK 0UL /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
#define BOARD_BOOTCLOCKFRO64M_CMP1FDIV_CLOCK 0UL /* Clock consumers of CMP1FDIV_clock output : CMP1 */
#define BOARD_BOOTCLOCKFRO64M_CMP1RRDIV_CLOCK 0UL /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
#define BOARD_BOOTCLOCKFRO64M_CPU_CLOCK 64000000UL /* Clock consumers of CPU_clock output : N/A */
#define BOARD_BOOTCLOCKFRO64M_CTIMER0_CLOCK 0UL /* Clock consumers of CTIMER0_clock output : CTIMER0 */
#define BOARD_BOOTCLOCKFRO64M_CTIMER1_CLOCK 0UL /* Clock consumers of CTIMER1_clock output : CTIMER1 */
#define BOARD_BOOTCLOCKFRO64M_CTIMER2_CLOCK 0UL /* Clock consumers of CTIMER2_clock output : CTIMER2 */
#define BOARD_BOOTCLOCKFRO64M_FREQME_REFERENCE_CLOCK 0UL /* Clock consumers of FREQME_reference_clock output : FREQME0 */
#define BOARD_BOOTCLOCKFRO64M_FREQME_TARGET_CLOCK 0UL /* Clock consumers of FREQME_target_clock output : FREQME0 */
#define BOARD_BOOTCLOCKFRO64M_FRO_12M_CLOCK 12000000UL /* Clock consumers of FRO_12M_clock output : N/A */
#define BOARD_BOOTCLOCKFRO64M_FRO_HF_DIV_CLOCK 64000000UL /* Clock consumers of FRO_HF_DIV_clock output : N/A */
#define BOARD_BOOTCLOCKFRO64M_FRO_HF_CLOCK 64000000UL /* Clock consumers of FRO_HF_clock output : N/A */
#define BOARD_BOOTCLOCKFRO64M_I3C_FCLK_CLOCK 0UL /* Clock consumers of I3C_FCLK_clock output : I3C0 */
#define BOARD_BOOTCLOCKFRO64M_I3C_SLOW_TC_CLOCK 0UL /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
#define BOARD_BOOTCLOCKFRO64M_I3C_SLOW_CLOCK 0UL /* Clock consumers of I3C_SLOW_clock output : I3C0 */
#define BOARD_BOOTCLOCKFRO64M_LPI2C0_CLOCK 0UL /* Clock consumers of LPI2C0_clock output : LPI2C0 */
#define BOARD_BOOTCLOCKFRO64M_LPSPI0_CLOCK 0UL /* Clock consumers of LPSPI0_clock output : LPSPI0 */
#define BOARD_BOOTCLOCKFRO64M_LPSPI1_CLOCK 0UL /* Clock consumers of LPSPI1_clock output : LPSPI1 */
#define BOARD_BOOTCLOCKFRO64M_LPTMR0_CLOCK 0UL /* Clock consumers of LPTMR0_clock output : LPTMR0 */
#define BOARD_BOOTCLOCKFRO64M_LPUART0_CLOCK 0UL /* Clock consumers of LPUART0_clock output : LPUART0 */
#define BOARD_BOOTCLOCKFRO64M_LPUART1_CLOCK 0UL /* Clock consumers of LPUART1_clock output : LPUART1 */
#define BOARD_BOOTCLOCKFRO64M_LPUART2_CLOCK 0UL /* Clock consumers of LPUART2_clock output : LPUART2 */
#define BOARD_BOOTCLOCKFRO64M_MAIN_CLOCK 64000000UL /* Clock consumers of MAIN_clock output : FLEXPWM0 */
#define BOARD_BOOTCLOCKFRO64M_OSTIMER_CLOCK 0UL /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
#define BOARD_BOOTCLOCKFRO64M_FIRC_TRIM_CLOCK 0UL /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
#define BOARD_BOOTCLOCKFRO64M_SIRC_TRIM_CLOCK 0UL /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
#define BOARD_BOOTCLOCKFRO64M_SLOW_CLOCK 16000000UL /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
#define BOARD_BOOTCLOCKFRO64M_SYSTEM_CLOCK 64000000UL /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
#define BOARD_BOOTCLOCKFRO64M_TRACE_CLOCK 64000000UL /* Clock consumers of TRACE_clock output : SWD */
#define BOARD_BOOTCLOCKFRO64M_USB0_CLOCK 0UL /* Clock consumers of USB0_clock output : USB0 */
#define BOARD_BOOTCLOCKFRO64M_UTICK_CLOCK 1000000UL /* Clock consumers of UTICK_clock output : UTICK0 */
#define BOARD_BOOTCLOCKFRO64M_WUU_CLOCK 0UL /* Clock consumers of WUU_clock output : N/A */
#define BOARD_BOOTCLOCKFRO64M_WWDT0_CLOCK 1000000UL /* Clock consumers of WWDT0_clock output : WWDT0 */
/*******************************************************************************
* API for BOARD_BootClockFRO64M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO64M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO96M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO96M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO96M_CORE_CLOCK 96000000U /*!< Core clock frequency: 96000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKFRO96M_ADC0_CLOCK 0UL /* Clock consumers of ADC0_clock output : ADC0 */
#define BOARD_BOOTCLOCKFRO96M_CLK16K_0_CLOCK 0UL /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
#define BOARD_BOOTCLOCKFRO96M_CLK16K_1_CLOCK 0UL /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
#define BOARD_BOOTCLOCKFRO96M_CLKOUT_CLOCK 0UL /* Clock consumers of CLKOUT_clock output : N/A */
#define BOARD_BOOTCLOCKFRO96M_CLK_1M_CLOCK 1000000UL /* Clock consumers of CLK_1M_clock output : CMC */
#define BOARD_BOOTCLOCKFRO96M_CLK_48M_CLOCK 48000000UL /* Clock consumers of CLK_48M_clock output : N/A */
#define BOARD_BOOTCLOCKFRO96M_CLK_IN_CLOCK 0UL /* Clock consumers of CLK_IN_clock output : N/A */
#define BOARD_BOOTCLOCKFRO96M_CMP0FDIV_CLOCK 0UL /* Clock consumers of CMP0FDIV_clock output : CMP0 */
#define BOARD_BOOTCLOCKFRO96M_CMP0RRDIV_CLOCK 0UL /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
#define BOARD_BOOTCLOCKFRO96M_CMP1FDIV_CLOCK 0UL /* Clock consumers of CMP1FDIV_clock output : CMP1 */
#define BOARD_BOOTCLOCKFRO96M_CMP1RRDIV_CLOCK 0UL /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
#define BOARD_BOOTCLOCKFRO96M_CPU_CLOCK 96000000UL /* Clock consumers of CPU_clock output : N/A */
#define BOARD_BOOTCLOCKFRO96M_CTIMER0_CLOCK 0UL /* Clock consumers of CTIMER0_clock output : CTIMER0 */
#define BOARD_BOOTCLOCKFRO96M_CTIMER1_CLOCK 0UL /* Clock consumers of CTIMER1_clock output : CTIMER1 */
#define BOARD_BOOTCLOCKFRO96M_CTIMER2_CLOCK 0UL /* Clock consumers of CTIMER2_clock output : CTIMER2 */
#define BOARD_BOOTCLOCKFRO96M_FREQME_REFERENCE_CLOCK 0UL /* Clock consumers of FREQME_reference_clock output : FREQME0 */
#define BOARD_BOOTCLOCKFRO96M_FREQME_TARGET_CLOCK 0UL /* Clock consumers of FREQME_target_clock output : FREQME0 */
#define BOARD_BOOTCLOCKFRO96M_FRO_12M_CLOCK 12000000UL /* Clock consumers of FRO_12M_clock output : N/A */
#define BOARD_BOOTCLOCKFRO96M_FRO_HF_DIV_CLOCK 96000000UL /* Clock consumers of FRO_HF_DIV_clock output : N/A */
#define BOARD_BOOTCLOCKFRO96M_FRO_HF_CLOCK 96000000UL /* Clock consumers of FRO_HF_clock output : N/A */
#define BOARD_BOOTCLOCKFRO96M_I3C_FCLK_CLOCK 0UL /* Clock consumers of I3C_FCLK_clock output : I3C0 */
#define BOARD_BOOTCLOCKFRO96M_I3C_SLOW_TC_CLOCK 0UL /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
#define BOARD_BOOTCLOCKFRO96M_I3C_SLOW_CLOCK 0UL /* Clock consumers of I3C_SLOW_clock output : I3C0 */
#define BOARD_BOOTCLOCKFRO96M_LPI2C0_CLOCK 0UL /* Clock consumers of LPI2C0_clock output : LPI2C0 */
#define BOARD_BOOTCLOCKFRO96M_LPSPI0_CLOCK 0UL /* Clock consumers of LPSPI0_clock output : LPSPI0 */
#define BOARD_BOOTCLOCKFRO96M_LPSPI1_CLOCK 0UL /* Clock consumers of LPSPI1_clock output : LPSPI1 */
#define BOARD_BOOTCLOCKFRO96M_LPTMR0_CLOCK 0UL /* Clock consumers of LPTMR0_clock output : LPTMR0 */
#define BOARD_BOOTCLOCKFRO96M_LPUART0_CLOCK 0UL /* Clock consumers of LPUART0_clock output : LPUART0 */
#define BOARD_BOOTCLOCKFRO96M_LPUART1_CLOCK 0UL /* Clock consumers of LPUART1_clock output : LPUART1 */
#define BOARD_BOOTCLOCKFRO96M_LPUART2_CLOCK 0UL /* Clock consumers of LPUART2_clock output : LPUART2 */
#define BOARD_BOOTCLOCKFRO96M_MAIN_CLOCK 96000000UL /* Clock consumers of MAIN_clock output : FLEXPWM0 */
#define BOARD_BOOTCLOCKFRO96M_OSTIMER_CLOCK 0UL /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
#define BOARD_BOOTCLOCKFRO96M_FIRC_TRIM_CLOCK 0UL /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
#define BOARD_BOOTCLOCKFRO96M_SIRC_TRIM_CLOCK 0UL /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
#define BOARD_BOOTCLOCKFRO96M_SLOW_CLOCK 24000000UL /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
#define BOARD_BOOTCLOCKFRO96M_SYSTEM_CLOCK 96000000UL /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
#define BOARD_BOOTCLOCKFRO96M_TRACE_CLOCK 96000000UL /* Clock consumers of TRACE_clock output : SWD */
#define BOARD_BOOTCLOCKFRO96M_USB0_CLOCK 0UL /* Clock consumers of USB0_clock output : USB0 */
#define BOARD_BOOTCLOCKFRO96M_UTICK_CLOCK 1000000UL /* Clock consumers of UTICK_clock output : UTICK0 */
#define BOARD_BOOTCLOCKFRO96M_WUU_CLOCK 0UL /* Clock consumers of WUU_clock output : N/A */
#define BOARD_BOOTCLOCKFRO96M_WWDT0_CLOCK 1000000UL /* Clock consumers of WWDT0_clock output : WWDT0 */
/*******************************************************************************
* API for BOARD_BootClockFRO96M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO96M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
#endif /* _CLOCK_CONFIG_H_ */
|
