<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git, branch v2016.05-rc3</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>Prepare v2016.05-rc3</title>
<updated>2016-04-25T23:27:37+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-04-25T23:27:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a398e7aa216279652dd380d3ecd3683b3b5e588e'/>
<id>a398e7aa216279652dd380d3ecd3683b3b5e588e</id>
<content type='text'>
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pico-imx6ul: Update the defconfig</title>
<updated>2016-04-25T22:03:48+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-04-25T22:03:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fc6e3c81deb14cab664afff45e31309b70bac19d'/>
<id>fc6e3c81deb14cab664afff45e31309b70bac19d</id>
<content type='text'>
The defconfig/config.h file were merged but were already out of sync
with mainline.  This brings them further into line now.

Cc: Richard Hu &lt;richard.hu@technexion.com&gt;
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The defconfig/config.h file were merged but were already out of sync
with mainline.  This brings them further into line now.

Cc: Richard Hu &lt;richard.hu@technexion.com&gt;
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-video</title>
<updated>2016-04-25T20:23:51+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-04-25T20:23:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a212d6966bfcf393e82e44246d7dfb6de032e82a'/>
<id>a212d6966bfcf393e82e44246d7dfb6de032e82a</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers/video/am335x-fb: Fix bits for LCD_PALMODE_RAWDATA definition</title>
<updated>2016-04-25T20:02:08+00:00</updated>
<author>
<name>Martin Pietryka</name>
<email>martin.pietryka@chello.at</email>
</author>
<published>2016-04-25T19:25:07+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ac5c61bfa6ad24a5384b9b89902e024a994f715f'/>
<id>ac5c61bfa6ad24a5384b9b89902e024a994f715f</id>
<content type='text'>
According to the TRM you have to set bits [21:20] to 0b10 for RAW mode, so
(0x10 &lt;&lt; 20) is obviously wrong here.

Signed-off-by: Martin Pietryka &lt;martin.pietryka@chello.at&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
According to the TRM you have to set bits [21:20] to 0b10 for RAW mode, so
(0x10 &lt;&lt; 20) is obviously wrong here.

Signed-off-by: Martin Pietryka &lt;martin.pietryka@chello.at&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci: Device scanning range fix</title>
<updated>2016-04-25T19:10:43+00:00</updated>
<author>
<name>Yoshinori Sato</name>
<email>ysato@users.sourceforge.jp</email>
</author>
<published>2016-04-25T06:41:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6d9f5b035d73129fe0ba4c0d28af55ee565e2490'/>
<id>6d9f5b035d73129fe0ba4c0d28af55ee565e2490</id>
<content type='text'>
The terminal condition in the area where a PCI device is scanned is wrong,
and 1f.7 isn't scanned.

Signed-off-by: Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The terminal condition in the area where a PCI device is scanned is wrong,
and 1f.7 isn't scanned.

Signed-off-by: Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc: sdhci: add const qualifier to the name of struct sdhci_host</title>
<updated>2016-04-25T19:10:42+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-04-22T11:59:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cacd1d2f33da2d78e8568f2e48539a4a57de20ae'/>
<id>cacd1d2f33da2d78e8568f2e48539a4a57de20ae</id>
<content type='text'>
This allows to drop annoying (char *) casts when setting the host
name of struct sdhci_host.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This allows to drop annoying (char *) casts when setting the host
name of struct sdhci_host.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: DRA7: Add ABB setup for all domains</title>
<updated>2016-04-25T19:10:41+00:00</updated>
<author>
<name>Nishanth Menon</name>
<email>nm@ti.com</email>
</author>
<published>2016-04-21T19:34:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e52e334e5cb493e19377d23a00aa4d021fc229ba'/>
<id>e52e334e5cb493e19377d23a00aa4d021fc229ba</id>
<content type='text'>
ABB should be initialized for all required domains voltage domain
for DRA7: IVA, GPU, EVE in addition to the existing MPU domain. If
we do not do this, kernel configuring just the frequency using the
default boot loader configured voltage can fail on many corner lot
units and has been hard to debug. This specifically is a concern with
DRA7 generation of SoCs since other than VDD_MPU, all other domains
are only permitted to setup the voltages to required OPP only at boot.

Reported-by: Richard Woodruff &lt;r-woodruff2@ti.com&gt;
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ABB should be initialized for all required domains voltage domain
for DRA7: IVA, GPU, EVE in addition to the existing MPU domain. If
we do not do this, kernel configuring just the frequency using the
default boot loader configured voltage can fail on many corner lot
units and has been hard to debug. This specifically is a concern with
DRA7 generation of SoCs since other than VDD_MPU, all other domains
are only permitted to setup the voltages to required OPP only at boot.

Reported-by: Richard Woodruff &lt;r-woodruff2@ti.com&gt;
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: OMAP5: Enable ABB configuration for MM voltage domain</title>
<updated>2016-04-25T19:10:40+00:00</updated>
<author>
<name>Nishanth Menon</name>
<email>nm@ti.com</email>
</author>
<published>2016-04-21T19:34:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a818097a330e73795dc0e783fbb67c5ec86b657f'/>
<id>a818097a330e73795dc0e783fbb67c5ec86b657f</id>
<content type='text'>
Since we setup the voltage and frequency for the MM domain, we *must*
setup the ABB configuration needed for the domain as well. If we do not
do this, kernel configuring just the frequency using the default boot
loader configured voltage can fail on many corner lot units.

Reported-by: Richard Woodruff &lt;r-woodruff2@ti.com&gt;
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Since we setup the voltage and frequency for the MM domain, we *must*
setup the ABB configuration needed for the domain as well. If we do not
do this, kernel configuring just the frequency using the default boot
loader configured voltage can fail on many corner lot units.

Reported-by: Richard Woodruff &lt;r-woodruff2@ti.com&gt;
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: OMAP5/DRA7: Move ABB TXDONE mask to voltage structure</title>
<updated>2016-04-25T19:10:39+00:00</updated>
<author>
<name>Nishanth Menon</name>
<email>nm@ti.com</email>
</author>
<published>2016-04-21T19:34:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3708e78c33b3853e300a6ded3113de90dacbc633'/>
<id>3708e78c33b3853e300a6ded3113de90dacbc633</id>
<content type='text'>
ABB TX_DONE mask will vary depending on ABB module. For example,
3630 never had ABB on IVA domain, while OMAP5 does use ABB on MM domain,
DRA7 has it on all domains with the exception of CORE, RTC.

Hence, move the txdone mask definition over to structure describing
voltage domain.

Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ABB TX_DONE mask will vary depending on ABB module. For example,
3630 never had ABB on IVA domain, while OMAP5 does use ABB on MM domain,
DRA7 has it on all domains with the exception of CORE, RTC.

Hence, move the txdone mask definition over to structure describing
voltage domain.

Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: OMAP5/DRA7: Get rid of control_std_fuse_opp_vdd_mpu_2</title>
<updated>2016-04-25T19:10:38+00:00</updated>
<author>
<name>Nishanth Menon</name>
<email>nm@ti.com</email>
</author>
<published>2016-04-21T19:34:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2d9d057be6aaa410650b7ceecfcdb0aca4c24e31'/>
<id>2d9d057be6aaa410650b7ceecfcdb0aca4c24e31</id>
<content type='text'>
This information is already available under vcores-&gt;volts.efuse.reg.
There is no reason for duplicating the information since AVS Class 0
definitions are common for OMAP5 and DRA7 and defined with
STD_FUSE_OPP_* macros. This allows a central location of defining
the ABB and voltage definitions especially since they are reused.

This also makes it simpler to prevent mistakes involved when changing
the boot OPP for the device.

Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This information is already available under vcores-&gt;volts.efuse.reg.
There is no reason for duplicating the information since AVS Class 0
definitions are common for OMAP5 and DRA7 and defined with
STD_FUSE_OPP_* macros. This allows a central location of defining
the ABB and voltage definitions especially since they are reused.

This also makes it simpler to prevent mistakes involved when changing
the boot OPP for the device.

Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
