Signed-off-by: Tom Rini <trini@konsulko.com>

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>

When booting a itb file with a Ramdisk on a imx6 based
board, U-Boot drops the warning:

Loading Kernel Image ... OK
Loading Ramdisk to 4ecf1000, end 4ef8b11f ... \
CACHE: Misaligned operation at range [4ecf1000,  4ef8b11f]

Fix it!

Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Ayoub Zaki <hs@denx.de>

Use dfu_alt_info_emmc variable from include/environment/ti/dfu.h file.
It was probably overlooked when extracting DFU variables to mentioned
file.

This patch fixes DFU on BeagleBone Black, so that we can use commands
like ones below to upgrade various images on eMMC:

    => setenv dfu_alt_info $dfu_alt_info_emmc
    => dfu 0 mmc 1

    $ dfu-util -D MLO -a MLO.raw
    $ dfu-util -D u-boot.img -a u-boot.img.raw

Without this patch, the  user is forced to assign the value to
dfu_alt_info_emmc manually, which contradicts with instructions [1].

[1] http://processors.wiki.ti.com/index.php/Linux_Core_U-Boot_User%27s_Guide

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>

This patch is ported from the Linux patch posted at [1] and applied to
net tree as commit f1e2400a80ff.

The purpose of this change is to fix the incorrect detection of the link
partner (LP) advertised capabilities which sometimes happens with this PHY
(roughly 1 time in a dozen)

This issue may cause the link to be negotiated at 10Mbps/Full or
10Mbps/Half when 100MBps/Full is actually possible. In some case, the link
is even completely broken and no communication is possible.

To detect the corruption, we must look for a magic undocumented bit in the
WOL bank (hint given by the SoC vendor kernel) but this is not enough to
cover all cases. We also have to look at the LPA ack. If the LP supports
Aneg but did not ack our base code when aneg is completed, we assume
something went wrong.

The detection of a corrupted LPA triggers a restart of the aneg process.
This solves the problem but may take up to 6 retries to complete.

[1] https://lkml.kernel.org/r/20171208110811.30789-1-jbrunet@baylibre.com

Fixes: 8995a96d1d67 ("net: phy: Add Amlogic Meson GXL Internal PHY support")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Using writel causes a "Synchronous Abort". Invert the arguments.

Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Xilinx changes for v2018.01-rc2-v2

fpga:
- Enable loading bitstream via fit image for !xilinx platforms

zynq:
- Fix SPL SD boot mode

zynqmp:
- Not not reset in panic
- Do not use simple allocator because of fat changes
- Various dt chagnes
- modeboot variable setup
- Fix fpga loading on automotive devices
- Fix coverity issues

test:
- Fix env test for !hush case - Stephen's patch

Increase setup, assertion and hold time related to chip-select signal.
Additional delay is needed for the signal to propogate through FPGA.
This adjustment slightly increase the read and write cycle but has no
impact on burst read or write.

Signed-off-by: York Sun <york.sun@nxp.com>