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<title>u-boot.git, branch v2023.04-rc1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>Prepare v2023.04-rc1</title>
<updated>2023-01-30T20:36:45+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-01-30T20:36:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=30db474704405be823259851cbb76fa05366c8af'/>
<id>30db474704405be823259851cbb76fa05366c8af</id>
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Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
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<pre>
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>Revert "rockchip: Only call binman when TPL available"</title>
<updated>2023-01-30T20:33:36+00:00</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@edgeble.ai</email>
</author>
<published>2023-01-27T07:21:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1a45a031d75d8c1e4b63ff72ef5222e491f6481f'/>
<id>1a45a031d75d8c1e4b63ff72ef5222e491f6481f</id>
<content type='text'>
This reverts commit f5315dd6290a588434e4f79bfd2886bb7df9210d.

[why]
TPL is not mandatory for not all Rockchip SoCs, some SoCs like
RK356x, and RK3588 still use mainline u-boot without TPL as
their ddr init programs are accessed via binaries provided by
Rockchip instead of ddr source code.

Marking TPL build makes it not able to build u-boot.itb on
RK356x targets so revert this so that it can build an SPL build
that would support all across Rockchip platforms.

Suggested-by: Quentin Schulz &lt;quentin.schulz@theobroma-systems.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@edgeble.ai&gt;
Tested-by: Anand Moon &lt;linux.amoon@gmail.com&gt;  # CM3
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<pre>
This reverts commit f5315dd6290a588434e4f79bfd2886bb7df9210d.

[why]
TPL is not mandatory for not all Rockchip SoCs, some SoCs like
RK356x, and RK3588 still use mainline u-boot without TPL as
their ddr init programs are accessed via binaries provided by
Rockchip instead of ddr source code.

Marking TPL build makes it not able to build u-boot.itb on
RK356x targets so revert this so that it can build an SPL build
that would support all across Rockchip platforms.

Suggested-by: Quentin Schulz &lt;quentin.schulz@theobroma-systems.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@edgeble.ai&gt;
Tested-by: Anand Moon &lt;linux.amoon@gmail.com&gt;  # CM3
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch '2023-01-27-apple-soc-updates'</title>
<updated>2023-01-27T19:48:22+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-01-27T19:48:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f147aa80f52989c7455022ca1ab959e8545feccc'/>
<id>f147aa80f52989c7455022ca1ab959e8545feccc</id>
<content type='text'>
First, to quote the author:
This series adds support for the PCIe controller found on Apple M1 and
M2 machines and enables support for PCIe XHCI controllers.  This makes
the type-A USB ports on the M1 Mac mini work.  Since the use of Apples
DART IOMMU is mandatory (these PCIe DARTs don't support bypass mode),
this adds DMA mapping operations to the IOMMU uclass and implements
them for the Apple DART.  It modifies the XHCI driver code to go map
DMA buffers through the IOMMU if there is one.  Since the M1 Mac mini
now has two types of XHCI controllers with different number of ports
(2 for the DWC3 controllers, 8 for the Fresco Logic PCIe controller)
this uncovered an issue in with the way the hub descriptor is
implemented in the XHCI driver.

Second, Mark also fixes some Apple-specific instances of
CONFIG_IS_ENABLED that should be IS_ENABLED.
</content>
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<pre>
First, to quote the author:
This series adds support for the PCIe controller found on Apple M1 and
M2 machines and enables support for PCIe XHCI controllers.  This makes
the type-A USB ports on the M1 Mac mini work.  Since the use of Apples
DART IOMMU is mandatory (these PCIe DARTs don't support bypass mode),
this adds DMA mapping operations to the IOMMU uclass and implements
them for the Apple DART.  It modifies the XHCI driver code to go map
DMA buffers through the IOMMU if there is one.  Since the M1 Mac mini
now has two types of XHCI controllers with different number of ports
(2 for the DWC3 controllers, 8 for the Fresco Logic PCIe controller)
this uncovered an issue in with the way the hub descriptor is
implemented in the XHCI driver.

Second, Mark also fixes some Apple-specific instances of
CONFIG_IS_ENABLED that should be IS_ENABLED.
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'efi-2023-04-rc1-3' of https://source.denx.de/u-boot/custodians/u-boot-efi</title>
<updated>2023-01-27T19:48:14+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-01-27T19:48:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=aa7c61f62923a1c9e9ec7f588ad37016d8c7323c'/>
<id>aa7c61f62923a1c9e9ec7f588ad37016d8c7323c</id>
<content type='text'>
Pull request efi-2023-04-rc1-3

Documentation:

* Improve the sl-mx8mm documenation
* Clean up README, move some section to HTML
* Man-pages for the mtime and sleep command
* Description of reducible builds
* Document dynamic event handlers

UEFI:

* Support scrolling in eficonfig command

Other:

* fix mtest on 64 bit systems
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<pre>
Pull request efi-2023-04-rc1-3

Documentation:

* Improve the sl-mx8mm documenation
* Clean up README, move some section to HTML
* Man-pages for the mtime and sleep command
* Description of reducible builds
* Document dynamic event handlers

UEFI:

* Support scrolling in eficonfig command

Other:

* fix mtest on 64 bit systems
</pre>
</div>
</content>
</entry>
<entry>
<title>usb: xhci: Fix root hub descriptor</title>
<updated>2023-01-27T19:47:58+00:00</updated>
<author>
<name>Mark Kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2023-01-21T19:28:00+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e330c8b83e8784d23614f80ca3f12b11ceb515d8'/>
<id>e330c8b83e8784d23614f80ca3f12b11ceb515d8</id>
<content type='text'>
When a system has multiple XHCI controllers, some of the
properties described in the descriptor of the root hub (such as
the number of ports) might differ between controllers.  Fix this
by switching from a single global hub descriptor to a hub
descriptor per controller.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When a system has multiple XHCI controllers, some of the
properties described in the descriptor of the root hub (such as
the number of ports) might differ between controllers.  Fix this
by switching from a single global hub descriptor to a hub
descriptor per controller.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: apple: Enable PCIe USB controller</title>
<updated>2023-01-27T19:47:58+00:00</updated>
<author>
<name>Mark Kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2023-01-21T19:27:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=06af0e8026ad6f21946f0f5a050ec2e0a1876491'/>
<id>06af0e8026ad6f21946f0f5a050ec2e0a1876491</id>
<content type='text'>
Some Apple Silicon machines have a PCIe XHCI controller in additon
to the DWC3 controllers integrated on the SoC.  On the Mac mini
the Type-A ports are handled by this PCIe controller.  Enabling
it allows the use of these ports in U-Boot.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
</content>
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<pre>
Some Apple Silicon machines have a PCIe XHCI controller in additon
to the DWC3 controllers integrated on the SoC.  On the Mac mini
the Type-A ports are handled by this PCIe controller.  Enabling
it allows the use of these ports in U-Boot.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci: Add Apple PCIe controller driver</title>
<updated>2023-01-27T19:47:58+00:00</updated>
<author>
<name>Mark Kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2023-01-21T19:27:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bdebb00d835ca6d99beddea29339f7073e1b83dc'/>
<id>bdebb00d835ca6d99beddea29339f7073e1b83dc</id>
<content type='text'>
This driver supports the PCIe controller on the Apple M1 and
M2 SoCs.  The code is adapted from the Linux driver.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
</content>
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<pre>
This driver supports the PCIe controller on the Apple M1 and
M2 SoCs.  The code is adapted from the Linux driver.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>test: Add test for mapping IOMMUs for PCI devices</title>
<updated>2023-01-27T19:47:58+00:00</updated>
<author>
<name>Mark Kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2023-01-21T19:27:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=08386da0c65c5669a447f763ab4cd91d9efc7cd1'/>
<id>08386da0c65c5669a447f763ab4cd91d9efc7cd1</id>
<content type='text'>
Test that we correctly probe an IOMMU that is mapped by an
"iommu-map" device tree property of a PCIe controller node.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Test that we correctly probe an IOMMU that is mapped by an
"iommu-map" device tree property of a PCIe controller node.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu: Implement mapping IOMMUs for PCI devices</title>
<updated>2023-01-27T19:47:58+00:00</updated>
<author>
<name>Mark Kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2023-01-21T19:27:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1fc2329121e403a4d7dbffa4c4fda5a756043e4a'/>
<id>1fc2329121e403a4d7dbffa4c4fda5a756043e4a</id>
<content type='text'>
Systems such as Apple's M1 and M2 SoCs may have separate IOMMUs
for each PCIe root port.  In this case the right IOMMU for a
PCI device behind a particular root port is described by an
"iommu-map" property in the device tree.  Parse this property
and use it to find the right IOMMU device for PCI devices.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
</content>
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<pre>
Systems such as Apple's M1 and M2 SoCs may have separate IOMMUs
for each PCIe root port.  In this case the right IOMMU for a
PCI device behind a particular root port is described by an
"iommu-map" property in the device tree.  Parse this property
and use it to find the right IOMMU device for PCI devices.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>usb: xhci: Implement DMA mapping</title>
<updated>2023-01-27T19:47:58+00:00</updated>
<author>
<name>Mark Kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2023-01-21T19:27:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ba1efb3d2494e8ceb0ff405642f44a955f8d8e1b'/>
<id>ba1efb3d2494e8ceb0ff405642f44a955f8d8e1b</id>
<content type='text'>
An XHCI controller that sits behind an IOMMU needs to map and unmap
its memory buffers to do DMA.  Implement this by inroducing new
xhci_dma_map() and xhci_dma_unmap() helper functions.  The
xhci_dma_map() function replaces the existing xhci_virt_to_bus()
function in the sense that it returns the bus address in the case
of simple address translation in the absence of an IOMMU.  The
xhci_bus_to_virt() function is eliminated by storing the CPU
address of the allocated scratchpad memory in struct xhci_ctrl.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
An XHCI controller that sits behind an IOMMU needs to map and unmap
its memory buffers to do DMA.  Implement this by inroducing new
xhci_dma_map() and xhci_dma_unmap() helper functions.  The
xhci_dma_map() function replaces the existing xhci_virt_to_bus()
function in the sense that it returns the bus address in the case
of simple address translation in the absence of an IOMMU.  The
xhci_bus_to_virt() function is eliminated by storing the CPU
address of the allocated scratchpad memory in struct xhci_ctrl.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
</pre>
</div>
</content>
</entry>
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