u-boot.git, branch v2024.01-rc5 Unnamed repository; edit this file 'description' to name the repository. Prepare v2024.01-rc5 2023-12-18T12:49:45+00:00 Tom Rini trini@konsulko.com 2023-12-18T12:49:45+00:00 97a897444235921ce19b4f8a3b27de6f5a9ab367 Signed-off-by: Tom Rini <trini@konsulko.com> 
Signed-off-by: Tom Rini <trini@konsulko.com>
Merge tag 'clk-2024.01-rc5' of https://source.denx.de/u-boot/custodians/u-boot-clk 2023-12-15T22:48:52+00:00 Tom Rini trini@konsulko.com 2023-12-15T22:48:52+00:00 39b4b2d9ecd7e9ceba17673bb1411f2d640a0b11 clock changes for u-boot/master This has some clock fixes which should go in before the release. It's a bit late in the cycle, but most of these have tests to go along with them. Signed-off-by: Sean Anderson <seanga2@gmail.com> 
clock changes for u-boot/master

This has some clock fixes which should go in before the release. It's a bit
late in the cycle, but most of these have tests to go along with them.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
test: dm: clk_ccf: fix building error 2023-12-15T20:30:12+00:00 Yang Xiwen forbidden405@outlook.com 2023-12-15T20:21:11+00:00 97d65b32d76cb3b8297cd8aa2c1f0caab5ab6c57 Fix unused variable error produced by building tests Fixes: d3061824 (test: dm: clk_ccf: test ccf_clk_ops) Signed-off-by: Yang Xiwen <forbidden405@outlook.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231216-b4-fix_build-v1-1-b8e79c94744f@outlook.com 
Fix unused variable error produced by building tests

Fixes: d3061824 (test: dm: clk_ccf: test ccf_clk_ops)
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231216-b4-fix_build-v1-1-b8e79c94744f@outlook.com
test: dm: clk_ccf: test ccf_clk_ops 2023-12-15T18:50:44+00:00 Yang Xiwen forbidden405@outlook.com 2023-12-15T18:28:52+00:00 d30618243990457d219ab81955c2738580d26cd2 Assign ccf_clk_ops to .ops of clk_ccf driver so that it can act as an clk provider. Also add "#clock-cells=<1>" to its device tree node. Add "i2c_root" to clk_test in the device tree and driver for testing. Get "i2c_root" clock in CCF unit tests and add tests for it. Signed-off-by: Yang Xiwen <forbidden405@outlook.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231111-enable_count-v3-2-08a821892fa9@outlook.com 
Assign ccf_clk_ops to .ops of clk_ccf driver so that it can act as an
clk provider. Also add "#clock-cells=<1>" to its device tree node.

Add "i2c_root" to clk_test in the device tree and driver for testing.

Get "i2c_root" clock in CCF unit tests and add tests for it.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231111-enable_count-v3-2-08a821892fa9@outlook.com
dm: test: clk: Add test for ccf clk_set_rate() 2023-12-15T17:32:00+00:00 Igor Prusov ivprusov@salutedevices.com 2023-12-05T23:23:34+00:00 9e0250321a0d7c7b17fcbac172dd3d3c000ee53a Add a simple test case which sets clock rate to its current value. Signed-off-by: Igor Prusov <ivprusov@salutedevices.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231205232334.2931-3-ivprusov@salutedevices.com 
Add a simple test case which sets clock rate to its current value.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231205232334.2931-3-ivprusov@salutedevices.com
clk: Check that composite clock's div has set_rate() 2023-12-15T17:32:00+00:00 Igor Prusov ivprusov@salutedevices.com 2023-12-05T23:23:33+00:00 54d7da77306257a03231b04e7f2f9393ad7b0e46 It's possible for composite clocks to have a divider that does not implement set_rate() operation. For example, sandbox_clk_composite() registers composite clock with a divider that only has get_rate(). Currently clk_composite_set_rate() only checks thate rate_ops are present, so for sandbox it will cause NULL dereference during clk_set_rate(). This patch adds rate_ops->set_rate check tp clk_composite_set_rate(). Signed-off-by: Igor Prusov <ivprusov@salutedevices.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231205232334.2931-2-ivprusov@salutedevices.com 
It's possible for composite clocks to have a divider that does not
implement set_rate() operation. For example, sandbox_clk_composite()
registers composite clock with a divider that only has get_rate().
Currently clk_composite_set_rate() only checks thate rate_ops are
present, so for sandbox it will cause NULL dereference during
clk_set_rate().

This patch adds rate_ops->set_rate check tp clk_composite_set_rate().

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231205232334.2931-2-ivprusov@salutedevices.com
clk: get correct ops for clk_enable() and clk_disable() 2023-12-15T17:31:47+00:00 Yang Xiwen forbidden405@outlook.com 2023-11-18T22:10:06+00:00 3fb2d3d6acbaad50d2e638f6abb4e9d7a511c462 assign clk_dev_ops(clkp->dev) to ops to ensure correct clk operations are called on clocks. This fixes the incorrect enable_count issue as described in [1]. [1]: https://lore.kernel.org/all/SEZPR06MB695927A6DEEEF8489A06897396A7A@SEZPR06MB6959.apcprd06.prod.outlook.com/ Signed-off-by: Yang Xiwen <forbidden405@outlook.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231111-enable_count-v2-2-20e3728600b5@outlook.com 
assign clk_dev_ops(clkp->dev) to ops to ensure correct clk operations
are called on clocks.

This fixes the incorrect enable_count issue as described in [1].

[1]: https://lore.kernel.org/all/SEZPR06MB695927A6DEEEF8489A06897396A7A@SEZPR06MB6959.apcprd06.prod.outlook.com/

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231111-enable_count-v2-2-20e3728600b5@outlook.com
clk: check parent_name in clk_register to avoid confusing log_error() output 2023-12-15T17:31:15+00:00 Yang Xiwen forbidden405@outlook.com 2023-11-10T19:19:52+00:00 09844d0de5550e7f91246031220074a80b5a821a For some gate clocks and fixed clocks without a parent, calling clk_register will print an useless error message indicating that parent is missing. Fix that by gaurding log_xxx() with an if-statement. Signed-off-by: Yang Xiwen <forbidden405@outlook.com> Suggested-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20230807-clk-fix-v2-1-0b688e21fb4e@outlook.com 
For some gate clocks and fixed clocks without a parent, calling
clk_register will print an useless error message indicating that parent
is missing. Fix that by gaurding log_xxx() with an if-statement.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Suggested-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20230807-clk-fix-v2-1-0b688e21fb4e@outlook.com
Merge tag 'u-boot-imx-20231214' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx 2023-12-15T13:22:31+00:00 Tom Rini trini@konsulko.com 2023-12-15T13:22:20+00:00 3ac22891cfc0dc6d8eec25d2b0fbdd2eb8f3d3ed - Fix for i.MX8M Plus eDM SBC DDR timings with inline ECC - Switch to FPWM mode on Data Modul i.MX8M Plus eDM SBC so that DRAM EDAC detects more correctable errors - Fix for imx8mp-venice board DDR initialization 
- Fix for i.MX8M Plus eDM SBC DDR timings with inline ECC
- Switch to FPWM mode on Data Modul i.MX8M Plus eDM SBC so that DRAM
  EDAC detects more correctable errors
- Fix for imx8mp-venice board DDR initialization
imx8mp-venice: update DRAM config for 2000MHz 2023-12-14T18:34:12+00:00 Tim Harvey tharvey@gateworks.com 2023-12-14T16:22:27+00:00 4f7122ca1580602399afc30f94f4b37f79e4d662 The imx8mp venice boards can support 2000Mhz DRAM. Update the DRAM config to support this. Signed-off-by: Tim Harvey <tharvey@gateworks.com> 
The imx8mp venice boards can support 2000Mhz DRAM.
Update the DRAM config to support this.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>