u-boot.git, branch v2024.10 Unnamed repository; edit this file 'description' to name the repository. Prepare v2024.10 2024-10-07T14:54:35+00:00 Tom Rini trini@konsulko.com 2024-10-07T14:54:35+00:00 f919c3a889f0ec7d63a48b5d0ed064386b0980bd Signed-off-by: Tom Rini <trini@konsulko.com> 
Signed-off-by: Tom Rini <trini@konsulko.com>
clk: renesas: rcar-gen3: Fix SSCG caching replacement with MDSEL/PE caching 2024-10-05T19:15:22+00:00 Marek Vasut marek.vasut+renesas@mailbox.org 2024-10-05T17:45:02+00:00 dd4d130c8eb8fe3deb89dc6ec22bce4c641062b4 The SSCG is active with MDSEL[12] is not set. Previous commit 99c7e031196d ("clk: renesas: rcar-gen3: Replace SSCG caching with MDSEL/PE caching") inverted the conditional assignment of priv->sscg = !(cpg_mode & BIT(12)) during conversion from (priv->sscg ? 16 : 0) to priv->cpg_mode & BIT(core->offset) ? 16 : 0; Invert the assignment back to the correct state. This fixes R8A77980, R8A77990, R8A77995 and R8A774C0. Fixes: 99c7e031196d ("clk: renesas: rcar-gen3: Replace SSCG caching with MDSEL/PE caching") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> 
The SSCG is active with MDSEL[12] is not set. Previous commit
99c7e031196d ("clk: renesas: rcar-gen3: Replace SSCG caching
with MDSEL/PE caching") inverted the conditional assignment
of priv->sscg = !(cpg_mode & BIT(12)) during conversion from
(priv->sscg ? 16 : 0) to priv->cpg_mode & BIT(core->offset) ? 16 : 0;
Invert the assignment back to the correct state.

This fixes R8A77980, R8A77990, R8A77995 and R8A774C0.

Fixes: 99c7e031196d ("clk: renesas: rcar-gen3: Replace SSCG caching with MDSEL/PE caching")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Update directories for new name of TF-A directories 2024-10-04T15:00:47+00:00 Peter Robinson pbrobinson@gmail.com 2024-10-04T10:40:44+00:00 af69289d61876d8e62449ee2da2dc6683bcb8198 The TF-A URL was updated, as a result the name of the directory changed as part of the new git URL and not all the referenced directories were updated. Fixes: 0ec0207fe07 ("Update the ARM trusted firmware git URL") Signed-off-by: Peter Robinson <pbrobinson@gmail.com> 
The TF-A URL was updated, as a result the name of the
directory changed as part of the new git URL and not
all the referenced directories were updated.

Fixes: 0ec0207fe07 ("Update the ARM trusted firmware git URL")
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
boot: android: Fix ramdisk loading for v2 header 2024-10-03T17:30:25+00:00 Mattijs Korpershoek mkorpershoek@baylibre.com 2024-10-03T12:42:39+00:00 1b1ffda4207125c5bc618d4b0ca718b52cf7a4c0 Before commit da3447d09fa0 ("android: Fix ramdisk loading for bootimage v3+"), the ramdisk was loaded from img_data.ramdisk_ptr, ignoring offset provided via mkbootimg. commit da3447d09fa0 ("android: Fix ramdisk loading for bootimage v3+") rightfully fixes this by switching to use img_data.ramdisk_addr instead. However, it does not copy the ramdisk content to img_data.ramdisk_addr in case we use boot image v2. Because of this, we can no longer boot Android on Khadas vim3 board: [ 3.940361] RAMDISK: Couldn't find valid RAM disk image starting at 0. Add the missing memcpy() to fix the issue. Fixes: da3447d09fa0 ("android: Fix ramdisk loading for bootimage v3+") Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> 
Before
commit da3447d09fa0 ("android: Fix ramdisk loading for bootimage v3+"),
the ramdisk was loaded from img_data.ramdisk_ptr, ignoring offset
provided via mkbootimg.

commit da3447d09fa0 ("android: Fix ramdisk loading for bootimage v3+")
rightfully fixes this by switching to use img_data.ramdisk_addr instead.

However, it does not copy the ramdisk content to img_data.ramdisk_addr
in case we use boot image v2.

Because of this, we can no longer boot Android on Khadas vim3 board:

[    3.940361] RAMDISK: Couldn't find valid RAM disk image starting at 0.

Add the missing memcpy() to fix the issue.

Fixes: da3447d09fa0 ("android: Fix ramdisk loading for bootimage v3+")
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Update the ARM trusted firmware git URL 2024-10-03T15:08:29+00:00 Peter Robinson pbrobinson@gmail.com 2024-10-02T18:08:49+00:00 0ec0207fe07356bddb10db717e21c261bebfb989 The primary upstream URL for tf-a has moved, in some cases things like tags are not always pushed to the old URL so update the URLs to the primary upstream project URL. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> 
The primary upstream URL for tf-a has moved, in some cases
things like tags are not always pushed to the old URL so
update the URLs to the primary upstream project URL.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Prepare v2024.10-rc6 2024-09-30T22:47:28+00:00 Tom Rini trini@konsulko.com 2024-09-30T22:47:28+00:00 9cfe0cab3bf135a505e1e163ca442a4e4064d58e Signed-off-by: Tom Rini <trini@konsulko.com> 
Signed-off-by: Tom Rini <trini@konsulko.com>
Merge tag 'u-boot-dfu-20240930' of https://source.denx.de/u-boot/custodians/u-boot-dfu 2024-09-30T16:38:05+00:00 Tom Rini trini@konsulko.com 2024-09-30T16:38:05+00:00 bfb87a336be34ee1c1f315fde8923b2cba8d3a3b u-boot-dfu-20240930 - Fix Kconfig dependencies for DFU_OVER_USB 
u-boot-dfu-20240930

- Fix Kconfig dependencies for DFU_OVER_USB
usb: gadget: cdns3: Fix missing cache operations for non-zero Endpoints 2024-09-30T15:08:07+00:00 Siddharth Vadapalli s-vadapalli@ti.com 2024-09-30T09:34:07+00:00 17da9795c115dcfac49338ea044fa9413f5d0763 Transfer initiation and completion for the non-zero Endpoints are handled by cdns3_ep_run_transfer() and cdns3_transfer_completed() respectively. Failing to flush the cache associated with the TRB Pool within cdns3_ep_run_transfer() results in the transfers never being initiated. Similarly, failing to invalidate the cache associated with the TRB pool within cdns3_transfer_completed() results in the transfers never being completed. Fix this. Fixes: 7e91f6ccdc84 ("usb: Add Cadence USB3 host and gadget driver") Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Marek Vasut <marex@denx.de> 
Transfer initiation and completion for the non-zero Endpoints are
handled by cdns3_ep_run_transfer() and cdns3_transfer_completed()
respectively.

Failing to flush the cache associated with the TRB Pool within
cdns3_ep_run_transfer() results in the transfers never being initiated.
Similarly, failing to invalidate the cache associated with the TRB pool
within cdns3_transfer_completed() results in the transfers never being
completed.

Fix this.

Fixes: 7e91f6ccdc84 ("usb: Add Cadence USB3 host and gadget driver")
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Merge tag 'u-boot-rockchip-20240930' of https://source.denx.de/u-boot/custodians/u-boot-rockchip 2024-09-30T13:43:11+00:00 Tom Rini trini@konsulko.com 2024-09-30T13:43:11+00:00 37c1cb8c88c38ba699d7cabf536bdd980c7f5475 CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/22470 - rk8xx pmic fix 
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/22470

- rk8xx pmic fix
regulator: rk8xx: Use buck variable consistently 2024-09-27T10:20:49+00:00 Jonas Karlman jonas@kwiboo.se 2024-09-17T20:59:18+00:00 7210de40a25a222043aed1348ec667a5ccc204b6 The buck variable is zero based, i.e. buck=0 match BUCK1 in datasheet. Remove any buck + 1 calculation to be more consistent in usage of the buck variable across the different RK8xx variants in the driver. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
The buck variable is zero based, i.e. buck=0 match BUCK1 in datasheet.

Remove any buck + 1 calculation to be more consistent in usage of the
buck variable across the different RK8xx variants in the driver.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>