u-boot.git, branch v2024.10-rc6 Unnamed repository; edit this file 'description' to name the repository. Prepare v2024.10-rc6 2024-09-30T22:47:28+00:00 Tom Rini trini@konsulko.com 2024-09-30T22:47:28+00:00 9cfe0cab3bf135a505e1e163ca442a4e4064d58e Signed-off-by: Tom Rini <trini@konsulko.com> 
Signed-off-by: Tom Rini <trini@konsulko.com>
Merge tag 'u-boot-dfu-20240930' of https://source.denx.de/u-boot/custodians/u-boot-dfu 2024-09-30T16:38:05+00:00 Tom Rini trini@konsulko.com 2024-09-30T16:38:05+00:00 bfb87a336be34ee1c1f315fde8923b2cba8d3a3b u-boot-dfu-20240930 - Fix Kconfig dependencies for DFU_OVER_USB 
u-boot-dfu-20240930

- Fix Kconfig dependencies for DFU_OVER_USB
usb: gadget: cdns3: Fix missing cache operations for non-zero Endpoints 2024-09-30T15:08:07+00:00 Siddharth Vadapalli s-vadapalli@ti.com 2024-09-30T09:34:07+00:00 17da9795c115dcfac49338ea044fa9413f5d0763 Transfer initiation and completion for the non-zero Endpoints are handled by cdns3_ep_run_transfer() and cdns3_transfer_completed() respectively. Failing to flush the cache associated with the TRB Pool within cdns3_ep_run_transfer() results in the transfers never being initiated. Similarly, failing to invalidate the cache associated with the TRB pool within cdns3_transfer_completed() results in the transfers never being completed. Fix this. Fixes: 7e91f6ccdc84 ("usb: Add Cadence USB3 host and gadget driver") Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Marek Vasut <marex@denx.de> 
Transfer initiation and completion for the non-zero Endpoints are
handled by cdns3_ep_run_transfer() and cdns3_transfer_completed()
respectively.

Failing to flush the cache associated with the TRB Pool within
cdns3_ep_run_transfer() results in the transfers never being initiated.
Similarly, failing to invalidate the cache associated with the TRB pool
within cdns3_transfer_completed() results in the transfers never being
completed.

Fix this.

Fixes: 7e91f6ccdc84 ("usb: Add Cadence USB3 host and gadget driver")
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Merge tag 'u-boot-rockchip-20240930' of https://source.denx.de/u-boot/custodians/u-boot-rockchip 2024-09-30T13:43:11+00:00 Tom Rini trini@konsulko.com 2024-09-30T13:43:11+00:00 37c1cb8c88c38ba699d7cabf536bdd980c7f5475 CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/22470 - rk8xx pmic fix 
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/22470

- rk8xx pmic fix
regulator: rk8xx: Use buck variable consistently 2024-09-27T10:20:49+00:00 Jonas Karlman jonas@kwiboo.se 2024-09-17T20:59:18+00:00 7210de40a25a222043aed1348ec667a5ccc204b6 The buck variable is zero based, i.e. buck=0 match BUCK1 in datasheet. Remove any buck + 1 calculation to be more consistent in usage of the buck variable across the different RK8xx variants in the driver. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
The buck variable is zero based, i.e. buck=0 match BUCK1 in datasheet.

Remove any buck + 1 calculation to be more consistent in usage of the
buck variable across the different RK8xx variants in the driver.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
regulator: rk8xx: Fix buck get and set enabled state on RK806 2024-09-27T10:20:49+00:00 Jonas Karlman jonas@kwiboo.se 2024-09-17T20:59:17+00:00 596465138175cd7e4171cad1e68a2ef7c5c002bc Wrong POWER_EN reg is used to get and set enabled state for the RK806 buck 4 and 8 regulators, also wrong POWER_SLP_EN0 bit is used for suspend state for the RK806 buck 1-8 regulators. Fix this by not adding one to the zero based buck variable. Fixes: f172575d92cd ("power: rk8xx: add support for RK806") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> 
Wrong POWER_EN reg is used to get and set enabled state for the RK806
buck 4 and 8 regulators, also wrong POWER_SLP_EN0 bit is used for
suspend state for the RK806 buck 1-8 regulators.

Fix this by not adding one to the zero based buck variable.

Fixes: f172575d92cd ("power: rk8xx: add support for RK806")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Merge tag 'u-boot-stm32-20240926' of https://source.denx.de/u-boot/custodians/u-boot-stm 2024-09-26T17:20:26+00:00 Tom Rini trini@konsulko.com 2024-09-26T17:20:26+00:00 56b47b8b6a09c777e74fe6c52512c832691169aa - Fixes for STM32MP15x basic boot 
- Fixes for STM32MP15x basic boot
arm: imx: Enable always-on regulators using board specific workaround on DHCOM SoM 2024-09-25T18:21:47+00:00 Marek Vasut marex@denx.de 2024-09-24T22:08:23+00:00 c0435ed04bd9fb264cb6284399556b11825e96e8 U-Boot is currently unable to automatically enable regulators which contain DT property regulator-always-on or regulator-boot-on. There is an ongoing work to add this functionality to regulator core code, but until the proper solution lands, add this awful workaround code to force these regulators on. This is specifically needed to assure the VIO regulator used to supply ethernet magnetics is enabled. Signed-off-by: Marek Vasut <marex@denx.de> 
U-Boot is currently unable to automatically enable regulators which
contain DT property regulator-always-on or regulator-boot-on. There
is an ongoing work to add this functionality to regulator core code,
but until the proper solution lands, add this awful workaround code
to force these regulators on. This is specifically needed to assure
the VIO regulator used to supply ethernet magnetics is enabled.

Signed-off-by: Marek Vasut <marex@denx.de>
ARM: stm32: Fix secure_waitbits() mask check 2024-09-25T17:40:46+00:00 Marek Vasut marex@denx.de 2024-07-08T11:43:23+00:00 b0348a97de9e01fe2165520cfc1bc9ed5594f9ab Do not apply bitwise AND to register value and expected value, only apply bitwise AND to register value and mask, and only then compare the result with expected value that the function polls for. Fixes: b49105320a5b ("stm32mp: psci: Implement PSCI system suspend and DRAM SSR") Signed-off-by: Marek Vasut <marex@denx.de> 
Do not apply bitwise AND to register value and expected value, only
apply bitwise AND to register value and mask, and only then compare
the result with expected value that the function polls for.

Fixes: b49105320a5b ("stm32mp: psci: Implement PSCI system suspend and DRAM SSR")
Signed-off-by: Marek Vasut <marex@denx.de>
ARM: stm32: Fix TAMP_SMCR BKP..PROT fields on STM32MP15xx 2024-09-25T17:40:27+00:00 Marek Vasut marex@denx.de 2024-06-18T22:57:25+00:00 6b84683acc86f94c7dc15d621b5bca533bf8a01a Update the TAMP_SMCR BKP..PROT fields to put first 10 registers into protection zone 1 and next 5 into zone 2. This fixes use of boot counter which is often in zone 3 and has to be updated from Linux, which runs in NS. Fixes: 73f7fc944cf6 ("ARM: stm32: Initialize TAMP_SMCR BKP..PROT fields on STM32MP15xx") Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> 
Update the TAMP_SMCR BKP..PROT fields to put first 10 registers
into protection zone 1 and next 5 into zone 2. This fixes use of
boot counter which is often in zone 3 and has to be updated from
Linux, which runs in NS.

Fixes: 73f7fc944cf6 ("ARM: stm32: Initialize TAMP_SMCR BKP..PROT fields on STM32MP15xx")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>