u-boot.git/Documentation/devicetree/bindings, branch v2019.07-rc2Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/u-boot.git/atom/Documentation/devicetree/bindings?h=v2019.07-rc22019-05-05T12:48:50ZDocumentation: dts: Add pl310 cache controller dts documentation2019-05-05T12:48:50ZDinh Nguyendinguyen@kernel.org2019-04-23T21:55:01Zurn:sha1:5c66e1e88426d47782324eef0d9d6fc11941c79f
Linux commit 8ecd7f5970c5 ("ARM: 8483/1: Documentation: l2c: Rename
l2cc to l2c2x0")
Linux docs:
Documentation/devicetree/bindings/arm/l2c2x0.txt
Copied from Linux kernel v5.0.
"The documentation in the l2cc.txt is specific to the L2 cache
controllers L2C210/L2C220/L2C310 (also known as PL210/PL220/PL310
and variants) and not generic as the file name implies. It's not
valid for integrated L2 controllers as found in e.g.
Cortex-A15/A7/A57/A53."
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
fdtdec: Implement fdtdec_add_reserved_memory()2019-04-12T02:10:50ZThierry Redingtreding@nvidia.com2019-03-21T18:10:02Zurn:sha1:c9222a08b3f7d1b0f7a72301db99dc54e09a3d10
This function can be used to add subnodes in the /reserved-memory node.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
misc: Add IHS FPGA driver2018-11-14T17:16:27ZMario Sixmario.six@gdsys.cc2018-10-04T07:00:55Zurn:sha1:ab88bd2b6a160310953a230d4a4c334ea6a65d3b
Add a driver for gdsys IHS (Integrated Hardware Systems) FPGAs, which
supports initialization of the FPGA, as well as information gathering.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
misc: Add gdsys_soc driver2018-11-14T17:16:27ZMario Sixmario.six@gdsys.cc2018-10-04T07:00:54Zurn:sha1:c0a2b086b22b4af3253e4e22d5a9d1e809fd1352
This patch adds a driver for the bus associated with a IHS FPGA.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
board: Add gazerbeam driver2018-09-29T17:49:35ZMario Sixmario.six@gdsys.cc2018-07-31T09:44:12Zurn:sha1:6238ae4d60476dd7535b781ef3f255f676851283
Add a board driver for the upcoming gdsys Gazerbeam board.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
misc: Add MPC83xx serdes driver2018-09-18T14:12:21ZMario Sixmario.six@gdsys.cc2018-08-06T08:23:46Zurn:sha1:d2166319df17286b2a3e2a1a7ce89f01e4f8bac9
Add a driver to configure the SerDes (Serializer/Deserializer) lanes on
the MPC83xx architecture.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
cpu: Add MPC83xx CPU driver2018-09-18T14:12:21ZMario Sixmario.six@gdsys.cc2018-08-06T08:23:45Zurn:sha1:19fbdca47b3d847824ada3ab2ed575019c88516e
Add a CPU driver for the MPC83xx architecture.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
timer: Add MPC83xx timer driver2018-09-18T06:01:18ZMario Sixmario.six@gdsys.cc2018-08-06T08:23:38Zurn:sha1:2c21749d7118b66b98cbab3f6301576726e06525
Add a timer driver for the MPC83xx architecture.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
clk: Add MPC83xx clock driver2018-09-18T06:01:18ZMario Sixmario.six@gdsys.cc2018-08-06T08:23:36Zurn:sha1:07d538d2814fa03be243c71879372f4263030b78
Add a clock driver for the MPC83xx architecture.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
ram: Add driver for MPC83xx2018-09-18T06:01:18ZMario Sixmario.six@gdsys.cc2018-08-06T08:23:30Zurn:sha1:e40615565d68465284b3c6a5fc4147f662824a88
Add a RAM driver for the MPC83xx architecture.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>