u-boot.git/README, branch v2011.03

mv: seperate kirkwood and armada from common setting

2011-02-21T07:30:55+00:00

Since there are lots of difference between kirkwood and armada series,
it is better to seperate them but still keep the most common file
shared by all marvell platform in the mv-common configure file.

This patch move the kirkwood only driver definitoin in mv-common to
the /config.h.

This patch is tested with compilation for armada100 and guruplug.

Signed-off-by: Lei Wen

spi: add support SuperH SPI module

2011-02-02T07:38:41+00:00

SH7757 has SPI module. This patch supports it.

Signed-off-by: Yoshihiro Shimoda 
Signed-off-by: Nobuhiro Iwamatsu

net: sh_eth: add cache handling

2011-02-02T07:38:41+00:00

Some CPU needs cache handling. So this patch add the config of
CONFIG_SH_ETHER_CACHE_WRITEBACK, and it calls wback function.

Signed-off-by: Yoshihiro Shimoda 
Signed-off-by: Nobuhiro Iwamatsu

README: add description of sh_eth driver

2011-02-02T07:38:41+00:00

Signed-off-by: Yoshihiro Shimoda 
Signed-off-by: Nobuhiro Iwamatsu

Fix defines needed to enable command sha1sum

2011-01-19T08:39:10+00:00

Documented is CONFIG_CMD_SHA1, through confusion in the source
CONFIG_CMD_SHA1 and CONFIG_CMD_SHA1SUM has to be used to enable
sha1sum.

Fix both, the documentation and the source, so that only
CONFIG_CMD_SHA1SUM is needed to enable the command sha1sum.

Signed-off-by: Alexander Holler

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

2011-01-17T19:31:46+00:00

Merge branch 'master' of git://git.denx.de/u-boot-i2c

2011-01-17T19:11:40+00:00

powerpc/8xxx: Refactor SRIO initialization into common code

2011-01-14T07:32:21+00:00

Moved the SRIO init out of corenet_ds and into common code for
8xxx/QorIQ processors that have SRIO.  We mimic what we do with PCIe
controllers for SRIO.

We utilize the fact that SRIO is over serdes to determine if its
configured or not and thus can setup the LAWs needed for it dynamically.

We additionally update the device tree (to remove the SRIO nodes) if the
board doesn't have SRIO enabled.

Introduced the following standard defines for board config.h:

CONFIG_SYS_SRIO - Chip has SRIO or not
CONFIG_SRIO1 - Board has SRIO 1 port available
CONFIG_SRIO2 - Board has SRIO 2 port available

(where 'n' is the port #)
CONFIG_SYS_SRIOn_MEM_VIRT - virtual address in u-boot
CONFIG_SYS_SRIOn_MEM_PHYS - physical address (for law setup)
CONFIG_SYS_SRIOn_MEM_SIZE - size of window (for law setup)

[ These mimic what we have for PCI and PCIe controllers ]

Signed-off-by: Kumar Gala 
Acked-by: Wolfgang Denk

pca953x: support 16-pin devices

2011-01-10T06:53:00+00:00

This adds support for for the PCA9535/PCA9539 family of gpio devices which
have 16 output pins.

To let the driver know which devices are 16-pin it is necessary to define
CONFIG_SYS_I2C_PCA953X_WIDTH in your board config file. This is used to
create an array of {chip, ngpio} tuples that are used to determine the
width of a particular chip. For backwards compatibility it is assumed that
any chip not defined in CONFIG_SYS_I2C_PCA953X_WIDTH has 8 pins.

Acked-by: Peter Tyser 
Tested-by: Peter Tyser 
Signed-off-by: Chris Packham

ftgmac100: support of gigabit eth ftgmac100

2011-01-09T21:16:51+00:00

Add Faraday's ftgmac100 (gigabit ethernet)
MAC controller's driver.

Signed-off-by: Macpaul Lin