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<title>u-boot.git/README, branch v2014.04-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/README?h=v2014.04-rc2</id>
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<updated>2014-03-04T17:15:30Z</updated>
<entry>
<title>Add 64-bit data support for memory commands</title>
<updated>2014-03-04T17:15:30Z</updated>
<author>
<name>York Sun</name>
<email>yorksun@freescale.com</email>
</author>
<published>2014-02-27T01:03:19Z</published>
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<id>urn:sha1:4d1fd7f1ae6cf4e6e4e1cad975f1dcdea62b6d83</id>
<content type='text'>
Add 64-bit data for memory commands, such as md, mw, mm, cmp. The new
size ".q " is introduced.

For 64-bit architecture, 64-bit data is enabled by default, by detecting
compiler __LP64__. It is optional for other architectures.

Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-arm</title>
<updated>2014-02-26T21:49:58Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2014-02-26T21:49:58Z</published>
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<id>urn:sha1:eeb72e67619b98d2502fe634a3a5d9953de92ad0</id>
<content type='text'>
Conflicts:
	arch/arm/cpu/armv7/config.mk
	board/ti/am43xx/mux.c
	include/configs/am43xx_evm.h

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>arm: Switch to -mno-unaligned-access when supported by the compiler</title>
<updated>2014-02-26T20:19:32Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2014-02-25T15:27:01Z</published>
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<id>urn:sha1:1551df35f296f0a8df32f4f2054254f46e8be252</id>
<content type='text'>
When we tell the compiler to optimize for ARMv7 (and ARMv6 for that
matter) it assumes a default of SCTRL.A being cleared and unaligned
accesses being allowed and fast at the hardware level.  We set this bit
and must pass along -mno-unaligned-access so that the compiler will
still breakdown accesses and not trigger a data abort.

To better help understand the requirements of the project with respect
to unaligned memory access, the
Documentation/unaligned-memory-access.txt file has been added as
doc/README.unaligned-memory-access.txt and is taken from the v3.14-rc1
tag of the kernel.

Cc: Albert ARIBAUD &lt;albert.u.boot@aribaud.net&gt;
Cc: Mans Rullgard &lt;mans@mansr.com&gt;
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>arm: remove unneeded symbol offsets and _TEXT_BASE</title>
<updated>2014-02-26T20:18:12Z</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2014-02-22T16:53:43Z</published>
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<id>urn:sha1:b60eff31f3bd71a6f14b6c6efc8ad5fb3705de6d</id>
<content type='text'>
Remove the last uses of symbol offsets in ARM U-Boot.
Remove some needless uses of _TEXT_BASE.
Remove all _TEXT_BASE definitions.

Signed-off-by: Albert ARIBAUD &lt;albert.u.boot@aribaud.net&gt;
</content>
</entry>
<entry>
<title>driver/ddr: Add 256 byte interleaving support</title>
<updated>2014-02-21T16:06:13Z</updated>
<author>
<name>York Sun</name>
<email>yorksun@freescale.com</email>
</author>
<published>2014-02-10T21:59:44Z</published>
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<id>urn:sha1:6b1e1254f326940e5b65c7029f71b964bdf28fd4</id>
<content type='text'>
Freescale LayerScape SoCs support controller interleaving on 256 byte size.
This interleaving is mandoratory.

Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>Driver/ddr: Add support of different DDR base address</title>
<updated>2014-02-21T16:06:13Z</updated>
<author>
<name>York Sun</name>
<email>yorksun@freescale.com</email>
</author>
<published>2014-02-10T21:59:43Z</published>
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<id>urn:sha1:6b9e309a8a7f0f33252288f0ed8794a83a488301</id>
<content type='text'>
DDR base address has been the same from the view of core and DDR
controllers. This has changed for Freescale ARM-based SoCs. Controllers
setup DDR memory in a contiguous space and cores view it at separated
locations.

Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>driver/ddr: Change Freescale ARM DDR driver to support both big and little endian</title>
<updated>2014-02-21T16:06:13Z</updated>
<author>
<name>York Sun</name>
<email>yorksun@freescale.com</email>
</author>
<published>2014-02-10T21:59:42Z</published>
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<id>urn:sha1:4e5b1bd0dff216b00d7ce9a5201dfe173805a06c</id>
<content type='text'>
Initially it was believed the DDR controller on Freescale ARM would have
big endian. But some platform will have little endian.

Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>fs/fdos: Remove</title>
<updated>2014-02-21T13:42:47Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2014-02-21T13:42:02Z</published>
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<id>urn:sha1:1530f6f51ada57a9dd24f07d0f0955a8bf84c7b8</id>
<content type='text'>
We have an unused FAT implementation in fs/fdos, remove.

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-arm</title>
<updated>2014-02-20T17:18:59Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2014-02-20T17:18:59Z</published>
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<content type='text'>
</content>
</entry>
<entry>
<title>Merge branch 'u-boot/master' into 'u-boot-arm/master'</title>
<updated>2014-02-20T12:16:05Z</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2014-02-20T12:16:05Z</published>
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<id>urn:sha1:3e11350255d9c5d4bd03c2a65769da84c05d3294</id>
<content type='text'>
Conflicts:
	Makefile
	drivers/net/npe/Makefile

These two conflicts arise from commit 0b2d3f20
("ARM: NET: Remove the IXP NPE ethernet driver") and are
resolved by deleting the drivers/net/npe/Makefile file
and removing the CONFIG_IXP4XX_NPE line from Makefile.
</content>
</entry>
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