<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/README, branch v2015.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>arndale: Apply Cortex-A15 errata #773022 and #774769</title>
<updated>2015-10-11T21:12:11+00:00</updated>
<author>
<name>Ian Campbell</name>
<email>Ian.Campbell@citrix.com</email>
</author>
<published>2015-09-29T09:27:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e392b923ed6d6acff08b0a7aa5f457fff80fb0de'/>
<id>e392b923ed6d6acff08b0a7aa5f457fff80fb0de</id>
<content type='text'>
We run 4 Arndale boards in our automated test framework, they have
been running quite happily for quite some time using a Debian Wheezy
userspace.

However when upgrading to a Debian Jessie we started seeing frequent
segmentation faults from gcc when building the kernel, to the extent
that it is unable to successfully build the kernel twice in a row, and
often fails on the first attempt.

Searching around I found https://bugs.launchpad.net/arndale/+bug/1081417
which pointed towards http://www.spinics.net/lists/kvm-arm/msg03723.html
and CPU Errata 773022 and 774769.

This errata needs to be applied to all processors in an SMP system,
meaning that the usual strategy of applying them in
arch/arm/cpu/armv7/start.S is not appropriate (since that applies to
the boot processor only). Instead we apply these errata in the secure
monitor which is code that is traversed by all processors as they are
brought up.

The net affect on Arndale is that ACTLR changes from 0x40 to
0x2000042. I ran 17 kernel compile iterations overnight with no
segfaults.

Runtime testing was done on our v2014.10 based branch and forward
ported (with only minimal and trivial contextual conflicts) to current
master, where it has been build tested only.

I suppose in theory these errata apply to any Exynos5250 based boards,
but Arndale is the only one I have access to and I have therefore
chosen to be conservative and only apply it there.

Also, reorder CONFIG_ARM_ERRATA_794072 in README to make the list
numerically sorted.

Signed-off-by: Ian Campbell &lt;ian.campbell@citrix.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We run 4 Arndale boards in our automated test framework, they have
been running quite happily for quite some time using a Debian Wheezy
userspace.

However when upgrading to a Debian Jessie we started seeing frequent
segmentation faults from gcc when building the kernel, to the extent
that it is unable to successfully build the kernel twice in a row, and
often fails on the first attempt.

Searching around I found https://bugs.launchpad.net/arndale/+bug/1081417
which pointed towards http://www.spinics.net/lists/kvm-arm/msg03723.html
and CPU Errata 773022 and 774769.

This errata needs to be applied to all processors in an SMP system,
meaning that the usual strategy of applying them in
arch/arm/cpu/armv7/start.S is not appropriate (since that applies to
the boot processor only). Instead we apply these errata in the secure
monitor which is code that is traversed by all processors as they are
brought up.

The net affect on Arndale is that ACTLR changes from 0x40 to
0x2000042. I ran 17 kernel compile iterations overnight with no
segfaults.

Runtime testing was done on our v2014.10 based branch and forward
ported (with only minimal and trivial contextual conflicts) to current
master, where it has been build tested only.

I suppose in theory these errata apply to any Exynos5250 based boards,
but Arndale is the only one I have access to and I have therefore
chosen to be conservative and only apply it there.

Also, reorder CONFIG_ARM_ERRATA_794072 in README to make the list
numerically sorted.

Signed-off-by: Ian Campbell &lt;ian.campbell@citrix.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>I2C: mxc_i2c: make I2C1 and I2C2 optional</title>
<updated>2015-10-02T08:42:31+00:00</updated>
<author>
<name>Albert ARIBAUD \\(3ADEV\\)</name>
<email>albert.aribaud@3adev.fr</email>
</author>
<published>2015-09-21T20:43:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=03544c6640e8a969f8409eac637f4780e1eabb1d'/>
<id>03544c6640e8a969f8409eac637f4780e1eabb1d</id>
<content type='text'>
The driver assumed that I2C1 and I2C2 were always enabled,
and if they were not, then an asynchronous abort was (silently)
raised, to be caught much later on in the Linux kernel.

Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4
are.

To make the change binary-invariant, declare I2C1 and I2C2 in
every include/configs/ file which defines CONFIG_SYS_I2C_MXC.

Also, while updating README about CONFIG_SYS_I2C_MXC_I2C1 and
CONFIG_SYS_I2C_MXC_I2C2, add missing descriptions for I2C4 speed
(CONFIG_SYS_MXC_I2C4_SPEED) and slave (CONFIG_SYS_MXC_I2C4_SLAVE)
config options.

Signed-off-by: Albert ARIBAUD (3ADEV) &lt;albert.aribaud@3adev.fr&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The driver assumed that I2C1 and I2C2 were always enabled,
and if they were not, then an asynchronous abort was (silently)
raised, to be caught much later on in the Linux kernel.

Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4
are.

To make the change binary-invariant, declare I2C1 and I2C2 in
every include/configs/ file which defines CONFIG_SYS_I2C_MXC.

Also, while updating README about CONFIG_SYS_I2C_MXC_I2C1 and
CONFIG_SYS_I2C_MXC_I2C2, add missing descriptions for I2C4 speed
(CONFIG_SYS_MXC_I2C4_SPEED) and slave (CONFIG_SYS_MXC_I2C4_SLAVE)
config options.

Signed-off-by: Albert ARIBAUD (3ADEV) &lt;albert.aribaud@3adev.fr&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: Remove unused ST-Ericsson u8500 arch</title>
<updated>2015-09-15T19:05:21+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2015-09-14T07:17:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=68282f55b8465660af105086ad327ecdd8f35c67'/>
<id>68282f55b8465660af105086ad327ecdd8f35c67</id>
<content type='text'>
This arch does not seem to be supported / used at all in the current
U-Boot mainline source tree any more. So lets remove the core u8500 code
and code that was only referenced by this platform.

Please note that this patch also removes these config options:

- CONFIG_PL011_SERIAL_RLCR
- CONFIG_PL011_SERIAL_FLUSH_ON_INIT

As they only seem to be referenced by u8500 based boards. Without any
such board in the current code, these config option don't make sense
any more. Lets remove them as well.

If someone still wants to use this platform, then please send patches
to re-enable support by adding at least one board that references this
code.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Cc: John Rigby &lt;john.rigby@linaro.org&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Cc: Heiko Schocher &lt;hs@denx.de&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Reviewed-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This arch does not seem to be supported / used at all in the current
U-Boot mainline source tree any more. So lets remove the core u8500 code
and code that was only referenced by this platform.

Please note that this patch also removes these config options:

- CONFIG_PL011_SERIAL_RLCR
- CONFIG_PL011_SERIAL_FLUSH_ON_INIT

As they only seem to be referenced by u8500 based boards. Without any
such board in the current code, these config option don't make sense
any more. Lets remove them as well.

If someone still wants to use this platform, then please send patches
to re-enable support by adding at least one board that references this
code.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Cc: John Rigby &lt;john.rigby@linaro.org&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Cc: Heiko Schocher &lt;hs@denx.de&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Reviewed-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tpm: Drop two unused options</title>
<updated>2015-08-31T13:57:27+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-08-23T00:31:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=afc84dec1c2721269c8eaad13a938fa18360dbc7'/>
<id>afc84dec1c2721269c8eaad13a938fa18360dbc7</id>
<content type='text'>
The address of the I2C TPM is now defined in the device tree so there is no
need for the CONFIG options.

Remove them from the README and board config to avoid confusion.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Christophe Ricard &lt;christophe-h.ricard@st.com&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The address of the I2C TPM is now defined in the device tree so there is no
need for the CONFIG options.

Remove them from the README and board config to avoid confusion.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Christophe Ricard &lt;christophe-h.ricard@st.com&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: e1000: Add Kconfig options</title>
<updated>2015-08-21T21:33:39+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-08-19T15:33:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c294ac5c16f5ad5107b051f4a0de46d04d8ce13b'/>
<id>c294ac5c16f5ad5107b051f4a0de46d04d8ce13b</id>
<content type='text'>
Add Kconfig options in preparation for moving boards to use Kconfig.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add Kconfig options in preparation for moving boards to use Kconfig.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: Introduce erratum workaround for 801819</title>
<updated>2015-08-13T00:47:49+00:00</updated>
<author>
<name>Nishanth Menon</name>
<email>nm@ti.com</email>
</author>
<published>2015-07-27T21:26:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a615d0be6a73fc48a22e5662608260fe9b9149ff'/>
<id>a615d0be6a73fc48a22e5662608260fe9b9149ff</id>
<content type='text'>
Add workaround for Cortex-A15 ARM erratum 801819 which says in summary
that "A livelock can occur in the L2 cache arbitration that might
prevent a snoop from completing. Under certain conditions this can
cause the system to deadlock. "

Recommended workaround is as follows:
Do both of the following:

1) Do not use the write-back no-allocate memory type.
2) Do not issue write-back cacheable stores at any time when the cache
is disabled (SCTLR.C=0) and the MMU is enabled (SCTLR.M=1). Because it
is implementation defined whether cacheable stores update the cache when
the cache is disabled it is not expected that any portable code will
execute cacheable stores when the cache is disabled.

For implementations of Cortex-A15 configured without the “L2 arbitration
register slice” option (typically one or two core systems), you must
also do the following:

3) Disable write-streaming in each CPU by setting ACTLR[28:25] = 0b1111

So, we provide an option to disable write streaming on OMAP5 and DRA7.
It is a rare condition to occur and may be enabled selectively based
on platform acceptance of risk.

Applies to: A15 revisions r2p0, r2p1, r2p2, r2p3 or r2p4 and REVIDR[3]
is set to 0.

Note: certain unicore SoCs *might* not have REVIDR[3] not set, but
might not meet the condition for the erratum to occur when they donot
have ACP (Accelerator Coherency Port) hooked to ACE (AXI Coherency
Extensions). Such SoCs will need the work around handled in the SoC
specific manner, since there is no ARM generic manner to detect such
configurations.

Based on ARM errata Document revision 18.0 (22 Nov 2013)

Suggested-by: Richard Woodruff &lt;r-woodruff2@ti.com&gt;
Suggested-by: Brad Griffis &lt;bgriffis@ti.com&gt;
Reviewed-by: Brad Griffis &lt;bgriffis@ti.com&gt;
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add workaround for Cortex-A15 ARM erratum 801819 which says in summary
that "A livelock can occur in the L2 cache arbitration that might
prevent a snoop from completing. Under certain conditions this can
cause the system to deadlock. "

Recommended workaround is as follows:
Do both of the following:

1) Do not use the write-back no-allocate memory type.
2) Do not issue write-back cacheable stores at any time when the cache
is disabled (SCTLR.C=0) and the MMU is enabled (SCTLR.M=1). Because it
is implementation defined whether cacheable stores update the cache when
the cache is disabled it is not expected that any portable code will
execute cacheable stores when the cache is disabled.

For implementations of Cortex-A15 configured without the “L2 arbitration
register slice” option (typically one or two core systems), you must
also do the following:

3) Disable write-streaming in each CPU by setting ACTLR[28:25] = 0b1111

So, we provide an option to disable write streaming on OMAP5 and DRA7.
It is a rare condition to occur and may be enabled selectively based
on platform acceptance of risk.

Applies to: A15 revisions r2p0, r2p1, r2p2, r2p3 or r2p4 and REVIDR[3]
is set to 0.

Note: certain unicore SoCs *might* not have REVIDR[3] not set, but
might not meet the condition for the erratum to occur when they donot
have ACP (Accelerator Coherency Port) hooked to ACE (AXI Coherency
Extensions). Such SoCs will need the work around handled in the SoC
specific manner, since there is no ARM generic manner to detect such
configurations.

Based on ARM errata Document revision 18.0 (22 Nov 2013)

Suggested-by: Richard Woodruff &lt;r-woodruff2@ti.com&gt;
Suggested-by: Brad Griffis &lt;bgriffis@ti.com&gt;
Reviewed-by: Brad Griffis &lt;bgriffis@ti.com&gt;
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Reproducible U-Boot build support, using SOURCE_DATE_EPOCH</title>
<updated>2015-07-27T19:03:14+00:00</updated>
<author>
<name>Paul Kocialkowski</name>
<email>contact@paulk.fr</email>
</author>
<published>2015-07-26T16:48:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f3f431a712729a1af94d01bd1bfde17a252ff02c'/>
<id>f3f431a712729a1af94d01bd1bfde17a252ff02c</id>
<content type='text'>
In order to achieve reproducible builds in U-Boot, timestamps that are defined
at build-time have to be somewhat eliminated. The SOURCE_DATE_EPOCH environment
variable allows setting a fixed value for those timestamps.

Simply by setting SOURCE_DATE_EPOCH to a fixed value, a number of targets can be
built reproducibly. This is the case for e.g. sunxi devices.

However, some other devices might need some more tweaks, especially regarding
the image generation tools.

Signed-off-by: Paul Kocialkowski &lt;contact@paulk.fr&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In order to achieve reproducible builds in U-Boot, timestamps that are defined
at build-time have to be somewhat eliminated. The SOURCE_DATE_EPOCH environment
variable allows setting a fixed value for those timestamps.

Simply by setting SOURCE_DATE_EPOCH to a fixed value, a number of targets can be
built reproducibly. This is the case for e.g. sunxi devices.

However, some other devices might need some more tweaks, especially regarding
the image generation tools.

Signed-off-by: Paul Kocialkowski &lt;contact@paulk.fr&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>usb: CONFIG_USB_FASTBOOT prefix replacement for consistency</title>
<updated>2015-07-22T06:57:54+00:00</updated>
<author>
<name>Paul Kocialkowski</name>
<email>contact@paulk.fr</email>
</author>
<published>2015-07-20T10:38:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a588d99ac19fe09818c6c874bec273012699d82a'/>
<id>a588d99ac19fe09818c6c874bec273012699d82a</id>
<content type='text'>
FASTBOOT is defined both by CONFIG_USB_FUNCTION_FASTBOOT AND CONFIG_CMD_FASTBOOT, so it doesn't
make much sense to have a CONFIG_USB_FASTBOOT prefix for fastboot-specific options, especially
given that other config options for fastboot use the CONFIG_FASTBOOT prefix.

This replaces the CONFIG_USB_FASTBOOT prefix with CONFIG_FASTBOOT, for consistency.

Signed-off-by: Paul Kocialkowski &lt;contact@paulk.fr&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
FASTBOOT is defined both by CONFIG_USB_FUNCTION_FASTBOOT AND CONFIG_CMD_FASTBOOT, so it doesn't
make much sense to have a CONFIG_USB_FASTBOOT prefix for fastboot-specific options, especially
given that other config options for fastboot use the CONFIG_FASTBOOT prefix.

This replaces the CONFIG_USB_FASTBOOT prefix with CONFIG_FASTBOOT, for consistency.

Signed-off-by: Paul Kocialkowski &lt;contact@paulk.fr&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>usb: Fastboot function config for better consistency with other functions</title>
<updated>2015-07-22T06:57:53+00:00</updated>
<author>
<name>Paul Kocialkowski</name>
<email>contact@paulk.fr</email>
</author>
<published>2015-06-12T17:56:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=17da3c0c8cad2a40903c078d178cd663d73ccc7c'/>
<id>17da3c0c8cad2a40903c078d178cd663d73ccc7c</id>
<content type='text'>
USB download gadget functions such as thor and dfu have a separate config option
for the USB gadget part of the code, independent from the command part.
This switches the fastboot USB gadget to the same scheme, for better
consistency.

Signed-off-by: Paul Kocialkowski &lt;contact@paulk.fr&gt;
Tested-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;

Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
USB download gadget functions such as thor and dfu have a separate config option
for the USB gadget part of the code, independent from the command part.
This switches the fastboot USB gadget to the same scheme, for better
consistency.

Signed-off-by: Paul Kocialkowski &lt;contact@paulk.fr&gt;
Tested-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;

Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)
</pre>
</div>
</content>
</entry>
<entry>
<title>usb: USB download gadget and functions config options coherent naming</title>
<updated>2015-07-22T06:57:53+00:00</updated>
<author>
<name>Paul Kocialkowski</name>
<email>contact@paulk.fr</email>
</author>
<published>2015-06-12T17:56:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=01acd6abbdd5a5951f68d08c245550c720ea6ad8'/>
<id>01acd6abbdd5a5951f68d08c245550c720ea6ad8</id>
<content type='text'>
This introduces a coherent scheme for naming USB download gadget and functions
config options. The download USB gadget config option is moved to
CONFIG_USB_GADGET_DOWNLOAD for better consistency with other gadgets and each
function's config option is moved to a CONFIG_USB_FUNCTION_ prefix.

Signed-off-by: Paul Kocialkowski &lt;contact@paulk.fr&gt;
Tested-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;

Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This introduces a coherent scheme for naming USB download gadget and functions
config options. The download USB gadget config option is moved to
CONFIG_USB_GADGET_DOWNLOAD for better consistency with other gadgets and each
function's config option is moved to a CONFIG_USB_FUNCTION_ prefix.

Signed-off-by: Paul Kocialkowski &lt;contact@paulk.fr&gt;
Tested-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;

Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)
</pre>
</div>
</content>
</entry>
</feed>
