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<title>u-boot.git/README, branch v2016.01-rc1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>board_init: Change the logic to setup malloc_base</title>
<updated>2015-11-13T01:34:07+00:00</updated>
<author>
<name>Fabio Estevam</name>
<email>fabio.estevam@freescale.com</email>
</author>
<published>2015-11-12T14:30:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9ac4fc82071ce346e3885118242ff45d22f69b82'/>
<id>9ac4fc82071ce346e3885118242ff45d22f69b82</id>
<content type='text'>
Prior to commit 5ba534d247d418 ("arm: Switch 32-bit ARM to using generic
global_data setup") we used to have assembly code that configured the
malloc_base address.

Since this commit we use the board_init_f_mem() function in C to setup
malloc_base address.

In board_init_f_mem() there was a deliberate choice to support only
early malloc() or full malloc() in SPL, but not both.

Adapt this logic to allow both to be used, one after the other, in SPL.

This issue has been observed in a Congatec board, where we need to
retrieve the manufacturing information from the SPI NOR (the SPI API
calls malloc) prior to configuring the DRAM. In this case as malloc_base
was not configured we always see malloc to fail.

With this change we are able to use malloc in SPL prior to DRAM gets
initialized.

Also update the CONFIG_SYS_SPL_MALLOC_START entry in the README file.

Signed-off-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
Prior to commit 5ba534d247d418 ("arm: Switch 32-bit ARM to using generic
global_data setup") we used to have assembly code that configured the
malloc_base address.

Since this commit we use the board_init_f_mem() function in C to setup
malloc_base address.

In board_init_f_mem() there was a deliberate choice to support only
early malloc() or full malloc() in SPL, but not both.

Adapt this logic to allow both to be used, one after the other, in SPL.

This issue has been observed in a Congatec board, where we need to
retrieve the manufacturing information from the SPI NOR (the SPI API
calls malloc) prior to configuring the DRAM. In this case as malloc_base
was not configured we always see malloc to fail.

With this change we are able to use malloc in SPL prior to DRAM gets
initialized.

Also update the CONFIG_SYS_SPL_MALLOC_START entry in the README file.

Signed-off-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i2c: ihs_i2c: Dual channel support</title>
<updated>2015-11-12T20:59:01+00:00</updated>
<author>
<name>Dirk Eibach</name>
<email>dirk.eibach@gdsys.cc</email>
</author>
<published>2015-10-28T10:46:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=071be896947a2b6ab791657e250da6fc995360a8'/>
<id>071be896947a2b6ab791657e250da6fc995360a8</id>
<content type='text'>
Support two i2c masters per FPGA.

Signed-off-by: Dirk Eibach &lt;dirk.eibach@gdsys.cc&gt;
Acked-by: Heiko Schocher &lt;hs@denx.de&gt;
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<pre>
Support two i2c masters per FPGA.

Signed-off-by: Dirk Eibach &lt;dirk.eibach@gdsys.cc&gt;
Acked-by: Heiko Schocher &lt;hs@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-net</title>
<updated>2015-10-29T20:30:33+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2015-10-29T20:30:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0eb4cf9c14315e1976a116de75da6f420ac0e8dd'/>
<id>0eb4cf9c14315e1976a116de75da6f420ac0e8dd</id>
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<pre>
</pre>
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</entry>
<entry>
<title>net: TFTP: variables cleanup and addition</title>
<updated>2015-10-28T19:42:24+00:00</updated>
<author>
<name>Albert ARIBAUD \(3ADEV\)</name>
<email>albert.aribaud@3adev.fr</email>
</author>
<published>2015-10-11T22:02:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f5fb734672f3fc78f63ed6a14cbdca2251ba3415'/>
<id>f5fb734672f3fc78f63ed6a14cbdca2251ba3415</id>
<content type='text'>
TFTP source and destination port variable names are
'tftpsrcp' and 'tftpdstp' in the code, but 'tftpsrcport'
and 'tftpdstport' in the README file. Fix the README.

Add environment variable 'tftptimeoutcountmax'. As per the
comments about the global variable tftp_timeout_count_max,
make sure tftptimeoutcountmax is nonnegative.

Introduce configuration option CONFIG_NET_TFTP_VARS,
which controls whether environment variables tftpblocksize,
tftptimeout, and tftptimoueoutcountmax are read by the TFTP
client code. CONFIG_NET_TFTP_VARS defaults to y but can be
set to n by targets with to tight size contraints.

Make bf527-ezkit set CONFIG_NET_TFTP_VARS to n to keep the
target size below limit.
</content>
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<pre>
TFTP source and destination port variable names are
'tftpsrcp' and 'tftpdstp' in the code, but 'tftpsrcport'
and 'tftpdstport' in the README file. Fix the README.

Add environment variable 'tftptimeoutcountmax'. As per the
comments about the global variable tftp_timeout_count_max,
make sure tftptimeoutcountmax is nonnegative.

Introduce configuration option CONFIG_NET_TFTP_VARS,
which controls whether environment variables tftpblocksize,
tftptimeout, and tftptimoueoutcountmax are read by the TFTP
client code. CONFIG_NET_TFTP_VARS defaults to y but can be
set to n by targets with to tight size contraints.

Make bf527-ezkit set CONFIG_NET_TFTP_VARS to n to keep the
target size below limit.
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-dm</title>
<updated>2015-10-27T23:08:19+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2015-10-27T23:08:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2431492aef1de33bd222c97ecc131a338d9c454e'/>
<id>2431492aef1de33bd222c97ecc131a338d9c454e</id>
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<pre>
</pre>
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</entry>
<entry>
<title>ubi,ubifs: sync with linux v4.2</title>
<updated>2015-10-26T08:22:36+00:00</updated>
<author>
<name>Heiko Schocher</name>
<email>hs@denx.de</email>
</author>
<published>2015-10-22T04:19:21+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0195a7bb36a0abc71145da419001377bf56662fd'/>
<id>0195a7bb36a0abc71145da419001377bf56662fd</id>
<content type='text'>
sync with linux v4.2

commit 64291f7db5bd8150a74ad2036f1037e6a0428df2
Author: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Date:   Sun Aug 30 11:34:09 2015 -0700

    Linux 4.2

This update is needed, as it turned out, that fastmap
was in experimental/broken state in kernel v3.15, which
was the last base for U-Boot.

Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
Tested-by: Ezequiel Garcia &lt;ezequiel@vanguardiasur.com.ar&gt;
</content>
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<pre>
sync with linux v4.2

commit 64291f7db5bd8150a74ad2036f1037e6a0428df2
Author: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Date:   Sun Aug 30 11:34:09 2015 -0700

    Linux 4.2

This update is needed, as it turned out, that fastmap
was in experimental/broken state in kernel v3.15, which
was the last base for U-Boot.

Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
Tested-by: Ezequiel Garcia &lt;ezequiel@vanguardiasur.com.ar&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: tpm: Move tpm_tis_i2c to tpm_i2c_infineon</title>
<updated>2015-10-23T15:42:28+00:00</updated>
<author>
<name>Christophe Ricard</name>
<email>christophe.ricard@gmail.com</email>
</author>
<published>2015-10-06T20:54:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0766ad2f7fdae6d7482b8e1e3f5a49b3d9a3810b'/>
<id>0766ad2f7fdae6d7482b8e1e3f5a49b3d9a3810b</id>
<content type='text'>
As there is no TCG specification or recommendation for i2c TPM 1.2,
move tpm_tis_i2c driver to tpm_i2c_infineon. Other tpm vendors like Atmel
or STMicroelectronics may have a different transport protocol for i2c.

Signed-off-by: Christophe Ricard &lt;christophe-h.ricard@st.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
As there is no TCG specification or recommendation for i2c TPM 1.2,
move tpm_tis_i2c driver to tpm_i2c_infineon. Other tpm vendors like Atmel
or STMicroelectronics may have a different transport protocol for i2c.

Signed-off-by: Christophe Ricard &lt;christophe-h.ricard@st.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cmd: bootvx: Always get VxWorks bootline from env</title>
<updated>2015-10-21T13:46:26+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-10-08T03:19:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9e98b7e3c5010e918d0fdfae75ab7d6995c1fa75'/>
<id>9e98b7e3c5010e918d0fdfae75ab7d6995c1fa75</id>
<content type='text'>
So far VxWorks bootline can be contructed from various environment
variables, but when these variables do not exist we get these from
corresponding config macros. This is not helpful as it requires
rebuilding U-Boot, and to make sure these config macros take effect
we should not have these environment variables. This is a little
bit complex and confusing.

Now we change the logic to always contruct the bootline from
environments (the only single source), by adding two new variables
"bootdev" and "othbootargs", and adding some comments about network
related settings mentioning they are optional. The doc about the
bootline handling is also updated.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Tested-by: Hannes Schmelzer &lt;oe5hpm@oevsv.at&gt;
</content>
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<pre>
So far VxWorks bootline can be contructed from various environment
variables, but when these variables do not exist we get these from
corresponding config macros. This is not helpful as it requires
rebuilding U-Boot, and to make sure these config macros take effect
we should not have these environment variables. This is a little
bit complex and confusing.

Now we change the logic to always contruct the bootline from
environments (the only single source), by adding two new variables
"bootdev" and "othbootargs", and adding some comments about network
related settings mentioning they are optional. The doc about the
bootline handling is also updated.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Tested-by: Hannes Schmelzer &lt;oe5hpm@oevsv.at&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arndale: Apply Cortex-A15 errata #773022 and #774769</title>
<updated>2015-10-11T21:12:11+00:00</updated>
<author>
<name>Ian Campbell</name>
<email>Ian.Campbell@citrix.com</email>
</author>
<published>2015-09-29T09:27:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e392b923ed6d6acff08b0a7aa5f457fff80fb0de'/>
<id>e392b923ed6d6acff08b0a7aa5f457fff80fb0de</id>
<content type='text'>
We run 4 Arndale boards in our automated test framework, they have
been running quite happily for quite some time using a Debian Wheezy
userspace.

However when upgrading to a Debian Jessie we started seeing frequent
segmentation faults from gcc when building the kernel, to the extent
that it is unable to successfully build the kernel twice in a row, and
often fails on the first attempt.

Searching around I found https://bugs.launchpad.net/arndale/+bug/1081417
which pointed towards http://www.spinics.net/lists/kvm-arm/msg03723.html
and CPU Errata 773022 and 774769.

This errata needs to be applied to all processors in an SMP system,
meaning that the usual strategy of applying them in
arch/arm/cpu/armv7/start.S is not appropriate (since that applies to
the boot processor only). Instead we apply these errata in the secure
monitor which is code that is traversed by all processors as they are
brought up.

The net affect on Arndale is that ACTLR changes from 0x40 to
0x2000042. I ran 17 kernel compile iterations overnight with no
segfaults.

Runtime testing was done on our v2014.10 based branch and forward
ported (with only minimal and trivial contextual conflicts) to current
master, where it has been build tested only.

I suppose in theory these errata apply to any Exynos5250 based boards,
but Arndale is the only one I have access to and I have therefore
chosen to be conservative and only apply it there.

Also, reorder CONFIG_ARM_ERRATA_794072 in README to make the list
numerically sorted.

Signed-off-by: Ian Campbell &lt;ian.campbell@citrix.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We run 4 Arndale boards in our automated test framework, they have
been running quite happily for quite some time using a Debian Wheezy
userspace.

However when upgrading to a Debian Jessie we started seeing frequent
segmentation faults from gcc when building the kernel, to the extent
that it is unable to successfully build the kernel twice in a row, and
often fails on the first attempt.

Searching around I found https://bugs.launchpad.net/arndale/+bug/1081417
which pointed towards http://www.spinics.net/lists/kvm-arm/msg03723.html
and CPU Errata 773022 and 774769.

This errata needs to be applied to all processors in an SMP system,
meaning that the usual strategy of applying them in
arch/arm/cpu/armv7/start.S is not appropriate (since that applies to
the boot processor only). Instead we apply these errata in the secure
monitor which is code that is traversed by all processors as they are
brought up.

The net affect on Arndale is that ACTLR changes from 0x40 to
0x2000042. I ran 17 kernel compile iterations overnight with no
segfaults.

Runtime testing was done on our v2014.10 based branch and forward
ported (with only minimal and trivial contextual conflicts) to current
master, where it has been build tested only.

I suppose in theory these errata apply to any Exynos5250 based boards,
but Arndale is the only one I have access to and I have therefore
chosen to be conservative and only apply it there.

Also, reorder CONFIG_ARM_ERRATA_794072 in README to make the list
numerically sorted.

Signed-off-by: Ian Campbell &lt;ian.campbell@citrix.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>I2C: mxc_i2c: make I2C1 and I2C2 optional</title>
<updated>2015-10-02T08:42:31+00:00</updated>
<author>
<name>Albert ARIBAUD \\(3ADEV\\)</name>
<email>albert.aribaud@3adev.fr</email>
</author>
<published>2015-09-21T20:43:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=03544c6640e8a969f8409eac637f4780e1eabb1d'/>
<id>03544c6640e8a969f8409eac637f4780e1eabb1d</id>
<content type='text'>
The driver assumed that I2C1 and I2C2 were always enabled,
and if they were not, then an asynchronous abort was (silently)
raised, to be caught much later on in the Linux kernel.

Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4
are.

To make the change binary-invariant, declare I2C1 and I2C2 in
every include/configs/ file which defines CONFIG_SYS_I2C_MXC.

Also, while updating README about CONFIG_SYS_I2C_MXC_I2C1 and
CONFIG_SYS_I2C_MXC_I2C2, add missing descriptions for I2C4 speed
(CONFIG_SYS_MXC_I2C4_SPEED) and slave (CONFIG_SYS_MXC_I2C4_SLAVE)
config options.

Signed-off-by: Albert ARIBAUD (3ADEV) &lt;albert.aribaud@3adev.fr&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The driver assumed that I2C1 and I2C2 were always enabled,
and if they were not, then an asynchronous abort was (silently)
raised, to be caught much later on in the Linux kernel.

Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4
are.

To make the change binary-invariant, declare I2C1 and I2C2 in
every include/configs/ file which defines CONFIG_SYS_I2C_MXC.

Also, while updating README about CONFIG_SYS_I2C_MXC_I2C1 and
CONFIG_SYS_I2C_MXC_I2C2, add missing descriptions for I2C4 speed
(CONFIG_SYS_MXC_I2C4_SPEED) and slave (CONFIG_SYS_MXC_I2C4_SLAVE)
config options.

Signed-off-by: Albert ARIBAUD (3ADEV) &lt;albert.aribaud@3adev.fr&gt;
</pre>
</div>
</content>
</entry>
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