u-boot.git/arch/arc/include/asm, branch v2016.07

arc: make global_data.h usable in assembly files

2016-07-04T08:43:41+00:00

Currently on attempt to use global_data.h in an assembly file following
will happen:
-------------------->8-----------------
./arch/arc/include/asm/global_data.h: Assembler messages:
./arch/arc/include/asm/global_data.h:11: Error: bad instruction 'struct arch_global_data{'
./arch/arc/include/asm/global_data.h:12: Error: junk at end of line, first unrecognized character is `}'
scripts/Makefile.build:316: recipe for target 'arch/arc/lib/start.o' failed
-------------------->8-----------------

In this change we disable struct arch_global_data in ASM which fixes
the issue above.

Signed-off-by: Alexey Brodkin

arc: Update data accessors with use of memory barriers

2016-06-13T12:38:05+00:00

Memory barriers are proven to be a requirement for both compiler and
real hardware to properly serialize access to critical data.

For example if CPU or data bus it uses may do reordering of data
accesses absence of memory barriers might easily lead to very subtle and
hard to debug data corruptions.

This implementation was heavily borrowed from up to date Linux kernel.

Signed-off-by: Alexey Brodkin

arc: Add virt_to_phys() stub

2016-04-11T17:20:38+00:00

Commit cf7c93cdd755 "usb: ehci: Implement V2P mapping"
introduced usage of virt_to_phys() in ehci-hcd.

Since there was no implementation of virt_to_phys() for ARC
compilation of the ehci-generic driver failed.

This change adds virt_to_phys() stub for ARC so now
USB driver for AXS101 board could be built again.

Signed-off-by: Alexey Brodkin 
Cc: Daniel Schwierzeck 
Cc: Hans de Goede 
Acked-by: Marek Vasut

arc: get rid of running_on_hw

2016-04-11T17:20:30+00:00

ISS is obsolete now and nSIM is used for simulation instead.
In its turn nSIM properly handles baud-rate settings so get rid
of now useless check.

Signed-off-by: Alexey Brodkin

arc: cache - utilize IO coherency (AKA IOC) engine

2016-02-20T08:20:05+00:00

With release of ARC HS38 v2.1 new IO coherency engine could be built-in
ARC core. This hardware module ensures coherency between DMA-ed data
from peripherals and L2 cache.

With L2 and IOC enabled there's no overhead for L2 cache manual
maintenance which results in significantly improved IO bandwidth.

Signed-off-by: Alexey Brodkin

arc: cache - accommodate different L1 cache line lengths

2016-02-20T08:19:53+00:00

ARC core could be configured with different L1 and L2 (AKA SLC) cache
line lengths. At least these values are possible and were really used:
32, 64 or 128 bytes.

Current implementation requires cache line to be selected upon U-Boot
configuration and then it will only work on matching hardware. Indeed
this is quite efficient because cache line length gets hardcoded during
code compilation. But OTOH it makes binary less portable.

With this commit we allow U-Boot to determine real L1 cache line length
early in runtime and use this value later on. This extends portability
of U-Boot binary a lot.

Signed-off-by: Alexey Brodkin

arc: add empty asm/processor.h to satisfy compilation of USB code

2015-11-17T21:39:22+00:00

common/usb.c unconditionally includes 
And now to allow USB support on ARC boards we have to have that header.

Signed-off-by: Alexey Brodkin

arc: add stubs for map_physmem() and unmap_physmem()

2015-11-17T21:38:35+00:00

Up until now there was no need in those stubs.

But since following commit compilation of U-Boot on ARC is broken:
------------------------>8----------------------
commit 7861204c9af7fec1ea9b41541c272516235a6c93
Author: Stephen Warren 
Date:   Sat Oct 3 13:56:46 2015 -0600

    itest: make memory access work under sandbox

    itest accesses memory, and hence must map/unmap it. Without doing so, it
    accesses invalid addresses and crashes.

    Signed-off-by: Stephen Warren 
    Reviewed-by: Simon Glass 
------------------------>8----------------------

That's because CMD_ITEST is enabled by default in common/Kconfig and now
map_physmem()/unmap_physmem() is used there.

So this patch adds missing stubs for ARC.

Signed-off-by: Alexey Brodkin 
Reviewed-by: Simon Glass 
Cc: Stephen Warren

arc: Use the generic bitops headers

2015-11-05T15:52:29+00:00

The generic bitops headers are required when calling logarithmic
functions, such as ilog2().

Signed-off-by: Fabio Estevam

arc: significant cache rework

2015-07-01T14:17:27+00:00

[1] Align cache management functions to those in Linux kernel. I.e.:
    a) Use the same functions for all cache ops (D$ Inv/Flush)
    b) Split cache ops in 3 sub-functions: "before", "lineloop" and
"after". That way we may re-use "before" and "after" functions for
region and full cache ops.

 [2] Implement full-functional L2 (SLC) management. Before SLC was
simply disabled early on boot. It's also possible to enable or disable
L2 cache from config utility.

 [3] Disable/enable corresponding caches early on boot. So if U-Boot is
configured to use caches they will be used at all times (this is useful
in partucular for speed-up of relocation).

Signed-off-by: Alexey Brodkin