u-boot.git/arch/arc/lib/cache.c, branch v2015.04-rc2

arc: select cache settings via menuconfig

2015-02-09T13:41:20Z

This change allows to keep board description clean and minimalistic. This is especially helpful if one board may house different CPUs with different features. It is applicable to both FPGA-based boards or those that have CPUs mounted on interchnagable daughter-boards. Signed-off-by: Alexey Brodkin

arc: define and use PTAG AUX regs for MMUv3 only

2015-02-09T13:41:20Z

DC_PTAG and IC_PTAG registers only exist in MMUv3. Signed-off-by: Alexey Brodkin

arc: move common sources in library

2015-01-15T19:40:49Z

"reset.c" and "cpu.c" have no architecture-specific code at all. Others are applicable to either ARC CPU. This change is a preparation to submission of ARCv2 architecture port. Even though ARCv1 and ARCv2 ISAs are not binary compatible most of built-in modules still have the same programming model - AUX registers are mapped in the same addresses and hold the same data (new featues extend existing ones). So only low-level assembly code (start-up, interrupt handlers) is left as CPU(actually ISA)-specific. This significantyl simplifies maintenance of multiple CPUs/ISAs. Signed-off-by: Alexey Brodkin Signed-off-by: Igor Guryanov