u-boot.git/arch/arc/lib, branch v2015.04-rc2

arc: build libgcc in U-Boot

2015-02-09T13:41:20Z

This way we may have very limited set of functions implemented so we save some space. Also it allows us to build U-Boot for any ARC core with the same one toolchain because we don't rely on pre-built libgcc. For example: * we may use little-endian toolchain but build U-Boot for ether endianess * we may use non-multilibbed uClibc toolchain but build U-Boot for whatever ARC CPU flavour that current GCC supports Private libgcc built from generic C implementation contributes only 144 bytes to .text section so we don't see significant degradation of size: --->8--- $ arc-linux-size u-boot.libgcc-prebuilt text data bss dec hex filename 222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt $ arc-linux-size u-boot.libgcc-private text data bss dec hex filename 222361 24912 214820 462093 70d0d u-boot.libgcc-private --->8--- Also I don't notice visible performance degradation compared to pre-built libgcc (where at least "*div*" functions are had-written in assembly) on typical operations of downloading 10Mb uImage over TFTP and bootm. Signed-off-by: Alexey Brodkin

arc: select cache settings via menuconfig

2015-02-09T13:41:20Z

This change allows to keep board description clean and minimalistic. This is especially helpful if one board may house different CPUs with different features. It is applicable to both FPGA-based boards or those that have CPUs mounted on interchnagable daughter-boards. Signed-off-by: Alexey Brodkin

arc: define and use PTAG AUX regs for MMUv3 only

2015-02-09T13:41:20Z

DC_PTAG and IC_PTAG registers only exist in MMUv3. Signed-off-by: Alexey Brodkin

arc: memcmp - fix zero-delay loop utilization

2015-02-09T13:41:20Z

It's prohibited to put branch instruction in the very end of zero-delay loop. On execution this causes "Illegal instruction" exception. Signed-off-by: Alexey Brodkin Signed-off-by: Igor Guryanov

arc: move common sources in library

2015-01-15T19:40:49Z

"reset.c" and "cpu.c" have no architecture-specific code at all. Others are applicable to either ARC CPU. This change is a preparation to submission of ARCv2 architecture port. Even though ARCv1 and ARCv2 ISAs are not binary compatible most of built-in modules still have the same programming model - AUX registers are mapped in the same addresses and hold the same data (new featues extend existing ones). So only low-level assembly code (start-up, interrupt handlers) is left as CPU(actually ISA)-specific. This significantyl simplifies maintenance of multiple CPUs/ISAs. Signed-off-by: Alexey Brodkin Signed-off-by: Igor Guryanov

arc: relocate - minor refactoring and clean-up

2015-01-15T19:38:42Z

* use better symbols for relocatable region boundaries ("__image_copy_start" instead of "CONFIG_SYS_TEXT_BASE") * remove useless debug messages because they will only show up in case of both problem (when normal "if" branch won't be taken) and DEBUG take place which is pretty rare situation. Signed-off-by: Alexey Brodkin

arc: introduce separate section for interrupt vector table

2015-01-15T19:38:42Z

Even though existing implementation works fine in preparation to submission of ARCv2 architecture we need this change. In case of ARCv2 interrupt vector table consists of just addresses of corresponding handlers. And if those addresses will be in .text section then assembler will encode them as everything in .text section as middle-endian and then on real execution CPU will read swapped addresses and will jump into the wild. Once introduced new section is situated so .text section remains the first which allows us to use common linker option for linking everything to a specified CONFIG_SYS_TEXT_BASE. Signed-off-by: Alexey Brodkin Signed-off-by: Igor Guryanov

arc: fix relocation for big-endian target

2014-02-21T12:56:42Z

In case of little-endian ARC700 instructions (which may include target address) are encoded as middle-endian. That's why it's required to swap bytes after read and ten right before write back. But in case of big-endian ARC700 instructions are encoded as a plain big-endian. Thus no need for byte swapping. Signed-off-by: Alexey Brodkin Cc: Francois Bedard Cc: Tom Rini cc: Noam Camus

arc: add library functions

2014-02-07T13:14:32Z

These are library functions used by ARC700 architecture. Signed-off-by: Alexey Brodkin Cc: Vineet Gupta Cc: Francois Bedard Cc: Wolfgang Denk Cc: Heiko Schocher