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<title>u-boot.git/arch/arc, branch v2016.05</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>arc/cache: really do flush_dcache_all() even if IOC exists</title>
<updated>2016-04-21T17:09:59+00:00</updated>
<author>
<name>Alexey Brodkin</name>
<email>abrodkin@synopsys.com</email>
</author>
<published>2016-04-16T12:28:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2a8382c6fe7ddf0e15791b3ffa5f390a674a212b'/>
<id>2a8382c6fe7ddf0e15791b3ffa5f390a674a212b</id>
<content type='text'>
flush_dcache_all() is used in the very end of U-Boot self relocation
to write back all copied and then patched code and data to their
new location in the very end of available memory space.

Since that has nothing to do with IO (i.e. no external DMA happens
here) IOC won't help here and we need to write back data cache contents
manually.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</content>
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<pre>
flush_dcache_all() is used in the very end of U-Boot self relocation
to write back all copied and then patched code and data to their
new location in the very end of available memory space.

Since that has nothing to do with IO (i.e. no external DMA happens
here) IOC won't help here and we need to write back data cache contents
manually.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arc: Add virt_to_phys() stub</title>
<updated>2016-04-11T17:20:38+00:00</updated>
<author>
<name>Alexey Brodkin</name>
<email>abrodkin@synopsys.com</email>
</author>
<published>2016-04-08T16:21:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=53637c911b7a2397b50690cd67b7d59145bcae9c'/>
<id>53637c911b7a2397b50690cd67b7d59145bcae9c</id>
<content type='text'>
Commit cf7c93cdd755 "usb: ehci: Implement V2P mapping"
introduced usage of virt_to_phys() in ehci-hcd.

Since there was no implementation of virt_to_phys() for ARC
compilation of the ehci-generic driver failed.

This change adds virt_to_phys() stub for ARC so now
USB driver for AXS101 board could be built again.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Cc: Hans de Goede &lt;hdegoede@redhat.com&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
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<pre>
Commit cf7c93cdd755 "usb: ehci: Implement V2P mapping"
introduced usage of virt_to_phys() in ehci-hcd.

Since there was no implementation of virt_to_phys() for ARC
compilation of the ehci-generic driver failed.

This change adds virt_to_phys() stub for ARC so now
USB driver for AXS101 board could be built again.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Cc: Hans de Goede &lt;hdegoede@redhat.com&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arc: get rid of running_on_hw</title>
<updated>2016-04-11T17:20:30+00:00</updated>
<author>
<name>Alexey Brodkin</name>
<email>abrodkin@synopsys.com</email>
</author>
<published>2016-02-20T08:30:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8b15010b1fc6a0da76db0b5d96d12ffe69990dbe'/>
<id>8b15010b1fc6a0da76db0b5d96d12ffe69990dbe</id>
<content type='text'>
ISS is obsolete now and nSIM is used for simulation instead.
In its turn nSIM properly handles baud-rate settings so get rid
of now useless check.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</content>
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<pre>
ISS is obsolete now and nSIM is used for simulation instead.
In its turn nSIM properly handles baud-rate settings so get rid
of now useless check.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arc: cache - utilize IO coherency (AKA IOC) engine</title>
<updated>2016-02-20T08:20:05+00:00</updated>
<author>
<name>Alexey Brodkin</name>
<email>Alexey.Brodkin@synopsys.com</email>
</author>
<published>2015-12-14T14:15:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=db6ce2312dcae87619136457d1f9df56789f630a'/>
<id>db6ce2312dcae87619136457d1f9df56789f630a</id>
<content type='text'>
With release of ARC HS38 v2.1 new IO coherency engine could be built-in
ARC core. This hardware module ensures coherency between DMA-ed data
from peripherals and L2 cache.

With L2 and IOC enabled there's no overhead for L2 cache manual
maintenance which results in significantly improved IO bandwidth.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</content>
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<pre>
With release of ARC HS38 v2.1 new IO coherency engine could be built-in
ARC core. This hardware module ensures coherency between DMA-ed data
from peripherals and L2 cache.

With L2 and IOC enabled there's no overhead for L2 cache manual
maintenance which results in significantly improved IO bandwidth.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arc: cache - accommodate different L1 cache line lengths</title>
<updated>2016-02-20T08:19:53+00:00</updated>
<author>
<name>Alexey Brodkin</name>
<email>Alexey.Brodkin@synopsys.com</email>
</author>
<published>2015-12-14T14:14:46+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=379b3280b30c4aad5ff0fdf1cd6431c5fa6861b1'/>
<id>379b3280b30c4aad5ff0fdf1cd6431c5fa6861b1</id>
<content type='text'>
ARC core could be configured with different L1 and L2 (AKA SLC) cache
line lengths. At least these values are possible and were really used:
32, 64 or 128 bytes.

Current implementation requires cache line to be selected upon U-Boot
configuration and then it will only work on matching hardware. Indeed
this is quite efficient because cache line length gets hardcoded during
code compilation. But OTOH it makes binary less portable.

With this commit we allow U-Boot to determine real L1 cache line length
early in runtime and use this value later on. This extends portability
of U-Boot binary a lot.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</content>
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<pre>
ARC core could be configured with different L1 and L2 (AKA SLC) cache
line lengths. At least these values are possible and were really used:
32, 64 or 128 bytes.

Current implementation requires cache line to be selected upon U-Boot
configuration and then it will only work on matching hardware. Indeed
this is quite efficient because cache line length gets hardcoded during
code compilation. But OTOH it makes binary less portable.

With this commit we allow U-Boot to determine real L1 cache line length
early in runtime and use this value later on. This extends portability
of U-Boot binary a lot.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Fix board init code to respect the C runtime environment</title>
<updated>2016-01-14T02:05:17+00:00</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2015-11-25T16:56:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ecc306639e83c9019a5093b77a48685ea40eedc2'/>
<id>ecc306639e83c9019a5093b77a48685ea40eedc2</id>
<content type='text'>
board_init_f_mem() alters the C runtime environment's
stack it is actually already using. This is not a valid
behaviour within a C runtime environment.

Split board_init_f_mem into C functions which do not alter
their own stack and always behave properly with respect to
their C runtime environment.

Signed-off-by: Albert ARIBAUD &lt;albert.u.boot@aribaud.net&gt;
Acked-by: Thomas Chou &lt;thomas@wytron.com.tw&gt;
</content>
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<pre>
board_init_f_mem() alters the C runtime environment's
stack it is actually already using. This is not a valid
behaviour within a C runtime environment.

Split board_init_f_mem into C functions which do not alter
their own stack and always behave properly with respect to
their C runtime environment.

Signed-off-by: Albert ARIBAUD &lt;albert.u.boot@aribaud.net&gt;
Acked-by: Thomas Chou &lt;thomas@wytron.com.tw&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>axs103: add support of generic OHCI USB 1.1 controller</title>
<updated>2015-12-21T20:29:04+00:00</updated>
<author>
<name>Alexey Brodkin</name>
<email>abrodkin@synopsys.com</email>
</author>
<published>2015-12-10T13:56:42+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d0602bd4675c4f49e455b3b7a4aebb9a01287d43'/>
<id>d0602bd4675c4f49e455b3b7a4aebb9a01287d43</id>
<content type='text'>
This commit adds support of USB 1.1 storage media on AXS103 board.
For some yet unknown reason USB 2.0 doesn't work on AXS103 board issuing
messages like this:
------------------------&gt;8-------------------
AXS# usb start
starting USB...
USB0:   USB EHCI 1.00
scanning bus 0 for devices... EHCI timed out on TD - token=0x80008c80
unable to get device descriptor (error=-1)
1 USB Device(s) found
------------------------&gt;8-------------------

As a work-around we're falling back to USB 1.1.
Indeed it is much slower but at least USB storage devices are usable on
AXS103.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This commit adds support of USB 1.1 storage media on AXS103 board.
For some yet unknown reason USB 2.0 doesn't work on AXS103 board issuing
messages like this:
------------------------&gt;8-------------------
AXS# usb start
starting USB...
USB0:   USB EHCI 1.00
scanning bus 0 for devices... EHCI timed out on TD - token=0x80008c80
unable to get device descriptor (error=-1)
1 USB Device(s) found
------------------------&gt;8-------------------

As a work-around we're falling back to USB 1.1.
Indeed it is much slower but at least USB storage devices are usable on
AXS103.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>axs10x: add support of generic EHCI USB 2.0 controller</title>
<updated>2015-12-08T14:29:56+00:00</updated>
<author>
<name>Alexey Brodkin</name>
<email>Alexey.Brodkin@synopsys.com</email>
</author>
<published>2015-11-30T17:53:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8555dd88cd1a7b5dd1e76c111fe635a92223b98b'/>
<id>8555dd88cd1a7b5dd1e76c111fe635a92223b98b</id>
<content type='text'>
This commit adds support of USB 2.0 storage media on AXS10x boards.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
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<pre>
This commit adds support of USB 2.0 storage media on AXS10x boards.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>board: axs10x switch serial port and Ethernet to driver model</title>
<updated>2015-11-17T21:39:22+00:00</updated>
<author>
<name>Alexey Brodkin</name>
<email>abrodkin@synopsys.com</email>
</author>
<published>2015-11-10T16:16:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fb2dea60e8f355ae00d427db09112a90839c96ec'/>
<id>fb2dea60e8f355ae00d427db09112a90839c96ec</id>
<content type='text'>
With this change Synopsys DesignWare SDP board is switched to driver
model for both serial port (serial_dw) and Ethernet (Designware GMAC).

This simplifies include/configs/axs101.h and allows for reuse of Linux's
Device Tree description.

For simplicity Linux's .dts files are not blindly copied but only very
few extracts of them are really used (those that are supported in U-Boot
at the moment).

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With this change Synopsys DesignWare SDP board is switched to driver
model for both serial port (serial_dw) and Ethernet (Designware GMAC).

This simplifies include/configs/axs101.h and allows for reuse of Linux's
Device Tree description.

For simplicity Linux's .dts files are not blindly copied but only very
few extracts of them are really used (those that are supported in U-Boot
at the moment).

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arc: add empty asm/processor.h to satisfy compilation of USB code</title>
<updated>2015-11-17T21:39:22+00:00</updated>
<author>
<name>Alexey Brodkin</name>
<email>abrodkin@synopsys.com</email>
</author>
<published>2015-11-12T21:45:20+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=db1f17f894b15402f3d1d43f7d273a42668b8ab4'/>
<id>db1f17f894b15402f3d1d43f7d273a42668b8ab4</id>
<content type='text'>
common/usb.c unconditionally includes &lt;asm/processor.h&gt;
And now to allow USB support on ARC boards we have to have that header.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</content>
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<pre>
common/usb.c unconditionally includes &lt;asm/processor.h&gt;
And now to allow USB support on ARC boards we have to have that header.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
