u-boot.git/arch/arc, branch v2016.07-rc3

arc: Update data accessors with use of memory barriers

2016-06-13T12:38:05+00:00

Memory barriers are proven to be a requirement for both compiler and
real hardware to properly serialize access to critical data.

For example if CPU or data bus it uses may do reordering of data
accesses absence of memory barriers might easily lead to very subtle and
hard to debug data corruptions.

This implementation was heavily borrowed from up to date Linux kernel.

Signed-off-by: Alexey Brodkin

arc/cache: Flush & invalidate all caches right before enabling IOC

2016-06-13T12:38:05+00:00

According to ARC HS databook it is required to flush and disable
caches prior programming IOC registers. Otherwise ongoing coherent
memory operations may not observe the coherency protocols as
expected.

But since in ARC HS v2.1 there's no way to disable SLC (AKA L2 cache)
we're doing our best flushing and invalidating it.

Signed-off-by: Alexey Brodkin

arc/cache: really do invalidate_dcache_all() even if IOC exists

2016-06-13T12:38:05+00:00

invalidate_dcache_all() could be used in different use-cases
and what is especially important most of those cases won't be
related to DMAed data to or from peripherals, i.e. we'll be doing
invalidation of data used purely by CPU cores.

Given that IOC engine only snoops data that goes through DMA
we need to care ourselves about data used only by CPU cores
and so remove dependency on IOC from invalidate_dcache_all()
and always do real invalidation.

Signed-off-by: Alexey Brodkin

arc/cache: really do flush_dcache_all() even if IOC exists

2016-04-21T17:09:59+00:00

flush_dcache_all() is used in the very end of U-Boot self relocation
to write back all copied and then patched code and data to their
new location in the very end of available memory space.

Since that has nothing to do with IO (i.e. no external DMA happens
here) IOC won't help here and we need to write back data cache contents
manually.

Signed-off-by: Alexey Brodkin

arc: Add virt_to_phys() stub

2016-04-11T17:20:38+00:00

Commit cf7c93cdd755 "usb: ehci: Implement V2P mapping"
introduced usage of virt_to_phys() in ehci-hcd.

Since there was no implementation of virt_to_phys() for ARC
compilation of the ehci-generic driver failed.

This change adds virt_to_phys() stub for ARC so now
USB driver for AXS101 board could be built again.

Signed-off-by: Alexey Brodkin 
Cc: Daniel Schwierzeck 
Cc: Hans de Goede 
Acked-by: Marek Vasut

arc: get rid of running_on_hw

2016-04-11T17:20:30+00:00

ISS is obsolete now and nSIM is used for simulation instead.
In its turn nSIM properly handles baud-rate settings so get rid
of now useless check.

Signed-off-by: Alexey Brodkin

arc: cache - utilize IO coherency (AKA IOC) engine

2016-02-20T08:20:05+00:00

With release of ARC HS38 v2.1 new IO coherency engine could be built-in
ARC core. This hardware module ensures coherency between DMA-ed data
from peripherals and L2 cache.

With L2 and IOC enabled there's no overhead for L2 cache manual
maintenance which results in significantly improved IO bandwidth.

Signed-off-by: Alexey Brodkin

arc: cache - accommodate different L1 cache line lengths

2016-02-20T08:19:53+00:00

ARC core could be configured with different L1 and L2 (AKA SLC) cache
line lengths. At least these values are possible and were really used:
32, 64 or 128 bytes.

Current implementation requires cache line to be selected upon U-Boot
configuration and then it will only work on matching hardware. Indeed
this is quite efficient because cache line length gets hardcoded during
code compilation. But OTOH it makes binary less portable.

With this commit we allow U-Boot to determine real L1 cache line length
early in runtime and use this value later on. This extends portability
of U-Boot binary a lot.

Signed-off-by: Alexey Brodkin

Fix board init code to respect the C runtime environment

2016-01-14T02:05:17+00:00

board_init_f_mem() alters the C runtime environment's
stack it is actually already using. This is not a valid
behaviour within a C runtime environment.

Split board_init_f_mem into C functions which do not alter
their own stack and always behave properly with respect to
their C runtime environment.

Signed-off-by: Albert ARIBAUD 
Acked-by: Thomas Chou

axs103: add support of generic OHCI USB 1.1 controller

2015-12-21T20:29:04+00:00

This commit adds support of USB 1.1 storage media on AXS103 board.
For some yet unknown reason USB 2.0 doesn't work on AXS103 board issuing
messages like this:
------------------------>8-------------------
AXS# usb start
starting USB...
USB0:   USB EHCI 1.00
scanning bus 0 for devices... EHCI timed out on TD - token=0x80008c80
unable to get device descriptor (error=-1)
1 USB Device(s) found
------------------------>8-------------------

As a work-around we're falling back to USB 1.1.
Indeed it is much slower but at least USB storage devices are usable on
AXS103.

Signed-off-by: Alexey Brodkin 
Cc: Marek Vasut 
Cc: Simon Glass