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<title>u-boot.git/arch/arc, branch v2017.05</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>board_f: Rename initdram() to dram_init()</title>
<updated>2017-04-13T13:40:57+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-04-06T18:47:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f1683aa73c31db0a025e0254e6ce1ee7e56aad3e'/>
<id>f1683aa73c31db0a025e0254e6ce1ee7e56aad3e</id>
<content type='text'>
This allows us to use the same DRAM init function on all archs. Add a
dummy function for arc, which does not use DRAM init here.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
[trini: Dummy function on nios2]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
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<pre>
This allows us to use the same DRAM init function on all archs. Add a
dummy function for arc, which does not use DRAM init here.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
[trini: Dummy function on nios2]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>ARCv2: SLC: Make sure busy bit is set properly on SLC flushing</title>
<updated>2017-04-11T14:54:31+00:00</updated>
<author>
<name>Alexey Brodkin</name>
<email>abrodkin@synopsys.com</email>
</author>
<published>2017-04-05T14:50:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=40a808f173008729a0c631ab84693b6a2b0dcfc9'/>
<id>40a808f173008729a0c631ab84693b6a2b0dcfc9</id>
<content type='text'>
As reported in STAR 9001165532, an SLC control reg read (for checking
busy state) right after SLC invalidate command may incorrectly return
NOT busy causing software to NOT spin-wait while operation is underway.
(and for some reason this only happens if L1 cache is also disabled - as
required by IOC programming model)

Suggested workaround is to do an additional Control Reg read, which
ensures the 2nd read gets the right status.

Same fix made in Linux kernel:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c70c473396cbdec1168a6eff60e13029c0916854

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
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<pre>
As reported in STAR 9001165532, an SLC control reg read (for checking
busy state) right after SLC invalidate command may incorrectly return
NOT busy causing software to NOT spin-wait while operation is underway.
(and for some reason this only happens if L1 cache is also disabled - as
required by IOC programming model)

Suggested workaround is to do an additional Control Reg read, which
ensures the 2nd read gets the right status.

Same fix made in Linux kernel:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c70c473396cbdec1168a6eff60e13029c0916854

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>board_f: Make relocation functions generic</title>
<updated>2017-04-05T20:36:57+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-03-31T14:40:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e47b2d674f0acd137412535647cb3072bf11dbb0'/>
<id>e47b2d674f0acd137412535647cb3072bf11dbb0</id>
<content type='text'>
This header file is used by three archs. It could be used by all of them
since relocation is a common function. Move it into a generic file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This header file is used by three archs. It could be used by all of them
since relocation is a common function. Move it into a generic file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>board_f: Make init_helpers generic</title>
<updated>2017-04-05T20:36:56+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-03-31T14:40:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=96d4b75c0d7f1bbbbde19e6225b09b1f7e7b60fe'/>
<id>96d4b75c0d7f1bbbbde19e6225b09b1f7e7b60fe</id>
<content type='text'>
This header file is used by two archs. It could be used by all of them
since it allows the cache to be on during relocation. Move it into a
generic file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This header file is used by two archs. It could be used by all of them
since it allows the cache to be on during relocation. Move it into a
generic file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arcv2: Halt non-master cores</title>
<updated>2017-03-31T19:09:36+00:00</updated>
<author>
<name>Alexey Brodkin</name>
<email>abrodkin@synopsys.com</email>
</author>
<published>2017-03-30T14:50:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6cba327bd96f90818a8beede51405228c54a5251'/>
<id>6cba327bd96f90818a8beede51405228c54a5251</id>
<content type='text'>
Even though we expect only master core to execute U-Boot code
let's make sure even if for some reason slave cores attempt to
execute U-Boot in parallel with master they get halted very early.

If platform wants it may kick-start slave cores before passing control
to say Linux kernel or any other application that want to see all cores
of SMP SoC up and running.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</content>
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<pre>
Even though we expect only master core to execute U-Boot code
let's make sure even if for some reason slave cores attempt to
execute U-Boot in parallel with master they get halted very early.

If platform wants it may kick-start slave cores before passing control
to say Linux kernel or any other application that want to see all cores
of SMP SoC up and running.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arc: use timer driver for ARC boards</title>
<updated>2017-03-24T11:47:52+00:00</updated>
<author>
<name>Vlad Zakharov</name>
<email>vzakhar@synopsys.com</email>
</author>
<published>2017-03-21T11:49:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3daa7c7b831ddeed0e490a899710a58691ee20c3'/>
<id>3daa7c7b831ddeed0e490a899710a58691ee20c3</id>
<content type='text'>
This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov &lt;vzakhar@synopsys.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This commit replaces legacy timer code with usage of arc timer
driver.

It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.

Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.

Signed-off-by: Vlad Zakharov &lt;vzakhar@synopsys.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arc: dts: separate single axs10x.dts file</title>
<updated>2017-03-24T11:47:52+00:00</updated>
<author>
<name>Vlad Zakharov</name>
<email>vzakhar@synopsys.com</email>
</author>
<published>2017-03-21T11:49:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0c77092e8163c716b637cffe681e4556db17ac31'/>
<id>0c77092e8163c716b637cffe681e4556db17ac31</id>
<content type='text'>
We want to use the same device tree blobs in both Linux and U-Boot for
ARC boards.

Earlier device tree sources in U-Boot were very simplified and hadn't been
updated for quite a long period of time.

So this commit is the first step on the road to unified device tree blobs.

First of all we re-organize device tree sources for AXS10X boards.
As AXS101 and AXS103 boards consist of AXS10X motherboard and AXC001 and
AXC003 cpu tiles respectively we add corresponding device tree source
files: axs10x_mb.dtsi for motherboard, axc001.dtsi and axc003.dtsi for
cpu tiles and axs101.dts and axs103.dts to represent actual boards.

Also we delete axs10x.dts as it is no longer used.

One more important change - we add timer device to ARC skeleton device
tree sources as both ARC700 and ARCHS cores contain such timer.
We add core_clk nodes to abilis_tb100, nsim, axc001 and axc003 device tree
sources as it is referenced via phandle from timer node in common
skeleton.dtsi file.

Signed-off-by: Vlad Zakharov &lt;vzakhar@synopsys.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
We want to use the same device tree blobs in both Linux and U-Boot for
ARC boards.

Earlier device tree sources in U-Boot were very simplified and hadn't been
updated for quite a long period of time.

So this commit is the first step on the road to unified device tree blobs.

First of all we re-organize device tree sources for AXS10X boards.
As AXS101 and AXS103 boards consist of AXS10X motherboard and AXC001 and
AXC003 cpu tiles respectively we add corresponding device tree source
files: axs10x_mb.dtsi for motherboard, axc001.dtsi and axc003.dtsi for
cpu tiles and axs101.dts and axs103.dts to represent actual boards.

Also we delete axs10x.dts as it is no longer used.

One more important change - we add timer device to ARC skeleton device
tree sources as both ARC700 and ARCHS cores contain such timer.
We add core_clk nodes to abilis_tb100, nsim, axc001 and axc003 device tree
sources as it is referenced via phandle from timer node in common
skeleton.dtsi file.

Signed-off-by: Vlad Zakharov &lt;vzakhar@synopsys.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: timer: Introduce ARC timer driver</title>
<updated>2017-03-24T11:20:55+00:00</updated>
<author>
<name>Vlad Zakharov</name>
<email>vzakhar@synopsys.com</email>
</author>
<published>2017-03-21T11:49:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ad9b5f77dffaa38ea830af94cd5de3450318f97c'/>
<id>ad9b5f77dffaa38ea830af94cd5de3450318f97c</id>
<content type='text'>
This commit introduces timer driver for ARC.

ARC timers are configured via ARC AUX registers so we use special
functions to access timer control registers.

This driver allows utilization of either timer0 or timer1
depending on which one is available in real hardware. Essentially
only existing timers should be mentioned in board's Device Tree
description.

Signed-off-by: Vlad Zakharov &lt;vzakhar@synopsys.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This commit introduces timer driver for ARC.

ARC timers are configured via ARC AUX registers so we use special
functions to access timer control registers.

This driver allows utilization of either timer0 or timer1
depending on which one is available in real hardware. Essentially
only existing timers should be mentioned in board's Device Tree
description.

Signed-off-by: Vlad Zakharov &lt;vzakhar@synopsys.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig</title>
<updated>2017-01-25T21:43:48+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-01-23T20:31:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a421192fb8d49da9a8bc30258c29c51675a1a1c9'/>
<id>a421192fb8d49da9a8bc30258c29c51675a1a1c9</id>
<content type='text'>
This converts the following to Kconfig:
   CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This converts the following to Kconfig:
   CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>libfdt: replace ARCH_FIXUP_FDT with ARCH_FIXUP_FDT_MEMORY</title>
<updated>2016-12-03T03:54:34+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-11-26T02:02:10+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=63c0941726e44f31c42de744a57f528fee2df88f'/>
<id>63c0941726e44f31c42de744a57f528fee2df88f</id>
<content type='text'>
Commit e2f88dfd2d96 ("libfdt: Introduce new ARCH_FIXUP_FDT option")
allows us to skip memory setup of DTB, but a problem for ARM is that
spin_table_update_dt() and psci_update_dt() are skipped as well if
CONFIG_ARCH_FIXUP_FDT is disabled.

This commit allows us to skip only fdt_fixup_memory_banks() instead
of the whole of arch_fixup_fdt().  It will be useful when we want to
use a memory node from a kernel DTB as is, but need some fixups for
Spin-Table/PSCI.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Fixed build error for x86:
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Commit e2f88dfd2d96 ("libfdt: Introduce new ARCH_FIXUP_FDT option")
allows us to skip memory setup of DTB, but a problem for ARM is that
spin_table_update_dt() and psci_update_dt() are skipped as well if
CONFIG_ARCH_FIXUP_FDT is disabled.

This commit allows us to skip only fdt_fixup_memory_banks() instead
of the whole of arch_fixup_fdt().  It will be useful when we want to
use a memory node from a kernel DTB as is, but need some fixups for
Spin-Table/PSCI.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Fixed build error for x86:
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
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