u-boot.git/arch/arc, branch v2017.09 Unnamed repository; edit this file 'description' to name the repository. env: Rename getenv/_f() to env_get() 2017-08-16T12:30:24+00:00 Simon Glass sjg@chromium.org 2017-08-03T18:22:12+00:00 00caae6d47645e68d6e5277aceb69592b49381a6 We are now using an env_ prefix for environment functions. Rename these two functions for consistency. Also add function comments in common.h. Quite a few places use getenv() in a condition context, provoking a warning from checkpatch. These are fixed up in this patch also. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> 
We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.

Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.

Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
arc: Add support for HS Development Kit board 2017-06-29T16:34:10+00:00 Alexey Brodkin abrodkin@synopsys.com 2016-11-25T13:23:43+00:00 67482f57e6127d7d3e216dae6860dac7b33132d5 ARC HS Development Kit board is a new low-cost development platform sporting ARC HS38 in real silicon with nice set of features such as: * Quad-core ARC HS38 with 512 kB L2 cache and running @1GHz * 4Gb of DDR (we use only lowest 1Gb out of it now) * Lots of DesigWare peripherals * Different connectivity modules: - Synopsys HAPS HT3 - Arduino-compatible connector - MikroBUS This initial commit supports the following peripherals: * UART (DW 8250) * Ethernet (DW GMAC) * SD/MMC (DW Mobile Storage) * USB 1.1 & 2.0 Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> 
ARC HS Development Kit board is a new low-cost
development platform sporting ARC HS38 in real silicon
with nice set of features such as:
 * Quad-core ARC HS38 with 512 kB L2 cache and running @1GHz
 * 4Gb of DDR (we use only lowest 1Gb out of it now)
 * Lots of DesigWare peripherals
 * Different connectivity modules:
     - Synopsys HAPS HT3
     - Arduino-compatible connector
     - MikroBUS

This initial commit supports the following peripherals:
 * UART (DW 8250)
 * Ethernet (DW GMAC)
 * SD/MMC (DW Mobile Storage)
 * USB 1.1 & 2.0

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
arcv2: Set IOC aperture so it covers available DDR 2017-06-29T16:34:10+00:00 Alexey Brodkin abrodkin@synopsys.com 2017-06-26T08:46:47+00:00 97a63144a906827ad7e3c4ef18d641c2765b1ebc We used to use the same memory layout and size for a couple of boards and thus we just hardcoding IOC aperture start and size. Now when we're getting more boards with more memory on board we need to have an ability to set IOC so it matches real DDR layout and size. Even though it is not really a must but for simplicity we assume IOC covers all the DDR we have, that gives us a chance to not bother where DMA buffers are allocated - any part of DDR is OK. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> 
We used to use the same memory layout and size for a couple of
boards and thus we just hardcoding IOC aperture start and size.

Now when we're getting more boards with more memory on board we
need to have an ability to set IOC so it matches real DDR layout
and size.

Even though it is not really a must but for simplicity we assume
IOC covers all the DDR we have, that gives us a chance to not
bother where DMA buffers are allocated - any part of DDR is OK.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
arc: arcv1: Disable master/slave check 2017-06-29T16:34:10+00:00 Alexey Brodkin abrodkin@synopsys.com 2017-04-11T15:24:25+00:00 cf628f772ef2faa9d39563dd42bd2fadf2b194f9 ARCompact cores are not supposed to be used in SMP designs (this doesn't stop people from creation of heterogeneous chips, for an example keep reading) so there's no point in checking ARCNUM and halting somebody if we build for ARC700. Moreover on AXS101 board we have ARC770 in the ASIC together with other ARC cores and ARC770 happens to be the last node in JTAG chain with ARCNUM = 4. And existing check halts the one and only core we want keep running. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> 
ARCompact cores are not supposed to be used in SMP designs
(this doesn't stop people from creation of heterogeneous chips,
for an example keep reading) so there's no point in
checking ARCNUM and halting somebody if we build for ARC700.

Moreover on AXS101 board we have ARC770 in the ASIC together with
other ARC cores and ARC770 happens to be the last node in JTAG chain
with ARCNUM = 4. And existing check halts the one and only core we
want keep running.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
arc: Make u-boot-arc.h a private header 2017-06-05T15:02:31+00:00 Simon Glass sjg@chromium.org 2017-05-17T14:22:47+00:00 d6d2d0b5e2ab167dad00345aea7b93ec74a7b3e3 Rather than including this arch-specific header file in common.h, include it from within arc's u-boot.h header. Signed-off-by: Simon Glass <sjg@chromium.org> 
Rather than including this arch-specific header file in common.h, include
it from within arc's u-boot.h header.

Signed-off-by: Simon Glass <sjg@chromium.org>
board_f: Rename initdram() to dram_init() 2017-04-13T13:40:57+00:00 Simon Glass sjg@chromium.org 2017-04-06T18:47:05+00:00 f1683aa73c31db0a025e0254e6ce1ee7e56aad3e This allows us to use the same DRAM init function on all archs. Add a dummy function for arc, which does not use DRAM init here. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Dummy function on nios2] Signed-off-by: Tom Rini <trini@konsulko.com> 
This allows us to use the same DRAM init function on all archs. Add a
dummy function for arc, which does not use DRAM init here.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Dummy function on nios2]
Signed-off-by: Tom Rini <trini@konsulko.com>
ARCv2: SLC: Make sure busy bit is set properly on SLC flushing 2017-04-11T14:54:31+00:00 Alexey Brodkin abrodkin@synopsys.com 2017-04-05T14:50:09+00:00 40a808f173008729a0c631ab84693b6a2b0dcfc9 As reported in STAR 9001165532, an SLC control reg read (for checking busy state) right after SLC invalidate command may incorrectly return NOT busy causing software to NOT spin-wait while operation is underway. (and for some reason this only happens if L1 cache is also disabled - as required by IOC programming model) Suggested workaround is to do an additional Control Reg read, which ensures the 2nd read gets the right status. Same fix made in Linux kernel: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c70c473396cbdec1168a6eff60e13029c0916854 Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> 
As reported in STAR 9001165532, an SLC control reg read (for checking
busy state) right after SLC invalidate command may incorrectly return
NOT busy causing software to NOT spin-wait while operation is underway.
(and for some reason this only happens if L1 cache is also disabled - as
required by IOC programming model)

Suggested workaround is to do an additional Control Reg read, which
ensures the 2nd read gets the right status.

Same fix made in Linux kernel:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c70c473396cbdec1168a6eff60e13029c0916854

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
board_f: Make relocation functions generic 2017-04-05T20:36:57+00:00 Simon Glass sjg@chromium.org 2017-03-31T14:40:38+00:00 e47b2d674f0acd137412535647cb3072bf11dbb0 This header file is used by three archs. It could be used by all of them since relocation is a common function. Move it into a generic file. Signed-off-by: Simon Glass <sjg@chromium.org> 
This header file is used by three archs. It could be used by all of them
since relocation is a common function. Move it into a generic file.

Signed-off-by: Simon Glass <sjg@chromium.org>
board_f: Make init_helpers generic 2017-04-05T20:36:56+00:00 Simon Glass sjg@chromium.org 2017-03-31T14:40:37+00:00 96d4b75c0d7f1bbbbde19e6225b09b1f7e7b60fe This header file is used by two archs. It could be used by all of them since it allows the cache to be on during relocation. Move it into a generic file. Signed-off-by: Simon Glass <sjg@chromium.org> 
This header file is used by two archs. It could be used by all of them
since it allows the cache to be on during relocation. Move it into a
generic file.

Signed-off-by: Simon Glass <sjg@chromium.org>
arcv2: Halt non-master cores 2017-03-31T19:09:36+00:00 Alexey Brodkin abrodkin@synopsys.com 2017-03-30T14:50:45+00:00 6cba327bd96f90818a8beede51405228c54a5251 Even though we expect only master core to execute U-Boot code let's make sure even if for some reason slave cores attempt to execute U-Boot in parallel with master they get halted very early. If platform wants it may kick-start slave cores before passing control to say Linux kernel or any other application that want to see all cores of SMP SoC up and running. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> 
Even though we expect only master core to execute U-Boot code
let's make sure even if for some reason slave cores attempt to
execute U-Boot in parallel with master they get halted very early.

If platform wants it may kick-start slave cores before passing control
to say Linux kernel or any other application that want to see all cores
of SMP SoC up and running.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>