u-boot.git/arch/arc, branch v2018.01

ARC: cache: explicitly initialize "*_exists" variables

2017-12-11T08:36:22+00:00

dcache_exists, icache_exists, slc_exists and ioc_exists global
variables in "arch/arc/lib/cache.c" remain uninitialized if
SoC doesn't have corresponding HW.

This happens because we use the next constructions for their
definition and initialization:
-------------------------->>---------------------
int ioc_exists __section(".data");

if (/* condition */)
		ioc_exists = 1;
-------------------------->>---------------------

That's quite a non-trivial issue as one may think of it.
The point is we intentionally put those variables in ".data" section
so they might survive relocation (remember we initilaize them very early
before relocation and continue to use after reloaction). While being
non-initialized and not explicitly put in .data section they would end-up
in ".bss" section which by definition is filled with zeroes.
But since we place those variables in .data section we need to care
about their proper initialization ourselves.

Also while at it we change their type to "bool" as more appropriate.

Signed-off-by: Eugeniy Paltsev 
Signed-off-by: Alexey Brodkin

ARC: add defines of some cache and xCCM AUX registers

2017-12-11T08:36:22+00:00

Signed-off-by: Eugeniy Paltsev 
Signed-off-by: Alexey Brodkin

ARC: add macro to get CPU id

2017-12-11T08:36:22+00:00

ARCNUM [15:8] field in ARC_AUX_IDENTITY register allows us to
uniquely identify each core in a multi-core system.

I.e. with help of this macro each core may get its index in SMP system.

Signed-off-by: Eugeniy Paltsev 
Signed-off-by: Alexey Brodkin

ARC: add asm/gpio.h to fix compilation error with CONFIG_CMD_GPIO

2017-12-10T18:13:05+00:00

With CONFIG_CMD_GPIO compilation reports error:
-------------------------->8---------------------
common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory
 #include 
                      ^
-------------------------->8---------------------

Signed-off-by: Eugeniy Paltsev 
Signed-off-by: Alexey Brodkin

arc: cache: Add required NOPs after invalidation of instruction cache

2017-11-24T16:38:23+00:00

As per ARC HS databook (see chapter 5.3.3.2) it is required to add
3 NOPs after each write to IC_IVIC which we do from now on.

Signed-off-by: Alexey Brodkin 
Cc: Eugeniy Paltsev

arc: bootm: Move slave cores kick-starting under !fake

2017-11-24T16:38:07+00:00

Currently slave cores will be kick-started even if we want
to dry run bootm which is not what we really want.

Signed-off-by: Alexey Brodkin 
Cc: Eugeniy Paltsev

arc: Use asm-generic/io.h

2017-10-03T01:52:20+00:00

Convert the arc architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for arc this is primarily a matter of removing code.

Feedback from architecture maintainers is welcome.

Signed-off-by: Paul Burton 
Cc: Alexey Brodkin 
Acked-by: Alexey Brodkin

env: Rename getenv/_f() to env_get()

2017-08-16T12:30:24+00:00

We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.

Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.

Suggested-by: Wolfgang Denk 
Signed-off-by: Simon Glass

arc: Add support for HS Development Kit board

2017-06-29T16:34:10+00:00

ARC HS Development Kit board is a new low-cost
development platform sporting ARC HS38 in real silicon
with nice set of features such as:
 * Quad-core ARC HS38 with 512 kB L2 cache and running @1GHz
 * 4Gb of DDR (we use only lowest 1Gb out of it now)
 * Lots of DesigWare peripherals
 * Different connectivity modules:
     - Synopsys HAPS HT3
     - Arduino-compatible connector
     - MikroBUS

This initial commit supports the following peripherals:
 * UART (DW 8250)
 * Ethernet (DW GMAC)
 * SD/MMC (DW Mobile Storage)
 * USB 1.1 & 2.0

Signed-off-by: Alexey Brodkin

arcv2: Set IOC aperture so it covers available DDR

2017-06-29T16:34:10+00:00

We used to use the same memory layout and size for a couple of
boards and thus we just hardcoding IOC aperture start and size.

Now when we're getting more boards with more memory on board we
need to have an ability to set IOC so it matches real DDR layout
and size.

Even though it is not really a must but for simplicity we assume
IOC covers all the DDR we have, that gives us a chance to not
bother where DMA buffers are allocated - any part of DDR is OK.

Signed-off-by: Alexey Brodkin