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<title>u-boot.git/arch/arm/Kconfig, branch next</title>
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<updated>2026-08-07T12:47:08Z</updated>
<entry>
<title>mach-snapdragon: Kconfig: changes / additions to support SPL</title>
<updated>2026-08-07T12:47:08Z</updated>
<author>
<name>Michael Srba</name>
<email>Michael.Srba@seznam.cz</email>
</author>
<published>2026-05-21T20:37:19Z</published>
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<id>urn:sha1:c88264b083176422a7de34d7f767f332f50bb408</id>
<content type='text'>
Select SUPPORT_SPL so SPL build can be enabled, disable SYSRESET_PSCI in SPL.
(SPL runs in EL3, so if SPL itself doesn't provide PSCI, nothing else will.)

Also select (SPL_)OF_LIVE and (SPL_)EVENT, which are needed to fix up
upstream dt to make usb work, and in general don't make sense to
disable in SPL as long as we're not running out of SRAM.

Mirror u-boot proper selections like GPIO and pinctrl to ensure consistent
behavior, and select SPL_SPRINTF, SPL_LIBCOMMON_SUPPORT etc for similar
reasons.

Signed-off-by: Michael Srba &lt;Michael.Srba@seznam.cz&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
Link: https://patch.msgid.link/20260521-qcom_spl-v9-7-c108ebe8ff4e@seznam.cz
[casey: kconfig fixes, remove stub ft_board_setup and disable OF_BOARD_SETUP]
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>mach-snapdragon: support parsing memory map from SMEM</title>
<updated>2026-08-07T12:32:14Z</updated>
<author>
<name>Casey Connolly</name>
<email>casey.connolly@linaro.org</email>
</author>
<published>2026-05-04T18:57:41Z</published>
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<id>urn:sha1:ed40a06be83278296d7c012096f6f4a1b31c3dd4</id>
<content type='text'>
It is possible to derive the memory map for a Qualcomm platform from the
SMEM shared memory region. The memory map is populated by the preloader.

Introduce support for parsing this data and using it to populate
U-Boot's memory map. Since we aren't yet sure if this will work for
every platform, it is not yet used in all cases, if U-Boot is booted
with an internal FDT which has the memory map defined, this will
be used instead.

If the FDT is internal FDT with no memory map defined, then U-Boot will
try to use SMEM. This should remove the need to define the memory map
statically in a U-Boot overlay for boards that don't chainload.

Tested-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260504-b4-modernise-smem-v2-13-c01ec2ff3886@linaro.org
[casey: imply SOC_QCOM in ARCH_SNAPDRAGON so SMEM is always built]
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>smem: drop drivers/smem</title>
<updated>2026-08-07T12:32:14Z</updated>
<author>
<name>Casey Connolly</name>
<email>casey.connolly@linaro.org</email>
</author>
<published>2026-05-04T18:57:30Z</published>
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<id>urn:sha1:a881d3c2e14b9075b43b2cd2de5f2ae834ce1934</id>
<content type='text'>
Remove the old qcom SMEM driver port and the sandbox stub
implementation.

Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Tested-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260504-b4-modernise-smem-v2-2-c01ec2ff3886@linaro.org
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>Revert "dm: SMEM (Shared memory) uclass"</title>
<updated>2026-08-07T12:32:14Z</updated>
<author>
<name>Casey Connolly</name>
<email>casey.connolly@linaro.org</email>
</author>
<published>2026-05-04T18:57:29Z</published>
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<id>urn:sha1:a3947bcf9e5d4c8c2039e0fb24101136febb6fda</id>
<content type='text'>
SMEM is a highly Qualcomm specific interface, while having a dedicated
UCLASS for it offers a nice abstraction, for things like memory layout
parsing we need to use it before the driver model is available.

Therefore, it doesn't make sense to fit SMEM into the driver model.
Instead let's adopt a model closer to Linux, and parse SMEM really early
during boot (as soon as we have the FDT).

This reverts commit 7b384eccc785b596f68448b155cbda26df57fb23.

Reviewed-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Tested-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260504-b4-modernise-smem-v2-1-c01ec2ff3886@linaro.org
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>Kconfig: arm: restyle</title>
<updated>2026-06-25T20:06:18Z</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2026-06-09T01:26:02Z</published>
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<id>urn:sha1:0caac78a06f21cbe25460bf8c0dbe8094f73cb73</id>
<content type='text'>
Restyle all Kconfigs for "arm":
Menu entries   : no space left
Menu attributes: 1 TAB
Help text      : 1 TAB + 2 spaces
Replace '---help---' by 'help'

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "This series introduces initial U-Boot support for mach-axiado AX3005 SCM3005 board, a quad-core ARM Cortex-A53 (ARMv8/ARM64) platform."</title>
<updated>2026-06-11T13:51:13Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-06-10T20:52:36Z</published>
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<id>urn:sha1:3bd186835498c544a6cf1efe8d1e2bead1e233c4</id>
<content type='text'>
Siu Ming Tong &lt;smtong@axiado.com&gt; says:

Patch 1 adds the device tree files: an SoC-level DTSI describing
GIC-v3, Cadence/Zynq UART, a fixed reference clock, and spin-table
secondary CPU boot, plus a board-level DTS setting the console to
uart3 at 115200 baud with 2 GB DRAM at 0x80000000.

Patch 2 adds mach-axiado to support Axiado SoC-based boards, Kconfig
plumbing (AXIADO_AX3005 and TARGET_SCM3005), defconfig, board source
with ft_board_setup() and a MAINTAINERS entry.

Tested on SCM3005 EVK hardware

Link: https://lore.kernel.org/r/20260527-review-v2-0-10daefddf47d@axiado.com
</content>
</entry>
<entry>
<title>grm: axiado: Add AX3005 based SCM3005 board support</title>
<updated>2026-06-10T20:52:25Z</updated>
<author>
<name>Siu Ming Tong</name>
<email>smtong@axiado.com</email>
</author>
<published>2026-05-28T02:38:37Z</published>
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<id>urn:sha1:3f1821162638acc34b47b6c68f3bc8bab365c08d</id>
<content type='text'>
Introduce mach-axiado to support Axiado SoC-based boards. This adds
the platform Kconfig and build infrastructure, along with initial
SCM3005 board support using the AX3005 SoC.

Introduces AXIADO_AX3005, which selects ARM64, driver
model, GIC-v3, and Zynq UART. TARGET_SCM3005 selects ARCH_AXIADO,
allowing future SoC variants to share the platform configuration.
Secondary cores use spin-table boot. ft_board_setup() corrects
the cpu-release-addr in the FDT, which arch_fixup_fdt() overwrites
with the post-relocation address.
Add U-Boot board support for the Axiado AX3005 based targets, a quad-core
ARM Cortex-A53 (ARMv8) platform.

Tested-by: Siu Ming Tong &lt;smtong@axiado.com&gt;
Signed-off-by: Karthikeyan Mitran &lt;kmitran@axiado.com&gt;
Signed-off-by: Siu Ming Tong &lt;smtong@axiado.com&gt;
</content>
</entry>
<entry>
<title>arm: dts: Switch Apple silicon devices to dts/upstream</title>
<updated>2026-05-12T18:11:08Z</updated>
<author>
<name>Janne Grunau</name>
<email>j@jannau.net</email>
</author>
<published>2026-05-07T08:05:51Z</published>
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<id>urn:sha1:5aec4e746f9ef2421c2078ab93f4d3dbb81a519f</id>
<content type='text'>
The device tree on Apple silicon devices is passed from a previous
bootloader stage. The bootloader fills in dynamic information so
u-boot can not use its own device tree.
As documented in doc/board/apple/m1.rst it is possible to build boot
bundles (bootloader + device tree + gzipped u-boot binary). These are
useful for testing.
Instead of using u-boot's own device trees for M1 (t8103) devices use
upstream device trees from dts/upstream/src/arm64/apple. The u-boot
device trees have not seen updates since 2022. The upstream linux device
trees have feature parity for the M1 devices. In addition linux has
device trees for M1 Pro/Max/Ultra, M2 and M2 Pro/Max/Ultra devices.
Keep t8103-j274 as default device tree to avoid further updates.

Signed-off-by: Janne Grunau &lt;j@jannau.net&gt;
Acked-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
</content>
</entry>
<entry>
<title>arm: Add ARMv8-M aarch32 support</title>
<updated>2026-04-13T23:34:02Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2026-03-29T23:14:12Z</published>
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<id>urn:sha1:b0d731d9563cd6fb8bd6c8304065e550d97a22c7</id>
<content type='text'>
Add configuration for ARMv8-M aarch32 core, which are currently
Cortex-M23/M33 cores. These cores are treated similar to ARMv7-M
cores, except the code has to be compiled with matching compiler
-march=armv8-m.main flag . These cores have no MMU, they have MPU,
which is currently not configured.

Unlike ARMv7-M, these cores have 512 interrupt vectors. While the
SYS_ARM_ARCH should be set to 8, it is set to 7 because all of the
initialization code is built from arch/arm/cpu/armv7m and not armv8.
Furthermore, CONFIG_ARM64 must be disabled, although DTs for devices
using these cores do come from arch/arm64/boot/dts.

To avoid excess duplication in Makefiles, introduce one new Kconfig
symbol, CPU_V7M_V8M. The CPU_V7M_V8M cover both ARMv7-M and ARMv8-M
cores.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Acked-by: Udit Kumar &lt;u-kumar1@ti.com&gt;
</content>
</entry>
<entry>
<title>arm: k3: Kconfig: Enable fTPM and RPMB support</title>
<updated>2026-03-10T18:35:18Z</updated>
<author>
<name>Shiva Tripathi</name>
<email>s-tripathi1@ti.com</email>
</author>
<published>2026-02-25T11:24:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8bc2a5196c1c0bb5dbdaca073323da0015a0de37'/>
<id>urn:sha1:8bc2a5196c1c0bb5dbdaca073323da0015a0de37</id>
<content type='text'>
Enable firmware TPM (fTPM) support via OP-TEE for K3 platforms with
MMC hardware. This provides TPM 2.0 functionality through
Microsoft's fTPM Trusted Application running in OP-TEE secure world,
using eMMC RPMB as persistent storage.

fTPM support in U-Boot provides the foundation for measured boot
and disk encryption use cases.

The ARM64 condition ensures these apply only to A53/A72 cores and the
MMC condition ensures fTPM is enabled only on platforms with eMMC
hardware support.

Signed-off-by: Shiva Tripathi &lt;s-tripathi1@ti.com&gt;
Acked-by: Andrew Davis &lt;afd@ti.com&gt;
</content>
</entry>
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