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<title>u-boot.git/arch/arm/cpu/arm11, branch v2016.01</title>
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<updated>2015-08-13T00:47:48Z</updated>
<entry>
<title>ARM: cache: implement a default weak flush_cache() function</title>
<updated>2015-08-13T00:47:48Z</updated>
<author>
<name>Wu, Josh</name>
<email>Josh.wu@atmel.com</email>
</author>
<published>2015-07-27T03:40:17Z</published>
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<id>urn:sha1:633b6ccedf9d536fd93299b2207a5227dedd987c</id>
<content type='text'>
Current many cpu use the same flush_cache() function, which just call
the flush_dcache_range().
So implement a weak flush_cache() for all the cpus to use.

In original weak flush_cache() in arch/arm/lib/cache.c, there has some
code for ARM1136 &amp; ARM926ejs. But in the arch/arm/cpu/arm1136/cpu.c and
arch/arm/cpu/arm926ejs/cache.c, there implements a real flush_cache()
function as well. That means the original code for ARM1136 &amp; ARM926ejs
in weak flush_cache() of arch/arm/lib/cache.c is totally useless.

So in this patch remove such code in flush_cache() and only call
flush_dcache_range().

Signed-off-by: Josh Wu &lt;josh.wu@atmel.com&gt;
</content>
</entry>
<entry>
<title>ARM: cache: add an empty stub function for invalidate/flush dcache</title>
<updated>2015-08-13T00:47:47Z</updated>
<author>
<name>Wu, Josh</name>
<email>Josh.wu@atmel.com</email>
</author>
<published>2015-07-27T03:40:16Z</published>
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<id>urn:sha1:387871a10edc777a5d94bfdbd6b86e493991826e</id>
<content type='text'>
Since some driver like ohci, lcd used dcache functions. But some ARM
cpu don't implement the invalidate_dcache_range()/flush_dcache_range()
functions.

To avoid compiling errors this patch adds an weak empty stub function
for all ARM cpu in arch/arm/lib/cache.c.
And ARM cpu still can implemnt its own cache functions on the cpu folder.

Signed-off-by: Josh Wu &lt;josh.wu@atmel.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>arm1136/arm1176: Merge cache handling code</title>
<updated>2015-08-13T00:47:41Z</updated>
<author>
<name>Alexander Stein</name>
<email>alexanders83@web.de</email>
</author>
<published>2015-07-24T07:22:10Z</published>
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<id>urn:sha1:2085ae74dee47ed3da63416aac0305936b43eeea</id>
<content type='text'>
As both cores are similar merge the cache handling code for both CPUs
to arm11 directory.

Signed-off-by: Alexander Stein &lt;alexanders83@web.de&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Tested-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
[trini: Add hunk to arch/arm/cpu/arm1136/Makefile]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
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