u-boot.git/arch/arm/cpu/arm_cortexa8, branch v2010.06

ARM: Align stack to 8 bytes

2010-06-22T20:15:07Z

The ARM ABI requires that the stack be aligned to 8 bytes as it is noted in Procedure Call Standard for the ARM Architecture: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042d/index.html Unaligned SP also causes the problem with variable-length arrays allocation when VLA address becomes less than stack pointer during aligning of this address, so the next 'push' in the stack overwrites first 4 bytes of VLA. Signed-off-by: Vitaly Kuzmichev Tested on tx25(mx25), imx27lite(mx27), qong(mx31) and trab(s3c2400) Tested-by: Wolfgang Denk

arch/arm/cpu/arm_cortexa8/omap3/cache.S: make build with older tools

2010-06-18T14:01:07Z

The push / pop instructions used in this file are available only with more recent tool chains: cache.S: Assembler messages: cache.S:133: Error: bad instruction `push {r0,r1,r2,lr}' cache.S:160: Error: bad instruction `pop {r1,r2,r3,pc}' cache.S:164: Error: bad instruction `push {r0,r1,r2,lr}' cache.S:191: Error: bad instruction `pop {r1,r2,r3,pc}' Change push/pop into stmfd/ldmfd instructions to support older versions of binutils as well. I verified that the modified source code generates exactly the same binary code. Signed-off-by: Wolfgang Denk Cc: Sandeep Paulraj Cc: Tom Rix

AM35x: Add support for EMIF4

2010-06-08T15:07:19Z

This patch adds support for the EMIF4 interface available in the AM35x processors. Signed-off-by: Vaibhav Hiremath Signed-off-by: Sanjeev Premi Signed-off-by: Sandeep Paulraj

omap3: Consolidate SDRC related operations

2010-06-08T15:07:18Z

Consolidated SDRC related functions into one file - sdrc.c And also replaced sdrc_init with generic memory init function (mem_init), this generalization of omap memory setup is necessary to support the new emif4 interface introduced in AM3517. Signed-off-by: Vaibhav Hiremath Signed-off-by: Sandeep Paulraj

omap3: Calculate CS1 size only when SDRC is

2010-06-08T15:07:18Z

initialized for CS1 From: Vaibhav Hiremath The patch makes sure that size for SDRC CS1 gets calculated only when the CS1 SDRC is initialized. Signed-off-by: Vaibhav Hiremath Signed-off-by: Sandeep Paulraj

ARM: */timer.c: fix spelling and vertical alignment

2010-05-21T21:13:18Z

Signed-off-by: Wolfgang Denk

MX51: Fix MX51 CPU detect message

2010-05-05T07:48:41Z

Fix MX51 CPU detect message. Original string was: CPU: Freescale i.MX51 family 3.0V at 800 MHz which can be misinterpreted as 3.0 Volts instead of the silicon revision. ,change it to: CPU: Freescale i.MX51 family rev3.0 at 800 MHz Signed-off-by: Fabio Estevam

Moved board specific values in config file

2010-04-30T10:23:24Z

The lowlevel_init file contained some hard-coded values to setup the RAM. These board related values are moved into the board configuration file. Signed-off-by: Stefano Babic

SAMSUNG: make s5p common gpio functions

2010-04-30T10:23:23Z

Because of s5pc1xx gpio is same as s5p seires SoC, move gpio functions to drvier/gpio/ and modify structure's name from s5pc1xx_ to s5p_. Signed-off-by: Minkyu Kang

arm: Move cpu/$CPU to arch/arm/cpu/$CPU

2010-04-13T07:13:24Z

Signed-off-by: Peter Tyser