u-boot.git/arch/arm/cpu/armv7/mx5/clock.c, branch v2012.07

mx53: Fix mask for SATA reference clock

2012-07-07T12:07:25Z

SATA_ALT_REF_CLK field corresponds to bits 1 and 2 of offset 0x180c. Fix the mask for these bits. Signed-off-by: Fabio Estevam

mx5: Add clock config interface

2012-05-15T06:31:32Z

mx5: Add clock config interface Add clock config interface support, so that we can configure CPU or DDR clock in the later init Signed-off-by: Jason Liu Signed-off-by: Eric Miao Signed-off-by: Fabio Estevam

imx-common: Factor out get_ahb_clk()

2012-05-15T06:31:32Z

get_ahb_clk() is a common function between mx5 and mx6. Place it into imx-common directory. Cc: Dirk Behme Signed-off-by: Fabio Estevam

MX53: add function to set SATA clock to internal

2012-05-15T06:31:30Z

The MX53 SATA interface can use an internal clock (USB PHY1) instead of an external clock. This is an undocumented feature, but used on most Freescale's evaluation boards, such as MX53-loco. As stated by Freescale's support: Fuses (but not pins) may be used to configure SATA clocks. Particularly the i.MX53 Fuse_Map contains the next information about configuring SATA clocks : SATA_ALT_REF_CLK[1:0] (offset 0x180C) '00' - 100MHz (External) '01' - 50MHz (External) '10' - 120MHz, internal (USB PHY) '11' - Reserved Signed-off-by: Stefano Babic CC: Fabio Estevam

MX5: Add definitions for SATA controller

2012-05-15T06:31:30Z

Add base address and MXC_SATA_CLK to return the clock used for the SATA controller. Signed-off-by: Stefano Babic CC: Fabio Estevam CC: Dirk Behme

USB: MX5: add helper functions to enable USB clocks

2011-12-11T13:49:25Z

Signed-off-by: Wolfgang Grandegger Cc: Stefano Babic Cc: Remy Bohmer Cc: Wolfgang Grandegger Cc: Jason Liu V2: Fix spacing in crm_regs.h

mx5: Correct a warning in clock.c

2011-12-06T22:59:39Z

This corects the warning below, obtained with my gcc 4.6 compiler. arch/arm/cpu/armv7/mx5/libmx5.o: In function `decode_pll': arch/arm/cpu/armv7/mx5/clock.c:94: undefined reference to `__aeabi_uldivmod' I am not able to test this on MX5x hardware, but it does improve the MAKEALL output for me. You may already have a similar patch, but I cannot see it on the list. Signed-off-by: Simon Glass

MX5: Clean up the output of "clocks" command

2011-09-30T20:01:05Z

The new output looks like this: > clocks PLL1 800 MHz PLL2 665 MHz PLL3 216 MHz AHB 133000 kHz IPG 66500 kHz IPG PERCLK 665000 kHz Signed-off-by: Marek Vasut Acked-by: Stefano Babic Acked-by: Jason Liu

MX5: Add AHB clock reporting and fix IPG clock reporting

2011-09-30T20:01:05Z

Signed-off-by: Marek Vasut Cc: Stefano Babic Cc: Jason Liu Acked-by: Jason Liu

MX5: Modify the PLL decoding algorithm

2011-09-30T20:01:05Z

The PLL decoding algorithm didn't take into account many configuration bits. Adjust it according to Linux kernel. Also, add PLL4 for MX53. Signed-off-by: Marek Vasut Cc: Stefano Babic Cc: Jason Hui Tested-by: Jason Liu