<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/arch/arm/cpu/armv7/mx7ulp/Makefile, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>imx: reorganize IMX code as other SOCs</title>
<updated>2017-07-12T08:17:44+00:00</updated>
<author>
<name>Stefano Babic</name>
<email>sbabic@denx.de</email>
</author>
<published>2017-06-29T08:16:06+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=552a848e4f75e224515269a84a1155c84b762bc7'/>
<id>552a848e4f75e224515269a84a1155c84b762bc7</id>
<content type='text'>
Change is consistent with other SOCs and it is in preparation
for adding SOMs. SOC's related files are moved from cpu/ to
mach-imx/&lt;SOC&gt;.

This change is also coherent with the structure in kernel.

Signed-off-by: Stefano Babic &lt;sbabic@denx.de&gt;

CC: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
CC: Akshay Bhat &lt;akshaybhat@timesys.com&gt;
CC: Ken Lin &lt;Ken.Lin@advantech.com.tw&gt;
CC: Marek Vasut &lt;marek.vasut@gmail.com&gt;
CC: Heiko Schocher &lt;hs@denx.de&gt;
CC: "Sébastien Szymanski" &lt;sebastien.szymanski@armadeus.com&gt;
CC: Christian Gmeiner &lt;christian.gmeiner@gmail.com&gt;
CC: Stefan Roese &lt;sr@denx.de&gt;
CC: Patrick Bruenn &lt;p.bruenn@beckhoff.com&gt;
CC: Troy Kisky &lt;troy.kisky@boundarydevices.com&gt;
CC: Nikita Kiryanov &lt;nikita@compulab.co.il&gt;
CC: Otavio Salvador &lt;otavio@ossystems.com.br&gt;
CC: "Eric Bénard" &lt;eric@eukrea.com&gt;
CC: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
CC: Ye Li &lt;ye.li@nxp.com&gt;
CC: Peng Fan &lt;peng.fan@nxp.com&gt;
CC: Adrian Alonso &lt;adrian.alonso@nxp.com&gt;
CC: Alison Wang &lt;b18965@freescale.com&gt;
CC: Tim Harvey &lt;tharvey@gateworks.com&gt;
CC: Martin Donnelly &lt;martin.donnelly@ge.com&gt;
CC: Marcin Niestroj &lt;m.niestroj@grinn-global.com&gt;
CC: Lukasz Majewski &lt;lukma@denx.de&gt;
CC: Adam Ford &lt;aford173@gmail.com&gt;
CC: "Albert ARIBAUD (3ADEV)" &lt;albert.aribaud@3adev.fr&gt;
CC: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
CC: Soeren Moch &lt;smoch@web.de&gt;
CC: Richard Hu &lt;richard.hu@technexion.com&gt;
CC: Wig Cheng &lt;wig.cheng@technexion.com&gt;
CC: Vanessa Maegima &lt;vanessa.maegima@nxp.com&gt;
CC: Max Krummenacher &lt;max.krummenacher@toradex.com&gt;
CC: Stefan Agner &lt;stefan.agner@toradex.com&gt;
CC: Markus Niebel &lt;Markus.Niebel@tq-group.com&gt;
CC: Breno Lima &lt;breno.lima@nxp.com&gt;
CC: Francesco Montefoschi &lt;francesco.montefoschi@udoo.org&gt;
CC: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
CC: Scott Wood &lt;oss@buserror.net&gt;
CC: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
CC: Anatolij Gustschin &lt;agust@denx.de&gt;
CC: Simon Glass &lt;sjg@chromium.org&gt;
CC: "Andrew F. Davis" &lt;afd@ti.com&gt;
CC: "Łukasz Majewski" &lt;l.majewski@samsung.com&gt;
CC: Patrice Chotard &lt;patrice.chotard@st.com&gt;
CC: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
CC: Hans de Goede &lt;hdegoede@redhat.com&gt;
CC: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
CC: Stephen Warren &lt;swarren@nvidia.com&gt;
CC: Andre Przywara &lt;andre.przywara@arm.com&gt;
CC: "Álvaro Fernández Rojas" &lt;noltari@gmail.com&gt;
CC: York Sun &lt;york.sun@nxp.com&gt;
CC: Xiaoliang Yang &lt;xiaoliang.yang@nxp.com&gt;
CC: Chen-Yu Tsai &lt;wens@csie.org&gt;
CC: George McCollister &lt;george.mccollister@gmail.com&gt;
CC: Sven Ebenfeld &lt;sven.ebenfeld@gmail.com&gt;
CC: Filip Brozovic &lt;fbrozovic@gmail.com&gt;
CC: Petr Kulhavy &lt;brain@jikos.cz&gt;
CC: Eric Nelson &lt;eric@nelint.com&gt;
CC: Bai Ping &lt;ping.bai@nxp.com&gt;
CC: Anson Huang &lt;Anson.Huang@nxp.com&gt;
CC: Sanchayan Maity &lt;maitysanchayan@gmail.com&gt;
CC: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
CC: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
CC: Gary Bisson &lt;gary.bisson@boundarydevices.com&gt;
CC: Alexander Graf &lt;agraf@suse.de&gt;
CC: u-boot@lists.denx.de
Reviewed-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Reviewed-by: Christian Gmeiner &lt;christian.gmeiner@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Change is consistent with other SOCs and it is in preparation
for adding SOMs. SOC's related files are moved from cpu/ to
mach-imx/&lt;SOC&gt;.

This change is also coherent with the structure in kernel.

Signed-off-by: Stefano Babic &lt;sbabic@denx.de&gt;

CC: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
CC: Akshay Bhat &lt;akshaybhat@timesys.com&gt;
CC: Ken Lin &lt;Ken.Lin@advantech.com.tw&gt;
CC: Marek Vasut &lt;marek.vasut@gmail.com&gt;
CC: Heiko Schocher &lt;hs@denx.de&gt;
CC: "Sébastien Szymanski" &lt;sebastien.szymanski@armadeus.com&gt;
CC: Christian Gmeiner &lt;christian.gmeiner@gmail.com&gt;
CC: Stefan Roese &lt;sr@denx.de&gt;
CC: Patrick Bruenn &lt;p.bruenn@beckhoff.com&gt;
CC: Troy Kisky &lt;troy.kisky@boundarydevices.com&gt;
CC: Nikita Kiryanov &lt;nikita@compulab.co.il&gt;
CC: Otavio Salvador &lt;otavio@ossystems.com.br&gt;
CC: "Eric Bénard" &lt;eric@eukrea.com&gt;
CC: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
CC: Ye Li &lt;ye.li@nxp.com&gt;
CC: Peng Fan &lt;peng.fan@nxp.com&gt;
CC: Adrian Alonso &lt;adrian.alonso@nxp.com&gt;
CC: Alison Wang &lt;b18965@freescale.com&gt;
CC: Tim Harvey &lt;tharvey@gateworks.com&gt;
CC: Martin Donnelly &lt;martin.donnelly@ge.com&gt;
CC: Marcin Niestroj &lt;m.niestroj@grinn-global.com&gt;
CC: Lukasz Majewski &lt;lukma@denx.de&gt;
CC: Adam Ford &lt;aford173@gmail.com&gt;
CC: "Albert ARIBAUD (3ADEV)" &lt;albert.aribaud@3adev.fr&gt;
CC: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
CC: Soeren Moch &lt;smoch@web.de&gt;
CC: Richard Hu &lt;richard.hu@technexion.com&gt;
CC: Wig Cheng &lt;wig.cheng@technexion.com&gt;
CC: Vanessa Maegima &lt;vanessa.maegima@nxp.com&gt;
CC: Max Krummenacher &lt;max.krummenacher@toradex.com&gt;
CC: Stefan Agner &lt;stefan.agner@toradex.com&gt;
CC: Markus Niebel &lt;Markus.Niebel@tq-group.com&gt;
CC: Breno Lima &lt;breno.lima@nxp.com&gt;
CC: Francesco Montefoschi &lt;francesco.montefoschi@udoo.org&gt;
CC: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
CC: Scott Wood &lt;oss@buserror.net&gt;
CC: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
CC: Anatolij Gustschin &lt;agust@denx.de&gt;
CC: Simon Glass &lt;sjg@chromium.org&gt;
CC: "Andrew F. Davis" &lt;afd@ti.com&gt;
CC: "Łukasz Majewski" &lt;l.majewski@samsung.com&gt;
CC: Patrice Chotard &lt;patrice.chotard@st.com&gt;
CC: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
CC: Hans de Goede &lt;hdegoede@redhat.com&gt;
CC: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
CC: Stephen Warren &lt;swarren@nvidia.com&gt;
CC: Andre Przywara &lt;andre.przywara@arm.com&gt;
CC: "Álvaro Fernández Rojas" &lt;noltari@gmail.com&gt;
CC: York Sun &lt;york.sun@nxp.com&gt;
CC: Xiaoliang Yang &lt;xiaoliang.yang@nxp.com&gt;
CC: Chen-Yu Tsai &lt;wens@csie.org&gt;
CC: George McCollister &lt;george.mccollister@gmail.com&gt;
CC: Sven Ebenfeld &lt;sven.ebenfeld@gmail.com&gt;
CC: Filip Brozovic &lt;fbrozovic@gmail.com&gt;
CC: Petr Kulhavy &lt;brain@jikos.cz&gt;
CC: Eric Nelson &lt;eric@nelint.com&gt;
CC: Bai Ping &lt;ping.bai@nxp.com&gt;
CC: Anson Huang &lt;Anson.Huang@nxp.com&gt;
CC: Sanchayan Maity &lt;maitysanchayan@gmail.com&gt;
CC: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
CC: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
CC: Gary Bisson &lt;gary.bisson@boundarydevices.com&gt;
CC: Alexander Graf &lt;agraf@suse.de&gt;
CC: u-boot@lists.denx.de
Reviewed-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Reviewed-by: Christian Gmeiner &lt;christian.gmeiner@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>imx: mx7ulp: Add soc level initialization codes and functions</title>
<updated>2017-03-17T08:27:08+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2017-02-22T08:21:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1b409828b17605b2fdbe47b11d4ea1189f32f1e8'/>
<id>1b409828b17605b2fdbe47b11d4ea1189f32f1e8</id>
<content type='text'>
Implement soc level functions to get cpu rev, reset cause, enable cache,
etc. We will disable the wdog and init clocks in s_init at very early u-boot
phase.

Since the we are seeking the way to get chip id for mx7ulp, the get_cpu_rev
is hard coded to a fixed value. This may change in future.

Reuse some code in imx-common.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Implement soc level functions to get cpu rev, reset cause, enable cache,
etc. We will disable the wdog and init clocks in s_init at very early u-boot
phase.

Since the we are seeking the way to get chip id for mx7ulp, the get_cpu_rev
is hard coded to a fixed value. This may change in future.

Reuse some code in imx-common.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>imx: mx7ulp: Add clock framework and functions</title>
<updated>2017-03-17T08:27:08+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2017-02-22T08:21:42+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d0f8516d9e6a327b39cacdeb9a4e930c1348d907'/>
<id>d0f8516d9e6a327b39cacdeb9a4e930c1348d907</id>
<content type='text'>
Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set
clock source, divider, clock rate and parent source.
Users need to include pcc.h to use the APIs to for peripherals clock. Each
peripheral clock is defined in enum pcc_clk type.

SCG relevants APIs are defined in scg.h which supports clock rate get, PLL/PFD
enablement and settings, and all SCG clock initialization. User need use enum
scg_clk to access each clock source.

In clock.c, we initialize necessary clocks at u-boot s_init and implement the
clock functions used by driver modules to operate clocks dynamically.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set
clock source, divider, clock rate and parent source.
Users need to include pcc.h to use the APIs to for peripherals clock. Each
peripheral clock is defined in enum pcc_clk type.

SCG relevants APIs are defined in scg.h which supports clock rate get, PLL/PFD
enablement and settings, and all SCG clock initialization. User need use enum
scg_clk to access each clock source.

In clock.c, we initialize necessary clocks at u-boot s_init and implement the
clock functions used by driver modules to operate clocks dynamically.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>imx: mx7ulp: add iomux driver to support IOMUXC0 and IOMUXC1</title>
<updated>2017-03-17T08:27:08+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2017-02-22T08:21:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0cb3d82c68012887475eba12ee3d8b82894b460b'/>
<id>0cb3d82c68012887475eba12ee3d8b82894b460b</id>
<content type='text'>
Add a new driver under ULP directory to support its IOMUXC
controllers. The ULP has two IOMUXC, the IOMUXC0 is used
for M4 domain, while IOMUXC1 is for A7. We set IOMUXC1 as
the default IOMUX in this driver. Any pins in IOMUXC0 needs
to configure with IOMUX_CONFIG_MPORTS in its mux_mode field.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by : Stefano Babic &lt;sbabic@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a new driver under ULP directory to support its IOMUXC
controllers. The ULP has two IOMUXC, the IOMUXC0 is used
for M4 domain, while IOMUXC1 is for A7. We set IOMUXC1 as
the default IOMUX in this driver. Any pins in IOMUXC0 needs
to configure with IOMUX_CONFIG_MPORTS in its mux_mode field.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by : Stefano Babic &lt;sbabic@denx.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
