u-boot.git/arch/arm/cpu/armv7/sunxi, branch master

arm: Update linker scripts to ensure appended device tree is aligned

2026-01-20T18:06:41Z

With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+: Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains that we must have ALIGN(x) statements inside of a section to ensure that padding is included and not simply that the linker address counter is incremented. To that end, this patch: - Expands some linker sections to be more readable when adding a second statement to the section. - Aligns the final section before _end (for U-Boot) or _image_binary_end or __bss_end (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to the final section before the symbol. - Ensure that we do have alignment by adding an ASSERT so that when not aligned we fail to link (and explain why). - Remove now-spurious '. = ALIGN(x);' statements that were intended to provide the above alignments. Tested-by: Michal Simek # Zynq Reviewed-by: Ilias Apalodimas [trini: Also update arch/arm/cpu/armv8/u-boot.lds as Ilas requested] Signed-off-by: Tom Rini

arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD

2024-10-11T17:44:47Z

Use the new symbol to refer to any 'SPL' build, including TPL and VPL Signed-off-by: Simon Glass

Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"

2024-05-20T19:35:03Z

As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman Signed-off-by: Tom Rini

Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""

2024-05-19T14:16:36Z

When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman Signed-off-by: Tom Rini

arm: sunxi: Remove and add needed includes

2024-05-06T21:06:33Z

Remove from all mach-sunxi and board/sunxi files and when needed add missing include files directly. Reviewed-by: Andre Przywara Signed-off-by: Tom Rini

sunxi: psci: implement PSCI on R528

2023-10-22T22:41:52Z

This patch adds the necessary code to make nonsec booting and PSCI secondary core management functional on the R528/T113. Signed-off-by: Sam Edwards Tested-by: Maksim Kiselev Tested-by: Kevin Amadiva Reviewed-by: Andre Przywara

sunxi: psci: stop modeling register layout with C structs

2023-10-22T22:41:52Z

Since the sunxi support nowadays generally prefers #defined register offsets instead of modeling register layouts using C structs, now is a good time to do this for PSCI as well. This patch moves away from using the structs `sunxi_cpucfg_reg` and `sunxi_prcm_reg` in psci.c. The former struct and its associated header file existed only to support PSCI code, so also delete them altogether. Signed-off-by: Sam Edwards Reviewed-by: Andre Przywara

sunxi: psci: refactor register access to separate functions

2023-10-22T22:41:52Z

This is to prepare for R528, which does not have the typical "CPUCFG" block; it has a "CPUX" block which provides these same functions but is organized differently. Moving the hardware-access bits to their own functions separates the logic from the hardware so we can reuse the same logic. Signed-off-by: Sam Edwards Reviewed-by: Andre Przywara

sunxi: psci: clean away preprocessor macros

2023-10-22T22:41:52Z

This patch restructures psci.c to get away from the "many different function definitions switched by #ifdef" paradigm to the preferred style of having a single function definition with `if (IS_ENABLED(...))` to make the optimizer include only the appropriate function bodies instead. There are no functional changes here. Signed-off-by: Sam Edwards Reviewed-by: Andre Przywara

sunxi: refactor serial base addresses to avoid asm/arch/cpu.h

2023-10-22T22:41:52Z

At the moment we have each SoC's memory map defined in its own cpu.h, which is included in include/configs/sunxi_common.h. This will be a problem with the introduction of Allwinner RISC-V support. Remove the inclusion of that header file from the common config header, instead move the required serial base addresses (for the SPL) into a separate header file. Then include the original cpu.h file only where we really need it, which is only under arch/arm now. This disentangles the architecture specific header files from the generic code. Signed-off-by: Andre Przywara