u-boot.git/arch/arm/cpu/armv7, branch v2016.01

am33xx/am43xx: Add platform data for GPIOs

2016-01-08T15:15:45Z

On these platforms we have many cases of boards that enable device model and GPIO support but do not enable OF_CONTROL and pass in a device tree with the binary. We need to bring in the platform data here as well. Tested on Beaglebone Black. Reported-by: Robert Nelson Reported-by: Francisco Aguerre Reported-by: Jason Kridner Signed-off-by: Tom Rini

Merge branch 'master' of git://www.denx.de/git/u-boot-imx

2016-01-03T15:32:24Z

imx: ddr: drop duplicated debug info

2016-01-03T14:19:58Z

Drop duplicated debug info for tcl. Signed-off-by: Peng Fan Cc: Stefano Babic

Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

2015-12-15T01:27:23Z

armv7/fsl-ls102xa: Workaround for DDR erratum A008514

2015-12-15T00:57:32Z

This is a workaround for hardware erratum. Write the value of 63b2_0042h to EDDRTQCFG will optimal the memory controller performance. The value: 63b2_0042h comes from the hardware team. Signed-off-by: Yuan Yao Reviewed-by: York Sun

armv7: ls102xa: cci-400: Enable snoop and DVM message requests.

2015-12-15T00:56:53Z

Enable snoop and DVM message on all CCI-400 slave ports. Setting on disabled feature (snoop or DVM) is ignored by CCI-400. Signed-off-by: Yuan Yao [York Sun: Add commit message] Reviewed-by: York Sun

armv7: omap-common: Rework SPL board_mmc_init()

2015-12-14T18:42:54Z

Since the changes in a1e56cf the way that we had board_mmc_init() structured for OMAP parts (so that we always report device 0) are no longer functional. For now, make the case of booting from the second device initialize both devices (we have no devices that only have the second device as MMC). A further rework and consolidation of the functions should be done at a later date. Tested on Beaglebone Black (SD and eMMC boot). Reported-by: Vagrant Cascadian Signed-off-by: Tom Rini

arm: ls102xa: enable all the snoop signal for masters.

2015-12-14T02:27:29Z

Enable the IP feature's snoop signal to support hardware snoop for cache coherence. SNPCNFGCR contains the bits to drive snoop signal for various masters. Signed-off-by: Yuan Yao Reviewed-by: York Sun

arm: ls1021a: merge SoC specific code in a separate file

2015-12-14T02:27:29Z

Create a soc.c file to put the code for soc special settings. Signed-off-by: Yuan Yao Reviewed-by: York Sun

arm: ls102x: add get_svr and IS_SVR_REV helper

2015-12-14T02:27:28Z

Signed-off-by: Shengzhou Liu Reviewed-by: York Sun