u-boot.git/arch/arm/cpu/armv8/cache.S, branch v2016.01

arm: armv8 correct value passed to __asm_dcache_all

2015-09-12T07:03:39Z

>From source code comments: "x0: 0 flush & invalidate, 1 invalidate only" Current value 0xffff can make invalidate work, since we only judge whether input value is 0 or not, see following code: " tbz w1, #0, 1f dc isw, x9 b 2f 1: dc cisw, x9 /* clean & invalidate by set/way */ 2: subs x6, x6, #1 /* decrement the way */ " Later we may add "2 clean only" support. So following the comments, correct value from 0xffff to 1. Signed-off-by: Peng Fan Cc: York Sun Cc: Albert Aribaud

remove unnecessary version.h includes

2015-03-24T14:50:50Z

Various files are needlessly rebuilt every time due to the version and build time changing. As version.h is not actually needed, remove the include. Signed-off-by: Rob Herring Cc: Albert Aribaud Cc: Stefano Babic Cc: Minkyu Kang Cc: Marek Vasut Cc: Tom Warren Cc: Michal Simek Cc: Macpaul Lin Cc: Wolfgang Denk Cc: York Sun Cc: Stefan Roese Cc: Nobuhiro Iwamatsu Cc: Simon Glass Cc: Philippe Reynes Cc: Eric Jarrige Cc: "David Müller" Cc: Phil Edworthy Cc: Robert Baldyga Cc: Torsten Koschorrek Cc: Anatolij Gustschin Reviewed-by: Linus Walleij Reviewed-by: Łukasz Majewski

armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack

2015-02-24T21:08:46Z

Flushing L3 cache in CCN-504 requries d-cache to be disabled. Using assembly function to guarantee stack is not used before flushing is completed. Timeout is needed for simualtor on which CCN-504 is not implemented. Return value can be checked for timeout situation. Change bootm.c to disable dcache instead of simply flushing, required by flushing L3. Signed-off-by: York Sun

ARM: armv8: Fix typo in commentary

2015-01-14T16:37:39Z

Signed-off-by: Michal Simek

ARMv8: fix bug for flush data cache by set/way

2014-04-07T20:27:22Z

When flush the d$ with set/way instruction, it need calculate the way's offset = log2(Associativity); but in current uboot's code, it use below formula to calculate the offset: log2(Associativity * 2 - 1), so finally it cannot flush data cache properly. Signed-off-by: Leo Yan

armv8/cache: Change cache invalidate and flush function

2014-04-07T15:43:41Z

When SoC first boots up, we should invalidate the cache but not flush it. We can use the same function for invalid and flush mostly, with a wrapper. Invalidating large cache can ben slow on emulator, so we postpone doing so until I-cache is enabled, and before enabling D-cache. Signed-off-by: York Sun CC: David Feng

arm64: core support

2014-01-09T15:08:44Z

Relocation code based on a patch by Scott Wood, which is: Signed-off-by: Scott Wood Signed-off-by: David Feng