u-boot.git/arch/arm/cpu/armv8/start.S, branch main

arm: armv8: Make save_boot_params simpler

2025-10-24T19:47:50Z

The idiom used in save_boot_params is common for armv7. In armv8 is much easier to do the same thing with adr/adrp. So let's simplify the code a bit. Signed-off-by: Ilias Apalodimas

armv8: start.S: Subordinate CPUs psci setup vector

2025-04-11T02:55:39Z

As current design, only Manager CPU called armv8_setup_psci() before jump to next stage(such as Linux Kernel), Subordinate CPUs also need setup psci vector to handle trap request which comes from higher EL level. Signed-off-by: Xu Zhang <423756212@qq.com> [trini: Guard with !CONFIG_XPL_BUILD check]

Merge patch series "Implement ACPI on aarch64"

2024-10-28T00:44:13Z

Patrick Rudolph says: Based on the existing work done by Simon Glass this series adds support for booting aarch64 devices using ACPI only. As first target QEMU SBSA support is added, which relies on ACPI only to boot an OS. As secondary target the Raspberry Pi4 was used, which is broadly available and allows easy testing of the proposed solution. The series is split into ACPI cleanups and code movements, adding Arm specific ACPI tables and finally SoC and mainboard related changes to boot a Linux on the QEMU SBSA and RPi4. Currently only the mandatory ACPI tables are supported, allowing to boot into Linux without errors. The QEMU SBSA support is feature complete and provides the same functionality as the EDK2 implementation. The changes were tested on real hardware as well on QEMU v9.0: qemu-system-aarch64 -machine sbsa-ref -nographic -cpu cortex-a57 \ -pflash secure-world.rom \ -pflash unsecure-world.rom qemu-system-aarch64 -machine raspi4b -kernel u-boot.bin -cpu cortex-a72 \ -smp 4 -m 2G -drive file=raspbian.img,format=raw,index=0 \ -dtb bcm2711-rpi-4-b.dtb -nographic Tested against FWTS V24.03.00. Known issues: - The QEMU rpi4 support is currently limited as it doesn't emulate PCI, USB or ethernet devices! - The SMP bringup doesn't work on RPi4, but works in QEMU (Possibly cache related). - PCI on RPI4 isn't working on real hardware since the pcie_brcmstb Linux kernel module doesn't support ACPI yet. Link: https://lore.kernel.org/r/20241023132116.970117-1-patrick.rudolph@9elements.com

armv8: cpu: Enable ACPI parking protocol

2024-10-27T23:24:13Z

Update the generic entry point code to support the ACPI parking protocol. The ACPI parking protocol can be used when PSCI is not available to bring up secondary CPU cores. When enabled secondary CPUs will enter U-Boot proper and spin in their own 4KiB reserved memory page, which also acts as mailbox with the OS to release the CPU. TEST: Boots all CPUs on qemu-system-aarch64 -machine raspi4b Signed-off-by: Patrick Rudolph Reviewed-by: Simon Glass

arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD

2024-10-11T17:44:47Z

Use the new symbol to refer to any 'SPL' build, including TPL and VPL Signed-off-by: Simon Glass

arm: armv8: save boot arguments

2024-02-29T14:24:22Z

Save boot arguments x[0-3] into an array for handover of bloblist from previous boot stage. Signed-off-by: Raymond Mao Suggested-by: Ard Biesheuvel Reviewed-by: Ilias Apalodimas

armv8: Skip PIE in SPL due to load alignment fault.

2023-08-17T20:39:20Z

When PIE is enabled in start.S, u-boot/-spl use __rel_dyn_start and _rel_dyn_end symbol to be loaded to and executed at a different address than it was linked at. u-boot-spl.lds is used in SPL build, but relocation information section(.rela*) were discarded. In line number 80 in arch/arm/cpu/armv8/u-boot-spl.lds /DISCARD/ : { *(.rela*) } If PIE enabled in SPL, __rel_dyn_start which is defined as .rel_dyn_start in sections.c will be apended to the end of .bss section. In our ASPEED case, size of .bss section would let .rel_dyn_start without 8-byte alignment, leading to alignment fault when executing ldp instuction in pie_fix_loop. Signed-off-by: Kevin Chen

Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE

2022-10-31T15:01:31Z

The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass

armv8: always use current exception level for TCR_ELx access

2022-06-16T19:22:55Z

Currently get_tcr() takes an "el" parameter, to select the proper version of the TCR_ELx system register. This is problematic in case of the Apple M1, since it runs with HCR_EL2.E2H fixed to 1, so TCR_EL2 is actually using the TCR_EL1 layout, and we get the wrong version. For U-Boot's purposes the only sensible choice here is the current exception level, and indeed most callers treat it like that, so let's remove that parameter and read the current EL inside the function. This allows us to check for the E2H bit, and pretend it's EL1 in this case. There are two callers which don't care about the EL, and they pass 0, which looks wrong, but is irrelevant in these two cases, since we don't use the return value there. So the change cannot affect those two. Signed-off-by: Andre Przywara Reviewed-by: Mark Kettenis Tested-by: Mark Kettenis

arm: set cntfrq_el0 if CONFIG_COUNTER_FREQUENCY is valid

2022-04-21T19:27:18Z

Since COUNTER_FREQUENCY is obselete, so set cntfrq_el0 if CONFIG_COUNTER_FREQUENCY is valid Signed-off-by: Peng Fan Reviewed-by: Philipp Tomsich