u-boot.git/arch/arm/cpu/armv8, branch master

Merge patch series "Fix speculative access to firewalled regions on AM62 SoCs"

2026-05-25T15:29:54Z

Anshul Dalal says: This patch series fixes firewall exceptions observed on AM62 family of devices due to speculative accesses made by the A53 core to secure DDR regions. Link: https://lore.kernel.org/r/20260520-am62_firewall_exception_fix-v3-0-9ca3dc40aea4@ti.com

arm: armv8: mmu: move mmu enablement out of mmu_setup

2026-05-25T15:29:50Z

Currently mmu_setup for ARMv8 performs two functions, first it sets up the page tables based the memory map provided by the board and then it enables the MMU. However for some platforms runtime fixes to the generated page tables are required before the MMU can be enabled, such as K3 family of SoCs. Therefore this patch moves the enablement of the MMU out of mmu_setup and to a standalone mmu_enable function to give more granular control to the platforms. Note that no functional changes are intended from this patch. Reviewed-by: Ilias Apalodimas Signed-off-by: Anshul Dalal

board: nxp: lx2160a: without QIXIS, MC-ENET, PCI, LTC3882

2026-05-15T11:28:31Z

The shared LX2160A board file calls helpers that only exist when their subsystem is enabled. Gate them on the matching CONFIG_*: - pci_init() under CONFIG_PCI. - fdt_fixup_mc_ddr() and fsl_rgmii_init() under CONFIG_FSL_MC_ENET. - qixis_*() and the QIXIS branch of checkboard() under CONFIG_FSL_QIXIS; cpu_name(buf) moves out so the non-QIXIS path still prints "Board: ". - EVENT_SPY_SIMPLE on init_func_vid moves inside the CONFIG_VOL_MONITOR_LTC3882_READ guard (was outside, dangling symbol when LTC3882 off). #if / #ifdef, not IS_ENABLED(), because the helpers are themselves conditionally compiled. While here, lx2160a_common.h: fix BOOT_TARGET_DEVICES_MMC 1 arg vs 2 args and gate the MMC target on CONFIG_CMD_MMC, not CONFIG_MMC. No functional change for NXP boards: LX2160ARDB, LX2160AQDS, or LX2162AQDS, but mainly build clean up in order to support other NXP lx2160a boards without those HW dependencies. Signed-off-by: Vincent Jardin Signed-off-by: Peng Fan

arm: layerscape: Check zero size memory bank before lmb_add

2026-05-06T02:29:33Z

In layerspace's lmb_arch_add_memory implementation, all memory bank are added to lmb, even some is with zero size. This will cause lmb treating it as overlap with available memory by lmb_addrs_overlap and merge with available memory. Finally causing available memory start address changed to 0. For example, on LX2160, before zero memory bank added to lmb, there are two available memory regions: - region 0, start 0x80000000, size 0x7be00000 - region 1, start 0x2080000000, size 0x700000000 After zero size memory bank added, merge to one region: - region 0, start 0, size 0x2780000000 This wrong new region causes efi_memory_init issue when allocating bounce buffer because of conflict address (with uboot reserved) is allocated. Signed-off-by: Ye Li Reviewed-by: Peng Fan Signed-off-by: Peng Fan

arm: psci: Add API to check for support of specific PSCI function

2026-04-27T10:38:44Z

Add an API to check if a specific PSCI function is supported or not. This is based on the psci_features() function present in Linux kernel (drivers/firmware/psci/psci.c). Reviewed-by: Casey Connolly Reviewed-by: Sumit Garg Signed-off-by: Varadarajan Narayanan Link: https://patch.msgid.link/20260121063920.1500293-2-varadarajan.narayanan@oss.qualcomm.com Signed-off-by: Casey Connolly

lmb: Rework the LMB_ARCH_MEM_MAP symbol

2026-04-07T17:32:26Z

This symbol should not be enabled by the user directly but rather selected when implemented in a given platform. This converts all of the current users of this feature and hides the symbol. Signed-off-by: Tom Rini

arm: armv8: Flush TLB before enabling MMU

2026-02-24T14:16:06Z

Commit 9ebdbbc43e5f ("arm: armv8: invalidate dcache entries on dcache_enable") broke Apple Silicon machines in certain scenarios. If the MMU is currently not enabled we need to flush the TLB before we enable it to prevent stale TLB entries from becoming active again. So move the __asm_invalidate_tlb_all() back immediately before the mmu_setup() call. Fixes: 9ebdbbc43e5f ("arm: armv8: invalidate dcache entries on dcache_enable") Signed-off-by: Mark Kettenis Reviewed-by: Ilias Apalodimas

arm: spl: Ensure 8 byte alignment of appended DTB without separate BSS

2026-02-09T15:33:20Z

Historically, when we have an appended device tree and also our resulting binary will contain the BSS section, we have ensured that everything will be where it's expected to be by declaring that the BSS is overlayed with a symbol matches the end of the port of the ELF binary that is objcopy'd to the binary we concatenate with. This in turn means that the logic to generate a "pad" file, which is the size found in the __bss_size symbol, will be correct and then we can concatenate the device tree and it will begin at __bss_size at run time. With commit 5ffc1dcc26d3 ("arm: Remove rel.dyn from SPL linker scripts") we removed this overlay as part of trying to ensure that we met both the requirements of the device tree to be 8 byte aligned as well as that our logic to generate the -pad file would match what ended up in the resulting binary. While it was correct to remove an unused section it did not solve ultimately solve the problem for all cases. To really fix the problem, we need to do two things. First, our final section prior to _image_binary_end must be 8 byte aligned (for the case of having a separate BSS and so our appended DTB exists at this location). This cannot be '.binman_sym_table' as it may be empty, and in turn the ELF type would be NOBITS and so not copied with objcopy. The __u_boot_list section will never be empty, so it is our final section, and ends with a '. = ALIGN(8)' statement. Second, as this is the end of our copied data it is safe to declare that the BSS starts here, so use the OVERLAY keyword to place the BSS here. Fixes: 5ffc1dcc26d3 ("arm: Remove rel.dyn from SPL linker scripts") Reported-by: Brian Sune Reported-by: Phil Phil Sutter Tested-by: Brian Sune Tested-by: Phil Sutter Tested-by: Greg Malysa Signed-off-by: Tom Rini

armv8: u-boot-spl.lds: Place binman symbols at end of binary

2026-01-28T20:41:21Z

It can be useful in xPL to access symbols from binman, such as the offset/position and size of a binman entry. Place these binman symbols together at the end of the xPL binary for ARMv8, similar to ARM and RISC-V. Signed-off-by: Jonas Karlman Reviewed-by: Simon Glass

arm: Update linker scripts to ensure appended device tree is aligned

2026-01-20T18:06:41Z

With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+: Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains that we must have ALIGN(x) statements inside of a section to ensure that padding is included and not simply that the linker address counter is incremented. To that end, this patch: - Expands some linker sections to be more readable when adding a second statement to the section. - Aligns the final section before _end (for U-Boot) or _image_binary_end or __bss_end (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to the final section before the symbol. - Ensure that we do have alignment by adding an ASSERT so that when not aligned we fail to link (and explain why). - Remove now-spurious '. = ALIGN(x);' statements that were intended to provide the above alignments. Tested-by: Michal Simek # Zynq Reviewed-by: Ilias Apalodimas [trini: Also update arch/arm/cpu/armv8/u-boot.lds as Ilas requested] Signed-off-by: Tom Rini