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<title>u-boot.git/arch/arm/cpu/tegra-common/ap.c, branch main</title>
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<updated>2015-02-21T13:23:51Z</updated>
<entry>
<title>ARM: tegra: collect SoC sources into mach-tegra</title>
<updated>2015-02-21T13:23:51Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2015-02-20T08:04:04Z</published>
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<id>urn:sha1:09f455dca74973ef5e42311162c8dff7e83d44a2</id>
<content type='text'>
This commit moves files as follows:

 arch/arm/cpu/arm720t/tegra20/*      -&gt; arch/arm/mach-tegra/tegra20/*
 arch/arm/cpu/arm720t/tegra30/*      -&gt; arch/arm/mach-tegra/tegra30/*
 arch/arm/cpu/arm720t/tegra114/*     -&gt; arch/arm/mach-tegra/tegra114/*
 arch/arm/cpu/arm720t/tegra124*      -&gt; arch/arm/mach-tegra/tegra124/*
 arch/arm/cpu/arm720t/tegra-common/* -&gt; arch/arm/mach-tegra/*
 arch/arm/cpu/armv7/tegra20/*        -&gt; arch/arm/mach-tegra/tegra20/*
 arch/arm/cpu/armv7/tegra30/*        -&gt; arch/arm/mach-tegra/tegra30/*
 arch/arm/cpu/armv7/tegra114/*       -&gt; arch/arm/mach-tegra/tegra114/*
 arch/arm/cpu/armv7/tegra124/*       -&gt; arch/arm/mach-tegra/tegra124/*
 arch/arm/cpu/armv7/tegra-common/*   -&gt; arch/arm/mach-tegra/*
 arch/arm/cpu/tegra20-common/*       -&gt; arch/arm/mach-tegra/tegra20/*
 arch/arm/cpu/tegra30-common/*       -&gt; arch/arm/mach-tegra/tegra30/*
 arch/arm/cpu/tegra114-common/*      -&gt; arch/arm/mach-tegra/tegra114/*
 arch/arm/cpu/tegra124-common/*      -&gt; arch/arm/mach-tegra/tegra124/*
 arch/arm/cpu/tegra-common/*         -&gt; arch/arm/mach-tegra/*

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt; [ on nyan-big ]
Cc: Stephen Warren &lt;swarren@nvidia.com&gt;
Cc: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: Disable VPR</title>
<updated>2014-08-18T23:57:02Z</updated>
<author>
<name>Bryan Wu</name>
<email>pengw@nvidia.com</email>
</author>
<published>2014-06-24T02:45:29Z</published>
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<id>urn:sha1:df3443dfa449ad02bef8ddf6e2c90a6fd9394fc9</id>
<content type='text'>
On Tegra114 and Tegra124 platforms, certain display-related registers cannot
be accessed unless the VPR registers are programmed.  For bootloader, we
probably don't care about VPR, so we disable it (which counts as programming
it, and allows those display-related registers to be accessed).

This patch is based on the commit 5f499646c83ba08079f3fdff6591f638a0ce4c0c
in Chromium OS U-Boot project.

Signed-off-by: Andrew Chew &lt;achew@nvidia.com&gt;
Signed-off-by: Jimmy Zhang &lt;jimmzhang@nvidia.com&gt;
Signed-off-by: Bryan Wu &lt;pengw@nvidia.com&gt;
[acourbot: ensure write went through, vpr.c style changes]
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Cc: Tom Warren &lt;TWarren@nvidia.com&gt;
Cc: Stephen Warren &lt;swarren@nvidia.com&gt;
Cc: Terje Bergstrom &lt;tbergstrom@nvidia.com&gt;
Tested-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: add common (shared) CPU files</title>
<updated>2014-02-03T16:46:46Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren.nvidia@gmail.com</email>
</author>
<published>2014-01-24T19:46:16Z</published>
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<id>urn:sha1:2f5dac9214391efc58dc7ea5267b1322d3b18df6</id>
<content type='text'>
These files are used by both SPL and main U-Boot.

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Tested-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: accept any SKU ID for most chips</title>
<updated>2014-02-03T16:46:44Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2014-01-22T00:19:19Z</published>
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<id>urn:sha1:86b657878b1ad311167c88b555afded10f98f4d4</id>
<content type='text'>
For Tegra20, the SKU ID actually impacts how U-Boot programs the chip,
and hence we need to explicitly know about each and every SKU ID in order
to operate correctly.

However, for Tegra30/114, this isn't the case. Rather than forcing each
new user with a different SKU to manually add their SKU ID into the code,
simply accept any SKU ID.

If U-Boot ever starts e.g. programming maximal CPU clocks etc., we'll
need to undo this, or make the default case map to conservative defaults,
but for now it's likely the path to least support cost.

Reported-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: support SKU b1 of Tegra30</title>
<updated>2013-12-18T17:19:48Z</updated>
<author>
<name>Alban Bedel</name>
<email>alban.bedel@avionic-design.de</email>
</author>
<published>2013-11-13T16:27:18Z</published>
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<id>urn:sha1:3346cbb8e878bf5c774835ced7e3916da78e9b74</id>
<content type='text'>
Add the Tegra30 SKU b1 and treat it like other Tegra30 chips.

Signed-off-by: Alban Bedel &lt;alban.bedel@avionic-design.de&gt;
Reviewed-by: Julian Scheel &lt;julian.scheel@avionic-design.de&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Add GPL-2.0+ SPDX-License-Identifier to source files</title>
<updated>2013-07-24T13:44:38Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2013-07-08T07:37:19Z</published>
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<id>urn:sha1:1a4596601fd395f3afb8f82f3f840c5e00bdd57a</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: only enable SCU on Tegra20</title>
<updated>2013-06-06T16:12:32Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren@nvidia.com</email>
</author>
<published>2013-05-23T12:26:18Z</published>
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<id>urn:sha1:dbc000bfb51eb30d786521e6b8e29048c36cbefa</id>
<content type='text'>
The non-SPL build of U-Boot on Tegra only runs on a single CPU, and
hence there is no need to enable the SCU when running U-Boot. If an
SMP OS is booted, and it needs the SCU enabled, it will enable the SCU
itself. U-Boot doing so is redundant.

The one exception is Tegra20, where an enabled SCU is required for some
aspects of PCIe to work correctly.

Some Tegra SoCs contain CPUs without a software-controlled SCU. In this
case, attempting to turn it on actively causes problems. This is the case
for Tegra114. For example, when running Linux, the first (or at least
some very early) user-space process will trigger the following kernel
message:

Unhandled fault: imprecise external abort (0x406) at 0x00000000

This is typically accompanied by that process receving a fatal signal,
and exiting. Since this process is usually pid 1, this causes total
system boot failure.

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
[swarren, fleshed out description, ported to upstream chipid APIs]
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: support SKU 7 of Tegra20</title>
<updated>2013-05-28T19:58:43Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2013-05-17T14:10:15Z</published>
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<id>urn:sha1:20583d04fb197fd59b438be0731aaaac485094b9</id>
<content type='text'>
Make U-Boot aware of the Tegra20 SKU 7, and treat it identically
to any other Tegra20.

My Whistler board has a SoC with this SKU.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: support SKU 1 of Tegra114</title>
<updated>2013-05-28T19:58:43Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2013-05-17T14:10:14Z</published>
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<id>urn:sha1:840167c2c25342dde4523ab11cd21f41ebcfa6e5</id>
<content type='text'>
Make U-Boot aware of the Tegra114 SKU 1, and treat it identically
to any other Tegra114.

This value is used on (at least some) Dalmore boards with a production
rather than engineering chip. Such boards are in the hands of some
partners who want to use upstream U-Boot.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Tegra: Split tegra_get_chip_type() into soc &amp; sku funcs</title>
<updated>2013-04-15T18:01:38Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren@nvidia.com</email>
</author>
<published>2013-04-10T17:32:32Z</published>
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<id>urn:sha1:49493cb7144f0c51a5aaecc75fcd1b3f157633ba</id>
<content type='text'>
As suggested by Stephen Warren, use tegra_get_chip() to return
the pure CHIPID for a Tegra SoC (i.e. 0x20 for Tegra20, 0x30 for
Tegra30, etc.) and rename tegra_get_chip_type() to reflect its true
function, i.e. tegra_get_chip_sku(), which returns an ID like
TEGRA_SOC_T25, TEGRA_SOC_T33, etc.

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
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