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<title>u-boot.git/arch/arm/cpu, branch next</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2026-08-11T08:05:24Z</updated>
<entry>
<title>armv8: layerscape: Fix TF-A DRAM reservation with empty banks</title>
<updated>2026-08-11T08:05:24Z</updated>
<author>
<name>Patryk Biel</name>
<email>pbiel7@gmail.com</email>
</author>
<published>2026-07-14T09:49:14Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5a32ebc96295795a7325d6cbaa2d8b0bdfaa6d75'/>
<id>urn:sha1:5a32ebc96295795a7325d6cbaa2d8b0bdfaa6d75</id>
<content type='text'>
The TF-A DRAM bank setup currently assumes that the number of
banks reported by TF-A matches the number of entries available in
gd-&gt;bd-&gt;bi_dram[].  Limit the loop by CONFIG_NR_DRAM_BANKS so that
a platform with fewer configured DRAM banks does not write past the
array.

The reserved RAM setup also checks higher DRAM banks before falling
back to bank 0.  When a higher bank is empty and board_reserve_ram_top()
returns 0, the old test succeeds for a zero-sized bank.  This can set
gd-&gt;arch.resv_ram to 0.

On systems with CONFIG_GIC_V3_ITS this value is later used by
ls_gic_rd_tables_init() to place the GIC LPI tables:

  gd-&gt;arch.resv_ram - GIC_LPI_SIZE

If gd-&gt;arch.resv_ram is 0, the subtraction underflows and the GIC LPI
tables are placed at an invalid high address.

Skip empty banks when selecting the reserved RAM area and fail GIC LPI
table setup if no reserved RAM address was established.

This fixes LS1028A systems with 2 GiB of RAM, where TF-A reports only
one populated DRAM bank.

Tested on an LS1028ARDB with TF-A modified to report 2 GiB of RAM, and
on a custom LS1028A-based board equipped with 2 GiB of RAM.

Signed-off-by: Patryk Biel &lt;pbiel7@gmail.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm: armv8: mmu: fix DCACHE_OFF incorrectly unmapping region</title>
<updated>2026-07-23T21:16:29Z</updated>
<author>
<name>Akshay Belsare</name>
<email>akshay.belsare@amd.com</email>
</author>
<published>2026-07-08T11:17:10Z</published>
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<id>urn:sha1:d7ef23c07b8e34f65b3e15e3b4e7f58d074923c8</id>
<content type='text'>
DCACHE_OFF is defined as (0 &lt;&lt; 2) = 0, and PTE_TYPE_FAULT is defined
as (0 &lt;&lt; 0) = 0. In mmu_set_region_dcache_behaviour(), the cache
attribute passed to set_regions() is computed as:
  attrs = PMD_ATTRINDX(option &gt;&gt; 2)
For DCACHE_OFF=0 this evaluates to PMD_ATTRINDX(0) = 0, which equals
PTE_TYPE_FAULT.

Commit 6468ca13ffd6f ("armv8: mmu: fix and optimise explicitly unmapping
regions") added an unmap path to set_one_region() that
triggers when attrs == PTE_TYPE_FAULT. Because DCACHE_OFF and
PTE_TYPE_FAULT share the same numerical value (0), any call to
mmu_set_region_dcache_behaviour() with DCACHE_OFF silently unmaps the
target region instead of changing its cache attributes to non-cached.

The subsequent flush_dcache_range() call at the end of
mmu_set_region_dcache_behaviour() then crashes with a Level 3
translation fault because the region it tries to flush has just been
unmapped.

The existing flag parameter already distinguishes the two callers:
 - mmu_set_region_dcache_behaviour() always passes flag=false
 - mmu_change_region_attr_nobreak() always passes flag=true, and is the
   only legitimate caller that passes PTE_TYPE_FAULT to unmap a region

Guard the unmap path with flag so that DCACHE_OFF attribute changes
take the correct else branch, which ORs in the ATTRINDX bits only,
leaving the PTE valid.

This was observed as a boot crash on Versal, Versal Net, and ZynqMP
platforms during network initialisation. The zynq_gem driver calls
mmu_set_region_dcache_behaviour() with DCACHE_OFF to make its BD
descriptor ring non-cached. With the bug the BD memory is unmapped,
and the subsequent dcache flush inside
mmu_set_region_dcache_behaviour() faults.

Fixes: 6468ca13ffd6f ("armv8: mmu: fix and optimise explicitly unmapping regions")
Signed-off-by: Akshay Belsare &lt;akshay.belsare@amd.com&gt;
Reviewed-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
</content>
</entry>
<entry>
<title>Kconfig: arm: restyle</title>
<updated>2026-06-25T20:06:18Z</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2026-06-09T01:26:02Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0caac78a06f21cbe25460bf8c0dbe8094f73cb73'/>
<id>urn:sha1:0caac78a06f21cbe25460bf8c0dbe8094f73cb73</id>
<content type='text'>
Restyle all Kconfigs for "arm":
Menu entries   : no space left
Menu attributes: 1 TAB
Help text      : 1 TAB + 2 spaces
Replace '---help---' by 'help'

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Kconfig: armv7: fix typo</title>
<updated>2026-06-25T20:06:17Z</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2026-06-09T01:24:37Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0c0074f983cc97c0a721f44851fb48df4add2931'/>
<id>urn:sha1:0c0074f983cc97c0a721f44851fb48df4add2931</id>
<content type='text'>
While restyling Kconfig the script checkpatch.pl gives
this info:

WARNING: 'suppport' may be misspelled - perhaps 'support'?

Fix by changing 'suppport' to 'support'.

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>treewide: move bi_dram[] from bd to gd</title>
<updated>2026-06-25T00:13:24Z</updated>
<author>
<name>Ilias Apalodimas</name>
<email>ilias.apalodimas@linaro.org</email>
</author>
<published>2026-06-17T07:48:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1174c99ab421168221be372bd83a4143bf5f167d'/>
<id>urn:sha1:1174c99ab421168221be372bd83a4143bf5f167d</id>
<content type='text'>
Currently, the bi_dram[] information is stored in the board info
structure (bd). Because bd is only valid after reserve_board(),
dram_init_banksize() must be called late in the initialization process.
This limitation is problematic, as it forces us to rely on a variety of
bespoke functions to determine board RAM, bank memory sizes, and other
early setup requirements.

By moving bi_dram[] into the global data (gd), we can run it earlier.
This is particularly convenient since boards define their own
dram_init_banksize() routines, which do not always rely on parsing
Device Tree (DT) memory nodes.

Additionally, U-Boot defaults to relocating to the top of the first memory
bank. While boards currently use custom functions to override this
behavior, having the DRAM bank information available earlier in gd makes
relocating to a different bank trivial and standardizes the process.

Reviewed-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Tested-by: Michal Simek &lt;michal.simek@amd.com&gt; # Versal Gen 2 Vek385
Tested-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
Tested-by: Christophe Leroy (CS GROUP) &lt;chleroy@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'v2026.07-rc5' into next</title>
<updated>2026-06-22T22:42:41Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-06-22T22:42:41Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9f16b258e5632d74fa4a1c2c93bea4474e05234b'/>
<id>urn:sha1:9f16b258e5632d74fa4a1c2c93bea4474e05234b</id>
<content type='text'>
Prepare v2026.07-rc5
</content>
</entry>
<entry>
<title>Merge patch series "armv8: mmu: fix region unmapping and optimise set_one_region()"</title>
<updated>2026-06-17T15:55:31Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-06-17T15:55:31Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7636a15a54f28f603516302b565f1c218983d993'/>
<id>urn:sha1:7636a15a54f28f603516302b565f1c218983d993</id>
<content type='text'>
Casey Connolly &lt;casey.connolly@linaro.org&gt; says:

Currently trying to unmap a region results in slow and largely broken
behaviour as we unnecessarily split blocks and manually set thousands of
individual 4k pages instead of higher level blocks.

This series fixes the behaviour of set_one_region() so that it works
properly when called to unmap regions. See patch 4 for details.

Patches 1 &amp; 2 improve the existing debug functionality, the pagetable
dumper will now print most explicitly unmapped regions (since they still
have their PA intact), as well as adding a new function which does a
very basic software TLB lookup to help with debugging.

Patch 3 de-duplicates some code by moving the loop that always surrounds
set_one_region() calls into its own function, this also helps with
readability in the calling functions.

Link: https://lore.kernel.org/r/20260608-b4-mmu-unmap-fixes-v6-0-ac0764cccf40@linaro.org
</content>
</entry>
<entry>
<title>armv8: mmu: fix and optimise explicitly unmapping regions</title>
<updated>2026-06-17T15:55:00Z</updated>
<author>
<name>Casey Connolly</name>
<email>casey.connolly@linaro.org</email>
</author>
<published>2026-06-08T17:13:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6468ca13ffd6f3ce85edff8f9b0c317c719aa9c6'/>
<id>urn:sha1:6468ca13ffd6f3ce85edff8f9b0c317c719aa9c6</id>
<content type='text'>
As more platforms start ensuring they explicitly unmap reserved-memory
regions a few issues have appeared with how the existing dynamic mapping
code works. Fix these and get a small optimisation as well.

1. Teach pte_type() to actually respect the PTE_TYPE_VALID bit
2. Don't walk the TLB a second time if we call mmu_change_region_attr()
   with PTE_TYPE_FAULT (since it would just be a slow nop)
3. Fix how set_one_region() decides to split blocks.

Today set_one_region() will always split blocks until it reaches the
smallest granule size (4k) and then update all of these pages. This
appears to be due to a big in how is_aligned() is implemented, since
it only evaluates to true if addr and size are both multiples of the
current granule size, so a mapping aligned to 2M which is 4M in size
will cleanly result in 2 blocks being set, but a mapping aligned to
2M which is 4M + 8k in size will result in blocks being split and 1026
individual pages being set.

While for the address it is correct to enforce that it is aligned to
the current granule size, we only need to check if the region size is
greater than the current granule size. This allows us to simplify our
second example above to only 4 entries being updated (assuming no blocks
have to be split) since we only need to update 2 blocks to map the first
4M, drastically improving the best-case performance.

In the case where the address is 4k aligned rather than 2M aligned we
will still be restricted to mapping 4k pages until we reach 2M alignment
where we could then map a larger 2M granule which previously would never
happen.

Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
Reviewed-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
</content>
</entry>
<entry>
<title>armv8: mmu: commonize the set_one_region() loop</title>
<updated>2026-06-17T15:55:00Z</updated>
<author>
<name>Casey Connolly</name>
<email>casey.connolly@linaro.org</email>
</author>
<published>2026-06-08T17:13:50Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=76c90926087cd586f151c5ebd557589e1306b45c'/>
<id>urn:sha1:76c90926087cd586f151c5ebd557589e1306b45c</id>
<content type='text'>
This loop is duplicated 3 times, put it into its own function and call
it instead. This simplifies the logic in a few functions.

Reviewed-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>armv8: mmu: teach the pagetable dumper to show explicit FAULT maps</title>
<updated>2026-06-17T15:55:00Z</updated>
<author>
<name>Casey Connolly</name>
<email>casey.connolly@linaro.org</email>
</author>
<published>2026-06-08T17:13:49Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=41b6b904b58577c4aa7100e2850af0429e964283'/>
<id>urn:sha1:41b6b904b58577c4aa7100e2850af0429e964283</id>
<content type='text'>
When a region is explicitly unmapped (like with
mmu_change_region_attr(.... PTE_TYPE_FAULT)) the address translation
still remains but won't be used since the region is marked invalid.
Print these regions when we dump the pagetable to help with debugging.

Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
</entry>
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