u-boot.git/arch/arm/cpu, branch v2010.06

Prepare v2010.06-rc3

2010-06-23T18:50:54Z

Signed-off-by: Wolfgang Denk

Merge branch 'master' of /home/wd/git/u-boot/custodians

2010-06-22T20:37:16Z

Fix wrong orion5x MPP and GIPO writel arguments

2010-06-22T20:37:00Z

Orion5x MPP and GPIO setting code had writel arguments the wrong way around. Fixed and tested. Signed-off-by: Albert Aribaud

ARM: Align stack to 8 bytes

2010-06-22T20:15:07Z

The ARM ABI requires that the stack be aligned to 8 bytes as it is noted in Procedure Call Standard for the ARM Architecture: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042d/index.html Unaligned SP also causes the problem with variable-length arrays allocation when VLA address becomes less than stack pointer during aligning of this address, so the next 'push' in the stack overwrites first 4 bytes of VLA. Signed-off-by: Vitaly Kuzmichev Tested on tx25(mx25), imx27lite(mx27), qong(mx31) and trab(s3c2400) Tested-by: Wolfgang Denk

arch/arm/cpu/arm_cortexa8/omap3/cache.S: make build with older tools

2010-06-18T14:01:07Z

The push / pop instructions used in this file are available only with more recent tool chains: cache.S: Assembler messages: cache.S:133: Error: bad instruction `push {r0,r1,r2,lr}' cache.S:160: Error: bad instruction `pop {r1,r2,r3,pc}' cache.S:164: Error: bad instruction `push {r0,r1,r2,lr}' cache.S:191: Error: bad instruction `pop {r1,r2,r3,pc}' Change push/pop into stmfd/ldmfd instructions to support older versions of binutils as well. I verified that the modified source code generates exactly the same binary code. Signed-off-by: Wolfgang Denk Cc: Sandeep Paulraj Cc: Tom Rix

Merge branch 'fix' of git://git.denx.de/u-boot-pxa

2010-06-17T20:31:04Z

Initial support for Marvell Orion5x SoC

2010-06-17T14:06:07Z

This patch adds support for the Marvell Orion5x SoC. It has no use alone, and must be followed by a patch to add Orion5x support for serial, then support for the ED Mini V2, an Orion5x-based product from LaCie. Signed-off-by: Albert Aribaud

PXA: Align stack to 8 bytes

2010-06-13T11:39:02Z

Part of this patch is by: Mikhail Kshevetskiy. Stack must be aligned to 8 bytes on PXA (possibly all armv5te) for LDRD/STRD instructions. In case LDRD/STRD is issued on an unaligned address, the behaviour is undefined. The issue was observed when working with the NAND code, which was rendered disfunctional. Also, the vsprintf() function had serious problems with printing 64bit wide long longs. After aligning the stack, this wrong behaviour is no longer present. Tested on: Marvell Littleton PXA310 board Toradex Colibri PXA320 board Aeronix Zipit Z2 PXA270 handheld Voipac PXA270 board Signed-off-by: Marek Vasut

AM35x: Add support for EMIF4

2010-06-08T15:07:19Z

This patch adds support for the EMIF4 interface available in the AM35x processors. Signed-off-by: Vaibhav Hiremath Signed-off-by: Sanjeev Premi Signed-off-by: Sandeep Paulraj

omap3: Consolidate SDRC related operations

2010-06-08T15:07:18Z

Consolidated SDRC related functions into one file - sdrc.c And also replaced sdrc_init with generic memory init function (mem_init), this generalization of omap memory setup is necessary to support the new emif4 interface introduced in AM3517. Signed-off-by: Vaibhav Hiremath Signed-off-by: Sandeep Paulraj