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<title>u-boot.git/arch/arm/cpu, branch v2010.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/cpu?h=v2010.09</id>
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<updated>2010-09-28T17:54:43Z</updated>
<entry>
<title>ARMV7: OMAP4: Calculate SDRAM size</title>
<updated>2010-09-28T17:54:43Z</updated>
<author>
<name>Aneesh V</name>
<email>aneesh@ti.com</email>
</author>
<published>2010-09-12T05:02:55Z</published>
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<id>urn:sha1:7ca3f9c5688b9f42d8dcc765c0f982be6542f4b3</id>
<content type='text'>
Calculate the SDRAM size from DMM configuration registers instead of using
hard-coded values. This gives correct values for all different boards.

It's assumed that DMM sections do not overlap memory areas.

Signed-off-by: Aneesh V &lt;aneesh@ti.com&gt;
Tested-by: Steve Sakoman &lt;steve@sakoman.com&gt;
Signed-off-by: Sandeep Paulraj &lt;s-paulraj@ti.com&gt;
</content>
</entry>
<entry>
<title>ixp/npe: Remove duplicated comment</title>
<updated>2010-09-28T12:48:44Z</updated>
<author>
<name>Thomas Weber</name>
<email>weber@corscience.de</email>
</author>
<published>2010-09-28T12:03:32Z</published>
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<id>urn:sha1:85d3eba90df54bac27844221e2436550984c4d58</id>
<content type='text'>
Signed-off-by: Thomas Weber &lt;weber@corscience.de&gt;
</content>
</entry>
<entry>
<title>Prepare v2010.09-rc2</title>
<updated>2010-09-19T15:47:52Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2010-09-19T15:47:52Z</published>
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<id>urn:sha1:07517e7f4f582d1607adbc444bab75af3ac4a7f9</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
</entry>
<entry>
<title>Prepare v2010.09-rc1</title>
<updated>2010-09-09T22:16:19Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2010-09-09T22:16:19Z</published>
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<id>urn:sha1:2d941de9d5c7ba00dc19787dfa0aac2949fd00fb</id>
<content type='text'>
Coding style cleanup.

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-ti</title>
<updated>2010-09-09T17:55:02Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2010-09-09T17:55:02Z</published>
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<id>urn:sha1:a78ded13111dde555ed5de99cff10f41ae674cb1</id>
<content type='text'>
</content>
</entry>
<entry>
<title>ARMV7: OMAP3: Remove erroneous hard coded sdram setup for 128MB/bank</title>
<updated>2010-09-08T18:51:24Z</updated>
<author>
<name>Steve Sakoman</name>
<email>steve@sakoman.com</email>
</author>
<published>2010-08-20T03:09:57Z</published>
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<id>urn:sha1:3667cbeed5e3c4067e624e52a916b1ebb02c8f05</id>
<content type='text'>
Upcoming Beagle and Overo revisions use POP memory with 256MB or 512MB
per bank.  This patches uses the SDRC settings from x-load or the config
header to set up timing properly.

Signed-off-by: Steve Sakoman &lt;steve@sakoman.com&gt;
Signed-off-by: Sandeep Paulraj &lt;s-paulraj@ti.com&gt;
</content>
</entry>
<entry>
<title>ARMV7: OMAP3: Fix broken reset command on OMAP36XX/37XX and OMAP4</title>
<updated>2010-09-08T18:51:18Z</updated>
<author>
<name>Steve Sakoman</name>
<email>steve@sakoman.com</email>
</author>
<published>2010-08-25T20:22:44Z</published>
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<id>urn:sha1:543431b66dd9f3526f23546cac962c29ad0f485a</id>
<content type='text'>
Using the reset command on OMAP36XX/37XX and OMAP4 caused a hang. This
patch uses the reset bit appropriate for each CPU architecture.

Signed-off-by: Steve Sakoman &lt;steve@sakoman.com&gt;
Signed-off-by: Sandeep Paulraj &lt;s-paulraj@ti.com&gt;
</content>
</entry>
<entry>
<title>ARMV7: OMAP3: Apply Cortex-A8 errata workarounds only on affected revisions</title>
<updated>2010-09-08T18:51:13Z</updated>
<author>
<name>Mans Rullgard</name>
<email>mans@mansr.com</email>
</author>
<published>2010-04-14T15:10:28Z</published>
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<id>urn:sha1:0c0a0e07811965188d5f64cdbc186331c0598fa6</id>
<content type='text'>
The workarounds for errata 621766 and 725233 should only be applied
on affected Cortex-A8 revisions.  Recent chips use r3px cores where
these have been fixed.

Signed-off-by: Mans Rullgard &lt;mans@mansr.com&gt;
Signed-off-by: Steve Sakoman &lt;steve@sakoman.com&gt;
Signed-off-by: Sandeep Paulraj &lt;s-paulraj@ti.com&gt;
</content>
</entry>
<entry>
<title>ARMV7: OMAP3: Convert setup_auxcr() to pure asm</title>
<updated>2010-09-08T18:51:09Z</updated>
<author>
<name>Mans Rullgard</name>
<email>mans@mansr.com</email>
</author>
<published>2010-04-14T14:49:57Z</published>
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<id>urn:sha1:096ca838b514be0a20e62500413e42f0a2bb7481</id>
<content type='text'>
This function consists entirely of inline asm statements, so writing
it directly in a .S file is simpler. Additionally, the inline asm is
not safe as is, since registers are not guaranteed to be preserved
between asm() statements.

Signed-off-by: Mans Rullgard &lt;mans@mansr.com&gt;
Signed-off-by: Steve Sakoman &lt;steve@sakoman.com&gt;
Signed-off-by: Sandeep Paulraj &lt;s-paulraj@ti.com&gt;
</content>
</entry>
<entry>
<title>ARMV7: OMAP3: Fix and clean up L2 cache enable/disable functions</title>
<updated>2010-09-08T18:51:04Z</updated>
<author>
<name>Mans Rullgard</name>
<email>mans@mansr.com</email>
</author>
<published>2010-04-14T10:08:00Z</published>
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<id>urn:sha1:29844707469854d9fab181edd6abe2f25fb5d208</id>
<content type='text'>
On OMAP34xx ES1.0, the L2 enable bit can only be set in secure mode,
so an SMC call to the ROM monitor is required.  On later versions,
and on newer devices, this bit is banked and we can set it directly.

The code checked only the ES revision of the chip, and hence incorrectly
used the ROM call on ES1.0 versions of other devices.

This patch adds a check for chip family as well as revision, and also
removes some code duplication between the enable and disable functions.

Signed-off-by: Mans Rullgard &lt;mans@mansr.com&gt;
Signed-off-by: Steve Sakoman &lt;steve@sakoman.com&gt;
Signed-off-by: Sandeep Paulraj &lt;s-paulraj@ti.com&gt;
</content>
</entry>
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