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<title>u-boot.git/arch/arm/cpu, branch v2013.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/cpu?h=v2013.01</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/arch/arm/cpu?h=v2013.01'/>
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<updated>2013-01-14T23:22:00Z</updated>
<entry>
<title>pxa: Save lr register in relocate_code function</title>
<updated>2013-01-14T23:22:00Z</updated>
<author>
<name>Łukasz Dałek</name>
<email>luk0104@gmail.com</email>
</author>
<published>2013-01-12T11:39:27Z</published>
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<id>urn:sha1:df3ad6c81d3c0095879359778a7532160a4a0a30</id>
<content type='text'>
When u-boot is compiled for PXA25x processor, pxa/start.S is calling
cpu_init_crit by BL instruction. BL is overwriting lr register so
relocate_code is going into infinite loop. This patch preservs lr
register in r12 before calling cpu_init_crit and after function returns
restores it.

Signed-off-by: Lukasz Dalek &lt;luk0104@gmail.com&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'</title>
<updated>2013-01-14T16:00:02Z</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2013-01-14T16:00:02Z</published>
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<id>urn:sha1:a17617d6553369ba72c080128ed8d0b0c33dfc89</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'</title>
<updated>2013-01-14T14:21:00Z</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2013-01-14T14:21:00Z</published>
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<id>urn:sha1:1199c377cf14c240b903e351ab02b3b2cd3800c6</id>
<content type='text'>
</content>
</entry>
<entry>
<title>mx31/mx35/mx51/mx53/mx6: add watchdog</title>
<updated>2013-01-13T10:39:57Z</updated>
<author>
<name>Troy Kisky</name>
<email>troy.kisky@boundarydevices.com</email>
</author>
<published>2012-10-22T15:19:01Z</published>
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<id>urn:sha1:abbab70363dcdb270cbf24d47849214dd3a3e010</id>
<content type='text'>
Use a common watchdog driver for all these cpus.

Signed-off-by: Troy Kisky &lt;troy.kisky@boundarydevices.com&gt;
Acked-by: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>Exynos: clock: add CLK_DIV_FSYS3 at set_mmc_clk</title>
<updated>2013-01-11T07:56:31Z</updated>
<author>
<name>Jaehoon Chung</name>
<email>jh80.chung@samsung.com</email>
</author>
<published>2012-12-27T22:30:33Z</published>
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<id>urn:sha1:5374d386f88d8efc8caf311e20c81602d1db9ece</id>
<content type='text'>
Mobile storage is used the CLK_DIV_FSYS3 value.

Signed-off-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Signed-off-by: kyungmin Park &lt;kyungmin.park@samsung.com&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</content>
</entry>
<entry>
<title>Exynos: clock: support get_mmc_clk for exynos</title>
<updated>2013-01-11T07:56:31Z</updated>
<author>
<name>Jaehoon Chung</name>
<email>jh80.chung@samsung.com</email>
</author>
<published>2012-12-27T22:30:32Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c39e969e8e30800d3bf3b50f51997026aef0f01d'/>
<id>urn:sha1:c39e969e8e30800d3bf3b50f51997026aef0f01d</id>
<content type='text'>
To get exactly clock value for mmc, support the get_mmc_clk() like
set_mmc_clk().

Signed-off-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Signed-off-by: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</content>
</entry>
<entry>
<title>EXYNOS5: Change parent clock of FIMD to MPLL</title>
<updated>2013-01-10T01:19:47Z</updated>
<author>
<name>Ajay Kumar</name>
<email>ajaykumar.rs@samsung.com</email>
</author>
<published>2013-01-08T20:42:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1673f199d917e0649098e0cb7ef5b375b96bd6cb'/>
<id>urn:sha1:1673f199d917e0649098e0cb7ef5b375b96bd6cb</id>
<content type='text'>
With VPLL as source clock to FIMD,
Exynos DP Initializaton was failing sometimes with unstable clock.
Changing FIMD source to MPLL resolves this issue.

Signed-off-by: Ajay Kumar &lt;ajaykumar.rs@samsung.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Donghwa Lee &lt;dh09.lee@samsung.com&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</content>
</entry>
<entry>
<title>Merge 'u-boot-atmel/master' into 'u-boot-arm/master'</title>
<updated>2013-01-09T19:01:48Z</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2013-01-09T19:01:48Z</published>
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<id>urn:sha1:612404c28a64a6df300642a1550a65dcc8e01f82</id>
<content type='text'>
</content>
</entry>
<entry>
<title>mx6: Add workaround for ARM errata</title>
<updated>2013-01-09T18:22:06Z</updated>
<author>
<name>Fabio Estevam</name>
<email>fabio.estevam@freescale.com</email>
</author>
<published>2013-01-04T16:07:26Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2b16e51c2ff1073592a3a3f52a6725bdd7b11f81'/>
<id>urn:sha1:2b16e51c2ff1073592a3a3f52a6725bdd7b11f81</id>
<content type='text'>
Add workaround for the following ARM errata: 743622 and 751472.

The motivation for this change is the following kernel commit 62e4d357a
(ARM: 7609/1: disable errata work-arounds which access
secure registers), which removes the errata from multiplatform kernel.

Since imx has been converted to multiplatform in the kernel, we need to apply
such workarounds into the bootloader.

Workaround code has been taken from arch/arm/mm/proc-v7.S from 3.7.1 kernel.

Explanation of each erratum is provided at "Chip Errata for the i.MX 6Dual/6Quad"
document available at: cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf

Signed-off-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'u-boot-marvell/master' into 'u-boot-arm/master'</title>
<updated>2013-01-09T15:57:03Z</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2013-01-09T15:57:03Z</published>
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<id>urn:sha1:ea33fb1a32e8e3f408b311823cabbb7453148f80</id>
<content type='text'>
</content>
</entry>
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