u-boot.git/arch/arm/cpu, branch v2014.04

Merge branch 'u-boot/master' into 'u-boot-arm/master'

2014-04-08T07:25:08Z

Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile include/configs/trats.h include/configs/trats2.h include/mmc.h

arm64 patch: gicv3 support

2014-04-07T22:15:12Z

This patch add gicv3 support to uboot armv8 platform. Changes for v2: - rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S - move smp_kick_all_cpus() from gic.S to start.S, it would be implementation dependent. - Each core initialize it's own ReDistributor instead of master initializeing all ReDistributors. This is advised by arnab.basu . Signed-off-by: David Feng

ARMv8: fix bug for flush data cache by set/way

2014-04-07T20:27:22Z

When flush the d$ with set/way instruction, it need calculate the way's offset = log2(Associativity); but in current uboot's code, it use below formula to calculate the offset: log2(Associativity * 2 - 1), so finally it cannot flush data cache properly. Signed-off-by: Leo Yan

Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

2014-04-07T17:13:42Z

ARM: Add workaround for Cortex-A9 errata 761320

2014-04-07T16:11:01Z

Full cache line writes to the same memory region from at least two processors might deadlock the processor. Exists on r1, r2, r3 revisions. Signed-off-by: Nitin Garg Acked-by: Fabio Estevam

ARM: Add workaround for Cortex-A9 errata 794072

2014-04-07T16:11:00Z

A short loop including a DMB instruction might cause a denial of service on another processor which executes a CP15 broadcast operation. Exists on r1, r2, r3, r4 revisions. Signed-off-by: Nitin Garg Acked-by: Dirk Behme

armv8/cache: Change cache invalidate and flush function

2014-04-07T15:43:41Z

When SoC first boots up, we should invalidate the cache but not flush it. We can use the same function for invalid and flush mostly, with a wrapper. Invalidating large cache can ben slow on emulator, so we postpone doing so until I-cache is enabled, and before enabling D-cache. Signed-off-by: York Sun CC: David Feng

armv8/cache: Flush D-cache, invalidate I-cache for relocation

2014-04-07T15:43:36Z

If D-cache is enabled, we need to flush it, and invalidate i-cache before jumping to the new location. This should be done right after relocation. Signed-off-by: York Sun CC: David Feng

armv8/cache: Consolidate setting for MAIR and TCR

2014-04-07T15:43:32Z

Move setting for MAIR and TCR to cache_v8.c, to avoid conflict with sub-architecture. Signed-off-by: York Sun CC: David Feng

arm: Handle .gnu.hash section in ldscripts

2014-04-07T09:12:18Z

Avoids "could not find output section .gnu.hash" ld.bfd errors on openSUSE. Cc: Albert Aribaud Cc: Tom Rini Signed-off-by: Andreas Färber Acked-by: Simon Glass Tested-by: Simon Glass