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<title>u-boot.git/arch/arm/cpu, branch v2015.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/cpu?h=v2015.01</id>
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<updated>2015-01-08T18:50:17Z</updated>
<entry>
<title>mx25: Fix boot hang by avoiding vector relocation</title>
<updated>2015-01-08T18:50:17Z</updated>
<author>
<name>Fabio Estevam</name>
<email>fabio.estevam@freescale.com</email>
</author>
<published>2015-01-06T15:06:48Z</published>
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<id>urn:sha1:906d6fe3033910a5eca72ef6fc9b47a957b113e5</id>
<content type='text'>
Since commit 3ff46cc42b9d73d0 ("arm: relocate the exception vectors") mx25pdk
hangs like this:

CPU:   Freescale i.MX25 rev1.2 at 399 MHz
Reset cause: WDOG
Board: MX25PDK
I2C:   ready
DRAM:  64 MiB
(hangs)

Add a specific relocate_vectors macro that skips the vector relocation, as the
i.MX25 SoC does not provide RAM at the high vectors address (0xFFFF0000), and
(0x00000000) maps to ROM.

This allows mx25 to boot again.

Acked-By: Bill Pringlemeir &lt;bpringlemeir@nbsps.com&gt;
Signed-off-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
</content>
</entry>
<entry>
<title>mx25: Remove empty line after printing the reset cause</title>
<updated>2015-01-08T16:00:45Z</updated>
<author>
<name>Fabio Estevam</name>
<email>fabio.estevam@freescale.com</email>
</author>
<published>2015-01-06T16:10:05Z</published>
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<id>urn:sha1:8ed5e4ce0b9475f51f288409443b959b9a3a4f27</id>
<content type='text'>
Currently there is an unneeded empty line after printing the reset cause:

U-Boot 2015.01-rc4-00080-g0551a93 (Jan 06 2015 - 13:04:19)

CPU:   Freescale i.MX25 rev1.2 at 399 MHz
Reset cause: POR

Board: MX25PDK
I2C:   ready
DRAM:  64 MiB
MMC:   FSL_SDHC: 0

Remove the extra "\n" when printing the reset cause.

Signed-off-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
</content>
</entry>
<entry>
<title>ARM: UniPhier: add UART initialization routine for low-level debug</title>
<updated>2015-01-08T14:01:56Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2015-01-06T05:28:16Z</published>
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<id>urn:sha1:b4ad44baab713af371b1113dd63dd222ba73ba13</id>
<content type='text'>
The low-level debugging functions are useful to debug the early boot
stage where the full UART driver is not available.

UniPhier SoCs need to initialize the UART port 0 to use this feature.
The initialization routine is called at the very entry of the
lowlevel_init().

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>ARM: UniPhier: enable output of system bus</title>
<updated>2015-01-08T14:01:45Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2015-01-06T05:20:04Z</published>
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<id>urn:sha1:2661dfd0046285e9007c1de126255bee11c0b8cd</id>
<content type='text'>
For NAND boot on PH1-LD4, PH1-sLD8, and some other SoCs,
the output of the system bus is disabled by default.
It must be enabled by software to have access to the system bus.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>ARM: UniPhier: fix SRAM size on support card</title>
<updated>2015-01-08T14:01:21Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2015-01-06T05:18:57Z</published>
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<id>urn:sha1:5e165b258f4231d8f9d07e773f19aaa57587f45a</id>
<content type='text'>
The max size of available memories on slot0 and slot1 is 32MB because
 - EA[25] signal is not output on the save-pin mode which is
   used PH1-LD4 or later SoCs.
 - EA[25] signal is not connected by the limitation (or bug?) of
   the PLD logic of DCC support card.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>keystone: set default pci mode to root complex</title>
<updated>2015-01-05T20:13:47Z</updated>
<author>
<name>Karicheri, Muralidharan</name>
<email>m-karicheri2@ti.com</email>
</author>
<published>2014-12-09T19:32:26Z</published>
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<id>urn:sha1:58927a964e93e834fa7a0358f961d3a70b0502d6</id>
<content type='text'>
pci ports are used as root complex in Linux. So set this as default
in u-boot for keystone devices

Signed-off-by: Murali Karicheri &lt;m-karicheri2@ti.com&gt;
</content>
</entry>
<entry>
<title>arm: omap: reset sata on boot</title>
<updated>2015-01-05T20:13:47Z</updated>
<author>
<name>Dmitry Lifshitz</name>
<email>lifshitz@compulab.co.il</email>
</author>
<published>2014-12-15T14:02:58Z</published>
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<id>urn:sha1:87791adc22ecb513e5f34cf51e167d3638da75da</id>
<content type='text'>
On OMAP platforms (like OMAP5) Linux kernel fails to detect a SATA
device if it is used by U-Boot.

It happens because U-Boot does not reset SATA controller before boot.

Reset the controller on OS boot so that Linux will have a clean state
to work with.

Signed-off-by: Dmitry Lifshitz &lt;lifshitz@compulab.co.il&gt;
Reviewed-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>OMAP5+: sata/scsi: implement scsi_bus_reset()</title>
<updated>2015-01-05T20:13:46Z</updated>
<author>
<name>Dmitry Lifshitz</name>
<email>lifshitz@compulab.co.il</email>
</author>
<published>2014-12-15T14:02:57Z</published>
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<id>urn:sha1:8decf5d4a59a538ce918579d63cd7224266091d6</id>
<content type='text'>
Implement missing scsi_bus_reset() for SCSI subsystem commands
on OMAP platforms.

Signed-off-by: Dmitry Lifshitz &lt;lifshitz@compulab.co.il&gt;
Reviewed-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>Revert "ARM: omap4: Update sdram setting for panda rev A6"</title>
<updated>2015-01-05T20:13:45Z</updated>
<author>
<name>Nishanth Menon</name>
<email>nm@ti.com</email>
</author>
<published>2014-12-18T21:28:36Z</published>
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<id>urn:sha1:25098144ac3881ef55dcc700136879e1e0155f48</id>
<content type='text'>
This reverts commit 47a4bea6af77b01d59a410d09a4c34b2dd14cf50.

Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
</content>
</entry>
<entry>
<title>omap-common/hwinit-common.c: timer_init() doesn't need to touch gd</title>
<updated>2015-01-05T20:13:45Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2014-12-19T21:52:55Z</published>
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<id>urn:sha1:b31079282e16c77f6f8878999867c7d622ececae</id>
<content type='text'>
The gd will be cleared at first so we don't need to set arch.tbl to 0.
In addition, the checks later against lastinc also work fine with an
initial value of 0 here.  This also brings us in line with sunxi code
for example.

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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