u-boot.git/arch/arm/cpu, branch v2016.01-rc4

Merge branch 'master' of git://www.denx.de/git/u-boot-imx

2016-01-03T15:32:24Z

ARM: mxs: allow boards to select DC-DC switching clock source

2016-01-03T14:56:36Z

For some board designs, it might be useful to switch the DC-DC clock source to something else rather the default 24 MHz, e.g. for EMI reasons. For this, override the mxs_power_setup_dcdc_clocksource function in your board support files. Example: void mxs_power_setup_dcdc_clocksource(void) { mxs_power_switch_dcdc_clocksource(POWER_MISC_FREQSEL_20MHZ); } Signed-off-by: Michael Heimpold Cc: Marek Vasut Cc: Otavio Salvador Cc: Fabio Estevam Acked-by: Marek Vasut

imx: ddr: drop duplicated debug info

2016-01-03T14:19:58Z

Drop duplicated debug info for tcl. Signed-off-by: Peng Fan Cc: Stefano Babic

armv8/ls1043a: Implement workaround for PEX erratum A009929

2015-12-17T00:52:18Z

Consecutive write transactions from core to PCI express outbound path hangs after 25 to 30 transactions depending on core freq. This erratum enable the mbist clock through COP register setting. Signed-off-by: Mingkai Hu Reviewed-by: York Sun

Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

2015-12-15T01:27:23Z

armv8: Add sata support on Layerscape ARMv8 board

2015-12-15T00:57:35Z

Freescale ARM-based Layerscape contains a SATA controller which comply with the serial ATA 3.0 specification and the AHCI 1.3 specification. This patch adds SATA feature on ls2080aqds, ls2080ardb and ls1043aqds boards. Signed-off-by: Tang Yuantian Reviewed-by: York Sun

armv8: Make SEC read/write as snoopable for LS1043

2015-12-15T00:57:34Z

For LS1043, SEC read/writes are made snoopable by setting the corresponding bits in SCFG to avoid coherency issues. Signed-off-by: Aneesh Bansal Reviewed-by: York Sun

armv8: define usec2ticks function

2015-12-15T00:57:34Z

usec2ticks() function has been defined for ARMv8 which will be used by SEC Driver. Signed-off-by: Aneesh Bansal Reviewed-by: York Sun

armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server

2015-12-15T00:57:33Z

MC and debug server are not board-specific. Move reserving memory to SoC file, using the new board_reserve_ram_top function. Reduce debug server memory by 2MB to make room for secure memory. In the system with MC and debug server, the top of u-boot memory is not the end of memory. PRAM is not used for this reservation. Signed-off-by: York Sun

armv8: fsl-layerscape: Make DDR non secure in MMU tables

2015-12-15T00:57:33Z

DDR has been set as secure in MMU tables. Non-secure master such as SDHC DMA cannot access data correctly. Mixing secure and non- secure MMU entries requirs the MMU tables themselves in secure memory. This patch moves MMU tables into a secure DDR area. Early MMU tables are changed to set DDR as non-secure. A new table is added into final MMU tables so secure memory can have 2MB granuality. gd->secure_ram tracks the location of this secure memory. For ARMv8 SoCs, the RAM base is not zero and RAM is divided into several banks. gd->secure_ram needs to be maintained before using. This maintenance is board-specific, depending on the SoC and memory bank of the secure memory falls into. Signed-off-by: York Sun