u-boot.git/arch/arm/cpu, branch v2016.05-rc2

ARM: always perform per-CPU GIC init

2016-04-18T21:11:51Z

The current code in ARMv8's lowlevel_init() skips the per-CPU GIC initialization ifndef CONFIG_ARMV8_MULTIENTRY. However, the per-CPU init should always occur; it's just the one-time init that should only happen on the master. Once this consideration is taken into account, the only difference between the paths when CONFIG_ARMV8_MULTIENTRY is undefined/defined is the use of branch_if_slave. Naively, any unified code would need to invoke this conditionally upon ifdef CONFIG_ARMV8_MULTIENTRY. However, branch_if_slave already checks CONFIG_ARMV8_MULTIENTRY and does nothing if it isn't defined, so we don't even need that ifdef at the call site. Reported-by: Masahiro Yamada Signed-off-by: Stephen Warren Reviewed-by: Masahiro Yamada

Merge branch 'master' of git://www.denx.de/git/u-boot-imx

2016-04-13T11:19:50Z

arm: Replace v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL) with asm code

2016-04-12T00:48:27Z

Lets be consistent and also replace v7_maint_dcache_all() with asm code for the invalidate case. Signed-off-by: Hans de Goede

arm: Replace v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL) with asm code

2016-04-12T00:48:26Z

v7_maint_dcache_all() does not work reliable when build with gcc6, see: https://bugzilla.redhat.com/show_bug.cgi?id=1318788 While debugging this I learned that v7_maint_dcache_all() is unreliable when build with gcc5 too when it is marked as noinline. This commit fixes the reliability issues by replacing the C-code with the ready to use asm implementation from the kernel. Given that this code when written as C-code clearly is quite fragile (also see the existing comments about the C-code being the way it is to get optimal assembly) and that we have a proven asm alternative, I believe that this is the best solution. Note that we actually already had a copy of the kernel's v7_flush_dcache_all() before this commit in arch/arm/mach-uniphier/arm32/lowlevel_init.S. This commit moves that code arch/arm/cpu/armv7/cache_v7_asm.S, renames it to __v7_flush_dcache_all(), and adds a v7_flush_dcache_all() wrapper which saves / restores the clobbered registers for use from C-code. Signed-off-by: Hans de Goede Acked-by: Masahiro Yamada

ARM: allow CONFIG_GICV* not to be defined

2016-04-11T16:44:38Z

There are ARM SoCs (such as the BCM2837) do not contain an ARM GIC. Fix the ARMv8 CPU startup code to compile in this case. Signed-off-by: Stephen Warren Reviewed-by: Tom Rini

armv8: LS2080A: Consolidate LS2080A and LS2085A

2016-04-06T17:26:46Z

LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA DDR. The RDB and QDS boards support both personality. By detecting the SVR at runtime, a single image per board can support both SoCs. It gives users flexibility to swtich SoC without the need to reprogram the board. Signed-off-by: York Sun CC: Prabhakar Kushwaha Reviewed-by: Prabhakar Kushwaha

ARM64: zynqmp: Select SYS_CONFIG_NAME via Kconfig

2016-04-04T18:28:38Z

This option enable adding new platform suport just by adding defconfig and DTS file which will target generic configuration for SoC. Make no sense to extend Kconfig just create a pointer between DTS and configuration file. Signed-off-by: Michal Simek

sniper: Change vendor name from lge to lg, matching devicetree vendor prefix

2016-04-01T21:18:06Z

This moves the sniper board from the lge to lg, in order to match the devicetree vendor prefix already defined in the kernel. Signed-off-by: Paul Kocialkowski

sunxi: Move cpu independent code to mach directory

2016-04-01T07:52:28Z

Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf Acked-by: Hans de Goede Signed-off-by: Hans de Goede

sunxi: usb_phy: Add support for A83T USB PHYs

2016-03-31T15:04:06Z

The A83T has 3 USB PHYs: 1 for USB OTG, 1 for standard USB 1.1/2.0 host, 1 for USB HSIC. Signed-off-by: Chen-Yu Tsai Reviewed-by: Hans de Goede Signed-off-by: Hans de Goede