u-boot.git/arch/arm/cpu, branch v2016.09

Merge branch 'master' of git://www.denx.de/git/u-boot-imx

2016-09-09T13:45:32+00:00

ARM: armv7: move ARMV7_PSCI_NR_CPUS to Kconfig

2016-09-07T12:48:54+00:00

Move this option to Kconfig and set its default value to 4; this
increases the number of supported CPUs for some boards.

It consumes 1KB memory per CPU for PSCI stack, but it should not
be a big deal, given the amount of memory used for the modern OSes.

Reviewed-by: Alexander Graf 
Signed-off-by: Masahiro Yamada

ARM: armv7: move CONFIG_ARMV7_PSCI to Kconfig

2016-09-07T12:48:51+00:00

Add ARCH_SUPPORT_PSCI as a non-configurable option that platforms
can select.  Then, move CONFIG_ARMV7_PSCI, which is automatically
enabled if both ARMV7_NONSEC and ARCH_SUPPORT_PSCI are enabled.

Reviewed-by: Alexander Graf 
Signed-off-by: Masahiro Yamada

ARM: armv7: guard memory reserve for PSCI with #ifdef CONFIG_ARMV7_PSCI

2016-09-07T12:48:46+00:00

If CONFIG_ARMV7_NONSEC is enabled, the linker script requires
CONFIG_ARMV7_PSCI_NR_CPUS regardless of CONFIG_ARMV7_PSCI.

Reviewed-by: Alexander Graf 
Signed-off-by: Masahiro Yamada

mx6: ddr: Allow changing REFSEL and REFR fields

2016-09-06T16:22:48+00:00

Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
REFR fields of the MDREF register as 1 and 7, respectively for
DDR3 and 0 and 3 for LPDDR2.

Looking at the MDREF initialization done via DCD we see that
boards do need to initialize these fields differently:

$ git grep 0x021b0020 board/
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4      0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800
board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800

So introduce a mechanism for users to be able to configure
REFSEL and REFR fields as needed.

Keep all the mx6 SPL users in their current REF_SEL and REFR values,
so no functional changes for the existing users.

Signed-off-by: Fabio Estevam 
Reviewed-by: Eric Nelson

arm: imx: Add support for Advantech DMS-BA16 board

2016-09-06T16:22:48+00:00

Add support for Advantech DMS-BA16 board. The board is based on Advantech
BA16 module which has a i.MX6D processor. The board supports:
 - FEC Ethernet
 - USB Ports
 - SDHC and MMC boot
 - SPI NOR
 - LVDS and HDMI display

Basic information about the module:
 - Module manufacturer: Advantech
 - CPU: Freescale ARM Cortex-A9 i.MX6D
 - SPECS:
     Up to 2GB Onboard DDR3 Memory;
     Up to 16GB Onboard eMMC NAND Flash
     Supports OpenGL ES 2.0 and OpenVG 1.1
     HDMI, 24-bit LVDS
     1x UART, 2x I2C, 8x GPIO,
     4x Host USB 2.0 port, 1x USB OTG port,
     1x micro SD (SDHC),1x SDIO, 1x SATA II,
     1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2

Signed-off-by: Akshay Bhat 
Cc: u-boot@lists.denx.de
Cc: sbabic@denx.de

ARM: Move SYS_CACHELINE_SIZE over to Kconfig

2016-08-26T21:04:46+00:00

This series moves the CONFIG_SYS_CACHELINE_SIZE.  First, in nearly all
cases we are mirroring the values used by the Linux Kernel here.  Also,
so long as (and in this case, it is true) we implement flushes in hunks
that are no larger than the smallest implementation (and given that we
mirror the Linux Kernel, again we are fine) it is OK to align higher.
The biggest changes here are that we always use 64 bytes for CPU_V7 even
if for example the underlying core is only 32 bytes (this mirrors
Linux).  Second, we say ARM64 uses 64 bytes not 128 (as found in the
Linux Kernel) as we do not need multi-platform support (to this degree)
and only the Cavium ThunderX 88xx series has a use for such large
alignment.

Cc: Albert Aribaud 
Cc: Marek Vasut 
Cc: Stefano Babic 
Cc: Prafulla Wadaskar 
Cc: Luka Perkov 
Cc: Stefan Roese 
Cc: Nagendra T S 
Cc: Vaibhav Hiremath 
Acked-by: Lokesh Vutla 
Cc: Steve Rae 
Cc: Igor Grinberg 
Cc: Nikita Kiryanov 
Cc: Stefan Agner 
Acked-by: Heiko Schocher 
Cc: Mateusz Kulikowski 
Cc: Peter Griffin 
Acked-by: Paul Kocialkowski 
Cc: Anatolij Gustschin 
Acked-by: "Pali Rohár" 
Cc: Adam Ford 
Cc: Steve Sakoman 
Cc: Grazvydas Ignotas 
Cc: Nishanth Menon 
Cc: Stephen Warren 
Cc: Robert Baldyga 
Cc: Minkyu Kang 
Cc: Thomas Weber 
Cc: Masahiro Yamada 
Cc: David Feng 
Cc: Alison Wang 
Cc: Michal Simek 
Cc: Simon Glass 
Cc: York Sun 
Cc: Shengzhou Liu 
Cc: Mingkai Hu 
Cc: Prabhakar Kushwaha 
Cc: Aneesh Bansal 
Cc: Saksham Jain 
Cc: Qianyu Gong 
Cc: Wang Dongsheng 
Cc: Alex Porosanu 
Cc: Hongbo Zhang 
Cc: tang yuantian 
Cc: Rajesh Bhagat 
Cc: Josh Wu 
Cc: Bo Shen 
Cc: Viresh Kumar 
Cc: Hannes Schmelzer 
Cc: Thomas Chou 
Cc: Joe Hershberger 
Cc: Sam Protsenko 
Cc: Bin Meng 
Cc: Christophe Ricard 
Cc: Anand Moon 
Cc: Beniamino Galvani 
Cc: Carlo Caione 
Cc: huang lin 
Cc: Sjoerd Simons 
Cc: Xu Ziyuan 
Cc: "jk.kernel@gmail.com" 
Cc: "Ariel D'Alessandro" 
Cc: Kever Yang 
Cc: Samuel Egli 
Cc: Chin Liang See 
Cc: Dinh Nguyen 
Cc: Hans de Goede 
Cc: Ian Campbell 
Cc: Siarhei Siamashka 
Cc: Boris Brezillon 
Cc: Andre Przywara 
Cc: Bernhard Nortmann 
Cc: Wolfgang Denk 
Cc: Ben Whitten 
Cc: Tom Warren 
Cc: Alexander Graf 
Cc: Sekhar Nori 
Cc: Vitaly Andrianov 
Cc: "Andrew F. Davis" 
Cc: Murali Karicheri 
Cc: Carlos Hernandez 
Cc: Ladislav Michl 
Cc: Ash Charles 
Cc: Mugunthan V N 
Cc: Daniel Allred 
Cc: Gong Qianyu 
Signed-off-by: Tom Rini 
Acked-by: Masahiro Yamada 
Acked-by: Chin Liang See 
Tested-by: Stephen Warren 
Acked-by: Paul Kocialkowski

Merge branch 'rmobile' of git://git.denx.de/u-boot-sh

2016-08-20T20:40:34+00:00

[trini: Drop CMD_BOOTI as it's now on by default on ARM64]
Signed-off-by: Tom Rini

ARM: OMAP4+: vcores: Remove duplicated code

2016-08-20T18:03:25+00:00

There is no reason to duplicate code for DRA7xx platforms as there
can be Rail grouping. The maximum voltage detection algorithm can still
be run on other platforms with no Rail grouping and does not harm as
it gives the same result.

Signed-off-by: Lokesh Vutla 
Reviewed-by: Tom Rini

ARM: OMAP5+: vcores: Drop unnecessary #ifndefs

2016-08-20T18:03:25+00:00

gpio_en field is introduced to detect if pmic is controlled by GPIO.
Make this field 0 on all TPS659* pmics available on DRA7/OMAP5 based platforms
and remove the #ifndefs.

Reviewed-by:  Keerthy 
Signed-off-by: Lokesh Vutla 
Reviewed-by: Tom Rini