<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/arch/arm/cpu, branch v2016.11</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>armv8: add hooks for all cache-wide operations</title>
<updated>2016-11-07T22:36:29+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-10-19T21:18:46+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1ab557a074aaa1927f7532489a1b75137e245b70'/>
<id>1ab557a074aaa1927f7532489a1b75137e245b70</id>
<content type='text'>
SoC-specific logic may be required for all forms of cache-wide
operations; invalidate and flush of both dcache and icache (note that
only 3 of the 4 possible combinations make sense, since the icache never
contains dirty lines). This patch adds an optional hook for all
implemented cache-wide operations, and renames the one existing hook to
better represent exactly which operation it is implementing. A dummy
no-op implementation of each hook is provided.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
SoC-specific logic may be required for all forms of cache-wide
operations; invalidate and flush of both dcache and icache (note that
only 3 of the 4 possible combinations make sense, since the icache never
contains dirty lines). This patch adds an optional hook for all
implemented cache-wide operations, and renames the one existing hook to
better represent exactly which operation it is implementing. A dummy
no-op implementation of each hook is provided.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>armv8: define get_ticks() for the ARMv8 Generic Timer</title>
<updated>2016-11-05T11:27:45+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2016-11-03T00:56:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=68fd5c136cfdcbe6d96f38d0db29141af953af85'/>
<id>68fd5c136cfdcbe6d96f38d0db29141af953af85</id>
<content type='text'>
For 64-bit ARM systems we provide just a timer_read_counter()
implementation and rely on the generic non-uclass get_ticks() function
in lib/time.c to call the former.
However this function is actually not 64-bit safe, as it assumes a
"long" to be 32-bit. Beside the fact that the resulting uint64_t
isn't bigger than "long" on 64-bit architectures and thus combining two
counters makes no sense, we get all kind of weird results when we try
to OR in the high value shifted by _32_ bits.
So let's avoid that function at all and provide a straight forward
get_ticks() implementation for ARMv8, which also is in line with ARMv7.

This fixes occasional immediate time-out expiration issues I see on the
Pine64 board. The root cause of this needs to be investigated, but this
fix looks like the right thing anyway.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For 64-bit ARM systems we provide just a timer_read_counter()
implementation and rely on the generic non-uclass get_ticks() function
in lib/time.c to call the former.
However this function is actually not 64-bit safe, as it assumes a
"long" to be 32-bit. Beside the fact that the resulting uint64_t
isn't bigger than "long" on 64-bit architectures and thus combining two
counters makes no sense, we get all kind of weird results when we try
to OR in the high value shifted by _32_ bits.
So let's avoid that function at all and provide a straight forward
get_ticks() implementation for ARMv8, which also is in line with ARMv7.

This fixes occasional immediate time-out expiration issues I see on the
Pine64 board. The root cause of this needs to be investigated, but this
fix looks like the right thing anyway.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sunxi: Rename CONFIG_SUNXI to CONFIG_ARCH_SUNXI</title>
<updated>2016-10-30T10:38:04+00:00</updated>
<author>
<name>Jagan Teki</name>
<email>jteki@openedev.com</email>
</author>
<published>2016-10-13T08:49:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=aec9a0f19f64f83090198966aeb4f91702ae3c33'/>
<id>aec9a0f19f64f83090198966aeb4f91702ae3c33</id>
<content type='text'>
CONFIG_SUNXI -&gt; CONFIG_ARCH_SUNXI
and removed CONFIG_SUNIX from config_whitelist.txt

Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Ian Campbell &lt;ijc@hellion.org.uk&gt;
Cc: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Jagan Teki &lt;jteki@openedev.com&gt;
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
CONFIG_SUNXI -&gt; CONFIG_ARCH_SUNXI
and removed CONFIG_SUNIX from config_whitelist.txt

Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Ian Campbell &lt;ijc@hellion.org.uk&gt;
Cc: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Jagan Teki &lt;jteki@openedev.com&gt;
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://www.denx.de/git/u-boot-imx</title>
<updated>2016-10-28T15:12:03+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-10-28T15:12:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4f892924d238cc415891dbea336a0fdaff2f853b'/>
<id>4f892924d238cc415891dbea336a0fdaff2f853b</id>
<content type='text'>
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;

Conflicts:
	common/Kconfig
	configs/dms-ba16_defconfig
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;

Conflicts:
	common/Kconfig
	configs/dms-ba16_defconfig
</pre>
</div>
</content>
</entry>
<entry>
<title>engicam: icorem6: Add DM_GPIO, DM_MMC support</title>
<updated>2016-10-26T14:53:16+00:00</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@amarulasolutions.com</email>
</author>
<published>2016-10-25T06:23:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f160c5c8b9f0593f7eebd4933c196954472ebd51'/>
<id>f160c5c8b9f0593f7eebd4933c196954472ebd51</id>
<content type='text'>
Add DM_GPIO, DM_MMC support for u-boot and disable for SPL.

Cc: Peng Fan &lt;peng.fan@nxp.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Cc: Matteo Lisi &lt;matteo.lisi@engicam.com&gt;
Cc: Michael Trimarchi &lt;michael@amarulasolutions.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add DM_GPIO, DM_MMC support for u-boot and disable for SPL.

Cc: Peng Fan &lt;peng.fan@nxp.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Cc: Matteo Lisi &lt;matteo.lisi@engicam.com&gt;
Cc: Michael Trimarchi &lt;michael@amarulasolutions.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: imx6q: Add devicetree support for Engicam i.CoreM6 DualLite/Solo</title>
<updated>2016-10-26T14:53:16+00:00</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@amarulasolutions.com</email>
</author>
<published>2016-10-08T12:30:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e88edc7b4affa764d33fc5a356fd8c15d33356e3'/>
<id>e88edc7b4affa764d33fc5a356fd8c15d33356e3</id>
<content type='text'>
i.CoreM6 DualLite/Solo modules are system on module solutions
manufactured by Engicam with following characteristics:
CPU           NXP i.MX6 DL, 800MHz
RAM           1GB, 32, 64 bit, DDR3-800/1066
NAND          SLC,512MB
Power supply  Single 5V
MAX LCD RES   FULLHD

and more info at
http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q

Cc: Peng Fan &lt;peng.fan@nxp.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Cc: Matteo Lisi &lt;matteo.lisi@engicam.com&gt;
Cc: Michael Trimarchi &lt;michael@amarulasolutions.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
i.CoreM6 DualLite/Solo modules are system on module solutions
manufactured by Engicam with following characteristics:
CPU           NXP i.MX6 DL, 800MHz
RAM           1GB, 32, 64 bit, DDR3-800/1066
NAND          SLC,512MB
Power supply  Single 5V
MAX LCD RES   FULLHD

and more info at
http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q

Cc: Peng Fan &lt;peng.fan@nxp.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Cc: Matteo Lisi &lt;matteo.lisi@engicam.com&gt;
Cc: Michael Trimarchi &lt;michael@amarulasolutions.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: imx: Add Engicam i.CoreM6 QDL Starter Kit initial support</title>
<updated>2016-10-26T14:53:16+00:00</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@amarulasolutions.com</email>
</author>
<published>2016-10-08T12:30:11+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f4b7532f821684010f4c7fcdf64ad1be03b9349d'/>
<id>f4b7532f821684010f4c7fcdf64ad1be03b9349d</id>
<content type='text'>
Boot Log for i.CoreM6 DualLite/Solo Starter Kit:
-----------------------------------------------

U-Boot SPL 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46)
Trying to boot from MMC1

U-Boot 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46 +0530)

CPU:   Freescale i.MX6SOLO rev1.3 at 792MHz
CPU:   Industrial temperature grade (-40C to 105C) at 31C
Reset cause: POR
DRAM:  256 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
switch to partitions #0, OK
mmc0 is current device
switch to partitions #0, OK
mmc0 is current device
reading boot.scr
** Unable to read file boot.scr **
reading zImage
6741808 bytes read in 341 ms (18.9 MiB/s)
Booting from mmc ...
reading imx6dl-icore.dtb
30600 bytes read in 19 ms (1.5 MiB/s)
   Booting using the fdt blob at 0x18000000
   Using Device Tree in place at 18000000, end 1800a787

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0

Boot Log for i.CoreM6 Quad/Dual Starter Kit:
--------------------------------------------

U-Boot SPL 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46)
Trying to boot from MMC1

U-Boot 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46 +0530)

CPU:   Freescale i.MX6Q rev1.2 at 792MHz
CPU:   Industrial temperature grade (-40C to 105C) at 28C
Reset cause: POR
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
icorem6qdl&gt;

Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Cc: Matteo Lisi &lt;matteo.lisi@engicam.com&gt;
Cc: Michael Trimarchi &lt;michael@amarulasolutions.com&gt;
Acked-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Boot Log for i.CoreM6 DualLite/Solo Starter Kit:
-----------------------------------------------

U-Boot SPL 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46)
Trying to boot from MMC1

U-Boot 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46 +0530)

CPU:   Freescale i.MX6SOLO rev1.3 at 792MHz
CPU:   Industrial temperature grade (-40C to 105C) at 31C
Reset cause: POR
DRAM:  256 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
switch to partitions #0, OK
mmc0 is current device
switch to partitions #0, OK
mmc0 is current device
reading boot.scr
** Unable to read file boot.scr **
reading zImage
6741808 bytes read in 341 ms (18.9 MiB/s)
Booting from mmc ...
reading imx6dl-icore.dtb
30600 bytes read in 19 ms (1.5 MiB/s)
   Booting using the fdt blob at 0x18000000
   Using Device Tree in place at 18000000, end 1800a787

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0

Boot Log for i.CoreM6 Quad/Dual Starter Kit:
--------------------------------------------

U-Boot SPL 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46)
Trying to boot from MMC1

U-Boot 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46 +0530)

CPU:   Freescale i.MX6Q rev1.2 at 792MHz
CPU:   Industrial temperature grade (-40C to 105C) at 28C
Reset cause: POR
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
icorem6qdl&gt;

Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Cc: Matteo Lisi &lt;matteo.lisi@engicam.com&gt;
Cc: Michael Trimarchi &lt;michael@amarulasolutions.com&gt;
Acked-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>efi_loader: Rename EFI_RUNTIME_{TEXT, DATA} to __efi_runtime{, _data}</title>
<updated>2016-10-19T07:01:54+00:00</updated>
<author>
<name>Alexander Graf</name>
<email>agraf@suse.de</email>
</author>
<published>2016-10-14T11:45:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3c63db9ca9765c85bbcf2a06f4183cfb0036ea33'/>
<id>3c63db9ca9765c85bbcf2a06f4183cfb0036ea33</id>
<content type='text'>
Compiler attributes are more commonly __foo style tags rather than big
upper case eye sores like EFI_RUNTIME_TEXT.

Simon Glass felt quite strongly about this, so this patch converts our
existing defines over to more eye friendly ones.

Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Compiler attributes are more commonly __foo style tags rather than big
upper case eye sores like EFI_RUNTIME_TEXT.

Simon Glass felt quite strongly about this, so this patch converts our
existing defines over to more eye friendly ones.

Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>efi_loader: Add generic PSCI RTS</title>
<updated>2016-10-19T07:01:50+00:00</updated>
<author>
<name>Alexander Graf</name>
<email>agraf@suse.de</email>
</author>
<published>2016-08-16T19:08:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b6575f34e20ddc40baa391c2db0e1e015e942af2'/>
<id>b6575f34e20ddc40baa391c2db0e1e015e942af2</id>
<content type='text'>
Now that we have generic PSCI reset and shutdown support in place, we can
advertise those as EFI Run Time Services, allowing efi applications and
OSs to reset and shut down systems.

Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now that we have generic PSCI reset and shutdown support in place, we can
advertise those as EFI Run Time Services, allowing efi applications and
OSs to reset and shut down systems.

Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: Provide common PSCI based reset handler</title>
<updated>2016-10-19T07:01:31+00:00</updated>
<author>
<name>Alexander Graf</name>
<email>agraf@suse.de</email>
</author>
<published>2016-08-16T19:08:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8069821fc2cb55a458efef1c4c614810302b6ab2'/>
<id>8069821fc2cb55a458efef1c4c614810302b6ab2</id>
<content type='text'>
Most armv8 systems have PSCI support enabled in EL3, either through
ARM Trusted Firmware or other firmware.

On these systems, we do not need to implement system reset manually,
but can instead rely on higher level firmware to deal with it.

The exclude list seems excessive right now, but NXP is working on
providing an in-tree PSCI implementation, so that all NXP systems
can eventually use PSCI as well.

Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
[agraf: fix meson]
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Most armv8 systems have PSCI support enabled in EL3, either through
ARM Trusted Firmware or other firmware.

On these systems, we do not need to implement system reset manually,
but can instead rely on higher level firmware to deal with it.

The exclude list seems excessive right now, but NXP is working on
providing an in-tree PSCI implementation, so that all NXP systems
can eventually use PSCI as well.

Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
[agraf: fix meson]
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
