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<title>u-boot.git/arch/arm/cpu, branch v2017.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/cpu?h=v2017.07</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/arch/arm/cpu?h=v2017.07'/>
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<updated>2017-07-06T20:17:13Z</updated>
<entry>
<title>arm64: use psci reset on snapdragon</title>
<updated>2017-07-06T20:17:13Z</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@gmail.com</email>
</author>
<published>2017-06-26T13:22:23Z</published>
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<id>urn:sha1:8bf5c1e191ad5761196ff1bcb54aae4007fee98a</id>
<content type='text'>
This actually works on snapdragon.. not sure why we weren't using it.
Fixes reboot/poweroff when using UEFI.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
Reviewed-by: Alexander Graf &lt;agraf@suse.de&gt;
</content>
</entry>
<entry>
<title>Merge git://www.denx.de/git/u-boot-imx</title>
<updated>2017-06-27T13:32:37Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-06-27T13:32:37Z</published>
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<id>urn:sha1:821560fd8e43eecc208c1c52ad24faadb6b52703</id>
<content type='text'>
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;

Conflicts:
	include/configs/imx6qdl_icore_rqs.h
	include/configs/imx6ul_geam.h
	include/configs/imx6ul_isiot.h
</content>
</entry>
<entry>
<title>mx6: soc: Fix typo in temperature unit name</title>
<updated>2017-06-27T07:06:09Z</updated>
<author>
<name>Fabio Estevam</name>
<email>fabio.estevam@nxp.com</email>
</author>
<published>2017-06-22T13:50:05Z</published>
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<id>urn:sha1:65496a34835cb4c9547bd02dd15b018c333add9d</id>
<content type='text'>
The correct name is 'Celsius', so fix it accordingly.

Signed-off-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'xilinx-for-v2017.07' of git://www.denx.de/git/u-boot-microblaze</title>
<updated>2017-06-21T11:57:37Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-06-21T11:57:37Z</published>
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<id>urn:sha1:784667d7f9452780966dd0b400ef516f14f14c26</id>
<content type='text'>
Xilinx changes for v2017.07

ZynqMP:
- config cleanup
- SD LS mode support
- psu_init* cleanup
- unmap OCM
- Support for SMC

Zynq:
- add ddrc to Kconfig
- add topic-miamilite board support
</content>
</entry>
<entry>
<title>arm64: zynqmp: Check pmufw version</title>
<updated>2017-06-20T14:42:13Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2017-02-07T13:32:26Z</published>
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<id>urn:sha1:fb4000e87178bf20aeb0d6c6a71b0e25ff8dcda3</id>
<content type='text'>
If PMUFW version is not v0.3 then panic.
ZynqMP switch to CCF based clock driver which requires
PMUFW to be present at certain version.
This patch ensure that you use correct and tested PMUFW
binary.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>arm64: zynqmp: Define routines for mmio write and read</title>
<updated>2017-06-20T14:42:06Z</updated>
<author>
<name>Siva Durga Prasad Paladugu</name>
<email>siva.durga.paladugu@xilinx.com</email>
</author>
<published>2017-02-01T19:40:46Z</published>
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<id>urn:sha1:e0752bc18422ec0dc93a770e96b1c2f44ee64ed7</id>
<content type='text'>
Define routines of mmio write and read functionalities
for zynqmp platform.

Also do not call SMC from SPL because SPL is running before ATF in EL3
that's why SMCs can't be called because there is nothing to call.
zynqmp_mmio*() are doing direct read/write accesses and this patch does
the same. PMUFW is up and running at this time and there is a way to talk
to pmufw via IPI but there is no reason to implement IPI stuff in SPL if
we need just simple read for getting clock driver to work.

Also make invoke_smc as global so that it can be reused in
multile places where ever possible.

Signed-off-by: Siva Durga Prasad Paladugu &lt;sivadur@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>arm64: zynqmp: Do not map unused OCM/TCM region</title>
<updated>2017-06-20T14:40:58Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2017-02-25T17:17:11Z</published>
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<id>urn:sha1:6a1d91be318b44365dfe095a9ca7df1619abefc9</id>
<content type='text'>
When OCM or TCM is protected this mapping still exist and it is causing access
violation.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>arm64: zynqmp: Add comment about level shifter mode v1</title>
<updated>2017-06-20T14:40:58Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2017-03-02T10:02:55Z</published>
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<id>urn:sha1:b0259c840ecd7ec35ebc5acad061bd6e2bcc847d</id>
<content type='text'>
Silicon v1 didn't support SD boot mode with level shifter.
Because system can't boot any error message is not shown
that's why comment is just a record if someone tries to debug it.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>arm64: zynqmp: spl: use given boot_device instead of fetching it again</title>
<updated>2017-06-19T14:53:10Z</updated>
<author>
<name>Jean-Francois Dagenais</name>
<email>jeff.dagenais@gmail.com</email>
</author>
<published>2017-04-03T01:44:35Z</published>
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<id>urn:sha1:8bf62ae7da0eea6a152a9d76d009fb79113a3119</id>
<content type='text'>
The boot_device argument to spl_boot_mode was massively added without
actually modifying the existing functions.

This commit actually makes use of the handed value, which is the same.

Signed-off-by: Jean-Francois Dagenais &lt;jeff.dagenais@gmail.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>arm64: zynqmp: spl: fix dual SD controller support</title>
<updated>2017-06-19T14:53:09Z</updated>
<author>
<name>Jean-Francois Dagenais</name>
<email>jeff.dagenais@gmail.com</email>
</author>
<published>2017-04-03T01:44:34Z</published>
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<id>urn:sha1:e3fdf5d05659dbe5ce3f9661a4eb3202005b2be2</id>
<content type='text'>
When enabling both SDHCI controllers, spl_mmc.c would actually choose
device sdhci0 even if booted from sdhci1 (boot_device). This is because
spl_mmc_get_device_index(boot_device) expects BOOT_DEVICE_MMC2[_2] in
order to return index 1 instead of 0.

The #if defined(...) statement is copied from board/xilinx/zynqmp/zynqmp.c

So the key to properly enabling both controllers as boot sources is
defining both CONFIG_ZYNQ_SDHCI0 and CONFIG_ZYNQ_SDHCI1 in your board's
include/configs/*.h.

Signed-off-by: Jean-Francois Dagenais &lt;jeff.dagenais@gmail.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
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