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<title>u-boot.git/arch/arm/cpu, branch v2018.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/arm/cpu?h=v2018.01</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/arch/arm/cpu?h=v2018.01'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2017-12-26T18:10:24Z</updated>
<entry>
<title>Move CONFIG_PANIC_HANG to Kconfig</title>
<updated>2017-12-26T18:10:24Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2017-12-04T03:37:00Z</published>
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<id>urn:sha1:7e3caa81e0e9cc5e2beed4a3a1c334e2119f4498</id>
<content type='text'>
Freescale (NXP) boards have lots of defconfig files per board.
I used "imply PANIC_HANG" for them.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-fsl-qoriq</title>
<updated>2017-12-18T23:39:00Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-12-18T23:39:00Z</published>
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<id>urn:sha1:1a3fc354b50b2a86361964b6d695ce26058248f5</id>
<content type='text'>
</content>
</entry>
<entry>
<title>armv8: ls2085a: Update README file for NAND boot</title>
<updated>2017-12-18T16:25:07Z</updated>
<author>
<name>York Sun</name>
<email>york.sun@nxp.com</email>
</author>
<published>2017-12-07T22:37:40Z</published>
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<id>urn:sha1:f440aba172c3b1107176d59f9cd0d7b209afc0a8</id>
<content type='text'>
Update README file to note LS2088A and LS1088A don't support booting
from NAND flash.

Signed-off-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>armv8: layerscape: Discard the needless cpu nodes</title>
<updated>2017-12-13T21:40:29Z</updated>
<author>
<name>Wenbin song</name>
<email>wenbin.song@nxp.com</email>
</author>
<published>2017-12-04T04:18:29Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=20c7305101219aba62c9f1f84920a99d4026cad5'/>
<id>urn:sha1:20c7305101219aba62c9f1f84920a99d4026cad5</id>
<content type='text'>
Using "cpu_pos_mask()" function to detect the real online cpus,
and discard the needless cpu nodes on kernel dts.

Signed-off-by: Wenbin Song &lt;wenbin.song@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>armv8: ls1043a/ls2080a: check SoC by device ID</title>
<updated>2017-12-13T21:40:29Z</updated>
<author>
<name>Wenbin song</name>
<email>wenbin.song@nxp.com</email>
</author>
<published>2017-12-04T04:18:28Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a8f33034f2ed029dd04aae4cfdf11bf1f13a03a2'/>
<id>urn:sha1:a8f33034f2ed029dd04aae4cfdf11bf1f13a03a2</id>
<content type='text'>
Check LS1043A/LS2080a by device ID without using personality ID to
determine revision number. This check applies to all various
personalities of the same SoC family.

Signed-off-by: Wenbin Song &lt;wenbin.song@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>binman: arm: Include the binman symbol table</title>
<updated>2017-12-13T02:53:45Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-11-14T01:55:02Z</published>
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<id>urn:sha1:cf2a8fd66d8d4b855f5955e15e4d8e436b4bc3d5</id>
<content type='text'>
This area of the image contains symbols whose values are filled in by
binman. If this feature is not used, the table is empty.

Add this to the ARM SPL link script.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>ata: Migrate CONFIG_SCSI_AHCI to Kconfig</title>
<updated>2017-12-12T23:13:19Z</updated>
<author>
<name>Tuomas Tynkkynen</name>
<email>tuomas.tynkkynen@iki.fi</email>
</author>
<published>2017-12-08T13:36:19Z</published>
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<id>urn:sha1:9fd95ef0d39819fb27441fdd0f1b15b05d9b5085</id>
<content type='text'>
And use 'imply' liberally.

Signed-off-by: Tuomas Tynkkynen &lt;tuomas.tynkkynen@iki.fi&gt;
</content>
</entry>
<entry>
<title>armv8: LS1088A_QSPI: SECURE_BOOT: Images validation</title>
<updated>2017-12-06T22:55:17Z</updated>
<author>
<name>Udit Agarwal</name>
<email>udit.agarwal@nxp.com</email>
</author>
<published>2017-11-22T03:31:26Z</published>
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<id>urn:sha1:30c41d2191e9d726e3677c8af969f76d7669262c</id>
<content type='text'>
Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC
phase using esbc_validate command.

Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment

Add header address for PPA to be validated during ESBC phase for
LS1088A platform based on LAyerscape Chasis 3.

Moves sec_init prior to ppa_init as for validation of PPA sec must
be initialised before the PPA is initialised.

Signed-off-by: Udit Agarwal &lt;udit.agarwal@nxp.com&gt;
Signed-off-by: Vinitha Pillai-B57223 &lt;vinitha.pillai@nxp.com&gt;
Signed-off-by: Sumit Garg &lt;sumit.garg@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>armv8: Workaround for USB erratua on LS1012A</title>
<updated>2017-12-06T22:55:17Z</updated>
<author>
<name>Ran Wang</name>
<email>ran.wang_1@nxp.com</email>
</author>
<published>2017-11-13T08:14:48Z</published>
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<id>urn:sha1:819163c44e51e604d43ea7e0474b5e106c7ac088</id>
<content type='text'>
This is suplement for patch which handle below errata:
A-009007, A-009008, A-008997, A-009798

Signed-off-by: Ran Wang &lt;ran.wang_1@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>armv8: fsl-layerscape: Add support of disabling core prefetch</title>
<updated>2017-12-06T22:55:17Z</updated>
<author>
<name>Prabhakar Kushwaha</name>
<email>prabhakar.kushwaha@nxp.com</email>
</author>
<published>2017-11-10T06:02:52Z</published>
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<id>urn:sha1:2db53cfe9601288d8b1c1dfb153afc644a954872</id>
<content type='text'>
Instruction prefetch feature is by default enabled during core
release. This patch add support of disabling instruction prefetch
by setting core mask in PPA. Here each core mask bit represents a
core and prefetch is disabled at the time of core release.

Signed-off-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
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